91 lines
3.5 KiB
Plaintext
91 lines
3.5 KiB
Plaintext
.TH dma_mapalloc D3X
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.SH NAME
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\f4dma_mapalloc\f1 \- allocate a DMA map
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.SH SYNOPSIS
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.nf
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\f4#include "sys/types.h"
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#include "sys/sema.h"
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#include "sys/dmamap.h"
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.sp .8v
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dmamap_t *dma_mapalloc(int \f1\f2type\f1\f4,\c
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int \f1\f2adapter\f1\f4, int \f1\f2num_pages\f1\f4,\c
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int \f1\f2flags\f1\f4);\f1
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.fi
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.SS Arguments
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.TP
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\f2type\f1
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Must be either \f2DMA_A32VME\f1 or \f2DMA_A24VME\f1 depending on
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the transfer desired.
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(The \f2DMA_SCSI\f1 type is reserved for exclusive use
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by the SCSI host adapter driver.)
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.TP
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\f2adapter\f1
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Specifies the I/O adapter to use for setting up the mapping
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This should be set to the I/O bus adapter
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number to which the device doing DMA is attached to.
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.TP
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\f2num_pages\f1
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Specifies the maximum number of mapping registers to allocate.
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Mapping
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registers are responsible for translating the addresses that appear
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on the I/O bus to a format that could be used internally within a system.
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On current Silicon Graphics systems, each mapping register is
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capable of mapping a page of length 4096 bytes on the I/O
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bus to a set of consecutive addresses on system memory.
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This is true regardless of the system page size.
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The number of bytes each mapping register is capable of mapping
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could change in future systems.
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In order to keep the device driver
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platform independent, use of the macro \f4io_btoc\f1 is recommended to
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calculate the \f2num_pages\f1 parameter for required length of mapping.
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You need to allocate an extra page for non-page aligned
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transfers-for example, a transfer of 4096 bytes starting at a
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non-aligned address actually requires two mapping registers.
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.TP
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\f2flags\f1
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Reserved for future development.
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For now, you should always set it to 0.
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.SH DESCRIPTION
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\f4dma_mapalloc\f1 allocates DMA mapping registers on
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multiprocessor models and returns a pointer to a structure,
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of type \f2dmamap_t\f1,
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for later use by the mapping routine \f4dma_map\f1.
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You need DMA maps to access main memory through VME A24 space.
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In addition, because DMA maps give you the ability to perform
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transfers to non-contiguous physical memory,
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you also want them for A32 access.
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.P
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Use \f4dma_mapfree\f1 to free the DMA mapping registers
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and other resources associated with a given map.
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.P
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VME adapter number to which a device is attached is available at
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edtinit time via \f2e_adap\f1 field in \f2edt\f1 structure.
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It is also possible to get this number by using the function
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\f4vme_adapter\f1(D3X).
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.P
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This call can block (it calls \f4psema\f1) if no maps are available,
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so it must never be called at interrupt time.
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.P
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On Challenge and Onyx systems, the maximum amount of address space that can
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be mapped for DMA by A32 VME devices is 64MB by default.
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This can be changed by modifying the systune variable \f4nvme32_dma\f1.
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The value of \f4nvme32_dma\f1 is the maximum amount of address space
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(in megabytes) that may be allocated for A32 VME devices.
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The default value for \f4nvme32_dma\f1 is 64 (corresponding to the standard
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limit of 64MB of address space).
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\f4nvme32_dma\f1 must be a power of 2 and may not exceed 512
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(meaning 512MB).
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If a value larger than 512 is specified, it will be forced back down to 512.
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If the value is not a power of 2, it will be rounded up to the next higher
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power of 2 (but not to exceed 512).
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.SS "Return Values"
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\f4dma_mapalloc\f1 returns a pointer to the DMA map
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structure on models that support DMA maps.
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On other models, \f4dma_mapalloc\f1 returns \-1 to indicate that
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DMA mapping is not possible on that model.
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.SS "See Also"
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dma_map(D3X),
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dma_mapaddr(D3X),
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dma_mapfree(D3X),
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vme_adapter(D3X).
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