207 lines
6.6 KiB
C
207 lines
6.6 KiB
C
/*
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* Copyright 1995, Silicon Graphics, Inc.
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* ALL RIGHTS RESERVED
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*
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* UNPUBLISHED -- Rights reserved under the copyright laws of the United
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* States. Use of a copyright notice is precautionary only and does not
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* imply publication or disclosure.
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*
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* U.S. GOVERNMENT RESTRICTED RIGHTS LEGEND:
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* Use, duplication or disclosure by the Government is subject to restrictions
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* as set forth in FAR 52.227.19(c)(2) or subparagraph (c)(1)(ii) of the Rights
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* in Technical Data and Computer Software clause at DFARS 252.227-7013 and/or
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* in similar or successor clauses in the FAR, or the DOD or NASA FAR
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* Supplement. Contractor/manufacturer is Silicon Graphics, Inc.,
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* 2011 N. Shoreline Blvd. Mountain View, CA 94039-7311.
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*
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* THE CONTENT OF THIS WORK CONTAINS CONFIDENTIAL AND PROPRIETARY
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* INFORMATION OF SILICON GRAPHICS, INC. ANY DUPLICATION, MODIFICATION,
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* DISTRIBUTION, OR DISCLOSURE IN ANY FORM, IN WHOLE, OR IN PART, IS STRICTLY
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* PROHIBITED WITHOUT THE PRIOR EXPRESS WRITTEN PERMISSION OF SILICON
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* GRAPHICS, INC.
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*/
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/*
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* IOC3 10/100 Mbps Fast Ethernet Device Driver definitions
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*/
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#ident "$Header: /proj/irix6.5.7m/isms/stand/arcs/include/net/RCS/if_ef.h,v 1.8 1999/02/10 23:15:48 paulson Exp $"
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#ifndef __IF_EF_H__
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#define __IF_EF_H__
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#include <sys/mii.h>
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/*
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* RAW_HDRPAD yields the byte-padding needed to ensure that the end of the
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* link-layer header is aligned. RAW_BUFPAD tells how much space to reserve
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* in input buffers after the ifqueue header and before the link-layer header.
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* Given a RAW_ALIGNGRAIN-congruent address and a header type, RAW_HDR returns
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* the header pointer.
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*/
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#define RAW_ALIGNSHIFT 2
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#define RAW_ALIGNGRAIN (1<<RAW_ALIGNSHIFT)
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#define RAW_ALIGNMASK (RAW_ALIGNGRAIN-1)
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#define RAW_HDRPAD(hdrsize) \
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((hdrsize & RAW_ALIGNMASK) == 0 ? 0 \
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: RAW_ALIGNGRAIN - ((hdrsize) & RAW_ALIGNMASK))
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/*
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* Ethernet input packets enqueued on protocol interrupt queues begin
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* with a struct etherbufhead. This structure contains an ifnet pointer,
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* raw domain information, and the packet's Ethernet header.
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*/
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#define ETHERHDRPAD RAW_HDRPAD(sizeof(struct ether_header))
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#define IFHDRPAD 8
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#define SNOOPPAD 16
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struct etherbufhead {
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char ebh_ifh[IFHDRPAD]; /* not used */
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char ebh_snoop[SNOOPPAD]; /* not used */
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char ebh_pad[ETHERHDRPAD]; /* not used */
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struct ether_header ebh_ether;
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};
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/*
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* Ethernet address structure, for by-value semantics.
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*/
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#define ETHERADDRLEN (sizeof ((struct ether_header *) 0)->ether_dhost)
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struct etheraddr {
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u_char ea_vec[ETHERADDRLEN];
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};
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/*
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* Ethernet network interface struct.
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* NB: eif_arpcom must be the first member for ifptoeif() to work.
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*/
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struct etherif {
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struct arpcom eif_arpcom; /* ifnet and current address */
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struct etheraddr eif_addr; /* official address */
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};
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/*
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* IOC3 10/100 Mbit Fast Ethernet device driver
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*/
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/*
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* RX buffer
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*/
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#define EFRDATASZ (2048 - sizeof (struct ioc3_erxbuf) \
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- sizeof(struct etherbufhead))
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struct efrxbuf {
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struct ioc3_erxbuf rb_rxb;
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struct etherbufhead rb_ebh;
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u_char rb_data[EFRDATASZ];
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};
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/*
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* TX descriptor
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*/
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#define TXDATASZ 88
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struct eftxd {
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__uint32_t cmd;
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__uint32_t bufcnt;
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__uint64_t p1;
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__uint64_t p2;
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struct ether_header eh;
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u_char data[TXDATASZ];
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};
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/*
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* Principle (per-interface) structure.
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*/
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struct ef_info {
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struct etherif ei_eif; /* common ethernet interface */
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ioc3_eregs_t *ei_regs; /* ioc3 ether registers */
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ioc3_mem_t *ei_ioc3regs; /* ioc3 registers */
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int ei_ntxd; /* # tx descriptors */
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volatile struct eftxd *ei_txd; /* tx descriptor ring */
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int ei_txhead; /* next txd to post */
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int ei_txtail; /* next txd to reclaim */
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struct mbuf **ei_txm; /* tx mbufs pending */
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int ei_linkdown; /* T/F eisr link failure */
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int ei_nrbuf; /* # rbufs to keep posted */
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volatile __uint64_t *ei_rxd; /* rx descriptor ring */
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int ei_rxhead; /* next rxd to read */
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int ei_rxtail; /* next rxd to post */
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struct efrxbuf *ei_rb; /* quick ptr to head rbuf */
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int ei_in_active; /* input recursion preventer */
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struct mbuf **ei_rxm; /* posted rbufs */
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int ei_chiprev; /* ioc3 revision */
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int ei_phytype; /* phy type code */
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int ei_phyunit; /* phy addr */
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int ei_phyrev; /* phy revision */
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int ei_speed100; /* 0=10Mbps 1=100Mbps */
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int ei_fullduplex; /* 0=half 1=full */
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int ei_erbar; /* store into erbar reg */
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int ei_ssram_bits; /* emcr parity/bufsiz bits */
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int ei_remfaulting; /* T/F phy remote fault */
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int ei_jabbering; /* T/F phy jabber fault */
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int ei_defers; /* # cumulative defers */
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int ei_runt; /* # runt packets */
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int ei_crc; /* # crc errors */
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int ei_code; /* # coding error */
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int ei_giant; /* # giant pkt errors */
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int ei_drop; /* # dropped input packets */
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int ei_ssramoflo; /* # ssram overflow */
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int ei_ssramuflo; /* # ssram underflow */
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int ei_memerr; /* # rx/tx memory error */
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int ei_parityerr; /* # rx/tx parity error */
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int ei_rtry; /* # tx retry errors */
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int ei_exdefer; /* # excessive defers */
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int ei_lcol; /* # late collisions */
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int ei_txgiant; /* # tx giant packets */
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volatile __uint32_t *ei_ssram; /* diag access to ssram */
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};
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#define ei_ac ei_eif.eif_arpcom /* common arp stuff */
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#define ei_if ei_ac.ac_if /* ifnet */
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#define ei_unit ei_if.if_unit /* logical unit # */
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#define ei_curaddr ei_ac.ac_enaddr /* current ether addr */
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#define ei_addr ei_eif.eif_addr /* i/f official addr */
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#define ei_rawif ei_eif.eif_rawif /* raw domain interface */
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#define eiftoei(eif) ((struct ef_info*)(eif)->eif_private)
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#define TXDSZ (sizeof (struct eftxd))
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#define RXDSZ (sizeof (__uint64_t))
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#define NTXDSML 128 /* # txd desktop configuration */
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#define NTXDBIG 512 /* # txd server configuration */
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#define NRXD 512 /* # rxd */
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#define GIANT_PACKET_SIZE 1536
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/* PHY defines */
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#define PHY_QS6612X 0x0181440 /* Quality TX */
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#define PHY_ICS1890 0x0015F40 /* ICS TX */
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#define PHY_ICS1892 0x0015F41 /* ICS TX */
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#define PHY_DP83840 0x20005C0 /* National TX */
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#define ICS1890_R0_LOOPBACK 0x4000
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#define ICS1890_R17_SPEED_100 0x8000
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#define ICS1890_R17_FULL_DUPLEX 0x4000
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#define ICS1890_R17_PD_MASK 0x3800
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#define ICS1890_R17_PD_FAULT 0x1000
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#define DP83840_R25_SPEED_10 0x0040
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#define QS6612X_R31_OPMODE_MASK 0x001c
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#define QS6612X_R31_10 0x0004
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#define QS6612X_R31_100 0x0008
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#define QS6612X_R31_10FD 0x0014
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#define QS6612X_R31_100FD 0x0018
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#endif /* __IF_EF_H__ */
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