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reference: LANCE loopback-FCS datasheet evidence (MAME condition is right)
Add the Am7990 Technical Manual and Am79C90 datasheet to reference/lance-datasheet/ and a report, reference/lance-loopback-fcs.md, that answers whether MAME's am79c90 receive() FCS condition (!(MODE_LOOP) || MODE_DTCR) is inverted. Verdict: MAME is right. The CRC generator and checker share one circuit, so with LOOP=1 the receiver can only check the FCS when DTCR=1 -- exactly what MAME does. The proposed inversion would be wrong in both loopback cases. No MAME change made.
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Am7990 Ethemetl Reference Guide
|
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Cheapemet Family • Overview
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• Software
|
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• Design Consideration
|
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• Training
|
||||
|
||||
|
||||
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||||
|
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Order # 08496A
|
||||
TABLE OF CONTENTS
|
||||
I. Overview of Am7990 EtherneVCheapernet Family
|
||||
II. Software Support & Evaluation Boards
|
||||
III. Miscellaneous Components
|
||||
IV. Design Considerations
|
||||
V. Ethernet Training Courses
|
||||
|
||||
|
||||
|
||||
|
||||
Am7990 ETHERNET /CHEAPERNET
|
||||
FAMILY TECHNICAL LITERATURE
|
||||
The following publications are available from your local
|
||||
AMD sales office or AMD authorized distributors.
|
||||
|
||||
|
||||
|
||||
|
||||
TITLE DESCRIPTION ORDER #
|
||||
• The Am7990 • General Overview of 03394C
|
||||
Family EtherneV Am7990 Family and
|
||||
Cheapernet EtherneVCheapernet
|
||||
IEEE-802.3 Node LANS.
|
||||
Grid Brochure
|
||||
• Am7990 Local • LANCE Data Sheet- 05698B
|
||||
Area Network Product specifications
|
||||
Controller for and functional
|
||||
Ethernet (LANCE) description of
|
||||
controller chip.
|
||||
• Am7992B Seri!!1 • SIA Data Sheet- 03378A
|
||||
Interface Adaptor Product specifications
|
||||
(SIA) and functional
|
||||
description of
|
||||
encoder/decoder
|
||||
chip.
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||||
• Am7996 • Transceiver Data 07506A
|
||||
IEEE-802.3/ Sheet-Product
|
||||
EtherneV specifications and
|
||||
Cheapernet functional description
|
||||
Transceiver of transceiver
|
||||
chip.
|
||||
• Local Area • Technical Manual- 06363A
|
||||
Network Controller Considerations of
|
||||
Am7990 (LANCE) LANCE hardware
|
||||
and software
|
||||
interface.
|
||||
• InterfaCing the • Application Note- 07422A
|
||||
Am7990 LANCE Implementation of
|
||||
to 8-Bit Am7990 LANCE with
|
||||
Microprocessors 8-bit microprocessors.
|
||||
• Am7996 • Application Note- 08031 A
|
||||
Application Functional description
|
||||
Note and board layout
|
||||
considerations.
|
||||
|
||||
|
||||
|
||||
|
||||
2
|
||||
OVERVIEW provides the same 10M bits/sec performance. This high-
|
||||
This reference guide provides design consideration notes performance chip family is compatible with IEEE 802.3, the
|
||||
relating to the Am7990 IEEE 802.3 (EthernetiCheapernet) industry standard for EthernetiCheapernel.
|
||||
family of products. Consult you local AMD sales office, The Am7990 Family was produced through joint devel-
|
||||
AMD representative or AMD authorized distributor for any opment work with Digital Equipment Corporation (Am7990
|
||||
questions concerning device price and/or availability. LANCE and Am7992B SIA) and 3COM (Am7996). Op-
|
||||
timum performance of this family has been assured
|
||||
DEVICE NOMENCLATURE through rigorous testing in various network configurations.
|
||||
The following denotes the current device nomenclature: The Am7990 LANCE features buffer management with
|
||||
descriptor rings to substantially reduced CPU overhead. Its
|
||||
Am7990DCnO (LANCE) - Replaced Am7990DC/60 24-bit-wide linear address provides direct memory address
|
||||
Rev. D product (DMA) into the entire memory space of all major 16-bit
|
||||
Am7992BDC (SIA) - Replaced Am7992ADC and microprocessors.
|
||||
wide package Am7991 ADC
|
||||
Am7996DC (Transceiver) - Replaced Am7995DC The Am7992B SIA is a Manchester encoder-decoder
|
||||
that provides the connection between the LANCE and the
|
||||
Ethernet transceiver. The SIA features include transient
|
||||
I. OVERVIEW OF Am7990 noise suppression and guaranteed signal threshold limits
|
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ETHERNET/CHEAPERNET FAMILY in both data and collision paths.
|
||||
The implementation of 10M bits/sec baseband networking The Am7996 Transceiver provides all the transmit,
|
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referred to as Ethernet or Cheapernet has been simplified receive and collision detection functions with respect to the
|
||||
by the availability of three devices-the Am7990 Local coax transmiSSion media. The Am7996 features include an
|
||||
Area Network Controller for Ethernet (LANCE), the optional Signal Quality Error (SQE) test function, and noise
|
||||
Am7992B Serial Interface Adapter (SIA) and the Am7996 rejection filters on both transmit and receive data.
|
||||
Transceiver.
|
||||
Together, these three devices provide a complete inte-
|
||||
Devices in the Am7990 Family support both Ethernet grated solution for IEEE 802.3, Ethernet, and Cheapernet
|
||||
and Cheapernet configurations. Cheapernet is Ethernet on networking applications.
|
||||
cheaper cables, has fewer nodes, and shorter distance but
|
||||
|
||||
|
||||
|
||||
|
||||
Ethernet/IEEE 802.3 Type A Ethernet
|
||||
COAX
|
||||
I
|
||||
1-;::===:::;" --- ~
|
||||
~
|
||||
~
|
||||
~
|
||||
~
|
||||
~
|
||||
Iii
|
||||
~.
|
||||
~
|
||||
Iii
|
||||
I
|
||||
Iii
|
||||
••-Iii
|
||||
DTE • Data Terminal Equipment ~
|
||||
AUI - Attachment Unit Interface
|
||||
MAU - Media Attachment Unit
|
||||
|
||||
|
||||
• High AC/DC impedance tap
|
||||
• AUI drop cable «50 meters)
|
||||
• Very low loss COAX
|
||||
• Nonintrusive Node attachment
|
||||
|
||||
08496A-1
|
||||
|
||||
Figure 1A.
|
||||
|
||||
|
||||
|
||||
|
||||
3
|
||||
Cheapernet/lEEE 802.3 Type B
|
||||
DTE
|
||||
|
||||
IEI RGSS
|
||||
COAX
|
||||
Local Local Am7990 Am7992B
|
||||
CPU Memory LANCE SIA BNC'T'
|
||||
|
||||
|
||||
|
||||
|
||||
• Standard BNC Tee tap
|
||||
• Inexpensive configuration and cable
|
||||
• Same bandwidth as Type A
|
||||
|
||||
|
||||
|
||||
|
||||
Figure 1B,
|
||||
|
||||
|
||||
|
||||
|
||||
II. SOFTWARE SUPPORT board which provides a 15 pin AUI (Attachment Unit Inter-
|
||||
face) female connector, specified by IEEE-802.3.
|
||||
& EVALUATION BOARDS
|
||||
Demo board 1, Multibus Ethernet!
|
||||
AMD IEEE·802,3 (ETHERNET/CHEAPERNET)
|
||||
Cheapernet board
|
||||
DEMO BOARDS AND SOFTWARE
|
||||
This is a stand-alone 80186 based board which requires
|
||||
AMD provides hardware and software support for the an RS-232 terminal and a Multibus chassis to operate. The
|
||||
Am7990 Family (Am7990/92B/96). The evaluation/demo Multibus chassis is used only as a source for power. This
|
||||
boards are available along with the LANCE/network diag- board integrates the Am7990 Family chipset (Am7990/
|
||||
nostic and network demonstrations software. 92B/96) along with some RAM, EPROM, and 2 communi-
|
||||
cation channels. In summary, the hardware components
|
||||
HARDWARE SUPPORT are as follows:
|
||||
|
||||
There are three different evaluation boards available as -8018610 MHz CPU
|
||||
follows: -64K byte SRAM (upgradable to 128K bytes)
|
||||
- 32K byte EPROM (upgradable to 64K bytes)
|
||||
Demo board 1. Multibus* Ethernet/Cheapernet board, - Two serial-port communication channels (via Am8530)
|
||||
stand-alone - Am7990n992Bn996
|
||||
Demo board 2. IBM* PC EthernetlCheapernet board - Supports both Ethernet and Cheapernet connection
|
||||
package - Optimum PC layout for the Am7996
|
||||
Demo board 3. Am7996 stand-alone evaluation board AMD will provide the hardware manual and schematic as
|
||||
There are software packages available which will run on part of this demo board package.
|
||||
Demo board 1 and 2. Demo board 3 can be used in con- *Multibus is a trademark of Intel Corporation. IBM is a reg-
|
||||
junction with Demo board 1 & 2, or any Ethernet controller istered trademark of International Business Machines.
|
||||
|
||||
|
||||
|
||||
|
||||
4
|
||||
Demo Board 1. Multibus Ethernetl Cheapernet Board
|
||||
|
||||
|
||||
Demo board 2. IBM PC EthernetlCheapernet PCturbo-186 board has a 50 pin connector which carries
|
||||
board package all the 80186 signals for external use. A daughter card can
|
||||
use the PCturbo-186 board as a node processor via the
|
||||
This is a two board solution . The first board is a 80186 IBM above mentioned connector. The AMD designed daughter
|
||||
PC plug-in board whose commercial purpose, as stand- card integrates the Am7990/92B/96, along with the glue
|
||||
alone, is to speed-up the application programs running in logic for interfacing to the 80186 connector.
|
||||
an IBM PC and to supp ly 16 bit bus memory for the
|
||||
Am7990 interface. This board has been developed by Or- AMD will provide the hardware schematic of the daughter
|
||||
chid Technology and is known as PCturbo-186. The card only. Any inquiry to the PCturbo-186 board schematic
|
||||
should be directed to Orchid Technology.
|
||||
|
||||
|
||||
|
||||
|
||||
Demo Board 2. IBM PC Ethernetl Cheapernet Board
|
||||
|
||||
|
||||
|
||||
|
||||
5
|
||||
Demo board 3. Am7996 Stand-Alone 1. Demo board 1 & 2 software
|
||||
Evaluation Board (LANCE Debug Monitor)
|
||||
This is a 3 x 3 inch stand-alone evaluation board which This software package is an educational tool for both
|
||||
integrates the IEEE-802.3 transceiver, Am7996 along with hardware and software engineers to learn about AMD 's
|
||||
external components and a DC-DC converter. The board Ethernet chipset. It also gives an inside look to the opera-
|
||||
interfaces to an Ethernet controller (Demo boards 1,2 or tion of the LANCE (Am7990) and its companion parts, the
|
||||
equivalent) via a 15-pin connector. It also interfaces to the Am7992 and Am7996. This software is useful for creating
|
||||
coax cable, a terminated RG 58 (NU or C/U) cable seg- different boundary conditions and serves as a tool for
|
||||
ments, via a BNC connector for communicating with other observing different signals in a controlled environment with
|
||||
nodes in the network. This board utilizes an optimized PC scope loop capability.
|
||||
layout for the Am7996. This board is recommended as a learning tool in the initial
|
||||
stage of design development. The software will also be
|
||||
SOFTWARE SUPPORT useful for correlation in duplicating the user's system envi-
|
||||
The following outlines the· purpose of each software pack- ronment. One Demo board is sufficient at initial stage
|
||||
age so that the user can get the board and software pack- when using this software for learning about the chipset and
|
||||
age which suits his application. exercising some limited functions (accessing the LANCE
|
||||
|
||||
|
||||
|
||||
|
||||
Demo Board 3. Am7996 Stand-Alone Evaluation Board
|
||||
|
||||
|
||||
|
||||
|
||||
6
|
||||
IBM PC Ethernet/Cheapernet Board Package
|
||||
|
||||
• Coax Tee Connector
|
||||
• son Coax Terminator
|
||||
(2 each)
|
||||
|
||||
up to 185 meters
|
||||
(600 feet)
|
||||
of Cheapernet Cable
|
||||
(RG58 AlU, C/U)
|
||||
|
||||
|
||||
|
||||
|
||||
PC-turbo
|
||||
'-----186 cards
|
||||
AUI
|
||||
• APP2005Rev.1 Cable
|
||||
|
||||
''User Supplied Ethernet Connection"
|
||||
|
||||
|
||||
08496A-2
|
||||
Figure 2.
|
||||
|
||||
|
||||
|
||||
registers, initialization, transmit, internal/external loopback - LANCE data structure construction
|
||||
test, etc). Having two boards on hand will provide addi- - Routines to show how to implement the LANCE's
|
||||
tional testing of the chipset in a network environment. This initialization block
|
||||
board can also be used for monitoring the network and - Accessing the LANCE registers
|
||||
gathering statistics. - Setup procedures for transmit & receive
|
||||
- Test: internal/external loopback test, CSRO - CSR3 test
|
||||
Some of those statistics are as follows: - Batch executable capability to ease user's interface for
|
||||
- No. of received packets specific sequence of command executions.
|
||||
- No. of transmitted packets - User's specific program execution residing in SRAM
|
||||
- No. of receive errors (e.g., CRC, frame, overflow, etc.) - Fill/Set memory
|
||||
- No. of transmit errors (e.g., Late collision, underflow, - Echo test: Echo packets between two nodes in the
|
||||
etc.) network.
|
||||
- No. of fatal errors (e.g., Missed packets, memory Keeps track of sequence number of trans-
|
||||
timeout error, etc.) mitted and received packets.
|
||||
- Network traffic - Software control switches:
|
||||
(measuring the rate of collision occurrence in network) - Speed up/slow down transmit packets
|
||||
- Speed up/slow down the LANCE polling time
|
||||
This software package has been structured as a command
|
||||
- Enable/disable transmitter or receiver
|
||||
level driver software. The user can get the list of com-
|
||||
- Enable/disable CRC generator
|
||||
mands via the "HELP" command. The following is a brief
|
||||
- Enable/disable output to monitor screen
|
||||
summary of the functions under user control:
|
||||
- Stop/continue on transmit errors
|
||||
- Driver: Implementing the low level data packet on cap- - Stop/continue on receive errors
|
||||
sulation and decapsulation of the data link. - Loop on command (scope loop)
|
||||
|
||||
|
||||
|
||||
|
||||
7
|
||||
- Display commands: CONFIGURE: Set up general parameters (e.g.,
|
||||
- Display Transmit ring buffers) in the Data-Link system
|
||||
- Display Receive ring for the purposes of network
|
||||
- Display the LANCE Initialization block management.
|
||||
- Display node status IA SETUP: Establish the node's physical net-
|
||||
- Display the LANCE registers (CSRs) work address.
|
||||
- Display memory
|
||||
MC ADD: Add a multicast address for the
|
||||
There is a user manual which is the specification for this node to the LANCE's Logical Ad-
|
||||
software package and Demo board 1 hardware spec. This
|
||||
dress Filter.
|
||||
software package is included in EPROM in Demo board 1
|
||||
and is available on diskette for Demo board 2. MC REMOVE: Remove a multicast address.
|
||||
• The protocol defined for communicating these com-
|
||||
2. Demo board 2 Software mands from Client to Data Link provides for the
|
||||
(Data Link Layer Software) possibilities of:
|
||||
|
||||
Ethernet Data-Link Software for the Am7990T PCturbo- - Multiple requests (Client processes).
|
||||
186 Evaluation Board -Individual command status and error reporting.
|
||||
• The combination of an AMD Ethernet Daughter Card - Indirect control management via Request and Base
|
||||
and an Orchid PCturbo-186 expansion board for an COntrol Blocks shared between the client and Data-
|
||||
IBM PC can, with this Data-Link software, create an Link processes.
|
||||
EthernetlCheapernet node in an IBM PC or compatible. - Two mediating routines: the Host Message-Delivery
|
||||
The combination is referred to as the Am7990T Evalua- Mechanism (HMDM); and the Data-Link Message-
|
||||
tion board. Delivery Mechanism (DLMDM)-the HMDM provides
|
||||
• The software is structured to provide Data-Link services control access for the Client, while DLMDM does so
|
||||
to a Client Layer corresponding to ISO Network and for the Data-Link itself.
|
||||
higher layers. It is written in C and its source code is • In normal use, the CONFIGURE command first sets up
|
||||
included with the Am7990T and Am7990 (Multibus) the LANCE and associated Data-Link parameters.
|
||||
Evaluation Boards to serve as an example of Physical Then a Client process establishes its LSAP and form-
|
||||
and Data-Link Layer implementations for LANCE-based ulates a REQUEST BLOCK to perform actual transmis-
|
||||
Ethernet systems. The software offers: sion of a packet. This is all done by calling HMDM from
|
||||
- Message-transfer and delivery for the Client Layer the Client with an associated REQUEST BLOCK
|
||||
via Data Link service calls (CONNECT, DISCON- containing the necessary command code, parameters
|
||||
NECT, TRANSMIT, etc.) for more than one client and addresses. As currently defined, the software is not
|
||||
process at a time. multiprocess, so pOlling for status (e.g., received pack-
|
||||
ets) is used.
|
||||
- Example Physical and Data-Link Layer procedures
|
||||
for LANCE initialization, memory management, error
|
||||
handling and Client servicing. 3. LANCE Diagnostic Software
|
||||
• The 9 Data-Link Services provided are: (not related to any of the DEMO boards)
|
||||
CONNECT: Set up a pairing between a Client The LANCE Diagnostic program has been ported to
|
||||
process and a unique Data-Link an IBM-XT and compiled with the Lattice C Compiler.
|
||||
Service-Access-Point identifier This program is menu driven and is comprised of six
|
||||
(LSAP). major tests with increasing complexity. The code is
|
||||
DISCONNECT: Remove a CONNECTion to an available in C source code on 3 IBM PC diskettes and
|
||||
LSAP. is well documented and very readable. It consists of the
|
||||
following modes.
|
||||
TRANSMIT: Send a designated set of packet
|
||||
buffers to a destination (DLSAP). Note: Only the first four items in the following list have
|
||||
This is implemented as a Datagram been checked out-other items have not been
|
||||
service, not a guaranteed, virtual- checked for errors.
|
||||
circuit service. Such reliable serv- LANCE The user-interface control program. It
|
||||
ices would have to be implemented provides menu-driven options and er-
|
||||
at the Client Layer. ror reporting.
|
||||
POST RPD: Post a Receive Packet Descriptor CSRTST A test program for verifying that
|
||||
and up to 4 packet buffers for the LANCE control and status registers
|
||||
Data Link to use when receiving can be read or write and bits can be
|
||||
packets for the calling process set or reset according to specs.
|
||||
LSAP. INITTST A test program to verify the correct ini-
|
||||
POST RBD: Post an additional packet buffer for tialization and correct status reporting
|
||||
the caller's LSAP.. of the LANCE.
|
||||
|
||||
|
||||
|
||||
|
||||
8
|
||||
INTLOOP Internal loop test to verify packet AVAILABILITY
|
||||
transmission/reception, chaining, and
|
||||
- Board Purchase Contact your local AMD Sales
|
||||
CRCs. It also verifies promiscuous, - Board Artwork/Films office for availability and/or
|
||||
normal and collision-test modes. pricing.
|
||||
- Ethernet Software
|
||||
EXTLOOP - Verifies that packets can go out on the
|
||||
Ethernet cable and be received in both ETHERNET PROTOCOL SUPPORT
|
||||
the promiscuous and normal mode. It (TRANSPORT LAYER)
|
||||
also verifies disabling of the receiver or
|
||||
transmitter. Contact your local AMD Sales Office for current
|
||||
arrangements.
|
||||
ETHERTST - Allows the user to configure the size of
|
||||
ring buffers and transmit packets, it The following software firm has Transport layer soft-
|
||||
then transmits packets and accumu- ware available:
|
||||
lates statistics on number of trans- SYROS
|
||||
missions, receptions, and errors on an 2810 South Evergreen
|
||||
individual basis. Tempe, AZ 85282
|
||||
ECHO When executed on a second LANCE (602) 897-2399
|
||||
board it switches source and destina-
|
||||
tion addresses and retransmits any III. MISCELLANEOUS COMPONENTS
|
||||
packets received. It also accumulates SOURCES & CONTACTS
|
||||
statistics. A) DC-DC Power Converters
|
||||
UTILS A set of general purpose utility mod- Partial List-Can use any equivalent IEEE 802.3
|
||||
ules that build initialization blocks, (10Base5, 10Base2) Compatible
|
||||
build ring buffers, calculate or verify Power Transformer.
|
||||
CRCs, and reads or writes CSR regis-
|
||||
ters (5600 bytes). Manufacturer Ordering Part No,
|
||||
|
||||
DEF Definitions of structures for initblock, Pulse Engineering PE64430 (Ethernet)
|
||||
ring buffers, etc. P. O. Box 12235
|
||||
San Diego, CA 92112 PE64381 (Cheapernet)
|
||||
BUFFER Allocate RAM space. Tel. (619) 268-2400
|
||||
SYSTEM Character read/write routine, interrupt Reliability Inc. 2E12R9 (Ethernet)
|
||||
handler in 8086 assembly language P. O. Box 218370
|
||||
(only 144 bytes of code). Houston, TX 77218 2VP5U9 (Cheapernet)
|
||||
The last 4 modules described above are modules for Tel. (713) 492-0550
|
||||
writing code for the LANCE. They can easily be studied TWX 910-881-1739
|
||||
and understood. The .DOC file on the diskette provides B) Isolation Coupling Transformers
|
||||
additional comments on programming techniques for
|
||||
the LANCE and also for porting this code to another Partial list-Can use any equivalent IEEE 802.3
|
||||
hardware configuration. (10Base5, 10BASE2) compatible Iso-
|
||||
lation Transformers.
|
||||
The code for the test modules show how to call the
|
||||
various utility functions to incorporate them into another Manufacturer Ordering Part No.
|
||||
program. Studying CSRTST & INITTST in conjuction Pulse Engineering 64102 or 64107
|
||||
with UTILs, DEF and 10 will give the programmer a P.O. Box 12235
|
||||
good insight into the entire program. San Diego, CA 92112
|
||||
Embedded into the code are many compiler conditional Tel. (619) 268-2400
|
||||
print statements that trace the execution of the pro- C) 20MHz Fundamental Mode Crystal
|
||||
gram. These are very useful for debugging; however, Partial list-Can use any equivalent crystal to the
|
||||
they have a penalty of using more RAM space. The specifications listed in the Am7992B
|
||||
following is a tabulation of memory utilization. Data Sheet (page 4).
|
||||
Code space without ETHERTST & ECHO 21 K bytes Manufacturer Ordering Part No.
|
||||
Entire Code Space 26K bytes
|
||||
Code Space with Debug Trace 40K bytes Reeves-Hoffman 04-20423-312
|
||||
RAM Space Max 16K bytes 400 W. North Street
|
||||
RAM Space w/o ETHERTST & ECHO 6K bytes Carlisle, PA 17013
|
||||
(717) 243-5929
|
||||
This code space will vary depending upon the C com-
|
||||
piler used. AMD does not manufacture or sell any of the above
|
||||
There is a user manual which is the specification for items. Interested customers should call the manufac-
|
||||
this software package which is available in C source turer directly for the location of the nearest representa-
|
||||
code on 3 IBM PC diskett9S. tives.
|
||||
|
||||
|
||||
|
||||
|
||||
9
|
||||
IV. DESIGN CONSIDERATIONS to ICRS go inactive (end of packet
|
||||
receive) for the 82586.
|
||||
Interfacing the Am7992B to Intel's 82586 • AX is resynchronized with RCLK to become
|
||||
Ethernet Controller RXD
|
||||
The AMD and Intel's Ethernet Controllers Serial Link in- • RENA is inverted and delayed for ICRS. A load
|
||||
terfaces are functionally similar. The interfacing glue logic capacitance is added to increase the mini-
|
||||
for the Am7992B and the 82586 shown here accom- mum delay of the SIA's RENA with
|
||||
modates the active voltage levels, set-up and hold timing respect to the last data bit.
|
||||
requirement of the two devices.
|
||||
• CLSN is inverted for ICDT and also enables the
|
||||
- Transmit Circuit: 82586 --> Am7992B ICRS. Intel's 586 requires ICRS active
|
||||
with ICDT.
|
||||
• IRTS is inverted for TENA • Modified RCLK (M-RCLK) is used to reassert
|
||||
RENA asynchronously as required by the
|
||||
• TXD is acceptable for TX
|
||||
82586 at the end of packet. Start of
|
||||
• /TXC requires continuous clock; therefore, SIA's packet synchronization has no problem.
|
||||
/TEST pin is grounded.
|
||||
• CLSN active or RENA inactive disable Receive
|
||||
path to RXD.
|
||||
- Receive Circuit: Am7992B --> 82586
|
||||
Note: The inverters must have fast and symmetrical rise
|
||||
• RCLK is inverted twice to reduce skew and to
|
||||
and fall time. The Am2965 meets these require-
|
||||
ensure the required delay of 10 to 40ns
|
||||
ments and outputs MOS compatible logic levels.
|
||||
from the time of IRXC goes inactive (high)
|
||||
|
||||
|
||||
|
||||
|
||||
82586 and Am7992B Interface
|
||||
VCC
|
||||
82586 Am7992B
|
||||
680pF
|
||||
TXC~6---------------------o~------~1"11 TCLK
|
||||
RTS 28 12 TENA XMT_t-1:.;:3:.-_ _ _ _ __
|
||||
X1 8
|
||||
TXD 27 ~o TX
|
||||
9 Cl20MHz
|
||||
SIA X2:~~---~~~~
|
||||
|
||||
RXC:~2~3~----~M=-~R~C~L~K~----~~~~~--~4 RCLK COL 24 40.2
|
||||
|
||||
|
||||
3 RENA COL~2~3~~~~
|
||||
t-t---t--4
|
||||
29 C'i'S
|
||||
S74
|
||||
RX 22
|
||||
L-+-O<:.l-f-o<:.t-+t Q CLK
|
||||
r----+-~2~RX RXJ--21--~~~
|
||||
CDT 30 .---+--,-!CLSN VCC
|
||||
S74
|
||||
'---il---~U-----t Q CLK
|
||||
6 GND1 F
|
||||
7 GND2 5.0jlF
|
||||
|
||||
GND3~-------t
|
||||
Inverters: Am2965 (one package) '---------
|
||||
or: 74AS04 (two packages) DTE Ground
|
||||
F/F: 74S74 (one package)
|
||||
|
||||
Figure 3. 08496A-3
|
||||
|
||||
|
||||
|
||||
|
||||
10
|
||||
v. ETHERNET TRAINING COURSES • Standards
|
||||
The ISO 7-Layer Network Model-Physical through Ap-
|
||||
EDUCATIONAL SUPPORT plication Layers.
|
||||
1. E7900B Understanding and The IEEE 802 Series-CSMA/CD bus (Ethernetl
|
||||
Implementing Local Networks Cheapernet), token ring (IBM), token bus (MAP).
|
||||
The CCITT X.25 Standard, HDLC, LAP and their rela-
|
||||
This 2-day lecture and laboratory course covers the
|
||||
AMD EthernetlCheapernet family as well as devices tionship.
|
||||
(Am7960, Am7968/9, etc.) useful in implementing other Protocols for implementing services, flow control, error
|
||||
forms of computer networks. A companion course, handling and reliability.
|
||||
E7900A, covers AMD devices more oriented toward the • General AMD Network Devices
|
||||
telecommunications market (PABX, ISDN, etc.). Both
|
||||
Am7960, Coded Data Transceiver (CDT) and Am8530
|
||||
classes are scheduled throughout the year or, on spe-
|
||||
cial request, at customer sites. Serial Communications Controller (SCC)-applications
|
||||
to .5-3Mb/s LANs.
|
||||
E7900B introduces those unfamiliar with networks to
|
||||
Am7968/69, Transparent, Asynchronous Transceivers
|
||||
the basic concepts and historical developments that
|
||||
(TAXI)-high-speed, intrasystem communications and
|
||||
have led to the various types of computer networks now
|
||||
bus-width conversion.
|
||||
available (Ethernet, Starlan, etc.). This allows the stu-
|
||||
dent to understand the reasons why different network • AMD Ethernet Devices
|
||||
forms can exist and where each has merit in particular Ethernet structure and review of IEEE 802 Definitions
|
||||
applications. for the Physical and Data-Link Layers.
|
||||
The class then explains international standards (ISO), The AMD Ethernet Family:
|
||||
completed or now in progress, that are relevant to AMD - Am7996, Transceiver (XCVR)
|
||||
products now available (Ethernet, etc.) or soon to be - Am7992B, Serial Interface Adaptor (SIA)
|
||||
available (Starlan, FDDI, etc.). Generally related - Am7990, Local Area Network Controller (LANCE)
|
||||
devices (encryption, data compression, etc.) are out-
|
||||
lined to provide an overall system-application view. This Connection, timing, memory organization and program-
|
||||
constitutes the class' first day. ming details for Ethernet and Cheapernet applications.
|
||||
|
||||
The second day covers the AMD Am7900 Family in • AMD Network Hardware/Software Support
|
||||
detail, including work with the Am7990 Ether- Evaluation Boards-the stand-alone Am7990 Multibus
|
||||
net/Cheapernet evaluation board. Programming and Evaluation Board, including laboratory exercise in pro-
|
||||
application details are discussed, from the bit level to gramming the LANCE and monitoring the LAN; the
|
||||
typical Data-Link Layer software, as used in the Am7990 IBM PC Demonstration board and its services
|
||||
Am7990T, PC-Turbo Evaluation Board. (file transfer, etc.).
|
||||
Example Data-Link Layer software used in the PC host
|
||||
Course Outline for the Am7990 IBM PC demo board-defining Service
|
||||
Access points, packet buffers and other memory
|
||||
structures.
|
||||
• Introduction
|
||||
Purposes, economics and history of networks-
|
||||
ARPANET, Ethernet and the development of commer-
|
||||
cial networks, standards and services.
|
||||
• Network Structures
|
||||
Inquiries regarding AMD's Educational Support pro-
|
||||
Topologies and Media-Bus, Star, Ring, Tree; guidedl gram should be directed as follows:
|
||||
unguided radio/light.
|
||||
Advanced Micro Devices, Inc.
|
||||
Services, Access Methods and Performance- Pack- Customer Education Center
|
||||
etization, virtual circuits, datagrams and other services; P.O. Box 3453 MIS 71
|
||||
slotting, CSMAlCD, token passing; stability and com- Sunnyvale, CA 94088
|
||||
parative performance under load. (408) 749-3665
|
||||
Internetwork Connections-gateways, routing, flow or
|
||||
control and error handling. (800)538-8450 x3665
|
||||
|
||||
|
||||
|
||||
|
||||
11
|
||||
ADVANCED MICRO DEVICES
|
||||
DOMESTIC SALES OFFICES
|
||||
ALABAMA .............................. (205) 882-9122 MASSACHUSETTS .................... . (617j273-3970
|
||||
ARIZONA, MINNESOTA .......................... . (612 938-0001
|
||||
Tempe ............................... (602) 242-4400 NEW JERSEY ......................... . (201) 299-0002
|
||||
Tucson ............................... (602) 792-1200 NEW YORK,
|
||||
CALIFORNIA, Liverpool ............................ . (315) 457-5400
|
||||
EI Segundo ......................... . (213) 640-3210 Poughkeepsie (IBM only) ............. . 9141471-8180
|
||||
Newport Beach ...................... . (714) 752-6262 Woodbury ........................... . 516 364-8020
|
||||
San Diego .......................... . (619) 560-7030 NORTH CAROLINA .................... . 1919 847-8471
|
||||
Sunnyvale ........................... . (408) 720-8811 OREGON ............................. . 503 245-0080
|
||||
Woodland Hills ....................... . (818) 992-4155 OHIO,
|
||||
COLORADO ........................... . (303) 741-2900 Columbus ........................... . (614) 891-6455
|
||||
CONNECTICUT ....................... . (203) 264-7800 PENNSYLVANIA,
|
||||
FLORIDA, Allentown (AT&T only) ................ . (215) 398-8006
|
||||
Altamonte Springs ................... . (305) 339-5022 Willow Grove ........................ . (215) 657-3101
|
||||
|
||||
!
|
||||
Clearwater .............•............. 813! 530-9971
|
||||
Ft Lauderdale ....................... . 305 484-8600
|
||||
Melbourne ........................... . 305 729-0496
|
||||
GEORGIA ............................. . (404) 449-7920
|
||||
PUERTO RICO ........................ .
|
||||
TEXAS,
|
||||
Austin .............................. .
|
||||
Dallas .............................. .
|
||||
(809) 764-4524
|
||||
|
||||
(512) 346-7830
|
||||
(214) 934-9099
|
||||
ILLINOiS .............................. . (312) 773-4422 Houston ............................. . (713) 785-9001
|
||||
INDIANA .............................. . (317) 244-7207 WASHINGTON .................... '.' .. . (206) 455-3600
|
||||
KANSAS .............................. . (913) 451-3115 WISCONSIN .................... , ..... . (414) 782-7748
|
||||
MARYLAND ........................... . (301) 796-9310
|
||||
|
||||
INTERNATIONAL SALES OFFICES
|
||||
BELGIUM,
|
||||
Bruxelles ...................... TEL: . (02) 771 99 93 HONG KONG,
|
||||
FAX: .. (02) 762-3716 Kowloon ................ TEL: ............. 3-695377
|
||||
TLX: ......... 61028 FAX: .............. 1234276
|
||||
CANADA, Ontario, TLX: ................ 50426
|
||||
Kanata ........................ TEL: . (613) 592-0090 ITALY, Milano .............. TEL: .......... (02j3390541
|
||||
Willowdale ..................... TEL: . (416) 224-5193 FAX: . . . . . . . . .. (02 3498000
|
||||
FAX: . (416) 224-0056 TLX: ............... 315286
|
||||
FRANCE, JAPAN, Tokyo ............. TEL: ......... (03) 345-8241
|
||||
Paris .......................... TEL: (01) 45 60 00 55 FAX: .............. 3425196
|
||||
FAX: (01) 468621 85 TLX: ..... J24064AMDTKOJ
|
||||
TLX: ....... 202053F LATIN AMERICA,
|
||||
GERMANY, Ft. Lauderdale ... . . . . . . .. TEL: ........ (305) 484-8600
|
||||
Hannover area ................. TEL: " (05143) 50 55 FAX: ........ (305) 485-9736
|
||||
FAX: .. (05143) 55 53 TLX: .. 5109554261 AMDFTL
|
||||
TLX: ........ 925287 SWEDEN, Stockholm ...... TEL: ........ (08) 733 03 50
|
||||
MOnchen ...................... TEL: .. (089) 41 14-0 FAX: ........ (08) 733 22 85
|
||||
FAX: ... (089) 406490 TLX: ................ 11602
|
||||
TLX: ........ 523883 UNITED KINGDOM,
|
||||
Stuttgart ....................... TEL: Manchester area ......... TEL: ........ (0925) 828008
|
||||
(0711) 623377 FAX: ........ (0925) 827693
|
||||
FAX: .. (0711) 625187 TLX: ............... 628524
|
||||
TLX: ........ 721882 London area ............ TEL: ........ (04862) 22121
|
||||
FAX: ........ (04862) 22179
|
||||
TLX: ............... 859103
|
||||
|
||||
NORTH AMERICAN REPRESENTATIVES
|
||||
CALIFORNIA NEW MEXICO
|
||||
12 INC .......................... OEM (408l988-3400 THORSON DESERT STATES .......... (505) 293-8555
|
||||
DISTI (408 496-6868 NEW YORK
|
||||
IDAHO NYCOM, INC . . . . . . . . . . . . . . . . . . . . . . . .. (315) 437-8343
|
||||
INTERMOUNTAIN TECH MKGT .... . . .. (208) 888-6071 OHIO
|
||||
INDIANA Dayton
|
||||
SAl MARKETING CORP ............... (317) 241-9276 DOLFUSS ROOT & CO ............... (513) 433-6776
|
||||
IOWA Strongsville
|
||||
LORENZ SALES ...................... (319) 377-4666 DOLFUSS ROOT & CO ............... (216) 238-0300
|
||||
MICHIGAN PENNSYLVANIA
|
||||
SAl MARKETING CORP ............... (313) 227-1786 DOLFUSS ROOT & CO ............... (412) 221-4420
|
||||
NEBRASKA UTAH
|
||||
LORENZ SALES. . . . . . . . . . . . . . . . . . . . .. (402) 475-4660 R2 MARKETING ...................... (801) 595-0631
|
||||
Advanced Micro Devices reserves the right to make changes in its product without notice in order to improve design or performance
|
||||
characteristics. The performance characteristics listed in this document are guaranteed by specific tests, guard banding, design and
|
||||
other practices common to the industry. For specific testing details, contact your local AMD sales representative. The company
|
||||
assumes no responsibility for the use of any circuits described herein.
|
||||
|
||||
~ ADVANCED MICRO DEVICES 901 Thompson PI., P.O. Box 3453, Sunnyvale, CA 94088, USA © 1986 Advanced Micro Devices, Inc.
|
||||
. . ~ TEL: (408) 732-2400 • TWX: 910-339-9280 • TELEX: 34-6306 • TOLL FREE: (800) 5388450 Printed in U.S.A. CBM-WCP-10M-8/86-0
|
||||
|
||||
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|
||||
|
||||
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|
||||
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|
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|
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|
||||
|
||||
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|
||||
# LANCE datasheets (Am7990 / Am79C90)
|
||||
|
||||
Downloaded 2026-10-16 for the "loopback FCS" question
|
||||
(`../lance-loopback-fcs.md`). Originals are preserved unmodified; `*.txt` are
|
||||
`pdftotext -layout` extractions made here. Nothing was edited.
|
||||
|
||||
| file | source | notes |
|
||||
|---|---|---|
|
||||
| `Am7990-TechnicalManual-1986.pdf` | bitsavers `components/amd/Am7990/1986_Am7990_Local_Area_Network_Controller_LANCE_Technical_Manual.pdf` | **primary**. Searchable text. §1.9.3 mode register (DTCR p. 1-24), §1.8.3 CRC (p. 1-12), §4.3.3 (p. 4-4). |
|
||||
| `Am7990-ReferenceGuide-Aug1986.pdf` | bitsavers `components/amd/Am7990/08496A_Am7990_Reference_Guide_Aug1986.pdf` | supporting; no DTCR/LOOP detail beyond the above. |
|
||||
| `Am79C90-bitsavers.pdf` | bitsavers `components/amd/Am7990/Am79c90.pdf` | **primary** for the C-LANCE. DTCR bit p. 24, CRC requirements p. 35. Searchable text. |
|
||||
| `Am79C90-theretroweb.pdf` | theretroweb `chip/documentation/am79c90-66f085c9c1098806690232.pdf` | independent copy of the same datasheet; same page mapping. |
|
||||
| `Am7990-bitsavers.pdf` | bitsavers `components/amd/Am7990/Am7990.pdf` | standalone datasheet **scan without OCR** (0 bytes of text). Kept for completeness. |
|
||||
| `Am7990-ardent.pdf` | `ardent-tool.com/datasheets/AMD_Am7990.pdf` | alternative standalone datasheet **scan without OCR**. |
|
||||
|
||||
`*.txt` are the extractions of the two searchable PDFs.
|
||||
|
||||
## SHA-256
|
||||
|
||||
```
|
||||
bef9659c8c7fcae50630ea779616b01c6b34147125e3a6239300d18409c0d45b Am7990-ardent.pdf
|
||||
c625457bce8c6b88edba18cc131279730e32d10359dbc3c242a687263b4b1857 Am7990-bitsavers.pdf
|
||||
d3dfb8a675370068397cc233420db01d0a80e4e5545d6d4eb580e5a218c6455c Am7990-ReferenceGuide-Aug1986.pdf
|
||||
01be92c5c7a9e90b8319f46f9fed52b446a2676e9b1c362d10e4214b8f9cef72 Am7990-TechnicalManual-1986.pdf
|
||||
1dbd36baa54ccea3efde4ef8cddb320d07ed84760b4cc547ef804ffe03a76f40 Am79C90-bitsavers.pdf
|
||||
dd54b5a71cfe59e8ebebcd274b0f06c14ac7591183409f775b356a44bd8fd370 Am79C90-theretroweb.pdf
|
||||
```
|
||||
|
||||
## Key locations (printed page / PDF page)
|
||||
|
||||
Am7990 Technical Manual 1986:
|
||||
* Mode register, bit `03 DTCR` / bit `02 LOOP` — printed **1-24**, PDF p. 31
|
||||
* `CYCLIC REDUNDANCY CHECK (CRC)` four requirements — printed **1-12**, PDF p. 19
|
||||
* `4.3.3 CRC GENERATOR/CHECKER LOGIC TEST` — printed **4-4**, PDF p. 51
|
||||
|
||||
Am79C90 datasheet:
|
||||
* Mode register, bit `03 DTCR` — printed **24**, PDF p. 24
|
||||
* `Cyclic Redundancy Check (CRC)` four requirements — printed **35**, PDF p. 35
|
||||
@@ -0,0 +1,310 @@
|
||||
# LANCE loopback FCS: is MAME's `MODE_DTCR` term inverted?
|
||||
|
||||
Date: 2026-10-16. Investigation only. ROM `vt1200_v22.bin` md5
|
||||
`b46a3e442ccb86134d2356bd70d22fd2` (untouched). Nothing in the MAME tree or in
|
||||
`harness/mame/` was changed. Datasheets downloaded to
|
||||
`reference/lance-datasheet/` (originals + `pdftotext` extractions).
|
||||
|
||||
## Verdict (short)
|
||||
|
||||
**MAME is right. The condition is NOT inverted.**
|
||||
|
||||
`src/devices/machine/am79c90.cpp:263`
|
||||
|
||||
```c
|
||||
if (!(m_mode & MODE_LOOP) || (m_mode & MODE_DTCR))
|
||||
```
|
||||
|
||||
is a byte-for-byte implementation of what both the Am7990 and the Am79C90
|
||||
datasheets say. The reason it "reads" as inverted is that the CRC generator and
|
||||
the CRC checker are **one shared circuit**, so the receiver can only check the CRC
|
||||
when the transmitter is **not** using the generator — i.e. exactly when `DTCR = 1`.
|
||||
The proposed "fix" (`(m_mode & MODE_DTCR)` → `!(m_mode & MODE_DTCR)`) would be
|
||||
wrong in **both** loopback cases.
|
||||
|
||||
The `LANCE_REPORT.md` §5 diagnosis is a misreading of the hardware. See
|
||||
[Consequence for the VT1200](#consequence-for-the-vt1200) below.
|
||||
|
||||
---
|
||||
|
||||
## The two parts, and whether they differ
|
||||
|
||||
| part | document used | loopback-CRC rule |
|
||||
|---|---|---|
|
||||
| **Am7990** LANCE | Am7990 Technical Manual, Aug 1986 | "no CRC check ... since the CRC logic is shared"; with DTCR=1 the receiver checks |
|
||||
| **Am79C90** C-LANCE | Am79C90 datasheet | identical wording |
|
||||
|
||||
They do **not** differ on this question. They differ in one other place only:
|
||||
the C-LANCE adds the `ADD_FCS` bit (TMD1 bit 13) that can override `DTCR=1` on a
|
||||
per-packet basis ("The ADD_FCS bit (bit 13, TMD1) can be used to override a
|
||||
DTCR=1 setting on a per packet basis."). MAME already gates that on
|
||||
`type() == AM79C90` (`transmit()`). The unsettled Am7990-vs-Am79C90 question does
|
||||
**not** affect the loopback-FCS verdict. (Neither part is settled for the VT1200;
|
||||
that is out of scope here.)
|
||||
|
||||
---
|
||||
|
||||
## The decisive quotes
|
||||
|
||||
### Am7990 Technical Manual (1986), Mode register, printed p. 1-24 (PDF p. 31)
|
||||
|
||||
> **03 DTCR** DISABLE TRANSMIT CRC. When DTCR = 0, the transmitter generates and
|
||||
> appends a CRC to the transmitted packet. When DTCR = 1, the CRC logic is
|
||||
> allocated to the receiver and no CRC is generated or sent with the transmitted
|
||||
> packet.
|
||||
>
|
||||
> During loopback, DTCR = O will cause a CRC to be generated on the transmitted
|
||||
> packet, but **no CRC check is done by the receiver since the CRC logic is shared
|
||||
> and cannot generate and check CRC at the same time.** The generated CRC is
|
||||
> written into memory with the data and can be checked by the host software.
|
||||
>
|
||||
> **If DTCR = 1 during loopback, the host software must append a CRC value to the
|
||||
> transmit data. The receiver checks the CRC on the received data and reports any
|
||||
> errors.** Since the CRC generator is used to generate the hash filter, the
|
||||
> multicast addressing cannot be used when DTCR = 1.
|
||||
|
||||
> **02 LOOP** LOOPBACK allows the LANCE to operate in full duplex mode for test
|
||||
> purposes. The packet size is 8-32 bytes. The received packet can be up to 36
|
||||
> bytes (32 + 4 bytes CRC) **when DTCR=O**. During loopback, the runt packet filter
|
||||
> is disabled because the packet is smaller than the minimum size Ethernet packet
|
||||
> (64 bytes).
|
||||
|
||||
### Am7990 Technical Manual (1986), §1.8.3 "CYCLIC REDUNDANCY CHECK (CRC)",
|
||||
printed p. 1-12 (PDF p. 19)
|
||||
|
||||
> The LANCE requirements for the CRC logic are:
|
||||
>
|
||||
> 1. **TRANSMISSION - Mode bit 2 (LOOP) = 0, Mode bit 3 (DTCR) = 0.** The LANCE
|
||||
> calculates the CRC from the first bit following the Start bit to the last bit
|
||||
> of the data field. The CRC value inverted is appended to the transmission in
|
||||
> one unbroken bit stream.
|
||||
> 2. **RECEPTION - Mode bit 2 (LOOP) = 0.** The LANCE performs a check on the input
|
||||
> bit stream from the first bit following the Start bit to the last bit in the
|
||||
> frame. The LANCE continually samples the state of the CRC check on framed byte
|
||||
> boundaries and, when the incoming bit stream stops, the last sample determines
|
||||
> the state of the CRC error. Framing error (FRAM) is not reported if there is
|
||||
> no CRC error.
|
||||
> 3. **LOOPBACK - Mode bit 2 (LOOP) = 1, Mode bit 3 (DTRC) = 0.** The LANCE generates
|
||||
> and appends the CRC value to the outgoing bit stream as in transmission but
|
||||
> **does not perform the CRC check of the incoming bit stream.**
|
||||
> 4. **LOOPBACK - Mode bit 2 (LOOP) = 1, Mode bit 3 (DTRC) = 1.** The LANCE
|
||||
> **performs the CRC check on the incoming bit stream as in reception** but does
|
||||
> not generate or append the CRC value to the outgoing bit stream during
|
||||
> transmission.
|
||||
|
||||
(Note the OCR/typo `DTRC` for `DTCR` in bullets 3–4; the bit is DTCR.)
|
||||
|
||||
And, from the LOOPBACK constraints (§1.8.3, item 4):
|
||||
|
||||
> CRC may be either generated and appended to the output serial bit stream or may
|
||||
> be checked on the input serial bit stream **but not both in the same
|
||||
> transaction.**
|
||||
|
||||
### Am7990 Technical Manual (1986), §4.3.3 "CRC GENERATOR/CHECKER LOGIC TEST",
|
||||
printed p. 4-4 (PDF p. 51)
|
||||
|
||||
> During the loopback test (internal or external), the CRC logic may be tested.
|
||||
> Since the LANCE operates in half-duplex mode, the CRC generator or checker must
|
||||
> be tested separately as follows. The Transmit CRC Generator is tested by
|
||||
> programming DTCR=O in the Mode Register. This enables the transmit CRC
|
||||
> generation and **disables the Receive CRC Checker.** ...
|
||||
>
|
||||
> The Receive CRC Checker is tested by setting the DTCR bit in the Mode Register.
|
||||
> The user then calculates the CRC for the test packet **and appends it to the end
|
||||
> of the test packet for transmission** (test packet max size= 32 + 4 bytes CRC).
|
||||
> The Receive CRC Checker checks the last four bytes of the packet for CRC error
|
||||
> and updates the receive descriptors accordingly.
|
||||
|
||||
### Am79C90 C-LANCE datasheet, Mode register bit 03 DTCR, printed p. 24 (PDF p. 24)
|
||||
|
||||
> **03 DTCR** DISABLE TRANSMIT CRC. When DTCR = 0, the transmitter will generate
|
||||
> and append a CRC to the transmitted packet. When DTCR = 1, the CRC logic is
|
||||
> allocated to the receiver and no CRC is generated and sent with the transmitted
|
||||
> packet. The ADD_FCS bit (bit 13, TMD1) can be used to override a DTCR=1 setting
|
||||
> on a per packet basis.
|
||||
>
|
||||
> During loopback, DTCR = 0 will cause a CRC to be generated on the transmitted
|
||||
> packet, but **no CRC check will be done by the receiver since the CRC logic is
|
||||
> shared and cannot generate and check CRC at the same time.** The generated CRC
|
||||
> will be written into memory with the data and can be checked by the host
|
||||
> software.
|
||||
>
|
||||
> **If DTCR = 1 during loopback, the host software must append a CRC value to the
|
||||
> transmit data. The receiver will check the CRC on the received data and report
|
||||
> any errors.**
|
||||
|
||||
### Am79C90 C-LANCE datasheet, "Cyclic Redundancy Check (CRC)", printed p. 35
|
||||
|
||||
> 2. **RECEPTION – MODE <02> LOOP = 0.** The C-LANCE performs a check on the input
|
||||
> bit stream from the first bit following the SFD to the last bit in the frame. ...
|
||||
> 3. **LOOPBACK – MODE <02> LOOP =1, MODE <03> DTRC = 0.** The C-LANCE generates and
|
||||
> appends the CRC value to the outgoing bit stream as in Transmission but **does
|
||||
> not perform the CRC check of the incoming bit stream.**
|
||||
> 4. **LOOPBACK – MODE <02> LOOP = 1 MODE <03> DTRC = 1.** C-LANCE **performs the CRC
|
||||
> check on the incoming bit stream as in Reception**, but does not generate or
|
||||
> append the CRC value to the outgoing bit stream during transmission.
|
||||
|
||||
> CRC may not be used for both transmission and reception simultaneously.
|
||||
|
||||
---
|
||||
|
||||
## Question 2 — does the receiver's CRC check apply to a frame that carries no FCS?
|
||||
|
||||
**The check is tied to the MODE bits, not to whether the frame's bytes happen to
|
||||
look like they end in an FCS.** The hardware has one shared CRC circuit, so the
|
||||
rule is purely `(LOOP, DTCR)`:
|
||||
|
||||
| LOOP | DTCR | chip checks RX FCS? | which datasheet bullet |
|
||||
|---|---|---|---|
|
||||
| 0 | 0 | **yes** | 2 (RECEPTION, `LOOP=0`) |
|
||||
| 0 | 1 | **yes** | 2 (RECEPTION, `LOOP=0`; DTCR only affects the transmitter) |
|
||||
| 1 | 0 | **no** | 3 (LOOPBACK, generator owns the shared circuit) |
|
||||
| 1 | 1 | **yes** | 4 (LOOPBACK, checker owns the shared circuit) |
|
||||
|
||||
In the one loopback case where the chip checks (`LOOP=1, DTCR=1`) the datasheet
|
||||
**requires the host to put the FCS there** ("the host software must append a CRC
|
||||
value to the transmit data"). So the chip is not "checking a frame with no FCS"
|
||||
by design — it is checking a frame the host was required to FCS-terminate. If the
|
||||
host breaks that contract, the chip reports a CRC error, correctly.
|
||||
|
||||
MAME's condition reproduces the table exactly:
|
||||
|
||||
| LOOP | DTCR | MAME `!(LOOP) \|\| DTCR` | chip (per datasheet) |
|
||||
|---|---|---|---|
|
||||
| 0 | 0 | check | check |
|
||||
| 0 | 1 | check | check |
|
||||
| 1 | 0 | skip | skip |
|
||||
| 1 | 1 | check | check |
|
||||
|
||||
MAME's FCS arithmetic was also checked independently. `FCS_RESIDUE = 0xdebb20e3`
|
||||
(`am79c90.h:50`) and `crc32_creator::simple()` is zlib's `crc32()` (init
|
||||
`0xffffffff`, final complement). Over a frame `M || FCS` with a correct
|
||||
little-endian FCS, zlib returns `0x2144df1c`, and `~0x2144df1c == 0xdebb20e3`.
|
||||
So `~crc != FCS_RESIDUE` **passes a correctly-terminated frame** and fails one
|
||||
that is not. There is nothing wrong with the arithmetic either.
|
||||
|
||||
---
|
||||
|
||||
## Question 3 — upstream MAME history
|
||||
|
||||
The shallow 0.289 checkout has no file history, so the history was read from the
|
||||
upstream GitHub repository (`mamedev/mame`).
|
||||
|
||||
* Condition **introduced** in `3349e3e990ab` (2018-11-22, *"am79c90: fixes
|
||||
(nw)"*): `!(LOOP) || !(INTL) || DTCR`.
|
||||
* **Changed** in `67f9c842e9f2` (2018-11-25, *"am79c90: many fixes (nw)"*), whose
|
||||
message says **"corrected internal loopback behaviour"**, to the current
|
||||
`!(LOOP) || DTCR`. The diff drops the `!(INTL)` term:
|
||||
|
||||
```diff
|
||||
- if (!(m_mode & MODE_LOOP) || !(m_mode & MODE_INTL) || (m_mode & MODE_DTCR))
|
||||
+ if (!(m_mode & MODE_LOOP) || (m_mode & MODE_DTCR))
|
||||
```
|
||||
|
||||
Dropping `!(INTL)` makes external loopback follow the same rule as internal
|
||||
loopback — which is what the datasheet bullets 3/4 describe (they are written
|
||||
for `LOOP`, not `INTL`). So the change moved MAME **toward** the datasheet, not
|
||||
away from it.
|
||||
|
||||
The commit message does not quote a datasheet, but the resulting term matches
|
||||
both datasheets exactly, so no further history is needed to accept it.
|
||||
|
||||
---
|
||||
|
||||
## Question 4 — verdict
|
||||
|
||||
**MAME is right; the check is not inverted.** No change is warranted.
|
||||
|
||||
The change proposed in `LANCE_REPORT.md` §5 —
|
||||
|
||||
```c
|
||||
// PROPOSED, DO NOT APPLY
|
||||
if (!(m_mode & MODE_LOOP) || !(m_mode & MODE_DTCR))
|
||||
```
|
||||
|
||||
— would be wrong in both loopback cases: it would **skip** the check for
|
||||
`LOOP=1, DTCR=1` (datasheet bullet 4: the chip checks) and **perform** it for
|
||||
`LOOP=1, DTCR=0` (datasheet bullet 3: the chip does not check).
|
||||
|
||||
**Revert note (if anyone applies that change anyway):** it contradicts the four
|
||||
`MODE`-bit CRC requirements quoted above from the Am7990 Technical Manual
|
||||
p. 1-12 and the Am79C90 datasheet p. 35, and it would make MAME's receiver
|
||||
diverge from the part in both loopback modes. Revert to
|
||||
`!(m_mode & MODE_LOOP) || (m_mode & MODE_DTCR)` and keep the citation.
|
||||
|
||||
---
|
||||
|
||||
## Question 6 — when is the check skipped in normal (non-loopback) receive?
|
||||
|
||||
**Never, on this chip.** Datasheet bullet 2 is `RECEPTION - Mode bit 2 (LOOP) = 0`
|
||||
with **no DTCR term**: outside loopback the receiver always runs the FCS check,
|
||||
and `DTCR` speaks only about the *transmitter*. The FCS's presence in a normal
|
||||
frame is the remote sender's business; the local `DTCR` bit says nothing about it.
|
||||
So `!(m_mode & MODE_LOOP)` (check whenever `LOOP=0`) is the correct half of the
|
||||
condition, and it must not be tightened to `!(LOOP) && !(DTCR)` or similar.
|
||||
|
||||
---
|
||||
|
||||
## Consequence for the VT1200
|
||||
|
||||
`harness/mame/LANCE_REPORT.md` §4.1 records the firmware's own `C - LANCE TEST`
|
||||
init block as:
|
||||
|
||||
```
|
||||
mode = 0x004C = MODE_LOOP | MODE_INTL | MODE_DTCR
|
||||
```
|
||||
|
||||
Per the datasheet, `LOOP=1, DTCR=1` is **bullet 4**: the receiver **does** check
|
||||
the FCS, and the host is **required** to append it. MAME therefore behaves like
|
||||
the part when it reports `RCV DESCR 1 = 0x4B00` (`ERR|CRC|STP|ENP`). The §5
|
||||
inference — "the real chip must not fail the receive CRC ... i.e. the check should
|
||||
be skipped whenever the frame carries no FCS" — does **not** follow from the
|
||||
hardware; it assumes the frame carries no FCS, which is exactly the contract the
|
||||
datasheet forbids when `DTCR=1`.
|
||||
|
||||
So the open question is really: **does the firmware's test frame carry a
|
||||
4-byte FCS or not?**
|
||||
|
||||
* If it does **not**, the real LANCE flags a CRC error too, the `C - LANCE TEST`
|
||||
fails on real hardware, and MAME is faithful (the failure is the test's, and a
|
||||
level-1/self-test failure is non-fatal, per `LEVEL1_CONTINUE_REPORT.md`).
|
||||
* If it **does**, then MAME's FCS arithmetic (verified above) should pass it, and
|
||||
any mismatch is a **different** MAME bug — not this condition — worth chasing
|
||||
separately.
|
||||
|
||||
`LANCE_REPORT.md` §5 assumed the first bullet ("DTCR means no FCS was appended")
|
||||
without checking whether the *firmware* appends one; the datasheet says the
|
||||
firmware is obliged to. That is the gap, and it is the thing to observe on the
|
||||
real machine.
|
||||
|
||||
### What the real machine would have to show to settle it
|
||||
|
||||
A boot does **not** settle it: a level-1/self-test failure is reported and the
|
||||
boot continues (`LEVEL1_CONTINUE_REPORT.md`, and `README.md` "How far the OS
|
||||
gets"), so "the terminal boots" proves nothing about the LANCE test.
|
||||
|
||||
To demonstrate it, read the **LANCE test's own result**, not the boot outcome:
|
||||
|
||||
1. **Run the terminal's on-board diagnostics and read the specific LANCE result**
|
||||
(the `C - LANCE TEST` / "Ethernet port (LANCE) test", error 24). A displayed
|
||||
**pass** means the loopback frame the chip received was FCS-terminated (the
|
||||
host appended it, as the datasheet requires) — which is consistent with the
|
||||
datasheet and with MAME being right, and would mean MAME's failure is a
|
||||
different bug. A displayed **CRC error** means MAME is not only right about the
|
||||
rule, it is faithful about this very test.
|
||||
2. **Stronger and independent of the firmware's verdict:** capture what the chip
|
||||
actually receives. Dump the transmit buffer the test builds (or watch the RX
|
||||
descriptor / bus on a real machine) and check for **4 trailing FCS bytes**. If
|
||||
present, the chip checks a terminated frame; if absent, the chip flags CRC.
|
||||
|
||||
Note: the task's premise "if it passes ... then the real chip does not reject a
|
||||
loopback frame that carries no FCS" is backwards for this part. The datasheet says
|
||||
the chip **does** check when `DTCR=1`; a real-hardware *pass* would therefore
|
||||
prove the frame **carries** an FCS, not that the check is disabled.
|
||||
|
||||
---
|
||||
|
||||
## Assets
|
||||
|
||||
Downloaded originals and extractions in `reference/lance-datasheet/` — see that
|
||||
directory's `README.md` for provenance and SHA-256 checksums.
|
||||
Reference in new issue
Block a user