docs: correct Q4 of the level-1 bypass analysis -- a level-1 failure is NOT fatal (superseded answer kept as record)

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SDD committed 2026-10-16 14:57:54 +03:00
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@@ -198,6 +198,32 @@ normally". Nothing stores P3.
## Q4. What does the failure actually gate?
> **CORRECTED 2026-10-16 — the answer below is WRONG.** Kept as the record of what
> we believed; the corrected account is `harness/mame/LEVEL1_CONTINUE_REPORT.md`.
>
> **A level-1 failure is NOT fatal.** The runner reports it and **continues**. The
> stub run (`VT1200_IO_PATH_STUB=1`) shows: `HOST PORT - 15` fails at frame 484 →
> a **finite** blink (`L3F208660`) → `TYPE 'GO' TO CONTINUE` at 1534 → continues →
> `PRINTER PORT - 16` fails at 1627 → blinks → continues at 2759 and **draws the X11
> weave** → then wedges at 2839, on a DUART1 *counter* interrupt storm.
>
> Measured: `0x3F204440`, `0x3F208060`, `0x3F208650` and the infinite blink
> `L3FDF1270` each fire **0 times in 20,000 frames**, and the runner never returns
> to the boot loop. The blink actually seen (`0x3F2088B0/…`) is inside the
> **finite** `L3F208660`.
>
> The real fatal route is `L3FDF1010 → L3FDF1270`, entered only when the status word
> `*A13(0xFFA0)` is **nonzero** — and the DUART path leaves it zero.
>
> `TYPE 'GO' TO CONTINUE` is **printed, not waited on**: nothing answers it, no
> keypress is read, and no timeout is involved. The "it continues after some time"
> seen on screen is simply the ~1050-frame blink (**~15 s** at 72 Hz).
>
> This matters beyond the correction: level 1 is **not** the hard blocker this
> document assumed, so the skip gate is a fast path rather than a necessity.
**The superseded answer was:**
**A level-1 failure is fatal to the boot in this ROM: it wedges the machine in
the system-board LED error-code loop.** It is not merely a message.