SDD a6b6ae82ef docs: correct Q4 of the level-1 bypass analysis -- a level-1 failure is NOT fatal (superseded answer kept as record)

2026-10-16 14:57:54 +03:00

..

duart-datasheet

reference: DUART datasheet verification of the two mc68681 edits (claim 1 refuted)

2026-10-16 12:13:07 +03:00

fonts

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

keyboard-mouse

docs: keyboard/mouse protocol spec — LK401 (LK201 protocol) + VSXXX-AA mouse, sources, MAME lk201 device

2026-10-16 11:38:52 +03:00

l1probe

reference: level-1 host-port test — can it be skipped? (analysis, no skip)

2026-10-16 12:42:35 +03:00

vt1200-photos

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

x11

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

x11-fontsrc

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

dis34-a-v21.txt.gz

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

dis34-a-v22.txt.gz

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

dis-bank0.txt

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

level0-10byte-puzzle.md

reference: the level-0 10-byte puzzle -- count-only, no loopback, no 10-byte device message

2026-10-16 14:16:37 +03:00

level1-bypass-analysis.md

docs: correct Q4 of the level-1 bypass analysis -- a level-1 failure is NOT fatal (superseded answer kept as record)

2026-10-16 14:57:54 +03:00

level1-test-sequence.md

docs: level-1 test sequence, port tests vs device tests (keyboard/mouse device models needed for tests 26/27)

2026-10-16 11:31:56 +03:00

mc68681-datasheet-verification.md

reference: DUART datasheet verification of the two mc68681 edits (claim 1 refuted)

2026-10-16 12:13:07 +03:00

memory-space-map.md

docs: memory-space map from the spike; commit the plan amendment; ignore harness logs

2026-10-16 02:15:13 +03:00

plan-1-board-model-outcome.md

docs: plan-1 outcome, rulings, and triaged findings (durable record before workspace cleanup)

2026-10-16 02:15:51 +03:00

rom-strings.txt

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

VT1000-v1.2-ROM-dump.files.txt

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00

VT1000-v1.2-ROM-dump.zip

checkpoint: VT1200 reverse-engineering workspace before board-model work

2026-10-16 01:37:50 +03:00