[lld][LoongArch] Prevent relaxation oscillation for LA.PCRel and CALL (#226713)
Relaxation of pcalau12i+addi (relaxPCHi20Lo12, isInt<22>) and call36/call30 (relaxMediumCall, isInt<28>) can oscillate: shrinking one section moves a symbol, which flips isInt<N> for other sites and changes bytesDropped again. Follow the same approach as RISCV::relaxCall: after a few passes, do not allow remove to increase beyond the previous pass's value (cur - delta). Pass that cap as prevRemove into the two helpers; range checks may still clear remove (0) when the target goes out of range. Fixes #226712 (cherry picked from commit 32757891963d7a544dbcf6a52e8f7a7c67e273aa)
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hev authored and 
Tobias Hieta committed
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@@ -1113,7 +1113,7 @@ static bool isPairRelaxable(ArrayRef<Relocation> relocs, size_t i) {
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// pcaddi $a0, %got_pc_hi20(sym_got)
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static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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uint64_t loc, Relocation &rHi20, Relocation &rLo12,
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uint32_t &remove) {
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uint32_t &remove, uint32_t prevRemove) {
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// check if the relocations are relaxable sequences.
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if (!((rHi20.type == R_LARCH_PCALA_HI20 &&
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rLo12.type == R_LARCH_PCALA_LO12) ||
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@@ -1179,6 +1179,11 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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if (getD5(currInsn) != getJ5(nextInsn) || getJ5(nextInsn) != getD5(nextInsn))
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return;
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// When the caller specifies the old value of `remove`, disallow its
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// increment.
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if (prevRemove < 4)
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return;
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sec.relaxAux->relocTypes[i] = R_LARCH_RELAX;
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if (rHi20.type == R_LARCH_TLS_GD_PC_HI20)
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_TLS_GD_PCREL20_S2;
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@@ -1203,7 +1208,8 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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// To:
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// b/bl foo
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static void relaxMediumCall(Ctx &ctx, const InputSection &sec, size_t i,
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uint64_t loc, Relocation &r, uint32_t &remove) {
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uint64_t loc, Relocation &r, uint32_t &remove,
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uint32_t prevRemove) {
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const uint64_t dest =
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(r.expr == R_PLT_PC ? r.sym->getPltVA(ctx) : r.sym->getVA(ctx)) +
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r.addend;
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@@ -1213,6 +1219,11 @@ static void relaxMediumCall(Ctx &ctx, const InputSection &sec, size_t i,
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if ((displace & 0x3) != 0 || !isInt<28>(displace))
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return;
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// When the caller specifies the old value of `remove`, disallow its
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// increment.
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if (prevRemove < 4)
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return;
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const uint32_t nextInsn = read32le(sec.content().data() + r.offset + 4);
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if (getD5(nextInsn) == R_RA) {
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// convert jirl to bl
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@@ -1254,7 +1265,7 @@ static void relaxTlsLe(Ctx &ctx, const InputSection &sec, size_t i,
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}
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}
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static bool relax(Ctx &ctx, InputSection &sec) {
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static bool relax(Ctx &ctx, int pass, InputSection &sec) {
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const uint64_t secAddr = sec.getVA();
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const MutableArrayRef<Relocation> relocs = sec.relocs();
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auto &aux = *sec.relaxAux;
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@@ -1267,6 +1278,10 @@ static bool relax(Ctx &ctx, InputSection &sec) {
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for (auto [i, r] : llvm::enumerate(relocs)) {
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const uint64_t loc = secAddr + r.offset - delta;
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uint32_t &cur = aux.relocDeltas[i], remove = 0;
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// Prevent oscillation between states by disallowing the increment of
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// `remove` after a few passes. The previous `remove` value is
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// `cur-delta`.
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uint32_t prevRemove = pass < 4 ? UINT32_MAX : cur - delta;
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switch (r.type) {
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case R_LARCH_ALIGN: {
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const uint64_t addend =
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@@ -1298,19 +1313,19 @@ static bool relax(Ctx &ctx, InputSection &sec) {
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case R_LARCH_TLS_LD_PC_HI20:
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// The overflow check for i+2 will be carried out in isPairRelaxable.
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if (isPairRelaxable(relocs, i))
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relaxPCHi20Lo12(ctx, sec, i, loc, r, relocs[i + 2], remove);
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relaxPCHi20Lo12(ctx, sec, i, loc, r, relocs[i + 2], remove, prevRemove);
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break;
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case R_LARCH_TLS_DESC_PC_HI20:
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if (r.expr == RE_LOONGARCH_GOT_PAGE_PC || r.expr == R_TPREL) {
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if (relaxable(relocs, i))
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remove = 4;
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} else if (isPairRelaxable(relocs, i))
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relaxPCHi20Lo12(ctx, sec, i, loc, r, relocs[i + 2], remove);
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relaxPCHi20Lo12(ctx, sec, i, loc, r, relocs[i + 2], remove, prevRemove);
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break;
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case R_LARCH_CALL30:
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case R_LARCH_CALL36:
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if (relaxable(relocs, i))
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relaxMediumCall(ctx, sec, i, loc, r, remove);
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relaxMediumCall(ctx, sec, i, loc, r, remove, prevRemove);
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break;
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case R_LARCH_TLS_LE_HI20_R:
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case R_LARCH_TLS_LE_ADD_R:
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@@ -1698,7 +1713,7 @@ bool LoongArch::relaxOnce(int pass) const {
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continue;
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for (InputSection *sec : getInputSections(*osec, storage))
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if (sec->relaxAux)
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changed |= relax(ctx, *sec);
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changed |= relax(ctx, pass, *sec);
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}
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return changed;
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}
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@@ -0,0 +1,58 @@
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# REQUIRES: loongarch
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##
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## call36 -> bl relaxation (relaxMediumCall, isInt<28>) must not
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## oscillate between remove=0 and remove=4. Without the fix, ld.lld reports
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## "address assignment did not converge".
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##
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## Unlike RISC-V calls (8 -> 4 -> 2 bytes), every LoongArch medium call site has
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## only two states (8 or 4 bytes), so oscillation is always a 0 <-> 4 flip.
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## The flip needs a site whose distance sits exactly at the +-128MiB limit while
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## a ".p2align 4" (R_LARCH_ALIGN) absorbs some shrinks but not others, so the
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## target address jitters between passes.
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##
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## The layout is deliberately fragile: the .space size below was found by
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## searching a model of lld's relaxation loop. Do not "round" it. The base
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## address is pinned with -Ttext, and the final addresses are checked below so
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## that a change in the .text.a/.text.b gap (which decides whether the call
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## sites sit on the +-128MiB boundary) makes the test fail instead of silently
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## no longer exercising the bug.
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# RUN: llvm-mc -filetype=obj -triple=loongarch64 -mattr=+relax %s -o %t.o
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# RUN: ld.lld -e _start -Ttext=0x10000 %t.o -o %t
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYM
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## The two short-range sites in .text.a are always relaxed.
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# CHECK-LABEL: <_start>:
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# CHECK-NEXT: bl {{[0-9a-f]+}} <t_d>
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# CHECK-NEXT: bl {{[0-9a-f]+}} <t_e>
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## .text.a is 16 bytes and .text.b starts right after it, so t_c - t_d is
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## exactly (128MiB - 4)
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# SYM-DAG: 0000000000010000 {{.*}} _start
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# SYM-DAG: 0000000000010010 {{.*}} t_d
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# SYM-DAG: 000000000801000c {{.*}} t_c
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.section .text.a,"ax"
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.globl _start
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_start:
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call36 t_d
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call36 t_e
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.globl t_e
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t_e:
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call36 t_c # forward, crosses the 128MiB filler
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.globl t_d
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t_d:
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.section .text.b,"ax"
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.space 8
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call36 t_a
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call36 t_d # backward, crosses the 128MiB filler
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.space 134217696 # 128MiB - 32: puts the sites right at the isInt<28> limit
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call36 _start # backward, near the limit
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.globl t_c
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t_c:
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.p2align 4 # R_LARCH_ALIGN; also makes .text.b 16-byte aligned
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call36 t_d
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.globl t_a
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t_a:
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@@ -0,0 +1,58 @@
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# REQUIRES: loongarch
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##
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## la.pcrel -> pcaddi relaxation (relaxPCHi20Lo12, isInt<22>) must not
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## oscillate between remove=0 and remove=4. Without the fix, ld.lld reports
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## "address assignment did not converge".
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##
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## Unlike RISC-V calls (8 -> 4 -> 2 bytes), every LoongArch la.pcrel site has
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## only two states (8 or 4 bytes), so oscillation is always a 0 <-> 4 flip.
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## The flip needs a site whose distance sits exactly at the +-2MiB limit while
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## a ".p2align 4" (R_LARCH_ALIGN) absorbs some shrinks but not others, so the
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## target address jitters between passes.
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##
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## The layout is deliberately fragile: the .space size below was found by
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## searching a model of lld's relaxation loop. Do not "round" it. The base
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## address is pinned with -Ttext, and the final addresses are checked below so
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## that a change in the .text.a/.text.b gap (which decides whether the call
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## sites sit on the +-2MiB boundary) makes the test fail instead of silently
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## no longer exercising the bug.
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# RUN: llvm-mc -filetype=obj -triple=loongarch64 -mattr=+relax %s -o %t.o
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# RUN: ld.lld -e _start -Ttext=0x10000 %t.o -o %t
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# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
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# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYM
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## The two short-range sites in .text.a are always relaxed.
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# CHECK-LABEL: <_start>:
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# CHECK-NEXT: pcaddi $t0, 4
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# CHECK-NEXT: pcaddi $t1, 1
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## .text.a is 16 bytes and .text.b starts right after it, so t_c - t_d is
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## exactly (2MiB - 4)
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# SYM-DAG: 0000000000010000 {{.*}} _start
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# SYM-DAG: 0000000000010010 {{.*}} t_d
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# SYM-DAG: 000000000021000c {{.*}} t_c
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.section .text.a,"ax"
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.globl _start
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_start:
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la.pcrel $t0, t_d
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la.pcrel $t1, t_e
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.globl t_e
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t_e:
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la.pcrel $t2, t_c # forward, crosses the 2MiB filler
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.globl t_d
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t_d:
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.section .text.b,"ax"
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.space 8
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la.pcrel $t3, t_a
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la.pcrel $t4, t_d # backward, crosses the 2MiB filler
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.space 2097120 # 2MiB - 32: puts the sites right at the isInt<22> limit
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la.pcrel $t5, _start # backward, near the limit
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.globl t_c
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t_c:
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.p2align 4 # R_LARCH_ALIGN; also makes .text.b 16-byte aligned
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la.pcrel $t6, t_d
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.globl t_a
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t_a:
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