arti 52d3740b62 tms34010: emit GSPA-compatible asm and support -O0 globals
GSPA 2.00 has no .section/.type/.size/.ident/.p2align directives, so
use the base MCAsmInfo and switch sections with bare .text/.data/.bss.
Zero-initialized globals become one .bss line (sizes in bits), and a
global address (including the +bit-addend constant-GEP form) selects to
a single MOVI relocation.

M1 has no stack, so the fast register allocator's spill/reload path
cannot work at -O0; use the greedy allocator there while still skipping
the IR pipeline.  Add m1-o0.ll and m1-global.ll.
2026-11-11 08:31:13 +00:00
2026-09-29 11:47:18 +02:00
2026-10-20 15:06:51 +02:00
2026-07-14 06:30:37 -05:00
…
…

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Description
Full LLVM 23.1.5 fork for TMS34010 (compiler target + clang bit-address changes)
Readme Apache-2.0
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