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65 lines
1.2 KiB
C
65 lines
1.2 KiB
C
/*
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* fw/spi.c - SPI I/O
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*
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* Written 2012 by Werner Almesberger
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* Copyright 2012 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <stdint.h>
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#include <avr/io.h>
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#include "io.h"
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#include "spi.h"
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#define nSS B, 2
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#define MOSI B, 3
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#define MISO B, 4
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#define SCLK B, 8
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/*
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* According to simulation, signals from MCU to transceiver should already
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* suffer severe degradation * at fosc/4 = 2 MHz due to parasitic capacitance
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* (assumed to be 10 pF) and the series resistors (10 kOhm) of the voltage
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* dividers.
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*
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* fosc/2 = 4 MHz looks horrible in simulation and does not work reliably in
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* practice either.
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*/
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void spi_init(void)
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{
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/* SPI mode 0, MSB first, fosc/4 */
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SPCR =
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1 << SPE | /* enable SPI */
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1 << MSTR; /* master */
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// SPSR = 1 << SPI2X; /* enable for fosc/2 */
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}
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void spi_begin(void)
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{
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CLR(nSS);
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}
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uint8_t spi_io(uint8_t v)
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{
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SPDR = v;
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while (!(SPSR & (1 << SPIF)));
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return SPDR;
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}
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void spi_end(void)
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{
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SET(nSS);
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}
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