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ubb-vga/web/index.html: some changes in wording and text structure

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Werner Almesberger 2011-05-07 05:11:58 -03:00
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ubb-vga/web/index.html
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@ -15,11 +15,11 @@ workable VGA signal on the
<H2>What it can do</H2> <H2>What it can do</H2>
The video signal timing is controlled by software. Available resolutions
include 640x480 and 800x600.
At present, the maximum resolution is 1024x768 with a refresh rate of 50 Hz: At present, the maximum resolution is 1024x768 with a refresh rate of 50 Hz:
<BR> <BR>
<A href="ubb-vga-pub-1024.jpg"><IMG src="ubb-vga-pub-1024-small.jpg"></A> <A href="ubb-vga-pub-1024.jpg"><IMG src="ubb-vga-pub-1024-small.jpg"></A>
<BR>
Other resolutions possible include 640x480 and 800x600.
<P> <P>
The 16 colors are generated from a binary channel for red, green, and blue The 16 colors are generated from a binary channel for red, green, and blue
each, plus a binary luminance channel that affects all colors. each, plus a binary luminance channel that affects all colors.
@ -41,13 +41,13 @@ The pictures below show a prototype that connects directly to a VGA cable:
&nbsp; &nbsp;
<A href="ubb-vga-pub-v2.jpg"><IMG src="ubb-vga-pub-v2-small.jpg"></A> <A href="ubb-vga-pub-v2.jpg"><IMG src="ubb-vga-pub-v2-small.jpg"></A>
<P> <P>
The circuit is very simple. It consists of UBB itself, ten resistors, The circuit is very simple. In its simplest form, it consists of UBB,
and the VGA cable: ten resistors, and the VGA cable:
<BR> <BR>
<A href="ubb-vga-schem.png"><IMG src="ubb-vga-schem-small.png"></A> <A href="ubb-vga-schem.png"><IMG src="ubb-vga-schem-small.png"></A>
<BR> <BR>
Each of the three analog color channels uses three resistors for lowering Each of the three analog color channels uses three resistors for lowering
the 3.3 V logical voltage to the 0.7 V VGA level and for mixing in the the 3.3 V logic voltage to the 0.7 V analog VGA level and for mixing in the
luminance (Y) signal. The tenth resistor pulls down the HSYNC/CMD luminance (Y) signal. The tenth resistor pulls down the HSYNC/CMD
line, to fake the "not busy" signal the MMC controller expects to receive line, to fake the "not busy" signal the MMC controller expects to receive
from a MMC device when starting a block write. from a MMC device when starting a block write.