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mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2024-11-23 22:11:53 +02:00

ubb-patgen/: flush dcache and write buffer before doing DMA

This commit is contained in:
Werner Almesberger 2013-01-14 23:25:31 -03:00
parent 908b0631d1
commit b6ee672266
2 changed files with 13 additions and 1 deletions

View File

@ -11,7 +11,7 @@
#
CC = mipsel-openwrt-linux-gcc
CFLAGS = -g -Wall -O9 -I../libubb/include
CFLAGS = -g -Wall -O9 -march=mips32 -I../libubb/include
LDFLAGS =
LDLIBS = -L../libubb -lubb -lm

View File

@ -18,6 +18,7 @@
#include <math.h>
#include <time.h>
#include <assert.h>
#include <asm/cachectl.h>
#include <ubb/ubb.h>
#include <ubb/regs4740.h>
@ -25,9 +26,13 @@
#include <ubb/physmem.h>
#define USE_DMA
#define DMA 5
extern int cacheflush(char *addr, int nbytes, int cache);
/* ----- List available bus clock frequencies ------------------------------ */
@ -309,6 +314,13 @@ static void send_buffer(const struct mmcclk *clk,
#ifdef USE_DMA
unsigned long phys;
if (cacheflush((void *) buf, nibbles >> 1, DCACHE)) {
perror("cacheflush");
exit(1);
}
asm("sync"); /* flush the write buffer */
phys = physmem_xlat((void *) buf);
mmc_buffer(clk, buf[0] >> 4, phys, nibbles, mask);
#else