1
0
mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-11-22 12:59:21 +02:00

atusb-sil/: moved C8051F326-related material out of atusb/

- Makefile, atusb.pro, atusb.sch, atrf.sch, usb.sch, atusb.cmp, atusb.brd:
  resurrected from git history (commit
  14b00823b0)
- fw/: moved all C8051F326-specific files over from atusb/fw/
- fw/include/: copied MCU-independent files over from atusb/fw/include/
This commit is contained in:
Werner Almesberger 2011-02-22 00:17:13 -03:00
parent 125055b0fe
commit 2642b9e1c3
21 changed files with 6010 additions and 0 deletions

54
atusb-sil/Makefile Normal file
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PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones
NAME = atusb
.PHONY: all gen generate sch brd xpdf front back clean
all:
@echo "make what ? target: gen sch brd xpdf front back clean"
@exit 1
gen generate:
eeschema --plot `pwd`/$(NAME).sch
# need scripts
sch:
eeschema `pwd`/$(NAME).sch
brd:
pcbnew `pwd`/$(NAME).brd
xpdf:
xpdf $(NAME).pdf
front: $(NAME)-Front.ps
lpr $<
back: $(NAME)-Back.ps
lpr $<
#
# Postscript for production of front/back layer, using the toner transfer
# method. Note that other artwork transfer methods may require different
# mirror settings.
#
# We use --ps-pads-drill-opt=none to avoid having any hole before drilling,
# which yields the best results with a CNC drill. For manual drilling, "real"
# would be preferrable. Do not use "small", for this created holes that are
# larger (!) than designed.
#
%-Front.ps: %.brd
$(PLOT_BRD) -l Front --mirror $<
%-Back.ps: %.brd
$(PLOT_BRD) -l Back $<
clean:
rm -f $(NAME)-Front.ps $(NAME)-Back.ps
rm -f $(NAME).drl $(NAME)-PCB_Edges.gbr
rm -f $(NAME)-Front.gtl $(NAME)-Mask_Front.gts
rm -f $(NAME)-SilkS_Front.gto $(NAME)-SoldP_Front.gtp
rm -f $(NAME)-Back.gbl $(NAME)-Mask_Back.gbs
rm -f $(NAME)-SilkS_Back.gbo $(NAME)-SoldP_Back.gbp
rm -f $(NAME)-Comments.gbr

595
atusb-sil/atrf.sch Normal file
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EESchema Schematic File Version 2 date Sun Jan 23 01:33:33 2011
LIBS:power
LIBS:device
LIBS:conn
LIBS:at86rf231
LIBS:c8051f326
LIBS:usb_a_plug
LIBS:xtal-4
LIBS:antenna
LIBS:balun-smt6
LIBS:atusb-cache
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 3 3
Title "IEEE 802.15.4 USB Transceiver (AT86RF230)"
Date "23 jan 2011"
Rev "20110123"
Comp "Werner Almesberger"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Wire Line
2500 4400 2500 4600
Connection ~ 6200 3750
Wire Wire Line
6700 3750 6200 3750
Wire Wire Line
6700 4500 6500 4500
Wire Wire Line
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Wire Wire Line
3150 5000 3150 4200
Wire Wire Line
4350 5000 4350 4800
Wire Wire Line
4150 4000 4350 4000
Wire Wire Line
4950 4200 5150 4200
Wire Wire Line
5150 4200 5150 4050
Wire Wire Line
5150 4050 6700 4050
Wire Wire Line
4950 3800 5350 3800
Wire Wire Line
5350 3800 5350 4200
Wire Wire Line
5350 4200 6700 4200
Wire Wire Line
1400 3800 1800 3800
Connection ~ 3400 6150
Wire Wire Line
3400 6350 3400 6150
Wire Wire Line
1600 4600 1600 3900
Connection ~ 8400 6150
Wire Wire Line
8600 6150 8400 6150
Wire Wire Line
7600 2050 7600 1850
Wire Wire Line
8100 2650 8100 1250
Wire Wire Line
8250 2650 8250 2450
Wire Wire Line
7950 2650 7950 2450
Connection ~ 9700 2450
Wire Wire Line
9900 2450 8550 2450
Wire Wire Line
8550 2450 8550 2650
Connection ~ 10500 1950
Wire Wire Line
10500 1950 10100 1950
Wire Wire Line
10500 2650 10500 1150
Wire Wire Line
10500 1150 10300 1150
Wire Wire Line
9700 1350 9700 1150
Connection ~ 7500 2450
Wire Wire Line
6200 2450 7800 2450
Wire Wire Line
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Connection ~ 6200 4350
Wire Wire Line
6700 4350 6200 4350
Wire Wire Line
8100 6950 8100 6750
Wire Wire Line
7500 5450 7500 5850
Connection ~ 9700 4500
Wire Wire Line
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Wire Wire Line
9500 4500 9700 4500
Wire Wire Line
10400 3600 9500 3600
Wire Wire Line
10400 3900 9500 3900
Wire Wire Line
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Wire Wire Line
8550 5850 8550 5450
Wire Wire Line
8400 6350 8400 5450
Wire Wire Line
8100 6350 8100 5450
Wire Wire Line
8250 5450 8250 5650
Wire Wire Line
8250 5650 8100 5650
Connection ~ 8100 5650
Wire Wire Line
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Wire Wire Line
10400 4650 9500 4650
Wire Wire Line
9500 4200 10400 4200
Wire Wire Line
9500 3750 10400 3750
Wire Wire Line
9700 4050 9500 4050
Wire Wire Line
7950 5850 7950 5450
Wire Wire Line
7650 5450 7650 5650
Wire Wire Line
7650 5650 7500 5650
Connection ~ 7500 5650
Wire Wire Line
8400 6750 8400 6950
Wire Wire Line
9000 5850 9000 5450
Wire Wire Line
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Connection ~ 6200 3900
Wire Wire Line
7800 2450 7800 2650
Wire Wire Line
7500 2450 7500 2650
Wire Wire Line
7650 2650 7650 2450
Connection ~ 7650 2450
Wire Wire Line
9700 2250 9700 2450
Wire Wire Line
10500 2450 10300 2450
Connection ~ 10500 2450
Wire Wire Line
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Connection ~ 10500 1650
Wire Wire Line
8400 2650 8400 1150
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
7800 6350 7800 5450
Wire Wire Line
7600 1450 7600 1250
Wire Wire Line
7600 1250 8100 1250
Wire Wire Line
7850 1050 7850 1250
Connection ~ 7850 1250
Wire Wire Line
1600 3900 1400 3900
Wire Wire Line
3150 6350 3150 6150
Wire Wire Line
3150 6150 3650 6150
Wire Wire Line
3650 6150 3650 6350
Wire Wire Line
2300 3800 3350 3800
Wire Wire Line
4150 3800 4550 3800
Wire Wire Line
4150 4200 4550 4200
Wire Wire Line
3150 4200 3350 4200
Wire Wire Line
4350 3600 4350 4400
Connection ~ 4350 4000
Wire Wire Line
3350 4300 3150 4300
Connection ~ 3150 4300
Wire Wire Line
6200 3600 6700 3600
Connection ~ 6200 3600
Wire Wire Line
2500 4000 2500 3800
Connection ~ 2500 3800
$Comp
L AGND #PWR016
U 1 1 4D3B019B
P 2500 4600
F 0 "#PWR016" H 2500 4600 40 0001 C CNN
F 1 "AGND" H 2500 4530 50 0000 C CNN
1 2500 4600
1 0 0 -1
$EndComp
$Comp
L C C16
U 1 1 4D3B018B
P 2500 4200
F 0 "C16" H 2550 4300 50 0000 L CNN
F 1 "NC" H 2550 4100 50 0000 L CNN
F 2 "0402" H 2500 4200 60 0001 C CNN
1 2500 4200
1 0 0 -1
$EndComp
$Comp
L DGND #PWR23
U 1 1 4D2296C2
P 6500 4850
F 0 "#PWR23" H 6500 4850 40 0001 C CNN
F 1 "DGND" H 6500 4780 40 0000 C CNN
1 6500 4850
1 0 0 -1
$EndComp
$Comp
L AT86RF231 U2
U 1 1 4D229690
P 8100 4050
F 0 "U2" H 7100 5250 60 0000 C CNN
F 1 "AT86RF231" H 8100 4050 60 0000 C CNN
F 2 "QFN32-VHHD-6" H 8100 4050 60 0001 C CNN
1 8100 4050
1 0 0 -1
$EndComp
Text Label 2850 3800 0 60 ~ 0
FEED
$Comp
L PWR_FLAG #FLG017
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F 0 "#FLG017" H 4350 3870 30 0001 C CNN
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1 4350 3600
1 0 0 -1
$EndComp
$Comp
L AGND #PWR018
U 1 1 4CF4B229
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F 0 "#PWR018" H 3150 5000 40 0001 C CNN
F 1 "AGND" H 3150 4930 50 0000 C CNN
1 3150 5000
1 0 0 -1
$EndComp
$Comp
L AGND #PWR019
U 1 1 4CF4B224
P 4350 5000
F 0 "#PWR019" H 4350 5000 40 0001 C CNN
F 1 "AGND" H 4350 4930 50 0000 C CNN
1 4350 5000
1 0 0 -1
$EndComp
$Comp
L R R3
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P 2050 3800
F 0 "R3" V 2130 3800 50 0000 C CNN
F 1 "0R" V 2050 3800 50 0000 C CNN
F 2 "0402" H 2050 3800 60 0001 C CNN
1 2050 3800
0 -1 -1 0
$EndComp
$Comp
L BALUN-SMT6 B1
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F 1 "2450FB15L0001" H 3750 3550 60 0000 C CNN
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1 3750 4000
1 0 0 -1
$EndComp
Text Label 9900 4650 0 60 ~ 0
CLKM
Text Label 5750 4200 0 60 ~ 0
RFN
Text Label 5750 4050 0 60 ~ 0
RPF
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L GND #PWR020
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P 3150 6350
F 0 "#PWR020" H 3150 6350 30 0001 C CNN
F 1 "GND" H 3150 6280 30 0001 C CNN
1 3150 6350
1 0 0 -1
$EndComp
$Comp
L DGND #PWR19
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F 0 "#PWR19" H 3400 6350 40 0001 C CNN
F 1 "DGND" H 3400 6280 40 0000 C CNN
1 3400 6350
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$EndComp
$Comp
L AGND #PWR021
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P 3650 6350
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F 1 "AGND" H 3650 6280 50 0000 C CNN
1 3650 6350
1 0 0 -1
$EndComp
$Comp
L AGND #PWR022
U 1 1 4C641731
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F 1 "AGND" H 1600 4530 50 0000 C CNN
1 1600 4600
1 0 0 -1
$EndComp
$Comp
L C C3
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F 1 "22pF/RF" H 4400 4500 50 0000 L CNN
F 2 "0402" H 4350 4600 60 0001 C CNN
1 4350 4600
1 0 0 -1
$EndComp
$Comp
L C C9
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F 1 "22pF/RF" H 4800 4100 50 0000 L CNN
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1 4750 4200
0 -1 -1 0
$EndComp
$Comp
L C C8
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P 4750 3800
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F 2 "0402" H 4750 3800 60 0001 C CNN
1 4750 3800
0 -1 -1 0
$EndComp
Text Notes 1300 1400 0 200 ~ 40
RF
Text HLabel 7800 6350 3 60 Input ~ 0
SLP_TR
Text HLabel 6000 4650 0 60 Input ~ 0
nRST_RF
Text HLabel 10400 4350 2 60 Input ~ 0
SCLK
Text HLabel 10400 4200 2 60 Output ~ 0
MISO
Text HLabel 10400 3900 2 60 Input ~ 0
MOSI
Text HLabel 10400 3750 2 60 Input ~ 0
nSS
Text HLabel 10400 3600 2 60 Output ~ 0
IRQ_RF
$Comp
L VDD #PWR023
U 1 1 4C641205
P 8600 6150
F 0 "#PWR023" H 8600 6250 30 0001 C CNN
F 1 "VDD" H 8600 6260 30 0000 C CNN
1 8600 6150
0 1 1 0
$EndComp
$Comp
L VDD #PWR024
U 1 1 4C6411DB
P 7850 1050
F 0 "#PWR024" H 7850 1150 30 0001 C CNN
F 1 "VDD" H 7850 1160 30 0000 C CNN
1 7850 1050
1 0 0 -1
$EndComp
$Comp
L AGND #PWR025
U 1 1 4C641100
P 7600 2050
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F 1 "AGND" H 7600 1980 50 0000 C CNN
1 7600 2050
1 0 0 -1
$EndComp
$Comp
L AGND #PWR026
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F 0 "#PWR026" H 8250 2450 40 0001 C CNN
F 1 "AGND" H 8250 2380 50 0000 C CNN
1 8250 2450
-1 0 0 1
$EndComp
$Comp
L DGND #PWR27
U 1 1 4C641010
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1 7950 1850
-1 0 0 1
$EndComp
$Comp
L C C11
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1 7950 2250
-1 0 0 -1
$EndComp
$Comp
L DGND #PWR36
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1 10500 2650
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$EndComp
$Comp
L AGND #PWR027
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1 6200 4850
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$EndComp
$Comp
L TST P16
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1 10400 4650
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$EndComp
$Comp
L AGND #PWR028
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F 1 "AGND" H 9000 5780 50 0000 C CNN
1 9000 5850
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$Comp
L DGND #PWR29
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1 8100 6950
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$EndComp
$Comp
L DGND #PWR31
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$EndComp
$Comp
L DGND #PWR24
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1 7500 5850
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$EndComp
$Comp
L DGND #PWR35
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1 9700 4850
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$EndComp
$Comp
L DGND #PWR28
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1 0 0 -1
$EndComp
$Comp
L DGND #PWR32
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1 8550 5850
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$EndComp
$Comp
L C C12
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$Comp
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$EndComp
$Comp
L C C14
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0 -1 1 0
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P 1100 3850
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1 1100 3850
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L XTAL-4 X1
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1 9700 1800
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$EndComp
$EndSCHEMATC

4043
atusb-sil/atusb.brd Normal file

File diff suppressed because it is too large Load Diff

206
atusb-sil/atusb.cmp Normal file
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@ -0,0 +1,206 @@
Cmp-Mod V01 Genere par PcbNew le Sun Jan 23 01:25:02 2011
BeginCmp
TimeStamp = /4C609C08/4C63FE17;
Reference = ANT1;
ValeurCmp = 50R;
IdModule = MEANDER-110;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4CF4B034;
Reference = B1;
ValeurCmp = 2450FB15L0001;
IdModule = 0805-6;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6401AA;
Reference = C1;
ValeurCmp = 1uF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6401B3;
Reference = C2;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C641710;
Reference = C3;
ValeurCmp = 22pF/RF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C641506;
Reference = C8;
ValeurCmp = 22pF/RF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C641509;
Reference = C9;
ValeurCmp = 22pF/RF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640A76;
Reference = C10;
ValeurCmp = 1uF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C641004;
Reference = C11;
ValeurCmp = 1uF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640A84;
Reference = C12;
ValeurCmp = 1uF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640A7E;
Reference = C13;
ValeurCmp = 1uF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640A73;
Reference = C14;
ValeurCmp = 12pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640A7B;
Reference = C15;
ValeurCmp = 12pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4D3B018B;
Reference = C16;
ValeurCmp = NC;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4CF4AD1B;
Reference = CON1;
ValeurCmp = USB_A_PLUG_;
IdModule = USB-A-PLUG-SMT;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6402EE;
Reference = D1;
ValeurCmp = LTST-C190KRKT;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6401FE;
Reference = P11;
ValeurCmp = CONN_1;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C640200;
Reference = P12;
ValeurCmp = CONN_1;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C640202;
Reference = P13;
ValeurCmp = CONN_1;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C640203;
Reference = P14;
ValeurCmp = CONN_1;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C640CD5;
Reference = P16;
ValeurCmp = TST;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6402F2;
Reference = R1;
ValeurCmp = 68;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4CF4B07E;
Reference = R3;
ValeurCmp = 0R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C609C36;
Reference = U1;
ValeurCmp = C8051F326;
IdModule = QFN28-SiLabs;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4D229690;
Reference = U2;
ValeurCmp = AT86RF231;
IdModule = QFN32-VHHD-6;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C6402FB;
Reference = VR1;
ValeurCmp = 5V6;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C640343;
Reference = VR2;
ValeurCmp = 5V6;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609BEF/4C64034D;
Reference = VR3;
ValeurCmp = 5V6;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C08/4C63FA9F;
Reference = X1;
ValeurCmp = 16MHz;
IdModule = xtal4-3.2mmx2.5mm;
EndCmp
EndListe

79
atusb-sil/atusb.pro Normal file
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@ -0,0 +1,79 @@
update=Sun Jan 23 11:40:02 2011
last_client=pcbnew
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=conn
LibName4=../components/at86rf231
LibName5=../components/c8051f326
LibName6=../components/usb_a_plug
LibName7=../components/xtal-4
LibName8=../components/antenna
LibName9=../components/balun-smt6
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=20
DrawLar=50
EdgeLar=50
TxtLar=120
MSegLar=150
LastNetListRead=atusb.net
[pcbnew/libraries]
LibDir=
LibName1=../ants/meander
LibName2=../modules/usb_a_plug_smt
LibName3=../../kicad-libs/modules/pads
LibName4=../modules/qfn
LibName5=../../kicad-libs/modules/stdpass
LibName6=../modules/xtal-4
LibName7=../modules/0805-6

87
atusb-sil/atusb.sch Normal file
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@ -0,0 +1,87 @@
EESchema Schematic File Version 2 date Sun Jan 23 01:33:33 2011
LIBS:power
LIBS:device
LIBS:conn
LIBS:at86rf231
LIBS:c8051f326
LIBS:usb_a_plug
LIBS:xtal-4
LIBS:antenna
LIBS:balun-smt6
LIBS:atusb-cache
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 1 3
Title "IEEE 802.15.4 USB Transceiver (AT86RF231)"
Date "23 jan 2011"
Rev "20110123"
Comp "Werner Almesberger"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 2300 3400 2050 2050
U 4C609BEF
F0 "USB" 60
F1 "usb.sch" 60
F2 "nRST_RF" O R 4350 4700 60
F3 "SLP_TR" O R 4350 4850 60
F4 "IRQ_RF" I R 4350 4500 60
F5 "nSS" O R 4350 4300 60
F6 "SCLK" O R 4350 4150 60
F7 "MOSI" O R 4350 3850 60
F8 "MISO" I R 4350 4000 60
$EndSheet
Wire Wire Line
7350 4850 4350 4850
Wire Wire Line
7350 4500 4350 4500
Wire Wire Line
7350 4150 4350 4150
Wire Wire Line
7350 3850 4350 3850
Wire Wire Line
7350 4000 4350 4000
Wire Wire Line
7350 4300 4350 4300
Wire Wire Line
7350 4700 4350 4700
Wire Wire Line
10000 6100 10000 6300
$Comp
L PWR_FLAG #FLG01
U 1 1 4C641B9C
P 10000 6100
F 0 "#FLG01" H 10000 6370 30 0001 C CNN
F 1 "PWR_FLAG" H 10000 6330 30 0000 C CNN
1 10000 6100
1 0 0 -1
$EndComp
$Comp
L GND #PWR02
U 1 1 4C641B91
P 10000 6300
F 0 "#PWR02" H 10000 6300 30 0001 C CNN
F 1 "GND" H 10000 6230 30 0001 C CNN
1 10000 6300
1 0 0 -1
$EndComp
Text Notes 900 1250 0 200 ~ 40
IEEE 802.15.4 USB TXRX
$Sheet
S 7350 3450 1800 1950
U 4C609C08
F0 "RF" 60
F1 "atrf.sch" 60
F2 "SLP_TR" I L 7350 4850 60
F3 "nRST_RF" I L 7350 4700 60
F4 "SCLK" I L 7350 4150 60
F5 "MISO" O L 7350 4000 60
F6 "MOSI" I L 7350 3850 60
F7 "nSS" I L 7350 4300 60
F8 "IRQ_RF" O L 7350 4500 60
$EndSheet
$EndSCHEMATC

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@ -0,0 +1,402 @@
/*
* include/at86rf230.h - AT86RF230/AT86RF231 protocol and register definitions
*
* Written 2008-2011 by Werner Almesberger
* Copyright 2008-2011 Werner Almesberger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT86RF230_H
#define AT86RF230_H
enum {
AT86RF230_REG_WRITE = 0xc0, /* 11... */
AT86RF230_REG_READ = 0x80, /* 10... */
AT86RF230_BUF_WRITE = 0x60, /* 011... */
AT86RF230_BUF_READ = 0x20, /* 001... */
AT86RF230_SRAM_WRITE = 0x40, /* 010... */
AT86RF230_SRAM_READ = 0x00 /* 000... */
};
#define MAX_PSDU 127 /* octets, see AT86RF230 manual section 8.1 */
#define SRAM_SIZE 128
/* --- Registers ----------------------------------------------------------- */
enum {
REG_TRX_STATUS = 0x01,
REG_TRX_STATE = 0x02,
REG_TRX_CTRL_0 = 0x03,
REG_TRX_CTRL_1 = 0x04, /* 231 only */
REG_PHY_TX_PWR = 0x05,
REG_PHY_RSSI = 0x06,
REG_PHY_ED_LEVEL = 0x07,
REG_PHY_CC_CCA = 0x08,
REG_CCA_THRES = 0x09,
REG_RX_CTRL = 0x0a, /* 231 only */
REG_SFD_VALUE = 0x0b, /* 231 only */
REG_TRX_CTRL_2 = 0x0c, /* 231 only */
REG_ANT_DIV = 0x0d, /* 231 only */
REG_IRQ_MASK = 0x0e,
REG_IRQ_STATUS = 0x0f,
REG_VREG_CTRL = 0x10,
REG_BATMON = 0x11,
REG_XOSC_CTRL = 0x12,
REG_RX_SYN = 0x15, /* 231 only */
REG_XAH_CTRL_1 = 0x17, /* 231 only */
REG_FTN_CTRL = 0x18, /* 231 only */
REG_PLL_CF = 0x1a,
REL_PLL_DCU = 0x1b,
REG_PART_NUM = 0x1c,
REG_VERSION_NUM = 0x1d,
REG_MAN_ID_0 = 0x1e,
REG_MAN_ID_1 = 0x1f,
REG_SHORT_ADDR_0 = 0x20,
REG_SHORT_ADDR_1 = 0x21,
REG_PAN_ID_0 = 0x22,
REG_PAN_ID_1 = 0x23,
REG_IEEE_ADDR_0 = 0x24,
REG_IEEE_ADDR_1 = 0x25,
REG_IEEE_ADDR_2 = 0x26,
REG_IEEE_ADDR_3 = 0x27,
REG_IEEE_ADDR_4 = 0x28,
REG_IEEE_ADDR_5 = 0x29,
REG_IEEE_ADDR_6 = 0x2a,
REG_IEEE_ADDR_7 = 0x2b,
REG_XAH_CTRL_0 = 0x2c, /* XAH_CTRL in 230 */
REG_CSMA_SEED_0 = 0x2d,
REG_CSMA_SEED_1 = 0x2e,
REG_CSMA_BE = 0x2f, /* 231 only */
REG_CONT_TX_0 = 0x36,
REG_CONT_TX_1 = 0x3d, /* 230 only */
};
/* --- TRX_STATUS --- ------------------------------------------------------ */
#define CCA_DONE (1 << 7)
#define CCA_STATUS (1 << 6)
#define TRX_STATUS_SHIFT 0
#define TRX_STATUS_MASK 0x1f
enum {
TRX_STATUS_P_ON = 0x00, /* reset default */
TRX_STATUS_BUSY_RX = 0x01,
TRX_STATUS_BUSY_TX = 0x02,
TRX_STATUS_RX_ON = 0x06,
TRX_STATUS_TRX_OFF = 0x08,
TRX_STATUS_PLL_ON = 0x09,
TRX_STATUS_SLEEP = 0x0f,
TRX_STATUS_BUSY_RX_AACK = 0x11,
TRX_STATUS_BUSY_TX_ARET = 0x12,
TRX_STATUS_RX_AACK_ON = 0x16,
TRX_STATUS_TX_ARET_ON = 0x19,
TRX_STATUS_RX_ON_NOCLK = 0x1c,
TRX_STATUS_RX_AACK_ON_NOCLK = 0x1d,
TRX_STATUS_BUSY_RX_AACK_NOCLK = 0x1e,
TRX_STATUS_TRANSITION = 0x1f /* ..._IN_PROGRESS */
};
/* --- TRX_STATE ----------------------------------------------------------- */
#define TRAC_STATUS_SHIFT 5
#define TRAC_STATUS_MASK 7
enum {
TRAC_STATUS_SUCCESS = 0, /* reset default */
TRAC_STATUS_SUCCESS_DATA_PENDING = 1,
TRAC_STATUS_SUCCESS_WAIT_FOR_ACK = 2, /* 231 only */
TRAC_STATUS_CHANNEL_ACCESS_FAILURE = 3,
TRAC_STATUS_NO_ACK = 5,
TRAC_STATUS_INVALID = 7
};
#define TRX_CMD_SHIFT 0
#define TRX_CMD_MASK 0x1f
enum {
TRX_CMD_NOP = 0x00, /* reset default */
TRX_CMD_TX_START = 0x02,
TRX_CMD_FORCE_TRX_OFF = 0x03,
TRX_CMD_FORCE_PLL_ON = 0x04, /* 231 only */
TRX_CMD_RX_ON = 0x06,
TRX_CMD_TRX_OFF = 0x08,
TRX_CMD_PLL_ON = 0x09,
TRX_CMD_RX_AACK_ON = 0x16,
TRX_CMD_TX_ARET_ON = 0x19,
};
/* --- TRX_CTRL_0 ---------------------------------------------------------- */
#define PAD_IO_SHIFT 6
#define PAD_IO_MASK 3
enum {
PAD_IO_2mA, /* reset default */
PAD_IO_4mA,
PAD_IO_6mA,
PAD_IO_8mA
};
#define PAD_IO_CLKM_SHIFT 4
#define PAD_IO_CLKM_MASK 3
enum {
PAD_IO_CLKM_2mA,
PAD_IO_CLKM_4mA, /* reset default */
PAD_IO_CLKM_5mA,
PAD_IO_CLKM_8mA,
};
#define CLKM_SHA_SEL (1 << 3)
#define CLKM_CTRL_SHIFT 0
#define CLKM_CTRL_MASK 7
enum {
CLKM_CTRL_OFF = 0,
CLKM_CTRL_1MHz = 1, /* reset default */
CLKM_CTRL_2MHz = 2,
CLKM_CTRL_4MHz = 3,
CLKM_CTRL_8MHz = 4,
CLKM_CTRL_16MHz = 5
};
/* --- TRX_CTRL_1 (231 only) ----------------------------------------------- */
#define PA_EXT_EN (1 << 7)
#define IRQ_2_EXT_EN (1 << 6)
#define TX_AUTO_CRC_ON (1 << 5) /* 231 location */
#define RX_BL_CTRL (1 << 4)
#define SPI_CMD_MODE_SHIFT 2
#define SPI_CMD_MODE_MASK 3
enum {
SPI_CMD_MODE_EMPTY = 0, /* reset default */
SPI_CMD_MODE_TRX_STATUS = 1,
SPI_CMD_MODE_PHY_RSSI = 2,
SPI_CMD_MODE_IRQ_STATUS = 3,
};
#define IRQ_MASK_MODE (1 << 1)
#define IRQ_POLARITY (1 << 0)
/* --- PHY_TX_PWR ---------------------------------------------------------- */
#define TX_AUTO_CRC_ON_230 (1 << 7) /* 230 location */
#define PA_BUF_LT_SHIFT 6
#define PA_BUF_LT_MASK 3
#define PA_LT_SHIFT 4
#define PA_LT_MASK 3
#define TX_PWR_SHIFT 0
#define TX_PWR_MASK 0x0f
/* --- PHY_RSSI ------------------------------------------------------------ */
#define RX_CRC_VALID (1 << 7)
#define RND_VALUE_SHIFT 5 /* 231 only */
#define RND_VALUE_MASK 3
#define RSSI_SHIFT 0
#define RSSI_MASK 0x1f
/* --- PHY_CC_CCA ---------------------------------------------------------- */
#define CCA_REQUEST (1 << 7)
#define CCA_MODE_SHIFT 5
#define CCA_MODE_MASK 3
enum {
CCA_MODE_CARRIER_OR_ENERGY = 0, /* 231 only */
CCA_MODE_ENERGY = 1, /* reset default */
CCA_MODE_CARRIER = 2,
CCA_MODE_CARRIER_AND_ENERGY = 3
};
#define CHANNEL_SHIFT 0
#define CHANNEL_MASK 0x1f
/* --- CCA_THRES ----------------------------------------------------------- */
#define CCA_ED_THRES_SHIFT 0
#define CCA_ED_THRES_MASK 0x0f
/* --- RX_CTRL (231 only) -------------------------------------------------- */
#define PDT_THRES_SHIFT 0
#define PDT_THRES_MASK 0x0f
enum {
PDT_THRES_DEFAULT = 0x07, /* reset default */
PDT_THRES_DIVERSITY = 0x03,
};
/* --- TRX_CTRL_2 (231 only) ----------------------------------------------- */
#define RX_SAFE_MODE (1 << 7)
#define OQPSK_DATA_RATE_SHIFT 0
#define OQPSK_DATA_RATE_MASK 3
enum {
OQPSK_DATA_RATE_250 = 0, /* reset default */
OQPSK_DATA_RATE_500 = 1,
OQPSK_DATA_RATE_1000 = 2,
OQPSK_DATA_RATE_2000 = 3
};
/* --- ANT_DIV (231 only) -------------------------------------------------- */
#define ANT_SEL (1 << 7)
#define ANT_DIV_EN (1 << 3)
#define ANT_EXT_SW_EN (1 << 2)
#define ANT_CTRL_SHIFT 0
#define ANT_CTRL_MASK 3
enum {
ANT_CTRL_ANT_0 = 1,
ANT_CTRL_ANT_1 = 2,
ANT_CTRL_NODIV = 3, /* reset default */
};
/* --- IRQ_MASK/IRQ_STATUS ------------------------------------------------- */
enum {
IRQ_PLL_LOCK = 1 << 0,
IRQ_PLL_UNLOCK = 1 << 1,
IRQ_RX_START = 1 << 2,
IRQ_TRX_END = 1 << 3,
IRQ_CCA_ED_DONE = 1 << 4, /* 231 only */
IRQ_AMI = 1 << 5, /* 231 only */
IRQ_TRX_UR = 1 << 6,
IRQ_BAT_LOW = 1 << 7
};
/* --- VREG_CTRL ----------------------------------------------------------- */
#define AVREG_EXT (1 << 7)
#define AVDD_OK (1 << 6)
#define DVREG_EXT (1 << 3)
#define DVDD_OK (1 << 2)
/* --- BATMON -------------------------------------------------------------- */
#define BATMON_OK (1 << 5)
#define BATMON_HR (1 << 4)
#define BATMON_VTH_SHIFT 0
#define BATMON_VTH_MASK 0x0f
/* --- XOSC_CTRL ----------------------------------------------------------- */
#define XTAL_MODE_SHIFT 4
#define XTAL_MODE_MASK 0x0f
enum {
XTAL_MODE_OFF = 0x0, /* 230 only */
XTAL_MODE_EXT = 0x4,
XTAL_MODE_INT = 0xf /* reset default */
};
#define XTAL_TRIM_SHIFT 4
#define XTAL_TRIM_MASK 0x0f
/* --- RX_SYN (231 only) --------------------------------------------------- */
#define RX_PDT_DIS (1 << 7)
#define RX_PDT_LEVEL_SHIFT 0
#define RX_PDT_LEVEL_MASK 0xf
/* --- XAH_CTRL_1 (231 only) ----------------------------------------------- */
#define AACK_FLTR_RES_FT (1 << 5)
#define AACK_UPLD_RES_FT (1 << 4)
#define AACK_ACK_TIME (1 << 2)
#define AACK_PROM_MODE (1 << 1)
/* --- FTN_CTRL (231 only) ------------------------------------------------- */
#define FTN_START (1 << 7)
/* --- PLL_CF -------------------------------------------------------------- */
#define PLL_CF_START (1 << 7)
/* --- PLL_DCU ------------------------------------------------------------- */
#define PLL_DCU_START (1 << 7)
/* --- XAH_CTRL_0 (XAH_CTRL in 230) ---------------------------------------- */
#define MAX_FRAME_RETRIES_SHIFT 4
#define MAX_FRAME_RETRIES_MASK 0x0f
#define MAX_CSMA_RETRIES_SHIFT 1
#define MAX_CSMA_RETRIES_MASK 0x07
#define SLOTTED_OPERATION (1 << 0) /* 231 only */
/* --- CSMA_SEED_1 --------------------------------------------------------- */
#define MIN_BE_SHIFT_230 6 /* 230 location */
#define MIN_BE_MASK_230 3
#define AACK_FVN_MODE_SHIFT 6 /* 231 only */
#define AACK_FVN_MODE_MASK 3
enum {
AACK_FVN_MODE_0 = 0,
AACK_FVN_MODE_01 = 1, /* reset default */
AACK_FVN_MODE_012 = 2,
AACK_FVN_MODE_ANY = 3
};
#define AACK_SET_PD (1 << 5)
#define AACK_DIS_ACK (1 << 4) /* 231 only */
#define I_AM_COORD (1 << 3)
#define CSMA_SEED_1_SHIFT 0
#define CSMA_SEED_1_MASK 7
/* --- CSMA_BE ------------------------------------------------------------- */
#define MAX_BE_SHIFT 4
#define MAX_BE_MASK 0x0f
#define MIN_BE_SHIFT 0 /* 231 location */
#define MIN_BE_MASK 0x0f
/* --- REG_CONT_TX_0 ------------------------------------------------------- */
#define CONT_TX_MAGIC 0x0f
/* --- REG_CONT_TX_1 (230 only) -------------------------------------------- */
#define CONT_TX_MOD 0x00 /* modulated */
#define CONT_TX_M2M 0x10 /* f_CH-2 MHz */
#define CONT_TX_M500K 0x80 /* f_CH-0.5 MHz */
#define CONT_TX_P500K 0xc0 /* f_CH+0.5 MHz */
#endif /* !AT86RF230_H */

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@ -0,0 +1,84 @@
/*
* include/atusb/ep0.h - EP0 extension protocol
*
* Written 2008-2011 by Werner Almesberger
* Copyright 2008-2011 Werner Almesberger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef EP0_H
#define EP0_H
/*
* Direction bRequest wValue wIndex wLength
*
* ->host ATUSB_ID - - 3
* ->host ATUSB_BUILD - - #bytes
* host-> ATUSB_RESET - - 0
*
* host-> ATUSB_RF_RESET - - 0
* ->host ATUSB_POLL_INT - - 1
* host-> ATUSB_TEST - - 0
*
* host-> ATUSB_REG_WRITE value addr 0
* ->host ATUSB_REG_READ - addr 1
* host-> ATUSB_BUF_WRITE - - #bytes
* ->host ATUSB_BUF_READ - - #bytes
* host-> ATUSB_SRAM_WRITE - addr #bytes
* ->host ATUSB_SRAM_READ - addr #bytes
*/
/*
* EP0 protocol:
*
* 0.0 initial release
* 0.1 addition of ATUSB_TEST
*/
#define EP0ATUSB_MAJOR 0 /* EP0 protocol, major revision */
#define EP0ATUSB_MINOR 1 /* EP0 protocol, minor revision */
#define HW_TYPE_100813 0 /* 2010-08-13 */
#define HW_TYPE_101216 1 /* 2010-12-16 */
#define HW_TYPE_110131 2 /* 2011-01-31, ATmega32U2-based */
/*
* bmRequestType:
*
* D7 D6..5 D4...0
* | | |
* direction (0 = host->dev)
* type (2 = vendor)
* recipient (0 = device)
*/
#define ATUSB_TO_DEV(req) (0x40 | (req) << 8)
#define ATUSB_FROM_DEV(req) (0xc0 | (req) << 8)
enum atspi_requests {
ATUSB_ID = 0x00,
ATUSB_BUILD,
ATUSB_RESET,
ATUSB_RF_RESET = 0x10,
ATUSB_POLL_INT,
ATUSB_TEST,
ATUSB_REG_WRITE = 0x20,
ATUSB_REG_READ,
ATUSB_BUF_WRITE,
ATUSB_BUF_READ,
ATUSB_SRAM_WRITE,
ATUSB_SRAM_READ,
};
void ep0_init(void);
#endif /* !EP0_H */

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/*
* include/atusb/usb-ids.h - USB vendor and product IDs
*
* Written 2009, 2010 by Werner Almesberger
* Copyright 2009, 2010 Werner Almesberger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef USB_IDS_H
#define USB_IDS_H
/*
* Platform-specific settings
*
* USB_VENDOR = Qi Hardware
* USB_PRODUCT = 802.15.4, device 0
* -- - -
*/
#define USB_VENDOR 0x20b7 /* Qi Hardware */
#define USB_PRODUCT 0x1540 /* ben-wpan, AT86RF230-based */
#endif /* !USB_IDS_H */

432
atusb-sil/usb.sch Normal file
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EESchema Schematic File Version 2 date Sun Jan 23 01:33:33 2011
LIBS:power
LIBS:device
LIBS:conn
LIBS:at86rf231
LIBS:c8051f326
LIBS:usb_a_plug
LIBS:xtal-4
LIBS:antenna
LIBS:balun-smt6
LIBS:atusb-cache
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 2 3
Title "IEEE 802.15.4 USB Transceiver (AT86RF230)"
Date "23 jan 2011"
Rev "20110123"
Comp "Werner Almesberger"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
NoConn ~ 7200 1800
Text Notes 2600 5000 0 60 ~ 0
USB 2.0 limits the capacitative load\non full-speed drivers to 50 pF.
Wire Notes Line
6950 900 6900 900
Wire Notes Line
6900 900 6900 1450
Wire Wire Line
6900 1600 6900 1800
Wire Wire Line
8600 3200 9800 3200
Wire Wire Line
9800 1600 7650 1600
Wire Wire Line
8600 3050 9800 3050
Wire Wire Line
9800 1450 7500 1450
Wire Wire Line
7500 1450 7500 1800
Wire Wire Line
9800 1300 7350 1300
Wire Wire Line
7350 1300 7350 1800
Wire Wire Line
5600 1150 5600 2750
Wire Wire Line
5600 1150 6050 1150
Wire Wire Line
6050 900 5850 900
Wire Wire Line
6750 1800 6750 900
Wire Wire Line
5800 2900 5600 2900
Wire Wire Line
6400 6150 6400 5500
Wire Wire Line
6400 5500 6600 5500
Wire Wire Line
6600 5500 6600 6150
Wire Wire Line
6900 6150 6900 4600
Wire Wire Line
6750 4800 5600 4800
Connection ~ 5600 3650
Wire Wire Line
5600 4800 5600 3650
Wire Wire Line
3700 4550 3700 4750
Wire Wire Line
3100 4550 3100 4750
Connection ~ 3400 3050
Wire Wire Line
3400 4050 3400 3050
Wire Wire Line
5150 4900 5150 5100
Wire Wire Line
5150 3350 5800 3350
Wire Wire Line
1200 2900 1000 2900
Wire Wire Line
1200 3350 1000 3350
Connection ~ 1000 3350
Wire Wire Line
1000 2900 1000 3550
Wire Wire Line
2550 3550 2550 3350
Wire Wire Line
2350 3050 4000 3050
Wire Wire Line
5800 3500 5150 3500
Connection ~ 5150 3500
Wire Wire Line
4750 4900 4750 5100
Wire Wire Line
3100 4050 3100 3200
Connection ~ 3100 3200
Wire Wire Line
2350 2900 3700 2900
Wire Wire Line
3400 4550 3400 4750
Wire Wire Line
3700 3650 5800 3650
Connection ~ 3700 3650
Connection ~ 4750 3650
Wire Wire Line
6750 6150 6750 4600
Connection ~ 6750 4800
Wire Wire Line
7050 4600 7050 6150
Wire Wire Line
8100 4600 8100 4800
Wire Wire Line
5800 3200 4150 3200
Wire Wire Line
4150 3200 4000 3050
Wire Wire Line
2350 3200 4000 3200
Wire Wire Line
4000 3200 4150 3050
Wire Wire Line
4150 3050 5800 3050
Wire Wire Line
5600 2750 5800 2750
Wire Wire Line
4750 4500 4750 3650
Wire Wire Line
5150 2700 5150 4500
Connection ~ 5150 3350
Wire Wire Line
3700 2900 3700 4050
Wire Wire Line
6750 900 6550 900
Wire Wire Line
5250 900 5450 900
Wire Wire Line
2550 3350 2350 3350
Wire Wire Line
7650 1600 7650 1800
Wire Wire Line
8600 3350 9800 3350
Wire Notes Line
6850 900 8300 900
Text Notes 6850 850 0 60 ~ 0
ID: open 1008xx, GND: 1012xx
$Comp
L GND #PWR03
U 1 1 4CF859A9
P 6900 1600
F 0 "#PWR03" H 6900 1600 30 0001 C CNN
F 1 "GND" H 6900 1530 30 0001 C CNN
1 6900 1600
-1 0 0 1
$EndComp
NoConn ~ 7050 1800
NoConn ~ 8600 3500
$Comp
L C8051F326 U1
U 1 1 4C609C36
P 7200 3200
F 0 "U1" H 6200 4400 60 0000 C CNN
F 1 "C8051F326" H 7200 3200 60 0000 C CNN
F 2 "QFN28-SiLabs" H 7200 3200 60 0001 C CNN
1 7200 3200
1 0 0 -1
$EndComp
NoConn ~ 7200 4600
NoConn ~ 7350 4600
$Comp
L USB_A_PLUG~ CON1
U 1 1 4CF4AD1B
P 1750 3150
F 0 "CON1" H 1950 3600 60 0000 C CNN
F 1 "USB_A_PLUG " H 1750 2750 60 0000 C CNN
1 1750 3150
-1 0 0 -1
$EndComp
Text Notes 5750 6700 0 60 ~ 0
Space P11 through P14 at 100 mil interval close to board edge\nto allow use with a 0.1" header soldered to the board.
Text Label 2550 3200 0 60 ~ 0
D+
Text Label 2550 3050 0 60 ~ 0
D-
Text Notes 1100 1200 0 200 ~ 40
USB
$Comp
L VDD #PWR04
U 1 1 4C64122B
P 5150 2700
F 0 "#PWR04" H 5150 2800 30 0001 C CNN
F 1 "VDD" H 5150 2810 30 0000 C CNN
1 5150 2700
1 0 0 -1
$EndComp
$Comp
L GND #PWR05
U 1 1 4C6408C7
P 5150 5100
F 0 "#PWR05" H 5150 5100 30 0001 C CNN
F 1 "GND" H 5150 5030 30 0001 C CNN
1 5150 5100
1 0 0 -1
$EndComp
$Comp
L GND #PWR06
U 1 1 4C6408C5
P 4750 5100
F 0 "#PWR06" H 4750 5100 30 0001 C CNN
F 1 "GND" H 4750 5030 30 0001 C CNN
1 4750 5100
1 0 0 -1
$EndComp
$Comp
L GND #PWR07
U 1 1 4C6408BA
P 5600 2900
F 0 "#PWR07" H 5600 2900 30 0001 C CNN
F 1 "GND" H 5600 2830 30 0001 C CNN
1 5600 2900
0 1 1 0
$EndComp
$Comp
L GND #PWR08
U 1 1 4C6408AD
P 5250 900
F 0 "#PWR08" H 5250 900 30 0001 C CNN
F 1 "GND" H 5250 830 30 0001 C CNN
1 5250 900
0 1 -1 0
$EndComp
$Comp
L GND #PWR09
U 1 1 4C6408A8
P 8100 4800
F 0 "#PWR09" H 8100 4800 30 0001 C CNN
F 1 "GND" H 8100 4730 30 0001 C CNN
1 8100 4800
1 0 0 -1
$EndComp
$Comp
L GND #PWR010
U 1 1 4C6408A3
P 6400 6150
F 0 "#PWR010" H 6400 6150 30 0001 C CNN
F 1 "GND" H 6400 6080 30 0001 C CNN
1 6400 6150
1 0 0 -1
$EndComp
$Comp
L GND #PWR011
U 1 1 4C64089F
P 2550 3550
F 0 "#PWR011" H 2550 3550 30 0001 C CNN
F 1 "GND" H 2550 3480 30 0001 C CNN
1 2550 3550
1 0 0 -1
$EndComp
$Comp
L GND #PWR012
U 1 1 4C640899
P 1000 3550
F 0 "#PWR012" H 1000 3550 30 0001 C CNN
F 1 "GND" H 1000 3480 30 0001 C CNN
1 1000 3550
1 0 0 -1
$EndComp
$Comp
L GND #PWR013
U 1 1 4C640896
P 3700 4750
F 0 "#PWR013" H 3700 4750 30 0001 C CNN
F 1 "GND" H 3700 4680 30 0001 C CNN
1 3700 4750
1 0 0 -1
$EndComp
$Comp
L GND #PWR014
U 1 1 4C64088F
P 3400 4750
F 0 "#PWR014" H 3400 4750 30 0001 C CNN
F 1 "GND" H 3400 4680 30 0001 C CNN
1 3400 4750
1 0 0 -1
$EndComp
$Comp
L GND #PWR015
U 1 1 4C64088A
P 3100 4750
F 0 "#PWR015" H 3100 4750 30 0001 C CNN
F 1 "GND" H 3100 4680 30 0001 C CNN
1 3100 4750
1 0 0 -1
$EndComp
Text Label 6600 5950 1 60 ~ 0
GND
Text Label 7050 5950 1 60 ~ 0
C2D
Text Label 6750 5950 1 60 ~ 0
VBUS
Text Label 6900 5950 1 60 ~ 0
C2CK
Text HLabel 9800 1450 2 60 Output ~ 0
nRST_RF
Text HLabel 9800 1300 2 60 Output ~ 0
SLP_TR
$Comp
L VR VR3
U 1 1 4C64034D
P 3700 4300
F 0 "VR3" V 3780 4300 50 0000 C CNN
F 1 "5V6" V 3700 4300 50 0000 C CNN
F 2 "0402" H 3700 4300 60 0001 C CNN
F 4 "33pF" V 3600 4400 50 0000 C CNN "Field4"
1 3700 4300
-1 0 0 -1
$EndComp
$Comp
L VR VR2
U 1 1 4C640343
P 3400 4300
F 0 "VR2" V 3480 4300 50 0000 C CNN
F 1 "5V6" V 3400 4300 50 0000 C CNN
F 2 "0402" H 3400 4300 60 0001 C CNN
F 4 "33pF" V 3300 4400 50 0000 C CNN "Field4"
1 3400 4300
-1 0 0 -1
$EndComp
$Comp
L VR VR1
U 1 1 4C6402FB
P 3100 4300
F 0 "VR1" V 3180 4300 50 0000 C CNN
F 1 "5V6" V 3100 4300 50 0000 C CNN
F 2 "0402" H 3100 4300 60 0001 C CNN
F 4 "33pF" V 3000 4400 50 0000 C CNN "Field4"
1 3100 4300
-1 0 0 -1
$EndComp
$Comp
L R R1
U 1 1 4C6402F2
P 6300 900
F 0 "R1" V 6380 900 50 0000 C CNN
F 1 "68" V 6300 900 50 0000 C CNN
F 2 "0402" H 6300 900 60 0001 C CNN
1 6300 900
0 -1 -1 0
$EndComp
$Comp
L LED D1
U 1 1 4C6402EE
P 5650 900
F 0 "D1" H 5650 1000 50 0000 C CNN
F 1 "LTST-C190KRKT" H 5650 800 50 0000 C CNN
F 2 "0603" H 5650 900 60 0001 C CNN
1 5650 900
-1 0 0 -1
$EndComp
Text HLabel 6050 1150 2 60 Input ~ 0
IRQ_RF
Text HLabel 9800 3350 2 60 Output ~ 0
nSS
Text HLabel 9800 1600 2 60 Output ~ 0
SCLK
Text HLabel 9800 3200 2 60 Output ~ 0
MOSI
Text HLabel 9800 3050 2 60 Input ~ 0
MISO
$Comp
L CONN_1 P14
U 1 1 4C640203
P 6600 6300
F 0 "P14" H 6680 6300 40 0000 L CNN
F 1 "CONN_1" H 6600 6355 30 0001 C CNN
F 2 "PAD_60x60" H 6600 6300 60 0001 C CNN
1 6600 6300
0 1 1 0
$EndComp
$Comp
L CONN_1 P13
U 1 1 4C640202
P 7050 6300
F 0 "P13" H 7130 6300 40 0000 L CNN
F 1 "CONN_1" H 7050 6355 30 0001 C CNN
F 2 "PAD_60x60" H 7050 6300 60 0001 C CNN
1 7050 6300
0 1 1 0
$EndComp
$Comp
L CONN_1 P12
U 1 1 4C640200
P 6900 6300
F 0 "P12" H 6980 6300 40 0000 L CNN
F 1 "CONN_1" H 6900 6355 30 0001 C CNN
F 2 "PAD_60x60" H 6900 6300 60 0001 C CNN
1 6900 6300
0 1 1 0
$EndComp
$Comp
L CONN_1 P11
U 1 1 4C6401FE
P 6750 6300
F 0 "P11" H 6830 6300 40 0000 L CNN
F 1 "CONN_1" H 6750 6355 30 0001 C CNN
F 2 "PAD_60x60" H 6750 6300 60 0001 C CNN
1 6750 6300
0 1 1 0
$EndComp
$Comp
L C C2
U 1 1 4C6401B3
P 5150 4700
F 0 "C2" H 5200 4800 50 0000 L CNN
F 1 "100nF" H 5200 4600 50 0000 L CNN
F 2 "0402" H 5150 4700 60 0001 C CNN
1 5150 4700
1 0 0 -1
$EndComp
$Comp
L C C1
U 1 1 4C6401AA
P 4750 4700
F 0 "C1" H 4800 4800 50 0000 L CNN
F 1 "1uF" H 4800 4600 50 0000 L CNN
F 2 "0402" H 4750 4700 60 0001 C CNN
1 4750 4700
1 0 0 -1
$EndComp
$EndSCHEMATC