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great atusd -> atben renaming: renamed design files and some references
- atben/TODO: changed all occurrences of "atusd" to "atben" - atben/TODO: added reminder that the file isn't current anymore - atben/Makefile (NAME): changed project name from "atusd" to "atben" - atben/atusd.brd: renamed to atben/atben.brd - atben/atusd.cmp: renamed to atben/atben.cmp - atben/atusd.pro: renamed to atben/atben.pro - atben/atusd.sch: renamed to atben/atben.sch
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TODO
12
TODO
@ -1,3 +1,5 @@
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*** NEEDS UPDATING ***
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General
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General
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=======
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=======
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@ -35,9 +37,9 @@ inside a Ben.
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Update: following Rikard Lindstrom's revelation that we can use the uSD slot
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Update: following Rikard Lindstrom's revelation that we can use the uSD slot
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also just as general GPIOs, the variant that goes inside the Ben can wait a
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also just as general GPIOs, the variant that goes inside the Ben can wait a
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bit and the atusd board for insertion into the uSD slot is being worked on
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bit and the atben board for insertion into the uSD slot is being worked on
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first. We can verify most of the design of a fully integrated board with the
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first. We can verify most of the design of a fully integrated board with the
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atusd board and the latter will be of greater immediate use.
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atben board and the latter will be of greater immediate use.
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Things done
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Things done
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@ -50,11 +52,11 @@ Things done
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- replace discrete balun and filter with integrated solution, to reduce BOM
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- replace discrete balun and filter with integrated solution, to reduce BOM
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size, maybe cost, insertion loss, and PCB space (see ATRF/ECN0003)
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size, maybe cost, insertion loss, and PCB space (see ATRF/ECN0003)
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Done for atusd. At a first glamce, does not seem to affect performance.
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Done for atben. At a first glamce, does not seem to affect performance.
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- check if we really need three DC blocking caps in the RF path
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- check if we really need three DC blocking caps in the RF path
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Reduced to two in atusd without apparent ill effects.
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Reduced to two in atben without apparent ill effects.
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Things not done yet
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Things not done yet
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@ -89,7 +91,7 @@ Things not done yet
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- implement sleep mode
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- implement sleep mode
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- (atusd) verify SPI signal timing, particularly the data clock
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- (atben) verify SPI signal timing, particularly the data clock
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ccrf
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ccrf
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@ -1,6 +1,6 @@
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PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones
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PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones
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NAME = atusd
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NAME = atben
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.PHONY: all gen generate sch brd xpdf front back clean
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.PHONY: all gen generate sch brd xpdf front back clean
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@ -1,4 +1,4 @@
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update=Sun Jan 16 19:49:04 2011
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update=Mon Jan 17 10:53:40 2011
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last_client=pcbnew
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last_client=pcbnew
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[eeschema]
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[eeschema]
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version=1
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version=1
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