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atusb/fw/include/at86rf230.h: added remaining AT86RF231 values
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@ -82,7 +82,7 @@ enum {
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REG_CSMA_BE = 0x2f, /* 231 only */
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REG_CONT_TX_0 = 0x36,
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REG_CONT_TX_1 = 0x3d,
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REG_CONT_TX_1 = 0x3d, /* 230 only */
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};
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/* --- TRX_STATUS --- ------------------------------------------------------ */
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@ -180,7 +180,7 @@ enum {
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#define PA_EXT_EN (1 << 8)
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#define IRQ_2_EXT_EN (1 << 7)
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#define TX_AUTO_CRC_ON_231 (1 << 6) /* 231 */
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#define TX_AUTO_CRC_ON_231 (1 << 6) /* 231 location */
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#define SPI_CMD_MODE_SHIFT 2
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#define SPI_CMD_MODE_MASK 3
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@ -195,9 +195,9 @@ enum {
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#define IRQ_MASK_MODE (1 << 1)
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#define IRQ_POLARITY (1 << 0)
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/* --- PHY_TX_PWR -====----------------------------------------------------- */
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/* --- PHY_TX_PWR ---------------------------------------------------------- */
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#define TX_AUTO_CRC_ON (1 << 7) /* 230 */
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#define TX_AUTO_CRC_ON (1 << 7) /* 230 location */
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#define TX_PWR_SHIFT 0
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#define TX_PWR_MASK 0x0f
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@ -206,6 +206,9 @@ enum {
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#define RX_CRC_VALID (1 << 7)
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#define RND_VALUE_SHIFT 5 /* 231 */
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#define RND_VALUE_MASK 3
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#define RSSI_SHIFT 0
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#define RSSI_MASK 0x1f
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@ -216,6 +219,13 @@ enum {
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#define CCA_MODE_SHIFT 5
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#define CCA_MODE_MASK 3
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enum {
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CCA_MODE_CARRIER_OR_ENERGY = 0, /* 231 only */
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CCA_MODE_ENERGY = 1,
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CCA_MODE_CARRIER = 2,
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CCA_MODE_CARRIER_AND_ENERGY = 3
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};
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#define CHANNEL_SHIFT 0
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#define CHANNEL_MASK 0x1f
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@ -224,6 +234,30 @@ enum {
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#define CCA_ED_THRES_SHIFT 0
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#define CCA_ED_THRES_MASK 0x0f
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/* --- RX_CTRL (231 only) -------------------------------------------------- */
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#define PDT_THRES_SHIFT 0
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#define PDT_THRES_MASK 0x0f
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enum {
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PDT_THRES_DEFAULT = 0x07, /* reset default */
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PDT_THRES_DIVERSITY = 0x03,
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};
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/* --- TRX_CTRL_2 (231 only) ----------------------------------------------- */
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#define RX_SAFE_MODE (1 << 7)
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#define OQPSK_DATA_RATE_SHIFT 0
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#define OQPSK_DATA_RATE_MASK 3
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enum {
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OQPSK_DATA_RATE_250 = 0, /* reset default */
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OQPSK_DATA_RATE_500 = 1,
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OQPSK_DATA_RATE_1000 = 2,
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OQPSK_DATA_RATE_2000 = 3
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};
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/* --- IRQ_MASK/IRQ_STATUS ------------------------------------------------- */
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enum {
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@ -231,6 +265,8 @@ enum {
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IRQ_PLL_UNLOCK = 1 << 1,
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IRQ_RX_START = 1 << 2,
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IRQ_TRX_END = 1 << 3,
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IRQ_CCA_ED_DONE = 1 << 4, /* 231 only */
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IRQ_AMI = 1 << 5, /* 231 only */
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IRQ_TRX_UR = 1 << 6,
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IRQ_BAT_LOW = 1 << 7
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};
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@ -256,7 +292,7 @@ enum {
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#define XTAL_MODE_MASK 0x0f
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enum {
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XTAL_MODE_OFF = 0x0,
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XTAL_MODE_OFF = 0x0, /* 230 only */
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XTAL_MODE_EXT = 0x4,
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XTAL_MODE_INT = 0xf /* reset default */
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};
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@ -264,13 +300,23 @@ enum {
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#define XTAL_TRIM_SHIFT 4
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#define XTAL_TRIM_MASK 0x0f
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/* --- XAH_CTRL ------------------------------------------------------------ */
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/* --- RX_SYN (231 only) --------------------------------------------------- */
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#define MAX_FRAME_RETRIES_SHIFT 4
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#define MAX_FRAME_RETRIES_MASK 0x0f
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#define RX_PDT_DIS (1 << 7)
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#define MAX_CSMA_RETRIES_SHIFT 1
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#define MAX_CSMA_RETRIES_MASK 0x07
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#define RX_PDT_LEVEL_SHIFT 0
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#define RX_PDT_LEVEL_MASK 0xf
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/* --- XAH_CTRL_1 (231 only) ----------------------------------------------- */
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#define AACK_FLTR_RES_FT (1 << 5)
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#define AACK_UPLD_RES_FT (1 << 4)
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#define AACK_ACK_TIME (1 << 2)
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#define AACK_PROM_MODE (1 << 1)
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/* --- FTN_CTRL (231 only) ------------------------------------------------- */
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#define FTN_START (1 << 7)
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/* --- PLL_CF -------------------------------------------------------------- */
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@ -280,10 +326,30 @@ enum {
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#define PLL_DCU_START (1 << 7)
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/* --- XAH_CTRL_0 (XAH_CTRL in 230) ---------------------------------------- */
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#define MAX_FRAME_RETRIES_SHIFT 4
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#define MAX_FRAME_RETRIES_MASK 0x0f
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#define MAX_CSMA_RETRIES_SHIFT 1
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#define MAX_CSMA_RETRIES_MASK 0x07
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#define SLOTTED_OPERATION (1 << 0) /* 231 only */
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/* --- CSMA_SEED_1 --------------------------------------------------------- */
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#define MIN_BE_SHIFT 6
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#define MIN_BE_MASK 3
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#define MIN_BE_SHIFT_230 6 /* 230 location */
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#define MIN_BE_MASK_230 3
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#define AACK_FVN_MODE_SHIFT 6 /* 231 only */
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#define AACK_FVN_MODE_MASK 3
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enum {
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AACK_FVN_MODE_0 = 0,
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AACK_FVN_MODE_01 = 1, /* reset default */
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AACK_FVN_MODE_012 = 2,
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AACK_FVN_MODE_ANY = 3
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};
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#define AACK_SET_PD (1 << 5)
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@ -292,11 +358,19 @@ enum {
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#define CSMA_SEED_1_SHIFT 0
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#define CSMA_SEED_1_MASK 7
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/* --- CSMA_BE ------------------------------------------------------------- */
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#define MAX_BE_SHIFT 4
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#define MAX_BE_MASK 0x0f
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#define MIN_BE_SHIFT 0 /* 231 location */
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#define MIN_BE_MASK 0x0f
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/* --- REG_CONT_TX_0 ------------------------------------------------------- */
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#define CONT_TX_MAGIC 0x0f
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/* --- REG_CONT_TX_1 ------------------------------------------------------- */
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/* --- REG_CONT_TX_1 (230 only) -------------------------------------------- */
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#define CONT_TX_MOD 0x00 /* modulated */
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#define CONT_TX_M2M 0x10 /* f_CH-2 MHz */
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