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mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-06-28 23:30:43 +03:00

prod/doc: some initial test process documentation (still very incomplete)

This commit is contained in:
Werner Almesberger 2011-05-17 21:57:18 -03:00
parent 601d1bf173
commit d0ab9d92c2
4 changed files with 371 additions and 0 deletions

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prod/doc/Makefile Normal file
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PNGS=flow.png setup-A.png setup-B.png setup-C.png setup-D.png
all: $(PNGS)
flow.png: flow.fig
fig2dev -L png -m 0.7 -S 4 $< $@ || { rm -f $@; exit 1; }
setup-%.png: setup.fig
./figfilt `echo $@ | tr -cd 'A-Z'` $< | \
fig2dev -L png -m 0.7 -S 4 >$@ || \
{ rm -f $@; exit 1; }
clean:
rm -f $(PNGS)

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#FIG 3.2 Produced by xfig version 3.2.5b
Landscape
Center
Metric
A4
100.00
Single
-2
1200 2
6 2205 2205 4545 3195
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
2250 2250 4500 2250 4500 3150 2250 3150 2250 2250
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2385 2250 2385 3150
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
4365 2250 4365 3150
-6
6 2205 5355 4545 6345
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
2250 5400 4500 5400 4500 6300 2250 6300 2250 5400
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2385 5400 2385 6300
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
4365 5400 4365 6300
-6
6 2205 630 4545 1620
5 1 0 3 0 7 50 -1 -1 0.000 0 1 0 0 2700.000 1125.000 2700 675 2250 1125 2700 1575
5 1 0 3 0 7 50 -1 -1 0.000 0 0 0 0 4050.000 1125.000 4050 675 4500 1125 4050 1575
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2700 675 4050 675
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2700 1575 4050 1575
-6
6 2205 8505 4545 9495
5 1 0 3 0 7 50 -1 -1 0.000 0 1 0 0 2700.000 9000.000 2700 8550 2250 9000 2700 9450
5 1 0 3 0 7 50 -1 -1 0.000 0 0 0 0 4050.000 9000.000 4050 8550 4500 9000 4050 9450
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2700 8550 4050 8550
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2700 9450 4050 9450
-6
6 5805 6930 8145 7920
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
5850 6975 8100 6975 8100 7875 5850 7875 5850 6975
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
5985 6975 5985 7875
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
7965 6975 7965 7875
-6
6 5805 5355 8145 6345
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
5850 5400 8100 5400 8100 6300 5850 6300 5850 5400
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
5985 5400 5985 6300
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
7965 5400 7965 6300
-6
6 5805 2205 8145 3195
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
5850 2250 8100 2250 8100 3150 5850 3150 5850 2250
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
5985 2250 5985 3150
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
7965 2250 7965 3150
-6
6 5805 3780 8145 4770
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
5850 3825 8100 3825 8100 4725 5850 4725 5850 3825
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
5985 3825 5985 4725
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
7965 3825 7965 4725
-6
6 11205 8505 13545 9495
5 1 0 3 0 7 50 -1 -1 0.000 0 1 0 0 11700.000 9000.000 11700 8550 11250 9000 11700 9450
5 1 0 3 0 7 50 -1 -1 0.000 0 0 0 0 13050.000 9000.000 13050 8550 13500 9000 13050 9450
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
11700 8550 13050 8550
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
11700 9450 13050 9450
-6
2 3 0 3 0 7 50 -1 -1 0.000 1 0 -1 0 0 5
3375 3825 2250 4275 3375 4725 4500 4275 3375 3825
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
3375 6300 3375 6975
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
3375 7875 3375 8550
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
4500 7425 5850 7425
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
8100 7425 9450 7425
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
5850 5850 4500 5850
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
3375 4725 3375 5400
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 3
1 1 2.00 120.00 120.00
10575 6975 10575 5850 8100 5850
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
3375 3150 3375 3825
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
3375 1575 3375 2250
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
8775 7425 8775 5895
2 3 0 3 0 7 50 -1 -1 0.000 1 0 -1 0 0 5
10575 3825 9450 4275 10575 4725 11700 4275 10575 3825
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 3
1 1 2.00 120.00 120.00
10575 3825 10575 2700 8100 2700
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
5850 2700 4500 2700
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
8100 4275 9450 4275
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
8775 2655 8775 1350
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
9225 2700 9225 1350
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
8775 5805 8775 4320
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
8775 4230 8775 2745
2 3 0 3 0 7 50 -1 -1 0.000 1 0 -1 0 0 5
10575 6975 9450 7425 10575 7875 11700 7425 10575 6975
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 3
1 1 2.00 120.00 120.00
11700 7425 12375 7425 12375 8550
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 3
1 1 2.00 120.00 120.00
11700 4275 12375 4275 12375 7425
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
1 1 2.00 120.00 120.00
4500 4275 5850 4275
2 3 0 3 0 7 50 -1 -1 0.000 1 0 -1 0 0 5
3375 6975 2250 7425 3375 7875 4500 7425 3375 6975
2 2 0 4 4 7 55 -1 -1 0.000 0 0 -1 0 0 5
1800 1935 12825 1935 12825 5130 1800 5130 1800 1935
4 1 0 50 -1 18 18 0.0000 4 210 1395 3375 1215 From SMT\001
4 1 0 50 -1 18 18 0.0000 4 210 750 3375 2655 Flash\001
4 1 0 50 -1 18 18 0.0000 4 210 1200 3375 2970 firmware\001
4 1 0 50 -1 18 18 0.0000 4 210 1410 3375 4365 Success ?\001
4 1 0 50 -1 18 18 0.0000 4 210 915 3375 7515 Pass ?\001
4 1 0 50 -1 18 18 0.0000 4 270 1095 6975 7515 Analyze\001
4 2 0 50 -1 18 18 0.0000 4 270 1425 1665 3690 atusb only\001
4 1 0 50 -1 18 18 0.0000 4 270 900 6975 5940 Repair\001
4 1 0 50 -1 18 18 0.0000 4 210 2370 8775 1215 Feedback to SMT\001
4 1 0 50 -1 18 18 0.0000 4 270 975 3375 9090 Accept\001
4 1 0 50 -1 18 18 0.0000 4 210 1425 3375 5805 Functional\001
4 1 0 50 -1 18 18 0.0000 4 195 510 3375 6120 test\001
4 1 0 50 -1 18 18 0.0000 4 270 1095 6975 4365 Analyze\001
4 1 0 50 -1 18 18 0.0000 4 270 900 6975 2790 Repair\001
4 1 0 50 -1 18 18 0.0000 4 210 1230 10575 4365 Fixable ?\001
4 1 0 50 -1 18 18 0.0000 4 210 1890 12375 9090 Discard/Defer\001
4 1 0 50 -1 18 18 0.0000 4 210 1230 10575 7515 Fixable ?\001
4 0 0 50 -1 18 18 0.0000 4 210 390 11700 4185 No\001
4 0 0 50 -1 18 18 0.0000 4 210 390 11700 7335 No\001
4 0 0 50 -1 18 18 0.0000 4 210 390 4500 4185 No\001
4 0 0 50 -1 18 18 0.0000 4 210 390 4500 7335 No\001
4 2 0 50 -1 18 18 0.0000 4 210 525 3240 4995 Yes\001
4 2 0 50 -1 18 18 0.0000 4 210 525 3240 8145 Yes\001
4 2 0 50 -1 18 18 0.0000 4 210 525 10440 6885 Yes\001
4 2 0 50 -1 18 18 0.0000 4 210 525 10440 3735 Yes\001

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<TITLE>Production and testing</TITLE>
<BODY>
<HTML>
<H1>Production and testing</H1>
This document gives a high-level description of the production test process
for <B>atben</B> and <B>atusb</B> boards, plus - in the case of <B>atusb</B>
the production steps required between the boards leaving the SMT line and the
actual testing.
<P>
The testing serves two purposes:
<OL>
<LI>Ascertain the correctness of the preceding production steps, and
<LI>identify suffering from random production flaws and either discard
them or prepare them for repair.
</OL>
The results of testing and fault analysis also provide feedback for the
SMT process and steps preceding it.
<P>
The following diagram illustrates the workflow:
<P>
<IMG src="flow.png">
<P>
Only <B>atusb</B> boards contain firmware and need flashing (which is
a two-step process, see below). The functional tests and further fault
analysis are largely the same for <B>atben</B> and <B>atusb</B>.
<P>
Devices accepted for further use can then be packaged for shipping.
Defective devices can be discarded or retained for a deeper analysis.
<H2>Terminology</H2>
<DL>
<DT>Ben</DT>
<DD>a device capable of hosting the <B>atben</B> and <B>atusb-pgm</B>
boards. In the production process, a Ben can perform three different
roles:
<OL>
<LI> Host an <B>atben</B> board acting as DUT
<LI> Host an <B>atben</B> board acting as reference
<LI> Host an <B>atusb-pgm</B> used for flashing the boot loader
</OL>
In this document, we assume that a single Ben is used in all
three roles, with the board in its 8:10 card slot changed as
the role requires.
<DT>PC</DT>
<DD>a device capable of connecting to a Ben via USB, and of hosting an
<B>atusb</B> board. In the production process, a PC can perform three
different roles:
<OL>
<LI> Host an <B>atusb</B> board acting as DUT
<LI> Host an <B>atusb</B> board acting as reference
<LI> Control a Ben via USB (for convenience)
</OL>
In this document, we assume that a single PC is used in all
three roles, with one USB host port permanently connecting to the
Ben, and a second USB host port populated with <B>atusb</B> boards
as needed.
<DT>DUT</DT>
<DD>Device Under Test. An <B>atben</B> or <B>atusb</B> board that
has left SMT, and is being prepared for testing or in the process
of being tested.
<DT>Reference</DT>
<DD>An <B>atben</B> or <B>atusb</B> device that is known to work and
and that acts as a peer for RF communication with the DUT.
<DT>SMT</DT>
<DD>In this context, the actual process of soldering components to
the unpopulated PCB, and all related tasks providing an input to
this process. Such related tasks include the configuration of the
SMT line, and testing and conditioning of the components to solder.
</DL>
<H2>Setup</H2>
<H3>PC software installation</H3>
<H3>Ben software installation</H3>
<H3>Ben software setup</H3>
<H3>Test profiles</H3>
<H2>Flashing (atusb only)<H2>
<H3>Flashing the boot loader</H3>
<P>
<IMG src="setup-C.png">
<P>
<H3>Flashing the application</H3>
<P>
<IMG src="setup-D.png">
<P>
<H2>Functional test</H2>
<H3>Test setup for atben</H3>
<P>
<IMG src="setup-A.png">
<P>
<H3>Test setup for atusb</H3>
<P>
<IMG src="setup-B.png">
<P>
<H3>Test procedure</H3>
<H2>Fault analysis</H2>
<H3>Component orientation</H3>
<H3>Clock frequency</H3>
<P>
<HR>
Last update: 2011-05-17&nbsp;&nbsp;<I>Werner Almesberger</I>
<HR>
</BODY>
</HTML>

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#FIG 3.2 Produced by xfig version 3.2.5b
Landscape
Center
Metric
A4
100.00
Single
-2
1200 2
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
3600 6300 4950 6300 4950 6975 3600 6975 3600 6300
2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 4
3600 6300 3825 5850 5175 5850 4950 6300
# A
2 3 0 1 4 4 60 -1 20 0.000 0 0 -1 0 0 7
4050 3960 3915 3960 3915 3690 4005 3690 4005 3870 4050 3870
4050 3960
# A
2 2 0 1 13 13 60 -1 20 0.000 0 0 -1 0 0 5
3600 6570 3330 6570 3330 6435 3600 6435 3600 6570
# B
2 3 0 1 13 13 70 -1 20 0.000 0 0 -1 0 0 7
4050 3960 3915 3960 3915 3690 4005 3690 4005 3870 4050 3870
4050 3960
# BD
2 2 0 1 4 4 70 -1 20 0.000 0 0 -1 0 0 5
3600 6570 3330 6570 3330 6435 3600 6435 3600 6570
# C
2 3 0 1 11 11 80 -1 20 0.000 0 0 -1 0 0 6
3600 3825 3330 3825 3330 3870 3375 3915 3600 3915 3600 3825
# C
2 2 0 1 4 4 80 -1 20 0.000 0 0 -1 0 0 5
3015 4365 2745 4365 2745 4230 3015 4230 3015 4365
# ABC
2 2 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
4050 3600 4725 3600 4725 4050 4050 4050 4050 3600
# ABC
3 2 0 3 1 7 55 -1 -1 0.000 0 0 0 5
4950 6525 5355 6210 5310 5265 5265 4095 4725 3690
0.000 -1.000 -1.000 -1.000 0.000
# C
3 2 0 3 1 7 85 -1 -1 0.000 0 0 0 3
4050 3915 3825 3915 3600 3870
0.000 -1.000 0.000
# A
4 2 0 60 -1 18 18 0.0000 4 270 1635 3780 3915 atben (DUT)\001
# A
4 2 0 60 -1 18 18 0.0000 4 270 1425 3150 6615 atusb (ref)\001
4 1 0 50 -1 18 18 0.0000 4 210 405 4275 6750 PC\001
# B
4 2 0 70 -1 18 18 0.0000 4 270 1425 3780 3915 atben (ref)\001
# BD
4 2 0 70 -1 18 18 0.0000 4 270 1635 3150 6615 atusb (DUT)\001
# C
4 2 0 80 -1 18 18 0.0000 4 270 1470 3915 3690 atusb-pgm\001
# C
4 2 0 80 -1 18 18 0.0000 4 270 1635 3960 4680 atusb (DUT)\001
# ABC
4 1 0 50 -1 18 18 0.0000 4 210 540 4365 3915 Ben\001