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93f0f403a7
- atusd/ERRATA: added errata section for version 20100908 - atusd/cam/doit: increase tool clearance from 1.5 mm to 2 mm - atusd/cam/pcb.pl (cut): cutting counter-clockwise did not reduce burr. Removed reversal of cutting direction. - atusd/cam/pcb.pl: made area selection formulas easier to understand
20 lines
695 B
Plaintext
20 lines
695 B
Plaintext
Version 20100903:
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- changed C7 to 1 nF to debug a signal attenuation problem. Turned out to be
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a bad trace. According to simulations, 22 pF should be more than enough.
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- added wire connecting uSD-side ground plane to ground plane at outer edge,
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to improve CLK signal return. (Probably unnecessary, too.)
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- the footprint of the transistor (Q1) is reversed :-( It works after
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converting the chip from SOT to PLCC.
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- not an erratum, but with experiments showing power-on reset to be
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reliable, we can consider removing the hardware reset circuit. This will
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also simplify the layout.
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Version 20100908:
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- SPI activity causes the PLL to unlock. Specifically, toggling nSEL does
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this.
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