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ben-wpan/atusd/ERRATA
Werner Almesberger 93f0f403a7 New atusd errata and a few small CAM updates.
- atusd/ERRATA: added errata section for version 20100908
- atusd/cam/doit: increase tool clearance from 1.5 mm to 2 mm
- atusd/cam/pcb.pl (cut): cutting counter-clockwise did not reduce burr.
  Removed reversal of cutting direction.
- atusd/cam/pcb.pl: made area selection formulas easier to understand
2010-09-09 09:23:18 -03:00

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Version 20100903:
- changed C7 to 1 nF to debug a signal attenuation problem. Turned out to be
a bad trace. According to simulations, 22 pF should be more than enough.
- added wire connecting uSD-side ground plane to ground plane at outer edge,
to improve CLK signal return. (Probably unnecessary, too.)
- the footprint of the transistor (Q1) is reversed :-( It works after
converting the chip from SOT to PLCC.
- not an erratum, but with experiments showing power-on reset to be
reliable, we can consider removing the hardware reset circuit. This will
also simplify the layout.
Version 20100908:
- SPI activity causes the PLL to unlock. Specifically, toggling nSEL does
this.