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git://projects.qi-hardware.com/board-qi-avt2.git
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Edited sdcw2012 (L3 & L5) library, swap pin 1~2~4.
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components/sdcw2012.bak
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24
components/sdcw2012.bak
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EESchema-LIBRARY Version 2.3 Date: 27/6/2009-06:27:56
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#
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# SDCW2012
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#
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DEF SDCW2012 L 0 40 Y N 1 F N
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F0 "L" -50 200 60 H V C C
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F1 "SDCW2012" 0 -100 60 H V C C
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DRAW
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A 25 -50 25 1 1799 0 1 0 N 50 -50 0 -50
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A -75 -50 25 1 1799 0 1 0 N -50 -50 -100 -50
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P 3 0 1 0 -100 50 50 50 50 50 N
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A -25 100 25 -1799 -1 0 1 0 N -50 100 0 100
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A -75 100 25 -1799 -1 0 1 0 N -100 100 -50 100
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A 25 100 25 -1799 -1 0 1 0 N 0 100 50 100
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P 3 0 1 0 -100 0 50 0 50 0 N
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A -25 -50 25 1 1799 0 1 0 N 0 -50 -50 -50
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X 4 4 100 -50 50 L 30 30 1 1 I
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X 3 3 100 100 50 L 30 30 1 1 I
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X 2 2 -150 -50 50 R 30 30 1 1 I
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X 1 1 -150 100 50 R 30 30 1 1 I
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ENDDRAW
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ENDDEF
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#
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#End Library
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3
components/sdcw2012.bck
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components/sdcw2012.bck
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EESchema-DOCLIB Version 2.0 Date: 27/6/2009-06:27:56
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#
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#End Doc Library
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2
components/sdcw2012.dcm
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2
components/sdcw2012.dcm
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EESchema-DOCLIB Version 2.0 Date: 27/6/2009-06:27:56
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EESchema-DOCLIB Version 2.0 Date: 19/9/2009-18:54:32
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#
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#End Doc Library
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22
components/sdcw2012.lib
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22
components/sdcw2012.lib
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EESchema-LIBRARY Version 2.3 Date: 27/6/2009-06:27:56
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EESchema-LIBRARY Version 2.3 Date: 19/9/2009-18:54:32
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#
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# SDCW2012
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#
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@ -6,18 +6,18 @@ DEF SDCW2012 L 0 40 Y N 1 F N
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F0 "L" -50 200 60 H V C C
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F1 "SDCW2012" 0 -100 60 H V C C
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DRAW
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A 25 -50 25 1 1799 0 1 0 N 50 -50 0 -50
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A -75 -50 25 1 1799 0 1 0 N -50 -50 -100 -50
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P 3 0 1 0 -100 50 50 50 50 50 N
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A -25 100 25 -1799 -1 0 1 0 N -50 100 0 100
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A -75 100 25 -1799 -1 0 1 0 N -100 100 -50 100
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A 25 100 25 -1799 -1 0 1 0 N 0 100 50 100
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P 3 0 1 0 -100 0 50 0 50 0 N
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A -25 -50 25 1 1799 0 1 0 N 0 -50 -50 -50
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X 4 4 100 -50 50 L 30 30 1 1 I
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P 3 0 1 0 -100 0 50 0 50 0 N
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A 25 100 25 -1799 -1 0 1 0 N 0 100 50 100
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A -75 100 25 -1799 -1 0 1 0 N -100 100 -50 100
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A -25 100 25 -1799 -1 0 1 0 N -50 100 0 100
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P 3 0 1 0 -100 50 50 50 50 50 N
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A -75 -50 25 1 1799 0 1 0 N -50 -50 -100 -50
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A 25 -50 25 1 1799 0 1 0 N 50 -50 0 -50
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X 2 2 100 -50 50 L 30 30 1 1 I
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X 3 3 100 100 50 L 30 30 1 1 I
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X 2 2 -150 -50 50 R 30 30 1 1 I
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X 1 1 -150 100 50 R 30 30 1 1 I
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X 1 1 -150 -50 50 R 30 30 1 1 I
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X 4 4 -150 100 50 R 30 30 1 1 I
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ENDDRAW
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ENDDEF
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#
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5431
main/Qi_AVT2.000
5431
main/Qi_AVT2.000
File diff suppressed because it is too large
Load Diff
@ -1,4 +1,4 @@
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PCBNEW-BOARD Version 1 date 19/9/2009-09:38:27
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PCBNEW-BOARD Version 1 date 19/9/2009-18:48:00
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$GENERAL
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LayerCount 2
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@ -3233,14 +3233,14 @@ $PAD
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Sh "1" R 276 591 0 0 900
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Dr 0 0 0
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At SMD N 00888000
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Ne 20 "/XTAL"
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Ne 19 "N-000011"
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Po -256 0
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$EndPAD
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$PAD
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Sh "2" R 276 591 0 0 900
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Dr 0 0 0
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At SMD N 00888000
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Ne 19 "N-000011"
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Ne 20 "/XTAL"
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Po 256 0
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$EndPAD
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$PAD
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@ -3275,14 +3275,14 @@ $PAD
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Sh "1" R 276 591 0 0 900
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Dr 0 0 0
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At SMD N 00888000
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Ne 22 "/RCLK"
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Ne 21 "/RCLKO"
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Po -256 0
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$EndPAD
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$PAD
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Sh "2" R 276 591 0 0 900
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Dr 0 0 0
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At SMD N 00888000
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Ne 21 "/RCLKO"
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Ne 22 "/RCLK"
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Po 256 0
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$EndPAD
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$PAD
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@ -1,3 +1,3 @@
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EESchema-DOCLIB Version 2.0 15/9/2009-18:56:07
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EESchema-DOCLIB Version 2.0 19/9/2009-18:55:24
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#
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#End Doc Library
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@ -1,4 +1,4 @@
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EESchema-LIBRARY Version 15/9/2009-18:56:07
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EESchema-LIBRARY Version 19/9/2009-18:55:24
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#
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#
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# BAT_CON
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@ -102,8 +102,8 @@ DRAW
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P 5 0 1 12 -50 50 50 50 50 -50 -50 -50 -50 50 f
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P 2 0 1 16 100 100 100 -100 N
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P 2 0 1 16 -100 100 -100 -100 N
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X 2 2 300 0 200 L 40 40 1 1 P
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X 1 1 -300 0 200 R 40 40 1 1 P
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X 1 1 300 0 200 L 40 40 1 1 P
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X 2 2 -300 0 200 R 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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@ -726,10 +726,10 @@ A -75 100 25 -1799 -1 0 1 0 N -100 100 -50 100
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A 25 100 25 -1799 -1 0 1 0 N 0 100 50 100
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P 3 0 1 0 -100 0 50 0 50 0 N
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A -25 -50 25 1 1799 0 1 0 N 0 -50 -50 -50
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X 4 4 100 -50 50 L 30 30 1 1 I
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X 2 2 100 -50 50 L 30 30 1 1 I
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X 3 3 100 100 50 L 30 30 1 1 I
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X 2 2 -150 -50 50 R 30 30 1 1 I
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X 1 1 -150 100 50 R 30 30 1 1 I
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X 1 1 -150 -50 50 R 30 30 1 1 I
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X 4 4 -150 100 50 R 30 30 1 1 I
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ENDDRAW
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ENDDEF
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#
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@ -1,4 +1,4 @@
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# EESchema Netlist Version 1.1 created 15/9/2009-18:56:02
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# EESchema Netlist Version 1.1 created 19/9/2009-18:45:44
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(
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( /4AABD9C0 $noname H5 HD {Lib=HD}
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)
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@ -332,8 +332,8 @@
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( 2 GND )
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)
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( /4A476FCC $noname Y1 32768Hz {Lib=CRYSTAL}
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( 1 /RCLK )
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( 2 /RCLKO )
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( 1 /RCLKO )
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( 2 /RCLK )
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)
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( /4A476F4D $noname C8 33pF/16V {Lib=C}
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( 1 N-000011 )
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@ -344,8 +344,8 @@
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( 2 GND )
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)
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( /4A476EAC $noname Y2 12MHz {Lib=CRYSTAL}
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( 1 /XTAL )
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( 2 N-000011 )
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( 1 N-000011 )
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( 2 /XTAL )
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)
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( /4A476E30 $noname R8 330/5% {Lib=R}
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( 1 /EXTAL )
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@ -2038,7 +2038,7 @@ Net 6 ""
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TP6 1
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Net 11 ""
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C8 1
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Y2 2
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Y2 1
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R8 2
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R2 2
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/Net 12 "PWEN"
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@ -2417,17 +2417,17 @@ Net 28 "GND"
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/Net 40 "XTAL"
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U1 89
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C5 1
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Y2 1
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Y2 2
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R2 1
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/Net 41 "RCLKO"
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U1 121
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C4 1
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Y1 2
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Y1 1
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R1 2
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/Net 42 "RCLK"
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U1 120
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C1 1
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Y1 1
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Y1 2
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R1 1
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/KEY_MATRIX/Net 43 "KEYIN7"
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S55 2
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