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Registers and register values are now CPU-specific.
- fw/common/regs.h: split into C8051F326-specific regs-f326.h and shared regs-f32x.h - fw/common/regs-f320.h: C8051F320-specific registers and values
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fw/common/regs-f320.h
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fw/common/regs-f320.h
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/*
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* common/regs-f320.h - C8051F320 register definitions
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*
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* Written 2008 by Werner Almesberger
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* Copyright 2008 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef REGS_F320_H
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#define REGS_F320_H
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#include <mcs51/C8051F326.h>
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#include "regs-f32x.h"
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/* RSTSRC, extending f32x */
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#define WDTRSF 0x08 /* Watchdog Timer Reset Flag */
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#define C0RSEF 0x20 /* Comparator0 Reset Enable and Flag */
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/* XBR0 */
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#define URT0E 0x01 /* UART I/O Output Enable */
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#define SPI0E 0x02 /* SPI I/O Enable */
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#define SMB0E 0x04 /* SMBus I/O Enable */
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#define SYSCKE 0x08 /* nSYSCLK Output Enable */
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#define CP0E 0x10 /* Comparator0 Output Enable */
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#define CP0AE 0x20 /* Comparator0 Asynchronous Output Enable */
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#define CP1E 0x40 /* Comparator1 Output Enable */
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#define CP1AE 0x80 /* Comparator1 Asynchronous Output Enable */
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/* XBR1 */
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#define ECIE 0x08 /* PCA0 External Counter Input Enable */
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#define T0E 0x10 /* T0 Enable */
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#define T1E 0x20 /* T1 Enable */
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#define XBARE 0x40 /* Crossbar Enable */
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#define WEAKPUD 0x80 /* Port I/O Weak Pull-up Disable */
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#endif /* REGS_F320_H */
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fw/common/regs-f326.h
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fw/common/regs-f326.h
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/*
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* common/regs.h - C8051F326 register definitions
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*
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* Written 2008 by Werner Almesberger
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* Copyright 2008 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef REGS_F326_H
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#define REGS_F326_H
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#include <mcs51/C8051F326.h>
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#include "regs-f32x.h"
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/* GPIOCN */
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#define SYSCLK 0x01 /* nSYSCLK Enable */
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#define INPUTEN 0x40 /* Global Digital Input Enable */
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#define WEAKPUD 0x80 /* Port I/O Weak Pullup Disable */
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/* SMOD0 */
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#define S0DL0 0x04 /* Data Length */
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#define S0DL1 0x08 /* 00: 5-bit, 01: 6-bit, 10: 7-bit, 11: 8-bit */
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/* SBCON0 */
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#define SB0PS0 0x01 /* Baud Rate Prescaler Select */
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#define SB0PS1 0x02 /* 00: /12, 01: /4, 10: /48, 11: /1 */
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#define SB0RUN 0x40 /* Baud Rate Generator Enable */
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#define SB0CLK 0x80 /* Baud Rate Clock Source */
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#endif /* REGS_F326_H */
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@ -1,5 +1,5 @@
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/*
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/*
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* common/regs.h - C8051F326 register definitions
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* common/regs-f32x.h - C8051F32x register definitions
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*
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*
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* Written 2008 by Werner Almesberger
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* Written 2008 by Werner Almesberger
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* Copyright 2008 Werner Almesberger
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* Copyright 2008 Werner Almesberger
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*/
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*/
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#ifndef REGS_H
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#ifndef REGS_F32X_H
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#define REGS_H
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#define REGS_F32X_H
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#include <mcs51/C8051F326.h>
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#include "usb-regs.h"
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#include "usb-regs.h"
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/* OSCICN */
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/* OSCICN */
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#define IFCN0 0x01 /* Internal Oscillator Frequency Control */
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#define IFCN0 0x01 /* Internal Oscillator Frequency Control */
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#define IFCN1 0x02 /* 00: /8, 01: /4, 10: /2, 11: /1 */
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#define IFCN1 0x02 /* 00: /8, 01: /4, 10: /2, 11: /1 */
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#define SUSPEND 0x20 /* Force Suspend */
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#define IFRDY 0x40 /* Internal Oscillator Frequency Ready Flag */
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#define IOSCEN 0x80 /* Internal Oscillator Enable Bit */
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/* CLKMUL */
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/* CLKMUL */
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#define MULSEL 0x01 /* Clock Multiplier Input Select */
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#define MULSEL 0x01 /* Clock Multiplier Input Select */
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#define MULINIT 0x40 /* Clock Multiplier Initialize */
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#define MULINIT 0x40 /* Clock Multiplier Initialize */
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#define MULEN 0x80 /* Clock Multiplier Enable */
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#define MULEN 0x80 /* Clock Multiplier Enable */
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/* GPIOCN */
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#define SYSCLK 0x01 /* nSYSCLK Enable */
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#define INPUTEN 0x40 /* Global Digital Input Enable */
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#define WEAKPUD 0x80 /* Port I/O Weak Pullup Disable */
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/* VDM0CN */
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/* VDM0CN */
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#define VDMEN 0x80 /* VDD Monitor Enable */
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#define VDMEN 0x80 /* VDD Monitor Enable */
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#define VDDSTAT 0x40 /* VDD Status */
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#define VDDSTAT 0x40 /* VDD Status */
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#define PREN 0x80 /* Internal Pullup Resistor Enable */
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#define PREN 0x80 /* Internal Pullup Resistor Enable */
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/* USB0ADR */
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/* USB0ADR */
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#define AUTORD 0x40 /* USB0 Register Auto-read Flag */
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#define BUSY 0x80 /* USB0 Register Read Busy Flag */
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#define BUSY 0x80 /* USB0 Register Read Busy Flag */
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/* SMOD0 */
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/* SMOD0 */
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#define SB0RUN 0x40 /* Baud Rate Generator Enable */
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#define SB0RUN 0x40 /* Baud Rate Generator Enable */
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#define SB0CLK 0x80 /* Baud Rate Clock Source */
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#define SB0CLK 0x80 /* Baud Rate Clock Source */
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#endif /* REGS_H */
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#endif /* REGS_F32X_H */
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