qi-hardware/f32xbase
1
0
Fork 0
mirror of git://projects.qi-hardware.com/f32xbase.git synced 2024-11-24 02:35:20 +02:00
Code

Added timer register values.

Browse Source 
- fw/common/regs-f32x.h: common values for TCON, TMOD, and CKCON
- fw/common/regs-f320.h: C8051F320-specific values for TMOD and CKCON
This commit is contained in:
Werner Almesberger 2010-08-23 18:11:51 -03:00
parent 0f1c0ea783
commit d1b3966e5a
2 changed files with 33 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
fw/common/regs-f320.h
View File

@ -39,4 +39,13 @@
#define XBARE 0x40 /* Crossbar Enable */ #define XBARE 0x40 /* Crossbar Enable */
#define WEAKPUD 0x80 /* Port I/O Weak Pull-up Disable */ #define WEAKPUD 0x80 /* Port I/O Weak Pull-up Disable */
/* TMOD, extending f32x */
#define C_T0 0x04 /* Counter/Timer Select */
/* CKCON, extending f32x */
#define T2ML 0x10 /* Timer 2 Low Byte Clock Select */
#define T2MH 0x20 /* Timer 2 High Byte Clock Select */
#define T3ML 0x40 /* Timer 3 Low Byte Clock Select */
#define T3MH 0x80 /* Timer 3 High Byte Clock Select */
#endif /* REGS_F320_H */ #endif /* REGS_F320_H */

24
fw/common/regs-f32x.h
View File

@ -72,4 +72,28 @@
#define SB0RUN 0x40 /* Baud Rate Generator Enable */ #define SB0RUN 0x40 /* Baud Rate Generator Enable */
#define SB0CLK 0x80 /* Baud Rate Clock Source */ #define SB0CLK 0x80 /* Baud Rate Clock Source */
/* TCON */
#define IT0 0x01 /* Interrupt 0 Type Select */
#define IE0 0x02 /* External Interrupt 0 */
#define IT1 0x04 /* Interrupt 1 Type Select */
#define IE1 0x08 /* External Interrupt 1 */
#define TR0 0x10 /* Timer 0 Run Control */
#define TF0 0x20 /* Timer 0 Overflow Flag */
#define TR1 0x40 /* Timer 1 Run Control */
#define TF1 0x80 /* Timer 1 Overflow Flag */
/* TMOD */
#define T0M0 0x01 /* Timer 0 Mode Select */
#define T0M1 0x02
#define GATE0 0x08 /* Timer 0 Gate Control */
#define T1M0 0x10 /* Timer 1 Mode Select */
#define T1M1 0x20
#define GATE1 0x80 /* Timer 1 Gate Control */
/* CKCON */
#define SCA0 0x01 /* Timer 0/1 Prescale Bits */
#define SCA1 0x02
#define T0M 0x04 /* Timer 0 Clock Select */
#define T1M 0x08 /* Timer 0 Clock Select */
#endif /* REGS_F32X_H */ #endif /* REGS_F32X_H */