mirror of
git://projects.qi-hardware.com/f32xbase.git
synced 2024-11-27 21:22:48 +02:00
1c7150cce8
- fw/common/regs.h: split into C8051F326-specific regs-f326.h and shared regs-f32x.h - fw/common/regs-f320.h: C8051F320-specific registers and values
37 lines
1.0 KiB
C
37 lines
1.0 KiB
C
/*
|
|
* common/regs.h - C8051F326 register definitions
|
|
*
|
|
* Written 2008 by Werner Almesberger
|
|
* Copyright 2008 Werner Almesberger
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*/
|
|
|
|
|
|
#ifndef REGS_F326_H
|
|
#define REGS_F326_H
|
|
|
|
#include <mcs51/C8051F326.h>
|
|
#include "regs-f32x.h"
|
|
|
|
|
|
/* GPIOCN */
|
|
#define SYSCLK 0x01 /* nSYSCLK Enable */
|
|
#define INPUTEN 0x40 /* Global Digital Input Enable */
|
|
#define WEAKPUD 0x80 /* Port I/O Weak Pullup Disable */
|
|
|
|
/* SMOD0 */
|
|
#define S0DL0 0x04 /* Data Length */
|
|
#define S0DL1 0x08 /* 00: 5-bit, 01: 6-bit, 10: 7-bit, 11: 8-bit */
|
|
|
|
/* SBCON0 */
|
|
#define SB0PS0 0x01 /* Baud Rate Prescaler Select */
|
|
#define SB0PS1 0x02 /* 00: /12, 01: /4, 10: /48, 11: /1 */
|
|
#define SB0RUN 0x40 /* Baud Rate Generator Enable */
|
|
#define SB0CLK 0x80 /* Baud Rate Clock Source */
|
|
|
|
#endif /* REGS_F326_H */
|