mirror of
git://projects.qi-hardware.com/iris.git
synced 2025-04-21 12:27:27 +03:00
split off nanonote code, try to make it boot
This commit is contained in:
@@ -1,60 +0,0 @@
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# Iris: micro-kernel for a capability-based operating system.
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# mips/Makefile.arch: mips-specific parts of the build rules
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# Copyright 2009 Bas Wijnen <wijnen@debian.org>
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#
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# This program is free software: you can redistribute it and/or modify
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||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
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#
|
||||
# This program is distributed in the hope that it will be useful,
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||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
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#
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||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
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load = 0x80000000
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ARCH_CXXFLAGS = -DNUM_THREADS=3
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ARCH_CPPFLAGS = -Imips -Wa,-mips32
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CROSS = mipsel-linux-gnu-
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OBJDUMP = $(CROSS)objdump
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junk = mdebug.abi32 reginfo comment pdr
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OBJCOPYFLAGS = $(addprefix --remove-section=.,$(junk))
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arch_iris_sources = mips/interrupts.cc mips/arch.cc
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boot_sources = mips/init.cc
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arch_headers = mips/arch.hh mips/jz4730.hh
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boot_threads = init gpio lcd
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uimage:
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mips/entry.o: $(boot_threads)
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mips/init.o: TARGET_FLAGS = -I/usr/include
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$(boot_threads): TARGET_FLAGS = -I.
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$(addprefix boot-programs/,$(addsuffix .cc,$(boot_threads))): boot-programs/devices.hh boot-programs/init.hh
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lcd: boot-programs/charset.data
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boot-programs/charset.data: boot-programs/charset
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$< > $@
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# Transform ':' into ';' so vim doesn't think there are errors.
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uimage: iris.raw.gz Makefile mips/Makefile.arch
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mkimage -A MIPS -O Linux -C gzip -a $(load) -e 0xa$(shell /bin/sh -c '$(OBJDUMP) -t iris | grep __start$$ | cut -b2-8') -n "Iris" -d $< $@ | sed -e 's/:/;/g'
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%.o:%.S Makefile mips/Makefile.arch mips/arch.hh
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$(CC) $(CPPFLAGS) $(TARGET_FLAGS) -DKERNEL_STACK_SIZE=0x2000 -c $< -o $@
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# entry.o must be the first file. boot.o must be the first of the init objects (which can be freed after loading).
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iris: mips/entry.o $(subst .cc,.o,$(iris_sources)) mips/boot.o $(subst .cc,.o,$(boot_sources))
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$(LD) --omagic -Ttext $(load) $^ -o $@
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%.raw: %
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$(OBJCOPY) -S $(OBJCOPYFLAGS) -Obinary $< $@
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%.gz: %
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gzip < $< > $@
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ARCH_CLEAN_FILES = uimage $(boot_threads) mips/*.o boot-programs/charset.data iris iris.raw iris.raw.gz
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1
mips/Makefile.arch
Symbolic link
1
mips/Makefile.arch
Symbolic link
@@ -0,0 +1 @@
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board/Makefile.arch
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@@ -17,7 +17,7 @@
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define ARCH
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#include "../kernel.hh"
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#include "kernel.hh"
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void kThread_arch_init (kThread *thread):
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thread->arch.at = 0
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@@ -22,7 +22,7 @@
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#ifdef ARCH
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#ifndef ASM
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#include "jz4730.hh"
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#include "board.hh"
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#endif
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#define reg_hack(x...) #x
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@@ -131,6 +131,7 @@ extern "C":
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#ifdef INIT
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// Initialize most things (the rest is done in boot.S)
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void init (unsigned mem)
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void board_init ()
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// Start running the idle task for the first time.
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void run_idle (kThread *self)
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#endif
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1
mips/board
Symbolic link
1
mips/board
Symbolic link
@@ -0,0 +1 @@
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nanonote
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24
mips/boot.S
24
mips/boot.S
@@ -1,5 +1,5 @@
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// Iris: micro-kernel for a capability-based operating system.
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// mips/boot.S: Kernel entry point, called by the boot loader.
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// mips/trendtac/boot.S: Kernel entry point, called by the boot loader.
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// Copyright 2009 Bas Wijnen <wijnen@debian.org>
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//
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// This program is free software: you can redistribute it and/or modify
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@@ -15,16 +15,16 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define ASM
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#define ARCH
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#include "arch.hh"
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// The kernel stack.
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.lcomm kernel_stack, KERNEL_STACK_SIZE
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.globl __start
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.globl thread_start
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.set noreorder
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#define Status 12
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#define Config 16
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// Note that this code starts at 0xa0000000, even though it is linked for
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// 0x80000000. This means that until the jump below, it must be PIC.
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__start:
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@@ -49,13 +49,14 @@ start_hack_for_disassembler:
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// Set kseg0 cachable.
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li $k0, 0x3
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mtc0 $k0, $Config, 0
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mtc0 $k0, $CP0_CONFIG, 0
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// Jump into cached code.
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la $t9, 1f
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jr $t9
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nop
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1:
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// From here, the code no longer needs to be PIC.
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// Clear .bss
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la $a0, _edata
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@@ -64,14 +65,7 @@ start_hack_for_disassembler:
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bne $a1, $a0, 1b
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addu $a0, 4
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// First argument is the memory size: 128 megabytes.
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li $a0, 128 << 20
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// First argument is the memory size.
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la $t9, init
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jr $t9
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nop
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thread_start:
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.word thread0
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.word thread1
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.word thread2
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.word thread3
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li $a0, MEMORY_SIZE
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15
mips/entry.S
15
mips/entry.S
@@ -226,18 +226,3 @@ save_regs:
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la $ra, kernel_exit
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jr $t9
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nop
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.globl thread0
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.globl thread1
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.globl thread2
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.globl thread3
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.balign 0x1000
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thread0:
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.incbin "init"
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.balign 0x1000
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thread1:
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.incbin "lcd"
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.balign 0x1000
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thread2:
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.incbin "gpio"
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thread3:
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@@ -260,49 +260,13 @@ void init (unsigned mem):
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// Set up initial threads.
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init_threads ()
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// Disable all gpio interrupts and alternate functions initially.
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for unsigned i = 0; i < 4; ++i:
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GPIO_GPIER (i) = 0
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GPIO_GPALR (i) = 0
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GPIO_GPAUR (i) = 0
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// Set up the rest of the hardware (copied from Linux).
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cpm_idle_mode ()
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cpm_enable_cko1 ()
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cpm_start_all ()
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harb_set_priority (0x08)
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dmac_enable_all_channels ()
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harb_usb0_uhc ()
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gpio_as_emc ()
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gpio_as_uart0 ()
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gpio_as_dma ()
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gpio_as_eth ()
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gpio_as_usb ()
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gpio_as_lcd_master ()
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gpio_as_ssi()
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gpio_as_msc ()
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gpio_as_gpio (GPIO_CAPS_PORT, GPIO_CAPS)
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gpio_as_gpio (GPIO_SCROLL_PORT, GPIO_SCROLL)
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gpio_as_gpio (GPIO_NUM_PORT, GPIO_NUM)
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gpio_as_gpio (GPIO_TP_LEFT_PORT, GPIO_TP_LEFT)
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gpio_as_gpio (GPIO_TP_RIGHT_PORT, GPIO_TP_RIGHT)
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// Start the operating system timer, and set it to give an interrupt immediately.
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// This is better, because the kernel starts with jumping into the idle task and
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// waiting for the first interrupt.
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unsigned latch = (JZ_EXTAL + (HZ >> 1)) / HZ
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ost_disable_all ()
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ost_set_mode (0, OST_TCSR_UIE | OST_TCSR_CKS_EXTAL)
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ost_set_reload (0, latch)
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ost_set_count (0, 1)
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ost_set_mode (0, OST_TCSR_UIE | OST_TCSR_CKS_EXTAL)
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ost_enable_channel (0)
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intc_unmask_irq (IRQ_OST0)
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// Unset all interrupt handlers.
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for unsigned i = 0; i < 32; ++i:
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arch_interrupt_receiver[i] = NULL
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// Initialize board-specific things.
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board_init ()
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// Say we're handling an exception. Since we're going to enter the idle task, allow access to cp0.
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// All interrupts enter the CPU through the interrupt controller at IP2, so enable that.
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cp0_set (CP0_STATUS, 0x1000ff13)
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@@ -94,7 +94,7 @@ kThread *interrupt ():
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for unsigned i = 0; i < 32; ++i:
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if ipr & (1 << i):
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// Handle timer interrupts specially: don't disable them.
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if i == IRQ_OST0:
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if i == TIMER_INTERRUPT:
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continue
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// Disable the interrupt while handling it.
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intc_mask_irq (i)
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@@ -106,9 +106,15 @@ kThread *interrupt ():
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c.data[j] = 0
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arch_interrupt_receiver[i]->send_message (i, &c)
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arch_interrupt_receiver[i] = NULL
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if ipr & (1 << IRQ_OST0):
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if ipr & (1 << TIMER_INTERRUPT):
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#if defined (TRENDTAC)
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ost_clear_uf (0)
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intc_ack_irq (IRQ_OST0)
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#elif defined (NANONOTE)
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tcu_clear_full_match_flag (0)
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#else
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#error unknown board
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#endif
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intc_ack_irq (TIMER_INTERRUPT)
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timer_interrupt ()
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handle_exit ()
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return current
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66
mips/nanonote/Makefile.arch
Normal file
66
mips/nanonote/Makefile.arch
Normal file
@@ -0,0 +1,66 @@
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# Iris: micro-kernel for a capability-based operating system.
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# mips/nanonote/Makefile.arch: nanonote-specific parts of the build rules
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# Copyright 2009 Bas Wijnen <wijnen@debian.org>
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#
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# This program is free software: you can redistribute it and/or modify
|
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# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
||||
#
|
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# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
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load = 0x80000000
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ARCH_CXXFLAGS = -DNUM_THREADS=2
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ARCH_CPPFLAGS = -I. -Imips -Imips/nanonote -Wa,-mips32 -DNANONOTE
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CROSS = mipsel-linux-gnu-
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OBJDUMP = $(CROSS)objdump
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junk = mdebug.abi32 reginfo comment pdr
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OBJCOPYFLAGS = $(addprefix --remove-section=.,$(junk))
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LDFLAGS = --omagic -Ttext $(load)
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arch_iris_sources = mips/interrupts.cc mips/arch.cc
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boot_sources = mips/init.cc mips/nanonote/board.cc
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arch_headers = mips/arch.hh mips/nanonote/jz4740.hh mips/nanonote/board.hh
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boot_threads = init udc
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test: iris.raw nanonote-boot
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./nanonote-boot iris.raw 0xa$(shell /bin/sh -c '$(OBJDUMP) -t iris | grep __start$$ | cut -b2-8')
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.PHONY: test
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%.elf: %.o
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$(LD) $(LDFLAGS) -o $@ $<
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%.raw: %.elf
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$(OBJCOPY) -S $(OBJCOPYFLAGS) -Obinary $< $@
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nanonote-boot: mips/nanonote/nanonote-boot.cc mips/nanonote/sdram-setup.raw
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g++ `pkg-config --cflags --libs shevek` $< -o $@ -D'STAGE1="$<"' -lusb
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mips/nanonote/sdram-setup.elf: mips/nanonote/sdram-setup.ld
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mips/nanonote/sdram-setup.elf: LDFLAGS = --omagic -T mips/nanonote/sdram-setup.ld
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mips/boot.o: TARGET_FLAGS = -DMEMORY_SIZE="32 << 20"
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mips/entry.o: $(boot_threads)
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mips/init.o: TARGET_FLAGS = -I/usr/include
|
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$(boot_threads): TARGET_FLAGS = -I.
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$(boot_threads): LDFLAGS = -EL
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$(addprefix boot-programs/,$(addsuffix .cc,$(boot_threads))): boot-programs/devices.hh boot-programs/init.hh
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lcd: boot-programs/charset.data
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boot-programs/charset.data: boot-programs/charset
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$< > $@
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%.o:%.S Makefile Makefile.arch mips/arch.hh
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$(CC) $(CPPFLAGS) $(TARGET_FLAGS) -DKERNEL_STACK_SIZE=0x2000 -c $< -o $@
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# entry.o must be the first file. threadlist.o must be the first of the init objects (which can be freed after loading).
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iris.elf: mips/entry.o $(subst .cc,.o,$(iris_sources)) mips/nanonote/threadlist.o mips/boot.o $(subst .cc,.o,$(boot_sources))
|
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$(LD) $(LDFLAGS) $^ -o $@
|
||||
|
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ARCH_CLEAN_FILES = $(boot_sources) $(boot_threads) $(arch_headers) boot_programs/init.hh boot_programs/devices.hh mips/*.o mips/nanonote/*.o boot-programs/charset.data iris.elf iris.raw mips/nanonote/sdram-setup.elf mips/nanonote/sdram-setup.raw
|
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51
mips/nanonote/board.ccp
Normal file
51
mips/nanonote/board.ccp
Normal file
@@ -0,0 +1,51 @@
|
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#pypp 0
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
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// mips/nanonote/board.ccp: nanonote-specific definitions.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
#define ARCH
|
||||
#define INIT
|
||||
#include "kernel.hh"
|
||||
|
||||
void board_init ():
|
||||
cpm_start_all ()
|
||||
gpio_as_uart0 ()
|
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gpio_as_sdram_16bit ()
|
||||
gpio_as_nand ()
|
||||
gpio_as_aic ()
|
||||
gpio_as_lcd_16bit ()
|
||||
gpio_as_msc ()
|
||||
// Set up keyboard: this breaks uart receive.
|
||||
gpio_as_gpio (3, 0x05fc0000)
|
||||
tcu_stop_counter (0)
|
||||
tcu_select_extalclk (0)
|
||||
tcu_select_clk_div1 (0)
|
||||
tcu_disable_pwm_output (0)
|
||||
tcu_set_full_data (0, JZ_EXTAL / HZ)
|
||||
tcu_mask_half_match_irq (0)
|
||||
tcu_clear_full_match_flag (0)
|
||||
tcu_unmask_full_match_irq (0)
|
||||
tcu_start_counter (0)
|
||||
// Set up uart.
|
||||
uart_disable (0)
|
||||
uart_set_baud (0, JZ_EXTAL, 9600)
|
||||
uart_set_8n1 (0)
|
||||
UART0_IER = 0
|
||||
UART0_MCR = 0
|
||||
UART0_SIRCR = 0
|
||||
UART0_UMR = 0
|
||||
UART0_UACR = 0
|
||||
UART0_FCR |= UARTFCR_UUE | UARTFCR_RFLS | UARTFCR_TFLS
|
||||
19
mips/nanonote/board.hhp
Normal file
19
mips/nanonote/board.hhp
Normal file
@@ -0,0 +1,19 @@
|
||||
#pypp 0
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/nanonote/board.hhp: nanonote-specific declarations and type definitions.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
#include "jz4740.hh"
|
||||
3568
mips/nanonote/jz4740.hhp
Normal file
3568
mips/nanonote/jz4740.hhp
Normal file
File diff suppressed because it is too large
Load Diff
188
mips/nanonote/nanonote-boot.ccp
Normal file
188
mips/nanonote/nanonote-boot.ccp
Normal file
@@ -0,0 +1,188 @@
|
||||
#pypp 0
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/nanonote/nanonote-boot.ccp: Host-side helper for booting over USB.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
#include <unistd.h>
|
||||
#include <usb.h>
|
||||
#include <fstream>
|
||||
#include <sstream>
|
||||
#include <iostream>
|
||||
|
||||
asm volatile (".section .rodata\n"
|
||||
".globl stage1\n"
|
||||
".globl stage1_end\n"
|
||||
"stage1:\n"
|
||||
".incbin \"mips/nanonote/sdram-setup.raw\"\n"
|
||||
"stage1_end:\n"
|
||||
".section .text")
|
||||
extern char stage1[1]
|
||||
extern char stage1_end[1]
|
||||
|
||||
unsigned const stage1_load = 0x80002000
|
||||
unsigned const stage1_start = 0x80002000
|
||||
unsigned const stage1_size = stage1_end - stage1
|
||||
|
||||
class nanonote:
|
||||
public:
|
||||
|
||||
nanonote (unsigned skip = 0)
|
||||
void boot (std::string const &data, unsigned load, unsigned start)
|
||||
|
||||
private:
|
||||
|
||||
enum requests:
|
||||
VR_GET_CPU_INFO = 0
|
||||
VR_SET_DATA_ADDRESS = 1
|
||||
VR_SET_DATA_LENGTH = 2
|
||||
VR_FLUSH_CACHES = 3
|
||||
VR_PROGRAM_START1 = 4
|
||||
VR_PROGRAM_START2 = 5
|
||||
static int const vendor = 0x601a
|
||||
static int const product = 0x4740
|
||||
static unsigned const timeout = 1000
|
||||
usb_dev_handle *handle
|
||||
int interface
|
||||
int in_ep, out_ep
|
||||
std::string cpu_info
|
||||
bool try_open (struct usb_device *dev)
|
||||
bool find_device (unsigned skip)
|
||||
void request (requests num, unsigned data = 0)
|
||||
void send_file (unsigned address, unsigned size, char const *data)
|
||||
void get_cpu_info ()
|
||||
|
||||
bool nanonote::try_open (struct usb_device *dev):
|
||||
handle = usb_open (dev)
|
||||
|
||||
if dev->descriptor.bNumConfigurations != 1:
|
||||
usb_close (handle)
|
||||
std::cerr << dev->descriptor.bNumConfigurations << " configurations\n"
|
||||
return false
|
||||
if usb_set_configuration (handle, 1) < 0:
|
||||
usb_close (handle)
|
||||
std::cerr << "Can't set configuration 1: " << usb_strerror () << '\n'
|
||||
return false
|
||||
|
||||
interface = dev->config->interface->altsetting->bInterfaceNumber
|
||||
int have_in = 0, have_out = 0
|
||||
for unsigned i = 0; i < dev->config->interface->altsetting->bNumEndpoints; ++i:
|
||||
if (dev->config->interface->altsetting->endpoint[i].bmAttributes & USB_ENDPOINT_TYPE_MASK) != USB_ENDPOINT_TYPE_BULK:
|
||||
usb_close (handle)
|
||||
std::cerr << "Device has non-bulk endpoint.\n"
|
||||
return false
|
||||
if (dev->config->interface->altsetting->endpoint[i].bEndpointAddress & USB_ENDPOINT_DIR_MASK):
|
||||
/* input */
|
||||
if have_in:
|
||||
usb_close (handle)
|
||||
std::cerr << "Device has multiple IN endpoints.\n"
|
||||
return false
|
||||
have_in = 1
|
||||
in_ep = dev->config->interface->altsetting->endpoint[i].bEndpointAddress & USB_ENDPOINT_ADDRESS_MASK
|
||||
if in_ep != 1:
|
||||
usb_close (handle)
|
||||
std::cerr << "IN endpoint is not numbered as 1.\n"
|
||||
return false
|
||||
else:
|
||||
/* output */
|
||||
if have_out:
|
||||
usb_close (handle)
|
||||
std::cerr << "Device has multiple OUT endpoints.\n"
|
||||
return false
|
||||
have_out = 1
|
||||
out_ep = dev->config->interface->altsetting->endpoint[i].bEndpointAddress & USB_ENDPOINT_ADDRESS_MASK
|
||||
if out_ep != 1:
|
||||
usb_close (handle)
|
||||
std::cerr << "OUT endpoint is not numbered as 1.\n"
|
||||
return false
|
||||
if usb_claim_interface (handle, interface) < 0:
|
||||
std::cerr << "unable to claim interface\n"
|
||||
return false
|
||||
return true
|
||||
|
||||
bool nanonote::find_device (unsigned skip):
|
||||
unsigned skipped = 0
|
||||
usb_init ()
|
||||
usb_find_busses ()
|
||||
usb_find_devices ()
|
||||
for struct usb_bus *bus = usb_busses; bus; bus = bus->next:
|
||||
for struct usb_device *dev = bus->devices; dev; dev = dev->next:
|
||||
if dev->descriptor.idProduct != product || dev->descriptor.idVendor != vendor:
|
||||
continue
|
||||
if skip > skipped++:
|
||||
continue
|
||||
if try_open (dev):
|
||||
return true
|
||||
return false
|
||||
|
||||
nanonote::nanonote (unsigned skip):
|
||||
if !find_device (skip):
|
||||
std::cerr << "unable to find NanoNote device.\n";
|
||||
throw "unable to find NanoNote device";
|
||||
|
||||
void nanonote::get_cpu_info ():
|
||||
char buffer[8]
|
||||
if usb_control_msg (handle, USB_ENDPOINT_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, VR_GET_CPU_INFO, 0, 0, buffer, 8, timeout) < 0:
|
||||
std::cerr << "unable to request cpu info from NanoNote: " << usb_strerror () << ".\n"
|
||||
throw "unable to request cpu info from NanoNote"
|
||||
cpu_info = std::string (buffer, 8)
|
||||
|
||||
void nanonote::request (requests r, unsigned data):
|
||||
std::cerr << "requesting " << r << " (data = " << std::hex << data << ")" << std::endl
|
||||
if usb_control_msg (handle, USB_ENDPOINT_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, r, (data >> 16) & 0xffff, data & 0xffff, NULL, 0, timeout) < 0:
|
||||
std::cerr << "unable to send control message to NanoNote: " << usb_strerror () << ".\n"
|
||||
throw "unable to send control message to NanoNote"
|
||||
|
||||
void nanonote::send_file (unsigned address, unsigned size, char const *data):
|
||||
request (VR_SET_DATA_ADDRESS, address)
|
||||
//request (VR_SET_DATA_LENGTH, size)
|
||||
char const *ptr = data
|
||||
while ptr - data < size:
|
||||
int ret = usb_bulk_write (handle, out_ep, ptr, size - (ptr - data), timeout)
|
||||
if ret <= 0:
|
||||
std::cerr << "failed to write to NanoNote.\n"
|
||||
throw "failed to write to NanoNote"
|
||||
ptr += ret
|
||||
|
||||
void nanonote::boot (std::string const &data, unsigned load, unsigned start):
|
||||
get_cpu_info ()
|
||||
std::cerr << "info: " << cpu_info << std::endl
|
||||
send_file (stage1_load, stage1_size, stage1)
|
||||
request (VR_PROGRAM_START1, stage1_start)
|
||||
usleep (100)
|
||||
send_file (load, data.size (), data.data ())
|
||||
request (VR_FLUSH_CACHES)
|
||||
request (VR_PROGRAM_START2, start)
|
||||
get_cpu_info ()
|
||||
std::cerr << "info: " << cpu_info << std::endl
|
||||
|
||||
int main (int argc, char **argv):
|
||||
if argc != 3:
|
||||
std::cerr << "Usage: " << argv[0] << " [kernel] [entry address]\n"
|
||||
std::cerr << "The kernel is loaded from 0x80000000 and run from entry address\n"
|
||||
return 1
|
||||
unsigned entry = strtoul (argv[2], NULL, 0)
|
||||
nanonote nn
|
||||
std::ifstream file (argv[1])
|
||||
if !file:
|
||||
std::cerr << "can't open file '" << argv[1] << "' for reading.\n"
|
||||
return 1
|
||||
std::ostringstream data
|
||||
data << file.rdbuf ()
|
||||
if data.str ().empty ():
|
||||
std::cerr << "no data read from '" << argv[1] << "'.\n"
|
||||
return 1
|
||||
nn.boot (data.str (), 0x80000000, entry)
|
||||
return 0
|
||||
136
mips/nanonote/sdram-setup.ccp
Normal file
136
mips/nanonote/sdram-setup.ccp
Normal file
@@ -0,0 +1,136 @@
|
||||
#pypp 0
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/nanonote/sdram-setup.ccp: bootstrapping over usb.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
// This runs like the kernel. In particular, it doesn't want userspace declarations.
|
||||
#define __KERNEL
|
||||
#include "jz4740.hh"
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 // SDRAM BANK Number: 1, 2
|
||||
#define SDRAM_CASL 3 // CAS latency: 2 or 3
|
||||
// SDRAM Timings, unit: ns
|
||||
#define SDRAM_TRAS 45 // RAS# Active Time
|
||||
#define SDRAM_RCD 20 // RAS# to CAS# Delay
|
||||
#define SDRAM_TPC 20 // RAS# Precharge Time
|
||||
#define SDRAM_TRWL 7 // Write Latency Time
|
||||
#define SDRAM_TREF 15625 // Refresh period: 4096 refresh cycles/64ms
|
||||
|
||||
asm volatile (".set noreorder\n"
|
||||
"\t.globl __start\n"
|
||||
"\t.text\n"
|
||||
"__start:\n"
|
||||
"\tla $sp, 0x80004000\n"
|
||||
"__hack_label:\n"
|
||||
"\tmove $a0, $ra\n"
|
||||
"\tbal 1f\n"
|
||||
"\tnop\n"
|
||||
"\t.word _gp\n"
|
||||
"1:\n"
|
||||
"\tlw $gp, 0($ra)\n"
|
||||
"\tla $t9, start_cpp\n"
|
||||
"\tmove $ra, $a0\n"
|
||||
"\tjr $t9\n"
|
||||
"\tnop\n"
|
||||
".set reorder")
|
||||
|
||||
extern "C":
|
||||
void start_cpp ()
|
||||
|
||||
void start_cpp ():
|
||||
unsigned dmcr0, dmcr, sdmode, tmp, cpu_clk, mem_clk, ns
|
||||
unsigned cas_latency_sdmr[2] = { EMC_SDMR_CAS_2, EMC_SDMR_CAS_3 }
|
||||
unsigned cas_latency_dmcr[2] = { 1 << EMC_DMCR_TCL_BIT, 2 << EMC_DMCR_TCL_BIT }
|
||||
int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}
|
||||
|
||||
cpu_clk = 225000000
|
||||
gpio_as_sdram_32bit ()
|
||||
unsigned SDRAM_BW16 = 0
|
||||
unsigned SDRAM_BANK4 = 1
|
||||
unsigned SDRAM_ROW = 13
|
||||
unsigned SDRAM_COL = 9
|
||||
|
||||
mem_clk = cpu_clk * div[cpm_get_cdiv()] / div[cpm_get_mdiv()]
|
||||
EMC_BCR = 0
|
||||
EMC_RTCSR = 0
|
||||
#define SDRAM_ROW0 11
|
||||
#define SDRAM_COL0 8
|
||||
#define SDRAM_BANK40 0
|
||||
dmcr0 = ((SDRAM_ROW0-11)<<EMC_DMCR_RA_BIT) | ((SDRAM_COL0-8)<<EMC_DMCR_CA_BIT) | (SDRAM_BANK40<<EMC_DMCR_BA_BIT) | (SDRAM_BW16<<EMC_DMCR_BW_BIT) | EMC_DMCR_EPIN | cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)]
|
||||
// Basic DMCR value
|
||||
dmcr = ((SDRAM_ROW-11)<<EMC_DMCR_RA_BIT) | ((SDRAM_COL-8)<<EMC_DMCR_CA_BIT) | (SDRAM_BANK4<<EMC_DMCR_BA_BIT) | (SDRAM_BW16<<EMC_DMCR_BW_BIT) | EMC_DMCR_EPIN | cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)]
|
||||
// SDRAM timimg
|
||||
ns = 1000000000 / mem_clk
|
||||
tmp = SDRAM_TRAS / ns
|
||||
if tmp < 4:
|
||||
tmp = 4
|
||||
if tmp > 11:
|
||||
tmp = 11
|
||||
dmcr |= ((tmp-4) << EMC_DMCR_TRAS_BIT)
|
||||
tmp = SDRAM_RCD/ns
|
||||
if tmp > 3:
|
||||
tmp = 3
|
||||
dmcr |= (tmp << EMC_DMCR_RCD_BIT)
|
||||
tmp = SDRAM_TPC/ns
|
||||
if tmp > 7:
|
||||
tmp = 7
|
||||
dmcr |= (tmp << EMC_DMCR_TPC_BIT)
|
||||
tmp = SDRAM_TRWL/ns
|
||||
if tmp > 3:
|
||||
tmp = 3
|
||||
dmcr |= (tmp << EMC_DMCR_TRWL_BIT)
|
||||
tmp = (SDRAM_TRAS + SDRAM_TPC)/ns
|
||||
if tmp > 14:
|
||||
tmp = 14
|
||||
dmcr |= (((tmp + 1) >> 1) << EMC_DMCR_TRC_BIT)
|
||||
|
||||
// SDRAM mode value
|
||||
sdmode = EMC_SDMR_BT_SEQ | EMC_SDMR_OM_NORMAL | EMC_SDMR_BL_4 | cas_latency_sdmr[((SDRAM_CASL == 3) ? 1 : 0)];
|
||||
|
||||
// Stage 1. Precharge all banks by writing SDMR with DMCR.MRSET=0
|
||||
EMC_DMCR = dmcr
|
||||
REG8(EMC_SDMR0|sdmode) = 0
|
||||
|
||||
// Wait for precharge, > 200us
|
||||
tmp = (cpu_clk / 1000000) * 1000
|
||||
volatile unsigned t = tmp
|
||||
while t--:
|
||||
|
||||
// Stage 2. Enable auto-refresh
|
||||
EMC_DMCR = dmcr | EMC_DMCR_RFSH
|
||||
|
||||
tmp = SDRAM_TREF/ns
|
||||
tmp = tmp/64 + 1
|
||||
if tmp > 0xff:
|
||||
tmp = 0xff
|
||||
EMC_RTCOR = tmp
|
||||
EMC_RTCNT = 0
|
||||
// Divisor is 64, CKO/64
|
||||
EMC_RTCSR = EMC_RTCSR_CKS_64
|
||||
|
||||
// Wait for number of auto-refresh cycles
|
||||
tmp = (cpu_clk / 1000000) * 1000
|
||||
t = tmp
|
||||
while t--:
|
||||
|
||||
// Stage 3. Mode Register Set
|
||||
EMC_DMCR = dmcr0 | EMC_DMCR_RFSH | EMC_DMCR_MRSET
|
||||
REG8(EMC_SDMR0|sdmode) = 0
|
||||
|
||||
// Set back to basic DMCR value
|
||||
EMC_DMCR = dmcr | EMC_DMCR_RFSH | EMC_DMCR_MRSET
|
||||
|
||||
// everything is ok now: return to boot loader to load stage 2.
|
||||
31
mips/nanonote/sdram-setup.ld
Normal file
31
mips/nanonote/sdram-setup.ld
Normal file
@@ -0,0 +1,31 @@
|
||||
OUTPUT_ARCH(mips)
|
||||
ENTRY(__start)
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0x80002000 , LENGTH = 0x100000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = ALIGN(4);
|
||||
.text : { *(.text*) } > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata*) } > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
.sdata : { *(.sdata*) } > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
|
||||
|
||||
_gp = ABSOLUTE(.); /* Base of small data */
|
||||
|
||||
.got : { *(.got*) } > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
.sbss : { *(.sbss*) } > ram
|
||||
.bss : { *(.bss*) } > ram
|
||||
. = ALIGN (4);
|
||||
}
|
||||
|
||||
38
mips/nanonote/threadlist.S
Normal file
38
mips/nanonote/threadlist.S
Normal file
@@ -0,0 +1,38 @@
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/nanonote/threadlist.S: List of initial threads.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
.globl init_start
|
||||
.globl thread_start
|
||||
.set noreorder
|
||||
|
||||
.balign 0x1000
|
||||
thread0:
|
||||
.incbin "init"
|
||||
|
||||
.balign 0x1000
|
||||
thread1:
|
||||
.incbin "udc"
|
||||
|
||||
thread2:
|
||||
|
||||
// Everything from here may be freed after kernel initialization.
|
||||
init_start:
|
||||
|
||||
thread_start:
|
||||
.word thread0
|
||||
.word thread1
|
||||
.word thread2
|
||||
61
mips/trendtac/Makefile.arch
Normal file
61
mips/trendtac/Makefile.arch
Normal file
@@ -0,0 +1,61 @@
|
||||
# Iris: micro-kernel for a capability-based operating system.
|
||||
# mips/trendtac/Makefile.arch: board-specific parts of the build rules
|
||||
# Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
load = 0x80000000
|
||||
|
||||
ARCH_CXXFLAGS = -DNUM_THREADS=3
|
||||
ARCH_CPPFLAGS = -Imips -Wa,-mips32
|
||||
CROSS = mipsel-linux-gnu-
|
||||
OBJDUMP = $(CROSS)objdump
|
||||
junk = mdebug.abi32 reginfo comment pdr
|
||||
OBJCOPYFLAGS = $(addprefix --remove-section=.,$(junk))
|
||||
|
||||
arch_iris_sources = mips/interrupts.cc mips/arch.cc
|
||||
boot_sources = mips/init.cc
|
||||
arch_headers = mips/arch.hh mips/jz4730.hh
|
||||
boot_threads = init gpio lcd
|
||||
|
||||
uimage:
|
||||
|
||||
mips/boot.o: TARGET_FLAGS = -DMEMORY_SIZE = "128 << 20"
|
||||
mips/threadlist.o: $(boot_threads)
|
||||
mips/init.o: TARGET_FLAGS = -I/usr/include
|
||||
$(boot_threads): TARGET_FLAGS = -I.
|
||||
$(addprefix boot-programs/,$(addsuffix .cc,$(boot_threads))): boot-programs/devices.hh boot-programs/init.hh
|
||||
lcd: boot-programs/charset.data
|
||||
|
||||
boot-programs/charset.data: boot-programs/charset
|
||||
$< > $@
|
||||
|
||||
# Transform ':' into ';' so vim doesn't think there are errors.
|
||||
uimage: iris.raw.gz Makefile mips/Makefile.arch
|
||||
mkimage -A MIPS -O Linux -C gzip -a $(load) -e 0xa$(shell /bin/sh -c '$(OBJDUMP) -t iris | grep __start$$ | cut -b2-8') -n "Iris" -d $< $@ | sed -e 's/:/;/g'
|
||||
|
||||
%.o:%.S Makefile Makefile.arch mips/arch.hh
|
||||
$(CC) $(CPPFLAGS) $(TARGET_FLAGS) -DKERNEL_STACK_SIZE=0x2000 -c $< -o $@
|
||||
|
||||
# entry.o must be the first file. threadlist.o must be the first of the init objects (which can be freed after loading).
|
||||
iris: mips/entry.o $(subst .cc,.o,$(iris_sources)) mips/trendtac/threadlist.o mips/boot.o $(subst .cc,.o,$(boot_sources))
|
||||
$(LD) --omagic -Ttext $(load) $^ -o $@
|
||||
|
||||
%.raw: %
|
||||
$(OBJCOPY) -S $(OBJCOPYFLAGS) -Obinary $< $@
|
||||
|
||||
%.gz: %
|
||||
gzip < $< > $@
|
||||
|
||||
ARCH_CLEAN_FILES = uimage $(boot_threads) mips/*.o boot-programs/charset.data iris iris.raw iris.raw.gz
|
||||
57
mips/trendtac/board.ccp
Normal file
57
mips/trendtac/board.ccp
Normal file
@@ -0,0 +1,57 @@
|
||||
#pypp 0
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/trendtac/board.ccp: trendtac-specific functions.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
void board_init ():
|
||||
// Disable all gpio interrupts and alternate functions initially.
|
||||
for unsigned i = 0; i < 4; ++i:
|
||||
GPIO_GPIER (i) = 0
|
||||
GPIO_GPALR (i) = 0
|
||||
GPIO_GPAUR (i) = 0
|
||||
// Set up the rest of the hardware (copied from Linux).
|
||||
cpm_idle_mode ()
|
||||
cpm_enable_cko1 ()
|
||||
cpm_start_all ()
|
||||
harb_set_priority (0x08)
|
||||
dmac_enable_all_channels ()
|
||||
harb_usb0_uhc ()
|
||||
gpio_as_emc ()
|
||||
gpio_as_uart0 ()
|
||||
gpio_as_dma ()
|
||||
gpio_as_eth ()
|
||||
gpio_as_usb ()
|
||||
gpio_as_lcd_master ()
|
||||
gpio_as_ssi()
|
||||
gpio_as_msc ()
|
||||
|
||||
gpio_as_gpio (GPIO_CAPS_PORT, GPIO_CAPS)
|
||||
gpio_as_gpio (GPIO_SCROLL_PORT, GPIO_SCROLL)
|
||||
gpio_as_gpio (GPIO_NUM_PORT, GPIO_NUM)
|
||||
gpio_as_gpio (GPIO_TP_LEFT_PORT, GPIO_TP_LEFT)
|
||||
gpio_as_gpio (GPIO_TP_RIGHT_PORT, GPIO_TP_RIGHT)
|
||||
|
||||
// Start the operating system timer, and set it to give an interrupt immediately.
|
||||
// This is better, because the kernel starts with jumping into the idle task and
|
||||
// waiting for the first interrupt.
|
||||
unsigned latch = (JZ_EXTAL + (HZ >> 1)) / HZ
|
||||
ost_disable_all ()
|
||||
ost_set_mode (0, OST_TCSR_UIE | OST_TCSR_CKS_EXTAL)
|
||||
ost_set_reload (0, latch)
|
||||
ost_set_count (0, 1)
|
||||
ost_set_mode (0, OST_TCSR_UIE | OST_TCSR_CKS_EXTAL)
|
||||
ost_enable_channel (0)
|
||||
intc_unmask_irq (IRQ_OST0)
|
||||
@@ -25,6 +25,8 @@
|
||||
#define JZ_EXTAL 3686400
|
||||
// RTC clock
|
||||
#define RTC_CLOCK 32768
|
||||
// The interrupt source that is used for the system timer
|
||||
#define TIMER_INTERRUPT IRQ_OST0
|
||||
|
||||
// Physical addresses are where they really are.
|
||||
#define HARB_PHYSICAL 0x13000000
|
||||
43
mips/trendtac/threadlist.S
Normal file
43
mips/trendtac/threadlist.S
Normal file
@@ -0,0 +1,43 @@
|
||||
// Iris: micro-kernel for a capability-based operating system.
|
||||
// mips/trendtac/threadlist.S: Kernel entry point, called by the boot loader.
|
||||
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
|
||||
//
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, either version 3 of the License, or
|
||||
// (at your option) any later version.
|
||||
//
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License
|
||||
// along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
.globl init_start
|
||||
.globl thread_start
|
||||
.set noreorder
|
||||
|
||||
.balign 0x1000
|
||||
thread0:
|
||||
.incbin "init"
|
||||
|
||||
.balign 0x1000
|
||||
thread1:
|
||||
.incbin "lcd"
|
||||
|
||||
.balign 0x1000
|
||||
thread2:
|
||||
.incbin "gpio"
|
||||
|
||||
thread3:
|
||||
|
||||
// Everything from here may be freed after kernel initialization.
|
||||
init_start:
|
||||
|
||||
thread_start:
|
||||
.word thread0
|
||||
.word thread1
|
||||
.word thread2
|
||||
.word thread3
|
||||
Reference in New Issue
Block a user