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Merge branch 'master' of projects.qi-hardware.com:kicad-libs
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commit
b977bc9c20
59
modules/INFO
59
modules/INFO
@ -144,3 +144,62 @@ F: mdip
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#
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# http://www.fairchildsemi.com/dwg/N0/N08H.pdf
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# SOIC
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F: soic
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#
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# From TI:
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#
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# - the SN75HVD12DR data sheet
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# http://www.ti.com/lit/ds/symlink/sn75hvd12.pdf
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#
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# Package Drawing:
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#
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# - D(JEDEC)
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# - R-PDSO-G8
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# http://www-s.ti.com/sc/psheets/msoi002j/msoi002j.pdf
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# - R-PDSO-G14
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# http://www-s.ti.com/sc/psheets/mpds177g/mpds177g.pdf
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# - R-PDSO-G16
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# http://www-s.ti.com/sc/psheets/mpds178g/mpds178g.pdf
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# IR Receiver Module
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F: ir
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#
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# From Vishay:
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#
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# - the TSOP322.., TSOP324.., TSOP348.., TSOP344.. data sheet
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# http://www.vishay.com/docs/81732/tsop348.pdf
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# "Generic" simple TSOP
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F: tsop
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#
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# - the JS28F256J3F105 data sheet, it's TSOP-56
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# http://www.micron.com/parts/nor-flash/parallel-nor-flash/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/6062319942_J3_65_256M_MLC_DS.ashx
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#
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# according to MAXIM web: http://www.maxim-ic.com/design/packaging/
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# the TSOP32 referred to the same package drawing and land pattern
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#
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# - TSOP28: Z28 -> package drawing
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# http://pdfserv.maxim-ic.com/package_dwgs/21-0273.PDF
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#
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# - TSOP28: Z28 -> package land pattern
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# http://pdfserv.maxim-ic.com/land_patterns/90-0319.PDF
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#
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#
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# - TSOP32: Z32 -> package drawing
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# http://pdfserv.maxim-ic.com/package_dwgs/21-0274.PDF
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#
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# - TSOP32: Z32 -> package land pattern
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# http://pdfserv.maxim-ic.com/land_patterns/90-0320.PDF
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#
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# "Generic" simple TO-252
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F: to-252
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#
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# - for example: the LP38690DT-3.3 data sheet, it's TO-252
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# http://www.ti.com/lit/ds/symlink/lp38690.pdf
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#
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# - JEDEC Spec: TO-252 AA -> package drawing and land pattern
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# http://www.national.com/packaging/mkt/td03b.pdf
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#
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79
modules/ir.fpd
Normal file
79
modules/ir.fpd
Normal file
@ -0,0 +1,79 @@
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/* MACHINE-GENERATED ! */
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frame pin {
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__0: vec @(hole/2, hole/2)
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__1: vec @(-hole/2, -hole/2)
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hole . __0
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__2: vec @(-ratio*hole/2, ratio*hole/2)
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__3: vec @(ratio*hole/2, -ratio*hole/2)
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rpad "$n" __2 .
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}
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frame pin_hole {
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set n = i+1
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frame pin @
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}
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frame pins {
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loop i = 0, N-1
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__0: vec @(pitch*(i-(N-1)/2), 0mm)
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__2: vec .(0mm, -(rear+thick/2))
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frame pin_hole .
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}
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frame outline {
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set w = 5mil
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__0: vec @(L/2-pin_width/2, 0mm)
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line @ . w
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__2: vec .(0.35mm, 0mm)
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__1: vec @(-(L/2-pin_width/2), 0mm)
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line @ . w
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__3: vec .(-0.35mm, 0mm)
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__4: vec @(-L/2, -(rear+thick))
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__5: vec @(L/2, -(rear+thick))
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__6: vec @(L/2-pin_width/2, -front)
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__10: vec .(0.3mm, 1.5mm)
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line . __6 w
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__7: vec @(-(L/2-pin_width/2), -front)
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__11: vec .(-0.3mm, 1.5mm)
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line . __7 w
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__8: vec @(0mm, -surface)
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__9: vec @(0mm, -3mm)
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__12: vec __0(0.2mm, -0.5mm)
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line . __0 w
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__13: vec __1(-0.2mm, -0.5mm)
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line . __1 w
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__14: vec __6(-0.29mm, 0mm)
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line __6 . w
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__15: vec __7(0.29mm, 0mm)
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arc __9 . __14 w
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line __7 . w
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line __14 . w
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}
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package "TSOP348"
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unit auto
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table
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{ N, L, front, rear, surface, thick, pin_width }
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{ 3, 6mm, 4.1mm, 1.3mm, 5.6mm, 0.5mm, 0.7mm }
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set hole = 0.8mm
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set pitch = 100mil
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set ratio = 2
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frame outline @
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frame pins @
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meas outline.__3 >> outline.__2 1mm
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meas pins.__2 -> pins.__2 2mm
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measy outline.__0 << pins.__2 -1mm
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measy outline.__0 >> outline.__6 1.5mm
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measy outline.__0 >> outline.__8 2mm
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measy pin.__1 -> pin.__0 1mm
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measy pin.__3 -> pin.__2 3mm
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measx outline.__9 >> pins.__2 -0.5mm
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79
modules/soic.fpd
Normal file
79
modules/soic.fpd
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@ -0,0 +1,79 @@
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/* MACHINE-GENERATED ! */
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frame pin {
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__0: vec @(D/2, C/2)
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__1: vec @(-D/2, -C/2)
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pad "$n" . __0
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}
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frame pins_top {
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set n = N-i
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__0: vec @(x, 0mm)
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frame pin .
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}
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frame pins_bottom {
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set n = i+1
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__0: vec @(x, 0mm)
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frame pin .
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}
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frame pins {
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set y = (A+B)/4
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set x = (i-(N/2-1)/2)*Pitch
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loop i = 0, N/2-1
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__0: vec @(0mm, y)
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frame pins_top .
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__1: vec @(0mm, -y)
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frame pins_bottom .
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}
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frame marker {
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set r = ((N/2-1)*Pitch-x)/2-w
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__0: vec @(-x/2-D+w, -(A-C)/2)
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__1: vec .(-r/3, 0mm)
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circ __0 . w
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}
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frame outline {
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set w = 5mil
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set x = H
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set y = A+2*w
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__0: vec @(x/2, y/2)
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__1: vec @(-x/2, -y/2)
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rect . __0 w
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frame marker @
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}
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package "$name-$N"
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unit mm
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set Pitch = 1.27mm
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set D = 0.6mm
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table
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{ name, N, A, B, C, H }
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{ "SOIC", 8, 6.8mm, 2.8mm, 2mm, 4.9mm }
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{ "SOIC", 14, 6.8mm, 2.8mm, 2mm, 8.65mm }
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{ "SOIC", 16, 6.8mm, 2.8mm, 2mm, 9.9mm }
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frame outline @
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frame pins @
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measy pin.__1 -> pin.__0 1.5mm
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measy pin.__1 >> pin.__0 -H-2mm
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measy pin.__0 >> pin.__1 -H
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measx pin.__1 -> pin.__0 -1mm
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measx pins_top.__0 -> pins_top.__0 -2mm
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measy pins.__0 << pins_bottom.__0 -2mm
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measy outline.__0 >> outline.__1 -H-C
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measx outline.__1 >> outline.__0 8mm
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79
modules/tsop.fpd
Normal file
79
modules/tsop.fpd
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@ -0,0 +1,79 @@
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/* MACHINE-GENERATED ! */
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frame pin {
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__0: vec @(padw/2, C/2)
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__1: vec @(-padw/2, -C/2)
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pad "$n" . __0
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}
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frame pins_top {
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set n = N-i
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__0: vec @(x, 0mm)
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frame pin .
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}
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frame pins_bottom {
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set n = i+1
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__0: vec @(x, 0mm)
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frame pin .
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}
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frame pins {
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set y = W/2
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set x = (i-(N/2-1)/2)*e
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loop i = 0, N/2-1
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__0: vec @(0mm, y)
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frame pins_top .
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__1: vec @(0mm, -y)
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frame pins_bottom .
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}
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frame marker {
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set r = ((N/2-1)*e-x)/2-w
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__0: vec @(-x/2-1.5*Z, -(y/2-C/4))
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__1: vec .(-r/3, 0mm)
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circ __0 . w
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}
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frame outline {
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set w = 5mil
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set x = E
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set y = D1
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__0: vec @(x/2, y/2-C/4)
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__1: vec @(-x/2, -(y/2-C/4))
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rect . __0 w
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__2: vec @(-x/2, D1/2)
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__3: vec @(-x/2, -D1/2)
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frame marker @
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}
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package "$name-$N"
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unit mm
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table
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{ name, N, B, C, D, D1, E, e, padw, W, Z }
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{ "TSOP", 28, 11.25mm, 1.4mm, 13.425mm, 11.8mm, 8mm, 0.55mm, 0.2mm, 12.65mm, 0.25mm }
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{ "TSOP", 32, 18.1mm, 1.39mm, 20mm, 18.4mm, 8mm, 0.5mm, 0.27mm, 19.49mm, 0.25mm }
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{ "TSOP", 56, 18.1mm, 1.39mm, 20mm, 18.4mm, 14mm, 0.5mm, 0.27mm, 19.49mm, 0.25mm }
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frame outline @
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frame pins @
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measy pin.__1 -> pin.__0 1mm
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measy pin.__1 >> pin.__0 -E-3mm
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measy pin.__0 >> pin.__1 -E-1mm
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measx pin.__1 -> pin.__0 -e
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measx pins_top.__0 -> pins_top.__0 -2mm
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measy pins.__0 << pins_bottom.__0 -2.5mm
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measy outline.__0 >> outline.__1 -E-C
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measx outline.__1 >> outline.__0 8mm
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measx pins_bottom.__0 >> outline.__1 -2mm
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measy outline.__2 >> outline.__3 -3mm
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