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INFO: clean up by order
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Adam Wang
parent
983ee35126
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154
modules/INFO
154
modules/INFO
@ -5,18 +5,50 @@
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# N Data sheet identifier (N tag of BOOKSHELF; can be omitted if equal to F)
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#
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# Standard rectangular passive components
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F: stdpass
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# Solder pads and test points
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F: pads
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# Printed 8:10 card contacs
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F: 8_10-card
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# EUS (R-PDSS-T6)
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F: eus
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#
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# - for example: the PTH04000WAH data sheet, it's EUS
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# http://www.ti.com/lit/ds/symlink/pth04000w.pdf
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#
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# Fiducial (1 mm copper pad, 2 mm solder mask clearance)
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F: fiducial
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# IR Receiver Module
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F: ir
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#
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# From Vishay:
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#
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# - the TSOP322.., TSOP324.., TSOP348.., TSOP344.. data sheet
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# http://www.vishay.com/docs/81732/tsop348.pdf
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# MDIP
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F: mdip
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#
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# From FAIRCHILD:
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#
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# - the 6N138S data sheet
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# http://www.fairchildsemi.com/ds/6N/6N138.pdf
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#
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# Package Type:
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#
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# - MDIP 8L
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# http://www.fairchildsemi.com/package/packageDetails.html?id=PN_192-B08
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#
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# Package Drawing:
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#
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# http://www.fairchildsemi.com/dwg/N0/N08H.pdf
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# Mini-USB B receptable (SMT; almost generic)
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F: mini_usb_b
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# Solder pads and test points
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F: pads
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# "Generic" simple QFN
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F: qfn
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#
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@ -78,30 +110,28 @@ F: qfp
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# http://pdfserv.maxim-ic.com/land_patterns/90-0093.PDF
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#
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# Mini-USB B receptable (SMT; almost generic)
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F: mini_usb_b
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# SOIC
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F: soic
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#
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# From TI:
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#
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# - the SN75HVD12DR data sheet
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# http://www.ti.com/lit/ds/symlink/sn75hvd12.pdf
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#
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# Package Drawing:
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#
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# - D(JEDEC)
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# - R-PDSO-G8
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# http://www-s.ti.com/sc/psheets/msoi002j/msoi002j.pdf
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# - R-PDSO-G14
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# http://www-s.ti.com/sc/psheets/mpds177g/mpds177g.pdf
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# - R-PDSO-G16
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# http://www-s.ti.com/sc/psheets/mpds178g/mpds178g.pdf
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# USB A plug for SMT
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#
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# Note: the signal pads are enlarged by 0.2 mm and their center is shifted by
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# 0.1 mm with respect to the reference.
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#
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# According to the data sheet, the leads terminate at (2.00+/-0.10 mm)/2+
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# 2.48 mm = 3.48+/-0.10 mm from the center. The reference footprint puts the
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# edge of the pads at (2.00+/-0.10 mm)/2+2.6 mm = 3.6 mm+/-0.10 mm, so the
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# maximum lead end could be at 3.58 mm while the minimum pad edge could be at
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# 3.5 mm.
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#
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# Assuming that the pad is intended to extend a bit beyond the lead, we need
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# to add 0.2 mm to compensate for these tolerances. (The pad tolerance may not
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# be intended to be used this way, however, we still have to consider small
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# errors in registration, which also amount to about 0.1 mm, so the calculation
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# remains valid.)
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#
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F: usb_a_plug_smt
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F: sot
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# USB 2.0 from usb_20_040908, page 99
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F: usb-a-pcb
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# Standard rectangular passive components
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F: stdpass
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# SOT-323 package with counter-clockweise or clockwise pin assignment
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F: sot-323
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@ -125,51 +155,6 @@ F: ssop
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#
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# some conflicts with the outline exist
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F: sot
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# MDIP
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F: mdip
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#
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# From FAIRCHILD:
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#
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# - the 6N138S data sheet
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# http://www.fairchildsemi.com/ds/6N/6N138.pdf
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#
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# Package Type:
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#
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# - MDIP 8L
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# http://www.fairchildsemi.com/package/packageDetails.html?id=PN_192-B08
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#
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# Package Drawing:
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#
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# http://www.fairchildsemi.com/dwg/N0/N08H.pdf
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# SOIC
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F: soic
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#
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# From TI:
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#
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# - the SN75HVD12DR data sheet
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# http://www.ti.com/lit/ds/symlink/sn75hvd12.pdf
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#
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# Package Drawing:
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#
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# - D(JEDEC)
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# - R-PDSO-G8
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# http://www-s.ti.com/sc/psheets/msoi002j/msoi002j.pdf
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# - R-PDSO-G14
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# http://www-s.ti.com/sc/psheets/mpds177g/mpds177g.pdf
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# - R-PDSO-G16
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# http://www-s.ti.com/sc/psheets/mpds178g/mpds178g.pdf
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# IR Receiver Module
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F: ir
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#
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# From Vishay:
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#
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# - the TSOP322.., TSOP324.., TSOP348.., TSOP344.. data sheet
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# http://www.vishay.com/docs/81732/tsop348.pdf
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# "Generic" simple TSOP
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F: tsop
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#
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@ -203,3 +188,26 @@ F: to-252
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# http://www.national.com/packaging/mkt/td03b.pdf
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#
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# USB A plug for SMT
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#
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# Note: the signal pads are enlarged by 0.2 mm and their center is shifted by
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# 0.1 mm with respect to the reference.
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#
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# According to the data sheet, the leads terminate at (2.00+/-0.10 mm)/2+
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# 2.48 mm = 3.48+/-0.10 mm from the center. The reference footprint puts the
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# edge of the pads at (2.00+/-0.10 mm)/2+2.6 mm = 3.6 mm+/-0.10 mm, so the
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# maximum lead end could be at 3.58 mm while the minimum pad edge could be at
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# 3.5 mm.
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#
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# Assuming that the pad is intended to extend a bit beyond the lead, we need
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# to add 0.2 mm to compensate for these tolerances. (The pad tolerance may not
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# be intended to be used this way, however, we still have to consider small
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# errors in registration, which also amount to about 0.1 mm, so the calculation
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# remains valid.)
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#
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F: usb_a_plug_smt
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# USB 2.0 from usb_20_040908, page 99
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F: usb-a-pcb
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