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git://projects.qi-hardware.com/nn-usb-fpga.git
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Adding modelsim simulation files
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58
plasma/logic/simulation/glbl.v
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58
plasma/logic/simulation/glbl.v
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// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.11.156.1 2007/03/09 18:12:55 patrickp Exp $
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`timescale 1 ps / 1 ps
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module glbl ();
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parameter ROC_WIDTH = 100000;
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parameter TOC_WIDTH = 0;
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wire GSR;
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wire GTS;
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wire PRLD;
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reg GSR_int;
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reg GTS_int;
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reg PRLD_int;
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//-------- JTAG Globals --------------
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wire JTAG_TDO_GLBL;
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wire JTAG_TCK_GLBL;
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wire JTAG_TDI_GLBL;
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wire JTAG_TMS_GLBL;
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wire JTAG_TRST_GLBL;
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reg JTAG_CAPTURE_GLBL;
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reg JTAG_RESET_GLBL;
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reg JTAG_SHIFT_GLBL;
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reg JTAG_UPDATE_GLBL;
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reg JTAG_SEL1_GLBL = 0;
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reg JTAG_SEL2_GLBL = 0 ;
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reg JTAG_SEL3_GLBL = 0;
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reg JTAG_SEL4_GLBL = 0;
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reg JTAG_USER_TDO1_GLBL = 1'bz;
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reg JTAG_USER_TDO2_GLBL = 1'bz;
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reg JTAG_USER_TDO3_GLBL = 1'bz;
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reg JTAG_USER_TDO4_GLBL = 1'bz;
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assign (weak1, weak0) GSR = GSR_int;
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assign (weak1, weak0) GTS = GTS_int;
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assign (weak1, weak0) PRLD = PRLD_int;
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initial begin
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GSR_int = 1'b1;
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PRLD_int = 1'b1;
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#(ROC_WIDTH)
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GSR_int = 1'b0;
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PRLD_int = 1'b0;
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end
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initial begin
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GTS_int = 1'b1;
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#(TOC_WIDTH)
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GTS_int = 1'b0;
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end
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endmodule
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28
plasma/logic/simulation/plasma_TB.do
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28
plasma/logic/simulation/plasma_TB.do
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vlib work
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vmap work
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vcom -93 -work work ../mlite_pack.vhd
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vcom -93 -work work ../plasma.vhd
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vcom -93 -work work ../alu.vhd
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vcom -93 -work work ../control.vhd
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vcom -93 -work work ../mem_ctrl.vhd
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vcom -93 -work work ../mult.vhd
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vcom -93 -work work ../shifter.vhd
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vcom -93 -work work ../bus_mux.vhd
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vcom -93 -work work ../ddr_ctrl.vhd
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vcom -93 -work work ../mlite_cpu.vhd
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vcom -93 -work work ../pc_next.vhd
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vcom -93 -work work ../cache.vhd
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vcom -93 -work work ../pipeline.vhd
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vcom -93 -work work ../reg_bank.vhd
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vcom -93 -work work ../uart.vhd
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vcom -93 -work work ../ram_image.vhd
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vcom -93 -work work ../plasma_TB.vhd
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vsim -t 1ps tbench
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view wave
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#add wave *
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do wave.do
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view structure
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view signals
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run 1ms
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36
plasma/logic/simulation/wave.do
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36
plasma/logic/simulation/wave.do
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onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -format Logic /tbench/clk
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add wave -noupdate -format Logic /tbench/reset
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add wave -noupdate -format Logic /tbench/interrupt
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add wave -noupdate -format Logic /tbench/mem_write
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add wave -noupdate -format Literal -radix hexadecimal /tbench/data_read
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add wave -noupdate -format Logic /tbench/pause1
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add wave -noupdate -format Logic /tbench/pause2
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add wave -noupdate -format Logic /tbench/pause
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add wave -noupdate -format Logic /tbench/u1_plasma/enable_misc
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add wave -noupdate -format Logic /tbench/u1_plasma/enable_uart
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add wave -noupdate -format Logic /tbench/uart_write
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add wave -noupdate -format Literal -radix hexadecimal /tbench/u1_plasma/cpu_data_w
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add wave -noupdate -format Literal -radix hexadecimal /tbench/u1_plasma/cpu_data_r
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add wave -noupdate -format Literal -radix hexadecimal /tbench/u1_plasma/address_next
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add wave -noupdate -format Literal /tbench/gpioa_in
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add wave -noupdate -format Logic /tbench/u1_plasma/write_enable
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add wave -noupdate -format Literal /tbench/u1_plasma/cpu_byte_we
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add wave -noupdate -format Literal -expand /tbench/u1_plasma/byte_we_next
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 1} {75144797 ps} 0}
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configure wave -namecolwidth 269
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configure wave -valuecolwidth 40
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 1
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configure wave -griddelta 40
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configure wave -timeline 0
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update
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WaveRestoreZoom {71704646 ps} {72130128 ps}
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28
plasma/logic/simulation/wave1.do
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28
plasma/logic/simulation/wave1.do
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onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -format Logic /plasma_TB_v/clk
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add wave -noupdate -format Logic /plasma_TB_v/reset
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add wave -noupdate -format Literal /plasma_TB_v/data_tx
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add wave -noupdate -format Event /plasma_TB_v/reset_trigger
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add wave -noupdate -format Event /plasma_TB_v/reset_done_trigger
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add wave -noupdate -format Literal /plasma_TB_v/uut/data_read
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add wave -noupdate -format Logic /plasma_TB_v/uut/ram_enable
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add wave -noupdate -format Literal -radix hexadecimal /plasma_TB_v/uut/cpu_data_w
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add wave -noupdate -format Literal -radix hexadecimal /plasma_TB_v/uut/cpu_data_r
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add wave -noupdate -format Literal /plasma_TB_v/uut/byte_we_next
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 1} {3952754 ps} 0}
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configure wave -namecolwidth 240
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configure wave -valuecolwidth 100
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 1
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configure wave -griddelta 40
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configure wave -timeline 0
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update
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WaveRestoreZoom {3946113 ps} {4013617 ps}
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