Adding diagrams to DOCS and fixing someting source code.

Examples/ADC/Scope-QT-src/ADCw.cpp

@@ -2,7 +2,7 @@
 
 ADCw::ADCw()
 {
-	BUFFER_OFFSET = 9;
+	BUFFER_OFFSET = 8;					//Ignore first 16 samples
 	ADC_SPI_CLKDIV=ADC_SPI_CLKDIV_MAX;  //Set clock to minimum speed
 	BUFFER_LEN=16;
 	MUX_CHANNELS =0;
@@ -65,7 +65,7 @@ JZ_REG* ADCw::takeSamplesADC(int CHANNEL)
 void ADCw::adcConfig(uchar CMD)
 {
 	ADCBuffer[0] =  (((MUX_CHANNELS<<6) + CMD)<<24) + \
-					((BUFFER_LEN+(BUFFER_OFFSET-1)*2) << 8) + \
+					((BUFFER_LEN+BUFFER_OFFSET*2) << 8) + \
 					(ADC_SPI_CLKDIV);
 	while(adcCheckBufferFull()) usleep (10);
 }

Examples/ADC/Scope-QT-src/Makefile

@@ -1,6 +1,6 @@
 #############################################################################
 # Makefile for building: ADC
-# Generated by qmake (2.01a) (Qt 4.6.2) on: Mon Apr 12 21:21:04 2010
+# Generated by qmake (2.01a) (Qt 4.6.2) on: Wed Apr 14 21:04:10 2010
 # Project:  ADC1.pro
 # Template: app
 # Command: /home/juan64bits/ebd/ECB/openwrt-xburst/build_dir/target-mipsel_uClibc-0.9.30.1/qt-everywhere-opensource-src-4.6.2/bin/qmake -spec ../../../../openwrt-xburst/build_dir/target-mipsel_uClibc-0.9.30.1/qt-everywhere-opensource-src-4.6.2/mkspecs/qws/linux-openwrt-g++ -unix -o Makefile ADC1.pro

Examples/ADC/logic/ADC_peripheral.v

@@ -17,8 +17,7 @@ module ADC_peripheral(  clk, reset, cs, ADC_EOC, ADC_CS, ADC_CSTART,
     wire [7:0]   rdBus1;    
     reg  [7:0]   wrBus2;
     reg  [10:0]  addr2;
-    reg  we1=0;
-    reg  we2=0;
+    reg  we1=0, we2=0;
     wire we;
        
     //Control registers
@@ -40,12 +39,13 @@ module ADC_peripheral(  clk, reset, cs, ADC_EOC, ADC_CS, ADC_CSTART,
         //TEMPS
     reg [9:0]  SIZEB1=0;      // Temporal for buffer size
     reg [9:0]  SIZEB2=0;      // Temporal for buffer size
+        wire[9:0] subSIZEB;       // Temporal for subtraction SIZEB1-SIZEB2
     reg [2:0]  CMD_OFFSET=0;  // Channel offset counter MOD8
     wire[2:0]  CMD_OFFSETt;   // Channel offset to use
     wire[3:0]  CMD_ADCt;      // Temporal for channel offset  
      
     assign ADC_CSTART = 1'b1;
-
+    
     // Dual-port RAM instatiation
     RAMB16_S9_S9 ba0(
             .DOA(rdBus1),         // Port A 8-bit Data Output
@@ -216,7 +216,7 @@ module ADC_peripheral(  clk, reset, cs, ADC_EOC, ADC_CS, ADC_CSTART,
                  4: begin loadB <= 0; initB<=0; w_st0<= 0; end
             endcase            
         end
- 
+    
     // Reception Buffer        
     always @(posedge clk)
     if(reset) 
@@ -245,14 +245,14 @@ module ADC_peripheral(  clk, reset, cs, ADC_EOC, ADC_CS, ADC_CSTART,
              2: begin 
                     //Write data on BRAM  (LOW)
                     wrBus2[7:0] <= out_buffer[7:0]; 
-                    addr2 <= 4+2*(SIZEB1-SIZEB2);
+                    addr2 <= {subSIZEB,1'b0};
                     we2 <= 1; w_st2 <= 3; 
                 end
              3: begin we2 <= 0; w_st2 <= 4;  end    
              4: begin 
                     //Write data on BRAM  (HI)
-                    wrBus2[7:0] <= {CMD_OFFSETt,2'b00,out_buffer[9:8]}; 
-                    addr2 <= 5+2*(SIZEB1-SIZEB2); 
+                    wrBus2[7:0] <= out_buffer[9:8]; 
+                    addr2 <= {subSIZEB,1'b1}; 
                     we2 <= 1; w_st2 <= 5;
                 end
              5: begin 
@@ -261,6 +261,8 @@ module ADC_peripheral(  clk, reset, cs, ADC_EOC, ADC_CS, ADC_CSTART,
         endcase
       end     
     
+    assign subSIZEB = SIZEB1-SIZEB2;
+    
     // ADC channel offset, counter MOD8
     always @(posedge clk)
         if(fullB | reset) 

docs/wiki/.~lock.ADC.odg#

@@ -1 +0,0 @@
-Juan64Bits ,juan64bits,Maximus,12.04.2010 22:34,file:///home/juan64bits/.openoffice.org/3;