Adding file-system

2025-04-21 12:27:27 +03:00 · 2010-09-21 17:05:23 -05:00
parent 0975cd73dc
commit 9116375be4
280 changed files with 135463 additions and 2 deletions
--- a/sie_fs/usr/bin/bsdl2jtag
+++ b/sie_fs/usr/bin/bsdl2jtag
@@ -0,0 +1,48 @@
+#!/bin/bash
+#
+# $Id: bsdl2jtag 1467 2009-03-28 00:31:24Z arniml $
+#
+# Convert a BSDL file to a jtag part description
+#
+# Copyright (C) 2009, A. Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+scriptname=`basename $0`
+
+function usage ()
+{
+    cat <<EOF
+Usage:	$scriptname <bsdl-file> <jtag-file>
+Converts a BSDL file to a jtag part description.
+
+Parameters
+  bsdl-file :  Name of BSDL file
+  jtag-file :  Name of converted jtag description file
+
+EOF
+}
+
+if [[ -z $1 || -z $2 ]]; then
+    usage
+    exit 1
+fi
+
+
+echo "bsdl dump $1" | jtag > $2
+
+exit 0
--- a/sie_fs/usr/bin/jtag
+++ b/sie_fs/usr/bin/jtag
--- a/sie_fs/usr/bin/sgen
+++ b/sie_fs/usr/bin/sgen
--- a/sie_fs/usr/bin/siggen
+++ b/sie_fs/usr/bin/siggen
--- a/sie_fs/usr/bin/sweepgen
+++ b/sie_fs/usr/bin/sweepgen
--- a/sie_fs/usr/bin/xc3sprog
+++ b/sie_fs/usr/bin/xc3sprog
--- a/sie_fs/usr/local/share/urjtag/MANUFACTURERS
+++ b/sie_fs/usr/local/share/urjtag/MANUFACTURERS
@@ -0,0 +1,48 @@
+#
+# $Id: MANUFACTURERS 856 2007-12-16 11:25:37Z kawk $
+#
+# Manufacturer ID database
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+#     Identification Code", September 2001, Order Number: JEP106-K
+#
+
+# bits 11-1 of the Device Identification Register
+00000000110	lexra		Lexr
+00000000111	hitachi		Hitachi
+00000001001	intel		Intel
+00000001110	freescale	Freescale (Motorola)
+00000010101	philips		Philips Semi. (Signetics)
+00000011000	toshiba		Toshiba
+00000011111	atmel		Atmel
+00000100001	lattice		Lattice Semiconductors
+00000100100	ibm		IBM Semiconductors
+00000110100	cypress		Cypress
+00000110101	dec		DEC
+00001001001	xilinx		Xilinx
+00001100101	analog		Analog Devices
+00001101110	altera		Altera
+00010101011	lattice		Lattice Semiconductors
+00010111111	broadcom	Broadcom
+00101010000	broadcom	Broadcom	# or "Sibyte, Incorporated" ?
+00101110000	brecis		Brecis (PMC-Sierra)
+11110000111	arm  		ARM
--- a/sie_fs/usr/local/share/urjtag/admtek/adm5120/adm5120
+++ b/sie_fs/usr/local/share/urjtag/admtek/adm5120/adm5120
@@ -0,0 +1,50 @@
+#
+# $Id$
+#
+# JTAG declarations for ADMtek/Infineon ADM5120
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register	BR		 1
+register	BSR		 1
+register	DIR		32
+register	EJIMPCODE	32
+register	EJADDRESS	32
+register	EJDATA		32
+register	EJCONTROL	32
+register	EJALL		96
+register	EJFASTDATA	33
+
+instruction length 5
+
+instruction	BYPASS		11111	BR
+instruction	SAMPLE/PRELOAD	00010	BSR
+instruction	IDCODE		00001	DIR
+instruction	EJTAG_IMPCODE	00011	EJIMPCODE
+instruction	EJTAG_ADDRESS	01000	EJADDRESS
+instruction	EJTAG_DATA	01001	EJDATA
+instruction	EJTAG_CONTROL	01010	EJCONTROL
+instruction	EJTAG_ALL	01011	EJALL
+instruction	EJTAGBOOT	01100	BR
+instruction	NORMALBOOT	01101	BR
+instruction	EJTAG_FASTDATA	01110	EJFASTDATA
+
+initbus ejtag
+endian little
--- a/sie_fs/usr/local/share/urjtag/altera/PARTS
+++ b/sie_fs/usr/local/share/urjtag/altera/PARTS
@@ -0,0 +1,28 @@
+#
+# $Id: PARTS 897 2007-12-29 13:02:32Z arniml $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 27-12 of the Device Identification Register
+0010000010000010	ep1c6q240		EP1C6Q240
+0010000010000011	ep1c12			EP1C12
+0010000010000100	ep1c20f400		EP1C20F400
+0111000100101000	epm7128aetc100		EPM7128AETC100
+0111000001100100	epm3064a		EPM3064A
+0010000010110010	ep2c8			EP2C8
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c12/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c12/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep1c12		0
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c12/ep1c12
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c12/ep1c12
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c12/f256
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c12/f256
@@ -0,0 +1,204 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
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--- a/sie_fs/usr/local/share/urjtag/altera/ep1c12/f324
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c12/f324
@@ -0,0 +1,268 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12F324
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IOC4	BSC0
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+salias	IOT6	BSC173
+salias	IOP7	BSC174
+salias	IOP6	BSC175
+salias	IOU6	BSC176
+salias	IOV6	BSC177
+salias	IOR5	BSC178
+salias	IOR4	BSC179
+salias	IOU5	BSC180
+salias	IOT5	BSC181
+salias	IOU4	BSC182
+salias	IOT4	BSC183
+salias	ION8	BSC184
+salias	IOM8	BSC185
+salias	IOV4	BSC186
+salias	IOU3	BSC187
+salias	IOT3	BSC188
+salias	IOT2	BSC189
+salias	IOR3	BSC190
+salias	IOR2	BSC191
+salias	IOP4	BSC192
+salias	IOR1	BSC193
+salias	IOP3	BSC194
+salias	IOP2	BSC195
+salias	IOP5	BSC196
+salias	ION4	BSC197
+salias	ION3	BSC198
+salias	ION6	BSC199
+salias	ION5	BSC200
+salias	ION7	BSC201
+salias	IOM6	BSC202
+salias	ION2	BSC203
+salias	ION1	BSC204
+salias	IOM4	BSC205
+salias	IOM5	BSC206
+salias	IOM2	BSC207
+salias	IOM3	BSC208
+salias	IOM1	BSC209
+salias	IOL4	BSC210
+salias	IOL5	BSC211
+salias	IOL3	BSC212
+salias	IOL2	BSC213
+salias	IOL6	BSC214
+salias	IOL7	BSC215
+salias	IOK5	BSC216
+salias	IOK4	BSC217
+salias	IOK6	BSC218
+salias	IOJ1	BSC228
+salias	IOH6	BSC229
+salias	IOH5	BSC230
+salias	IOH4	BSC231
+salias	IOH3	BSC232
+salias	IOH2	BSC233
+salias	IOH1	BSC234
+salias	IOG6	BSC235
+salias	IOG5	BSC236
+salias	IOG4	BSC237
+salias	IOG3	BSC238
+salias	IOF7	BSC239
+salias	IOF6	BSC240
+salias	IOG2	BSC241
+salias	IOG1	BSC242
+salias	IOF5	BSC243
+salias	IOF4	BSC244
+salias	IOF3	BSC245
+salias	IOF2	BSC246
+salias	IOE5	BSC247
+salias	IOE4	BSC248
+salias	IOF1	BSC249
+salias	IOE2	BSC250
+salias	IOE3	BSC251
+salias	IOD1	BSC252
+salias	IOD4	BSC253
+salias	IOD2	BSC254
+salias	IOD3	BSC255
+salias	IOC2	BSC256
+salias	IOC3	BSC257
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c12/q240
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c12/q240
@@ -0,0 +1,192 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12Q240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IO240	BSC0
+salias	IO239	BSC1
+salias	IO238	BSC2
+salias	IO237	BSC3
+salias	IO236	BSC4
+salias	IO235	BSC5
+salias	IO234	BSC6
+salias	IO233	BSC7
+salias	IO228	BSC8
+salias	IO227	BSC9
+salias	IO226	BSC10
+salias	IO225	BSC11
+salias	IO224	BSC12
+salias	IO223	BSC13
+salias	IO222	BSC14
+salias	IO219	BSC16
+salias	IO218	BSC17
+salias	IO217	BSC18
+salias	IO216	BSC19
+salias	IO215	BSC20
+salias	IO214	BSC21
+salias	IO213	BSC22
+salias	IO208	BSC30
+salias	IO207	BSC33
+salias	IO206	BSC34
+salias	IO203	BSC36
+salias	IO202	BSC37
+salias	IO201	BSC38
+salias	IO200	BSC39
+salias	IO197	BSC48
+salias	IO196	BSC49
+salias	IO195	BSC50
+salias	IO194	BSC51
+salias	IO193	BSC52
+salias	IO188	BSC53
+salias	IO187	BSC54
+salias	IO186	BSC55
+salias	IO185	BSC56
+salias	IO184	BSC57
+salias	IO183	BSC58
+salias	IO182	BSC59
+salias	IO181	BSC60
+salias	IO180	BSC61
+salias	IO179	BSC62
+salias	IO178	BSC63
+salias	IO177	BSC64
+salias	IO176	BSC65
+salias	IO175	BSC66
+salias	IO174	BSC67
+salias	IO173	BSC68
+salias	IO170	BSC69
+salias	IO169	BSC70
+salias	IO168	BSC71
+salias	IO167	BSC72
+salias	IO166	BSC73
+salias	IO165	BSC74
+salias	IO164	BSC75
+salias	IO163	BSC76
+salias	IO162	BSC77
+salias	IO161	BSC78
+salias	IO160	BSC79
+salias	IO159	BSC80
+salias	IO158	BSC81
+salias	IO156	BSC91
+salias	IO144	BSC96
+salias	IO143	BSC97
+salias	IO141	BSC108
+salias	IO140	BSC109
+salias	IO139	BSC110
+salias	IO138	BSC111
+salias	IO137	BSC112
+salias	IO136	BSC113
+salias	IO135	BSC114
+salias	IO134	BSC115
+salias	IO133	BSC116
+salias	IO132	BSC117
+salias	IO131	BSC118
+salias	IO128	BSC119
+salias	IO127	BSC120
+salias	IO126	BSC121
+salias	IO125	BSC122
+salias	IO124	BSC123
+salias	IO123	BSC124
+salias	IO122	BSC125
+salias	IO121	BSC126
+salias	IO120	BSC127
+salias	IO119	BSC128
+salias	IO118	BSC129
+salias	IO117	BSC130
+salias	IO116	BSC131
+salias	IO115	BSC132
+salias	IO114	BSC133
+salias	IO113	BSC134
+salias	IO108	BSC135
+salias	IO107	BSC136
+salias	IO106	BSC137
+salias	IO105	BSC138
+salias	IO104	BSC139
+salias	IO101	BSC148
+salias	IO100	BSC149
+salias	IO99	BSC150
+salias	IO98	BSC151
+salias	IO95	BSC153
+salias	IO94	BSC154
+salias	IO93	BSC157
+salias	IO88	BSC165
+salias	IO87	BSC166
+salias	IO86	BSC167
+salias	IO85	BSC168
+salias	IO84	BSC169
+salias	IO83	BSC170
+salias	IO82	BSC171
+salias	IO79	BSC173
+salias	IO78	BSC174
+salias	IO77	BSC175
+salias	IO76	BSC176
+salias	IO75	BSC177
+salias	IO74	BSC178
+salias	IO73	BSC179
+salias	IO68	BSC180
+salias	IO67	BSC181
+salias	IO66	BSC182
+salias	IO65	BSC183
+salias	IO64	BSC184
+salias	IO63	BSC185
+salias	IO62	BSC186
+salias	IO61	BSC187
+salias	IO60	BSC188
+salias	IO59	BSC189
+salias	IO58	BSC190
+salias	IO57	BSC191
+salias	IO56	BSC192
+salias	IO55	BSC193
+salias	IO54	BSC194
+salias	IO53	BSC195
+salias	IO50	BSC196
+salias	IO49	BSC197
+salias	IO48	BSC198
+salias	IO47	BSC199
+salias	IO46	BSC200
+salias	IO45	BSC201
+salias	IO44	BSC202
+salias	IO43	BSC203
+salias	IO42	BSC204
+salias	IO41	BSC205
+salias	IO39	BSC216
+salias	IO38	BSC217
+salias	IO37	BSC218
+salias	IO24	BSC228
+salias	IO23	BSC229
+salias	IO21	BSC239
+salias	IO20	BSC240
+salias	IO19	BSC241
+salias	IO18	BSC242
+salias	IO17	BSC243
+salias	IO16	BSC244
+salias	IO15	BSC245
+salias	IO14	BSC246
+salias	IO13	BSC247
+salias	IO12	BSC248
+salias	IO11	BSC249
+salias	IO8	BSC250
+salias	IO7	BSC251
+salias	IO6	BSC252
+salias	IO5	BSC253
+salias	IO4	BSC254
+salias	IO3	BSC255
+salias	IO2	BSC256
+salias	IO1	BSC257
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c20f400/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c20f400/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep1c20f400		0
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c20f400/ep1c20f400
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c20f400/ep1c20f400
--- a/sie_fs/usr/local/share/urjtag/altera/ep1c6q240/ep1c6q240
+++ b/sie_fs/usr/local/share/urjtag/altera/ep1c6q240/ep1c6q240
@@ -0,0 +1,818 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# JTAG declarations for EP1C6Q240 idcode 00000010000010000010000011011101
+# generated on Thu Jun 30 23:25:36 2005 by /home/tde/kentp/bsdl2jtag_kp.pl 0.1 from /home/tde/kentp/ep1c6q240_kp.bsd
+signal IO13
+signal IO93
+signal IO113
+signal IO203
+signal IO174
+signal IO41
+signal IO38
+signal IO127
+signal IO73
+signal IO64
+signal TMS
+signal IO83
+signal IO7
+signal IO85
+signal IO107
+signal IO118
+signal IO2
+signal IO234
+signal IO239
+signal IO135
+signal IO218
+signal IO98
+signal IO167
+signal IO137
+signal IO236
+signal IO14
+signal MSEL0
+signal IO221
+signal IO58
+signal IO184
+signal IO49
+signal IO18
+signal IO97
+signal TCK
+signal IO143
+signal IO186
+signal CLK2
+signal IO81
+signal IO63
+signal IO177
+signal IO123
+signal IO100
+signal IO144
+signal IO162
+signal IO185
+signal IO20
+signal IO198
+signal IO74
+signal IO104
+signal IO21
+signal DCLK
+signal IO217
+signal IO68
+signal IO164
+signal IO139
+signal IO45
+signal IO228
+signal IO238
+signal IO114
+signal IO188
+signal IO205
+signal IO116
+signal IO102
+signal GND
+signal IO222
+signal IO176
+signal IO56
+signal IO179
+signal IO165
+signal IO240
+signal IO1
+signal IO76
+signal IO182
+signal IO53
+signal IO200
+signal DATA0
+signal IO161
+signal IO24
+signal IO78
+signal IO94
+signal IO43
+signal IO4
+signal IO195
+signal IO16
+signal CLK0
+signal IO214
+signal IO121
+signal VCC
+signal IO47
+signal IO61
+signal IO160
+signal IO11
+signal IO82
+signal IO187
+signal IO65
+signal IO180
+signal IO213
+signal IO15
+signal IO88
+signal IO220
+signal IO156
+signal IO226
+signal IO158
+signal TDO
+signal IO126
+signal IO215
+signal IO134
+signal IO206
+signal IO23
+signal IO122
+signal IO169
+signal IO99
+signal IO54
+signal IO119
+signal IO80
+signal IO95
+signal IO128
+signal IO17
+signal IO106
+signal IO59
+signal IO202
+signal IO67
+signal IO124
+signal IO168
+signal IO132
+signal IO108
+signal IO235
+signal IO12
+signal NCONFIG
+signal NCE
+signal IO224
+signal IO233
+signal IO199
+signal IO183
+signal NCEO
+signal IO48
+signal IO19
+signal IO131
+signal IO136
+signal IO39
+signal IO96
+signal MSEL1
+signal IO6
+signal IO178
+signal IO101
+signal IO87
+signal IO175
+signal IO138
+signal TDI
+signal IO196
+signal IO193
+signal IO159
+signal IO237
+signal IO125
+signal IO105
+signal IO86
+signal IO117
+signal IO163
+signal CLK3
+signal IO140
+signal IO194
+signal IO5
+signal IO75
+signal IO50
+signal IO84
+signal IO181
+signal IO225
+signal IO170
+signal NSTATUS
+signal IO141
+signal IO207
+signal IO103
+signal IO120
+signal IO8
+signal IO166
+signal IO208
+signal CONF_DONE
+signal IO216
+signal IO79
+signal IO66
+signal IO57
+signal IO62
+signal IO77
+signal IO133
+signal IO223
+signal IO3
+signal IO55
+signal IO173
+signal IO219
+signal IO227
+signal IO60
+signal IO46
+signal IO44
+signal IO197
+signal IO204
+signal CLK1
+signal IO42
+signal IO115
+signal IO37
+signal IO201
+register BYPASS 1
+register BSR 582
+register IOCSR 3366
+register DEVICE_ID 32
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+# instruction USERCODE 0000000111 <unspecified>
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+# instruction CLAMP 0000001010 <unspecified>
+# instruction HIGHZ 0000001011 <unspecified>
+instruction CONFIG_IO 0000001101 IOCSR
+bit  0 I ? IO240
+bit  1 C 1 *
+bit  2 O ? IO240 1 1 Z
+bit  3 I ? IO239
+bit  4 C 1 *
+bit  5 O ? IO239 4 1 Z
+bit  6 I ? IO238
+bit  7 C 1 *
+bit  8 O ? IO238 7 1 Z
+bit  9 I ? IO237
+bit 10 C 1 *
+bit 11 O ? IO237 10 1 Z
+bit 12 I ? IO236
+bit 13 C 1 *
+bit 14 O ? IO236 13 1 Z
+bit 15 I ? IO235
+bit 16 C 1 *
+bit 17 O ? IO235 16 1 Z
+bit 18 I ? IO234
+bit 19 C 1 *
+bit 20 O ? IO234 19 1 Z
+bit 21 I ? IO233
+bit 22 C 1 *
+bit 23 O ? IO233 22 1 Z
+bit 24 I ? IO228
+bit 25 C 1 *
+bit 26 O ? IO228 25 1 Z
+bit 27 I ? IO227
+bit 28 C 1 *
+bit 29 O ? IO227 28 1 Z
+bit 30 I ? IO226
+bit 31 C 1 *
+bit 32 O ? IO226 31 1 Z
+bit 33 I ? IO225
+bit 34 C 1 *
+bit 35 O ? IO225 34 1 Z
+bit 36 I ? IO224
+bit 37 C 1 *
+bit 38 O ? IO224 37 1 Z
+bit 39 I ? IO223
+bit 40 C 1 *
+bit 41 O ? IO223 40 1 Z
+bit 42 I ? IO222
+bit 43 C 1 *
+bit 44 O ? IO222 43 1 Z
+bit 45 I ? IO221
+bit 46 C 1 *
+bit 47 O ? IO221 46 1 Z
+bit 48 I ? IO220
+bit 49 C 1 *
+bit 50 O ? IO220 49 1 Z
+bit 51 I ? IO219
+bit 52 C 1 *
+bit 53 O ? IO219 52 1 Z
+bit 54 I ? IO218
+bit 55 C 1 *
+bit 56 O ? IO218 55 1 Z
+bit 57 I ? IO217
+bit 58 C 1 *
+bit 59 O ? IO217 58 1 Z
+bit 60 I ? IO216
+bit 61 C 1 *
+bit 62 O ? IO216 61 1 Z
+bit 63 I ? IO215
+bit 64 C 1 *
+bit 65 O ? IO215 64 1 Z
+bit 66 I ? IO214
+bit 67 C 1 *
+bit 68 O ? IO214 67 1 Z
+bit 69 I ? IO213
+bit 70 C 1 *
+bit 71 O ? IO213 70 1 Z
+bit 72 I ? IO208
+bit 73 C 1 *
+bit 74 O ? IO208 73 1 Z
+bit 75 I ? IO207
+bit 76 C 1 *
+bit 77 O ? IO207 76 1 Z
+bit 78 I ? IO206
+bit 79 C 1 *
+bit 80 O ? IO206 79 1 Z
+bit 81 I ? IO205
+bit 82 C 1 *
+bit 83 O ? IO205 82 1 Z
+bit 84 I ? IO204
+bit 85 C 1 *
+bit 86 O ? IO204 85 1 Z
+bit 87 I ? IO203
+bit 88 C 1 *
+bit 89 O ? IO203 88 1 Z
+bit 90 I ? IO202
+bit 91 C 1 *
+bit 92 O ? IO202 91 1 Z
+bit 93 I ? IO201
+bit 94 C 1 *
+bit 95 O ? IO201 94 1 Z
+bit 96 I ? IO200
+bit 97 C 1 *
+bit 98 O ? IO200 97 1 Z
+bit 99 I ? IO199
+bit 100 C 1 *
+bit 101 O ? IO199 100 1 Z
+bit 102 I ? IO198
+bit 103 C 1 *
+bit 104 O ? IO198 103 1 Z
+bit 105 I ? IO197
+bit 106 C 1 *
+bit 107 O ? IO197 106 1 Z
+bit 108 I ? IO196
+bit 109 C 1 *
+bit 110 O ? IO196 109 1 Z
+bit 111 I ? IO195
+bit 112 C 1 *
+bit 113 O ? IO195 112 1 Z
+bit 114 I ? IO194
+bit 115 C 1 *
+bit 116 O ? IO194 115 1 Z
+bit 117 I ? IO193
+bit 118 C 1 *
+bit 119 O ? IO193 118 1 Z
+bit 120 I ? IO188
+bit 121 C 1 *
+bit 122 O ? IO188 121 1 Z
+bit 123 I ? IO187
+bit 124 C 1 *
+bit 125 O ? IO187 124 1 Z
+bit 126 I ? IO186
+bit 127 C 1 *
+bit 128 O ? IO186 127 1 Z
+bit 129 I ? IO185
+bit 130 C 1 *
+bit 131 O ? IO185 130 1 Z
+bit 132 I ? IO184
+bit 133 C 1 *
+bit 134 O ? IO184 133 1 Z
+bit 135 I ? IO183
+bit 136 C 1 *
+bit 137 O ? IO183 136 1 Z
+bit 138 I ? IO182
+bit 139 C 1 *
+bit 140 O ? IO182 139 1 Z
+bit 141 I ? IO181
+bit 142 C 1 *
+bit 143 O ? IO181 142 1 Z
+bit 144 I ? IO180
+bit 145 C 1 *
+bit 146 O ? IO180 145 1 Z
+bit 147 I ? IO179
+bit 148 C 1 *
+bit 149 O ? IO179 148 1 Z
+bit 150 I ? IO178
+bit 151 C 1 *
+bit 152 O ? IO178 151 1 Z
+bit 153 I ? IO177
+bit 154 C 1 *
+bit 155 O ? IO177 154 1 Z
+bit 156 I ? IO176
+bit 157 C 1 *
+bit 158 O ? IO176 157 1 Z
+bit 159 I ? IO175
+bit 160 C 1 *
+bit 161 O ? IO175 160 1 Z
+bit 162 I ? IO174
+bit 163 C 1 *
+bit 164 O ? IO174 163 1 Z
+bit 165 I ? IO173
+bit 166 C 1 *
+bit 167 O ? IO173 166 1 Z
+bit 168 I ? IO170
+bit 169 C 1 *
+bit 170 O ? IO170 169 1 Z
+bit 171 I ? IO169
+bit 172 C 1 *
+bit 173 O ? IO169 172 1 Z
+bit 174 I ? IO168
+bit 175 C 1 *
+bit 176 O ? IO168 175 1 Z
+bit 177 I ? IO167
+bit 178 C 1 *
+bit 179 O ? IO167 178 1 Z
+bit 180 I ? IO166
+bit 181 C 1 *
+bit 182 O ? IO166 181 1 Z
+bit 183 I ? IO165
+bit 184 C 1 *
+bit 185 O ? IO165 184 1 Z
+bit 186 I ? IO164
+bit 187 C 1 *
+bit 188 O ? IO164 187 1 Z
+bit 189 I ? IO163
+bit 190 C 1 *
+bit 191 O ? IO163 190 1 Z
+bit 192 I ? IO162
+bit 193 C 1 *
+bit 194 O ? IO162 193 1 Z
+bit 195 I ? IO161
+bit 196 C 1 *
+bit 197 O ? IO161 196 1 Z
+bit 198 I ? IO160
+bit 199 C 1 *
+bit 200 O ? IO160 199 1 Z
+bit 201 I ? IO159
+bit 202 C 1 *
+bit 203 O ? IO159 202 1 Z
+bit 204 I ? IO158
+bit 205 C 1 *
+bit 206 O ? IO158 205 1 Z
+bit 207 I ? IO156
+bit 208 C 1 *
+bit 209 O ? IO156 208 1 Z
+bit 210 I ? CLK2
+bit 211 X ? *
+bit 212 X ? *
+bit 213 X ? *
+bit 214 X 1 *
+bit 215 X ? *
+bit 216 X ? *
+bit 217 X 1 *
+bit 218 X ? *
+bit 219 X ? *
+bit 220 X 1 *
+bit 221 X ? *
+bit 222 I ? IO144
+bit 223 C 1 *
+bit 224 O ? IO144 223 1 Z
+bit 225 I ? IO143
+bit 226 C 1 *
+bit 227 O ? IO143 226 1 Z
+bit 228 I ? IO141
+bit 229 C 1 *
+bit 230 O ? IO141 229 1 Z
+bit 231 I ? IO140
+bit 232 C 1 *
+bit 233 O ? IO140 232 1 Z
+bit 234 I ? IO139
+bit 235 C 1 *
+bit 236 O ? IO139 235 1 Z
+bit 237 I ? IO138
+bit 238 C 1 *
+bit 239 O ? IO138 238 1 Z
+bit 240 I ? IO137
+bit 241 C 1 *
+bit 242 O ? IO137 241 1 Z
+bit 243 I ? IO136
+bit 244 C 1 *
+bit 245 O ? IO136 244 1 Z
+bit 246 I ? IO135
+bit 247 C 1 *
+bit 248 O ? IO135 247 1 Z
+bit 249 I ? IO134
+bit 250 C 1 *
+bit 251 O ? IO134 250 1 Z
+bit 252 I ? IO133
+bit 253 C 1 *
+bit 254 O ? IO133 253 1 Z
+bit 255 I ? IO132
+bit 256 C 1 *
+bit 257 O ? IO132 256 1 Z
+bit 258 I ? IO131
+bit 259 C 1 *
+bit 260 O ? IO131 259 1 Z
+bit 261 I ? IO128
+bit 262 C 1 *
+bit 263 O ? IO128 262 1 Z
+bit 264 I ? IO127
+bit 265 C 1 *
+bit 266 O ? IO127 265 1 Z
+bit 267 I ? IO126
+bit 268 C 1 *
+bit 269 O ? IO126 268 1 Z
+bit 270 I ? IO125
+bit 271 C 1 *
+bit 272 O ? IO125 271 1 Z
+bit 273 I ? IO124
+bit 274 C 1 *
+bit 275 O ? IO124 274 1 Z
+bit 276 I ? IO123
+bit 277 C 1 *
+bit 278 O ? IO123 277 1 Z
+bit 279 I ? IO122
+bit 280 C 1 *
+bit 281 O ? IO122 280 1 Z
+bit 282 I ? IO121
+bit 283 C 1 *
+bit 284 O ? IO121 283 1 Z
+bit 285 I ? IO120
+bit 286 C 1 *
+bit 287 O ? IO120 286 1 Z
+bit 288 I ? IO119
+bit 289 C 1 *
+bit 290 O ? IO119 289 1 Z
+bit 291 I ? IO118
+bit 292 C 1 *
+bit 293 O ? IO118 292 1 Z
+bit 294 I ? IO117
+bit 295 C 1 *
+bit 296 O ? IO117 295 1 Z
+bit 297 I ? IO116
+bit 298 C 1 *
+bit 299 O ? IO116 298 1 Z
+bit 300 I ? IO115
+bit 301 C 1 *
+bit 302 O ? IO115 301 1 Z
+bit 303 I ? IO114
+bit 304 C 1 *
+bit 305 O ? IO114 304 1 Z
+bit 306 I ? IO113
+bit 307 C 1 *
+bit 308 O ? IO113 307 1 Z
+bit 309 I ? IO108
+bit 310 C 1 *
+bit 311 O ? IO108 310 1 Z
+bit 312 I ? IO107
+bit 313 C 1 *
+bit 314 O ? IO107 313 1 Z
+bit 315 I ? IO106
+bit 316 C 1 *
+bit 317 O ? IO106 316 1 Z
+bit 318 I ? IO105
+bit 319 C 1 *
+bit 320 O ? IO105 319 1 Z
+bit 321 I ? IO104
+bit 322 C 1 *
+bit 323 O ? IO104 322 1 Z
+bit 324 I ? IO103
+bit 325 C 1 *
+bit 326 O ? IO103 325 1 Z
+bit 327 I ? IO102
+bit 328 C 1 *
+bit 329 O ? IO102 328 1 Z
+bit 330 I ? IO101
+bit 331 C 1 *
+bit 332 O ? IO101 331 1 Z
+bit 333 I ? IO100
+bit 334 C 1 *
+bit 335 O ? IO100 334 1 Z
+bit 336 I ? IO99
+bit 337 C 1 *
+bit 338 O ? IO99 337 1 Z
+bit 339 I ? IO98
+bit 340 C 1 *
+bit 341 O ? IO98 340 1 Z
+bit 342 I ? IO97
+bit 343 C 1 *
+bit 344 O ? IO97 343 1 Z
+bit 345 I ? IO96
+bit 346 C 1 *
+bit 347 O ? IO96 346 1 Z
+bit 348 I ? IO95
+bit 349 C 1 *
+bit 350 O ? IO95 349 1 Z
+bit 351 I ? IO94
+bit 352 C 1 *
+bit 353 O ? IO94 352 1 Z
+bit 354 I ? IO93
+bit 355 C 1 *
+bit 356 O ? IO93 355 1 Z
+bit 357 I ? IO88
+bit 358 C 1 *
+bit 359 O ? IO88 358 1 Z
+bit 360 I ? IO87
+bit 361 C 1 *
+bit 362 O ? IO87 361 1 Z
+bit 363 I ? IO86
+bit 364 C 1 *
+bit 365 O ? IO86 364 1 Z
+bit 366 I ? IO85
+bit 367 C 1 *
+bit 368 O ? IO85 367 1 Z
+bit 369 I ? IO84
+bit 370 C 1 *
+bit 371 O ? IO84 370 1 Z
+bit 372 I ? IO83
+bit 373 C 1 *
+bit 374 O ? IO83 373 1 Z
+bit 375 I ? IO82
+bit 376 C 1 *
+bit 377 O ? IO82 376 1 Z
+bit 378 I ? IO81
+bit 379 C 1 *
+bit 380 O ? IO81 379 1 Z
+bit 381 I ? IO80
+bit 382 C 1 *
+bit 383 O ? IO80 382 1 Z
+bit 384 I ? IO79
+bit 385 C 1 *
+bit 386 O ? IO79 385 1 Z
+bit 387 I ? IO78
+bit 388 C 1 *
+bit 389 O ? IO78 388 1 Z
+bit 390 I ? IO77
+bit 391 C 1 *
+bit 392 O ? IO77 391 1 Z
+bit 393 I ? IO76
+bit 394 C 1 *
+bit 395 O ? IO76 394 1 Z
+bit 396 I ? IO75
+bit 397 C 1 *
+bit 398 O ? IO75 397 1 Z
+bit 399 I ? IO74
+bit 400 C 1 *
+bit 401 O ? IO74 400 1 Z
+bit 402 I ? IO73
+bit 403 C 1 *
+bit 404 O ? IO73 403 1 Z
+bit 405 I ? IO68
+bit 406 C 1 *
+bit 407 O ? IO68 406 1 Z
+bit 408 I ? IO67
+bit 409 C 1 *
+bit 410 O ? IO67 409 1 Z
+bit 411 I ? IO66
+bit 412 C 1 *
+bit 413 O ? IO66 412 1 Z
+bit 414 I ? IO65
+bit 415 C 1 *
+bit 416 O ? IO65 415 1 Z
+bit 417 I ? IO64
+bit 418 C 1 *
+bit 419 O ? IO64 418 1 Z
+bit 420 I ? IO63
+bit 421 C 1 *
+bit 422 O ? IO63 421 1 Z
+bit 423 I ? IO62
+bit 424 C 1 *
+bit 425 O ? IO62 424 1 Z
+bit 426 I ? IO61
+bit 427 C 1 *
+bit 428 O ? IO61 427 1 Z
+bit 429 I ? IO60
+bit 430 C 1 *
+bit 431 O ? IO60 430 1 Z
+bit 432 I ? IO59
+bit 433 C 1 *
+bit 434 O ? IO59 433 1 Z
+bit 435 I ? IO58
+bit 436 C 1 *
+bit 437 O ? IO58 436 1 Z
+bit 438 I ? IO57
+bit 439 C 1 *
+bit 440 O ? IO57 439 1 Z
+bit 441 I ? IO56
+bit 442 C 1 *
+bit 443 O ? IO56 442 1 Z
+bit 444 I ? IO55
+bit 445 C 1 *
+bit 446 O ? IO55 445 1 Z
+bit 447 I ? IO54
+bit 448 C 1 *
+bit 449 O ? IO54 448 1 Z
+bit 450 I ? IO53
+bit 451 C 1 *
+bit 452 O ? IO53 451 1 Z
+bit 453 I ? IO50
+bit 454 C 1 *
+bit 455 O ? IO50 454 1 Z
+bit 456 I ? IO49
+bit 457 C 1 *
+bit 458 O ? IO49 457 1 Z
+bit 459 I ? IO48
+bit 460 C 1 *
+bit 461 O ? IO48 460 1 Z
+bit 462 I ? IO47
+bit 463 C 1 *
+bit 464 O ? IO47 463 1 Z
+bit 465 I ? IO46
+bit 466 C 1 *
+bit 467 O ? IO46 466 1 Z
+bit 468 I ? IO45
+bit 469 C 1 *
+bit 470 O ? IO45 469 1 Z
+bit 471 I ? IO44
+bit 472 C 1 *
+bit 473 O ? IO44 472 1 Z
+bit 474 I ? IO43
+bit 475 C 1 *
+bit 476 O ? IO43 475 1 Z
+bit 477 I ? IO42
+bit 478 C 1 *
+bit 479 O ? IO42 478 1 Z
+bit 480 I ? IO41
+bit 481 C 1 *
+bit 482 O ? IO41 481 1 Z
+bit 483 I ? IO39
+bit 484 C 1 *
+bit 485 O ? IO39 484 1 Z
+bit 486 I ? IO38
+bit 487 C 1 *
+bit 488 O ? IO38 487 1 Z
+bit 489 I ? IO37
+bit 490 C 1 *
+bit 491 O ? IO37 490 1 Z
+bit 492 I ? DCLK
+bit 493 C 1 *
+bit 494 O ? DCLK 493 1 Z
+bit 495 I ? MSEL1
+bit 496 X ? *
+bit 497 X ? *
+bit 498 I ? MSEL0
+bit 499 X ? *
+bit 500 X ? *
+bit 501 X ? *
+bit 502 X 1 *
+bit 503 X ? *
+bit 504 X ? *
+bit 505 X 1 *
+bit 506 X ? *
+bit 507 X ? *
+bit 508 X 1 *
+bit 509 X ? *
+bit 510 I ? CLK0
+bit 511 X ? *
+bit 512 X ? *
+bit 513 X ? *
+bit 514 X 1 *
+bit 515 X ? *
+bit 516 I ? DATA0
+bit 517 X ? *
+bit 518 X ? *
+bit 519 I ? IO24
+bit 520 C 1 *
+bit 521 O ? IO24 520 1 Z
+bit 522 I ? IO23
+bit 523 C 1 *
+bit 524 O ? IO23 523 1 Z
+bit 525 I ? IO21
+bit 526 C 1 *
+bit 527 O ? IO21 526 1 Z
+bit 528 I ? IO20
+bit 529 C 1 *
+bit 530 O ? IO20 529 1 Z
+bit 531 I ? IO19
+bit 532 C 1 *
+bit 533 O ? IO19 532 1 Z
+bit 534 I ? IO18
+bit 535 C 1 *
+bit 536 O ? IO18 535 1 Z
+bit 537 I ? IO17
+bit 538 C 1 *
+bit 539 O ? IO17 538 1 Z
+bit 540 I ? IO16
+bit 541 C 1 *
+bit 542 O ? IO16 541 1 Z
+bit 543 I ? IO15
+bit 544 C 1 *
+bit 545 O ? IO15 544 1 Z
+bit 546 I ? IO14
+bit 547 C 1 *
+bit 548 O ? IO14 547 1 Z
+bit 549 I ? IO13
+bit 550 C 1 *
+bit 551 O ? IO13 550 1 Z
+bit 552 I ? IO12
+bit 553 C 1 *
+bit 554 O ? IO12 553 1 Z
+bit 555 I ? IO11
+bit 556 C 1 *
+bit 557 O ? IO11 556 1 Z
+bit 558 I ? IO8
+bit 559 C 1 *
+bit 560 O ? IO8 559 1 Z
+bit 561 I ? IO7
+bit 562 C 1 *
+bit 563 O ? IO7 562 1 Z
+bit 564 I ? IO6
+bit 565 C 1 *
+bit 566 O ? IO6 565 1 Z
+bit 567 I ? IO5
+bit 568 C 1 *
+bit 569 O ? IO5 568 1 Z
+bit 570 I ? IO4
+bit 571 C 1 *
+bit 572 O ? IO4 571 1 Z
+bit 573 I ? IO3
+bit 574 C 1 *
+bit 575 O ? IO3 574 1 Z
+bit 576 I ? IO2
+bit 577 C 1 *
+bit 578 O ? IO2 577 1 Z
+bit 579 I ? IO1
+bit 580 C 1 *
+bit 581 O ? IO1 580 1 Z
--- a/sie_fs/usr/local/share/urjtag/altera/ep2c8/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/altera/ep2c8/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 897 2007-12-29 13:02:32Z arniml $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep2c8		0
--- a/sie_fs/usr/local/share/urjtag/altera/ep2c8/ep2c8
+++ b/sie_fs/usr/local/share/urjtag/altera/ep2c8/ep2c8
--- a/sie_fs/usr/local/share/urjtag/altera/ep2c8/f256
+++ b/sie_fs/usr/local/share/urjtag/altera/ep2c8/f256
@@ -0,0 +1,226 @@
+#
+# $Id: f256 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IOC3	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IOF4	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IOC1	BSC196
+salias	IOC2	BSC195
+salias	IOD5	BSC194
+salias	IOE5	BSC193
+salias	IOF5	BSC192
+#		BSC191	# unused pad
+salias	IOD3	BSC190
+salias	IOD4	BSC189
+salias	IOF3	BSC188
+salias	IOD2	BSC187
+salias	IOD1	BSC186
+salias	IOE3	BSC185
+salias	IOE4	BSC184
+salias	IOG4	BSC183
+salias	IOJ6	BSC182
+salias	IOH6	BSC181
+salias	IOE1	BSC180
+salias	IOE2	BSC179
+salias	DATA0	BSC178	# Family-specific input pin F1
+salias	DCLK	BSC177	# Family-specific input pin H4
+#	nCE	BSC176	# untestable Family-specific pin G5
+salias	CLK0	BSC175	# Family-specific input pin H2
+salias	CLK1	BSC174	# Family-specific input pin H1
+#	nCONFIG	BSC173	# untestable Family-specific pin J5
+salias	CLK2	BSC172	# Family-specific input pin J2
+salias	CLK3	BSC171	# Family-specific input pin J1
+salias	IOK2	BSC170
+salias	IOK1	BSC169
+salias	IOK4	BSC168
+salias	IOK5	BSC167
+#		BSC166	# unused pad
+salias	IOL1	BSC165
+salias	IOL2	BSC164
+salias	IOJ4	BSC163
+salias	IOM1	BSC162
+salias	IOM2	BSC161
+salias	IOM3	BSC160
+salias	IOL3	BSC159
+salias	ION1	BSC158
+salias	ION2	BSC157
+salias	IOP1	BSC156
+salias	IOP2	BSC155
+#		BSC154	# unused pad
+salias	ION3	BSC153
+salias	ION4	BSC152
+salias	IOP3	BSC151
+salias	IOL4	BSC150
+salias	IOM4	BSC149
+salias	IOR3	BSC148
+salias	IOT3	BSC147
+salias	IOP5	BSC146
+salias	IOP4	BSC145
+salias	IOT4	BSC144
+salias	IOR4	BSC143
+salias	IOT5	BSC142
+salias	IOR5	BSC141
+salias	ION7	BSC140
+salias	IOK7	BSC139
+salias	IOK6	BSC138
+salias	IOT6	BSC137
+salias	IOR6	BSC136
+salias	IOP6	BSC135
+salias	ION6	BSC134
+salias	ION8	BSC133
+salias	IOT7	BSC132
+salias	IOR7	BSC131
+salias	IOL7	BSC130
+salias	IOL8	BSC129
+salias	IOT8	BSC128
+salias	IOR8	BSC127
+salias	IOT9	BSC126
+salias	IOR9	BSC125
+salias	ION9	BSC124
+salias	ION10	BSC123
+salias	IOT11	BSC122
+salias	IOR11	BSC121
+salias	IOP11	BSC120
+salias	IOL9	BSC119
+salias	IOL10	BSC118
+salias	IOR10	BSC117
+salias	IOT10	BSC116
+salias	IOK11	BSC115
+salias	IOK10	BSC114
+salias	ION11	BSC113
+salias	IOP12	BSC112
+salias	IOP13	BSC111
+salias	IOT12	BSC110
+salias	IOR12	BSC109
+#		BSC108	# unused pad
+salias	IOT13	BSC107
+salias	IOR13	BSC106
+salias	IOT14	BSC105
+salias	IOR14	BSC104
+salias	IOM11	BSC103
+salias	IOL11	BSC102
+salias	ION12	BSC101
+salias	IOM12	BSC100
+salias	IOL12	BSC099
+salias	IOK13	BSC098
+salias	ION13	BSC097
+salias	ION14	BSC096
+salias	IOP15	BSC095
+salias	IOP16	BSC094
+salias	ION15	BSC093
+salias	ION16	BSC092
+salias	IOP14	BSC091
+#		BSC090	# unused pad
+#		BSC089	# unused pad
+salias	IOM14	BSC088
+salias	IOM15	BSC087
+salias	IOM16	BSC086
+#		BSC085	# unused pad
+salias	IOL14	BSC084
+salias	IOL15	BSC083
+salias	IOL16	BSC082
+#	nSTATUS	BSC081	# untestable Family-specific pin M13
+#	CONF_DONE	BSC080	# untestable Family-specific pin L13
+salias	MSEL1	BSC079	# Family-specific input pin K12
+salias	MSEL0	BSC078	# Family-specific input pin J13
+salias	IOK16	BSC077
+salias	IOK15	BSC076
+salias	CLK7	BSC075	# Family-specific input pin J16
+salias	CLK6	BSC074	# Family-specific input pin J15
+salias	CLK5	BSC073	# Family-specific input pin H15
+salias	CLK4	BSC072	# Family-specific input pin H16
+salias	IOH12	BSC071
+salias	IOJ12	BSC070
+salias	IOG16	BSC069
+salias	IOG15	BSC068
+salias	IOF15	BSC067
+salias	IOF16	BSC066
+salias	IOJ11	BSC065
+salias	IOH11	BSC064
+salias	IOG12	BSC063
+salias	IOG13	BSC062
+salias	IOE13	BSC061
+salias	IOF13	BSC060
+salias	IOH13	BSC059
+salias	IOD15	BSC058
+salias	IOD16	BSC057
+salias	IOE15	BSC056
+salias	IOE16	BSC055
+salias	IOF14	BSC054
+salias	IOC15	BSC053
+salias	IOC16	BSC052
+salias	IOC14	BSC051
+salias	IOD13	BSC050
+salias	IOE14	BSC049
+salias	IOD14	BSC048
+salias	IOB14	BSC047
+salias	IOA14	BSC046
+salias	IOC13	BSC045
+salias	IOC12	BSC044
+salias	IOB13	BSC043
+salias	IOA13	BSC042
+salias	IOB12	BSC041
+salias	IOA12	BSC040
+salias	IOC11	BSC039
+salias	IOB11	BSC038
+salias	IOA11	BSC037
+salias	IOG10	BSC036
+salias	IOG11	BSC035
+salias	IOB10	BSC034
+salias	IOA10	BSC033
+salias	IOF10	BSC032
+salias	IOF9	BSC031
+salias	IOD9	BSC030
+salias	IOD11	BSC029
+salias	IOD10	BSC028
+salias	IOA9	BSC027
+salias	IOB9	BSC026
+salias	IOA8	BSC025
+salias	IOB8	BSC024
+salias	IOA7	BSC023
+salias	IOB7	BSC022
+salias	IOF7	BSC021
+salias	IOF8	BSC020
+#		BSC019	# unused pad
+#		BSC018	# unused pad
+salias	IOD8	BSC017
+salias	IOB6	BSC016
+salias	IOA6	BSC015
+salias	IOG6	BSC014
+salias	IOG7	BSC013
+salias	IOD7	BSC012
+salias	IOD6	BSC011
+salias	IOC6	BSC010
+salias	IOC5	BSC009
+salias	IOC4	BSC008
+salias	IOB5	BSC007
+salias	IOA5	BSC006
+salias	IOB4	BSC005
+salias	IOA4	BSC004
+salias	IOA3	BSC003
+salias	IOB3	BSC002
+salias	IOE6	BSC001
+salias	IOF6	BSC000
--- a/sie_fs/usr/local/share/urjtag/altera/ep2c8/q208
+++ b/sie_fs/usr/local/share/urjtag/altera/ep2c8/q208
@@ -0,0 +1,226 @@
+#
+# $Id: q208 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8Q208
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IO1	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IO2	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IO3	BSC196
+salias	IO4	BSC195
+salias	IO5	BSC194
+salias	IO6	BSC193
+salias	IO8	BSC192
+salias	IO10	BSC191
+salias	IO11	BSC190
+salias	IO12	BSC189
+salias	IO13	BSC188
+#		BSC187	# unused pad
+#		BSC186	# unused pad
+#		BSC185	# unused pad
+#		BSC184	# unused pad
+#		BSC183	# unused pad
+#		BSC182	# unused pad
+#		BSC181	# unused pad
+salias	IO14	BSC180
+salias	IO15	BSC179
+salias	DATA0	BSC178	# Family-specific input pin 20
+salias	DCLK	BSC177	# Family-specific input pin 21
+#	nCE	BSC176	# untestable Family-specific pin 22
+salias	CLK0	BSC175	# Family-specific input pin 23
+salias	CLK1	BSC174	# Family-specific input pin 24
+#	nCONFIG	BSC173	# untestable Family-specific pin 26
+salias	CLK2	BSC172	# Family-specific input pin 27
+salias	CLK3	BSC171	# Family-specific input pin 28
+salias	IO30	BSC170
+salias	IO31	BSC169
+#		BSC168	# unused pad
+salias	IO33	BSC167
+salias	IO34	BSC166
+salias	IO35	BSC165
+#		BSC164	# unused pad
+salias	IO37	BSC163
+#		BSC162	# unused pad
+#		BSC161	# unused pad
+#		BSC160	# unused pad
+salias	IO39	BSC159
+salias	IO40	BSC158
+salias	IO41	BSC157
+#		BSC156	# unused pad
+#		BSC155	# unused pad
+salias	IO43	BSC154
+salias	IO44	BSC153
+salias	IO45	BSC152
+salias	IO46	BSC151
+salias	IO47	BSC150
+salias	IO48	BSC149
+salias	IO56	BSC148
+salias	IO57	BSC147
+salias	IO58	BSC146
+salias	IO59	BSC145
+salias	IO60	BSC144
+salias	IO61	BSC143
+salias	IO63	BSC142
+salias	IO64	BSC141
+#		BSC140	# unused pad
+#		BSC139	# unused pad
+#		BSC138	# unused pad
+#		BSC137	# unused pad
+#		BSC136	# unused pad
+#		BSC135	# unused pad
+#		BSC134	# unused pad
+salias	IO67	BSC133
+salias	IO68	BSC132
+salias	IO69	BSC131
+#		BSC130	# unused pad
+#		BSC129	# unused pad
+salias	IO70	BSC128
+salias	IO72	BSC127
+salias	IO74	BSC126
+salias	IO75	BSC125
+salias	IO76	BSC124
+salias	IO77	BSC123
+#		BSC122	# unused pad
+#		BSC121	# unused pad
+salias	IO80	BSC120
+salias	IO81	BSC119
+salias	IO82	BSC118
+salias	IO84	BSC117
+salias	IO86	BSC116
+salias	IO87	BSC115
+salias	IO88	BSC114
+salias	IO89	BSC113
+salias	IO90	BSC112
+salias	IO92	BSC111
+salias	IO94	BSC110
+salias	IO95	BSC109
+salias	IO96	BSC108
+salias	IO97	BSC107
+salias	IO99	BSC106
+salias	IO101	BSC105
+salias	IO102	BSC104
+salias	IO103	BSC103
+salias	IO104	BSC102
+salias	IO105	BSC101
+salias	IO106	BSC100
+#		BSC099	# unused pad
+#		BSC098	# unused pad
+salias	IO107	BSC097
+salias	IO108	BSC096
+salias	IO110	BSC095
+salias	IO112	BSC094
+salias	IO113	BSC093
+salias	IO114	BSC092
+#		BSC091	# unused pad
+salias	IO115	BSC090
+salias	IO116	BSC089
+salias	IO117	BSC088
+#		BSC087	# unused pad
+#		BSC086	# unused pad
+salias	IO118	BSC085
+#		BSC084	# unused pad
+#		BSC083	# unused pad
+#		BSC082	# unused pad
+#	nSTATUS	BSC081	# untestable Family-specific pin 121
+#	CONF_DONE	BSC080	# untestable Family-specific pin 123
+salias	MSEL1	BSC079	# Family-specific input pin 125
+salias	MSEL0	BSC078	# Family-specific input pin 126
+salias	IO127	BSC077
+salias	IO128	BSC076
+salias	CLK7	BSC075	# Family-specific input pin 129
+salias	CLK6	BSC074	# Family-specific input pin 130
+salias	CLK5	BSC073	# Family-specific input pin 131
+salias	CLK4	BSC072	# Family-specific input pin 132
+salias	IO133	BSC071
+salias	IO134	BSC070
+salias	IO135	BSC069
+salias	IO137	BSC068
+salias	IO138	BSC067
+salias	IO139	BSC066
+salias	IO141	BSC065
+salias	IO142	BSC064
+#		BSC063	# unused pad
+#		BSC062	# unused pad
+salias	IO143	BSC061
+salias	IO144	BSC060
+salias	IO145	BSC059
+#		BSC058	# unused pad
+#		BSC057	# unused pad
+#		BSC056	# unused pad
+#		BSC055	# unused pad
+#		BSC054	# unused pad
+salias	IO146	BSC053
+salias	IO147	BSC052
+salias	IO149	BSC051
+salias	IO150	BSC050
+salias	IO151	BSC049
+salias	IO152	BSC048
+salias	IO160	BSC047
+salias	IO161	BSC046
+salias	IO162	BSC045
+salias	IO163	BSC044
+salias	IO164	BSC043
+salias	IO165	BSC042
+salias	IO168	BSC041
+salias	IO169	BSC040
+salias	IO170	BSC039
+salias	IO171	BSC038
+salias	IO173	BSC037
+#		BSC036	# unused pad
+#		BSC035	# unused pad
+salias	IO175	BSC034
+salias	IO176	BSC033
+#		BSC032	# unused pad
+#		BSC031	# unused pad
+#		BSC030	# unused pad
+salias	IO179	BSC029
+salias	IO180	BSC028
+salias	IO181	BSC027
+salias	IO182	BSC026
+#		BSC025	# unused pad
+#		BSC024	# unused pad
+#		BSC023	# unused pad
+salias	IO185	BSC022
+salias	IO187	BSC021
+salias	IO188	BSC020
+salias	IO189	BSC019
+salias	IO191	BSC018
+salias	IO192	BSC017
+salias	IO193	BSC016
+salias	IO195	BSC015
+#		BSC014	# unused pad
+#		BSC013	# unused pad
+#		BSC012	# unused pad
+salias	IO197	BSC011
+salias	IO198	BSC010
+#		BSC009	# unused pad
+#		BSC008	# unused pad
+salias	IO199	BSC007
+salias	IO200	BSC006
+salias	IO201	BSC005
+salias	IO203	BSC004
+salias	IO205	BSC003
+salias	IO206	BSC002
+salias	IO207	BSC001
+salias	IO208	BSC000
--- a/sie_fs/usr/local/share/urjtag/altera/ep2c8/t144
+++ b/sie_fs/usr/local/share/urjtag/altera/ep2c8/t144
@@ -0,0 +1,226 @@
+#
+# $Id: t144 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8T144
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IO1	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IO2	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IO3	BSC196
+salias	IO4	BSC195
+#		BSC194	# unused pad
+#		BSC193	# unused pad
+#		BSC192	# unused pad
+#		BSC191	# unused pad
+#		BSC190	# unused pad
+#		BSC189	# unused pad
+salias	IO7	BSC188
+#		BSC187	# unused pad
+#		BSC186	# unused pad
+#		BSC185	# unused pad
+#		BSC184	# unused pad
+#		BSC183	# unused pad
+#		BSC182	# unused pad
+#		BSC181	# unused pad
+salias	IO8	BSC180
+salias	IO9	BSC179
+salias	DATA0	BSC178	# Family-specific input pin 14
+salias	DCLK	BSC177	# Family-specific input pin 15
+#	nCE	BSC176	# untestable Family-specific pin 16
+salias	CLK0	BSC175	# Family-specific input pin 17
+salias	CLK1	BSC174	# Family-specific input pin 18
+#	nCONFIG	BSC173	# untestable Family-specific pin 20
+salias	CLK2	BSC172	# Family-specific input pin 21
+salias	CLK3	BSC171	# Family-specific input pin 22
+salias	IO24	BSC170
+salias	IO25	BSC169
+#		BSC168	# unused pad
+#		BSC167	# unused pad
+#		BSC166	# unused pad
+#		BSC165	# unused pad
+#		BSC164	# unused pad
+salias	IO28	BSC163
+#		BSC162	# unused pad
+#		BSC161	# unused pad
+#		BSC160	# unused pad
+#		BSC159	# unused pad
+#		BSC158	# unused pad
+#		BSC157	# unused pad
+#		BSC156	# unused pad
+#		BSC155	# unused pad
+#		BSC154	# unused pad
+#		BSC153	# unused pad
+#		BSC152	# unused pad
+salias	IO30	BSC151
+salias	IO31	BSC150
+salias	IO32	BSC149
+salias	IO40	BSC148
+salias	IO41	BSC147
+salias	IO42	BSC146
+salias	IO43	BSC145
+salias	IO44	BSC144
+salias	IO45	BSC143
+salias	IO47	BSC142
+salias	IO48	BSC141
+#		BSC140	# unused pad
+#		BSC139	# unused pad
+#		BSC138	# unused pad
+#		BSC137	# unused pad
+#		BSC136	# unused pad
+#		BSC135	# unused pad
+#		BSC134	# unused pad
+salias	IO51	BSC133
+salias	IO52	BSC132
+#		BSC131	# unused pad
+#		BSC130	# unused pad
+#		BSC129	# unused pad
+salias	IO53	BSC128
+salias	IO55	BSC127
+salias	IO57	BSC126
+salias	IO58	BSC125
+salias	IO59	BSC124
+salias	IO60	BSC123
+#		BSC122	# unused pad
+#		BSC121	# unused pad
+#		BSC120	# unused pad
+#		BSC119	# unused pad
+#		BSC118	# unused pad
+#		BSC117	# unused pad
+#		BSC116	# unused pad
+#		BSC115	# unused pad
+#		BSC114	# unused pad
+salias	IO63	BSC113
+#		BSC112	# unused pad
+#		BSC111	# unused pad
+salias	IO64	BSC110
+salias	IO65	BSC109
+#		BSC108	# unused pad
+#		BSC107	# unused pad
+salias	IO67	BSC106
+salias	IO69	BSC105
+salias	IO70	BSC104
+salias	IO71	BSC103
+salias	IO72	BSC102
+salias	IO73	BSC101
+salias	IO74	BSC100
+#		BSC099	# unused pad
+#		BSC098	# unused pad
+salias	IO75	BSC097
+salias	IO76	BSC096
+#		BSC095	# unused pad
+#		BSC094	# unused pad
+#		BSC093	# unused pad
+#		BSC092	# unused pad
+#		BSC091	# unused pad
+#		BSC090	# unused pad
+#		BSC089	# unused pad
+salias	IO79	BSC088
+#		BSC087	# unused pad
+#		BSC086	# unused pad
+#		BSC085	# unused pad
+#		BSC084	# unused pad
+#		BSC083	# unused pad
+#		BSC082	# unused pad
+#	nSTATUS	BSC081	# untestable Family-specific pin 82
+#	CONF_DONE	BSC080	# untestable Family-specific pin 83
+salias	MSEL1	BSC079	# Family-specific input pin 84
+salias	MSEL0	BSC078	# Family-specific input pin 85
+salias	IO86	BSC077
+salias	IO87	BSC076
+salias	CLK7	BSC075	# Family-specific input pin 88
+salias	CLK6	BSC074	# Family-specific input pin 89
+salias	CLK5	BSC073	# Family-specific input pin 90
+salias	CLK4	BSC072	# Family-specific input pin 91
+salias	IO92	BSC071
+salias	IO93	BSC070
+salias	IO94	BSC069
+salias	IO96	BSC068
+salias	IO97	BSC067
+#		BSC066	# unused pad
+#		BSC065	# unused pad
+#		BSC064	# unused pad
+#		BSC063	# unused pad
+#		BSC062	# unused pad
+#		BSC061	# unused pad
+#		BSC060	# unused pad
+salias	IO99	BSC059
+#		BSC058	# unused pad
+#		BSC057	# unused pad
+#		BSC056	# unused pad
+#		BSC055	# unused pad
+#		BSC054	# unused pad
+salias	IO100	BSC053
+salias	IO101	BSC052
+#		BSC051	# unused pad
+#		BSC050	# unused pad
+salias	IO103	BSC049
+salias	IO104	BSC048
+salias	IO112	BSC047
+salias	IO113	BSC046
+salias	IO114	BSC045
+salias	IO115	BSC044
+#		BSC043	# unused pad
+#		BSC042	# unused pad
+salias	IO118	BSC041
+salias	IO119	BSC040
+salias	IO120	BSC039
+salias	IO121	BSC038
+salias	IO122	BSC037
+#		BSC036	# unused pad
+#		BSC035	# unused pad
+#		BSC034	# unused pad
+#		BSC033	# unused pad
+#		BSC032	# unused pad
+#		BSC031	# unused pad
+#		BSC030	# unused pad
+salias	IO125	BSC029
+salias	IO126	BSC028
+#		BSC027	# unused pad
+#		BSC026	# unused pad
+#		BSC025	# unused pad
+#		BSC024	# unused pad
+#		BSC023	# unused pad
+salias	IO129	BSC022
+#		BSC021	# unused pad
+#		BSC020	# unused pad
+#		BSC019	# unused pad
+#		BSC018	# unused pad
+salias	IO132	BSC017
+salias	IO133	BSC016
+salias	IO134	BSC015
+#		BSC014	# unused pad
+#		BSC013	# unused pad
+#		BSC012	# unused pad
+#		BSC011	# unused pad
+#		BSC010	# unused pad
+#		BSC009	# unused pad
+#		BSC008	# unused pad
+salias	IO135	BSC007
+salias	IO136	BSC006
+salias	IO137	BSC005
+salias	IO139	BSC004
+salias	IO141	BSC003
+salias	IO142	BSC002
+salias	IO143	BSC001
+salias	IO144	BSC000
--- a/sie_fs/usr/local/share/urjtag/altera/epm3064a/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/altera/epm3064a/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0001	epm3064a		1
--- a/sie_fs/usr/local/share/urjtag/altera/epm3064a/epm3064a
+++ b/sie_fs/usr/local/share/urjtag/altera/epm3064a/epm3064a
@@ -0,0 +1,297 @@
+#
+# $Id$
+#
+# JTAG declarations for EPM3064A
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+#   The signals defined in this file are generic for any EPM3064A.
+#   Signalnames according to Altera's package tables are set in the
+#   package specific scripts.
+#
+
+register	BYPASS		1
+register	BSR		192
+register	DEVICE_ID	32
+register	USERCODE	32
+
+instruction length 10
+instruction	BYPASS		1111111111	BYPASS
+instruction	IDCODE		0001011001	DEVICE_ID
+instruction	USERCODE	0000000111	USERCODE
+instruction	SAMPLE/PRELOAD	0001010101	BSR
+instruction	EXTEST		0000000000	BSR
+
+signal	BSC0
+signal	BSC1
+signal	BSC10
+signal	BSC11
+signal	BSC12
+signal	BSC13
+signal	BSC14
+signal	BSC15
+signal	BSC16
+signal	BSC17
+signal	BSC18
+signal	BSC19
+signal	BSC2
+signal	BSC20
+signal	BSC21
+signal	BSC22
+signal	BSC23
+signal	BSC24
+signal	BSC25
+signal	BSC26
+signal	BSC27
+signal	BSC28
+signal	BSC29
+signal	BSC3
+signal	BSC30
+signal	BSC31
+signal	BSC32
+signal	BSC33
+signal	BSC34
+signal	BSC35
+signal	BSC36
+signal	BSC37
+signal	BSC38
+signal	BSC39
+signal	BSC4
+signal	BSC40
+signal	BSC41
+signal	BSC42
+signal	BSC43
+signal	BSC44
+signal	BSC45
+signal	BSC46
+signal	BSC47
+signal	BSC48
+signal	BSC49
+signal	BSC5
+signal	BSC50
+signal	BSC51
+signal	BSC52
+signal	BSC53
+signal	BSC54
+signal	BSC55
+signal	BSC56
+signal	BSC57
+signal	BSC58
+signal	BSC59
+signal	BSC6
+signal	BSC60
+signal	BSC61
+signal	BSC62
+signal	BSC63
+signal	BSC7
+signal	BSC8
+signal	BSC9
+
+bit  0 I ? BSC0
+bit  1 X ? *
+bit  2 X ? *
+bit  3 I ? BSC1
+bit  4 X ? *
+bit  5 X ? *
+bit  6 I ? BSC2
+bit  7 C 0 *
+bit  8 O ? BSC2 7 0 Z
+bit  9 I ? BSC3
+bit 10 C 0 *
+bit 11 O ? BSC3 10 0 Z
+bit 12 I ? BSC4
+bit 13 C 0 *
+bit 14 O ? BSC4 13 0 Z
+bit 15 I ? BSC5
+bit 16 C 0 *
+bit 17 O ? BSC5 16 0 Z
+bit 18 I ? BSC6
+bit 19 C 0 *
+bit 20 O ? BSC6 19 0 Z
+bit 21 I ? BSC7
+bit 22 C 0 *
+bit 23 O ? BSC7 22 0 Z
+bit 24 I ? BSC8
+bit 25 C 0 *
+bit 26 O ? BSC8 25 0 Z
+bit 27 I ? BSC9
+bit 28 C 0 *
+bit 29 O ? BSC9 28 0 Z
+bit 30 I ? BSC10
+bit 31 C 0 *
+bit 32 O ? BSC10 31 0 Z
+bit 33 I ? BSC11
+bit 34 C 0 *
+bit 35 O ? BSC11 34 0 Z
+bit 36 I ? BSC12
+bit 37 C 0 *
+bit 38 O ? BSC12 37 0 Z
+bit 39 I ? BSC13
+bit 40 C 0 *
+bit 41 O ? BSC13 40 0 Z
+bit 42 I ? BSC14
+bit 43 C 0 *
+bit 44 O ? BSC14 43 0 Z
+bit 45 I ? BSC15
+bit 46 C 0 *
+bit 47 O ? BSC15 46 0 Z
+bit 48 I ? BSC16
+bit 49 C 0 *
+bit 50 O ? BSC16 49 0 Z
+bit 51 I ? BSC17
+bit 52 C 0 *
+bit 53 O ? BSC17 52 0 Z
+bit 54 I ? BSC18
+bit 55 C 0 *
+bit 56 O ? BSC18 55 0 Z
+bit 57 I ? BSC19
+bit 58 C 0 *
+bit 59 O ? BSC19 58 0 Z
+bit 60 I ? BSC20
+bit 61 C 0 *
+bit 62 O ? BSC20 61 0 Z
+bit 63 I ? BSC21
+bit 64 C 0 *
+bit 65 O ? BSC21 64 0 Z
+bit 66 I ? BSC22
+bit 67 C 0 *
+bit 68 O ? BSC22 67 0 Z
+bit 69 I ? BSC23
+bit 70 C 0 *
+bit 71 O ? BSC23 70 0 Z
+bit 72 I ? BSC24
+bit 73 C 0 *
+bit 74 O ? BSC24 73 0 Z
+bit 75 I ? BSC25
+bit 76 C 0 *
+bit 77 O ? BSC25 76 0 Z
+bit 78 I ? BSC26
+bit 79 C 0 *
+bit 80 O ? BSC26 79 0 Z
+bit 81 I ? BSC27
+bit 82 C 0 *
+bit 83 O ? BSC27 82 0 Z
+bit 84 I ? BSC28
+bit 85 C 0 *
+bit 86 O ? BSC28 85 0 Z
+bit 87 I ? BSC29
+bit 88 C 0 *
+bit 89 O ? BSC29 88 0 Z
+bit 90 I ? BSC30
+bit 91 C 0 *
+bit 92 O ? BSC30 91 0 Z
+bit 93 I ? BSC31
+bit 94 C 0 *
+bit 95 O ? BSC31 94 0 Z
+bit 96 I ? BSC32
+bit 97 C 0 *
+bit 98 O ? BSC32 97 0 Z
+bit 99 I ? BSC33
+bit 100 C 0 *
+bit 101 O ? BSC33 100 0 Z
+bit 102 I ? BSC34
+bit 103 C 0 *
+bit 104 O ? BSC34 103 0 Z
+bit 105 I ? BSC35
+bit 106 C 0 *
+bit 107 O ? BSC35 106 0 Z
+bit 108 I ? BSC36
+bit 109 C 0 *
+bit 110 O ? BSC36 109 0 Z
+bit 111 I ? BSC37
+bit 112 C 0 *
+bit 113 O ? BSC37 112 0 Z
+bit 114 I ? BSC38
+bit 115 C 0 *
+bit 116 O ? BSC38 115 0 Z
+bit 117 I ? BSC39
+bit 118 C 0 *
+bit 119 O ? BSC39 118 0 Z
+bit 120 I ? BSC40
+bit 121 C 0 *
+bit 122 O ? BSC40 121 0 Z
+bit 123 I ? BSC41
+bit 124 C 0 *
+bit 125 O ? BSC41 124 0 Z
+bit 126 I ? BSC42
+bit 127 C 0 *
+bit 128 O ? BSC42 127 0 Z
+bit 129 I ? BSC43
+bit 130 C 0 *
+bit 131 O ? BSC43 130 0 Z
+bit 132 I ? BSC44
+bit 133 C 0 *
+bit 134 O ? BSC44 133 0 Z
+bit 135 I ? BSC45
+bit 136 C 0 *
+bit 137 O ? BSC45 136 0 Z
+bit 138 I ? BSC46
+bit 139 C 0 *
+bit 140 O ? BSC46 139 0 Z
+bit 141 I ? BSC47
+bit 142 C 0 *
+bit 143 O ? BSC47 142 0 Z
+bit 144 I ? BSC48
+bit 145 C 0 *
+bit 146 O ? BSC48 145 0 Z
+bit 147 I ? BSC49
+bit 148 C 0 *
+bit 149 O ? BSC49 148 0 Z
+bit 150 I ? BSC50
+bit 151 C 0 *
+bit 152 O ? BSC50 151 0 Z
+bit 153 I ? BSC51
+bit 154 C 0 *
+bit 155 O ? BSC51 154 0 Z
+bit 156 I ? BSC52
+bit 157 C 0 *
+bit 158 O ? BCS52 157 0 Z
+bit 159 I ? BSC53
+bit 160 C 0 *
+bit 161 O ? BSC53 160 0 Z
+bit 162 I ? BSC54
+bit 163 C 0 *
+bit 164 O ? BSC54 163 0 Z
+bit 165 I ? BSC55
+bit 166 C 0 *
+bit 167 O ? BSC55 166 0 Z
+bit 168 I ? BSC56
+bit 169 C 0 *
+bit 170 O ? BSC56 169 0 Z
+bit 171 I ? BSC57
+bit 172 C 0 *
+bit 173 O ? BSC57 172 0 Z
+bit 174 I ? BSC58
+bit 175 C 0 *
+bit 176 O ? BSC58 175 0 Z
+bit 177 I ? BSC59
+bit 178 C 0 *
+bit 179 O ? BSC59 178 0 Z
+bit 180 I ? BSC60
+bit 181 C 0 *
+bit 182 O ? BSC60 181 0 Z
+bit 183 I ? BSC61
+bit 184 C 0 *
+bit 185 O ? BSC61 184 0 Z
+bit 186 I ? BSC62
+bit 187 X ? *
+bit 188 X ? *
+bit 189 I ? BSC63
+bit 190 X ? *
+bit 191 X ? *
--- a/sie_fs/usr/local/share/urjtag/altera/epm3064a/l44
+++ b/sie_fs/usr/local/share/urjtag/altera/epm3064a/l44
@@ -0,0 +1,53 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AL44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN44	BSC0
+salias	IN43	BSC1
+salias	IO41	BSC2
+salias	IO40	BSC4
+salias	IO39	BSC9
+salias	IO37	BSC12
+salias	IO34	BSC14
+salias	IO33	BSC16
+salias	IO31	BSC18
+salias	IO29	BSC23
+salias	IO28	BSC24
+salias	IO27	BSC27
+salias	IO26	BSC28
+salias	IO25	BSC29
+salias	IO24	BSC31
+salias	IO21	BSC32
+salias	IO20	BSC34
+salias	IO19	BSC35
+salias	IO18	BSC36
+salias	IO16	BSC40
+salias	IO14	BSC45
+salias	IO12	BSC47
+salias	IO11	BSC49
+salias	IO9	BSC50
+salias	IO8	BSC51
+salias	IO6	BSC56
+salias	IO5	BSC59
+salias	IO4	BSC61
+salias	IN2	BSC62
+salias	IN1	BSC63
--- a/sie_fs/usr/local/share/urjtag/altera/epm3064a/t100
+++ b/sie_fs/usr/local/share/urjtag/altera/epm3064a/t100
@@ -0,0 +1,85 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN88	BSC0
+salias	IN87	BSC1
+salias	IO85	BSC2
+salias	IO84	BSC3
+salias	IO83	BSC4
+salias	IO81	BSC5
+salias	IO80	BSC6
+salias	IO79	BSC7
+salias	IO76	BSC8
+salias	IO75	BSC9
+salias	IO71	BSC10
+salias	IO69	BSC11
+salias	IO68	BSC12
+salias	IO67	BSC13
+salias	IO64	BSC15
+salias	IO63	BSC16
+salias	IO61	BSC17
+salias	IO60	BSC18
+salias	IO58	BSC19
+salias	IO57	BSC20
+salias	IO56	BSC21
+salias	IO54	BSC22
+salias	IO52	BSC23
+salias	IO48	BSC24
+salias	IO47	BSC25
+salias	IO46	BSC26
+salias	IO45	BSC27
+salias	IO44	BSC28
+salias	IO42	BSC29
+salias	IO41	BSC30
+salias	IO40	BSC31
+salias	IO37	BSC32
+salias	IO36	BSC33
+salias	IO35	BSC34
+salias	IO32	BSC36
+salias	IO31	BSC37
+salias	IO30	BSC38
+salias	IO29	BSC39
+salias	IO25	BSC40
+salias	IO23	BSC41
+salias	IO21	BSC42
+salias	IO20	BSC43
+salias	IO19	BSC44
+salias	IO17	BSC45
+salias	IO16	BSC46
+salias	IO14	BSC47
+salias	IO13	BSC48
+salias	IO12	BSC49
+salias	IO10	BSC50
+salias	IO9	BSC51
+salias	IO8	BSC52
+salias	IO6	BSC53
+salias	IO100	BSC54
+salias	IO99	BSC55
+salias	IO98	BSC56
+salias	IO97	BSC57
+salias	IO96	BSC58
+salias	IO94	BSC59
+salias	IO93	BSC60
+salias	IO92	BSC61
+salias	IN90	BSC62
+salias	IN89	BSC63
--- a/sie_fs/usr/local/share/urjtag/altera/epm3064a/t44
+++ b/sie_fs/usr/local/share/urjtag/altera/epm3064a/t44
@@ -0,0 +1,53 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN38	BSC0
+salias	IN37	BSC1
+salias	IO35	BSC2
+salias	IO34	BSC4
+salias	IO33	BSC9
+salias	IO31	BSC12
+salias	IO28	BSC14
+salias	IO27	BSC16
+salias	IO25	BSC18
+salias	IO23	BSC23
+salias	IO22	BSC24
+salias	IO21	BSC27
+salias	IO20	BSC28
+salias	IO19	BSC29
+salias	IO18	BSC31
+salias	IO15	BSC32
+salias	IO14	BSC34
+salias	IO13	BSC35
+salias	IO12	BSC36
+salias	IO10	BSC40
+salias	IO8	BSC45
+salias	IO6	BSC47
+salias	IO5	BSC49
+salias	IO3	BSC50
+salias	IO2	BSC51
+salias	IO44	BSC56
+salias	IO43	BSC59
+salias	IO42	BSC61
+salias	IN40	BSC62
+salias	IN39	BSC63
--- a/sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0001	epm7128aetc100		1
--- a/sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/epm7128aetc100
+++ b/sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/epm7128aetc100
@@ -0,0 +1,414 @@
+#
+# $Id: epm7128aetc100 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO1
+signal IO2
+signal IO5
+signal IO6
+signal IO7
+signal IO8
+signal IO9
+signal IO10
+signal IO12
+signal IO13
+signal IO14
+signal IO16
+signal IO17
+signal IO19
+signal IO20
+signal IO21
+signal IO22
+signal IO23
+signal IO24
+signal IO25
+signal IO27
+signal IO28
+signal IO29
+signal IO30
+signal IO31
+signal IO32
+signal IO33
+signal IO35
+signal IO36
+signal IO37
+signal IO40
+signal IO41
+signal IO42
+signal IO44
+signal IO45
+signal IO46
+signal IO47
+signal IO48
+signal IO49
+signal IO50
+signal IO52
+signal IO53
+signal IO54
+signal IO55
+signal IO56
+signal IO57
+signal IO58
+signal IO60
+signal IO61
+signal IO63
+signal IO64
+signal IO65
+signal IO67
+signal IO68
+signal IO69
+signal IO70
+signal IO71
+signal IO72
+signal IO75
+signal IO76
+signal IO77
+signal IO78
+signal IO79
+signal IO80
+signal IO81
+signal IO83
+signal IO84
+signal IO85
+signal IN87
+signal IN88
+signal IN89
+signal IN90
+signal IO92
+signal IO93
+signal IO94
+signal IO96
+signal IO97
+signal IO98
+signal IO99
+signal IO100
+
+
+# mandatory data registers
+register	BSR	288
+register	BR	1
+
+# optional data registers
+register	DIR	32
+
+# instructions
+instruction length 10
+
+# mandatory instructions
+instruction EXTEST		0000000000	BSR
+instruction SAMPLE/PRELOAD	0001010101	BSR
+instruction BYPASS		1111111111	BR
+instruction IDCODE		0001011001	DIR
+instruction USERCODE		0000000111	DIR
+
+
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 IN89
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 IN90
+bit 281 O 1 IO92 280 0 Z
+bit 280 C 0 *
+bit 279 I 1 IO92
+bit 278 O 1 IO93 277 0 Z
+bit 277 C 0 *
+bit 276 I 1 IO93
+bit 275 O 1 IO94 274 0 Z
+bit 274 C 0 *
+bit 273 I 1 IO94
+bit 272 O 1 *
+bit 271 O 0 *
+bit 270 O 1 *
+bit 269 O 1 IO96 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO96
+bit 266 O 1 IO97 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 IO97
+bit 263 O 1 IO98 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO98
+bit 260 O 1 IO99 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO99
+bit 257 O 1 IO100 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO100
+bit 254 O 1 *
+bit 253 O 0 *
+bit 252 O 1 *
+bit 251 O 1 IO1 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO1
+bit 248 O 1 IO2 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO2
+bit 245 O 1 IO5 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO5
+bit 242 O 1 IO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 IO6
+bit 239 O 1 *
+bit 238 O 0 *
+bit 237 O 1 *
+bit 236 O 1 IO7 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 IO7
+bit 233 O 1 IO8 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 IO8
+bit 230 O 1 IO9 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 IO9
+bit 227 O 1 IO10 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 IO10
+bit 224 O 1 IO12 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IO12
+bit 221 O 1 *
+bit 220 O 0 *
+bit 219 O 1 *
+bit 218 O 1 IO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 IO13
+bit 215 O 1 IO14 214 0 Z
+bit 214 C 0 *
+bit 213 I 1 IO14
+bit 212 O 1 IO16 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 IO16
+bit 209 O 1 IO17 208 0 Z
+bit 208 C 0 *
+bit 207 I 1 IO17
+bit 206 O 1 *
+bit 205 O 0 *
+bit 204 O 1 *
+bit 203 O 1 IO19 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 IO19
+bit 200 O 1 IO20 199 0 Z
+bit 199 C 0 *
+bit 198 I 1 IO20
+bit 197 O 1 IO21 196 0 Z
+bit 196 C 0 *
+bit 195 I 1 IO21
+bit 194 O 1 IO22 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 IO22
+bit 191 O 1 IO23 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 IO23
+bit 188 O 1 *
+bit 187 O 0 *
+bit 186 O 1 *
+bit 185 O 1 IO24 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IO24
+bit 182 O 1 IO25 181 0 Z
+bit 181 C 0 *
+bit 180 I 1 IO25
+bit 179 O 1 IO27 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 IO27
+bit 176 O 1 IO28 175 0 Z
+bit 175 C 0 *
+bit 174 I 1 IO28
+bit 173 O 1 IO29 172 0 Z
+bit 172 C 0 *
+bit 171 I 1 IO29
+bit 170 O 1 *
+bit 169 O 0 *
+bit 168 O 1 *
+bit 167 O 1 IO30 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 IO30
+bit 164 O 1 IO31 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 IO31
+bit 161 O 1 IO32 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 IO32
+bit 158 O 1 IO33 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 IO33
+bit 155 O 1 IO35 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 IO35
+bit 152 O 1 *
+bit 151 O 0 *
+bit 150 O 1 *
+bit 149 O 1 IO36 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 IO36
+bit 146 O 1 IO37 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 IO37
+bit 143 O 1 IO40 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 IO40
+bit 140 O 1 IO41 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 IO41
+bit 137 O 1 *
+bit 136 O 0 *
+bit 135 O 1 *
+bit 134 O 1 IO42 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 IO42
+bit 131 O 1 IO44 130 0 Z
+bit 130 C 0 *
+bit 129 I 1 IO44
+bit 128 O 1 IO45 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 IO45
+bit 125 O 1 IO46 124 0 Z
+bit 124 C 0 *
+bit 123 I 1 IO46
+bit 122 O 1 IO47 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 IO47
+bit 119 O 1 *
+bit 118 O 0 *
+bit 117 O 1 *
+bit 116 O 1 IO48 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 IO48
+bit 113 O 1 IO49 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IO49
+bit 110 O 1 IO50 109 0 Z
+bit 109 C 0 *
+bit 108 I 1 IO50
+bit 107 O 1 IO52 106 0 Z
+bit 106 C 0 *
+bit 105 I 1 IO52
+bit 104 O 1 IO53 103 0 Z
+bit 103 C 0 *
+bit 102 I 1 IO53
+bit 101 O 1 *
+bit 100 O 0 *
+bit 99 O 1 *
+bit 98 O 1 IO54 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 IO54
+bit 95 O 1 IO55 94 0 Z
+bit 94 C 0 *
+bit 93 I 1 IO55
+bit 92 O 1 IO56 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 IO56
+bit 89 O 1 IO57 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 IO57
+bit 86 O 1 IO58 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 IO58
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 1 IO60 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 IO60
+bit 77 O 1 IO61 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IO61
+bit 74 O 1 IO63 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IO63
+bit 71 O 1 IO64 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 IO64
+bit 68 O 1 *
+bit 67 O 0 *
+bit 66 O 1 *
+bit 65 O 1 IO65 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 IO65
+bit 62 O 1 IO67 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 IO67
+bit 59 O 1 IO68 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 IO68
+bit 56 O 1 IO69 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 IO69
+bit 53 O 1 IO70 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 IO70
+bit 50 O 1 *
+bit 49 O 0 *
+bit 48 O 1 *
+bit 47 O 1 IO71 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 IO71
+bit 44 O 1 IO72 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 IO72
+bit 41 O 1 IO75 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 IO75
+bit 38 O 1 IO76 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 IO76
+bit 35 O 1 *
+bit 34 O 0 *
+bit 33 O 1 *
+bit 32 O 1 IO77 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IO77
+bit 29 O 1 IO78 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 IO78
+bit 26 O 1 IO79 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 IO79
+bit 23 O 1 IO80 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 IO80
+bit 20 O 1 IO81 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 IO81
+bit 17 O 1 *
+bit 16 O 0 *
+bit 15 O 1 *
+bit 14 O 1 IO83 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 IO83
+bit 11 O 1 IO84 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 IO84
+bit 8 O 1 IO85 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 IO85
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN87
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 IN88
+
--- a/sie_fs/usr/local/share/urjtag/analog/PARTS
+++ b/sie_fs/usr/local/share/urjtag/analog/PARTS
@@ -0,0 +1,30 @@
+#
+# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 27-12 of the Device Identification Register
+0010011110100111	sharc21065l		SHARC
+0010011111100100	bf527			BF526
+0010011111100000	bf527			BF527
+0010011110100101	bf533			BF533
+0010011111001000	bf537			BF537
+0010011111000100	bf538			BF538
+0010011111011110	bf549			BF549
+0010011110111011	bf561			BF561
--- a/sie_fs/usr/local/share/urjtag/analog/bf527/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf527/STEPPINGS
@@ -0,0 +1,22 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf527		0
--- a/sie_fs/usr/local/share/urjtag/analog/bf527/bf527
+++ b/sie_fs/usr/local/share/urjtag/analog/bf527/bf527
@@ -0,0 +1,543 @@
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal PJ1
+signal PJ0
+signal PJ2
+signal PJ3
+signal NMI_B
+signal RESET_B
+signal CLKOUT
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARE_B
+signal AWE_B
+signal ARDY
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SCAS_B
+signal SWE_B
+signal SA10
+signal ABE_B0
+signal ABE_B1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal VDDOTP
+signal OTPVPP
+signal USB_ID
+signal USB_RSET
+signal VDDUSB0
+signal VDDUSB1
+signal USB_VREF
+signal USB_XTALIN
+signal USB_XTALOUT
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal RTXI
+signal RTXO
+signal SSPG
+signal CLKIN
+signal VROUT
+signal EXT_WAKE
+signal USB_DM
+signal USB_DP
+signal USB_VBUS
+signal CLKBUF
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDINT12
+signal VDDINT13
+signal VDDINT14
+signal VDDINT15
+signal VDDINT16
+signal VDDINT17
+signal VDDINT18
+signal VDDINT19
+signal VDDINT20
+signal VDDINT21
+signal VDDINT22
+signal VDDINT23
+signal VDDINT24
+signal VDDINT25
+signal VDDINT26
+signal VDDINT27
+signal VDDINT28
+signal VDDINT29
+signal VDDINT30
+signal VDDINT31
+signal VDDINT32
+signal VRSEL
+signal XTAL
+signal ADCLRC
+signal ADCDAT
+signal DACLRC
+signal DACDAT
+signal BCLK
+signal XTO
+signal XTI_MCLK
+signal LHPOUT
+signal RHPOUT
+signal CSCL
+signal CSDA
+signal CCLKOUT
+signal CSB
+signal CMODE
+signal LLINEIN
+signal LOUT
+signal RLINEIN
+signal ROUT
+signal VMID
+signal MICBIAS
+signal MICIN
+signal AVDD0
+signal AVDD1
+signal AGND0
+signal AGND1
+
+register	BSR	233
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 232 C 0 *
+bit 231 O 1 ADDR14 8 0 Z
+bit 230 O 1 ADDR15 8 0 Z
+bit 229 O 1 ADDR16 8 0 Z
+bit 228 O 1 ADDR17 8 0 Z
+bit 227 O 1 ADDR18 8 0 Z
+bit 226 O 1 ADDR19 8 0 Z
+bit 225 O 1 DATA0 232 0 Z
+bit 224 I 1 DATA0
+bit 223 O 1 DATA1 232 0 Z
+bit 222 I 1 DATA1
+bit 221 O 1 DATA2 232 0 Z
+bit 220 I 1 DATA2
+bit 219 O 1 DATA3 232 0 Z
+bit 218 I 1 DATA3
+bit 217 O 1 DATA4 232 0 Z
+bit 216 I 1 DATA4
+bit 215 O 1 DATA5 232 0 Z
+bit 214 I 1 DATA5
+bit 213 O 1 DATA6 232 0 Z
+bit 212 I 1 DATA6
+bit 211 O 1 DATA7 232 0 Z
+bit 210 I 1 DATA7
+bit 209 O 1 DATA8 232 0 Z
+bit 208 I 1 DATA8
+bit 207 O 1 DATA9 232 0 Z
+bit 206 I 1 DATA9
+bit 205 O 1 DATA10 232 0 Z
+bit 204 I 1 DATA10
+bit 203 O 1 DATA11 232 0 Z
+bit 202 I 1 DATA11
+bit 201 O 1 DATA12 232 0 Z
+bit 200 I 1 DATA12
+bit 199 O 1 DATA13 232 0 Z
+bit 198 I 1 DATA13
+bit 197 O 1 DATA14 232 0 Z
+bit 196 I 1 DATA14
+bit 195 O 1 DATA15 232 0 Z
+bit 194 I 1 DATA15
+bit 193 C 0 *
+bit 192 O 1 PG0 193 0 Z
+bit 191 I 1 PG0
+bit 190 C 0 *
+bit 189 O 1 PG1 190 0 Z
+bit 188 I 1 PG1
+bit 187 C 0 *
+bit 186 O 1 PG2 187 0 Z
+bit 185 I 1 PG2
+bit 184 C 0 *
+bit 183 O 1 PG3 184 0 Z
+bit 182 I 1 PG3
+bit 181 I 1 BMODE0
+bit 180 I 1 BMODE1
+bit 179 I 1 BMODE2
+bit 178 I 1 BMODE3
+bit 177 C 0 *
+bit 176 O 1 PG4 177 0 Z
+bit 175 I 1 PG4
+bit 174 C 0 *
+bit 173 O 1 PG5 174 0 Z
+bit 172 I 1 PG5
+bit 171 C 0 *
+bit 170 O 1 PG6 171 0 Z
+bit 169 I 1 PG6
+bit 168 C 0 *
+bit 167 O 1 PG7 168 0 Z
+bit 166 I 1 PG7
+bit 165 C 0 *
+bit 164 O 1 PG8 165 0 Z
+bit 163 I 1 PG8
+bit 162 C 0 *
+bit 161 O 1 PG9 162 0 Z
+bit 160 I 1 PG9
+bit 159 C 0 *
+bit 158 O 1 PG10 159 0 Z
+bit 157 I 1 PG10
+bit 156 C 0 *
+bit 155 O 1 PG11 156 0 Z
+bit 154 I 1 PG11
+bit 153 C 0 *
+bit 152 O 1 PG12 153 0 Z
+bit 151 I 1 PG12
+bit 150 C 0 *
+bit 149 O 1 PG13 150 0 Z
+bit 148 I 1 PG13
+bit 147 C 0 *
+bit 146 O 1 PG14 147 0 Z
+bit 145 I 1 PG14
+bit 144 C 0 *
+bit 143 O 1 PG15 144 0 Z
+bit 142 I 1 PG15
+bit 141 I 1 PJ1
+bit 140 C 0 *
+bit 139 O 1 PJ0 140 0 Z
+bit 138 I 1 PJ0
+bit 137 C 0 *
+bit 136 O 1 PF0 137 0 Z
+bit 135 I 1 PF0
+bit 134 C 0 *
+bit 133 O 1 PF1 134 0 Z
+bit 132 I 1 PF1
+bit 131 C 0 *
+bit 130 O 1 PF2 131 0 Z
+bit 129 I 1 PF2
+bit 128 C 0 *
+bit 127 O 1 PF3 128 0 Z
+bit 126 I 1 PF3
+bit 125 C 0 *
+bit 124 O 1 PF4 125 0 Z
+bit 123 I 1 PF4
+bit 122 C 0 *
+bit 121 O 1 PF5 122 0 Z
+bit 120 I 1 PF5
+bit 119 C 0 *
+bit 118 O 1 PF6 119 0 Z
+bit 117 I 1 PF6
+bit 116 C 0 *
+bit 115 O 1 PF7 116 0 Z
+bit 114 I 1 PF7
+bit 113 C 0 *
+bit 112 O 1 PF8 113 0 Z
+bit 111 I 1 PF8
+bit 110 C 0 *
+bit 109 O 1 PF9 110 0 Z
+bit 108 I 1 PF9
+bit 107 C 0 *
+bit 106 O 1 PF10 107 0 Z
+bit 105 I 1 PF10
+bit 104 C 0 *
+bit 103 O 1 PF11 104 0 Z
+bit 102 I 1 PF11
+bit 101 O 1 *
+bit 100 O 1 PJ2 100 1 Z
+bit 99 I 1 PJ2
+bit 98 O 1 *
+bit 97 O 1 PJ3 97 1 Z
+bit 96 I 1 PJ3
+bit 95 C 0 *
+bit 94 O 1 PF12 95 0 Z
+bit 93 I 1 PF12
+bit 92 C 0 *
+bit 91 O 1 PF13 92 0 Z
+bit 90 I 1 PF13
+bit 89 C 0 *
+bit 88 O 1 PF14 89 0 Z
+bit 87 I 1 PF14
+bit 86 C 0 *
+bit 85 O 1 PF15 86 0 Z
+bit 84 I 1 PF15
+bit 83 C 0 *
+bit 82 O 1 PH0 83 0 Z
+bit 81 I 1 PH0
+bit 80 C 0 *
+bit 79 O 1 PH1 80 0 Z
+bit 78 I 1 PH1
+bit 77 C 0 *
+bit 76 O 1 PH2 77 0 Z
+bit 75 I 1 PH2
+bit 74 C 0 *
+bit 73 O 1 PH3 74 0 Z
+bit 72 I 1 PH3
+bit 71 C 0 *
+bit 70 O 1 PH4 71 0 Z
+bit 69 I 1 PH4
+bit 68 C 0 *
+bit 67 O 1 PH5 68 0 Z
+bit 66 I 1 PH5
+bit 65 C 0 *
+bit 64 O 1 PH6 65 0 Z
+bit 63 I 1 PH6
+bit 62 C 0 *
+bit 61 O 1 PH7 62 0 Z
+bit 60 I 1 PH7
+bit 59 C 0 *
+bit 58 O 1 PH8 59 0 Z
+bit 57 I 1 PH8
+bit 56 O 0 *
+bit 55 C 0 *
+bit 54 O 1 PH9 55 0 Z
+bit 53 I 1 PH9
+bit 52 C 0 *
+bit 51 O 1 PH10 52 0 Z
+bit 50 I 1 PH10
+bit 49 C 0 *
+bit 48 O 1 PH11 49 0 Z
+bit 47 I 1 PH11
+bit 46 C 0 *
+bit 45 O 1 PH12 46 0 Z
+bit 44 I 1 PH12
+bit 43 C 0 *
+bit 42 O 1 PH13 43 0 Z
+bit 41 I 1 PH13
+bit 40 C 0 *
+bit 39 O 1 PH14 40 0 Z
+bit 38 I 1 PH14
+bit 37 C 0 *
+bit 36 O 1 PH15 37 0 Z
+bit 35 I 1 PH15
+bit 34 I 1 NMI_B
+bit 33 I 1 RESET_B
+bit 32 C 0 *
+bit 31 O 1 CLKOUT 32 0 Z
+bit 30 O 1 AMS_B0 25 0 Z
+bit 29 O 1 AMS_B1 25 0 Z
+bit 28 O 1 AMS_B2 25 0 Z
+bit 27 O 1 AMS_B3 25 0 Z
+bit 26 O 1 AOE_B 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 ARE_B 25 0 Z
+bit 23 O 1 AWE_B 25 0 Z
+bit 22 I 1 ARDY
+bit 21 O 1 SCKE 32 0 Z
+bit 20 O 1 SMS_B 32 0 Z
+bit 19 O 1 SRAS_B 32 0 Z
+bit 18 O 1 SCAS_B 32 0 Z
+bit 17 O 1 SWE_B 32 0 Z
+bit 16 O 1 SA10 32 0 Z
+bit 15 O 1 ABE_B0 8 0 Z
+bit 14 O 1 ABE_B1 8 0 Z
+bit 13 O 1 ADDR1 8 0 Z
+bit 12 O 1 ADDR2 8 0 Z
+bit 11 O 1 ADDR3 8 0 Z
+bit 10 O 1 ADDR4 8 0 Z
+bit 9 O 1 ADDR5 8 0 Z
+bit 8 C 0 *
+bit 7 O 1 ADDR6 8 0 Z
+bit 6 O 1 ADDR7 8 0 Z
+bit 5 O 1 ADDR8 8 0 Z
+bit 4 O 1 ADDR9 8 0 Z
+bit 3 O 1 ADDR10 8 0 Z
+bit 2 O 1 ADDR11 8 0 Z
+bit 1 O 1 ADDR12 8 0 Z
+bit 0 O 1 ADDR13 8 0 Z
--- a/sie_fs/usr/local/share/urjtag/analog/bf533/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf533/STEPPINGS
@@ -0,0 +1,28 @@
+#
+# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000    bf533           0
+0001    bf533           1
+0010	bf533		2
+0011	bf533		3
+0100	bf533		4
+0101    bf533        	5
--- a/sie_fs/usr/local/share/urjtag/analog/bf533/bf533
+++ b/sie_fs/usr/local/share/urjtag/analog/bf533/bf533
@@ -0,0 +1,378 @@
+signal ADDR[1]
+signal ADDR[2]
+signal ADDR[3]
+signal ADDR[4]
+signal ADDR[5]
+signal ADDR[6]
+signal ADDR[7]
+signal ADDR[8]
+signal ADDR[9]
+signal ADDR[10]
+signal ADDR[11]
+signal ADDR[12]
+signal ADDR[13]
+signal ADDR[14]
+signal ADDR[15]
+signal ADDR[16]
+signal ADDR[17]
+signal ADDR[18]
+signal ADDR[19]
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal DATA[0]
+signal DATA[1]
+signal DATA[2]
+signal DATA[3]
+signal DATA[4]
+signal DATA[5]
+signal DATA[6]
+signal DATA[7]
+signal DATA[8]
+signal DATA[9]
+signal DATA[10]
+signal DATA[11]
+signal DATA[12]
+signal DATA[13]
+signal DATA[14]
+signal DATA[15]
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PP_CLK
+signal PP0
+signal PP1
+signal PP2
+signal PP3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal CLKOUT
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal TMR0
+signal TMR1
+signal TMR2
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal VROUT0
+
+register	BSR	197
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 196 C 0 *
+bit 195 O 1 DATA[0] 196 0 Z
+bit 194 I 1 DATA[0]
+bit 193 O 1 DATA[1] 196 0 Z
+bit 192 I 1 DATA[1]
+bit 191 O 1 DATA[2] 196 0 Z
+bit 190 I 1 DATA[2]
+bit 189 O 1 DATA[3] 196 0 Z
+bit 188 I 1 DATA[3]
+bit 187 O 1 DATA[4] 196 0 Z
+bit 186 I 1 DATA[4]
+bit 185 O 1 DATA[5] 196 0 Z
+bit 184 I 1 DATA[5]
+bit 183 O 1 DATA[6] 196 0 Z
+bit 182 I 1 DATA[6]
+bit 181 O 1 DATA[7] 196 0 Z
+bit 180 I 1 DATA[7]
+bit 179 O 1 DATA[8] 196 0 Z
+bit 178 I 1 DATA[8]
+bit 177 O 1 DATA[9] 196 0 Z
+bit 176 I 1 DATA[9]
+bit 175 O 1 DATA[10] 196 0 Z
+bit 174 I 1 DATA[10]
+bit 173 O 1 DATA[11] 196 0 Z
+bit 172 I 1 DATA[11]
+bit 171 O 1 DATA[12] 196 0 Z
+bit 170 I 1 DATA[12]
+bit 169 O 1 DATA[13] 196 0 Z
+bit 168 I 1 DATA[13]
+bit 167 O 1 DATA[14] 196 0 Z
+bit 166 I 1 DATA[14]
+bit 165 O 1 DATA[15] 196 0 Z
+bit 164 I 1 DATA[15]
+bit 163 I 1 TEST
+bit 162 I 1 BMODE0
+bit 161 I 1 BMODE1
+bit 160 I 1 RX
+bit 159 O 1 TX
+bit 158 C 0 *
+bit 157 O 1 TMR0 158 0 Z
+bit 156 I 1 TMR0
+bit 155 C 0 *
+bit 154 O 1 TMR1 155 0 Z
+bit 153 I 1 TMR1
+bit 152 C 0 *
+bit 151 O 1 TMR2 152 0 Z
+bit 150 I 1 TMR2
+bit 149 C 0 *
+bit 148 O 1 RSCLK0 149 0 Z
+bit 147 I 1 RSCLK0
+bit 146 C 0 *
+bit 145 O 1 RFS0 146 0 Z
+bit 144 I 1 RFS0
+bit 143 I 1 DR0PRI
+bit 142 I 1 DR0SEC
+bit 141 C 0 *
+bit 140 O 1 TSCLK0 141 0 Z
+bit 139 I 1 TSCLK0
+bit 138 C 0 *
+bit 137 O 1 TFS0 138 0 Z
+bit 136 I 1 TFS0
+bit 135 C 0 *
+bit 134 O 1 DT0PRI 135 0 Z
+bit 133 C 0 *
+bit 132 O 1 DT0SEC 133 0 Z
+bit 131 C 0 *
+bit 130 O 1 RSCLK1 131 0 Z
+bit 129 I 1 RSCLK1
+bit 128 C 0 *
+bit 127 O 1 RFS1 128 0 Z
+bit 126 I 1 RFS1
+bit 125 I 1 DR1PRI
+bit 124 I 1 DR1SEC
+bit 123 C 0 *
+bit 122 O 1 TSCLK1 123 0 Z
+bit 121 I 1 TSCLK1
+bit 120 C 0 *
+bit 119 O 1 TFS1 120 0 Z
+bit 118 I 1 TFS1
+bit 117 C 0 *
+bit 116 O 1 DT1PRI 117 0 Z
+bit 115 C 0 *
+bit 114 O 1 DT1SEC 115 0 Z
+bit 113 C 0 *
+bit 112 O 1 MOSI 113 0 Z
+bit 111 I 1 MOSI
+bit 110 C 0 *
+bit 109 O 1 MISO 110 0 Z
+bit 108 I 1 MISO
+bit 107 C 0 *
+bit 106 O 1 SCK 107 0 Z
+bit 105 I 1 SCK
+bit 104 C 0 *
+bit 103 O 1 PF0 104 0 Z
+bit 102 I 1 PF0
+bit 101 C 0 *
+bit 100 O 1 PF1 101 0 Z
+bit 99 I 1 PF1
+bit 98 C 0 *
+bit 97 O 1 PF2 98 0 Z
+bit 96 I 1 PF2
+bit 95 C 0 *
+bit 94 O 1 PF3 95 0 Z
+bit 93 I 1 PF3
+bit 92 C 0 *
+bit 91 O 1 PF4 92 0 Z
+bit 90 I 1 PF4
+bit 89 C 0 *
+bit 88 O 1 PF5 89 0 Z
+bit 87 I 1 PF5
+bit 86 C 0 *
+bit 85 O 1 PF6 86 0 Z
+bit 84 I 1 PF6
+bit 83 C 0 *
+bit 82 O 1 PF7 83 0 Z
+bit 81 I 1 PF7
+bit 80 C 0 *
+bit 79 O 1 PF8 80 0 Z
+bit 78 I 1 PF8
+bit 77 C 0 *
+bit 76 O 1 PF9 77 0 Z
+bit 75 I 1 PF9
+bit 74 C 0 *
+bit 73 O 1 PF10 74 0 Z
+bit 72 I 1 PF10
+bit 71 C 0 *
+bit 70 O 1 PF11 71 0 Z
+bit 69 I 1 PF11
+bit 68 C 0 *
+bit 67 O 1 PF12 68 0 Z
+bit 66 I 1 PF12
+bit 65 C 0 *
+bit 64 O 1 PF13 65 0 Z
+bit 63 I 1 PF13
+bit 62 C 0 *
+bit 61 O 1 PF14 62 0 Z
+bit 60 I 1 PF14
+bit 59 C 0 *
+bit 58 O 1 PF15 59 0 Z
+bit 57 I 1 PF15
+bit 56 C 0 *
+bit 55 O 1 PP3 56 0 Z
+bit 54 I 1 PP3
+bit 53 C 0 *
+bit 52 O 1 PP2 53 0 Z
+bit 51 I 1 PP2
+bit 50 C 0 *
+bit 49 O 1 PP1 50 0 Z
+bit 48 I 1 PP1
+bit 47 C 0 *
+bit 46 O 1 PP0 47 0 Z
+bit 45 I 1 PP0
+bit 44 I 1 PP_CLK
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR[1] 17 0 Z
+bit 20 O 1 ADDR[2] 17 0 Z
+bit 19 O 1 ADDR[3] 17 0 Z
+bit 18 O 1 ADDR[4] 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR[5] 17 0 Z
+bit 15 O 1 ADDR[6] 17 0 Z
+bit 14 O 1 ADDR[7] 17 0 Z
+bit 13 O 1 ADDR[8] 17 0 Z
+bit 12 O 1 ADDR[9] 17 0 Z
+bit 11 O 1 ADDR[10] 17 0 Z
+bit 10 O 1 ADDR[11] 17 0 Z
+bit 9 O 1 ADDR[12] 17 0 Z
+bit 8 O 1 ADDR[13] 17 0 Z
+bit 7 O 1 ADDR[14] 17 0 Z
+bit 6 O 1 ADDR[15] 17 0 Z
+bit 5 O 1 ADDR[16] 17 0 Z
+bit 4 O 1 ADDR[17] 17 0 Z
+bit 3 O 1 ADDR[18] 17 0 Z
+bit 2 O 1 ADDR[19] 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- a/sie_fs/usr/local/share/urjtag/analog/bf537/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf537/STEPPINGS
@@ -0,0 +1,26 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf537		0
+0001	bf537		1
+0010	bf537		2
+0011	bf537		3
--- a/sie_fs/usr/local/share/urjtag/analog/bf537/bf537
+++ b/sie_fs/usr/local/share/urjtag/analog/bf537/bf537
@@ -0,0 +1,464 @@
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BR_B
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal PJ0
+signal PJ1
+signal PJ2
+signal PJ3
+signal PJ4
+signal PJ5
+signal PJ6
+signal PJ7
+signal PJ8
+signal PJ9
+signal PJ10
+signal PJ11
+signal RESET_B
+signal CLKOUT
+signal SA10
+signal SCAS_B
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TDI
+signal TDO
+signal TCK
+signal TMS
+signal TRST_B
+signal TEST
+signal EMU_B
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal CLKBUF
+signal VROUT0
+
+register	BSR	261
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 260 C 0 *
+bit 259 O 1 DATA0 260 0 Z
+bit 258 I 1 DATA0
+bit 257 O 1 DATA1 260 0 Z
+bit 256 I 1 DATA1
+bit 255 O 1 DATA2 260 0 Z
+bit 254 I 1 DATA2
+bit 253 O 1 DATA3 260 0 Z
+bit 252 I 1 DATA3
+bit 251 O 1 DATA4 260 0 Z
+bit 250 I 1 DATA4
+bit 249 O 1 DATA5 260 0 Z
+bit 248 I 1 DATA5
+bit 247 O 1 DATA6 260 0 Z
+bit 246 I 1 DATA6
+bit 245 O 1 DATA7 260 0 Z
+bit 244 I 1 DATA7
+bit 243 O 1 DATA8 260 0 Z
+bit 242 I 1 DATA8
+bit 241 O 1 DATA9 260 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA10 260 0 Z
+bit 238 I 1 DATA10
+bit 237 O 1 DATA11 260 0 Z
+bit 236 I 1 DATA11
+bit 235 O 1 DATA12 260 0 Z
+bit 234 I 1 DATA12
+bit 233 O 1 DATA13 260 0 Z
+bit 232 I 1 DATA13
+bit 231 O 1 DATA14 260 0 Z
+bit 230 I 1 DATA14
+bit 229 O 1 DATA15 260 0 Z
+bit 228 I 1 DATA15
+bit 227 I 1 TEST
+bit 226 I 1 BMODE0
+bit 225 I 1 BMODE1
+bit 224 I 1 BMODE2
+bit 223 C 0 *
+bit 222 O 1 PF0 223 0 Z
+bit 221 I 1 PF0
+bit 220 C 0 *
+bit 219 O 1 PF1 220 0 Z
+bit 218 I 1 PF1
+bit 217 C 0 *
+bit 216 O 1 PF2 217 0 Z
+bit 215 I 1 PF2
+bit 214 C 0 *
+bit 213 O 1 PF3 214 0 Z
+bit 212 I 1 PF3
+bit 211 C 0 *
+bit 210 O 1 PF4 211 0 Z
+bit 209 I 1 PF4
+bit 208 C 0 *
+bit 207 O 1 PF5 208 0 Z
+bit 206 I 1 PF5
+bit 205 C 0 *
+bit 204 O 1 PF6 205 0 Z
+bit 203 I 1 PF6
+bit 202 C 0 *
+bit 201 O 1 PF7 202 0 Z
+bit 200 I 1 PF7
+bit 199 C 0 *
+bit 198 O 1 PF8 199 0 Z
+bit 197 I 1 PF8
+bit 196 C 0 *
+bit 195 O 1 PF9 196 0 Z
+bit 194 I 1 PF9
+bit 193 C 0 *
+bit 192 O 1 PF10 193 0 Z
+bit 191 I 1 PF10
+bit 190 C 0 *
+bit 189 O 1 PF11 190 0 Z
+bit 188 I 1 PF11
+bit 187 C 0 *
+bit 186 O 1 PF12 187 0 Z
+bit 185 I 1 PF12
+bit 184 C 0 *
+bit 183 O 1 PF13 184 0 Z
+bit 182 I 1 PF13
+bit 181 C 0 *
+bit 180 O 1 PF14 181 0 Z
+bit 179 I 1 PF14
+bit 178 C 0 *
+bit 177 O 1 PF15 178 0 Z
+bit 176 I 1 PF15
+bit 175 C 0 *
+bit 174 O 1 PG0 175 0 Z
+bit 173 I 1 PG0
+bit 172 C 0 *
+bit 171 O 1 PG1 172 0 Z
+bit 170 I 1 PG1
+bit 169 C 0 *
+bit 168 O 1 PG2 169 0 Z
+bit 167 I 1 PG2
+bit 166 C 0 *
+bit 165 O 1 PG3 166 0 Z
+bit 164 I 1 PG3
+bit 163 C 0 *
+bit 162 O 1 PG4 163 0 Z
+bit 161 I 1 PG4
+bit 160 C 0 *
+bit 159 O 1 PG5 160 0 Z
+bit 158 I 1 PG5
+bit 157 C 0 *
+bit 156 O 1 PG6 157 0 Z
+bit 155 I 1 PG6
+bit 154 C 0 *
+bit 153 O 1 PG7 154 0 Z
+bit 152 I 1 PG7
+bit 151 C 0 *
+bit 150 O 1 PG10 151 0 Z
+bit 149 I 1 PG10
+bit 148 C 0 *
+bit 147 O 1 PG11 148 0 Z
+bit 146 I 1 PG11
+bit 145 C 0 *
+bit 144 O 1 PG12 145 0 Z
+bit 143 I 1 PG12
+bit 142 C 0 *
+bit 141 O 1 PG8 142 0 Z
+bit 140 I 1 PG8
+bit 139 C 0 *
+bit 138 O 1 PG9 139 0 Z
+bit 137 I 1 PG9
+bit 136 C 0 *
+bit 135 O 1 PG13 136 0 Z
+bit 134 I 1 PG13
+bit 133 C 0 *
+bit 132 O 1 PG14 133 0 Z
+bit 131 I 1 PG14
+bit 130 C 0 *
+bit 129 O 1 PG15 130 0 Z
+bit 128 I 1 PG15
+bit 127 C 0 *
+bit 126 O 1 PH0 127 0 Z
+bit 125 I 1 PH0
+bit 124 C 0 *
+bit 123 O 1 PH1 124 0 Z
+bit 122 I 1 PH1
+bit 121 C 0 *
+bit 120 O 1 PH2 121 0 Z
+bit 119 I 1 PH2
+bit 118 C 0 *
+bit 117 O 1 PH3 118 0 Z
+bit 116 I 1 PH3
+bit 115 C 0 *
+bit 114 O 1 PH4 115 0 Z
+bit 113 I 1 PH4
+bit 112 C 0 *
+bit 111 O 1 PH5 112 0 Z
+bit 110 I 1 PH5
+bit 109 C 0 *
+bit 108 O 1 PH6 109 0 Z
+bit 107 I 1 PH6
+bit 106 C 0 *
+bit 105 O 1 PH7 106 0 Z
+bit 104 I 1 PH7
+bit 103 C 0 *
+bit 102 O 1 PH8 103 0 Z
+bit 101 I 1 PH8
+bit 100 C 0 *
+bit 99 O 1 PH9 100 0 Z
+bit 98 I 1 PH9
+bit 97 C 0 *
+bit 96 O 1 PH10 97 0 Z
+bit 95 I 1 PH10
+bit 94 C 0 *
+bit 93 O 1 PH11 94 0 Z
+bit 92 I 1 PH11
+bit 91 C 0 *
+bit 90 O 1 PH12 91 0 Z
+bit 89 I 1 PH12
+bit 88 C 0 *
+bit 87 O 1 PH13 88 0 Z
+bit 86 I 1 PH13
+bit 85 C 0 *
+bit 84 O 1 PH14 85 0 Z
+bit 83 I 1 PH14
+bit 82 C 0 *
+bit 81 O 1 PH15 82 0 Z
+bit 80 I 1 PH15
+bit 79 C 0 *
+bit 78 O 1 PJ0 79 0 Z
+bit 77 I 1 PJ0
+bit 76 C 0 *
+bit 75 O 1 PJ1 76 0 Z
+bit 74 I 1 PJ1
+bit 73 C 0 *
+bit 72 O 1 PJ6 73 0 Z
+bit 71 I 1 PJ6
+bit 70 C 0 *
+bit 69 O 1 PJ7 70 0 Z
+bit 68 I 1 PJ7
+bit 67 C 0 *
+bit 66 O 1 PJ8 67 0 Z
+bit 65 I 1 PJ8
+bit 64 C 0 *
+bit 63 O 1 PJ4 64 0 Z
+bit 62 I 1 PJ4
+bit 61 C 0 *
+bit 60 O 1 PJ5 61 0 Z
+bit 59 I 1 PJ5
+bit 58 C 0 *
+bit 57 O 1 PJ9 58 0 Z
+bit 56 I 1 PJ9
+bit 55 C 0 *
+bit 54 O 1 PJ10 55 0 Z
+bit 53 I 1 PJ10
+bit 52 C 0 *
+bit 51 O 1 PJ11 52 0 Z
+bit 50 I 1 PJ11
+bit 49 C 0 *
+bit 48 O 1 PJ2 49 0 Z
+bit 47 I 1 PJ2
+bit 46 C 0 *
+bit 45 O 1 PJ3 46 0 Z
+bit 44 I 1 PJ3
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR1 17 0 Z
+bit 20 O 1 ADDR2 17 0 Z
+bit 19 O 1 ADDR3 17 0 Z
+bit 18 O 1 ADDR4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR5 17 0 Z
+bit 15 O 1 ADDR6 17 0 Z
+bit 14 O 1 ADDR7 17 0 Z
+bit 13 O 1 ADDR8 17 0 Z
+bit 12 O 1 ADDR9 17 0 Z
+bit 11 O 1 ADDR10 17 0 Z
+bit 10 O 1 ADDR11 17 0 Z
+bit 9 O 1 ADDR12 17 0 Z
+bit 8 O 1 ADDR13 17 0 Z
+bit 7 O 1 ADDR14 17 0 Z
+bit 6 O 1 ADDR15 17 0 Z
+bit 5 O 1 ADDR16 17 0 Z
+bit 4 O 1 ADDR17 17 0 Z
+bit 3 O 1 ADDR18 17 0 Z
+bit 2 O 1 ADDR19 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- a/sie_fs/usr/local/share/urjtag/analog/bf538/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf538/STEPPINGS
@@ -0,0 +1,28 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf538		0
+0001	bf538		1
+0010	bf538		2
+0011	bf538		3
+0100	bf538		4
+0101	bf538		5
--- a/sie_fs/usr/local/share/urjtag/analog/bf538/bf538
+++ b/sie_fs/usr/local/share/urjtag/analog/bf538/bf538
@@ -0,0 +1,661 @@
+signal ABE_B0
+signal ABE_B1
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal CANRX
+signal CANTX
+signal CLKIN
+signal CLKOUT
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DR2PRI
+signal DR2SEC
+signal DR3PRI
+signal DR3SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal DT2PRI
+signal DT2SEC
+signal DT3PRI
+signal DT3SEC
+signal EMU_B
+signal FCE_B
+signal FRESET_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GP
+signal GPW_B
+signal MISO0
+signal MISO1
+signal MISO2
+signal MOSI0
+signal MOSI1
+signal MOSI2
+signal PC4
+signal PC6
+signal PC7
+signal PC8
+signal PC5
+signal NC
+signal NMI_B
+signal PC9
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PPI_CLK
+signal PPI0
+signal PPI1
+signal PPI2
+signal PPI3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RFS2
+signal RFS3
+signal RSCLK0
+signal RSCLK1
+signal RSCLK2
+signal RSCLK3
+signal RTXI
+signal RTXO
+signal RX0
+signal RX1
+signal RX2
+signal SA10
+signal SCAS_B
+signal SCK0
+signal SCK1
+signal SCK2
+signal SCKE
+signal SCL0
+signal SCL1
+signal SDA0
+signal SDA1
+signal SMS_B
+signal SPI1SS_B
+signal SPI1SEL1_B
+signal SPI2SS_B
+signal SPI2SEL1_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TFS0
+signal TFS1
+signal TFS2
+signal TFS3
+signal TMR0
+signal TMR1
+signal TMR2
+signal TMS
+signal TRST_B
+signal TSCLK0
+signal TSCLK1
+signal TSCLK2
+signal TSCLK3
+signal TX0
+signal TX1
+signal TX2
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDRTC
+signal VROUT0
+signal VROUT1
+
+register	BSR	325
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 324 C 0 *
+bit 323 O 1 DATA0 324 0 Z
+bit 322 I 1 DATA0
+bit 321 O 1 DATA1 324 0 Z
+bit 320 I 1 DATA1
+bit 319 O 1 DATA2 324 0 Z
+bit 318 I 1 DATA2
+bit 317 C 0 *
+bit 316 O 1 TSCLK2 317 0 Z
+bit 315 I 1 TSCLK2
+bit 314 C 0 *
+bit 313 O 1 DR2SEC 314 0 Z
+bit 312 I 1 DR2SEC
+bit 311 C 0 *
+bit 310 O 1 DR2PRI 311 0 Z
+bit 309 I 1 DR2PRI
+bit 308 O 1 DATA3 324 0 Z
+bit 307 I 1 DATA3
+bit 306 O 1 DATA4 324 0 Z
+bit 305 I 1 DATA4
+bit 304 O 1 DATA5 324 0 Z
+bit 303 I 1 DATA5
+bit 302 O 1 DATA6 324 0 Z
+bit 301 I 1 DATA6
+bit 300 C 0 *
+bit 299 O 1 RFS2 300 0 Z
+bit 298 I 1 RFS2
+bit 297 O 1 DATA7 324 0 Z
+bit 296 I 1 DATA7
+bit 295 O 1 DATA8 324 0 Z
+bit 294 I 1 DATA8
+bit 293 O 1 DATA9 324 0 Z
+bit 292 I 1 DATA9
+bit 291 O 1 DATA10 324 0 Z
+bit 290 I 1 DATA10
+bit 289 O 1 DATA11 324 0 Z
+bit 288 I 1 DATA11
+bit 287 C 0 *
+bit 286 O 1 RSCLK2 287 0 Z
+bit 285 I 1 RSCLK2
+bit 284 C 0 *
+bit 283 O 1 RX2 284 0 Z
+bit 282 I 1 RX2
+bit 281 O 1 DATA12 324 0 Z
+bit 280 I 1 DATA12
+bit 279 O 1 DATA13 324 0 Z
+bit 278 I 1 DATA13
+bit 277 O 1 DATA14 324 0 Z
+bit 276 I 1 DATA14
+bit 275 O 1 DATA15 324 0 Z
+bit 274 I 1 DATA15
+bit 273 I 1 BMODE0
+bit 272 I 1 BMODE1
+bit 271 I 1 RX0
+bit 270 O 1 TX0
+bit 269 C 0 *
+bit 268 O 1 RSCLK1 269 0 Z
+bit 267 I 1 RSCLK1
+bit 266 C 0 *
+bit 265 O 1 TMR0 266 0 Z
+bit 264 I 1 TMR0
+bit 263 C 0 *
+bit 262 O 1 TMR1 263 0 Z
+bit 261 I 1 TMR1
+bit 260 C 0 *
+bit 259 O 1 TMR2 260 0 Z
+bit 258 I 1 TMR2
+bit 257 C 0 *
+bit 256 O 1 RSCLK0 257 0 Z
+bit 255 I 1 RSCLK0
+bit 254 C 0 *
+bit 253 O 1 RFS0 254 0 Z
+bit 252 I 1 RFS0
+bit 251 I 1 DR0PRI
+bit 250 I 1 DR0SEC
+bit 249 C 0 *
+bit 248 O 1 RFS1 249 0 Z
+bit 247 I 1 RFS1
+bit 246 I 1 DR1PRI
+bit 245 I 1 DR1SEC
+bit 244 C 0 *
+bit 243 O 1 TSCLK0 244 0 Z
+bit 242 I 1 TSCLK0
+bit 241 C 0 *
+bit 240 O 1 TFS0 241 0 Z
+bit 239 I 1 TFS0
+bit 238 C 0 *
+bit 237 O 1 DT0PRI 238 0 Z
+bit 236 C 0 *
+bit 235 O 1 DT0SEC 236 0 Z
+bit 234 C 0 *
+bit 233 O 1 PF0 234 0 Z
+bit 232 I 1 PF0
+bit 231 C 0 *
+bit 230 O 1 PF1 231 0 Z
+bit 229 I 1 PF1
+bit 228 C 0 *
+bit 227 O 1 PF2 228 0 Z
+bit 226 I 1 PF2
+bit 225 C 0 *
+bit 224 O 1 PF3 225 0 Z
+bit 223 I 1 PF3
+bit 222 C 0 *
+bit 221 O 1 PF4 222 0 Z
+bit 220 I 1 PF4
+bit 219 C 0 *
+bit 218 O 1 PF5 219 0 Z
+bit 217 I 1 PF5
+bit 216 C 0 *
+bit 215 O 1 TSCLK1 216 0 Z
+bit 214 I 1 TSCLK1
+bit 213 C 0 *
+bit 212 O 1 TFS1 213 0 Z
+bit 211 I 1 TFS1
+bit 210 C 0 *
+bit 209 O 1 DT1PRI 210 0 Z
+bit 208 C 0 *
+bit 207 O 1 PF6 208 0 Z
+bit 206 I 1 PF6
+bit 205 C 0 *
+bit 204 O 1 MOSI0 205 0 Z
+bit 203 I 1 MOSI0
+bit 202 C 0 *
+bit 201 O 1 MISO0 202 0 Z
+bit 200 I 1 MISO0
+bit 199 C 0 *
+bit 198 O 1 DT1SEC 199 0 Z
+bit 197 C 0 *
+bit 196 O 1 SCK0 197 0 Z
+bit 195 I 1 SCK0
+bit 194 C 0 *
+bit 193 O 1 PF7 194 0 Z
+bit 192 I 1 PF7
+bit 191 C 0 *
+bit 190 O 1 PF8 191 0 Z
+bit 189 I 1 PF8
+bit 188 C 0 *
+bit 187 O 1 PF9 188 0 Z
+bit 186 I 1 PF9
+bit 185 C 0 *
+bit 184 O 1 PF10 185 0 Z
+bit 183 I 1 PF10
+bit 182 C 0 *
+bit 181 O 1 PF11 182 0 Z
+bit 180 I 1 PF11
+bit 179 C 0 *
+bit 178 O 1 PF12 179 0 Z
+bit 177 I 1 PF12
+bit 176 C 0 *
+bit 175 O 1 PF13 176 0 Z
+bit 174 I 1 PF13
+bit 173 C 0 *
+bit 172 O 1 PF14 173 0 Z
+bit 171 I 1 PF14
+bit 170 C 0 *
+bit 169 O 1 PF15 170 0 Z
+bit 168 I 1 PF15
+bit 167 C 0 *
+bit 166 O 1 PPI3 167 0 Z
+bit 165 I 1 PPI3
+bit 164 C 0 *
+bit 163 O 1 PPI2 164 0 Z
+bit 162 I 1 PPI2
+bit 161 C 0 *
+bit 160 O 1 PPI1 161 0 Z
+bit 159 I 1 PPI1
+bit 158 C 0 *
+bit 157 O 1 PPI0 158 0 Z
+bit 156 I 1 PPI0
+bit 155 C 0 *
+bit 154 O 1 RX1 155 0 Z
+bit 153 I 1 RX1
+bit 152 C 0 *
+bit 151 O 1 TX1 152 0 Z
+bit 150 I 1 TX1
+bit 149 I 1 PPI_CLK
+bit 148 C 0 *
+bit 147 O 1 SCL0 148 0 Z
+bit 146 I 1 SCL0
+bit 145 C 0 *
+bit 144 O 1 SDA0 145 0 Z
+bit 143 I 1 SDA0
+bit 142 O 0 *
+bit 141 O 0 *
+bit 140 I 1 CANRX
+bit 139 C 0 *
+bit 138 O 1 CANTX 139 0 Z
+bit 137 I 1 CANTX
+bit 136 C 0 *
+bit 135 O 1 SPI2SEL1_B 136 0 Z
+bit 134 I 1 SPI2SEL1_B
+bit 133 C 0 *
+bit 132 O 1 SPI2SS_B 133 0 Z
+bit 131 I 1 SPI2SS_B
+bit 130 C 0 *
+bit 129 O 1 MOSI2 130 0 Z
+bit 128 I 1 MOSI2
+bit 127 C 0 *
+bit 126 O 1 MISO2 127 0 Z
+bit 125 I 1 MISO2
+bit 124 I 1 NMI_B
+bit 123 I 1 RESET_B
+bit 122 C 0 *
+bit 121 O 1 SCK2 122 0 Z
+bit 120 I 1 SCK2
+bit 119 C 0 *
+bit 118 O 1 SPI1SEL1_B 119 0 Z
+bit 117 I 1 SPI1SEL1_B
+bit 116 C 0 *
+bit 115 O 1 SPI1SS_B 116 0 Z
+bit 114 I 1 SPI1SS_B
+bit 113 C 0 *
+bit 112 O 1 MOSI1 113 0 Z
+bit 111 I 1 MOSI1
+bit 110 C 0 *
+bit 109 O 1 MISO1 110 0 Z
+bit 108 I 1 MISO1
+bit 107 C 0 *
+bit 106 O 1 SCK1 107 0 Z
+bit 105 I 1 SCK1
+bit 104 C 0 *
+bit 103 O 1 SCL1 104 0 Z
+bit 102 I 1 SCL1
+bit 101 C 0 *
+bit 100 O 1 SDA1 101 0 Z
+bit 99 I 1 SDA1
+bit 98 C 0 *
+bit 97 O 1 PC9 98 0 Z
+bit 96 I 1 PC9
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 I 1 GPW_B
+bit 92 O 1 SCKE 84 0 Z
+bit 91 O 1 SMS_B 84 0 Z
+bit 90 C 0 *
+bit 89 O 1 PC6 90 0 Z
+bit 88 I 1 PC6
+bit 87 C 0 *
+bit 86 O 1 PC7 87 0 Z
+bit 85 I 1 PC7
+bit 84 C 0 *
+bit 83 O 1 CLKOUT 84 0 Z
+bit 82 I 1 ARDY
+bit 81 I 1 BR_B
+bit 80 C 0 *
+bit 79 O 1 DT3SEC 80 0 Z
+bit 78 I 1 DT3SEC
+bit 77 C 0 *
+bit 76 O 1 DT3PRI 77 0 Z
+bit 75 I 1 DT3PRI
+bit 74 C 0 *
+bit 73 O 1 TFS3 74 0 Z
+bit 72 I 1 TFS3
+bit 71 O 1 SRAS_B 84 0 Z
+bit 70 O 1 SCAS_B 84 0 Z
+bit 69 O 1 SWE_B 84 0 Z
+bit 68 O 1 SA10 84 0 Z
+bit 67 C 0 *
+bit 66 O 1 PC8 67 0 Z
+bit 65 I 1 PC8
+bit 64 C 0 *
+bit 63 O 1 PC5 64 0 Z
+bit 62 I 1 PC5
+bit 61 O 0 *
+bit 60 O 0 *
+bit 59 I 1 PC4
+bit 58 O 1 AMS_B0 45 0 Z
+bit 57 C 0 *
+bit 56 O 1 TSCLK3 57 0 Z
+bit 55 I 1 TSCLK3
+bit 54 C 0 *
+bit 53 O 1 DR3SEC 54 0 Z
+bit 52 I 1 DR3SEC
+bit 51 C 0 *
+bit 50 O 1 DR3PRI 51 0 Z
+bit 49 I 1 DR3PRI
+bit 48 O 1 AMS_B1 45 0 Z
+bit 47 O 1 AMS_B2 45 0 Z
+bit 46 O 1 AMS_B3 45 0 Z
+bit 45 C 0 *
+bit 44 O 1 AOE_B 45 0 Z
+bit 43 O 1 ARE_B 45 0 Z
+bit 42 O 1 AWE_B 45 0 Z
+bit 41 O 1 ABE_B0 26 0 Z
+bit 40 O 1 ABE_B1 26 0 Z
+bit 39 C 0 *
+bit 38 O 1 RFS3 39 0 Z
+bit 37 I 1 RFS3
+bit 36 C 0 *
+bit 35 O 1 RSCLK3 36 0 Z
+bit 34 I 1 RSCLK3
+bit 33 C 0 *
+bit 32 O 1 TX2 33 0 Z
+bit 31 I 1 TX2
+bit 30 O 1 ADDR1 26 0 Z
+bit 29 O 1 ADDR2 26 0 Z
+bit 28 O 1 ADDR3 26 0 Z
+bit 27 O 1 ADDR4 26 0 Z
+bit 26 C 0 *
+bit 25 O 1 ADDR5 26 0 Z
+bit 24 O 1 ADDR6 26 0 Z
+bit 23 O 1 ADDR7 26 0 Z
+bit 22 O 1 ADDR8 26 0 Z
+bit 21 O 1 ADDR9 26 0 Z
+bit 20 O 1 ADDR10 26 0 Z
+bit 19 O 1 ADDR11 26 0 Z
+bit 18 O 1 ADDR12 26 0 Z
+bit 17 O 1 ADDR13 26 0 Z
+bit 16 O 1 ADDR14 26 0 Z
+bit 15 C 0 *
+bit 14 O 1 DT2SEC 15 0 Z
+bit 13 I 1 DT2SEC
+bit 12 C 0 *
+bit 11 O 1 DT2PRI 12 0 Z
+bit 10 I 1 DT2PRI
+bit 9 O 1 ADDR15 26 0 Z
+bit 8 O 1 ADDR16 26 0 Z
+bit 7 O 1 ADDR17 26 0 Z
+bit 6 O 1 ADDR18 26 0 Z
+bit 5 O 1 ADDR19 26 0 Z
+bit 4 C 0 *
+bit 3 O 1 TFS2 4 0 Z
+bit 2 I 1 TFS2
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B
--- a/sie_fs/usr/local/share/urjtag/analog/bf549/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf549/STEPPINGS
@@ -0,0 +1,24 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf549		0
+0001	bf549		1
--- a/sie_fs/usr/local/share/urjtag/analog/bf549/bf549
+++ b/sie_fs/usr/local/share/urjtag/analog/bf549/bf549
--- a/sie_fs/usr/local/share/urjtag/analog/bf561/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/bf561/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0010	bf561		2
+0011	bf561		3
+0101	bf561		5
--- a/sie_fs/usr/local/share/urjtag/analog/bf561/bf561
+++ b/sie_fs/usr/local/share/urjtag/analog/bf561/bf561
@@ -0,0 +1,610 @@
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal ADDR24
+signal ADDR25
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal ABE_B2
+signal ABE_B3
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal BY_PASS
+signal PPI1_DATA0
+signal PPI1_DATA1
+signal PPI1_DATA2
+signal PPI1_DATA3
+signal PPI1_DATA4
+signal PPI1_DATA5
+signal PPI1_DATA6
+signal PPI1_DATA7
+signal PPI1_DATA8
+signal PPI1_DATA9
+signal PPI1_DATA10
+signal PPI1_DATA11
+signal PPI1_DATA12
+signal PPI1_DATA13
+signal PPI1_DATA14
+signal PPI1_DATA15
+signal PPI2_DATA0
+signal PPI2_DATA1
+signal PPI2_DATA2
+signal PPI2_DATA3
+signal PPI2_DATA4
+signal PPI2_DATA5
+signal PPI2_DATA6
+signal PPI2_DATA7
+signal PPI2_DATA8
+signal PPI2_DATA9
+signal PPI2_DATA10
+signal PPI2_DATA11
+signal PPI2_DATA12
+signal PPI2_DATA13
+signal PPI2_DATA14
+signal PPI2_DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI_0
+signal NMI_1
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SLEEP
+signal SMS_B0
+signal SMS_B1
+signal SMS_B2
+signal SMS_B3
+signal SRAS_B
+signal SWE_B
+signal SCLK0
+signal SCLK1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal PPI1_CLK
+signal PPI2_CLK
+signal PPI1_SYNC1
+signal PPI1_SYNC2
+signal PPI1_SYNC3
+signal PPI2_SYNC1
+signal PPI2_SYNC2
+signal PPI2_SYNC3
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_INT7
+signal VDD_INT8
+signal GND_INT0
+signal GND_INT1
+signal GND_INT2
+signal GND_INT3
+signal GND_INT4
+signal GND_INT5
+signal GND_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal VDD_EXT16
+signal VDD_EXT17
+signal VDD_EXT18
+signal CLKIN
+signal XTAL
+signal VREF_FLT
+signal VREG
+signal PSMON_VDD
+signal PSMON_GND
+signal GND_EXT0
+signal GND_EXT1
+signal GND_EXT2
+signal GND_EXT3
+signal GND_EXT4
+signal GND_EXT5
+signal GND_EXT6
+signal GND_EXT7
+signal GND_EXT8
+signal GND_EXT9
+signal GND_EXT10
+signal GND_EXT11
+signal GND_EXT12
+signal GND_EXT13
+signal GND_EXT14
+signal GND_EXT15
+signal GND_EXT16
+signal GND_EXT17
+signal GND_EXT18
+
+register	BSR	355
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 354 I 1 TEST
+bit 353 I 1 BMODE1
+bit 352 I 1 BMODE0
+bit 351 O 1 SLEEP
+bit 350 I 1 NMI_0
+bit 349 C 0 *
+bit 348 O 1 MISO 349 0 Z
+bit 347 I 1 MISO
+bit 346 C 0 *
+bit 345 O 1 MOSI 346 0 Z
+bit 344 I 1 MOSI
+bit 343 C 0 *
+bit 342 O 1 SCK 343 0 Z
+bit 341 I 1 SCK
+bit 340 C 0 *
+bit 339 O 1 RX 340 0 Z
+bit 338 I 1 RX
+bit 337 C 0 *
+bit 336 O 1 TX 337 0 Z
+bit 335 I 1 TX
+bit 334 C 0 *
+bit 333 O 1 RSCLK1 334 0 Z
+bit 332 I 1 RSCLK1
+bit 331 C 0 *
+bit 330 O 1 RFS1 331 0 Z
+bit 329 I 1 RFS1
+bit 328 C 0 *
+bit 327 O 1 DR1SEC 328 0 Z
+bit 326 I 1 DR1SEC
+bit 325 C 0 *
+bit 324 O 1 DR1PRI 325 0 Z
+bit 323 I 1 DR1PRI
+bit 322 C 0 *
+bit 321 O 1 TSCLK1 322 0 Z
+bit 320 I 1 TSCLK1
+bit 319 C 0 *
+bit 318 O 1 TFS1 319 0 Z
+bit 317 I 1 TFS1
+bit 316 C 0 *
+bit 315 O 1 DT1SEC 316 0 Z
+bit 314 I 1 DT1SEC
+bit 313 C 0 *
+bit 312 O 1 DT1PRI 313 0 Z
+bit 311 I 1 DT1PRI
+bit 310 C 0 *
+bit 309 O 1 RSCLK0 310 0 Z
+bit 308 I 1 RSCLK0
+bit 307 C 0 *
+bit 306 O 1 RFS0 307 0 Z
+bit 305 I 1 RFS0
+bit 304 C 0 *
+bit 303 O 1 DR0SEC 304 0 Z
+bit 302 I 1 DR0SEC
+bit 301 C 0 *
+bit 300 O 1 DR0PRI 301 0 Z
+bit 299 I 1 DR0PRI
+bit 298 C 0 *
+bit 297 O 1 TSCLK0 298 0 Z
+bit 296 I 1 TSCLK0
+bit 295 C 0 *
+bit 294 O 1 TFS0 295 0 Z
+bit 293 I 1 TFS0
+bit 292 C 0 *
+bit 291 O 1 DT0SEC 292 0 Z
+bit 290 I 1 DT0SEC
+bit 289 C 0 *
+bit 288 O 1 DT0PRI 289 0 Z
+bit 287 I 1 DT0PRI
+bit 286 O 1 DATA31 254 0 Z
+bit 285 I 1 DATA31
+bit 284 O 1 DATA30 254 0 Z
+bit 283 I 1 DATA30
+bit 282 O 1 DATA29 254 0 Z
+bit 281 I 1 DATA29
+bit 280 O 1 DATA28 254 0 Z
+bit 279 I 1 DATA28
+bit 278 O 1 DATA27 254 0 Z
+bit 277 I 1 DATA27
+bit 276 O 1 DATA26 254 0 Z
+bit 275 I 1 DATA26
+bit 274 O 1 DATA25 254 0 Z
+bit 273 I 1 DATA25
+bit 272 O 1 DATA24 254 0 Z
+bit 271 I 1 DATA24
+bit 270 O 1 DATA23 254 0 Z
+bit 269 I 1 DATA23
+bit 268 O 1 DATA22 254 0 Z
+bit 267 I 1 DATA22
+bit 266 O 1 DATA21 254 0 Z
+bit 265 I 1 DATA21
+bit 264 O 1 DATA20 254 0 Z
+bit 263 I 1 DATA20
+bit 262 O 1 DATA19 254 0 Z
+bit 261 I 1 DATA19
+bit 260 O 1 DATA18 254 0 Z
+bit 259 I 1 DATA18
+bit 258 O 1 DATA17 254 0 Z
+bit 257 I 1 DATA17
+bit 256 O 1 DATA16 254 0 Z
+bit 255 I 1 DATA16
+bit 254 C 0 *
+bit 253 O 1 DATA15 221 0 Z
+bit 252 I 1 DATA15
+bit 251 O 1 DATA14 221 0 Z
+bit 250 I 1 DATA14
+bit 249 O 1 DATA13 221 0 Z
+bit 248 I 1 DATA13
+bit 247 O 1 DATA12 221 0 Z
+bit 246 I 1 DATA12
+bit 245 O 1 DATA11 221 0 Z
+bit 244 I 1 DATA11
+bit 243 O 1 DATA10 221 0 Z
+bit 242 I 1 DATA10
+bit 241 O 1 DATA9 221 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA8 221 0 Z
+bit 238 I 1 DATA8
+bit 237 O 1 DATA7 221 0 Z
+bit 236 I 1 DATA7
+bit 235 O 1 DATA6 221 0 Z
+bit 234 I 1 DATA6
+bit 233 O 1 DATA5 221 0 Z
+bit 232 I 1 DATA5
+bit 231 O 1 DATA4 221 0 Z
+bit 230 I 1 DATA4
+bit 229 O 1 DATA3 221 0 Z
+bit 228 I 1 DATA3
+bit 227 O 1 DATA2 221 0 Z
+bit 226 I 1 DATA2
+bit 225 O 1 DATA1 221 0 Z
+bit 224 I 1 DATA1
+bit 223 O 1 DATA0 221 0 Z
+bit 222 I 1 DATA0
+bit 221 C 0 *
+bit 220 O 1 ADDR2 219 0 Z
+bit 219 C 0 *
+bit 218 O 1 ADDR3 219 0 Z
+bit 217 O 1 ADDR4 219 0 Z
+bit 216 O 1 ADDR5 219 0 Z
+bit 215 O 1 ADDR6 219 0 Z
+bit 214 O 1 ADDR7 219 0 Z
+bit 213 O 1 ADDR8 219 0 Z
+bit 212 O 1 ABE_B3 219 0 Z
+bit 211 O 1 ABE_B2 219 0 Z
+bit 210 O 1 ABE_B1 219 0 Z
+bit 209 O 1 ABE_B0 219 0 Z
+bit 208 O 1 BGH_B
+bit 207 O 1 BG_B
+bit 206 I 1 BR_B
+bit 205 O 1 SA10 194 0 Z
+bit 204 O 1 SCLK1 194 0 Z
+bit 203 O 1 SCLK0 194 0 Z
+bit 202 O 1 SWE_B 194 0 Z
+bit 201 O 1 SCAS_B 194 0 Z
+bit 200 O 1 SCKE 194 0 Z
+bit 199 O 1 SRAS_B 194 0 Z
+bit 198 O 1 SMS_B3 194 0 Z
+bit 197 O 1 SMS_B2 194 0 Z
+bit 196 O 1 SMS_B1 194 0 Z
+bit 195 O 1 SMS_B0 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 ARDY
+bit 192 O 1 ARE_B 189 0 Z
+bit 191 O 1 AOE_B 189 0 Z
+bit 190 O 1 AWE_B 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 AMS_B0 189 0 Z
+bit 187 O 1 AMS_B1 189 0 Z
+bit 186 O 1 AMS_B2 189 0 Z
+bit 185 O 1 AMS_B3 189 0 Z
+bit 184 O 1 ADDR9 175 0 Z
+bit 183 O 1 ADDR10 175 0 Z
+bit 182 O 1 ADDR11 175 0 Z
+bit 181 O 1 ADDR12 175 0 Z
+bit 180 O 1 ADDR13 175 0 Z
+bit 179 O 1 ADDR14 175 0 Z
+bit 178 O 1 ADDR15 175 0 Z
+bit 177 O 1 ADDR16 175 0 Z
+bit 176 O 1 ADDR17 175 0 Z
+bit 175 C 0 *
+bit 174 O 1 ADDR18 175 0 Z
+bit 173 O 1 ADDR19 175 0 Z
+bit 172 O 1 ADDR20 175 0 Z
+bit 171 O 1 ADDR21 175 0 Z
+bit 170 O 1 ADDR22 175 0 Z
+bit 169 O 1 ADDR23 175 0 Z
+bit 168 O 1 ADDR24 175 0 Z
+bit 167 O 1 ADDR25 175 0 Z
+bit 166 I 1 PPI2_CLK
+bit 165 I 1 PPI1_CLK
+bit 164 C 0 *
+bit 163 O 1 PPI1_SYNC3 164 0 Z
+bit 162 I 1 PPI1_SYNC3
+bit 161 C 0 *
+bit 160 O 1 PPI1_SYNC2 161 0 Z
+bit 159 I 1 PPI1_SYNC2
+bit 158 C 0 *
+bit 157 O 1 PPI1_SYNC1 158 0 Z
+bit 156 I 1 PPI1_SYNC1
+bit 155 C 0 *
+bit 154 O 1 PPI1_DATA15 155 0 Z
+bit 153 I 1 PPI1_DATA15
+bit 152 C 0 *
+bit 151 O 1 PPI1_DATA14 152 0 Z
+bit 150 I 1 PPI1_DATA14
+bit 149 C 0 *
+bit 148 O 1 PPI1_DATA13 149 0 Z
+bit 147 I 1 PPI1_DATA13
+bit 146 C 0 *
+bit 145 O 1 PPI1_DATA12 146 0 Z
+bit 144 I 1 PPI1_DATA12
+bit 143 C 0 *
+bit 142 O 1 PPI1_DATA11 143 0 Z
+bit 141 I 1 PPI1_DATA11
+bit 140 C 0 *
+bit 139 O 1 PPI1_DATA10 140 0 Z
+bit 138 I 1 PPI1_DATA10
+bit 137 I 1 RESET_B
+bit 136 I 1 BY_PASS
+bit 135 C 0 *
+bit 134 O 1 PPI1_DATA9 135 0 Z
+bit 133 I 1 PPI1_DATA9
+bit 132 C 0 *
+bit 131 O 1 PPI1_DATA8 132 0 Z
+bit 130 I 1 PPI1_DATA8
+bit 129 C 0 *
+bit 128 O 1 PPI1_DATA7 129 0 Z
+bit 127 I 1 PPI1_DATA7
+bit 126 C 0 *
+bit 125 O 1 PPI1_DATA6 126 0 Z
+bit 124 I 1 PPI1_DATA6
+bit 123 C 0 *
+bit 122 O 1 PPI1_DATA5 123 0 Z
+bit 121 I 1 PPI1_DATA5
+bit 120 C 0 *
+bit 119 O 1 PPI1_DATA4 120 0 Z
+bit 118 I 1 PPI1_DATA4
+bit 117 C 0 *
+bit 116 O 1 PPI1_DATA3 117 0 Z
+bit 115 I 1 PPI1_DATA3
+bit 114 C 0 *
+bit 113 O 1 PPI1_DATA2 114 0 Z
+bit 112 I 1 PPI1_DATA2
+bit 111 C 0 *
+bit 110 O 1 PPI1_DATA1 111 0 Z
+bit 109 I 1 PPI1_DATA1
+bit 108 C 0 *
+bit 107 O 1 PPI1_DATA0 108 0 Z
+bit 106 I 1 PPI1_DATA0
+bit 105 C 0 *
+bit 104 O 1 PPI2_SYNC3 105 0 Z
+bit 103 I 1 PPI2_SYNC3
+bit 102 C 0 *
+bit 101 O 1 PPI2_SYNC2 102 0 Z
+bit 100 I 1 PPI2_SYNC2
+bit 99 C 0 *
+bit 98 O 1 PPI2_SYNC1 99 0 Z
+bit 97 I 1 PPI2_SYNC1
+bit 96 C 0 *
+bit 95 O 1 PPI2_DATA15 96 0 Z
+bit 94 I 1 PPI2_DATA15
+bit 93 C 0 *
+bit 92 O 1 PPI2_DATA14 93 0 Z
+bit 91 I 1 PPI2_DATA14
+bit 90 C 0 *
+bit 89 O 1 PPI2_DATA13 90 0 Z
+bit 88 I 1 PPI2_DATA13
+bit 87 C 0 *
+bit 86 O 1 PPI2_DATA12 87 0 Z
+bit 85 I 1 PPI2_DATA12
+bit 84 C 0 *
+bit 83 O 1 PPI2_DATA11 84 0 Z
+bit 82 I 1 PPI2_DATA11
+bit 81 C 0 *
+bit 80 O 1 PPI2_DATA10 81 0 Z
+bit 79 I 1 PPI2_DATA10
+bit 78 C 0 *
+bit 77 O 1 PPI2_DATA9 78 0 Z
+bit 76 I 1 PPI2_DATA9
+bit 75 C 0 *
+bit 74 O 1 PPI2_DATA8 75 0 Z
+bit 73 I 1 PPI2_DATA8
+bit 72 C 0 *
+bit 71 O 1 PPI2_DATA7 72 0 Z
+bit 70 I 1 PPI2_DATA7
+bit 69 C 0 *
+bit 68 O 1 PPI2_DATA6 69 0 Z
+bit 67 I 1 PPI2_DATA6
+bit 66 C 0 *
+bit 65 O 1 PPI2_DATA5 66 0 Z
+bit 64 I 1 PPI2_DATA5
+bit 63 C 0 *
+bit 62 O 1 PPI2_DATA4 63 0 Z
+bit 61 I 1 PPI2_DATA4
+bit 60 C 0 *
+bit 59 O 1 PPI2_DATA3 60 0 Z
+bit 58 I 1 PPI2_DATA3
+bit 57 C 0 *
+bit 56 O 1 PPI2_DATA2 57 0 Z
+bit 55 I 1 PPI2_DATA2
+bit 54 C 0 *
+bit 53 O 1 PPI2_DATA1 54 0 Z
+bit 52 I 1 PPI2_DATA1
+bit 51 C 0 *
+bit 50 O 1 PPI2_DATA0 51 0 Z
+bit 49 I 1 PPI2_DATA0
+bit 48 C 0 *
+bit 47 O 1 PF0 48 0 Z
+bit 46 I 1 PF0
+bit 45 C 0 *
+bit 44 O 1 PF1 45 0 Z
+bit 43 I 1 PF1
+bit 42 C 0 *
+bit 41 O 1 PF2 42 0 Z
+bit 40 I 1 PF2
+bit 39 C 0 *
+bit 38 O 1 PF3 39 0 Z
+bit 37 I 1 PF3
+bit 36 C 0 *
+bit 35 O 1 PF4 36 0 Z
+bit 34 I 1 PF4
+bit 33 C 0 *
+bit 32 O 1 PF5 33 0 Z
+bit 31 I 1 PF5
+bit 30 C 0 *
+bit 29 O 1 PF6 30 0 Z
+bit 28 I 1 PF6
+bit 27 C 0 *
+bit 26 O 1 PF7 27 0 Z
+bit 25 I 1 PF7
+bit 24 C 0 *
+bit 23 O 1 PF8 24 0 Z
+bit 22 I 1 PF8
+bit 21 C 0 *
+bit 20 O 1 PF9 21 0 Z
+bit 19 I 1 PF9
+bit 18 C 0 *
+bit 17 O 1 PF10 18 0 Z
+bit 16 I 1 PF10
+bit 15 C 0 *
+bit 14 O 1 PF11 15 0 Z
+bit 13 I 1 PF11
+bit 12 C 0 *
+bit 11 O 1 PF12 12 0 Z
+bit 10 I 1 PF12
+bit 9 C 0 *
+bit 8 O 1 PF13 9 0 Z
+bit 7 I 1 PF13
+bit 6 C 0 *
+bit 5 O 1 PF14 6 0 Z
+bit 4 I 1 PF14
+bit 3 C 0 *
+bit 2 O 1 PF15 3 0 Z
+bit 1 I 1 PF15
+bit 0 I 1 NMI_1
--- a/sie_fs/usr/local/share/urjtag/analog/sharc21065l/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/analog/sharc21065l/STEPPINGS
@@ -0,0 +1,32 @@
+#
+# $Id: STEPPINGS v 1.0 20/09/2006 $
+#
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+#       [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+#
+#
+# bits 31-28 of the Device Identification Register
+0000    sharc21065l		0
+0001    sharc21065l		1
+0010	sharc21065l		2
+0011	sharc21065l		3
+
--- a/sie_fs/usr/local/share/urjtag/analog/sharc21065l/sharc21065l
+++ b/sie_fs/usr/local/share/urjtag/analog/sharc21065l/sharc21065l
@@ -0,0 +1,515 @@
+#
+# $Id: sharc21065l,v 1.0 20/09/2006 $
+#
+# JTAG declarations for ADSP SHARC 21065L
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+#	[1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+#	[2] Analog Devices Inc.,"BSDL Description for ADSP-21065L: MBGA Package", BSDL rev 1.1
+#   http://www.analog.com/UploadedFiles/BSDL_Files/435954194035486111591903bsdl_21065l_bga.txt
+#
+#
+
+
+signal ADDR0
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal MS0
+signal MS1
+signal MS2
+signal MS3
+signal RD_B
+signal WR_B
+signal SW_B
+signal ACK
+signal TS_B
+signal IRQ0_B
+signal IRQ1_B
+signal IRQ2_B
+signal FLAG0
+signal FLAG1
+signal FLAG2
+signal FLAG3
+signal FLAG4
+signal FLAG5
+signal FLAG6
+signal FLAG7
+signal FLAG8
+signal FLAG9
+signal FLAG10
+signal FLAG11
+signal HBR_B
+signal HBG_B
+signal CS_B
+signal REDY
+signal DMAR1_B
+signal DMAR2_B
+signal DMAG1_B
+signal DMAG2_B
+signal BR1
+signal BR2
+signal ID0
+signal ID1
+signal CPA_B
+signal DT0A
+signal DT0B
+signal DR0A
+signal DR0B
+signal TCLK0
+signal RCLK0
+signal TFS0
+signal RFS0
+signal DT1A
+signal DT1B
+signal DR1A
+signal DR1B
+signal TCLK1
+signal RCLK1
+signal TFS1
+signal RFS1
+signal BSEL
+signal BMS_B
+signal CLKIN
+signal RESET_B
+signal TCK
+signal TMS
+signal TDI
+signal TDO
+signal TRST
+signal EMU
+signal BMSTR
+signal SDWE_B
+signal SDA10
+signal CAS_B
+signal RAS_B
+signal DQM
+signal SDCKE
+signal SDCLK0
+signal SDCLK1
+signal PWM_EVENT0
+signal PWM_EVENT1
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+
+register	BSR	285
+register	BR	1
+register	DIR	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+
+bit 284 O 1 EMU 278 0 Z
+bit 283 I 1 ID0
+bit 282 I 1 ID1
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 C 0 *
+bit 277 C 0 *
+bit 276 I 1 FLAG4
+bit 275 O 1 FLAG4 277 0 Z
+bit 274 I 1 FLAG5
+bit 273 O 1 FLAG5 270 0 Z
+bit 272 I 1 FLAG6
+bit 271 O 1 FLAG6 269 0 Z
+bit 270 C 0 *
+bit 269 C 0 *
+bit 268 C 0 *
+bit 267 I 1 FLAG7
+bit 266 O 1 FLAG7 268 0 Z
+bit 265 I 1 DATA31
+bit 264 O 1 DATA31 243 0 Z
+bit 263 I 1 DATA30
+bit 262 O 1 DATA30 243 0 Z
+bit 261 I 1 DATA29
+bit 260 O 1 DATA29 243 0 Z
+bit 259 I 1 DATA28
+bit 258 O 1 DATA28 243 0 Z
+bit 257 I 1 DATA27
+bit 256 O 1 DATA27 243 0 Z
+bit 255 I 1 DATA26
+bit 254 O 1 DATA26 243 0 Z
+bit 253 I 1 DATA25
+bit 252 O 1 DATA25 243 0 Z
+bit 251 I 1 DATA24
+bit 250 O 1 DATA24 243 0 Z
+bit 249 I 1 DATA23
+bit 248 O 1 DATA23 243 0 Z
+bit 247 I 1 DATA22
+bit 246 O 1 DATA22 243 0 Z
+bit 245 I 1 DATA21
+bit 244 O 1 DATA21 243 0 Z
+bit 243 C 0 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 DATA20
+bit 238 O 1 DATA20 243 0 Z
+bit 237 I 1 DATA19
+bit 236 O 1 DATA19 243 0 Z
+bit 235 I 1 DATA18
+bit 234 O 1 DATA18 243 0 Z
+bit 233 I 1 DATA17
+bit 232 O 1 DATA17 243 0 Z
+bit 231 I 1 DATA16
+bit 230 O 1 DATA16 243 0 Z
+bit 229 I 1 DATA15
+bit 228 O 1 DATA15 243 0 Z
+bit 227 I 1 DATA14
+bit 226 O 1 DATA14 243 0 Z
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 DATA13
+bit 218 O 1 DATA13 209 0 Z
+bit 217 I 1 DATA12
+bit 216 O 1 DATA12 209 0 Z
+bit 215 I 1 DATA11
+bit 214 O 1 DATA11 209 0 Z
+bit 213 I 1 DATA10
+bit 212 O 1 DATA10 209 0 Z
+bit 211 I 1 DATA9
+bit 210 O 1 DATA9 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 DATA8
+bit 207 O 1 DATA8 209 0 Z
+bit 206 I 1 DATA7
+bit 205 O 1 DATA7 209 0 Z
+bit 204 I 1 DATA6
+bit 203 O 1 DATA6 209 0 Z
+bit 202 I 1 DATA5
+bit 201 O 1 DATA5 209 0 Z
+bit 200 I 1 DATA4
+bit 199 O 1 DATA4 209 0 Z
+bit 198 I 1 DATA3
+bit 197 O 1 DATA3 209 0 Z
+bit 196 I 1 DATA2
+bit 195 O 1 DATA2 209 0 Z
+bit 194 I 1 DATA1
+bit 193 O 1 DATA1 209 0 Z
+bit 192 I 1 DATA0
+bit 191 O 1 DATA0 209 0 Z
+bit 190 C 0 *
+bit 189 I 1 FLAG8
+bit 188 O 1 FLAG8 190 0 Z
+bit 187 I 1 FLAG9
+bit 186 O 1 FLAG9 183 0 Z
+bit 185 I 1 FLAG10
+bit 184 O 1 FLAG10 182 0 Z
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 I 1 FLAG11
+bit 179 O 1 FLAG11 181 0 Z
+bit 178 I 1 MS3
+bit 177 O 1 MS3 153 0 Z
+bit 176 I 1 MS2
+bit 175 O 1 MS2 153 0 Z
+bit 174 I 1 MS1
+bit 173 O 1 MS1 153 0 Z
+bit 172 I 1 MS0
+bit 171 O 1 MS0 153 0 Z
+bit 170 I 1 ACK
+bit 169 O 1 ACK 167 0 Z
+bit 168 O 1 *
+bit 167 C 0 *
+bit 166 I 1 CPA_B
+bit 165 O 1 CPA_B 165 1 Z
+bit 164 I 1 SW_B
+bit 163 O 1 SW_B 153 0 Z
+bit 162 O 1 REDY 161 0 Z
+bit 161 C 0 *
+bit 160 I 1 RD_B
+bit 159 O 1 RD_B 153 0 Z
+bit 158 I 1 WR_B
+bit 157 O 1 WR_B 153 0 Z
+bit 156 O 1 *
+bit 155 I 1 TS_B
+bit 154 I 1 CS_B
+bit 153 C 0 *
+bit 152 O 1 BMSTR
+bit 151 I 1 HBG_B
+bit 150 O 1 HBG_B 147 0 Z
+bit 149 O 1 DMAG2_B 153 0 Z
+bit 148 O 1 DMAG1_B 153 0 Z
+bit 147 C 0 *
+bit 146 O 1 SDA10 131 0 Z
+bit 145 I 1 SDCKE
+bit 144 O 1 SDCKE 131 0 Z
+bit 143 O 1 DQM 131 0 Z
+bit 142 I 1 SDWE_B
+bit 141 O 1 SDWE_B 131 0 Z
+bit 140 I 1 CAS_B
+bit 139 O 1 CAS_B 131 0 Z
+bit 138 I 1 RAS_B
+bit 137 O 1 RAS_B 131 0 Z
+bit 136 I 1 HBR_B
+bit 135 I 1 DMAR2_B
+bit 134 I 1 DMAR1_B
+bit 133 I 1 SDCLK0
+bit 132 O 1 SDCLK0 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 SDCLK1
+bit 129 O 1 SDCLK1 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 CLKIN
+bit 126 I 1 BR2
+bit 125 O 1 BR2 120 0 Z
+bit 124 I 1 BR1
+bit 123 O 1 BR1 119 0 Z
+bit 122 I 1 PWM_EVENT0
+bit 121 O 1 PWM_EVENT0 118 0 Z
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 I 1 PWM_EVENT1
+bit 115 O 1 PWM_EVENT1 117 0 Z
+bit 114 O 1 DT1B 112 0 Z
+bit 113 O 1 DT1A 111 0 Z
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 I 1 TCLK1
+bit 108 O 1 TCLK1 110 0 Z
+bit 107 I 1 TFS1
+bit 106 O 1 TFS1 101 0 Z
+bit 105 I 1 DR1B
+bit 104 I 1 DR1A
+bit 103 I 1 RCLK1
+bit 102 O 1 RCLK1 100 0 Z
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 I 1 RFS1
+bit 97 O 1 RFS1 99 0 Z
+bit 96 O 1 DT0B 94 0 Z
+bit 95 O 1 DT0A 93 0 Z
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 I 1 TCLK0
+bit 90 O 1 TCLK0 92 0 Z
+bit 89 I 1 TFS0
+bit 88 O 1 TFS0 83 0 Z
+bit 87 I 1 DR0B
+bit 86 I 1 DR0A
+bit 85 I 1 RCLK0
+bit 84 O 1 RCLK0 82 0 Z
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 I 1 RFS0
+bit 79 O 1 RFS0 81 0 Z
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 I 1 IRQ2_B
+bit 74 I 1 IRQ1_B
+bit 73 I 1 IRQ0_B
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 I 1 FLAG3
+bit 65 O 1 FLAG3 64 0 Z
+bit 64 C 0 *
+bit 63 C 0 *
+bit 62 I 1 FLAG2
+bit 61 O 1 FLAG2 63 0 Z
+bit 60 I 1 FLAG1
+bit 59 O 1 FLAG1 56 0 Z
+bit 58 I 1 FLAG0
+bit 57 O 1 FLAG0 55 0 Z
+bit 56 C 0 *
+bit 55 C 0 *
+bit 54 I 1 ADDR0
+bit 53 O 1 ADDR0 36 0 Z
+bit 52 I 1 ADDR1
+bit 51 O 1 ADDR1 36 0 Z
+bit 50 I 1 ADDR2
+bit 49 O 1 ADDR2 36 0 Z
+bit 48 I 1 ADDR3
+bit 47 O 1 ADDR3 36 0 Z
+bit 46 I 1 ADDR4
+bit 45 O 1 ADDR4 36 0 Z
+bit 44 I 1 ADDR5
+bit 43 O 1 ADDR5 36 0 Z
+bit 42 I 1 ADDR6
+bit 41 O 1 ADDR6 36 0 Z
+bit 40 I 1 ADDR7
+bit 39 O 1 ADDR7 36 0 Z
+bit 38 I 1 ADDR8
+bit 37 O 1 ADDR8 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 ADDR9
+bit 34 O 1 ADDR9 36 0 Z
+bit 33 I 1 ADDR10
+bit 32 O 1 ADDR10 36 0 Z
+bit 31 I 1 ADDR11
+bit 30 O 1 ADDR11 36 0 Z
+bit 29 I 1 ADDR12
+bit 28 O 1 ADDR12 36 0 Z
+bit 27 I 1 ADDR13
+bit 26 O 1 ADDR13 36 0 Z
+bit 25 I 1 ADDR14
+bit 24 O 1 ADDR14 36 0 Z
+bit 23 I 1 ADDR15
+bit 22 O 1 ADDR15 36 0 Z
+bit 21 I 1 ADDR16
+bit 20 O 1 ADDR16 36 0 Z
+bit 19 I 1 ADDR17
+bit 18 O 1 ADDR17 36 0 Z
+bit 17 I 1 ADDR18
+bit 16 O 1 ADDR18 36 0 Z
+bit 15 I 1 ADDR19
+bit 14 O 1 ADDR19 36 0 Z
+bit 13 I 1 ADDR20
+bit 12 O 1 ADDR20 36 0 Z
+bit 11 I 1 ADDR21
+bit 10 O 1 ADDR21 36 0 Z
+bit 9 I 1 ADDR22
+bit 8 O 1 ADDR22 36 0 Z
+bit 7 I 1 ADDR23
+bit 6 O 1 ADDR23 36 0 Z
+bit 5 I 1 RESET_B
+bit 4 C 0 *
+bit 3 O 1 *
+bit 2 I 1 BMS_B
+bit 1 O 1 BMS_B 4 0 Z
+bit 0 I 1 BSEL
+
+initbus SHARC_21065L
--- a/sie_fs/usr/local/share/urjtag/atheros/ar2312/ar2312
+++ b/sie_fs/usr/local/share/urjtag/atheros/ar2312/ar2312
@@ -0,0 +1,50 @@
+#
+# $Id$
+#
+# JTAG declarations for Atheros AR2312
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register	BR		 1
+register	BSR		 1
+register	DIR		32
+register	EJIMPCODE	32
+register	EJADDRESS	32
+register	EJDATA		32
+register	EJCONTROL	32
+register	EJALL		96
+register	EJFASTDATA	33
+
+instruction length 5
+
+instruction	BYPASS		11111	BR
+instruction	SAMPLE/PRELOAD	00010	BSR
+instruction	IDCODE		00001	DIR
+instruction	EJTAG_IMPCODE	00011	EJIMPCODE
+instruction	EJTAG_ADDRESS	01000	EJADDRESS
+instruction	EJTAG_DATA	01001	EJDATA
+instruction	EJTAG_CONTROL	01010	EJCONTROL
+instruction	EJTAG_ALL	01011	EJALL
+instruction	EJTAGBOOT	01100	BR
+instruction	NORMALBOOT	01101	BR
+instruction	EJTAG_FASTDATA	01110	EJFASTDATA
+
+initbus ejtag
+endian big
--- a/sie_fs/usr/local/share/urjtag/atmel/PARTS
+++ b/sie_fs/usr/local/share/urjtag/atmel/PARTS
@@ -0,0 +1,41 @@
+#
+# $Id: PARTS 719 2007-11-07 08:10:32Z kawk $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+#     128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+# [2] Atmel Corporation,  1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and
+#     ATF1504ASV/ASVL
+#
+
+# bits 27-12 of the Device Identification Register
+1001011100000010	atmega128	ATmega128	# see Table 100 in [1]
+0101101100000110	at91sam7s64	AT91SAM7S64
+0101101100000111	at91sam7s32	AT91SAM7S32
+0101101100001001	at91sam7s256	AT91SAM7S256
+0101101100001010	at91sam7s128	AT91SAM7S128
+0101101100001100	at91sam7s321	AT91SAM7S321
+0001010100010100	atf15xx		ATF1504ASV	# see 1504ASV_J44.bsd
+							# in [2]
+
--- a/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/STEPPINGS
@@ -0,0 +1,30 @@
+#
+# $Id: STEPPINGS,v 1.1 2002/08/23 14:08:33 telka Exp $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+#     128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0000	at91sam7s_tq64v0	0
--- a/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/at91sam7s_tq48v0
+++ b/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/at91sam7s_tq48v0
@@ -0,0 +1,138 @@
+signal erase
+signal icetck
+signal icetdi
+signal icetms
+signal jtagsel
+signal selv32
+signal test
+signal nrst
+signal pa0
+signal pa1
+signal pa10
+signal pa11
+signal pa12
+signal pa13
+signal pa14
+signal pa15
+signal pa16
+signal pa17
+signal pa18
+signal pa19
+signal pa2
+signal pa20
+signal pa3
+signal pa4
+signal pa5
+signal pa6
+signal pa7
+signal pa8
+signal pa9
+
+register	BSR	97
+register	BR	1
+register	DIR	32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- a/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/at91sam7s_tq64v0
+++ b/sie_fs/usr/local/share/urjtag/atmel/at91sam7s256/at91sam7s_tq64v0
@@ -0,0 +1,138 @@
+signal erase 55
+signal icetck 53
+signal icetdi 33
+signal icetms 51
+signal jtagsel 50
+signal selv32 61
+signal test 40
+signal nrst 39
+signal pa0 48
+signal pa1 47
+signal pa10 29
+signal pa11 28
+signal pa12 27
+signal pa13 22
+signal pa14 21
+signal pa15 20
+signal pa16 19
+signal pa17 9
+signal pa18 10
+signal pa19 13
+signal pa2 44
+signal pa20 16
+signal pa3 43
+signal pa4 36
+signal pa5 35
+signal pa6 34
+signal pa7 32
+signal pa8 31
+signal pa9 30
+
+register	BSR	97
+register	BR	1
+register	DIR	32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 001 BSR
+instruction IDCODE 010 DIR
+
+bit 96 I 1 pa17
+bit 95 O 1 pa17 94 1 Z
+bit 94 C 1 *
+bit 93 I 1 pa18
+bit 92 O 1 pa18 91 1 Z
+bit 91 C 1 *
+bit 90 O 1 *
+bit 89 O 1 *
+bit 88 O 1 *
+bit 87 I 1 pa19
+bit 86 O 1 pa19 85 1 Z
+bit 85 C 1 *
+bit 84 I 1 pa20
+bit 83 O 1 pa20 82 1 Z
+bit 82 C 1 *
+bit 81 I 1 pa16
+bit 80 O 1 pa16 79 1 Z
+bit 79 C 1 *
+bit 78 I 1 pa15
+bit 77 O 1 pa15 76 1 Z
+bit 76 C 1 *
+bit 75 I 1 pa14
+bit 74 O 1 pa14 73 1 Z
+bit 73 C 1 *
+bit 72 I 1 pa13
+bit 71 O 1 pa13 70 1 Z
+bit 70 C 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 O 1 *
+bit 65 O 1 *
+bit 64 O 1 *
+bit 63 O 1 *
+bit 62 O 1 *
+bit 61 O 1 *
+bit 60 I 1 pa12
+bit 59 O 1 pa12 58 1 Z
+bit 58 C 1 *
+bit 57 I 1 pa11
+bit 56 O 1 pa11 55 1 Z
+bit 55 C 1 *
+bit 54 I 1 pa10
+bit 53 O 1 pa10 52 1 Z
+bit 52 C 1 *
+bit 51 I 1 pa9
+bit 50 O 1 pa9 49 1 Z
+bit 49 C 1 *
+bit 48 I 1 pa8
+bit 47 O 1 pa8 46 1 Z
+bit 46 C 1 *
+bit 45 I 1 pa7
+bit 44 O 1 pa7 43 1 Z
+bit 43 C 1 *
+bit 42 I 1 pa6
+bit 41 O 1 pa6 40 1 Z
+bit 40 C 1 *
+bit 39 I 1 pa5
+bit 38 O 1 pa5 37 1 Z
+bit 37 C 1 *
+bit 36 I 1 pa4
+bit 35 O 1 pa4 34 1 Z
+bit 34 C 1 *
+bit 33 O 1 *
+bit 32 O 1 *
+bit 31 O 1 *
+bit 30 O 1 *
+bit 29 O 1 *
+bit 28 O 1 *
+bit 27 O 1 *
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 O 1 *
+bit 23 O 1 *
+bit 22 O 1 *
+bit 21 I 1 pa3
+bit 20 O 1 pa3 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 pa2
+bit 17 O 1 pa2 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 pa1
+bit 14 O 1 pa1 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 pa0
+bit 11 O 1 pa0 10 1 Z
+bit 10 C 1 *
+bit 9 O 1 *
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 O 1 *
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 erase
--- a/sie_fs/usr/local/share/urjtag/atmel/atf15xx/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/atmel/atf15xx/STEPPINGS
@@ -0,0 +1,30 @@
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+# Modified by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+#
+# Documentation:
+# [1] Atmel Corporation,  1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and 
+#     ATF1504ASV/ASVL
+#
+
+# bits 31-28 of the Device Identification Register
+0000	atf1504asv	A
--- a/sie_fs/usr/local/share/urjtag/atmel/atf15xx/atf1504asv
+++ b/sie_fs/usr/local/share/urjtag/atmel/atf15xx/atf1504asv
@@ -0,0 +1,275 @@
+#
+# $Id: STEPPINGS 20 2005-05-24 02:39:42Z philwil $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Generated by Stefan Pledl <stefan.pledl@mesutronic.de>, 2007
+# with bsdl2jtag
+#
+# Documentation:
+# [1] Atmel Corporation,  1504BSDL.ZIP - BSDL files for ATF1504AS/ASL and 
+#     ATF1504ASV/ASVL
+#
+
+signal IO4
+signal IO5
+signal IO6
+signal IO8
+signal IO9
+signal IO11
+signal IO12
+signal IO14
+signal IO16
+signal IO17
+signal IO18
+signal IO19
+signal IO20
+signal IO21
+signal IO24
+signal IO25
+signal IO26
+signal IO27
+signal IO28
+signal IO29
+signal IO31
+signal IO33
+signal IO34
+signal IO36
+signal IO37
+signal IO39
+signal IO40
+signal IO41
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal DIN1
+signal DIN2
+signal DIN3
+signal DIN4
+signal VCC1
+signal VCC2
+signal VCC3
+signal VCC4
+signal GND1
+signal GND2
+signal GND3
+
+register	BSR	192
+register	BR	1
+register	DIR	32
+
+instruction length 10
+
+instruction EXTEST 0000000000 BSR
+instruction BYPASS 1111111111 BR
+instruction SAMPLE/PRELOAD 0001010101 BSR
+instruction IDCODE 0001011001 DIR
+
+bit 191 O 1 IO4 190 0 Z
+bit 190 C 0 *
+bit 189 O 1 *
+bit 188 O 0 *
+bit 187 O 1 IO5 186 0 Z
+bit 186 C 0 *
+bit 185 O 1 *
+bit 184 O 0 *
+bit 183 O 1 *
+bit 182 O 0 *
+bit 181 O 1 IO6 180 0 Z
+bit 180 C 0 *
+bit 179 O 1 *
+bit 178 O 0 *
+bit 177 O 1 *
+bit 176 O 0 *
+bit 175 O 1 *
+bit 174 O 0 *
+bit 173 O 1 *
+bit 172 O 0 *
+bit 171 O 1 *
+bit 170 O 0 *
+bit 169 O 1 IO8 168 0 Z
+bit 168 C 0 *
+bit 167 O 1 IO9 166 0 Z
+bit 166 C 0 *
+bit 165 O 1 IO11 164 0 Z
+bit 164 C 0 *
+bit 163 O 1 *
+bit 162 O 0 *
+bit 161 O 1 IO12 160 0 Z
+bit 160 C 0 *
+bit 159 O 1 *
+bit 158 O 0 *
+bit 157 O 1 *
+bit 156 O 0 *
+bit 155 O 1 IO14 154 0 Z
+bit 154 C 0 *
+bit 153 O 1 *
+bit 152 O 0 *
+bit 151 O 1 *
+bit 150 O 0 *
+bit 149 O 1 *
+bit 148 O 0 *
+bit 147 O 1 *
+bit 146 O 0 *
+bit 145 O 1 IO16 144 0 Z
+bit 144 C 0 *
+bit 143 O 1 IO17 142 0 Z
+bit 142 C 0 *
+bit 141 O 1 *
+bit 140 O 0 *
+bit 139 O 1 *
+bit 138 O 0 *
+bit 137 O 1 IO18 136 0 Z
+bit 136 C 0 *
+bit 135 O 1 IO19 134 0 Z
+bit 134 C 0 *
+bit 133 O 1 IO20 132 0 Z
+bit 132 C 0 *
+bit 131 O 1 *
+bit 130 O 0 *
+bit 129 O 1 IO21 128 0 Z
+bit 128 C 0 *
+bit 127 O 1 IO24 126 0 Z
+bit 126 C 0 *
+bit 125 O 1 *
+bit 124 O 0 *
+bit 123 O 1 IO25 122 0 Z
+bit 122 C 0 *
+bit 121 O 1 IO26 120 0 Z
+bit 120 C 0 *
+bit 119 O 1 IO27 118 0 Z
+bit 118 C 0 *
+bit 117 O 1 *
+bit 116 O 0 *
+bit 115 O 1 *
+bit 114 O 0 *
+bit 113 O 1 IO28 112 0 Z
+bit 112 C 0 *
+bit 111 O 1 IO29 110 0 Z
+bit 110 C 0 *
+bit 109 O 1 *
+bit 108 O 0 *
+bit 107 O 1 *
+bit 106 O 0 *
+bit 105 O 1 *
+bit 104 O 0 *
+bit 103 O 1 *
+bit 102 O 0 *
+bit 101 O 1 IO31 100 0 Z
+bit 100 C 0 *
+bit 99 O 1 *
+bit 98 O 0 *
+bit 97 O 1 *
+bit 96 O 0 *
+bit 95 O 1 IO33 94 0 Z
+bit 94 C 0 *
+bit 93 O 1 *
+bit 92 O 0 *
+bit 91 O 1 IO34 90 0 Z
+bit 90 C 0 *
+bit 89 O 1 IO36 88 0 Z
+bit 88 C 0 *
+bit 87 O 1 IO37 86 0 Z
+bit 86 C 0 *
+bit 85 O 1 *
+bit 84 O 0 *
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 0 *
+bit 79 O 1 IO39 78 0 Z
+bit 78 C 0 *
+bit 77 O 1 *
+bit 76 O 0 *
+bit 75 O 1 *
+bit 74 O 0 *
+bit 73 O 1 *
+bit 72 O 0 *
+bit 71 O 1 *
+bit 70 O 0 *
+bit 69 O 1 IO40 68 0 Z
+bit 68 C 0 *
+bit 67 O 1 *
+bit 66 O 0 *
+bit 65 O 1 IO41 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 DIN1
+bit 62 I 1 DIN2
+bit 61 I 1 IO4
+bit 60 O 1 *
+bit 59 I 1 IO5
+bit 58 O 1 *
+bit 57 O 1 *
+bit 56 I 1 IO6
+bit 55 O 1 *
+bit 54 O 1 *
+bit 53 O 1 *
+bit 52 O 1 *
+bit 51 I 1 IO8
+bit 50 I 1 IO9
+bit 49 I 1 IO11
+bit 48 O 1 *
+bit 47 I 1 IO12
+bit 46 O 1 *
+bit 45 I 1 IO14
+bit 44 O 1 *
+bit 43 O 1 *
+bit 42 O 1 *
+bit 41 O 1 *
+bit 40 I 1 IO16
+bit 39 I 1 IO17
+bit 38 O 1 *
+bit 37 O 1 *
+bit 36 I 1 IO18
+bit 35 I 1 IO19
+bit 34 I 1 IO20
+bit 33 O 1 *
+bit 32 I 1 IO21
+bit 31 I 1 IO24
+bit 30 O 1 *
+bit 29 I 1 IO25
+bit 28 I 1 IO26
+bit 27 I 1 IO27
+bit 26 O 1 *
+bit 25 O 1 *
+bit 24 I 1 IO28
+bit 23 I 1 IO29
+bit 22 O 1 *
+bit 21 O 1 *
+bit 20 O 1 *
+bit 19 O 1 *
+bit 18 I 1 IO31
+bit 17 O 1 *
+bit 16 I 1 IO33
+bit 15 O 1 *
+bit 14 I 1 IO34
+bit 13 I 1 IO36
+bit 12 I 1 IO37
+bit 11 O 1 *
+bit 10 O 1 *
+bit 9 I 1 IO39
+bit 8 O 1 *
+bit 7 O 1 *
+bit 6 O 1 *
+bit 5 O 1 *
+bit 4 I 1 IO40
+bit 3 O 1 *
+bit 2 I 1 IO41
+bit 1 I 1 DIN3
+bit 0 I 1 DIN4
--- a/sie_fs/usr/local/share/urjtag/atmel/atmega128/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/atmel/atmega128/STEPPINGS
@@ -0,0 +1,32 @@
+#
+# $Id: STEPPINGS 103 2002-08-23 14:08:33Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+#     128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# bits 31-28 of the Device Identification Register
+# see Table 99 in [1]
+0011	atmega128	C
+0101	atmega128	F
+0110	atmega128	G
--- a/sie_fs/usr/local/share/urjtag/atmel/atmega128/atmega128
+++ b/sie_fs/usr/local/share/urjtag/atmel/atmega128/atmega128
@@ -0,0 +1,59 @@
+#
+# $Id: atmega128 244 2002-10-31 19:44:58Z telka $
+#
+# JTAG declarations for ATmega128
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Atmel Corporation, "ATmega128(L) - 8-bit AVR Microcontroller with
+#     128K Bytes In-System Programmable Flash", 2002, Rev. 2467E-AVR-05/02
+#
+
+# mandatory data registers
+register	BSR	205	# see Table 106 in [1]
+register	BR	1
+# optional data registers
+register	DIR	32
+# user-defined registers
+register	RR	1	# Reset Register
+register	PER	16	# Programming Enable Register
+register	PCR	15	# Programming Command Register
+register	VFPLR	2048	# Virtual Flash Page Load Register
+register	VFPRR	2056	# Virtual Flash Page Read Register
+
+# see page 250 in [1]
+instruction length 4
+# mandatory instructions
+instruction EXTEST		0000	BSR	# see page 250 in [1]
+instruction SAMPLE/PRELOAD	0010	BSR	# see page 251 in [1]
+instruction BYPASS		1111	BR	# see page 251 in [1]
+# optional instructions
+instruction IDCODE		0001	DIR	# see page 250 in [1]
+# user-defined instructions
+instruction AVR_RESET		1100	RR	# see page 251 and page 303 in [1]
+# unknown data registers for PRIVATE? instructions
+#instruction PRIVATE0		1000	# see page 246 in [1]
+#instruction PRIVATE1		1001	# see page 246 in [1]
+#instruction PRIVATE2		1010	# see page 246 in [1]
+#instruction PRIVATE3		1011	# see page 246 in [1]
+instruction PROG_ENABLE		0100	PER	# see page 303 in [1]
+instruction PROG_COMMANDS	0101	PCR	# see page 304 in [1]
+instruction PROG_PAGELOAD	0110	VFPLR	# see page 304 in [1]
+instruction PROG_PAGEREAD	0111	VFPRR	# see page 304 in [1]
--- a/sie_fs/usr/local/share/urjtag/brecis/PARTS
+++ b/sie_fs/usr/local/share/urjtag/brecis/PARTS
@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 27-12 of the Device Identification Register
+0000001000000010	msp2006		MSP2006
--- a/sie_fs/usr/local/share/urjtag/brecis/msp2006/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/brecis/msp2006/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0001	msp2006		1
--- a/sie_fs/usr/local/share/urjtag/brecis/msp2006/msp2006
+++ b/sie_fs/usr/local/share/urjtag/brecis/msp2006/msp2006
@@ -0,0 +1,29 @@
+#
+# $Id$
+
+register	BR		 1
+register	BSR		 1
+register	DIR		32
+register	EJIMPCODE	32
+register	EJADDRESS	32
+register	EJDATA		32
+register	EJCONTROL	32
+register	EJALL		96
+register	EJFASTDATA	33
+
+instruction length 5
+
+instruction	BYPASS		11111	BR
+instruction	SAMPLE/PRELOAD	00010	BSR
+instruction	IDCODE		00001	DIR
+instruction	EJTAG_IMPCODE	00011	EJIMPCODE
+instruction	EJTAG_ADDRESS	01000	EJADDRESS
+instruction	EJTAG_DATA	01001	EJDATA
+instruction	EJTAG_CONTROL	01010	EJCONTROL
+instruction	EJTAG_ALL	01011	EJALL
+instruction	EJTAGBOOT	01100	BR
+instruction	NORMALBOOT	01101	BR
+instruction	EJTAG_FASTDATA	01110	EJFASTDATA
+
+initbus ejtag
+endian big
--- a/sie_fs/usr/local/share/urjtag/broadcom/PARTS
+++ b/sie_fs/usr/local/share/urjtag/broadcom/PARTS
@@ -0,0 +1,28 @@
+#
+# $Id: PARTS 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001001001010000	bcm1250		BCM1250
+0011001100010000	bcm3310		BCM3310
+0101010000100001	bcm5421s	BCM5421S
+0100011100010010	bcm4712		BCM4712
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm1250/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm1250/STEPPINGS
@@ -0,0 +1,26 @@
+#
+# $Id: STEPPINGS 380 2003-02-25 08:26:15Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0011	bcm1250		Ver 3
+1011	bcm1250		Ver 11
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm1250/bcm1250
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm1250/bcm1250
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm3310/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm3310/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 493 2003-07-25 09:41:19Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bcm3310		0
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm3310/bcm3310
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm3310/bcm3310
@@ -0,0 +1,37 @@
+#
+# $Id: bcm3310 493 2003-07-25 09:41:19Z telka $
+#
+# JTAG declarations for Broadcom BCM3310
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# mandatory data registers
+register	BSR	397
+register	BR	1
+# optional data registers
+register	DIR	32
+
+instruction length 5
+# mandatory instructions
+instruction EXTEST		00000	BSR	# TODO: EXTEST instruction value not verified
+instruction SAMPLE/PRELOAD	00010	BSR	# TODO: SAMPLE/PRELOAD instruction value not verified
+instruction BYPASS		11111	BR
+# optional instructions
+instruction IDCODE		00001	DIR	# TODO: IDCODE instruction value not verified
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm4712/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm4712/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 599 2004-06-13 18:16:43Z telka $
+#
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# bits 31-28 of the Device Identification Register
+0001	bcm4712		Ver 1
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm4712/bcm4712
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm4712/bcm4712
@@ -0,0 +1,39 @@
+#
+# $Id: bcm4712 599 2004-06-13 18:16:43Z telka $
+#
+# JTAG declarations for Broadcom BCM4712
+# Copyright (C) 2004 Alan Wallace <aww@adelphia.net>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Alan Wallace <aww@adelphia.net>, 2004.
+#
+
+# mandatory data registers
+register	BSR	594
+register	BR	1
+
+# optional data registers
+register	DIR	32
+
+instruction length 8
+# mandatory instructions
+instruction EXTEST		00000000	BSR
+instruction SAMPLE/PRELOAD	00000010	BSR
+instruction BYPASS		11111111	BR
+
+# optional instructions
+instruction IDCODE		00000001	DIR
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm5421s/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm5421s/STEPPINGS
@@ -0,0 +1,24 @@
+#
+# $Id: STEPPINGS 442 2003-05-26 09:04:38Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+0001	bcm5421s	V1
--- a/sie_fs/usr/local/share/urjtag/broadcom/bcm5421s/bcm5421s
+++ b/sie_fs/usr/local/share/urjtag/broadcom/bcm5421s/bcm5421s
@@ -0,0 +1,328 @@
+#
+# $Id: bcm5421s 505 2003-08-13 09:37:19Z telka $
+#
+# JTAG declarations for BCM5421S
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+signal PAD_gtx_clk
+signal PAD_txd10
+signal PAD_txd11
+signal PAD_txd12
+signal PAD_txd13
+signal PAD_txd14
+signal PAD_txd15
+signal PAD_txd16
+signal PAD_txd17
+signal PAD_tx_en
+signal PAD_tx_er
+signal PAD_clk125
+signal PAD_col
+signal PAD_crs
+signal PAD_rbc0
+signal PAD_rbc1
+signal PAD_rxc
+signal PAD_rxd10
+signal PAD_rxd11
+signal PAD_rxd12
+signal PAD_rxd13
+signal PAD_rxd14
+signal PAD_rxd15
+signal PAD_rxd16
+signal PAD_rxd17
+signal PAD_rx_dv
+signal PAD_rx_er
+signal PAD_txc
+signal PAD_bcm5421s_en
+signal PAD_edgerate
+signal PAD_mdc
+signal PAD_ovdd_2_5v_enPAD_reset_n
+signal PAD_reset_n
+signal PAD_tck
+signal PAD_tdi
+signal PAD_test0
+signal PAD_test1
+signal PAD_tms
+signal PAD_tpin0
+signal PAD_tpin1
+signal PAD_tpin2
+signal PAD_tpin3
+signal PAD_tpin4
+signal PAD_tpin5
+signal PAD_tpin6
+signal PAD_tpin7
+signal PAD_tpin8
+signal PAD_trstb
+signal PAD_en10b
+signal PAD_f1000
+signal PAD_fdxled_n
+signal PAD_intr_n
+signal PAD_link_n1
+signal PAD_link_n2
+signal PAD_mdio
+signal PAD_phya0
+signal PAD_phya1
+signal PAD_phya2
+signal PAD_phya3
+signal PAD_phya4
+signal PAD_rcvled_n
+signal PAD_slave_n
+signal PAD_spd0
+signal PAD_xmtled_n
+signal PAD_tdo
+signal PAD_srxdn
+signal PAD_srxdp
+signal PAD_stxdn
+signal PAD_stxdp
+signal PAD_stxcn
+signal PAD_stxcp
+signal PAD_sergnd
+signal PAD_serpllavdd
+signal PAD_serpllavss
+signal PAD_serplldvdd
+signal PAD_serplldvss
+signal PAD_servdd11
+signal PAD_servdd25
+signal PAD_reg_cntl0
+signal PAD_reg_cntl1
+signal PAD_reg_sense1
+signal PAD_reg_sense2
+signal PAD_reg_supply1
+signal PAD_reg_supply2
+signal PAD_trimdac10
+signal PAD_trimdac11
+signal PAD_trimdac12
+signal PAD_trimdac13
+signal PAD_trimhyb10
+signal PAD_trimhyb11
+signal PAD_trimhyb12
+signal PAD_trimhyb13
+signal PAD_trimhpf10
+signal PAD_trimhpf11
+signal PAD_xtali
+signal PAD_xtali2
+signal PAD_xtalo
+signal PAD_xtalo2
+signal PAD_xtalgnd1
+signal PAD_xtalgnd2
+signal PAD_xtalvdd1
+signal PAD_xtalvdd2
+signal PAD_xtalvdd3
+signal PAD_xtalvdd2
+signal PAD_plldgnd
+signal PAD_plldvdd
+signal PAD_pllgnd
+signal PAD_pllvdd
+signal PAD_tvcoi
+signal CORE_VDD
+signal CORE_VSS
+signal OVDD
+signal OGND
+signal PVDD
+signal PAD_rdac1
+signal PAD_extvref1
+signal PAD_bagnd_0
+signal PAD_bavdd_0
+signal PAD_bavdd_1
+signal PAD_rxavdd0_0
+signal PAD_rxavdd1_0
+signal PAD_rxavdd2_0
+signal PAD_rxavdd3_0
+signal PAD_txavdd0_0
+signal PAD_txavdd1_0
+signal PAD_txavdd2_0
+signal PAD_txavdd3_0
+signal PAD_rxagnd0_0
+signal PAD_rxagnd1_0
+signal PAD_rxagnd2_0
+signal PAD_rxagnd3_0
+signal PAD_txagnd0_0
+signal PAD_txagnd1_0
+signal PAD_txagnd2_0
+signal PAD_txagnd3_0
+signal PAD_tdp1_0
+signal PAD_tdn1_0
+signal PAD_tdn1_1
+signal PAD_tdp1_1
+signal PAD_tdp1_2
+signal PAD_tdn1_2
+signal PAD_tdn1_3
+
+register	BSR	150
+register	BR	1
+register	DIR	32
+
+instruction length 3
+
+instruction BYPASS 111 BR
+instruction EXTEST 000 BSR
+instruction SAMPLE/PRELOAD 010 BSR
+instruction IDCODE 101 DIR
+
+bit 149 I 1 PAD_rxd13
+bit 148 O 1 PAD_rxd13 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PAD_rxd12
+bit 145 O 1 PAD_rxd12 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PAD_rxd11
+bit 142 O 1 PAD_rxd11 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 PAD_rxd10
+bit 139 O 1 PAD_rxd10 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PAD_col
+bit 136 O 1 PAD_col 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 PAD_crs
+bit 133 O 1 PAD_crs 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 PAD_clk125
+bit 130 O 1 PAD_clk125 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 PAD_reset_n
+bit 127 I 1 PAD_mdc
+bit 126 I 1 PAD_mdio
+bit 125 O 1 PAD_mdio 124 1 Z
+bit 124 C 1 *
+bit 123 I 1 PAD_tpin8
+bit 122 I 1 PAD_en10b
+bit 121 O 1 PAD_en10b 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PAD_f1000
+bit 118 O 1 PAD_f1000 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 PAD_spd0
+bit 115 O 1 PAD_spd0 114 1 Z
+bit 114 C 1 *
+bit 113 O 1 *
+bit 112 O 1 *
+bit 111 I 1 PAD_phya4
+bit 110 O 1 PAD_phya4 109 1 Z
+bit 109 C 1 *
+bit 108 I 1 PAD_phya3
+bit 107 O 1 PAD_phya3 106 1 Z
+bit 106 C 1 *
+bit 105 I 1 PAD_phya2
+bit 104 O 1 PAD_phya2 103 1 Z
+bit 103 C 1 *
+bit 102 I 1 PAD_phya1
+bit 101 O 1 PAD_phya1 100 1 Z
+bit 100 C 1 *
+bit 99 I 1 PAD_phya0
+bit 98 O 1 PAD_phya0 97 1 Z
+bit 97 C 1 *
+bit 96 I 1 PAD_test1
+bit 95 I 1 PAD_test0
+bit 94 I 1 PAD_xmtled_n
+bit 93 O 1 PAD_xmtled_n 92 1 Z
+bit 92 C 1 *
+bit 91 I 1 PAD_rcvled_n
+bit 90 O 1 PAD_rcvled_n 89 1 Z
+bit 89 C 1 *
+bit 88 I 1 PAD_link_n2
+bit 87 O 1 PAD_link_n2 86 1 Z
+bit 86 C 1 *
+bit 85 I 1 PAD_link_n1
+bit 84 O 1 PAD_link_n1 83 1 Z
+bit 83 C 1 *
+bit 82 I 1 PAD_fdxled_n
+bit 81 O 1 PAD_fdxled_n 80 1 Z
+bit 80 C 1 *
+bit 79 I 1 PAD_slave_n
+bit 78 O 1 PAD_slave_n 77 1 Z
+bit 77 C 1 *
+bit 76 I 1 PAD_intr_n
+bit 75 O 1 PAD_intr_n 74 1 Z
+bit 74 C 1 *
+bit 73 I 1 PAD_tpin0
+bit 72 I 1 PAD_tpin1
+bit 71 I 1 PAD_tpin2
+bit 70 I 1 PAD_tpin3
+bit 69 I 1 PAD_tpin4
+bit 68 I 1 PAD_tpin5
+bit 67 O 1 PAD_tpin5 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 PAD_tpin6
+bit 64 I 1 PAD_tpin7
+bit 63 I 1 PAD_txc
+bit 62 O 1 PAD_txc 61 1 Z
+bit 61 C 1 *
+bit 60 I 1 PAD_txd10
+bit 59 O 1 *
+bit 58 C 1 *
+bit 57 I 1 PAD_txd11
+bit 56 O 1 *
+bit 55 C 1 *
+bit 54 I 1 PAD_txd12
+bit 53 O 1 *
+bit 52 C 1 *
+bit 51 I 1 PAD_txd13
+bit 50 O 1 *
+bit 49 C 1 *
+bit 48 I 1 PAD_txd14
+bit 47 O 1 *
+bit 46 C 1 *
+bit 45 I 1 PAD_txd15
+bit 44 O 1 *
+bit 43 C 1 *
+bit 42 I 1 PAD_txd16
+bit 41 O 1 *
+bit 40 C 1 *
+bit 39 I 1 PAD_txd17
+bit 38 O 1 *
+bit 37 C 1 *
+bit 36 I 1 PAD_tx_er
+bit 35 O 1 *
+bit 34 C 1 *
+bit 33 I 1 PAD_tx_en
+bit 32 O 1 *
+bit 31 C 1 *
+bit 30 I 1 PAD_gtx_clk
+bit 29 O 1 *
+bit 28 C 1 *
+bit 27 I 1 PAD_rbc0
+bit 26 O 1 PAD_rbc0 25 1 Z
+bit 25 C 1 *
+bit 24 I 1 PAD_rbc1
+bit 23 O 1 PAD_rbc1 22 1 Z
+bit 22 C 1 *
+bit 21 I 1 PAD_rxc
+bit 20 O 1 PAD_rxc 19 1 Z
+bit 19 C 1 *
+bit 18 I 1 PAD_rx_er
+bit 17 O 1 PAD_rx_er 16 1 Z
+bit 16 C 1 *
+bit 15 I 1 PAD_rx_dv
+bit 14 O 1 PAD_rx_dv 13 1 Z
+bit 13 C 1 *
+bit 12 I 1 PAD_rxd17
+bit 11 O 1 PAD_rxd17 10 1 Z
+bit 10 C 1 *
+bit 9 I 1 PAD_rxd16
+bit 8 O 1 PAD_rxd16 7 1 Z
+bit 7 C 1 *
+bit 6 I 1 PAD_rxd15
+bit 5 O 1 PAD_rxd15 4 1 Z
+bit 4 C 1 *
+bit 3 I 1 PAD_edgerate
+bit 2 I 1 PAD_rxd14
+bit 1 O 1 PAD_rxd14 0 1 Z
+bit 0 C 1 *
--- a/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_1990
+++ b/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_1990
@@ -0,0 +1,255 @@
+--
+-- $Id: STD_1149_1_1990 943 2008-01-22 21:14:43Z arniml $
+--
+-- Email header accompanying the original Yacc code:
+--   http://www.eda.org/vug_bbs/bsdl.parser
+-- 
+-- -----------------------------------8<--------------------------------------
+-- 
+-- Hello All,
+-- 
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+-- 
+--              bsdl%hpmtlx@hplabs.HP.com
+-- 
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+-- 
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+-- 
+-- Regards,
+-- 
+-- Ken Parker
+-- Hewlett-Packard Company
+-- 
+-- 
+-- *Boundary-Scan Description Language - as documented in:
+-- 
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+-- 
+-- 
+-- - -----------------cut here---------------------------------------------------
+-- 
+-- 
+-- 901004.0721                                  Hewlett-Packard Company
+-- 901016.1049                                  Manufacturing Test Division
+--                                              P.O. Box 301
+--                                              Loveland, Colorado  80537
+--                                              USA
+-- 
+--                                                              October 1990
+-- Hello BSDL Parser Requestor,
+-- 
+--    This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser.  This section of the reply
+-- explains the contents of the rest of this file.
+-- 
+-- This file is composed of seven (7) parts:
+-- 
+--    1) How to use this file
+-- 
+--    2) UNIX* Lex source  (lexicographical tokenizing rules)
+-- 
+--    3) UNIX* Yacc source (BNF-like syntax description)
+-- 
+--    4) A sample main program to recognize BSDL.
+-- 
+--    5) A BSDL description of the Texas Instruments 74bct8374 that is
+--       recognized by the parser, for testing purposes.
+-- 
+--    6) The VHDL package STD_1149_1_1990 needed by this parser.
+-- 
+--    7) [added 901016] Porting experiences to other systems.
+-- 
+-- 
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+--                 processing it via the instructions below.  This will
+--                 allow you to recover from errors, and allow you to
+--                 compare subsequently released data for changes.
+-- 
+-- DISCLAIMERS:
+-- 
+-- 1.  The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+--     therefore no person may represent it as an IEEE standard or imply that
+--     a resulting IEEE standard will be identical to it.
+-- 
+-- 2.  The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+--     well-conceived initiative that is likely to excelerate the creation
+--     of tools that support the 1149.1 standard.  As such, changes and
+--     enhancements will be carefully considered so as not to needlessly
+--     disrupt these development efforts.  The overriding goal is the
+--     ultimate success of the 1149.1 standard.
+-- 
+-- LEGAL NOTICES:
+-- 
+--     Hewlett-Packard Company makes no warranty of any kind with regard to
+--     this information, including, but not limited to, the implied
+--     waranties of merchantability and fitness for a particular purpose.
+-- 
+--     Hewlett-Packard Company shall not be liable for errors contained
+--     herein or direct, indirect, special, incidental, or consequential
+--     damages in connection with the furnishing, performance, or use of
+--     this material.
+-- 
+-- 
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+-- 
+
+--  STD_1149_1_1990    VHDL Package and Package Body in support of 
+--  BSDL Version 0.0
+--
+
+ package STD_1149_1_1990 is             -- Created 900525
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string; 
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO  is record
+   FREQ : real;
+   LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute  TAP_SCAN_IN   : boolean;
+ attribute  TAP_SCAN_OUT  : boolean;
+ attribute  TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute  TAP_SCAN_MODE : boolean;
+ attribute  TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute  INSTRUCTION_LENGTH : integer;
+ attribute  INSTRUCTION_OPCODE : string;
+ attribute  INSTRUCTION_CAPTURE : string;
+ attribute  INSTRUCTION_DISABLE : string;
+ attribute  INSTRUCTION_GUARD : string;
+ attribute  INSTRUCTION_PRIVATE : string;
+ attribute  INSTRUCTION_USAGE : string;
+ attribute  INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER  :  ID_STRING;
+ attribute USERCODE_REGISTER:  ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+                      CONTROL, CONTROLR, OUTPUT2, 
+                      OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+   CT : CELL_TYPE;
+   I  : BSCAN_INST;
+   CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1  : CELL_INFO; 
+ constant BC_2  : CELL_INFO; 
+ constant BC_3  : CELL_INFO; 
+ constant BC_4  : CELL_INFO; 
+ constant BC_5  : CELL_INFO; 
+ constant BC_6  : CELL_INFO; 
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+end STD_1149_1_1990;  -- End of 1149.1-1990 Package
+
+
+package body STD_1149_1_1990 is   -- Standard Boundary Cells  
+                                  -- Written  900525
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2,  EXTEST,  PI),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2,  SAMPLE,  PI),
+  (INPUT,   INTEST,  PI),  (OUTPUT2,  INTEST,  PI),
+  (INPUT,   RUNBIST, PI),  (OUTPUT2,  RUNBIST, PI),
+  (OUTPUT3, EXTEST,  PI),  (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  PI),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, PI),
+  (CONTROL, EXTEST,  PI),  (CONTROLR, EXTEST,  PI),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2, EXTEST,   UPD),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2, SAMPLE,   PI),
+  (INPUT,   INTEST,  UPD),  -- Intest on output2 not supported
+  (INPUT,   RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+  (OUTPUT3, EXTEST,  UPD), (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  UPD),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, UPD),
+  (CONTROL, EXTEST,  UPD), (CONTROLR, EXTEST, UPD),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),    (INTERNAL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),    (INTERNAL, SAMPLE,  PI),
+  (INPUT, INTEST,  PI),    (INTERNAL, INTEST,  PI),
+  (INPUT, RUNBIST, PI),    (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),  -- Intest on input not supported                    
+  (INPUT, SAMPLE,  PI),  -- Runbist on input not supported                    
+  (CLOCK, EXTEST,  PI),   (INTERNAL, EXTEST,  PI),
+  (CLOCK, SAMPLE,  PI),   (INTERNAL, SAMPLE,  PI),
+  (CLOCK, INTEST,  PI),   (INTERNAL, INTEST,  PI),
+  (CLOCK, RUNBIST, PI),   (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),   (CONTROL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),   (CONTROL, SAMPLE,  PI),
+  (INPUT, INTEST,  UPD),  (CONTROL, INTEST,  UPD),
+  (INPUT, RUNBIST, PI),   (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO := 
+ ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  UPD),
+  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
+  (BIDIR_IN, INTEST,  UPD), (BIDIR_OUT, INTEST,  PI),
+  (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+end STD_1149_1_1990;  -- End of 1149.1-1990 Package Body
--- a/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_1994
+++ b/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_1994
@@ -0,0 +1,259 @@
+--
+-- $Id: STD_1149_1_1994 943 2008-01-22 21:14:43Z arniml $
+--
+-- Email header accompanying the original Yacc code:
+--   http://www.eda.org/vug_bbs/bsdl.parser
+-- 
+-- -----------------------------------8<--------------------------------------
+-- 
+-- Hello All,
+-- 
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+-- 
+--              bsdl%hpmtlx@hplabs.HP.com
+-- 
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+-- 
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+-- 
+-- Regards,
+-- 
+-- Ken Parker
+-- Hewlett-Packard Company
+-- 
+-- 
+-- *Boundary-Scan Description Language - as documented in:
+-- 
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+-- 
+-- 
+-- - -----------------cut here---------------------------------------------------
+-- 
+-- 
+-- 901004.0721                                  Hewlett-Packard Company
+-- 901016.1049                                  Manufacturing Test Division
+--                                              P.O. Box 301
+--                                              Loveland, Colorado  80537
+--                                              USA
+-- 
+--                                                              October 1990
+-- Hello BSDL Parser Requestor,
+-- 
+--    This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser.  This section of the reply
+-- explains the contents of the rest of this file.
+-- 
+-- This file is composed of seven (7) parts:
+-- 
+--    1) How to use this file
+-- 
+--    2) UNIX* Lex source  (lexicographical tokenizing rules)
+-- 
+--    3) UNIX* Yacc source (BNF-like syntax description)
+-- 
+--    4) A sample main program to recognize BSDL.
+-- 
+--    5) A BSDL description of the Texas Instruments 74bct8374 that is
+--       recognized by the parser, for testing purposes.
+-- 
+--    6) The VHDL package STD_1149_1_1990 needed by this parser.
+-- 
+--    7) [added 901016] Porting experiences to other systems.
+-- 
+-- 
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+--                 processing it via the instructions below.  This will
+--                 allow you to recover from errors, and allow you to
+--                 compare subsequently released data for changes.
+-- 
+-- DISCLAIMERS:
+-- 
+-- 1.  The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+--     therefore no person may represent it as an IEEE standard or imply that
+--     a resulting IEEE standard will be identical to it.
+-- 
+-- 2.  The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+--     well-conceived initiative that is likely to excelerate the creation
+--     of tools that support the 1149.1 standard.  As such, changes and
+--     enhancements will be carefully considered so as not to needlessly
+--     disrupt these development efforts.  The overriding goal is the
+--     ultimate success of the 1149.1 standard.
+-- 
+-- LEGAL NOTICES:
+-- 
+--     Hewlett-Packard Company makes no warranty of any kind with regard to
+--     this information, including, but not limited to, the implied
+--     waranties of merchantability and fitness for a particular purpose.
+-- 
+--     Hewlett-Packard Company shall not be liable for errors contained
+--     herein or direct, indirect, special, incidental, or consequential
+--     damages in connection with the furnishing, performance, or use of
+--     this material.
+-- 
+-- 
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+-- 
+
+--  STD_1149_1_1990    VHDL Package and Package Body in support of 
+--  BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is             -- Created 900525
+ package STD_1149_1_1994 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string; 
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO  is record
+   FREQ : real;
+   LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute  TAP_SCAN_IN   : boolean;
+ attribute  TAP_SCAN_OUT  : boolean;
+ attribute  TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute  TAP_SCAN_MODE : boolean;
+ attribute  TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute  INSTRUCTION_LENGTH : integer;
+ attribute  INSTRUCTION_OPCODE : string;
+ attribute  INSTRUCTION_CAPTURE : string;
+ attribute  INSTRUCTION_DISABLE : string;
+ attribute  INSTRUCTION_GUARD : string;
+ attribute  INSTRUCTION_PRIVATE : string;
+ attribute  INSTRUCTION_USAGE : string;
+ attribute  INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER  :  ID_STRING;
+ attribute USERCODE_REGISTER:  ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+                      CONTROL, CONTROLR, OUTPUT2, 
+                      OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+   CT : CELL_TYPE;
+   I  : BSCAN_INST;
+   CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1  : CELL_INFO; 
+ constant BC_2  : CELL_INFO; 
+ constant BC_3  : CELL_INFO; 
+ constant BC_4  : CELL_INFO; 
+ constant BC_5  : CELL_INFO; 
+ constant BC_6  : CELL_INFO; 
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990;  -- End of 1149.1-1990 Package
+end STD_1149_1_1994;
+
+
+--package body STD_1149_1_1990 is   -- Standard Boundary Cells  
+                                  -- Written  900525
+package body STD_1149_1_1994 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2,  EXTEST,  PI),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2,  SAMPLE,  PI),
+  (INPUT,   INTEST,  PI),  (OUTPUT2,  INTEST,  PI),
+  (INPUT,   RUNBIST, PI),  (OUTPUT2,  RUNBIST, PI),
+  (OUTPUT3, EXTEST,  PI),  (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  PI),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, PI),
+  (CONTROL, EXTEST,  PI),  (CONTROLR, EXTEST,  PI),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2, EXTEST,   UPD),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2, SAMPLE,   PI),
+  (INPUT,   INTEST,  UPD),  -- Intest on output2 not supported
+  (INPUT,   RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+  (OUTPUT3, EXTEST,  UPD), (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  UPD),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, UPD),
+  (CONTROL, EXTEST,  UPD), (CONTROLR, EXTEST, UPD),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),    (INTERNAL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),    (INTERNAL, SAMPLE,  PI),
+  (INPUT, INTEST,  PI),    (INTERNAL, INTEST,  PI),
+  (INPUT, RUNBIST, PI),    (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),  -- Intest on input not supported                    
+  (INPUT, SAMPLE,  PI),  -- Runbist on input not supported                    
+  (CLOCK, EXTEST,  PI),   (INTERNAL, EXTEST,  PI),
+  (CLOCK, SAMPLE,  PI),   (INTERNAL, SAMPLE,  PI),
+  (CLOCK, INTEST,  PI),   (INTERNAL, INTEST,  PI),
+  (CLOCK, RUNBIST, PI),   (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),   (CONTROL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),   (CONTROL, SAMPLE,  PI),
+  (INPUT, INTEST,  UPD),  (CONTROL, INTEST,  UPD),
+  (INPUT, RUNBIST, PI),   (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO := 
+ ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  UPD),
+  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
+  (BIDIR_IN, INTEST,  UPD), (BIDIR_OUT, INTEST,  PI),
+  (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990;  -- End of 1149.1-1990 Package Body
+end STD_1149_1_1994;
--- a/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_2001
+++ b/sie_fs/usr/local/share/urjtag/bsdl/STD_1149_1_2001
@@ -0,0 +1,259 @@
+--
+-- $Id: STD_1149_1_2001 988 2008-02-02 18:17:43Z arniml $
+--
+-- Email header accompanying the original Yacc code:
+--   http://www.eda.org/vug_bbs/bsdl.parser
+-- 
+-- -----------------------------------8<--------------------------------------
+-- 
+-- Hello All,
+-- 
+-- This is this first mailing of the BSDL* Version 0.0 parser specifications
+-- we are sending to people who request it from our publicized E-Mail address;
+-- 
+--              bsdl%hpmtlx@hplabs.HP.com
+-- 
+-- You are free to redistribute this at will, but we feel that it would be
+-- better if respondents asked for it directly so that their addresses can
+-- be entered into our list for future mailings and updates.
+-- 
+-- It would be helpful if you could confirm receipt of this transmission.
+-- We also would be very interested to hear about your experiences with this
+-- information and what you are planning to do with BSDL.
+-- 
+-- Regards,
+-- 
+-- Ken Parker
+-- Hewlett-Packard Company
+-- 
+-- 
+-- *Boundary-Scan Description Language - as documented in:
+-- 
+-- "A Language for Describing Boundary-Scan Devices", K.P. Parker
+-- and S. Oresjo, Proceedings 1990 International Test Conference,
+-- Washington DC, pp 222-234
+-- 
+-- 
+-- - -----------------cut here---------------------------------------------------
+-- 
+-- 
+-- 901004.0721                                  Hewlett-Packard Company
+-- 901016.1049                                  Manufacturing Test Division
+--                                              P.O. Box 301
+--                                              Loveland, Colorado  80537
+--                                              USA
+-- 
+--                                                              October 1990
+-- Hello BSDL Parser Requestor,
+-- 
+--    This Electronic Mail reply contains the computer specifications for
+-- Hewlett-Packard's Version 0.0 BSDL parser.  This section of the reply
+-- explains the contents of the rest of this file.
+-- 
+-- This file is composed of seven (7) parts:
+-- 
+--    1) How to use this file
+-- 
+--    2) UNIX* Lex source  (lexicographical tokenizing rules)
+-- 
+--    3) UNIX* Yacc source (BNF-like syntax description)
+-- 
+--    4) A sample main program to recognize BSDL.
+-- 
+--    5) A BSDL description of the Texas Instruments 74bct8374 that is
+--       recognized by the parser, for testing purposes.
+-- 
+--    6) The VHDL package STD_1149_1_1990 needed by this parser.
+-- 
+--    7) [added 901016] Porting experiences to other systems.
+-- 
+-- 
+-- RECOMMENDATION: Save a copy of this file in archival storage before
+--                 processing it via the instructions below.  This will
+--                 allow you to recover from errors, and allow you to
+--                 compare subsequently released data for changes.
+-- 
+-- DISCLAIMERS:
+-- 
+-- 1.  The IEEE 1149.1 Working Group has not endorsed BSDL Version 0.0 and
+--     therefore no person may represent it as an IEEE standard or imply that
+--     a resulting IEEE standard will be identical to it.
+-- 
+-- 2.  The IEEE 1149.1 Working Group recognizes that BSDL Version 0.0 is a
+--     well-conceived initiative that is likely to excelerate the creation
+--     of tools that support the 1149.1 standard.  As such, changes and
+--     enhancements will be carefully considered so as not to needlessly
+--     disrupt these development efforts.  The overriding goal is the
+--     ultimate success of the 1149.1 standard.
+-- 
+-- LEGAL NOTICES:
+-- 
+--     Hewlett-Packard Company makes no warranty of any kind with regard to
+--     this information, including, but not limited to, the implied
+--     waranties of merchantability and fitness for a particular purpose.
+-- 
+--     Hewlett-Packard Company shall not be liable for errors contained
+--     herein or direct, indirect, special, incidental, or consequential
+--     damages in connection with the furnishing, performance, or use of
+--     this material.
+-- 
+-- 
+-- *UNIX is a trademark of AT&T in the USA and other countries.
+-- 
+
+--  STD_1149_1_1990    VHDL Package and Package Body in support of 
+--  BSDL Version 0.0
+--
+
+-- package STD_1149_1_1990 is             -- Created 900525
+ package STD_1149_1_2001 is
+
+ -- Give pin mapping declarations
+
+ attribute PIN_MAP : string;
+ subtype PIN_MAP_STRING is string; 
+
+ -- Give TAP control declarations
+
+ type CLOCK_LEVEL is (LOW, BOTH);
+ type CLOCK_INFO  is record
+   FREQ : real;
+   LEVEL: CLOCK_LEVEL;
+ end record;
+
+ attribute  TAP_SCAN_IN   : boolean;
+ attribute  TAP_SCAN_OUT  : boolean;
+ attribute  TAP_SCAN_CLOCK: CLOCK_INFO;
+ attribute  TAP_SCAN_MODE : boolean;
+ attribute  TAP_SCAN_RESET: boolean;
+
+ -- Give instruction register declarations
+
+ attribute  INSTRUCTION_LENGTH : integer;
+ attribute  INSTRUCTION_OPCODE : string;
+ attribute  INSTRUCTION_CAPTURE : string;
+ attribute  INSTRUCTION_DISABLE : string;
+ attribute  INSTRUCTION_GUARD : string;
+ attribute  INSTRUCTION_PRIVATE : string;
+ attribute  INSTRUCTION_USAGE : string;
+ attribute  INSTRUCTION_SEQUENCE : string;
+
+ -- Give ID and USER code declarations
+
+ type ID_BITS is ('0', '1', 'x', 'X');
+ type ID_STRING is array (31 downto 0) of ID_BITS;
+ attribute IDCODE_REGISTER  :  ID_STRING;
+ attribute USERCODE_REGISTER:  ID_STRING;
+
+ -- Give register declarations
+
+ attribute REGISTER_ACCESS : string;
+
+ -- Give boundary cell declarations
+
+ type BSCAN_INST is (EXTEST, SAMPLE, INTEST, RUNBIST);
+ type CELL_TYPE is (INPUT, INTERNAL, CLOCK,
+                      CONTROL, CONTROLR, OUTPUT2, 
+                      OUTPUT3, BIDIR_IN, BIDIR_OUT);
+ type CAP_DATA is (PI, PO, UPD, CAP, X, ZERO, ONE);
+ type CELL_DATA is record
+   CT : CELL_TYPE;
+   I  : BSCAN_INST;
+   CD : CAP_DATA;
+ end record;
+ type CELL_INFO is array (positive range <>) of CELL_DATA;
+
+ -- Boundary Cell defered constants (see package body)
+
+ constant BC_1  : CELL_INFO; 
+ constant BC_2  : CELL_INFO; 
+ constant BC_3  : CELL_INFO; 
+ constant BC_4  : CELL_INFO; 
+ constant BC_5  : CELL_INFO; 
+ constant BC_6  : CELL_INFO; 
+
+ -- Boundary Register declarations
+
+ attribute BOUNDARY_CELLS : string;
+ attribute BOUNDARY_LENGTH : integer;
+ attribute BOUNDARY_REGISTER : string;
+
+ -- Miscellaneous
+
+ attribute DESIGN_WARNING : string;
+--end STD_1149_1_1990;  -- End of 1149.1-1990 Package
+end STD_1149_1_2001;
+
+
+--package body STD_1149_1_1990 is   -- Standard Boundary Cells  
+                                  -- Written  900525
+package body STD_1149_1_2001 is
+
+-- Description for f10-12, f10-16, f10-18c, f10-18d, f10-21c
+
+constant BC_1 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2,  EXTEST,  PI),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2,  SAMPLE,  PI),
+  (INPUT,   INTEST,  PI),  (OUTPUT2,  INTEST,  PI),
+  (INPUT,   RUNBIST, PI),  (OUTPUT2,  RUNBIST, PI),
+  (OUTPUT3, EXTEST,  PI),  (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  PI),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, PI),
+  (CONTROL, EXTEST,  PI),  (CONTROLR, EXTEST,  PI),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-8, f10-17, f10-19c, f10-19d, f10-22c
+
+constant BC_2 : CELL_INFO := 
+ ((INPUT,   EXTEST,  PI),  (OUTPUT2, EXTEST,   UPD),
+  (INPUT,   SAMPLE,  PI),  (OUTPUT2, SAMPLE,   PI),
+  (INPUT,   INTEST,  UPD),  -- Intest on output2 not supported
+  (INPUT,   RUNBIST, UPD), (OUTPUT2, RUNBIST, UPD),
+  (OUTPUT3, EXTEST,  UPD), (INTERNAL, EXTEST,  PI),
+  (OUTPUT3, SAMPLE,  PI),  (INTERNAL, SAMPLE,  PI),
+  (OUTPUT3, INTEST,  PI),  (INTERNAL, INTEST,  UPD),
+  (OUTPUT3, RUNBIST, PI),  (INTERNAL, RUNBIST, UPD),
+  (CONTROL, EXTEST,  UPD), (CONTROLR, EXTEST, UPD),
+  (CONTROL, SAMPLE,  PI),  (CONTROLR, SAMPLE,  PI),
+  (CONTROL, INTEST,  PI),  (CONTROLR, INTEST,  PI),
+  (CONTROL, RUNBIST, PI),  (CONTROLR, RUNBIST, PI) );
+
+-- Description for f10-9
+
+constant BC_3 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),    (INTERNAL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),    (INTERNAL, SAMPLE,  PI),
+  (INPUT, INTEST,  PI),    (INTERNAL, INTEST,  PI),
+  (INPUT, RUNBIST, PI),    (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-10, f10-11
+
+constant BC_4 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),  -- Intest on input not supported                    
+  (INPUT, SAMPLE,  PI),  -- Runbist on input not supported                    
+  (CLOCK, EXTEST,  PI),   (INTERNAL, EXTEST,  PI),
+  (CLOCK, SAMPLE,  PI),   (INTERNAL, SAMPLE,  PI),
+  (CLOCK, INTEST,  PI),   (INTERNAL, INTEST,  PI),
+  (CLOCK, RUNBIST, PI),   (INTERNAL, RUNBIST, PI) );
+
+-- Description for f10-20c, a combined Input/Control
+
+constant BC_5 : CELL_INFO := 
+ ((INPUT, EXTEST,  PI),   (CONTROL, EXTEST,  PI),
+  (INPUT, SAMPLE,  PI),   (CONTROL, SAMPLE,  PI),
+  (INPUT, INTEST,  UPD),  (CONTROL, INTEST,  UPD),
+  (INPUT, RUNBIST, PI),   (CONTROL, RUNBIST, PI) );
+
+-- Description for f10-22d, a reversible cell
+
+constant BC_6 : CELL_INFO := 
+ ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  UPD),
+  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
+  (BIDIR_IN, INTEST,  UPD), (BIDIR_OUT, INTEST,  PI),
+  (BIDIR_IN, RUNBIST, UPD), (BIDIR_OUT, RUNBIST, PI) );
+
+--end STD_1149_1_1990;  -- End of 1149.1-1990 Package Body
+end STD_1149_1_2001;
--- a/sie_fs/usr/local/share/urjtag/dec/PARTS
+++ b/sie_fs/usr/local/share/urjtag/dec/PARTS
@@ -0,0 +1,25 @@
+#
+# $Id: PARTS 448 2003-05-29 09:18:54Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0001000010000100	sa1100		SA1100
--- a/sie_fs/usr/local/share/urjtag/dec/sa1100/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/dec/sa1100/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 448 2003-05-29 09:18:54Z telka $
+#
+# Copyright (C) 2003 Jachym Holecek <freza@psi.cz>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Jachym Holecek <freza@psi.cz>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+1011	sa1100		rev11
--- a/sie_fs/usr/local/share/urjtag/dec/sa1100/sa1100
+++ b/sie_fs/usr/local/share/urjtag/dec/sa1100/sa1100
@@ -0,0 +1,462 @@
+#
+# $Id: sa1100 448 2003-05-29 09:18:54Z telka $
+#
+# JTAG declarations for SA-1100
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+
+signal	A(0)
+signal	A(1)
+signal	A(2)
+signal	A(3)
+signal	A(4)
+signal	A(5)
+signal	A(6)
+signal	A(7)
+signal	A(8)
+signal	A(9)
+signal	A(10)
+signal	A(11)
+signal	A(12)
+signal	A(13)
+signal	A(14)
+signal	A(15)
+signal	A(16)
+signal	A(17)
+signal	A(18)
+signal	A(19)
+signal	A(20)
+signal	A(21)
+signal	A(22)
+signal	A(23)
+signal	A(24)
+signal	A(25)
+signal	BATTF
+signal	CAS(0)
+signal	CAS(1)
+signal	CAS(2)
+signal	CAS(3)
+signal	CS(0)
+signal	CS(1)
+signal	CS(2)
+signal	CS(3)
+signal	D(0)
+signal	D(1)
+signal	D(2)
+signal	D(3)
+signal	D(4)
+signal	D(5)
+signal	D(6)
+signal	D(7)
+signal	D(8)
+signal	D(9)
+signal	D(10)
+signal	D(11)
+signal	D(12)
+signal	D(13)
+signal	D(14)
+signal	D(15)
+signal	D(16)
+signal	D(17)
+signal	D(18)
+signal	D(19)
+signal	D(20)
+signal	D(21)
+signal	D(22)
+signal	D(23)
+signal	D(24)
+signal	D(25)
+signal	D(26)
+signal	D(27)
+signal	D(28)
+signal	D(29)
+signal	D(30)
+signal	D(31)
+signal	GP(0)
+signal	GP(1)
+signal	GP(2)
+signal	GP(3)
+signal	GP(4)
+signal	GP(5)
+signal	GP(6)
+signal	GP(7)
+signal	GP(8)
+signal	GP(9)
+signal	GP(10)
+signal	GP(11)
+signal	GP(12)
+signal	GP(13)
+signal	GP(14)
+signal	GP(15)
+signal	GP(16)
+signal	GP(17)
+signal	GP(18)
+signal	GP(19)
+signal	GP(20)
+signal	GP(21)
+signal	GP(22)
+signal	GP(23)
+signal	GP(24)
+signal	GP(25)
+signal	GP(26)
+signal	GP(27)
+signal	IOIS16
+signal	LBIAS
+signal	LDD(0)
+signal	LDD(1)
+signal	LDD(2)
+signal	LDD(3)
+signal	LDD(4)
+signal	LDD(5)
+signal	LDD(6)
+signal	LDD(7)
+signal	LFCLK
+signal	LLCLK
+signal	LPCLK
+signal	OE
+signal	PCE1
+signal	PCE2
+signal	PIOR
+signal	PIOW
+signal	POE
+signal	PREG
+signal	PSKTSEL
+signal	PWAIT
+signal	PWE
+signal	RAS(0)
+signal	RAS(1)
+signal	RAS(2)
+signal	RAS(3)
+signal	RESET
+signal	RESETO
+signal	ROMSEL
+signal	RXD1
+signal	RXD2
+signal	RXD3
+signal	RXDC
+signal	SCLKC
+signal	SFRMC
+signal	TXD1
+signal	TXD2
+signal	TXD3
+signal	TXDC
+signal	UDCN
+signal	UDCP
+signal	VDDFA
+signal	WE
+
+# mandatory data registers
+register	BSR	279	# Boundary Scan Register
+register	BR	1	# Bypass Register
+# optional data registers
+register	DIR	32	# Device Identification Register
+
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST		00000	BSR
+instruction SAMPLE/PRELOAD	00001	BSR
+instruction BYPASS		11111	BR
+
+# optional instructions
+instruction CLAMP		00100	BR
+instruction HIGHZ		00101	BR
+instruction IDCODE		00110	DIR
+
+# BSR bits
+bit 278 I ? BATTF
+bit 277 I ? VDDFA
+bit 276 X ? .
+bit 275 C 0 .
+bit 274 O ? SFRMC 275 0 Z
+bit 273 I ? SFRMC
+bit 272 C 0 .
+bit 271 O ? SCLKC 272 0 Z
+bit 270 I ? SCLKC
+bit 269 C 0 .
+bit 268 O ? RXDC 269 0 Z
+bit 267 I ? RXDC
+bit 266 C ? .
+bit 265 O ? TXDC 266 0 Z
+bit 264 I ? TXDC
+bit 263 O ? D(0) 199 1 Z
+bit 262 I ? D(0)
+bit 261 O ? D(8) 199 1 Z
+bit 260 I ? D(8)
+bit 259 O ? D(16) 199 1 Z
+bit 258 I ? D(16)
+bit 257 O ? D(24) 199 1 Z
+bit 256 I ? D(24)
+bit 255 O ? D(1) 199 1 Z
+bit 254 I ? D(1)
+bit 253 O ? D(9) 199 1 Z
+bit 252 I ? D(9)
+bit 251 O ? D(17) 199 1 Z
+bit 250 I ? D(17)
+bit 249 O ? D(25) 199 1 Z
+bit 248 I ? D(25)
+bit 247 O ? D(2) 199 1 Z
+bit 246 I ? D(2)
+bit 245 O ? D(10) 199 1 Z
+bit 244 I ? D(10)
+bit 243 O ? D(18) 199 1 Z
+bit 242 I ? D(18)
+bit 241 O ? D(26) 199 1 Z
+bit 240 I ? D(26)
+bit 239 O ? D(3) 199 1 Z
+bit 238 I ? D(3)
+bit 237 O ? D(11) 199 1 Z
+bit 236 I ? D(11)
+bit 235 O ? D(19) 199 1 Z
+bit 234 I ? D(19)
+bit 233 O ? D(27) 199 1 Z
+bit 232 I ? D(27)
+bit 231 O ? D(4) 199 1 Z
+bit 230 I ? D(4)
+bit 229 O ? D(12) 199 1 Z
+bit 228 I ? D(12)
+bit 227 O ? D(20) 199 1 Z
+bit 226 I ? D(20)
+bit 225 O ? D(28) 199 1 Z
+bit 224 I ? D(28)
+bit 223 O ? D(5) 199 1 Z
+bit 222 I ? D(5)
+bit 221 O ? D(13) 199 1 Z
+bit 220 I ? D(13)
+bit 219 O ? D(21) 199 1 Z
+bit 218 I ? D(21)
+bit 217 O ? D(29) 199 1 Z
+bit 216 I ? D(29)
+bit 215 O ? D(6) 199 1 Z
+bit 214 I ? D(6)
+bit 213 O ? D(14) 199 1 Z
+bit 212 I ? D(14)
+bit 211 O ? D(22) 199 1 Z
+bit 210 I ? D(22)
+bit 209 O ? D(30) 199 1 Z
+bit 208 I ? D(30)
+bit 207 O ? D(7) 199 1 Z
+bit 206 I ? D(7)
+bit 205 O ? D(15) 199 1 Z
+bit 204 I ? D(15)
+bit 203 O ? D(23) 199 1 Z
+bit 202 I ? D(23)
+bit 201 O ? D(31) 199 1 Z
+bit 200 I ? D(31)
+bit 199 C 1 .
+bit 198 C 0 .
+bit 197 O ? GP(27) 198 0 Z
+bit 196 I ? GP(27)
+bit 195 C 0 .
+bit 194 O ? GP(26) 195 0 Z
+bit 193 I ? GP(26)
+bit 192 C 0 .
+bit 191 O ? GP(25) 192 0 Z
+bit 190 I ? GP(25)
+bit 189 C 0 .
+bit 188 O ? GP(24) 189 0 Z
+bit 187 I ? GP(24)
+bit 186 C 0 .
+bit 185 O ? GP(23) 186 0 Z
+bit 184 I ? GP(23)
+bit 183 C 0 .
+bit 182 O ? GP(22) 183 0 Z
+bit 181 I ? GP(22)
+bit 180 C 0 .
+bit 179 O ? GP(21) 180 0 Z
+bit 178 I ? GP(21)
+bit 177 C 0 .
+bit 176 O ? GP(20) 177 0 Z
+bit 175 I ? GP(20)
+bit 174 C 0 .
+bit 173 O ? GP(19) 174 0 Z
+bit 172 I ? GP(19)
+bit 171 C 0 .
+bit 170 O ? GP(18) 171 0 Z
+bit 169 I ? GP(18)
+bit 168 C 0 .
+bit 167 O ? GP(17) 168 0 Z
+bit 166 I ? GP(17)
+bit 165 C 0 .
+bit 164 O ? GP(16) 165 0 Z
+bit 163 I ? GP(16)
+bit 162 C 0 .
+bit 161 O ? GP(15) 162 0 Z
+bit 160 I ? GP(15)
+bit 159 C 0 .
+bit 158 O ? GP(14) 159 0 Z
+bit 157 I ? GP(14)
+bit 156 C 0 .
+bit 155 O ? GP(13) 156 0 Z
+bit 154 I ? GP(13)
+bit 153 C 0 .
+bit 152 O ? GP(12) 153 0 Z
+bit 151 I ? GP(12)
+bit 150 C 0 .
+bit 149 O ? GP(11) 150 0 Z
+bit 148 I ? GP(11)
+bit 147 C 0 .
+bit 146 O ? GP(10) 147 0 Z
+bit 145 I ? GP(10)
+bit 144 C 0 .
+bit 143 O ? GP(9) 144 0 Z
+bit 142 I ? GP(9)
+bit 141 C 0 .
+bit 140 O ? GP(8) 141 0 Z
+bit 139 I ? GP(8)
+bit 138 C 0 .
+bit 137 O ? GP(7) 138 0 Z
+bit 136 I ? GP(7)
+bit 135 C 0 .
+bit 134 O ? GP(6) 135 0 Z
+bit 133 I ? GP(6)
+bit 132 C 0 .
+bit 131 O ? GP(5) 132 0 Z
+bit 130 I ? GP(5)
+bit 129 C 0 .
+bit 128 O ? GP(4) 129 0 Z
+bit 127 I ? GP(4)
+bit 126 C 0 .
+bit 125 O ? GP(3) 126 0 Z
+bit 124 I ? GP(3)
+bit 123 C 0 .
+bit 122 O ? GP(2) 123 0 Z
+bit 121 I ? GP(2)
+bit 120 C 0 .
+bit 119 O ? GP(1) 120 0 Z
+bit 118 I ? GP(1)
+bit 117 C 0 .
+bit 116 O ? GP(0) 117 0 Z
+bit 115 I ? GP(0)
+bit 114 C 0 .
+bit 113 O ? LBIAS 114 0 Z
+bit 112 I ? LBIAS
+bit 111 C 0 .
+bit 110 O ? LPCLK 111 0 Z
+bit 109 I ? LPCLK
+bit 108 C 0 .
+bit 107 O ? LDD(0) 108 0 Z
+bit 106 I ? LDD(0)
+bit 105 C 0 .
+bit 104 O ? LDD(1) 105 0 Z
+bit 103 I ? LDD(1)
+bit 102 C 0 .
+bit 101 O ? LDD(2) 102 0 Z
+bit 100 I ? LDD(2)
+bit 99 C 0 .
+bit 98 O ? LDD(3) 99 0 Z
+bit 97 I ? LDD(3)
+bit 96 C 0 .
+bit 95 O ? LDD(4) 96 0 Z
+bit 94 I ? LDD(4)
+bit 93 C 0 .
+bit 92 O ? LDD(5) 93 0 Z
+bit 91 I ? LDD(5)
+bit 90 C 0 .
+bit 89 O ? LDD(6) 90 0 Z
+bit 88 I ? LDD(6)
+bit 87 C 0 .
+bit 86 O ? LDD(7) 87 0 Z
+bit 85 I ? LDD(7)
+bit 84 C 0 .
+bit 83 O ? LLCLK 84 0 Z
+bit 82 I ? LLCLK
+bit 81 C 0 .
+bit 80 O ? LFCLK 81 0 Z
+bit 79 I ? LFCLK
+bit 78 O ? POE
+bit 77 O ? PWE
+bit 76 O ? PIOR
+bit 75 O ? PIOW
+bit 74 O ? PSKTSEL
+bit 73 I ? IOIS16
+bit 72 I ? PWAIT
+bit 71 O ? PREG
+bit 70 O ? PCE2
+bit 69 O ? PCE1
+bit 68 C 1 .
+bit 67 O ? WE 68 1 Z
+bit 66 O ? OE 68 1 Z
+bit 65 O ? RAS(3) 68 1 Z
+bit 64 O ? RAS(2) 68 1 Z
+bit 63 O ? RAS(1) 68 1 Z
+bit 62 O ? RAS(0) 68 1 Z
+bit 61 O ? CAS(3) 68 1 Z
+bit 60 O ? CAS(2) 68 1 Z
+bit 59 O ? CAS(1) 68 1 Z
+bit 58 O ? CAS(0) 68 1 Z
+bit 57 O ? CS(3) 68 1 Z
+bit 56 O ? CS(2) 68 1 Z
+bit 55 O ? CS(1) 68 1 Z
+bit 54 O ? CS(0) 68 1 Z
+bit 53 O ? A(25) 68 1 Z
+bit 52 O ? A(24) 68 1 Z
+bit 51 O ? A(23) 68 1 Z
+bit 50 O ? A(22) 68 1 Z
+bit 49 O ? A(21) 68 1 Z
+bit 48 O ? A(20) 68 1 Z
+bit 47 O ? A(19) 68 1 Z
+bit 46 O ? A(18) 68 1 Z
+bit 45 O ? A(17) 68 1 Z
+bit 44 O ? A(16) 68 1 Z
+bit 43 O ? A(15) 68 1 Z
+bit 42 O ? A(14) 68 1 Z
+bit 41 O ? A(13) 68 1 Z
+bit 40 O ? A(12) 68 1 Z
+bit 39 O ? A(11) 68 1 Z
+bit 38 O ? A(10) 68 1 Z
+bit 37 O ? A(9) 68 1 Z
+bit 36 O ? A(8) 68 1 Z
+bit 35 O ? A(7) 68 1 Z
+bit 34 O ? A(6) 68 1 Z
+bit 33 O ? A(5) 68 1 Z
+bit 32 O ? A(4) 68 1 Z
+bit 31 O ? A(3) 68 1 Z
+bit 30 O ? A(2) 68 1 Z
+bit 29 O ? A(1) 68 1 Z
+bit 28 O ? A(0) 68 1 Z
+bit 27 C 1 .
+bit 26 O ? UDCN 27 1 Z
+bit 25 I ? UDCN
+bit 24 X ? .
+bit 23 C 1 .
+bit 22 O ? UDCP 23 1 Z
+bit 21 I ? UDCP
+bit 20 C 0 .
+bit 19 O ? RXD1 20 0 Z
+bit 18 I ? RXD1
+bit 17 C 0 .
+bit 16 O ? TXD1 17 0 Z
+bit 15 I ? TXD1
+bit 14 C 0 .
+bit 13 O ? RXD2 14 0 Z
+bit 12 I ? RXD2
+bit 11 C 0 .
+bit 10 O ? TXD2 11 0 Z
+bit 9 I ? TXD2
+bit 8 C 0 .
+bit 7 O ? RXD3 8 0 Z
+bit 6 I ? RXD3
+bit 5 C 0 .
+bit 4 O ? TXD3 5 0 Z
+bit 3 I ? TXD3
+bit 2 I ? RESET
+bit 1 O ? RESETO
+bit 0 I ? ROMSEL
--- a/sie_fs/usr/local/share/urjtag/freescale/PARTS
+++ b/sie_fs/usr/local/share/urjtag/freescale/PARTS
@@ -0,0 +1,29 @@
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+#     Order Number: MPC5200UG
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000010001	mpc5200		mpc5200  # see 21.8.1.1 in [1]
--- a/sie_fs/usr/local/share/urjtag/freescale/mpc5200/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/freescale/mpc5200/STEPPINGS
@@ -0,0 +1,30 @@
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+#     Order Number: MPC5200UG
+#
+
+# bits 31-28 of the Device Identification Register
+# see 21.8.1.1 in [1]
+0000	mpc5200		0
--- a/sie_fs/usr/local/share/urjtag/freescale/mpc5200/mpc5200
+++ b/sie_fs/usr/local/share/urjtag/freescale/mpc5200/mpc5200
@@ -0,0 +1,892 @@
+#
+# $Id$
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Asier Llano <a.llano@usyscom.com>, 2004.
+#
+# Documentation:
+# [1] Freescale, "Freescale MPC5200 Users Guide", Rev. 2, 08/2004
+#     Order Number: MPC5200UG
+# [2] Freescale, "MPC5200BSDL", Rev. 1.2,
+#     Order Number: MPC5200BSDL
+#
+
+# see Table 2-1 in [1]
+signal TEST_MODE_0 B02
+signal TEST_MODE_1 A01
+signal TEST_SEL_0 B01
+signal TEST_SEL_1 C03
+signal RTC_XTAL_IN C02
+signal RTC_XTAL_OUT C01
+signal TIMER_2 D03
+signal TIMER_3 D02
+signal TIMER_4 D01
+signal TIMER_5 E03
+signal TIMER_6 E02
+signal TIMER_7 E01
+signal USB_9 F03
+signal USB_8 F02
+signal USB_7 F01
+signal USB_6 G04
+signal USB_5 G03
+signal USB_4 G02
+signal USB_3 G01
+signal USB_2 H03
+signal USB_1 H02
+signal USB_0 H01
+signal ETH_17 J04
+signal ETH_10 J03
+signal ETH_4 J02
+signal ETH_3 J01
+signal ETH_2 K03
+signal ETH_1 K02
+signal ETH_0 K01
+signal ETH_11 L04
+signal ETH_5 L03
+signal ETH_16 L02
+signal ETH_9 L01
+signal ETH_8 M03
+signal ETH_12 M02
+signal ETH_13 M01
+signal ETH_14 N04
+signal ETH_15 N03
+signal ETH_6 N02
+signal ETH_7 N01
+signal IRQ0 P03
+signal IRQ2 P02
+signal IRQ1 P01
+signal PCI_GNT_B R04
+signal EXT_AD_30 R03
+signal PCI_RESET_B R02
+signal IRQ3 R01
+signal EXT_AD_28 T03
+signal EXT_AD_26 T02
+signal PCI_CLOCK T01
+signal EXT_AD_24 U03
+signal PCI_IDSEL U02
+signal PCI_REQ_B U01
+signal EXT_AD_20 V02
+signal EXT_AD_31 V01
+signal EXT_AD_29 W01
+signal EXT_AD_27 Y01
+signal EXT_AD_25 W02
+signal PCI_CBE_3_B Y02
+signal EXT_AD_22 V03
+signal EXT_AD_23 W03
+signal EXT_AD_21 Y03
+signal EXT_AD_18 V04
+signal EXT_AD_16 W04
+signal EXT_AD_19 Y04
+signal PCI_FRAME_B V05
+signal PCI_TRDY_B W05
+signal EXT_AD_17 Y05
+signal PCI_STOP_B V06
+signal PCI_CBE_2_B W06
+signal PCI_IRDY_B Y06
+signal PCI_PAR V07
+signal PCI_DEVSEL_B W07
+signal PCI_PERR_B Y07
+signal EXT_AD_15 U08
+signal EXT_AD_13 V08
+signal PCI_SERR_B W08
+signal PCI_CBE_1_B Y08
+signal EXT_AD_11 V09
+signal EXT_AD_14 W09
+signal EXT_AD_12 Y09
+signal EXT_AD_9 V10
+signal PCI_CBE_0_B W10
+signal EXT_AD_10 Y10
+signal EXT_AD_6 U11
+signal EXT_AD_4 V11
+signal EXT_AD_8 W11
+signal EXT_AD_7 Y11
+signal EXT_AD_2 V12
+signal EXT_AD_5 W12
+signal EXT_AD_3 Y12
+signal EXT_AD_0 V13
+signal EXT_AD_1 W13
+signal LP_TS_B Y13
+signal LP_ACK U14
+signal LP_ALE_B V14
+signal LP_CS0_B W14
+signal LP_CS1_B Y14
+signal LP_CS2_B V15
+signal LP_CS3_B W15
+signal LP_CS4_B Y15
+signal LP_CS5_B V16
+signal LP_RW W16
+signal ATA_ISOLATION Y16
+signal ATA_DRQ V17
+signal ATA_IOW_B W17
+signal ATA_IOR_B Y17
+signal ATA_IOCHRDY W18
+signal ATA_DACK_B Y18
+signal ATA_INTRQ Y19
+signal TIMER_0 Y20
+signal I2C_1 W19
+signal I2C_3 W20
+signal TIMER_1 V18
+signal I2C_0 V19
+signal I2C_2 V20
+signal MEM_MDQ_31 U18
+signal MEM_MDQ_1 U19
+signal MEM_MDQ_0 U20
+signal MEM_MDQ_30 T18
+signal MEM_MDQ_3 T19
+signal MEM_MDQ_2 T20
+signal MEM_MDQ_28 R17
+signal MEM_MDQ_29 R18
+signal MEM_MDQ_5 R19
+signal MEM_MDQ_4 R20
+signal MEM_MDQ_27 P18
+signal MEM_MDQ_7 P19
+signal MEM_MDQ_6 P20
+signal MEM_MDQ_25 N17
+signal MEM_MDQ_26 N18
+signal MEM_DQM_0 N19
+signal MEM_MDQS_0 N20
+signal MEM_MDQ_24 M18
+signal MEM_MDQ_14 M19
+signal MEM_MDQ_15 M20
+signal MEM_DQM_3 L17
+signal MEM_MDQS_3 L18
+signal MEM_MDQ_12 L19
+signal MEM_MDQ_13 L20
+signal MEM_MDQ_23 K18
+signal MEM_MDQ_10 K19
+signal MEM_MDQ_11 K20
+signal MEM_MDQ_22 J17
+signal MEM_MDQ_21 J18
+signal MEM_MDQ_8 J19
+signal MEM_MDQ_9 J20
+signal MEM_MDQ_20 H18
+signal MEM_DQM_1 H19
+signal MEM_MDQS_1 H20
+signal MEM_MDQ_18 G17
+signal MEM_MDQ_19 G18
+signal MEM_CLK G19
+signal MEM_CLK_B G20 G19
+signal MEM_MDQ_17 F18
+signal MEM_MA_12 F19
+signal MEM_CLK_EN F20
+signal MEM_MDQ_16 E18
+signal MEM_MA_9 E19
+signal MEM_MA_11 E20
+signal MEM_MDQS_2 D18
+signal MEM_MA_7 D19
+signal MEM_MA_8 D20
+signal MEM_MA_6 C20
+signal MEM_MA_5 C19
+signal MEM_MA_4 B20
+signal MEM_DQM_2 A20
+signal MEM_CAS_B B19
+signal MEM_WE_B A19
+signal MEM_MBA_0 C18
+signal MEM_CS_0_B B18
+signal MEM_RAS_B A18
+signal MEM_MA_0 C17
+signal MEM_MA_10 B17
+signal MEM_MBA_1 A17
+signal MEM_MA_3 C16
+signal MEM_MA_2 B16
+signal MEM_MA_1 A16
+signal GPIO_WKUP_6 C15
+signal SYS_PLL_TPA B15
+signal SYS_XTAL_IN A15
+signal SYS_XTAL_OUT D14
+signal SYS_PLL_AVSS C14
+signal SYS_PLL_AVDD B14
+signal SRESET_B A14
+signal PSC6_3 C13
+signal HRESET_B B13
+signal PORRESET_B A13
+signal GPIO_WKUP_7 C12
+signal PSC6_0 B12
+signal PSC6_2 A12
+signal PSC6_1 C11
+signal PSC1_0 B11
+signal PSC1_1 A11
+signal PSC1_2 C10
+signal PSC1_3 B10
+signal PSC1_4 A10
+signal PSC2_0 C09
+signal PSC2_1 B09
+signal PSC2_2 A09
+signal LP_OE D08
+signal CORE_PLL_AVDD C08
+signal PSC2_3 B08
+signal PSC2_4 A08
+signal PSC3_0 C07
+signal PSC3_1 B07
+signal PSC3_2 A07
+signal PSC3_3 C06
+signal PSC3_4 B06
+signal PSC3_5 A06
+signal PSC3_6 C05
+signal PSC3_7 B05
+signal PSC3_8 A05
+signal PSC3_9 C04
+signal JTAG_TCK B04
+signal JTAG_TMS A04
+signal JTAG_TDI A03
+signal JTAG_TRST_B B03
+signal JTAG_TDO A02
+signal VDD_MEM_IO P17 M17 T17 K17 F17 E17 H17 D17 D15 D13 D12
+signal VDD_IO U16 U13 U10 U09 U06 U05 T04 F04 E04 H04 D09 D06
+signal VDD_CORE U15 U12 U07 P04 K04 M04 D10 D07 D05 D11
+signal VSS_IO_CORE D16
+
+
+register	BSR	615
+register	BR	1
+register	DIR	32
+
+instruction length 6
+
+# see Table 21-2 in [1]
+
+# Mandatory instructions
+instruction IDCODE 011101 DIR
+instruction BYPASS 111111 BR
+instruction SAMPLE/PRELOAD 100000 BSR
+instruction EXTEST 000000 BSR
+
+# Optional instructions
+instruction CLAMP 100001 BR
+instruction HIGHZ 011111 BR
+
+
+# see [2]
+bit 614 I 1 PSC3_9
+bit 613 O 1 PSC3_9 612 1 Z
+bit 612 C 1 *
+bit 611 I 1 PSC3_8
+bit 610 O 1 PSC3_8 609 1 Z
+bit 609 C 1 *
+bit 608 I 1 PSC3_7
+bit 607 O 1 PSC3_7 606 1 Z
+bit 606 C 1 *
+bit 605 I 1 PSC3_6
+bit 604 O 1 PSC3_6 603 1 Z
+bit 603 C 1 *
+bit 602 I 1 PSC3_5
+bit 601 O 1 PSC3_5 600 1 Z
+bit 600 C 1 *
+bit 599 I 1 PSC3_4
+bit 598 O 1 PSC3_4 597 1 Z
+bit 597 C 1 *
+bit 596 I 1 PSC3_3
+bit 595 O 1 PSC3_3 594 1 Z
+bit 594 C 1 *
+bit 593 I 1 PSC3_2
+bit 592 O 1 PSC3_2 591 1 Z
+bit 591 C 1 *
+bit 590 I 1 PSC3_1
+bit 589 O 1 PSC3_1 588 1 Z
+bit 588 C 1 *
+bit 587 I 1 PSC3_0
+bit 586 O 1 PSC3_0 585 1 Z
+bit 585 C 1 *
+bit 584 I 1 PSC2_4
+bit 583 O 1 PSC2_4 582 1 Z
+bit 582 C 1 *
+bit 581 I 1 PSC2_3
+bit 580 O 1 PSC2_3 579 1 Z
+bit 579 C 1 *
+bit 578 I 1 LP_OE
+bit 577 O 1 LP_OE 576 1 Z
+bit 576 C 1 *
+bit 575 I 1 PSC2_2
+bit 574 O 1 PSC2_2 573 1 Z
+bit 573 C 1 *
+bit 572 I 1 PSC2_1
+bit 571 O 1 PSC2_1 570 1 Z
+bit 570 C 1 *
+bit 569 I 1 PSC2_0
+bit 568 O 1 PSC2_0 567 1 Z
+bit 567 C 1 *
+bit 566 I 1 PSC1_4
+bit 565 O 1 PSC1_4 564 1 Z
+bit 564 C 1 *
+bit 563 I 1 PSC1_3
+bit 562 O 1 PSC1_3 561 1 Z
+bit 561 C 1 *
+bit 560 I 1 PSC1_2
+bit 559 O 1 PSC1_2 558 1 Z
+bit 558 C 1 *
+bit 557 I 1 PSC1_1
+bit 556 O 1 PSC1_1 555 1 Z
+bit 555 C 1 *
+bit 554 I 1 PSC1_0
+bit 553 O 1 PSC1_0 552 1 Z
+bit 552 C 1 *
+bit 551 I 1 PSC6_1
+bit 550 O 1 PSC6_1 549 1 Z
+bit 549 C 1 *
+bit 548 I 1 PSC6_2
+bit 547 O 1 PSC6_2 546 1 Z
+bit 546 C 1 *
+bit 545 I 1 PSC6_0
+bit 544 O 1 PSC6_0 543 1 Z
+bit 543 C 1 *
+bit 542 I 1 GPIO_WKUP_7
+bit 541 O 1 GPIO_WKUP_7 540 1 Z
+bit 540 C 1 *
+bit 539 I 1 PORRESET_B
+bit 538 O 0 *
+bit 537 O 0 *
+bit 536 I 1 HRESET_B
+bit 535 O 1 HRESET_B 534 1 Z
+bit 534 C 1 *
+bit 533 I 1 PSC6_3
+bit 532 O 1 PSC6_3 531 1 Z
+bit 531 C 1 *
+bit 530 I 1 SRESET_B
+bit 529 O 1 SRESET_B 528 1 Z
+bit 528 C 1 *
+bit 527 I 1 SYS_PLL_TPA
+bit 526 O 1 SYS_PLL_TPA 525 1 Z
+bit 525 C 1 *
+bit 524 I 1 GPIO_WKUP_6
+bit 523 O 1 GPIO_WKUP_6 522 1 Z
+bit 522 C 1 *
+bit 521 I 1 MEM_MA_1
+bit 520 O 1 MEM_MA_1 519 1 Z
+bit 519 C 1 *
+bit 518 I 1 MEM_MA_2
+bit 517 O 1 MEM_MA_2 516 1 Z
+bit 516 C 1 *
+bit 515 I 1 MEM_MA_3
+bit 514 O 1 MEM_MA_3 513 1 Z
+bit 513 C 1 *
+bit 512 I 1 MEM_MBA_1
+bit 511 O 1 MEM_MBA_1 510 1 Z
+bit 510 C 1 *
+bit 509 I 1 MEM_MA_10
+bit 508 O 1 MEM_MA_10 507 1 Z
+bit 507 C 1 *
+bit 506 I 1 MEM_MA_0
+bit 505 O 1 MEM_MA_0 504 1 Z
+bit 504 C 1 *
+bit 503 I 1 MEM_RAS_B
+bit 502 O 1 MEM_RAS_B 501 1 Z
+bit 501 C 1 *
+bit 500 I 1 MEM_CS_0_B
+bit 499 O 1 MEM_CS_0_B 498 1 Z
+bit 498 C 1 *
+bit 497 I 1 MEM_MBA_0
+bit 496 O 1 MEM_MBA_0 495 1 Z
+bit 495 C 1 *
+bit 494 I 1 MEM_WE_B
+bit 493 O 1 MEM_WE_B 492 1 Z
+bit 492 C 1 *
+bit 491 I 1 MEM_CAS_B
+bit 490 O 1 MEM_CAS_B 489 1 Z
+bit 489 C 1 *
+bit 488 I 1 MEM_DQM_2
+bit 487 O 1 MEM_DQM_2 486 1 Z
+bit 486 C 1 *
+bit 485 I 1 MEM_MA_4
+bit 484 O 1 MEM_MA_4 483 1 Z
+bit 483 C 1 *
+bit 482 I 1 MEM_MA_5
+bit 481 O 1 MEM_MA_5 480 1 Z
+bit 480 C 1 *
+bit 479 I 1 MEM_MA_6
+bit 478 O 1 MEM_MA_6 477 1 Z
+bit 477 C 1 *
+bit 476 I 1 MEM_MA_8
+bit 475 O 1 MEM_MA_8 474 1 Z
+bit 474 C 1 *
+bit 473 I 1 MEM_MA_7
+bit 472 O 1 MEM_MA_7 471 1 Z
+bit 471 C 1 *
+bit 470 I 1 MEM_MDQS_2
+bit 469 O 1 MEM_MDQS_2 468 1 Z
+bit 468 C 1 *
+bit 467 I 1 MEM_MA_11
+bit 466 O 1 MEM_MA_11 465 1 Z
+bit 465 C 1 *
+bit 464 I 1 MEM_MA_9
+bit 463 O 1 MEM_MA_9 462 1 Z
+bit 462 C 1 *
+bit 461 I 1 MEM_MDQ_16
+bit 460 O 1 MEM_MDQ_16 459 1 Z
+bit 459 C 1 *
+bit 458 I 1 MEM_CLK_EN
+bit 457 O 1 MEM_CLK_EN 456 1 Z
+bit 456 C 1 *
+bit 455 I 1 MEM_MA_12
+bit 454 O 1 MEM_MA_12 453 1 Z
+bit 453 C 1 *
+bit 452 I 1 MEM_MDQ_17
+bit 451 O 1 MEM_MDQ_17 450 1 Z
+bit 450 C 1 *
+bit 449 I 1 MEM_CLK_B
+bit 448 O 1 MEM_CLK_B 447 1 Z
+bit 447 C 1 *
+bit 446 I 1 MEM_CLK
+bit 445 O 1 MEM_CLK 444 1 Z
+bit 444 C 1 *
+bit 443 I 1 MEM_MDQ_19
+bit 442 O 1 MEM_MDQ_19 441 1 Z
+bit 441 C 1 *
+bit 440 I 1 MEM_MDQ_18
+bit 439 O 1 MEM_MDQ_18 438 1 Z
+bit 438 C 1 *
+bit 437 I 1 MEM_MDQS_1
+bit 436 O 1 MEM_MDQS_1 435 1 Z
+bit 435 C 1 *
+bit 434 I 1 MEM_DQM_1
+bit 433 O 1 MEM_DQM_1 432 1 Z
+bit 432 C 1 *
+bit 431 I 1 MEM_MDQ_20
+bit 430 O 1 MEM_MDQ_20 429 1 Z
+bit 429 C 1 *
+bit 428 I 1 MEM_MDQ_9
+bit 427 O 1 MEM_MDQ_9 426 1 Z
+bit 426 C 1 *
+bit 425 I 1 MEM_MDQ_8
+bit 424 O 1 MEM_MDQ_8 423 1 Z
+bit 423 C 1 *
+bit 422 I 1 MEM_MDQ_21
+bit 421 O 1 MEM_MDQ_21 420 1 Z
+bit 420 C 1 *
+bit 419 I 1 MEM_MDQ_22
+bit 418 O 1 MEM_MDQ_22 417 1 Z
+bit 417 C 1 *
+bit 416 I 1 MEM_MDQ_11
+bit 415 O 1 MEM_MDQ_11 414 1 Z
+bit 414 C 1 *
+bit 413 I 1 MEM_MDQ_10
+bit 412 O 1 MEM_MDQ_10 411 1 Z
+bit 411 C 1 *
+bit 410 I 1 MEM_MDQ_23
+bit 409 O 1 MEM_MDQ_23 408 1 Z
+bit 408 C 1 *
+bit 407 I 1 MEM_MDQ_13
+bit 406 O 1 MEM_MDQ_13 405 1 Z
+bit 405 C 1 *
+bit 404 I 1 MEM_MDQ_12
+bit 403 O 1 MEM_MDQ_12 402 1 Z
+bit 402 C 1 *
+bit 401 I 1 MEM_MDQS_3
+bit 400 O 1 MEM_MDQS_3 399 1 Z
+bit 399 C 1 *
+bit 398 I 1 MEM_DQM_3
+bit 397 O 1 MEM_DQM_3 396 1 Z
+bit 396 C 1 *
+bit 395 I 1 MEM_MDQ_15
+bit 394 O 1 MEM_MDQ_15 393 1 Z
+bit 393 C 1 *
+bit 392 I 1 MEM_MDQ_14
+bit 391 O 1 MEM_MDQ_14 390 1 Z
+bit 390 C 1 *
+bit 389 I 1 MEM_MDQ_24
+bit 388 O 1 MEM_MDQ_24 387 1 Z
+bit 387 C 1 *
+bit 386 I 1 MEM_MDQS_0
+bit 385 O 1 MEM_MDQS_0 384 1 Z
+bit 384 C 1 *
+bit 383 I 1 MEM_DQM_0
+bit 382 O 1 MEM_DQM_0 381 1 Z
+bit 381 C 1 *
+bit 380 I 1 MEM_MDQ_26
+bit 379 O 1 MEM_MDQ_26 378 1 Z
+bit 378 C 1 *
+bit 377 I 1 MEM_MDQ_25
+bit 376 O 1 MEM_MDQ_25 375 1 Z
+bit 375 C 1 *
+bit 374 I 1 MEM_MDQ_6
+bit 373 O 1 MEM_MDQ_6 372 1 Z
+bit 372 C 1 *
+bit 371 I 1 MEM_MDQ_7
+bit 370 O 1 MEM_MDQ_7 369 1 Z
+bit 369 C 1 *
+bit 368 I 1 MEM_MDQ_27
+bit 367 O 1 MEM_MDQ_27 366 1 Z
+bit 366 C 1 *
+bit 365 I 1 MEM_MDQ_4
+bit 364 O 1 MEM_MDQ_4 363 1 Z
+bit 363 C 1 *
+bit 362 I 1 MEM_MDQ_5
+bit 361 O 1 MEM_MDQ_5 360 1 Z
+bit 360 C 1 *
+bit 359 I 1 MEM_MDQ_29
+bit 358 O 1 MEM_MDQ_29 357 1 Z
+bit 357 C 1 *
+bit 356 I 1 MEM_MDQ_28
+bit 355 O 1 MEM_MDQ_28 354 1 Z
+bit 354 C 1 *
+bit 353 I 1 MEM_MDQ_2
+bit 352 O 1 MEM_MDQ_2 351 1 Z
+bit 351 C 1 *
+bit 350 I 1 MEM_MDQ_3
+bit 349 O 1 MEM_MDQ_3 348 1 Z
+bit 348 C 1 *
+bit 347 I 1 MEM_MDQ_30
+bit 346 O 1 MEM_MDQ_30 345 1 Z
+bit 345 C 1 *
+bit 344 I 1 MEM_MDQ_0
+bit 343 O 1 MEM_MDQ_0 342 1 Z
+bit 342 C 1 *
+bit 341 I 1 MEM_MDQ_1
+bit 340 O 1 MEM_MDQ_1 339 1 Z
+bit 339 C 1 *
+bit 338 I 1 MEM_MDQ_31
+bit 337 O 1 MEM_MDQ_31 336 1 Z
+bit 336 C 1 *
+bit 335 I 1 I2C_2
+bit 334 O 1 I2C_2 333 1 Z
+bit 333 C 1 *
+bit 332 I 1 I2C_0
+bit 331 O 1 I2C_0 330 1 Z
+bit 330 C 1 *
+bit 329 I 1 TIMER_1
+bit 328 O 1 TIMER_1 327 1 Z
+bit 327 C 1 *
+bit 326 I 1 I2C_3
+bit 325 O 1 I2C_3 324 1 Z
+bit 324 C 1 *
+bit 323 I 1 I2C_1
+bit 322 O 1 I2C_1 321 1 Z
+bit 321 C 1 *
+bit 320 I 1 TIMER_0
+bit 319 O 1 TIMER_0 318 1 Z
+bit 318 C 1 *
+bit 317 I 1 ATA_INTRQ
+bit 316 O 1 ATA_INTRQ 315 1 Z
+bit 315 C 1 *
+bit 314 I 1 ATA_DACK_B
+bit 313 O 1 ATA_DACK_B 312 1 Z
+bit 312 C 1 *
+bit 311 I 1 ATA_IOCHRDY
+bit 310 O 1 ATA_IOCHRDY 309 1 Z
+bit 309 C 1 *
+bit 308 I 1 ATA_IOR_B
+bit 307 O 1 ATA_IOR_B 306 1 Z
+bit 306 C 1 *
+bit 305 I 1 ATA_IOW_B
+bit 304 O 1 ATA_IOW_B 303 1 Z
+bit 303 C 1 *
+bit 302 I 1 ATA_DRQ
+bit 301 O 1 ATA_DRQ 300 1 Z
+bit 300 C 1 *
+bit 299 I 1 ATA_ISOLATION
+bit 298 O 1 ATA_ISOLATION 297 1 Z
+bit 297 C 1 *
+bit 296 I 1 LP_RW
+bit 295 O 1 LP_RW 294 1 Z
+bit 294 C 1 *
+bit 293 I 1 LP_CS5_B
+bit 292 O 1 LP_CS5_B 291 1 Z
+bit 291 C 1 *
+bit 290 I 1 LP_CS4_B
+bit 289 O 1 LP_CS4_B 288 1 Z
+bit 288 C 1 *
+bit 287 I 1 LP_CS3_B
+bit 286 O 1 LP_CS3_B 285 1 Z
+bit 285 C 1 *
+bit 284 I 1 LP_CS2_B
+bit 283 O 1 LP_CS2_B 282 1 Z
+bit 282 C 1 *
+bit 281 I 1 LP_CS1_B
+bit 280 O 1 LP_CS1_B 279 1 Z
+bit 279 C 1 *
+bit 278 I 1 LP_CS0_B
+bit 277 O 1 LP_CS0_B 276 1 Z
+bit 276 C 1 *
+bit 275 I 1 LP_ALE_B
+bit 274 O 1 LP_ALE_B 273 1 Z
+bit 273 C 1 *
+bit 272 I 1 LP_ACK
+bit 271 O 1 LP_ACK 270 1 Z
+bit 270 C 1 *
+bit 269 I 1 LP_TS_B
+bit 268 O 1 LP_TS_B 267 1 Z
+bit 267 C 1 *
+bit 266 I 1 EXT_AD_1
+bit 265 O 1 EXT_AD_1 264 1 Z
+bit 264 C 1 *
+bit 263 I 1 EXT_AD_0
+bit 262 O 1 EXT_AD_0 261 1 Z
+bit 261 C 1 *
+bit 260 I 1 EXT_AD_3
+bit 259 O 1 EXT_AD_3 258 1 Z
+bit 258 C 1 *
+bit 257 I 1 EXT_AD_5
+bit 256 O 1 EXT_AD_5 255 1 Z
+bit 255 C 1 *
+bit 254 I 1 EXT_AD_2
+bit 253 O 1 EXT_AD_2 252 1 Z
+bit 252 C 1 *
+bit 251 I 1 EXT_AD_7
+bit 250 O 1 EXT_AD_7 249 1 Z
+bit 249 C 1 *
+bit 248 I 1 EXT_AD_8
+bit 247 O 1 EXT_AD_8 246 1 Z
+bit 246 C 1 *
+bit 245 I 1 EXT_AD_4
+bit 244 O 1 EXT_AD_4 243 1 Z
+bit 243 C 1 *
+bit 242 I 1 EXT_AD_6
+bit 241 O 1 EXT_AD_6 240 1 Z
+bit 240 C 1 *
+bit 239 I 1 EXT_AD_10
+bit 238 O 1 EXT_AD_10 237 1 Z
+bit 237 C 1 *
+bit 236 I 1 PCI_CBE_0_B
+bit 235 O 1 PCI_CBE_0_B 234 1 Z
+bit 234 C 1 *
+bit 233 I 1 EXT_AD_9
+bit 232 O 1 EXT_AD_9 231 1 Z
+bit 231 C 1 *
+bit 230 I 1 EXT_AD_12
+bit 229 O 1 EXT_AD_12 228 1 Z
+bit 228 C 1 *
+bit 227 I 1 EXT_AD_14
+bit 226 O 1 EXT_AD_14 225 1 Z
+bit 225 C 1 *
+bit 224 I 1 EXT_AD_11
+bit 223 O 1 EXT_AD_11 222 1 Z
+bit 222 C 1 *
+bit 221 I 1 PCI_CBE_1_B
+bit 220 O 1 PCI_CBE_1_B 219 1 Z
+bit 219 C 1 *
+bit 218 I 1 PCI_SERR_B
+bit 217 O 1 PCI_SERR_B 216 1 Z
+bit 216 C 1 *
+bit 215 I 1 EXT_AD_13
+bit 214 O 1 EXT_AD_13 213 1 Z
+bit 213 C 1 *
+bit 212 I 1 EXT_AD_15
+bit 211 O 1 EXT_AD_15 210 1 Z
+bit 210 C 1 *
+bit 209 I 1 PCI_PERR_B
+bit 208 O 1 PCI_PERR_B 207 1 Z
+bit 207 C 1 *
+bit 206 I 1 PCI_DEVSEL_B
+bit 205 O 1 PCI_DEVSEL_B 204 1 Z
+bit 204 C 1 *
+bit 203 I 1 PCI_PAR
+bit 202 O 1 PCI_PAR 201 1 Z
+bit 201 C 1 *
+bit 200 I 1 PCI_IRDY_B
+bit 199 O 1 PCI_IRDY_B 198 1 Z
+bit 198 C 1 *
+bit 197 I 1 PCI_CBE_2_B
+bit 196 O 1 PCI_CBE_2_B 195 1 Z
+bit 195 C 1 *
+bit 194 I 1 PCI_STOP_B
+bit 193 O 1 PCI_STOP_B 192 1 Z
+bit 192 C 1 *
+bit 191 I 1 EXT_AD_17
+bit 190 O 1 EXT_AD_17 189 1 Z
+bit 189 C 1 *
+bit 188 I 1 PCI_TRDY_B
+bit 187 O 1 PCI_TRDY_B 186 1 Z
+bit 186 C 1 *
+bit 185 I 1 PCI_FRAME_B
+bit 184 O 1 PCI_FRAME_B 183 1 Z
+bit 183 C 1 *
+bit 182 I 1 EXT_AD_19
+bit 181 O 1 EXT_AD_19 180 1 Z
+bit 180 C 1 *
+bit 179 I 1 EXT_AD_16
+bit 178 O 1 EXT_AD_16 177 1 Z
+bit 177 C 1 *
+bit 176 I 1 EXT_AD_18
+bit 175 O 1 EXT_AD_18 174 1 Z
+bit 174 C 1 *
+bit 173 I 1 EXT_AD_21
+bit 172 O 1 EXT_AD_21 171 1 Z
+bit 171 C 1 *
+bit 170 I 1 EXT_AD_23
+bit 169 O 1 EXT_AD_23 168 1 Z
+bit 168 C 1 *
+bit 167 I 1 EXT_AD_22
+bit 166 O 1 EXT_AD_22 165 1 Z
+bit 165 C 1 *
+bit 164 I 1 PCI_CBE_3_B
+bit 163 O 1 PCI_CBE_3_B 162 1 Z
+bit 162 C 1 *
+bit 161 I 1 EXT_AD_25
+bit 160 O 1 EXT_AD_25 159 1 Z
+bit 159 C 1 *
+bit 158 I 1 EXT_AD_27
+bit 157 O 1 EXT_AD_27 156 1 Z
+bit 156 C 1 *
+bit 155 I 1 EXT_AD_29
+bit 154 O 1 EXT_AD_29 153 1 Z
+bit 153 C 1 *
+bit 152 I 1 EXT_AD_31
+bit 151 O 1 EXT_AD_31 150 1 Z
+bit 150 C 1 *
+bit 149 I 1 EXT_AD_20
+bit 148 O 1 EXT_AD_20 147 1 Z
+bit 147 C 1 *
+bit 146 I 1 PCI_REQ_B
+bit 145 O 1 PCI_REQ_B 144 1 Z
+bit 144 C 1 *
+bit 143 I 1 PCI_IDSEL
+bit 142 O 1 PCI_IDSEL 141 1 Z
+bit 141 C 1 *
+bit 140 I 1 EXT_AD_24
+bit 139 O 1 EXT_AD_24 138 1 Z
+bit 138 C 1 *
+bit 137 I 1 PCI_CLOCK
+bit 136 O 1 PCI_CLOCK 135 1 Z
+bit 135 C 1 *
+bit 134 I 1 EXT_AD_26
+bit 133 O 1 EXT_AD_26 132 1 Z
+bit 132 C 1 *
+bit 131 I 1 EXT_AD_28
+bit 130 O 1 EXT_AD_28 129 1 Z
+bit 129 C 1 *
+bit 128 I 1 IRQ3
+bit 127 O 1 IRQ3 126 1 Z
+bit 126 C 1 *
+bit 125 I 1 PCI_RESET_B
+bit 124 O 1 PCI_RESET_B 123 1 Z
+bit 123 C 1 *
+bit 122 I 1 EXT_AD_30
+bit 121 O 1 EXT_AD_30 120 1 Z
+bit 120 C 1 *
+bit 119 I 1 PCI_GNT_B
+bit 118 O 1 PCI_GNT_B 117 1 Z
+bit 117 C 1 *
+bit 116 I 1 IRQ1
+bit 115 O 1 IRQ1 114 1 Z
+bit 114 C 1 *
+bit 113 I 1 IRQ2
+bit 112 O 1 IRQ2 111 1 Z
+bit 111 C 1 *
+bit 110 I 1 IRQ0
+bit 109 O 1 IRQ0 108 1 Z
+bit 108 C 1 *
+bit 107 I 1 ETH_7
+bit 106 O 1 ETH_7 105 1 Z
+bit 105 C 1 *
+bit 104 I 1 ETH_6
+bit 103 O 1 ETH_6 102 1 Z
+bit 102 C 1 *
+bit 101 I 1 ETH_15
+bit 100 O 1 ETH_15 99 1 Z
+bit 99 C 1 *
+bit 98 I 1 ETH_14
+bit 97 O 1 ETH_14 96 1 Z
+bit 96 C 1 *
+bit 95 I 1 ETH_13
+bit 94 O 1 ETH_13 93 1 Z
+bit 93 C 1 *
+bit 92 I 1 ETH_12
+bit 91 O 1 ETH_12 90 1 Z
+bit 90 C 1 *
+bit 89 I 1 ETH_8
+bit 88 O 1 ETH_8 87 1 Z
+bit 87 C 1 *
+bit 86 I 1 ETH_9
+bit 85 O 1 ETH_9 84 1 Z
+bit 84 C 1 *
+bit 83 I 1 ETH_16
+bit 82 O 1 ETH_16 81 1 Z
+bit 81 C 1 *
+bit 80 I 1 ETH_5
+bit 79 O 1 ETH_5 78 1 Z
+bit 78 C 1 *
+bit 77 I 1 ETH_11
+bit 76 O 1 ETH_11 75 1 Z
+bit 75 C 1 *
+bit 74 I 1 ETH_0
+bit 73 O 1 ETH_0 72 1 Z
+bit 72 C 1 *
+bit 71 I 1 ETH_1
+bit 70 O 1 ETH_1 69 1 Z
+bit 69 C 1 *
+bit 68 I 1 ETH_2
+bit 67 O 1 ETH_2 66 1 Z
+bit 66 C 1 *
+bit 65 I 1 ETH_3
+bit 64 O 1 ETH_3 63 1 Z
+bit 63 C 1 *
+bit 62 I 1 ETH_4
+bit 61 O 1 ETH_4 60 1 Z
+bit 60 C 1 *
+bit 59 I 1 ETH_10
+bit 58 O 1 ETH_10 57 1 Z
+bit 57 C 1 *
+bit 56 I 1 ETH_17
+bit 55 O 1 ETH_17 54 1 Z
+bit 54 C 1 *
+bit 53 I 1 USB_0
+bit 52 O 1 USB_0 51 1 Z
+bit 51 C 1 *
+bit 50 I 1 USB_1
+bit 49 O 1 USB_1 48 1 Z
+bit 48 C 1 *
+bit 47 I 1 USB_2
+bit 46 O 1 USB_2 45 1 Z
+bit 45 C 1 *
+bit 44 I 1 USB_3
+bit 43 O 1 USB_3 42 1 Z
+bit 42 C 1 *
+bit 41 I 1 USB_4
+bit 40 O 1 USB_4 39 1 Z
+bit 39 C 1 *
+bit 38 I 1 USB_5
+bit 37 O 1 USB_5 36 1 Z
+bit 36 C 1 *
+bit 35 I 1 USB_6
+bit 34 O 1 USB_6 33 1 Z
+bit 33 C 1 *
+bit 32 I 1 USB_7
+bit 31 O 1 USB_7 30 1 Z
+bit 30 C 1 *
+bit 29 I 1 USB_8
+bit 28 O 1 USB_8 27 1 Z
+bit 27 C 1 *
+bit 26 I 1 USB_9
+bit 25 O 1 USB_9 24 1 Z
+bit 24 C 1 *
+bit 23 I 1 TIMER_7
+bit 22 O 1 TIMER_7 21 1 Z
+bit 21 C 1 *
+bit 20 I 1 TIMER_6
+bit 19 O 1 TIMER_6 18 1 Z
+bit 18 C 1 *
+bit 17 I 1 TIMER_5
+bit 16 O 1 TIMER_5 15 1 Z
+bit 15 C 1 *
+bit 14 I 1 TIMER_4
+bit 13 O 1 TIMER_4 12 1 Z
+bit 12 C 1 *
+bit 11 I 1 TIMER_3
+bit 10 O 1 TIMER_3 9 1 Z
+bit 9 C 1 *
+bit 8 I 1 TIMER_2
+bit 7 O 1 TIMER_2 6 1 Z
+bit 6 C 1 *
+bit 5 I 1 TEST_SEL_1
+bit 4 O 1 TEST_SEL_1 3 1 Z
+bit 3 C 1 *
+bit 2 I 1 TEST_SEL_0
+bit 1 O 1 TEST_SEL_0 0 1 Z
+bit 0 C 1 *
+
+initbus mpc5200
--- a/sie_fs/usr/local/share/urjtag/hitachi/PARTS
+++ b/sie_fs/usr/local/share/urjtag/hitachi/PARTS
@@ -0,0 +1,27 @@
+#
+# $Id: PARTS 738 2007-11-08 07:33:12Z kawk $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 27-12 of the Device Identification Register
+0000000000000001	ar7300		AR7300
+0000000001000010	sh7727		SH7727
+0111010101101110	sh7727		SH7727
--- a/sie_fs/usr/local/share/urjtag/hitachi/ar7300/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/hitachi/ar7300/STEPPINGS
@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ar7300		0
--- a/sie_fs/usr/local/share/urjtag/hitachi/ar7300/ar7300
+++ b/sie_fs/usr/local/share/urjtag/hitachi/ar7300/ar7300
@@ -0,0 +1,29 @@
+#
+# $Id$
+
+register	BR		 1
+register	BSR		 1
+register	DIR		32
+register	EJIMPCODE	32
+register	EJADDRESS	32
+register	EJDATA		32
+register	EJCONTROL	32
+register	EJALL		96
+register	EJFASTDATA	33
+
+instruction length 5
+
+instruction	BYPASS		11111	BR
+instruction	SAMPLE/PRELOAD	00010	BSR
+instruction	IDCODE		00001	DIR
+instruction	EJTAG_IMPCODE	00011	EJIMPCODE
+instruction	EJTAG_ADDRESS	01000	EJADDRESS
+instruction	EJTAG_DATA	01001	EJDATA
+instruction	EJTAG_CONTROL	01010	EJCONTROL
+instruction	EJTAG_ALL	01011	EJALL
+instruction	EJTAGBOOT	01100	BR
+instruction	NORMALBOOT	01101	BR
+instruction	EJTAG_FASTDATA	01110	EJFASTDATA
+
+initbus ejtag
+endian big
--- a/sie_fs/usr/local/share/urjtag/hitachi/hd64465/hd64465
+++ b/sie_fs/usr/local/share/urjtag/hitachi/hd64465/hd64465
@@ -0,0 +1,992 @@
+#
+# $Id: hd64465 581 2003-10-20 11:11:06Z telka $
+#
+# JTAG declarations for Hitachi HD64465BP/HD64465BQ
+# Copyright (C) 2003 Elcom s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2003.
+#
+# Documentation:
+# [1] Hitachi Ltd., "Windows CE Intelligent Peripheral Controller
+#     HD64465 User's Manual", 03/08/01, Rev. 3.0, ADE-602-168B
+#
+
+# Test Mode (see Table 4.3 in [1])
+signal	TST
+signal	TDI
+signal	TDO
+signal	TMS
+signal	TCK
+signal	TRST
+
+# CPU interface (see Table 4.4 in [1])
+signal	CKIO
+signal	A0
+signal	A1
+signal	A2
+signal	A3
+signal	A4
+signal	A5
+signal	A6
+signal	A7
+signal	A8
+signal	A9
+signal	A10
+signal	A11
+signal	A12
+signal	A13
+signal	A14
+signal	A15
+signal	A16
+signal	A17
+signal	A18
+signal	A19
+signal	A20
+signal	A21
+signal	A22
+signal	A23
+signal	A24
+signal	A25
+signal	D0
+signal	D1
+signal	D2
+signal	D3
+signal	D4
+signal	D5
+signal	D6
+signal	D7
+signal	D8
+signal	D9
+signal	D10
+signal	D11
+signal	D12
+signal	D13
+signal	D14
+signal	D15
+signal	D16
+signal	D17
+signal	D18
+signal	D19
+signal	D20
+signal	D21
+signal	D22
+signal	D23
+signal	D24
+signal	D25
+signal	D26
+signal	D27
+signal	D28
+signal	D29
+signal	D30
+signal	D31
+signal	nCS4
+signal	nWE0
+signal	nWE1
+signal	nWE2
+signal	nWE3
+signal	nRDWR
+signal	nRD
+signal	nRDY
+signal	nBS
+signal	nDREQ0
+signal	nDREQ1
+signal	DRAK0
+signal	DRAK1
+signal	nIRQ0
+signal	SH_MODE
+signal	nCE1B
+signal	nCE2B
+signal	nCE1A
+signal	nCE2A
+signal	nIOIS16
+
+# PCMCIA 0 (see Table 4.5 in [1])
+signal	PCC0A0
+signal	PCC0A1
+signal	PCC0A2
+signal	PCC0A3
+signal	PCC0A4
+signal	PCC0A5
+signal	PCC0A6
+signal	PCC0A7
+signal	PCC0A8
+signal	PCC0A9
+signal	PCC0A10
+signal	PCC0A11
+signal	PCC0A12
+signal	PCC0A13
+signal	PCC0A14
+signal	PCC0A15
+signal	PCC0A16
+signal	PCC0A17
+signal	PCC0A18
+signal	PCC0A19
+signal	PCC0A20
+signal	PCC0A21
+signal	PCC0A22
+signal	PCC0A23
+signal	PCC0A24
+signal	PCC0A25
+signal	PCC0D0
+signal	PCC0D1
+signal	PCC0D2
+signal	PCC0D3
+signal	PCC0D4
+signal	PCC0D5
+signal	PCC0D6
+signal	PCC0D7
+signal	PCC0D8
+signal	PCC0D9
+signal	PCC0D10
+signal	PCC0D11
+signal	PCC0D12
+signal	PCC0D13
+signal	PCC0D14
+signal	PCC0D15
+signal	nPCC0CE1B
+signal	nPCC0CE2B
+signal	nRDB
+signal	nWEB
+signal	nPCC0ICIORDB
+signal	nPCC0ICIOWRB
+signal	PCC0RESET
+signal	nPCC0WAIT
+signal	nPCC0WP
+signal	PCC0RDY
+signal	PCC0BVD1
+signal	PCC0BVD2
+signal	nPCC0CD1
+signal	nPCC0CD2
+signal	nPCC0VS1
+signal	nPCC0VS2
+signal	nPCC0REG
+signal	VCC0SEL1
+signal	VCC0SEL0
+signal	VCC0VPP1
+signal	VCC0VPP0
+
+# PCMCIA 1 (see Table 4.6 in [1])
+signal	PCC1A0
+signal	PCC1A1
+signal	PCC1A2
+signal	PCC1A3
+signal	PCC1A4
+signal	PCC1A5
+signal	PCC1A6
+signal	PCC1A7
+signal	PCC1A8
+signal	PCC1A9
+signal	PCC1A10
+signal	PCC1A11
+signal	PCC1A12
+signal	PCC1A13
+signal	PCC1A14
+signal	PCC1A15
+signal	PCC1A16
+signal	PCC1A17
+signal	PCC1A18
+signal	PCC1A19
+signal	PCC1A20
+signal	PCC1A21
+signal	PCC1A22
+signal	PCC1A23
+signal	PCC1A24
+signal	PCC1A25
+signal	PCC1D0
+signal	PCC1D1
+signal	PCC1D2
+signal	PCC1D3
+signal	PCC1D4
+signal	PCC1D5
+signal	PCC1D6
+signal	PCC1D7
+signal	PCC1D8
+signal	PCC1D9
+signal	PCC1D10
+signal	PCC1D11
+signal	PCC1D12
+signal	PCC1D13
+signal	PCC1D14
+signal	PCC1D15
+signal	nPCC1CE1A
+signal	nPCC1CE2A
+signal	nRDA
+signal	nWEA
+signal	nPCC1ICIORDA
+signal	nPCC1ICIOWRA
+signal	PCC1RESET
+signal	nPCC1WAIT
+signal	nPCC1WP
+signal	PCC1RDY
+signal	PCC1BVD1
+signal	PCC1BVD2
+signal	nPCC1CD1
+signal	nPCC1CD2
+signal	nPCC1VS1
+signal	nPCC1VS2
+signal	nPCC1REG
+signal	VCC1SEL1
+signal	VCC1SEL0
+signal	VCC1VPP1
+signal	VCC1VPP0
+
+# UART 0 (see Table 4.7 in [1])
+signal	TXD0
+signal	RXD0
+signal	nRTS0
+signal	nCTS0
+signal	nDTR0
+signal	nDSR0
+signal	nDCD0
+signal	nRI0
+
+# IrDA (see Table 4.8 in [1])
+signal	MODSEL
+signal	TXD
+signal	nRX
+
+# Printer Interface (see Table 4.9 in [1])
+signal	nSTB
+signal	nAFD
+signal	nERR
+signal	nINIT
+signal	nSLIN
+signal	nACK
+signal	BUSY
+signal	PE
+signal	SLCT
+signal	PPD0
+signal	PPD1
+signal	PPD2
+signal	PPD3
+signal	PPD4
+signal	PPD5
+signal	PPD6
+signal	PPD7
+
+# AFE Interface (see Table 4.10 in [1])
+signal	DOUT
+signal	DIN
+signal	SCLK
+signal	HC1
+signal	FS
+signal	nAFERST
+signal	nAFEPDN
+signal	MCLKO
+signal	OFFHOOK
+signal	RING
+
+# CODEC Interface (see Table 4.11 in [1])
+signal	ACCLK
+signal	nACRST
+signal	nACPD
+signal	SIBDIN
+signal	SIBCLK
+signal	SIBDOUT
+signal	SIBSYNC
+
+# USB Interface (see Table 4.12 in [1])
+signal	nUSBPEN
+signal	nUSBOVR
+signal	USBD1P
+signal	USBD1M
+signal	USBD2P
+signal	USBD2M
+
+# Keyboard Interface (see Table 4.13 in [1])
+signal	nKBCS
+signal	nXIOW
+signal	nXIOR
+signal	KBIRQ0
+signal	KBIRQ1
+
+# IO Port A (see Table 4.14 in [1])
+signal	PA0
+signal	PA1
+signal	PA2
+signal	PA3
+signal	PA4
+signal	PA5
+signal	PA6
+signal	PA7
+
+# IO Port B (see Table 4.15 in [1])
+signal	PB0
+signal	PB1
+signal	PB2
+signal	PB3
+signal	PB4
+signal	PB5
+signal	PB6
+signal	PB7
+
+# IO Port C (see Table 4.16 in [1])
+signal	PC0
+signal	PC1
+signal	PC2
+signal	PC3
+signal	PC4
+signal	PC5
+signal	PC6
+signal	PC7
+
+# IO Port D (see Table 4.17 in [1])
+signal	PD0
+signal	PD1
+signal	PD2
+signal	PD3
+signal	PD4
+signal	PD5
+signal	PD6
+signal	PD7
+
+# IO Port E (see Table 4.18 in [1])
+signal	PE0
+signal	PE1
+signal	PE2
+signal	PE3
+signal	PE4
+signal	PE5
+signal	PE6
+signal	PE7
+
+# 10-bit ADC Interface (see Table 4.19 in [1])
+signal	TSMX
+signal	TSMY
+signal	TSPX
+signal	TSPY
+
+# PS/2 Interface (see Table 4.20 in [1])
+signal	KBCK
+signal	KBDATA
+signal	MSCK
+signal	MSDATA
+
+# System Reset Interface (see Table 4.21 in [1])
+signal	nRESETPI
+signal	nRESETMI
+signal	nRESETPO
+signal	nRESETMO
+
+# Crystal Interface (see Table 4.22 in [1])
+signal	AFECK
+signal	AFECKE
+signal	UCK
+signal	UCKE
+
+# Miscellaneous Interface (see Table 4.23 in [1])
+signal	PWM0
+signal	PWM1
+signal	P80LE
+
+# No Connected Pins (see Table 4.24 in [1])
+signal	NC(1)
+signal	NC(2)
+signal	NC(3)
+signal	NC(4)
+signal	NC(5)
+signal	NC(6)
+signal	NC(7)
+signal	NC(8)
+signal	NC(9)
+signal	NC(10)
+signal	NC(11)
+signal	NC(12)
+signal	NC(13)
+signal	NC(14)
+
+# Power/Ground (see Tabe 4.25 in [1])
+signal	VSS
+signal	VCC
+signal	VCC5
+signal	VCCA
+signal	VCCB
+signal	AVCC1
+signal	AVSS1
+signal	AVCC2
+signal	AVSS2
+signal	AVCC3
+signal	AVSS3
+signal	AVCC4
+signal	AVSS4
+signal	AVCC5
+signal	AVCC6
+signal	AVSS6
+
+# mandatory data registers
+register	BSR	550
+register	BR	1
+
+# instructions
+instruction length 3
+# mandatory instructions
+instruction BYPASS		111	BR
+instruction EXTEST		000	BSR
+instruction SAMPLE/PRELOAD	001	BSR
+
+# boundary scan register
+bit 549 I ? nBS
+bit 548 I ? RING
+bit 547 I ? FS
+bit 546 I ? SCLK
+bit 545 I ? DIN
+bit 544 O ? nAFERST
+bit 543 O ? nAFEPDN
+bit 542 O ? HC1 541 0 Z
+bit 541 C 0 .
+bit 540 O ? OFFHOOK 541 0 Z
+bit 539 O ? MCLKO 541 0 Z
+bit 538 O ? DOUT 541 0 Z
+bit 537 O ? PA0 535 0 Z
+bit 536 I ? PA0
+bit 535 C 0 .
+bit 534 O ? PA1 532 0 Z
+bit 533 I ? PA1
+bit 532 C 0 .
+bit 531 O ? PA2 529 0 Z
+bit 530 I ? PA2
+bit 529 C 0 .
+bit 528 O ? PA3 526 0 Z
+bit 527 I ? PA3
+bit 526 C 0 .
+bit 525 O ? PA4 523 0 Z
+bit 524 I ? PA4
+bit 523 C 0 .
+bit 522 O ? PA5 520 0 Z
+bit 521 I ? PA5
+bit 520 C 0 .
+bit 519 O ? PA6 517 0 Z
+bit 518 I ? PA6
+bit 517 C 0 .
+bit 516 O ? PA7 514 0 Z
+bit 515 I ? PA7
+bit 514 C 0 .
+bit 513 O ? nXIOW
+bit 512 O ? nXIOR
+bit 511 O ? nKBCS
+bit 510 I ? KBIRQ0
+bit 509 I ? KBIRQ1
+bit 508 O ? P80LE
+bit 507 I ? CKIO
+bit 506 I ? nRESETPI
+bit 505 I ? SH_MODE
+bit 504 I ? A12
+bit 503 I ? A11
+bit 502 I ? A10
+bit 501 I ? A9
+bit 500 I ? A8
+bit 499 I ? A7
+bit 498 I ? A6
+bit 497 I ? A5
+bit 496 I ? A4
+bit 495 I ? A3
+bit 494 I ? A2
+bit 493 I ? A1
+bit 492 I ? A0
+bit 491 O ? D31 489 0 Z
+bit 490 I ? D31
+bit 489 C 0 .
+bit 488 O ? D30 489 0 Z
+bit 487 I ? D30
+bit 486 O ? D29 489 0 Z
+bit 485 I ? D29
+bit 484 O ? D28 489 0 Z
+bit 483 I ? D28
+bit 482 O ? D27 489 0 Z
+bit 481 I ? D27
+bit 480 O ? D26 489 0 Z
+bit 479 I ? D26
+bit 478 O ? D25 489 0 Z
+bit 477 I ? D25
+bit 476 O ? D24 489 0 Z
+bit 475 I ? D24
+bit 474 O ? D15 472 0 Z
+bit 473 I ? D15
+bit 472 C 0 .
+bit 471 O ? D14 472 0 Z
+bit 470 I ? D14
+bit 469 O ? D13 472 0 Z
+bit 468 I ? D13
+bit 467 O ? D12 472 0 Z
+bit 466 I ? D12
+bit 465 O ? D11 472 0 Z
+bit 464 I ? D11
+bit 463 O ? D10 472 0 Z
+bit 462 I ? D10
+bit 461 O ? D9 472 0 Z
+bit 460 I ? D9
+bit 459 O ? D8 472 0 Z
+bit 458 I ? D8
+bit 457 O ? D23 455 0 Z
+bit 456 I ? D23
+bit 455 C 0 .
+bit 454 O ? D22 455 0 Z
+bit 453 I ? D22
+bit 452 O ? D21 455 0 Z
+bit 451 I ? D21
+bit 450 O ? D20 455 0 Z
+bit 449 I ? D20
+bit 448 O ? D19 455 0 Z
+bit 447 I ? D19
+bit 446 O ? D18 455 0 Z
+bit 445 I ? D18
+bit 444 O ? D17 455 0 Z
+bit 443 I ? D17
+bit 442 O ? D16 455 0 Z
+bit 441 I ? D16
+bit 440 O ? D7 438 0 Z
+bit 439 I ? D7
+bit 438 C 0 .
+bit 437 O ? D6 438 0 Z
+bit 436 I ? D6
+bit 435 O ? D5 438 0 Z
+bit 434 I ? D5
+bit 433 O ? D4 438 0 Z
+bit 432 I ? D4
+bit 431 O ? D3 438 0 Z
+bit 430 I ? D3
+bit 429 O ? D2 438 0 Z
+bit 428 I ? D2
+bit 427 O ? D1 438 0 Z
+bit 426 I ? D1
+bit 425 O ? D0 438 0 Z
+bit 424 I ? D0
+bit 423 O ? nIRQ0
+bit 422 O ? nRDY 421 0 Z
+bit 421 C 0 .
+bit 420 I ? DRAK1
+bit 419 O ? nDREQ1
+bit 418 I ? DRAK0
+bit 417 O ? nDREQ0
+bit 416 I ? A13
+bit 415 I ? A14
+bit 414 I ? A15
+bit 413 I ? A16
+bit 412 I ? A17
+bit 411 I ? A18
+bit 410 I ? A19
+bit 409 I ? A20
+bit 408 I ? A21
+bit 407 I ? A22
+bit 406 I ? A23
+bit 405 I ? A24
+bit 404 I ? A25
+bit 403 I ? nCS4
+bit 402 I ? nRDWR
+bit 401 I ? nRD
+bit 400 I ? nWE0
+bit 399 I ? nWE1
+bit 398 I ? nWE2
+bit 397 I ? nWE3
+bit 396 I ? nCE2A
+bit 395 I ? nCE1A
+bit 394 I ? nCE2B
+bit 393 I ? nCE1B
+bit 392 O ? nIOIS16 391 0 Z
+bit 391 C 0 .
+bit 390 O ? VCC0SEL1
+bit 389 O ? VCC0SEL0
+bit 388 O ? VCC0VPP1
+bit 387 O ? VCC0VPP0
+bit 386 I ? nPCC0CD2
+bit 385 I ? nPCC0CD1
+bit 384 I ? nPCC0VS2
+bit 383 I ? nPCC0VS1
+bit 382 I ? PCC0BVD2
+bit 381 I ? PCC0BVD1
+bit 380 I ? PCC0RDY
+bit 379 I ? nPCC0WP
+bit 378 I ? nPCC0WAIT
+bit 377 O ? PCC0D0 375 0 Z
+bit 376 I ? PCC0D0
+bit 375 C 0 .
+bit 374 O ? PCC0D8 372 0 Z
+bit 373 I ? PCC0D8
+bit 372 C 0 .
+bit 371 O ? PCC0D1 375 0 Z
+bit 370 I ? PCC0D1
+bit 369 O ? PCC0D9 372 0 Z
+bit 368 I ? PCC0D9
+bit 367 O ? PCC0D2 375 0 Z
+bit 366 I ? PCC0D2
+bit 365 O ? PCC0D10 372 0 Z
+bit 364 I ? PCC0D10
+bit 363 O ? PCC0D3 375 0 Z
+bit 362 I ? PCC0D3
+bit 361 O ? PCC0D11 372 0 Z
+bit 360 I ? PCC0D11
+bit 359 O ? PCC0A25 358 0 Z
+bit 358 C 0 .
+bit 357 O ? PCC0A24 358 0 Z
+bit 356 O ? PCC0A23 358 0 Z
+bit 355 O ? PCC0A22 358 0 Z
+bit 354 O ? PCC0A21 358 0 Z
+bit 353 O ? PCC0A20 358 0 Z
+bit 352 O ? PCC0A19 358 0 Z
+bit 351 O ? PCC0A18 358 0 Z
+bit 350 O ? PCC0A17 358 0 Z
+bit 349 O ? PCC0A16 358 0 Z
+bit 348 O ? PCC0A15 358 0 Z
+bit 347 O ? PCC0A14 358 0 Z
+bit 346 O ? PCC0A13 358 0 Z
+bit 345 O ? PCC0RESET 358 0 Z
+bit 344 O ? nPCC0ICIORDB 358 0 Z
+bit 343 O ? nPCC0ICIOWRB 358 0 Z
+bit 342 O ? nWEB 358 0 Z
+bit 341 O ? nRDB 358 0 Z
+bit 340 O ? nPCC0CE1B 358 0 Z
+bit 339 O ? nPCC0CE2B 358 0 Z
+bit 338 O ? nPCC0REG 358 0 Z
+bit 337 O ? PCC0A12 358 0 Z
+bit 336 O ? PCC0A11 358 0 Z
+bit 335 O ? PCC0A10 358 0 Z
+bit 334 O ? PCC0A9 358 0 Z
+bit 333 O ? PCC0A8 358 0 Z
+bit 332 O ? PCC0A7 358 0 Z
+bit 331 O ? PCC0A6 358 0 Z
+bit 330 O ? PCC0A5 358 0 Z
+bit 329 O ? PCC0A4 358 0 Z
+bit 328 O ? PCC0A3 358 0 Z
+bit 327 O ? PCC0A2 358 0 Z
+bit 326 O ? PCC0A1 358 0 Z
+bit 325 O ? PCC0A0 358 0 Z
+bit 324 O ? PCC0D12 372 0 Z
+bit 323 I ? PCC0D12
+bit 322 O ? PCC0D4 375 0 Z
+bit 321 I ? PCC0D4
+bit 320 O ? PCC0D13 372 0 Z
+bit 319 I ? PCC0D13
+bit 318 O ? PCC0D5 375 0 Z
+bit 317 I ? PCC0D5
+bit 316 O ? PCC0D14 372 0 Z
+bit 315 I ? PCC0D14
+bit 314 O ? PCC0D6 375 0 Z
+bit 313 I ? PCC0D6
+bit 312 O ? PCC0D15 372 0 Z
+bit 311 I ? PCC0D15
+bit 310 O ? PCC0D7 375 0 Z
+bit 309 I ? PCC0D7
+bit 308 O ? PCC1A15 307 0 Z
+bit 307 C 0 .
+bit 306 O ? PCC1A14 307 0 Z
+bit 305 O ? PCC1A13 307 0 Z
+bit 304 O ? PCC1A12 307 0 Z
+bit 303 O ? PCC1A11 307 0 Z
+bit 302 O ? PCC1A10 307 0 Z
+bit 301 O ? PCC1A9 307 0 Z
+bit 300 O ? PCC1A8 307 0 Z
+bit 299 O ? PCC1A7 307 0 Z
+bit 298 O ? PCC1A6 307 0 Z
+bit 297 O ? PCC1A5 307 0 Z
+bit 296 O ? PCC1A4 307 0 Z
+bit 295 O ? PCC1A3 307 0 Z
+bit 294 O ? PCC1A2 307 0 Z
+bit 293 O ? PCC1A1 307 0 Z
+bit 292 O ? PCC1A0 307 0 Z
+bit 291 O ? PCC1D7 289 0 Z
+bit 290 I ? PCC1D7
+bit 289 C 0 .
+bit 288 O ? PCC1D15 286 0 Z
+bit 287 I ? PCC1D15
+bit 286 C 0 .
+bit 285 O ? PCC1D6 289 0 Z
+bit 284 I ? PCC1D6
+bit 283 O ? PCC1D14 286 0 Z
+bit 282 I ? PCC1D14
+bit 281 O ? PCC1D5 289 0 Z
+bit 280 I ? PCC1D5
+bit 279 O ? PCC1D13 286 0 Z
+bit 278 I ? PCC1D13
+bit 277 O ? PCC1D4 289 0 Z
+bit 276 I ? PCC1D4
+bit 275 O ? PCC1D12 286 0 Z
+bit 274 I ? PCC1D12
+bit 273 O ? PCC1D3 289 0 Z
+bit 272 I ? PCC1D3
+bit 271 O ? PCC1D11 286 0 Z
+bit 270 I ? PCC1D11
+bit 269 O ? PCC1D2 289 0 Z
+bit 268 I ? PCC1D2
+bit 267 O ? PCC1D10 286 0 Z
+bit 266 I ? PCC1D10
+bit 265 O ? PCC1D1 289 0 Z
+bit 264 I ? PCC1D1
+bit 263 O ? PCC1D9 286 0 Z
+bit 262 I ? PCC1D9
+bit 261 O ? PCC1D0 289 0 Z
+bit 260 I ? PCC1D0
+bit 259 O ? PCC1D8 286 0 Z
+bit 258 I ? PCC1D8
+bit 257 O ? PCC1A16 307 0 Z
+bit 256 O ? PCC1A17 307 0 Z
+bit 255 O ? PCC1A18 307 0 Z
+bit 254 O ? PCC1A19 307 0 Z
+bit 253 O ? PCC1A20 307 0 Z
+bit 252 O ? PCC1A21 307 0 Z
+bit 251 O ? PCC1A22 307 0 Z
+bit 250 O ? PCC1A23 307 0 Z
+bit 249 O ? PCC1A24 307 0 Z
+bit 248 O ? PCC1A25 307 0 Z
+bit 247 O ? nPCC1REG 307 0 Z
+bit 246 O ? nPCC1CE2A 307 0 Z
+bit 245 O ? nPCC1CE1A 307 0 Z
+bit 244 O ? nRDA 307 0 Z
+bit 243 O ? nWEA 307 0 Z
+bit 242 O ? nPCC1ICIORDA 307 0 Z
+bit 241 O ? nPCC1ICIOWRA 307 0 Z
+bit 240 O ? PCC1RESET 307 0 Z
+bit 239 I ? nPCC1WAIT
+bit 238 I ? nPCC1WP
+bit 237 I ? PCC1RDY
+bit 236 I ? PCC1BVD1
+bit 235 I ? PCC1BVD2
+bit 234 I ? nPCC1VS1
+bit 233 I ? nPCC1VS2
+bit 232 I ? nPCC1CD1
+bit 231 I ? nPCC1CD2
+bit 230 O ? VCC1VPP0
+bit 229 O ? VCC1VPP1
+bit 228 O ? VCC1SEL0
+bit 227 O ? VCC1SEL1
+bit 226 O ? NC(14) 224 0 Z
+bit 225 I ? NC(14)
+bit 224 C 0 .
+bit 223 O ? NC(13) 221 0 Z
+bit 222 I ? NC(13)
+bit 221 C 0 .
+bit 220 O ? NC(12) 218 0 Z
+bit 219 I ? NC(12)
+bit 218 C 0 .
+bit 217 O ? NC(11) 215 0 Z
+bit 216 I ? NC(11)
+bit 215 C 0 .
+bit 214 O ? NC(10) 212 0 Z
+bit 213 I ? NC(10)
+bit 212 C 0 .
+bit 211 O ? NC(9) 209 0 Z
+bit 210 I ? NC(9)
+bit 209 C 0 .
+bit 208 O ? NC(8) 206 0 Z
+bit 207 I ? NC(8)
+bit 206 C 0 .
+bit 205 O ? NC(7) 203 0 Z
+bit 204 I ? NC(7)
+bit 203 C 0 .
+bit 202 O ? NC(6) 200 0 Z
+bit 201 I ? NC(6)
+bit 200 C 0 .
+bit 199 O ? NC(5) 197 0 Z
+bit 198 I ? NC(5)
+bit 197 C 0 .
+bit 196 O ? NC(4) 194 0 Z
+bit 195 I ? NC(4)
+bit 194 C 0 .
+bit 193 O ? NC(3) 191 0 Z
+bit 192 I ? NC(3)
+bit 191 C 0 .
+bit 190 O ? NC(2) 188 0 Z
+bit 189 I ? NC(2)
+bit 188 C 0 .
+bit 187 O ? NC(1) 185 0 Z
+bit 186 I ? NC(1)
+bit 185 C 0 .
+bit 184 O ? PWM0 182 0 Z
+bit 183 I ? PWM0
+bit 182 C 0 .
+bit 181 O ? nRESETMI 179 0 Z
+bit 180 I ? nRESETMI
+bit 179 C 0 .
+bit 178 O ? nRESETPO 176 0 Z
+bit 177 I ? nRESETPO
+bit 176 C 0 .
+bit 175 O ? nRESETMO 173 0 Z
+bit 174 I ? nRESETMO
+bit 173 C 0 .
+bit 172 O ? PWM1 170 0 Z
+bit 171 I ? PWM1
+bit 170 C 0 .
+bit 169 O ? KBCK 167 0 Z
+bit 168 I ? KBCK
+bit 167 C 0 .
+bit 166 O ? KBDATA 164 0 Z
+bit 165 I ? KBDATA
+bit 164 C 0 .
+bit 163 O ? MSCK 161 0 Z
+bit 162 I ? MSCK
+bit 161 C 0 .
+bit 160 O ? MSDATA 158 0 Z
+bit 159 I ? MSDATA
+bit 158 C 0 .
+bit 157 O ? PE7 155 0 Z
+bit 156 I ? PE7
+bit 155 C 0 .
+bit 154 O ? PE6 152 0 Z
+bit 153 I ? PE6
+bit 152 C 0 .
+bit 151 O ? PE5 149 0 Z
+bit 150 I ? PE5
+bit 149 C 0 .
+bit 148 O ? PE4 146 0 Z
+bit 147 I ? PE4
+bit 146 C 0 .
+bit 145 O ? PE3 143 0 Z
+bit 144 I ? PE3
+bit 143 C 0 .
+bit 142 O ? PE2 140 0 Z
+bit 141 I ? PE2
+bit 140 C 0 .
+bit 139 O ? PE1 137 0 Z
+bit 138 I ? PE1
+bit 137 C 0 .
+bit 136 O ? PE0 134 0 Z
+bit 135 I ? PE0
+bit 134 C 0 .
+bit 133 O ? PD7 131 0 Z
+bit 132 I ? PD7
+bit 131 C 0 .
+bit 130 O ? PD6 128 0 Z
+bit 129 I ? PD6
+bit 128 C 0 .
+bit 127 O ? PD5 125 0 Z
+bit 126 I ? PD5
+bit 125 C 0 .
+bit 124 O ? PD4 122 0 Z
+bit 123 I ? PD4
+bit 122 C 0 .
+bit 121 O ? PD3 119 0 Z
+bit 120 I ? PD3
+bit 119 C 0 .
+bit 118 O ? PD2 116 0 Z
+bit 117 I ? PD2
+bit 116 C 0 .
+bit 115 O ? PD1 113 0 Z
+bit 114 I ? PD1
+bit 113 C 0 .
+bit 112 O ? PD0 110 0 Z
+bit 111 I ? PD0
+bit 110 C 0 .
+bit 109 O ? PC7 107 0 Z
+bit 108 I ? PC7
+bit 107 C 0 .
+bit 106 O ? PC6 104 0 Z
+bit 105 I ? PC6
+bit 104 C 0 .
+bit 103 O ? PC5 101 0 Z
+bit 102 I ? PC5
+bit 101 C 0 .
+bit 100 O ? PC4 98 0 Z
+bit 99 I ? PC4
+bit 98 C 0 .
+bit 97 I ? RXD0
+bit 96 I ? nCTS0
+bit 95 I ? nDSR0
+bit 94 I ? nDCD0
+bit 93 I ? nRI0
+bit 92 O ? TXD0
+bit 91 O ? nRTS0
+bit 90 O ? nDTR0
+bit 89 O ? PC3 87 0 Z
+bit 88 I ? PC3
+bit 87 C 0 .
+bit 86 O ? PC2 84 0 Z
+bit 85 I ? PC2
+bit 84 C 0 .
+bit 83 O ? PC1 81 0 Z
+bit 82 I ? PC1
+bit 81 C 0 .
+bit 80 O ? PC0 78 0 Z
+bit 79 I ? PC0
+bit 78 C 0 .
+bit 77 O ? nUSBPEN 75 0 Z
+bit 76 I ? nUSBPEN
+bit 75 C 0 .
+bit 74 I ? nUSBOVR
+bit 73 O ? MODSEL 71 0 Z
+bit 72 I ? MODSEL
+bit 71 C 0 .
+bit 70 O ? TXD
+bit 69 O ? nRX 67 0 Z
+bit 68 I ? nRX
+bit 67 C 0 .
+bit 66 O ? PPD0 64 0 Z
+bit 65 I ? PPD0
+bit 64 C 0 .
+bit 63 O ? PPD1 64 0 Z
+bit 62 I ? PPD1
+bit 61 O ? PPD2 64 0 Z
+bit 60 I ? PPD2
+bit 59 O ? PPD3 64 0 Z
+bit 58 I ? PPD3
+bit 57 O ? nINIT 56 0 Z
+bit 56 C 0 .
+bit 55 I ? nERR
+bit 54 O ? nAFD 56 0 Z
+bit 53 O ? nSTB 56 0 Z
+bit 52 I ? SLCT
+bit 51 I ? PE
+bit 50 I ? BUSY
+bit 49 I ? nACK
+bit 48 O ? nSLIN 56 0 Z
+bit 47 O ? PPD4 64 0 Z
+bit 46 I ? PPD4
+bit 45 O ? PPD5 64 0 Z
+bit 44 I ? PPD5
+bit 43 O ? PPD6 64 0 Z
+bit 42 I ? PPD6
+bit 41 O ? PPD7 64 0 Z
+bit 40 I ? PPD7
+bit 39 O ? PB0 37 0 Z
+bit 38 I ? PB0
+bit 37 C 0 .
+bit 36 O ? PB1 34 0 Z
+bit 35 I ? PB1
+bit 34 C 0 .
+bit 33 O ? PB2 31 0 Z
+bit 32 I ? PB2
+bit 31 C 0 .
+bit 30 O ? PB3 28 0 Z
+bit 29 I ? PB3
+bit 28 C 0 .
+bit 27 O ? PB4 25 0 Z
+bit 26 I ? PB4
+bit 25 C 0 .
+bit 24 O ? PB5 22 0 Z
+bit 23 I ? PB5
+bit 22 C 0 .
+bit 21 O ? PB6 19 0 Z
+bit 20 I ? PB6
+bit 19 C 0 .
+bit 18 O ? PB7 16 0 Z
+bit 17 I ? PB7
+bit 16 C 0 .
+bit 15 O ? nACPD 13 0 Z
+bit 14 I ? nACPD
+bit 13 C 0 .
+bit 12 O ? ACCLK 11 0 Z
+bit 11 C 0 .
+bit 10 I ? SIBDIN
+bit 9 O ? SIBCLK 7 0 Z
+bit 8 I ? SIBCLK
+bit 7 C 0 .
+bit 6 O ? SIBDOUT 5 0 Z
+bit 5 C 0 .
+bit 4 O ? SIBSYNC 2 0 Z
+bit 3 I ? SIBSYNC
+bit 2 C 0 .
+bit 1 O ? nACRST 0 0 Z
+bit 0 C 0 .
--- a/sie_fs/usr/local/share/urjtag/hitachi/sh7727/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/hitachi/sh7727/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 381 2003-02-25 09:43:54Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000	sh7727	V0
--- a/sie_fs/usr/local/share/urjtag/hitachi/sh7727/sh7727
+++ b/sie_fs/usr/local/share/urjtag/hitachi/sh7727/sh7727
@@ -0,0 +1,673 @@
+#
+# $Id: sh7727 558 2003-09-05 21:09:14Z telka $
+#
+# JTAG declarations for SH7727
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7727 Hardware Manual",
+#     2003-01-31, ADE-602-209C Rev. 4.0
+#
+
+signal VCC1
+signal XTAL2
+signal EXTAL2
+signal VSS1
+signal MD1
+signal MD2
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal VEPWC
+signal VCPWC
+signal MD5
+signal BREQ
+signal BACK
+signal VSS2
+signal CKIO2
+signal VCC2
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal D25
+signal D24
+signal VSS3
+signal D23
+signal VCC3
+signal D22
+signal D21
+signal D20
+signal VSS4
+signal D19
+signal VCC4
+signal D18
+signal D17
+signal D16
+signal D15
+signal VSS5
+signal D14
+signal VCC5
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS6
+signal D5
+signal VCC6
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal VSS7
+signal A3
+signal VCC7
+signal A4
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal VSS8
+signal A12
+signal VCC8
+signal A13
+signal A14
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal VSS9
+signal A21
+signal VCC9
+signal A22
+signal A23
+signal VSS10
+signal A24
+signal VCC10
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal VSS11
+signal WE3
+signal VCC11
+signal RDWR
+signal PTE7
+signal CS0
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal AFE_HC1
+signal AFE_RLYCNT
+signal VSS12
+signal AFE_SCLK
+signal VCC12
+signal AFE_FS
+signal AFE_RXIN
+signal AFE_TXOUT
+signal AFE_RDET
+signal USB1D_SUSPEND
+signal USB1_OVR_CRNT
+signal USB2_OVR_CRNT
+signal RTS2
+signal USB1_PWR_EN
+signal USB2_PWR_EN
+signal CKE
+signal RAS
+signal PTJ1
+signal CAS
+signal VSS13
+signal PTJ3
+signal VCC13
+signal PTJ4
+signal PTJ5
+signal VSS14
+signal CL1
+signal VCC14
+signal DON
+signal M_DISP
+signal FLM
+signal TDO
+signal DRAK0
+signal DACK0
+signal WAPIN
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMDO
+signal PTG5
+signal PTG4
+signal PTG3
+signal PTG2
+signal VSS15
+signal PTG1
+signal VCC15
+signal PTG0
+signal VSS16
+signal TRST
+signal VCC16
+signal TMS
+signal TDI
+signal TCK
+signal PTF3
+signal PTF2
+signal PTF1
+signal PTF0
+signal MD0
+signal VCC17
+signal CAP1
+signal VSS17
+signal VSS18
+signal CAP2
+signal VCC18
+signal PTH6
+signal VSS19
+signal VCC19
+signal XTAL
+signal EXTAL
+signal LCD15
+signal LCD14
+signal LCD13
+signal LCD12
+signal STATUS0
+signal STATUS1
+signal CL2
+signal VSS20
+signal CKIO
+signal VCC20
+signal TXD0
+signal SCK0
+signal TXD_SIO
+signal SIOMCLK
+signal TXD2
+signal SCK_SIO
+signal SIOFSYNC
+signal RXD0
+signal RXD_SIO
+signal VSS21
+signal RXD2
+signal VCC21
+signal CTS2
+signal LCD11
+signal LCD10
+signal LCD9
+signal VSS22
+signal LCD8
+signal VCC22
+signal LCD7
+signal LCD6
+signal LCD5
+signal LCD4
+signal LCD3
+signal LCD2
+signal LCD1
+signal LCD0
+signal DREQ0
+signal LCK
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal VCC23
+signal AVCC1
+signal USB1_P
+signal USB1_M
+signal AVSS1
+signal USB2_P
+signal USB2_M
+signal AVCC2
+signal AVSS2
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal AVCC3
+signal AN6
+signal AN7
+
+register	BSR	392
+register	BR	1
+register	DIR	32
+
+instruction length 16
+
+instruction	EXTEST		0000111111111111	BSR
+instruction	SAMPLE/PRELOAD	0100111111111111	BSR
+instruction	IDCODE		1110111111111111	DIR
+instruction	BYPASS		1111111111111111	BR
+
+bit 391 I 1 D31
+bit 390 I 1 D30
+bit 389 I 1 D29
+bit 388 I 1 D28
+bit 387 I 1 D27
+bit 386 I 1 D26
+bit 385 I 1 D25
+bit 384 I 1 D24
+bit 383 I 1 D23
+bit 382 I 1 D22
+bit 381 I 1 D21
+bit 380 I 1 D20
+bit 379 I 1 D19
+bit 378 I 1 D18
+bit 377 I 1 D17
+bit 376 I 1 D16
+bit 375 I 1 D15
+bit 374 I 1 D14
+bit 373 I 1 D13
+bit 372 I 1 D12
+bit 371 I 1 D11
+bit 370 I 1 D10
+bit 369 I 1 D9
+bit 368 I 1 D8
+bit 367 I 1 D7
+bit 366 I 1 D6
+bit 365 I 1 D5
+bit 364 I 1 D4
+bit 363 I 1 D3
+bit 362 I 1 D2
+bit 361 I 1 D1
+bit 360 I 1 D0
+bit 359 I 1 MD1
+bit 358 I 1 MD2
+bit 357 I 1 NMI
+bit 356 I 1 IRQ0
+bit 355 I 1 IRQ1
+bit 354 I 1 IRQ2
+bit 353 I 1 IRQ3
+bit 352 I 1 IRQ4
+bit 351 I 1 MD5
+bit 350 I 1 BREQ
+bit 349 O 1 VEPWC 314 1 Z
+bit 348 O 1 VCPWC 313 1 Z
+bit 347 O 1 BACK 312 1 Z
+bit 346 O 1 D31 311 1 Z
+bit 345 O 1 D30 310 1 Z
+bit 344 O 1 D29 309 1 Z
+bit 343 O 1 D28 308 1 Z
+bit 342 O 1 D27 307 1 Z
+bit 341 O 1 D26 306 1 Z
+bit 340 O 1 D25 305 1 Z
+bit 339 O 1 D24 304 1 Z
+bit 338 O 1 D23 303 1 Z
+bit 337 O 1 D22 302 1 Z
+bit 336 O 1 D21 301 1 Z
+bit 335 O 1 D20 300 1 Z
+bit 334 O 1 D19 299 1 Z
+bit 333 O 1 D18 298 1 Z
+bit 332 O 1 D17 297 1 Z
+bit 331 O 1 D16 296 1 Z
+bit 330 O 1 D15 295 1 Z
+bit 329 O 1 D14 294 1 Z
+bit 328 O 1 D13 293 1 Z
+bit 327 O 1 D12 292 1 Z
+bit 326 O 1 D11 291 1 Z
+bit 325 O 1 D10 290 1 Z
+bit 324 O 1 D9 289 1 Z
+bit 323 O 1 D8 288 1 Z
+bit 322 O 1 D7 287 1 Z
+bit 321 O 1 D6 286 1 Z
+bit 320 O 1 D5 285 1 Z
+bit 319 O 1 D4 284 1 Z
+bit 318 O 1 D3 283 1 Z
+bit 317 O 1 D2 282 1 Z
+bit 316 O 1 D1 281 1 Z
+bit 315 O 1 D0 280 1 Z
+bit 314 C 1 *
+bit 313 C 1 *
+bit 312 C 1 *
+bit 311 C 1 *
+bit 310 C 1 *
+bit 309 C 1 *
+bit 308 C 1 *
+bit 307 C 1 *
+bit 306 C 1 *
+bit 305 C 1 *
+bit 304 C 1 *
+bit 303 C 1 *
+bit 302 C 1 *
+bit 301 C 1 *
+bit 300 C 1 *
+bit 299 C 1 *
+bit 298 C 1 *
+bit 297 C 1 *
+bit 296 C 1 *
+bit 295 C 1 *
+bit 294 C 1 *
+bit 293 C 1 *
+bit 292 C 1 *
+bit 291 C 1 *
+bit 290 C 1 *
+bit 289 C 1 *
+bit 288 C 1 *
+bit 287 C 1 *
+bit 286 C 1 *
+bit 285 C 1 *
+bit 284 C 1 *
+bit 283 C 1 *
+bit 282 C 1 *
+bit 281 C 1 *
+bit 280 C 1 *
+bit 279 I 1 BS
+bit 278 I 1 WE2
+bit 277 I 1 WE3
+bit 276 I 1 PTE7
+bit 275 I 1 CS4
+bit 274 I 1 CS5
+bit 273 I 1 CE2A
+bit 272 I 1 CE2B
+bit 271 I 1 AFE_HC1
+bit 270 I 1 AFE_RLYCNT
+bit 269 I 1 AFE_SCLK
+bit 268 I 1 AFE_FS
+bit 267 I 1 AFE_RXIN
+bit 266 I 1 AFE_TXOUT
+bit 265 O 1 A0 217 1 Z
+bit 264 O 1 A1 216 1 Z
+bit 263 O 1 A2 215 1 Z
+bit 262 O 1 A3 214 1 Z
+bit 261 O 1 A4 213 1 Z
+bit 260 O 1 A5 212 1 Z
+bit 259 O 1 A6 211 1 Z
+bit 258 O 1 A7 210 1 Z
+bit 257 O 1 A8 209 1 Z
+bit 256 O 1 A9 208 1 Z
+bit 255 O 1 A10 207 1 Z
+bit 254 O 1 A11 206 1 Z
+bit 253 O 1 A12 205 1 Z
+bit 252 O 1 A13 204 1 Z
+bit 251 O 1 A14 203 1 Z
+bit 250 O 1 A15 202 1 Z
+bit 249 O 1 A16 201 1 Z
+bit 248 O 1 A17 200 1 Z
+bit 247 O 1 A18 199 1 Z
+bit 246 O 1 A19 198 1 Z
+bit 245 O 1 A20 197 1 Z
+bit 244 O 1 A21 196 1 Z
+bit 243 O 1 A22 195 1 Z
+bit 242 O 1 A23 194 1 Z
+bit 241 O 1 A24 193 1 Z
+bit 240 O 1 A25 192 1 Z
+bit 239 O 1 BS 191 1 Z
+bit 238 O 1 RD 190 1 Z
+bit 237 O 1 WE0 189 1 Z
+bit 236 O 1 WE1 188 1 Z
+bit 235 O 1 WE2 187 1 Z
+bit 234 O 1 WE3 186 1 Z
+bit 233 O 1 RDWR 185 1 Z
+bit 232 O 1 PTE7 184 1 Z
+bit 231 O 1 CS0 183 1 Z
+bit 230 O 1 CS2 182 1 Z
+bit 229 O 1 CS3 181 1 Z
+bit 228 O 1 CS4 180 1 Z
+bit 227 O 1 CS5 179 1 Z
+bit 226 O 1 CS6 178 1 Z
+bit 225 O 1 CE2A 177 1 Z
+bit 224 O 1 CE2B 176 1 Z
+bit 223 O 1 AFE_HC1 175 1 Z
+bit 222 O 1 AFE_RLYCNT 174 1 Z
+bit 221 O 1 AFE_SCLK 173 1 Z
+bit 220 O 1 AFE_FS 172 1 Z
+bit 219 O 1 AFE_RXIN 171 1 Z
+bit 218 O 1 AFE_TXOUT 170 1 Z
+bit 217 C 1 *
+bit 216 C 1 *
+bit 215 C 1 *
+bit 214 C 1 *
+bit 213 C 1 *
+bit 212 C 1 *
+bit 211 C 1 *
+bit 210 C 1 *
+bit 209 C 1 *
+bit 208 C 1 *
+bit 207 C 1 *
+bit 206 C 1 *
+bit 205 C 1 *
+bit 204 C 1 *
+bit 203 C 1 *
+bit 202 C 1 *
+bit 201 C 1 *
+bit 200 C 1 *
+bit 199 C 1 *
+bit 198 C 1 *
+bit 197 C 1 *
+bit 196 C 1 *
+bit 195 C 1 *
+bit 194 C 1 *
+bit 193 C 1 *
+bit 192 C 1 *
+bit 191 C 1 *
+bit 190 C 1 *
+bit 189 C 1 *
+bit 188 C 1 *
+bit 187 C 1 *
+bit 186 C 1 *
+bit 185 C 1 *
+bit 184 C 1 *
+bit 183 C 1 *
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 I 1 AFE_RDET
+bit 168 I 1 USB1D_SUSPEND
+bit 167 I 1 USB1_OVR_CRNT
+bit 166 I 1 USB2_OVR_CRNT
+bit 165 I 1 RTS2
+bit 164 I 1 USB1_PWR_EN
+bit 163 I 1 USB2_PWR_EN
+bit 162 I 1 CKE
+bit 161 I 1 RAS
+bit 160 I 1 PTJ1
+bit 159 I 1 CAS
+bit 158 I 1 PTJ0
+bit 157 I 1 PTJ4
+bit 156 I 1 PTJ5
+bit 155 I 1 CL1
+bit 154 I 1 DON
+bit 153 I 1 M_DISP
+bit 152 I 1 FLM
+bit 151 I 1 WAPIN
+bit 150 I 1 PTH6
+bit 149 I 1 IOIS16
+bit 148 I 1 PTG5
+bit 147 I 1 PTG4
+bit 146 I 1 PTG3
+bit 145 I 1 PTG2
+bit 144 I 1 PTG1
+bit 143 I 1 PTG0
+bit 142 I 1 ADTRG
+bit 141 I 1 PTF3
+bit 140 I 1 PTF2
+bit 139 I 1 PTF1
+bit 138 I 1 PTF0
+bit 137 I 1 MD0
+bit 136 O 1 AFE_RDET 109 1 Z
+bit 135 O 1 USB1D_SUSPEND 108 1 Z
+bit 134 O 1 RTS2 107 1 Z
+bit 133 O 1 USB1_PWR_EN 106 1 Z
+bit 132 O 1 USB2_PWR_EN 105 1 Z
+bit 131 O 1 CKE 104 1 Z
+bit 130 O 1 RAS 103 1 Z
+bit 129 O 1 PTJ1 102 1 Z
+bit 128 O 1 CAS 101 1 Z
+bit 127 O 1 PTJ3 100 1 Z
+bit 126 O 1 PTJ4 99 1 Z
+bit 125 O 1 PTJ5 98 1 Z
+bit 124 O 1 CL1 97 1 Z
+bit 123 O 1 DON 96 1 Z
+bit 122 O 1 M_DISP 95 1 Z
+bit 121 O 1 FLM 94 1 Z
+bit 120 O 1 DRAK0 93 1 Z
+bit 119 O 1 DACK0 92 1 Z
+bit 118 O 1 PTG5 91 1 Z
+bit 117 O 1 PTG3 90 1 Z
+bit 116 O 1 PTG2 89 1 Z
+bit 115 O 1 PTG1 88 1 Z
+bit 114 O 1 PTG0 87 1 Z
+bit 113 O 1 PTF3 86 1 Z
+bit 112 O 1 PTF2 85 1 Z
+bit 111 O 1 PTF1 84 1 Z
+bit 110 O 1 PTF0 83 1 Z
+bit 109 C 1 *
+bit 108 C 1 *
+bit 107 C 1 *
+bit 106 C 1 *
+bit 105 C 1 *
+bit 104 C 1 *
+bit 103 C 1 *
+bit 102 C 1 *
+bit 101 C 1 *
+bit 100 C 1 *
+bit 99 C 1 *
+bit 98 C 1 *
+bit 97 C 1 *
+bit 96 C 1 *
+bit 95 C 1 *
+bit 94 C 1 *
+bit 93 C 1 *
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 I 1 LCD15
+bit 81 I 1 LCD14
+bit 80 I 1 LCD13
+bit 79 I 1 LCD12
+bit 78 I 1 STATUS0
+bit 77 I 1 STATUS1
+bit 76 I 1 CL2
+bit 75 I 1 SCK0
+bit 74 I 1 SIOMCLK
+bit 73 I 1 SCK_SIO
+bit 72 I 1 SIOFSYNC
+bit 71 I 1 RXD0
+bit 70 I 1 RXD2
+bit 69 I 1 LCD7
+bit 68 I 1 LCD6
+bit 67 I 1 LCD1
+bit 66 I 1 LCD0
+bit 65 I 1 DREQ0
+bit 64 I 1 LCK
+bit 63 I 1 RXD_SIO
+bit 62 I 1 CTS2
+bit 61 I 1 LCD11
+bit 60 I 1 LCD10
+bit 59 I 1 LCD9
+bit 58 I 1 LCD8
+bit 57 I 1 LCD5
+bit 56 I 1 LCD4
+bit 55 I 1 LCD3
+bit 54 I 1 LCD2
+bit 53 I 1 MD3
+bit 52 I 1 MD4
+bit 51 O 1 LCD15 25 1 Z
+bit 50 O 1 LCD14 24 1 Z
+bit 49 O 1 LCD13 23 1 Z
+bit 48 O 1 LCD12 22 1 Z
+bit 47 O 1 STATUS0 21 1 Z
+bit 46 O 1 STATUS1 20 1 Z
+bit 45 O 1 CL2 19 1 Z
+bit 44 O 1 TXD0 18 1 Z
+bit 43 O 1 SCK0 17 1 Z
+bit 42 O 1 TXD_SIO 16 1 Z
+bit 41 O 1 SIOMCLK 15 1 Z
+bit 40 O 1 TXD2 14 1 Z
+bit 39 O 1 SCK_SIO 13 1 Z
+bit 38 O 1 SIOFSYNC 12 1 Z
+bit 37 O 1 LCD11 11 1 Z
+bit 36 O 1 LCD10 10 1 Z
+bit 35 O 1 LCD9 9 1 Z
+bit 34 O 1 LCD8 8 1 Z
+bit 33 O 1 LCD7 7 1 Z
+bit 32 O 1 LCD6 6 1 Z
+bit 31 O 1 LCD5 5 1 Z
+bit 30 O 1 LCD4 4 1 Z
+bit 29 O 1 LCD3 3 1 Z
+bit 28 O 1 LCD2 2 1 Z
+bit 27 O 1 LCD1 1 1 Z
+bit 26 O 1 LCD0 0 1 Z
+bit 25 C 1 *
+bit 24 C 1 *
+bit 23 C 1 *
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- a/sie_fs/usr/local/share/urjtag/hitachi/sh7729/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/hitachi/sh7729/STEPPINGS
@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 580 2003-10-20 04:47:56Z telka $
+#
+# Copyright (C) 2003 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Matan Ziv-Av <matan@svgalib.org>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000	sh7729	V0
--- a/sie_fs/usr/local/share/urjtag/hitachi/sh7729/sh7729
+++ b/sie_fs/usr/local/share/urjtag/hitachi/sh7729/sh7729
@@ -0,0 +1,587 @@
+#
+# $Id: sh7729,v 1.0 2003/18/10 21:09:11
+#
+# JTAG declarations for SH7729
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Balazs Beregnyei <bereg@impulzus.sch.bme.hu>, 2003.
+#
+# Documentation:
+# [1] Hitachi, Ltd., "Hitachi SuperH RISC Engine SH7729 Hardware Manual"
+#
+
+signal MD1
+signal MD2
+signal VCC0
+signal XTAL2
+signal EXTAL2
+signal VSS0
+signal NMI
+signal IRQ0
+signal IRQ1
+signal IRQ2
+signal IRQ3
+signal IRQ4
+signal D31
+signal D30
+signal D29
+signal D28
+signal D27
+signal D26
+signal VSS1
+signal D25
+signal VCC1
+signal D24
+signal D23
+signal D22
+signal D21
+signal D20
+signal VSS2
+signal D19
+signal VCC2
+signal D18
+signal D17
+signal D16
+signal VSS3
+signal D15
+signal VCC3
+signal D14
+signal D13
+signal D12
+signal D11
+signal D10
+signal D9
+signal D8
+signal D7
+signal D6
+signal VSS4
+signal D5
+signal VCC4
+signal D4
+signal D3
+signal D2
+signal D1
+signal D0
+signal A0
+signal A1
+signal A2
+signal A3
+signal VSS5
+signal A4
+signal VCC5
+signal A5
+signal A6
+signal A7
+signal A8
+signal A9
+signal A10
+signal A11
+signal A12
+signal A13
+signal VSS6
+signal A14
+signal VCC6
+signal A15
+signal A16
+signal A17
+signal A18
+signal A19
+signal A20
+signal A21
+signal VSS7
+signal A22
+signal VCC7
+signal A23
+signal VSS8
+signal A24
+signal VCC8
+signal A25
+signal BS
+signal RD
+signal WE0
+signal WE1
+signal WE2
+signal WE3
+signal RDWR
+signal AUDSYNC
+signal VSS9
+signal CS0
+signal VCC9
+signal CS2
+signal CS3
+signal CS4
+signal CS5
+signal CS6
+signal CE2A
+signal CE2B
+signal CKE
+signal RAS3L
+signal PTJ1
+signal CASL
+signal VSS10
+signal CASU
+signal VCC10
+signal PTJ4
+signal PTJ5
+signal DACK0
+signal DACK1
+signal PTE6
+signal PTE3
+signal RAS3U
+signal PTE1
+signal TDO
+signal BACK
+signal BREQ
+signal WAIT
+signal RESETM
+signal ADTRG
+signal IOIS16
+signal ASEMD0
+signal ASEBRKAK
+signal CKIO2
+signal AUDATA3
+signal AUDATA2
+signal VSS11
+signal AUDATA1
+signal VCC11
+signal AUDATA0
+signal TRST
+signal TMS
+signal TDI
+signal TCK
+signal IRLS3
+signal IRLS2
+signal IRLS1
+signal IRLS0
+signal MD0
+signal VCC12
+signal CAP1
+signal VSS12
+signal VSS13
+signal CAP2
+signal VCC13
+signal AUDCK
+signal VSS14
+signal VSS15
+signal VCC15
+signal XTAL
+signal EXTAL
+signal STATUS0
+signal STATUS1
+signal TCLK
+signal IRQOUT
+signal VSS16
+signal CKIO
+signal VCC16
+signal TXD0
+signal SCK0
+signal TXD1
+signal SCK1
+signal TXD2
+signal SCK2
+signal RTS2
+signal RXD0
+signal RXD1
+signal VSS17
+signal RXD2
+signal VCC17
+signal CTS2
+signal MCS7
+signal MCS6
+signal MCS5
+signal MCS4
+signal VSS18
+signal WAKEUP
+signal VCC18
+signal RESETOUT
+signal MCS3
+signal MCS2
+signal MCS1
+signal MCS0
+signal DRAK0
+signal DRAK1
+signal DREQ0
+signal DREQ1
+signal RESETP
+signal CA
+signal MD3
+signal MD4
+signal MD5
+signal VSS19
+signal AN0
+signal AN1
+signal AN2
+signal AN3
+signal AN4
+signal AN5
+signal VCC19
+signal AN6
+signal AN7
+signal VSS20
+
+register	BSR	339
+register	BR	1
+register	DIR	32
+
+instruction length 16
+
+instruction	EXTEST		0000111111111111	BSR
+instruction	SAMPLE/PRELOAD	0100111111111111	BSR
+instruction	IDCODE		1110111111111111	DIR
+instruction	BYPASS		1111111111111111	BR
+
+bit 338 I 1 D31
+bit 337 I 1 D30
+bit 336 I 1 D29
+bit 335 I 1 D28
+bit 334 I 1 D27
+bit 333 I 1 D26
+bit 332 I 1 D25
+bit 331 I 1 D24
+bit 330 I 1 D23
+bit 329 I 1 D22
+bit 328 I 1 D21
+bit 327 I 1 D20
+bit 326 I 1 D19
+bit 325 I 1 D18
+bit 324 I 1 D17
+bit 323 I 1 D16
+bit 322 I 1 D15
+bit 321 I 1 D14
+bit 320 I 1 D13
+bit 319 I 1 D12
+bit 318 I 1 D11
+bit 317 I 1 D10
+bit 316 I 1 D9
+bit 315 I 1 D8
+bit 314 I 1 D7
+bit 313 I 1 D6
+bit 312 I 1 D5
+bit 311 I 1 D4
+bit 310 I 1 D3
+bit 309 I 1 D2
+bit 308 I 1 D1
+bit 307 I 1 D0
+bit 306 I 1 MD1
+bit 305 I 1 MD2
+bit 304 I 1 NMI
+bit 303 I 1 IRQ0
+bit 302 I 1 IRQ1
+bit 301 I 1 IRQ2
+bit 300 I 1 IRQ3
+bit 299 I 1 IRQ4
+bit 298 O 1 D31 266 1 Z
+bit 297 O 1 D30 265 1 Z
+bit 296 O 1 D29 264 1 Z
+bit 295 O 1 D28 263 1 Z
+bit 294 O 1 D27 262 1 Z
+bit 293 O 1 D26 261 1 Z
+bit 292 O 1 D25 260 1 Z
+bit 291 O 1 D24 259 1 Z
+bit 290 O 1 D23 258 1 Z
+bit 289 O 1 D22 257 1 Z
+bit 288 O 1 D21 256 1 Z
+bit 287 O 1 D20 255 1 Z
+bit 286 O 1 D19 254 1 Z
+bit 285 O 1 D18 253 1 Z
+bit 284 O 1 D17 252 1 Z
+bit 283 O 1 D16 251 1 Z
+bit 282 O 1 D15 250 1 Z
+bit 281 O 1 D14 249 1 Z
+bit 280 O 1 D13 248 1 Z
+bit 279 O 1 D12 247 1 Z
+bit 278 O 1 D11 246 1 Z
+bit 277 O 1 D10 245 1 Z
+bit 276 O 1 D9 244 1 Z
+bit 275 O 1 D8 243 1 Z
+bit 274 O 1 D7 242 1 Z
+bit 273 O 1 D6 241 1 Z
+bit 272 O 1 D5 240 1 Z
+bit 271 O 1 D4 239 1 Z
+bit 270 O 1 D3 238 1 Z
+bit 269 O 1 D2 237 1 Z
+bit 268 O 1 D1 236 1 Z
+bit 267 O 1 D0 235 1 Z
+bit 266 C 1 *
+bit 265 C 1 *
+bit 264 C 1 *
+bit 263 C 1 *
+bit 262 C 1 *
+bit 261 C 1 *
+bit 260 C 1 *
+bit 259 C 1 *
+bit 258 C 1 *
+bit 257 C 1 *
+bit 256 C 1 *
+bit 255 C 1 *
+bit 254 C 1 *
+bit 253 C 1 *
+bit 252 C 1 *
+bit 251 C 1 *
+bit 250 C 1 *
+bit 249 C 1 *
+bit 248 C 1 *
+bit 247 C 1 *
+bit 246 C 1 *
+bit 245 C 1 *
+bit 244 C 1 *
+bit 243 C 1 *
+bit 242 C 1 *
+bit 241 C 1 *
+bit 240 C 1 *
+bit 239 C 1 *
+bit 238 C 1 *
+bit 237 C 1 *
+bit 236 C 1 *
+bit 235 C 1 *
+bit 234 I 1 BS
+bit 233 I 1 WE2
+bit 232 I 1 WE3
+bit 231 I 1 AUDSYNC
+bit 230 I 1 CS2
+bit 229 I 1 CS3
+bit 228 I 1 CS4
+bit 227 I 1 CS5
+bit 226 I 1 CE2A
+bit 225 I 1 CE2B
+bit 224 O 1 A0 182 1 Z
+bit 223 O 1 A1 181 1 Z
+bit 222 O 1 A2 180 1 Z
+bit 221 O 1 A3 179 1 Z
+bit 220 O 1 A4 178 1 Z
+bit 219 O 1 A5 177 1 Z
+bit 218 O 1 A6 176 1 Z
+bit 217 O 1 A7 175 1 Z
+bit 216 O 1 A8 174 1 Z
+bit 215 O 1 A9 173 1 Z
+bit 214 O 1 A10 172 1 Z
+bit 213 O 1 A11 171 1 Z
+bit 212 O 1 A12 170 1 Z
+bit 211 O 1 A13 169 1 Z
+bit 210 O 1 A14 168 1 Z
+bit 209 O 1 A15 167 1 Z
+bit 208 O 1 A16 166 1 Z
+bit 207 O 1 A17 165 1 Z
+bit 206 O 1 A18 164 1 Z
+bit 205 O 1 A19 163 1 Z
+bit 204 O 1 A20 162 1 Z
+bit 203 O 1 A21 161 1 Z
+bit 202 O 1 A22 160 1 Z
+bit 201 O 1 A23 159 1 Z
+bit 200 O 1 A24 158 1 Z
+bit 199 O 1 A25 157 1 Z
+bit 198 O 1 BS 156 1 Z
+bit 197 O 1 RD 155 1 Z
+bit 196 O 1 WE0 154 1 Z
+bit 195 O 1 WE1 153 1 Z
+bit 194 O 1 WE2 152 1 Z
+bit 193 O 1 WE3 151 1 Z
+bit 192 O 1 RDWR 150 1 Z
+bit 191 O 1 AUDSYNC 149 1 Z
+bit 190 O 1 CS0 148 1 Z
+bit 189 O 1 CS2 147 1 Z
+bit 188 O 1 CS3 146 1 Z
+bit 187 O 1 CS4 145 1 Z
+bit 186 O 1 CS5 144 1 Z
+bit 185 O 1 CS6 143 1 Z
+bit 184 O 1 CE2A 142 1 Z
+bit 183 O 1 CE2B 141 1 Z
+bit 182 C 1 *
+bit 181 C 1 *
+bit 180 C 1 *
+bit 179 C 1 *
+bit 178 C 1 *
+bit 177 C 1 *
+bit 176 C 1 *
+bit 175 C 1 *
+bit 174 C 1 *
+bit 173 C 1 *
+bit 172 C 1 *
+bit 171 C 1 *
+bit 170 C 1 *
+bit 169 C 1 *
+bit 168 C 1 *
+bit 167 C 1 *
+bit 166 C 1 *
+bit 165 C 1 *
+bit 164 C 1 *
+bit 163 C 1 *
+bit 162 C 1 *
+bit 161 C 1 *
+bit 160 C 1 *
+bit 159 C 1 *
+bit 158 C 1 *
+bit 157 C 1 *
+bit 156 C 1 *
+bit 155 C 1 *
+bit 154 C 1 *
+bit 153 C 1 *
+bit 152 C 1 *
+bit 151 C 1 *
+bit 150 C 1 *
+bit 149 C 1 *
+bit 148 C 1 *
+bit 147 C 1 *
+bit 146 C 1 *
+bit 145 C 1 *
+bit 144 C 1 *
+bit 143 C 1 *
+bit 142 C 1 *
+bit 141 C 1 *
+bit 140 I 1 CKE
+bit 139 I 1 RAS3L
+bit 138 I 1 RAS2L
+bit 137 I 1 CASLL
+bit 136 I 1 CASLH
+bit 135 I 1 CASHL
+bit 134 I 1 CASHH
+bit 133 I 1 DACK0
+bit 132 I 1 DACK1
+bit 131 I 1 CAS2L
+bit 130 I 1 CAS2H
+bit 129 I 1 RAS3U
+bit 128 I 1 RAS2U
+bit 127 I 1 BREQ
+bit 126 I 1 WAIT
+bit 125 I 1 AUDCK
+bit 124 I 1 IOIS16
+bit 123 I 1 ASEBRKAK
+bit 122 I 1 PTG4
+bit 121 I 1 AUDATA3
+bit 120 I 1 AUDATA2
+bit 119 I 1 AUDATA1
+bit 118 I 1 AUDATA0
+bit 117 I 1 ADTRG
+bit 116 I 1 IRLS3
+bit 115 I 1 IRLS2
+bit 114 I 1 IRLS1
+bit 113 I 1 IRLS0
+bit 112 I 1 MD0
+bit 111 O 1 CKE 92 1 Z
+bit 110 O 1 RAS3L 91 1 Z
+bit 109 O 1 RAS2L 90 1 Z
+bit 108 O 1 CASLL 89 1 Z
+bit 107 O 1 CASLH 88 1 Z
+bit 106 O 1 CASHL 87 1 Z
+bit 105 O 1 CASHH 86 1 Z
+bit 104 O 1 DACK0 85 1 Z
+bit 103 O 1 DACK1 84 1 Z
+bit 102 O 1 CAS2L 83 1 Z
+bit 101 O 1 CAS2H 82 1 Z
+bit 100 O 1 RAS3U 81 1 Z
+bit 99 O 1 RAS2U 80 1 Z
+bit 98 O 1 BACK 79 1 Z
+bit 97 O 1 ASEBRKAK 78 1 Z
+bit 96 O 1 AUDATA3 77 1 Z
+bit 95 O 1 AUDATA2 76 1 Z
+bit 94 O 1 AUDATA1 75 1 Z
+bit 93 O 1 AUDATA0 74 1 Z
+bit 92 C 1 *
+bit 91 C 1 *
+bit 90 C 1 *
+bit 89 C 1 *
+bit 88 C 1 *
+bit 87 C 1 *
+bit 86 C 1 *
+bit 85 C 1 *
+bit 84 C 1 *
+bit 83 C 1 *
+bit 82 C 1 *
+bit 81 C 1 *
+bit 80 C 1 *
+bit 79 C 1 *
+bit 78 C 1 *
+bit 77 C 1 *
+bit 76 C 1 *
+bit 75 C 1 *
+bit 74 C 1 *
+bit 73 I 1 STATUS0
+bit 72 I 1 STATUS1
+bit 71 I 1 TCLK
+bit 70 I 1 SCK0
+bit 69 I 1 SCK1
+bit 68 I 1 SCK2
+bit 67 I 1 RTS2
+bit 66 I 1 RXD0
+bit 65 I 1 RXD2
+bit 64 I 1 WAKEUP
+bit 63 I 1 RESETOUT
+bit 62 I 1 DRAK0
+bit 61 I 1 DRAK1
+bit 60 I 1 DREQ0
+bit 59 I 1 DREQ1
+bit 58 I 1 RXD1
+bit 57 I 1 CTS2
+bit 56 I 1 MCS7
+bit 55 I 1 MCS6
+bit 54 I 1 MCS5
+bit 53 I 1 MCS4
+bit 52 I 1 MCS3
+bit 51 I 1 MCS2
+bit 50 I 1 MCS1
+bit 49 I 1 MCS0
+bit 48 I 1 MD3
+bit 47 I 1 MD4
+bit 46 I 1 MD5
+bit 45 O 1 STATUS0 22 1 Z
+bit 44 O 1 STATUS1 21 1 Z
+bit 43 O 1 TCLK 20 1 Z
+bit 42 O 1 IRQOUT 19 1 Z
+bit 41 O 1 TXD0 18 1 Z
+bit 40 O 1 SCK0 17 1 Z
+bit 39 O 1 TXD1 16 1 Z
+bit 38 O 1 SCK1 15 1 Z
+bit 37 O 1 TXD2 14 1 Z
+bit 36 O 1 SCK2 13 1 Z
+bit 35 O 1 RTS2 12 1 Z
+bit 34 O 1 MCS7 11 1 Z
+bit 33 O 1 MCS6 10 1 Z
+bit 32 O 1 MCS5 9 1 Z
+bit 31 O 1 MCS4 8 1 Z
+bit 30 O 1 WAKEUP 7 1 Z
+bit 29 O 1 RESETOUT 6 1 Z
+bit 28 O 1 MCS3 5 1 Z
+bit 27 O 1 MCS2 4 1 Z
+bit 26 O 1 MCS1 3 1 Z
+bit 25 O 1 MCS0 2 1 Z
+bit 24 O 1 DRAK0 1 1 Z
+bit 23 O 1 DRAK1 0 1 Z
+bit 22 C 1 *
+bit 21 C 1 *
+bit 20 C 1 *
+bit 19 C 1 *
+bit 18 C 1 *
+bit 17 C 1 *
+bit 16 C 1 *
+bit 15 C 1 *
+bit 14 C 1 *
+bit 13 C 1 *
+bit 12 C 1 *
+bit 11 C 1 *
+bit 10 C 1 *
+bit 9 C 1 *
+bit 8 C 1 *
+bit 7 C 1 *
+bit 6 C 1 *
+bit 5 C 1 *
+bit 4 C 1 *
+bit 3 C 1 *
+bit 2 C 1 *
+bit 1 C 1 *
+bit 0 C 1 *
+
+initbus sh7727
--- a/sie_fs/usr/local/share/urjtag/ibm/PARTS
+++ b/sie_fs/usr/local/share/urjtag/ibm/PARTS
@@ -0,0 +1,26 @@
+#
+# $Id: PARTS 717 2007-11-06 20:56:59Z kawk $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0010000001010100	ppc440gx	IBM440GX
+0000001001100111	ppc405ep	PowerPC 405EP
--- a/sie_fs/usr/local/share/urjtag/ibm/ppc405ep/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/ibm/ppc405ep/STEPPINGS
@@ -0,0 +1,3 @@
+0001	ppc405ep	A
+0010	ppc405ep	B
+0011	ppc405ep	C
--- a/sie_fs/usr/local/share/urjtag/ibm/ppc405ep/ppc405ep
+++ b/sie_fs/usr/local/share/urjtag/ibm/ppc405ep/ppc405ep
@@ -0,0 +1,699 @@
+signal TDI
+signal TMS
+signal TRST
+signal TCK
+signal TDO
+signal SysClk
+signal AVDD
+signal AGND
+signal SysReset
+signal TesetEn
+signal Halt
+signal SysErr
+signal MemData0
+signal MemData1
+signal MemData2
+signal MemData3
+signal MemData4
+signal MemData5
+signal MemData6
+signal MemData7
+signal MemData8
+signal MemData9
+signal MemData10
+signal MemData11
+signal MemData12
+signal MemData13
+signal MemData14
+signal MemData15
+signal MemData16
+signal MemData17
+signal MemData18
+signal MemData19
+signal MemData20
+signal MemData21
+signal MemData22
+signal MemData23
+signal MemData24
+signal MemData25
+signal MemData26
+signal MemData27
+signal MemData28
+signal MemData29
+signal MemData30
+signal MemData31
+signal MemAddr0
+signal MemAddr1
+signal MemAddr2
+signal MemAddr3
+signal MemAddr4
+signal MemAddr5
+signal MemAddr6
+signal MemAddr7
+signal MemAddr8
+signal MemAddr9
+signal MemAddr10
+signal MemAddr11
+signal MemAddr12
+signal BA0
+signal BA1
+signal RAS
+signal CAS
+signal DQM0
+signal DQM1
+signal DQM2
+signal DQM3
+signal BankSel0
+signal BankSel1
+signal WE
+signal ClkEn0
+signal ClkEn1
+signal MemClkOut0
+signal MemClkOut1
+signal PerData0
+signal PerData1
+signal PerData2
+signal PerData3
+signal PerData4
+signal PerData5
+signal PerData6
+signal PerData7
+signal PerData8
+signal PerData9
+signal PerData10
+signal PerData11
+signal PerData12
+signal PerData13
+signal PerData14
+signal PerData15
+signal PerAddr6
+signal PerAddr7
+signal PerAddr8
+signal PerAddr9
+signal PerAddr10
+signal PerAddr11
+signal PerAddr12
+signal PerAddr13
+signal PerAddr14
+signal PerAddr15
+signal PerAddr16
+signal PerAddr17
+signal PerAddr18
+signal PerAddr19
+signal PerAddr20
+signal PerAddr21
+signal PerAddr22
+signal PerAddr23
+signal PerAddr24
+signal PerAddr25
+signal PerAddr26
+signal PerAddr27
+signal PerAddr28
+signal PerAddr29
+signal PerAddr30
+signal PerAddr31
+signal PerWBE0
+signal PerWBE1
+signal PerCS0
+signal PerOE
+signal PerRnW
+signal PerReady
+signal PerClk
+signal ExtReset
+signal PCIAD0
+signal PCIAD1
+signal PCIAD2
+signal PCIAD3
+signal PCIAD4
+signal PCIAD5
+signal PCIAD6
+signal PCIAD7
+signal PCIAD8
+signal PCIAD9
+signal PCIAD10
+signal PCIAD11
+signal PCIAD12
+signal PCIAD13
+signal PCIAD14
+signal PCIAD15
+signal PCIAD16
+signal PCIAD17
+signal PCIAD18
+signal PCIAD19
+signal PCIAD20
+signal PCIAD21
+signal PCIAD22
+signal PCIAD23
+signal PCIAD24
+signal PCIAD25
+signal PCIAD26
+signal PCIAD27
+signal PCIAD28
+signal PCIAD29
+signal PCIAD30
+signal PCIAD31
+signal PCIC0_BE0
+signal PCIC0_BE1
+signal PCIC0_BE2
+signal PCIC0_BE3
+signal PCIParity
+signal PCIFrame
+signal PCIIRDY
+signal PCITRDY
+signal PCIStop
+signal PCIDevSel
+signal PCIIDSel
+signal PCISErr
+signal PCIPErr
+signal PCIClk
+signal PCIReset
+signal PCIINT_PerWE
+signal PCIReq0_Gnt
+signal PCIReq1
+signal PCIReq2
+signal PCIGnt0_Req
+signal PCIGnt1
+signal PCIGnt2
+signal UART0_Rx
+signal UART0_Tx
+signal UART0_CTS
+signal UART0_RTS
+signal IICSCL
+signal IICSDA
+signal PerBlast_GPIO0
+signal GPIO1_TS1E
+signal GPIO2_TS2E
+signal GPIO3_TS1O
+signal GPIO4_TS2O
+signal GPIO5_TS3
+signal GPIO6_TS4
+signal GPIO7_TS5
+signal GPIO8_TS6
+signal GPIO9_TrcClk
+signal PerCS1_GPIO10
+signal PerCS2_GPIO11
+signal PerCS3_GPIO12
+signal PerCS4_GPIO13
+signal PerAddr3_GPIO14
+signal PerAddr4_GPIO15
+signal PerAddr5_GPIO16
+signal IRQ0_GPIO17
+signal IRQ1_GPIO18
+signal IRQ2_GPIO19
+signal IRQ3_GPIO20
+signal IRQ4_GPIO21
+signal IRQ5_GPIO22
+signal IRQ6_GPIO23
+signal UART0_DCD_GPIO24UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_DSR_GPIO25UART0_RI_GPIO26
+signal UART0_RI_GPIO26
+signal UART0_DTR_GPIO27UART1_Rx_GPIO28
+signal UART1_Rx_GPIO28
+signal UART1_Tx_GPIO29
+signal RejectPkt0_GPIO3RejectPkt1_GPIO3PHY0Rx0D0
+signal RejectPkt1_GPIO3PHY0Rx0D0
+signal PHY0Rx0D0
+signal PHY0Rx0D1
+signal PHY0Rx0D2
+signal PHY0Rx0D3
+signal EMC0Tx0D0
+signal EMC0Tx0D1
+signal EMC0Tx0D2
+signal EMC0Tx0D3
+signal PHY0RxErr
+signal PHY0Rx0Clk
+signal PHY0Rx0DV
+signal PHY0CrS0
+signal EMC0Tx0Err
+signal EMC0Tx0En
+signal PHY0Tx0Clk
+signal PHY0Col0
+signal EMCMDIO
+signal EMCMDClk
+signal PHY0Rx1D0
+signal PHY0Rx1D1
+signal PHY0Rx1D2
+signal PHY0Rx1D3
+signal EMC0Tx1D0
+signal EMC0Tx1D1
+signal EMC0Tx1D2
+signal EMC0Tx1D3
+signal PHY0Rx1Err
+signal PHY0Rx1Clk
+signal PHY0Rx1DV
+signal PHY0Col1
+signal EMC0Tx1Err
+signal EMC0Tx1En
+signal PHY0Tx1Clk
+signal PHY0CrS1
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal VDD22
+signal VDD23
+signal VDD24
+signal VDD25
+signal VDD26
+signal VDD27
+signal VDD28
+signal VDD29
+signal VDD30
+signal VDD31
+signal VDD32
+signal VDD33
+signal VDD34
+signal VDD35
+signal VDD36
+signal VDD37
+signal VDD38
+signal VDD39
+signal VDD40
+signal OVDD1
+signal OVDD2
+signal OVDD3
+signal OVDD4
+signal OVDD5
+signal OVDD6
+signal OVDD7
+signal OVDD8
+signal OVDD9
+signal OVDD10
+signal OVDD11
+signal OVDD12
+signal OVDD13
+signal OVDD14
+signal OVDD15
+signal OVDD16
+signal OVDD17
+signal OVDD18
+
+register	BSR	300
+register	BR	1
+register	DIR	32
+
+instruction length 7
+
+instruction EXTEST 0000000 BSR
+instruction SAMPLE/PRELOAD 1111010 BSR
+instruction IDCODE 1111011 DIR
+instruction BYPASS 1111100 BR
+
+bit 299 B 1 MemData20 290 0 Z
+bit 298 B 1 MemData18 290 0 Z
+bit 297 B 1 MemData19 290 0 Z
+bit 296 C 0 *
+bit 295 B 1 IICSCL 296 0 Z
+bit 294 B 1 MemData17 290 0 Z
+bit 293 C 0 *
+bit 292 B 1 EMCMDIO 293 0 Z
+bit 291 O 1 EMCMDClk
+bit 290 C 0 *
+bit 289 B 1 MemData16 290 0 Z
+bit 288 B 1 MemData15 278 0 Z
+bit 287 B 1 MemData14 278 0 Z
+bit 286 B 1 MemData13 278 0 Z
+bit 285 B 1 MemData12 278 0 Z
+bit 284 I 1 PHY0Tx0Clk
+bit 283 O 1 DQM1
+bit 282 B 1 MemData11 278 0 Z
+bit 281 B 1 MemData10 278 0 Z
+bit 280 I 1 PHY0Col0
+bit 279 B 1 MemData9 278 0 Z
+bit 278 C 0 *
+bit 277 B 1 MemData8 278 0 Z
+bit 276 I 1 PHY0CrS0
+bit 275 B 1 MemData7 264 0 Z
+bit 274 I 1 PHY0Rx0DV
+bit 273 B 1 MemData6 264 0 Z
+bit 272 B 1 MemData5 264 0 Z
+bit 271 I 1 PHY0Rx0Clk
+bit 270 B 1 MemData4 264 0 Z
+bit 269 O 1 DQM0
+bit 268 B 1 MemData3 264 0 Z
+bit 267 I 1 PHY0RxErr
+bit 266 B 1 MemData2 264 0 Z
+bit 265 B 1 MemData1 264 0 Z
+bit 264 C 0 *
+bit 263 B 1 MemData0 264 0 Z
+bit 262 O 1 BankSel1
+bit 261 O 1 BankSel0
+bit 260 I 1 PHY0Rx0D3
+bit 259 O 1 ClkEn1
+bit 258 O 1 MemClkOut1
+bit 257 O 1 ClkEn0
+bit 256 O 1 MemClkOut0
+bit 255 O 1 WE
+bit 254 O 1 CAS
+bit 253 O 1 MemAddr0
+bit 252 O 1 RAS
+bit 251 O 1 BA1
+bit 250 O 1 BA0
+bit 249 O 1 MemAddr1
+bit 248 I 1 PHY0Rx0D2
+bit 247 O 1 MemAddr2
+bit 246 O 1 MemAddr3
+bit 245 I 1 PHY0Rx0D0
+bit 244 O 1 MemAddr4
+bit 243 O 1 SysClk
+bit 242 B 1 SysErr 229 0 Z
+bit 241 O 1 MemAddr5
+bit 240 O 1 MemAddr6
+bit 239 O 1 MemAddr7
+bit 238 O 1 MemAddr8
+bit 237 O 1 MemAddr9
+bit 236 C 0 *
+bit 235 B 1 SysReset 236 0 Z
+bit 234 O 1 MemAddr11
+bit 233 O 1 MemAddr10
+bit 232 O 1 MemAddr12
+bit 231 C 0 *
+bit 230 B 1 GPIO1_TS1E 231 0 Z
+bit 229 C 0 *
+bit 228 I 1 PHY0Rx0D1
+bit 227 C 0 *
+bit 226 B 1 RejectPkt0_GPIO30 227 0 Z
+bit 225 C 0 *
+bit 224 B 1 RejectPkt1_GPIO31 225 0 Z
+bit 223 C 0 *
+bit 222 B 1 GPIO2_TS2E 223 0 Z
+bit 221 C 0 *
+bit 220 B 1 GPIO3_TS1O 221 0 Z
+bit 219 C 0 *
+bit 218 B 1 GPIO4_TS2O 219 0 Z
+bit 217 C 0 *
+bit 216 B 1 IRQ0_GPIO17 217 0 Z
+bit 215 C 0 *
+bit 214 B 1 IRQ1_GPIO18 215 0 Z
+bit 213 C 0 *
+bit 212 B 1 IRQ2_GPIO19 213 0 Z
+bit 211 C 0 *
+bit 210 B 1 GPIO5_TS3 211 0 Z
+bit 209 C 0 *
+bit 208 B 1 IRQ3_GPIO20 209 0 Z
+bit 207 C 0 *
+bit 206 B 1 GPIO6_TS4 207 0 Z
+bit 205 C 0 *
+bit 204 B 1 GPIO7_TS5 205 0 Z
+bit 203 C 0 *
+bit 202 B 1 GPIO8_TS6 203 0 Z
+bit 201 C 0 *
+bit 200 B 1 GPIO9_TrcClk 201 0 Z
+bit 199 C 0 *
+bit 198 B 1 IRQ4_GPIO21 199 0 Z
+bit 197 C 0 *
+bit 196 B 1 IRQ5_GPIO22 197 0 Z
+bit 195 C 0 *
+bit 194 B 1 IRQ6_GPIO23 195 0 Z
+bit 193 B 1 PCIAD31 190 0 Z
+bit 192 B 1 PCIAD30 190 0 Z
+bit 191 B 1 PCIAD29 190 0 Z
+bit 190 C 0 *
+bit 189 B 1 PCIAD28 190 0 Z
+bit 188 B 1 PCIAD27 184 0 Z
+bit 187 B 1 PCIC0_BE3 130 0 Z
+bit 186 B 1 PCIAD26 184 0 Z
+bit 185 B 1 PCIAD25 184 0 Z
+bit 184 C 0 *
+bit 183 B 1 PCIAD24 184 0 Z
+bit 182 B 1 PCIAD23 179 0 Z
+bit 181 B 1 PCIAD22 179 0 Z
+bit 180 B 1 PCIAD21 179 0 Z
+bit 179 C 0 *
+bit 178 B 1 PCIAD20 179 0 Z
+bit 177 B 1 PCIC0_BE2 130 0 Z
+bit 176 B 1 PCIAD19 173 0 Z
+bit 175 B 1 PCIAD18 173 0 Z
+bit 174 B 1 PCIAD17 173 0 Z
+bit 173 C 0 *
+bit 172 B 1 PCIAD16 173 0 Z
+bit 171 C 0 *
+bit 170 B 1 PCIParity 171 0 Z
+bit 169 C 0 *
+bit 168 B 1 PCIPErr 169 0 Z
+bit 167 C 0 *
+bit 166 B 1 PCISErr 167 0 Z
+bit 165 B 1 PCIDevSel 163 0 Z
+bit 164 B 1 PCIStop 163 0 Z
+bit 163 C 0 *
+bit 162 B 1 PCITRDY 163 0 Z
+bit 161 C 0 *
+bit 160 B 1 PCIIRDY 161 0 Z
+bit 159 C 0 *
+bit 158 B 1 PCIFrame 159 0 Z
+bit 157 O 1 PCIReset
+bit 156 O 1 PCIGnt2 152 0 Z
+bit 155 O 1 PCIGnt1 152 0 Z
+bit 154 I 1 PCIReq2
+bit 153 I 1 PCIReq1
+bit 152 C 0 *
+bit 151 O 1 PCIGnt0_Req 152 0 Z
+bit 150 B 1 PCIAD15 142 0 Z
+bit 149 B 1 PCIAD14 142 0 Z
+bit 148 I 1 PCIReq0_Gnt
+bit 147 I 1 Halt
+bit 146 B 1 PCIAD13 142 0 Z
+bit 145 I 1 PCIIDSel
+bit 144 I 1 PCIClk
+bit 143 B 1 PCIC0_BE1 130 0 Z
+bit 142 C 0 *
+bit 141 B 1 PCIAD12 142 0 Z
+bit 140 B 1 PCIAD11 137 0 Z
+bit 139 B 1 PCIAD10 137 0 Z
+bit 138 B 1 PCIAD9 137 0 Z
+bit 137 C 0 *
+bit 136 B 1 PCIAD8 137 0 Z
+bit 135 B 1 PCIAD7 132 0 Z
+bit 134 B 1 PCIAD6 132 0 Z
+bit 133 B 1 PCIAD5 132 0 Z
+bit 132 C 0 *
+bit 131 B 1 PCIAD4 132 0 Z
+bit 130 C 0 *
+bit 129 B 1 PCIC0_BE0 130 0 Z
+bit 128 B 1 PCIAD3 125 0 Z
+bit 127 B 1 PCIAD2 125 0 Z
+bit 126 B 1 PCIAD1 125 0 Z
+bit 125 C 0 *
+bit 124 B 1 PCIAD0 125 0 Z
+bit 123 C 0 *
+bit 122 O 1 PCIINT_PerWE 123 0 Z
+bit 121 O 1 EMC0Tx1En
+bit 120 O 1 EMC0Tx1Err
+bit 119 O 1 EMC0Tx1D0
+bit 118 O 1 EMC0Tx1D3
+bit 117 O 1 EMC0Tx1D2
+bit 116 O 1 EMC0Tx1D1
+bit 115 O 1 PerAddr31
+bit 114 O 1 PerAddr30
+bit 113 O 1 PerAddr29
+bit 112 O 1 PerAddr28
+bit 111 O 1 PerAddr27
+bit 110 O 1 PerAddr26
+bit 109 O 1 PerAddr25
+bit 108 O 1 PerAddr24
+bit 107 O 1 PerAddr23
+bit 106 O 1 PerAddr22
+bit 105 O 1 PerAddr21
+bit 104 O 1 PerAddr20
+bit 103 O 1 PerAddr19
+bit 102 O 1 PerAddr18
+bit 101 C 0 *
+bit 100 B 1 PerBlast_GPIO0 101 0 Z
+bit 99 O 1 PerAddr17
+bit 98 O 1 PerAddr16
+bit 97 O 1 PerAddr15
+bit 96 O 1 PerAddr14
+bit 95 O 1 PerAddr13
+bit 94 O 1 PerAddr12
+bit 93 O 1 PerAddr11
+bit 92 O 1 PerAddr10
+bit 91 O 1 PerAddr9
+bit 90 O 1 PerAddr8
+bit 89 O 1 PerAddr7
+bit 88 O 1 PerAddr6
+bit 87 I 1 PHY0Tx1Clk
+bit 86 C 0 *
+bit 85 B 1 PerAddr5_GPIO16 86 0 Z
+bit 84 I 1 PHY0CrS1
+bit 83 I 1 PHY0Rx1DV
+bit 82 I 1 PHY0Col1
+bit 81 C 0 *
+bit 80 B 1 PerAddr4_GPIO15 81 0 Z
+bit 79 C 0 *
+bit 78 B 1 PerAddr3_GPIO14 79 0 Z
+bit 77 O 1 PerClk
+bit 76 C 0 *
+bit 75 B 1 PerCS4_GPIO13 76 0 Z
+bit 74 I 1 PerReady
+bit 73 O 1 ExtReset
+bit 72 I 1 PHY0Rx1Err
+bit 71 C 0 *
+bit 70 B 1 PerCS1_GPIO10 71 0 Z
+bit 69 O 1 PerCS0
+bit 68 C 0 *
+bit 67 B 1 PerCS3_GPIO12 68 0 Z
+bit 66 O 1 PerRnW
+bit 65 C 0 *
+bit 64 B 1 PerData15 43 0 Z
+bit 63 B 1 PerCS2_GPIO11 65 0 Z
+bit 62 O 1 PerOE
+bit 61 I 1 PHY0Rx1Clk
+bit 60 O 1 PerWBE1
+bit 59 O 1 PerWBE0
+bit 58 B 1 PerData12 43 0 Z
+bit 57 I 1 PHY0Rx1D3
+bit 56 B 1 PerData14 43 0 Z
+bit 55 B 1 PerData13 43 0 Z
+bit 54 I 1 PHY0Rx1D2
+bit 53 B 1 PerData11 43 0 Z
+bit 52 I 1 PHY0Rx1D1
+bit 51 B 1 PerData10 43 0 Z
+bit 50 B 1 PerData9 43 0 Z
+bit 49 C 0 *
+bit 48 B 1 UART1_Tx_GPIO29 49 0 Z
+bit 47 C 0 *
+bit 46 B 1 UART1_Rx_GPIO28 47 0 Z
+bit 45 C 0 *
+bit 44 B 1 UART0_DTR_GPIO27 45 0 Z
+bit 43 C 0 *
+bit 42 B 1 PerData8 43 0 Z
+bit 41 B 1 PerData7 25 0 Z
+bit 40 C 0 *
+bit 39 B 1 UART0_RI_GPIO26 40 0 Z
+bit 38 C 0 *
+bit 37 B 1 UART0_DSR_GPIO25 38 0 Z
+bit 36 B 1 PerData6 25 0 Z
+bit 35 B 1 PerData5 25 0 Z
+bit 34 O 1 EMC0Tx0D2
+bit 33 B 1 PerData4 25 0 Z
+bit 32 B 1 PerData3 25 0 Z
+bit 31 C 0 *
+bit 30 B 1 UART0_DCD_GPIO24 31 0 Z
+bit 29 B 1 UART0_RTS 229 0 Z
+bit 28 O 1 EMC0Tx0D1
+bit 27 B 1 PerData2 25 0 Z
+bit 26 B 1 PerData1 25 0 Z
+bit 25 C 0 *
+bit 24 B 1 PerData0 25 0 Z
+bit 23 O 1 EMC0Tx0D3
+bit 22 I 1 PHY0Rx1D0
+bit 21 B 1 UART0_Tx 229 0 Z
+bit 20 B 1 MemData31 7 0 Z
+bit 19 B 1 MemData30 7 0 Z
+bit 18 I 1 UART0_Rx
+bit 17 B 1 MemData29 7 0 Z
+bit 16 B 1 MemData28 7 0 Z
+bit 15 I 1 UART0_CTS
+bit 14 O 1 DQM3
+bit 13 O 1 EMC0Tx0D0
+bit 12 B 1 MemData27 7 0 Z
+bit 11 B 1 MemData26 7 0 Z
+bit 10 B 1 MemData25 7 0 Z
+bit 9 O 1 EMC0Tx0Err
+bit 8 O 1 EMC0Tx0En
+bit 7 C 0 *
+bit 6 B 1 MemData24 7 0 Z
+bit 5 B 1 MemData23 290 0 Z
+bit 4 B 1 MemData22 290 0 Z
+bit 3 C 0 *
+bit 2 B 1 IICSDA 3 0 Z
+bit 1 B 1 MemData21 290 0 Z
+bit 0 O 1 DQM2
+
+initbus ppc405ep
+endian big
--- a/sie_fs/usr/local/share/urjtag/ibm/ppc440gx/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/ibm/ppc440gx/STEPPINGS
@@ -0,0 +1,28 @@
+#
+# $Id: STEPPINGS 619 2004-11-16 21:51:27Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0001	ppc440gx	A
+0010	ppc440gx	B
+0011	ppc440gx	C
--- a/sie_fs/usr/local/share/urjtag/ibm/ppc440gx/ppc440gx
+++ b/sie_fs/usr/local/share/urjtag/ibm/ppc440gx/ppc440gx
--- a/sie_fs/usr/local/share/urjtag/intel/PARTS
+++ b/sie_fs/usr/local/share/urjtag/intel/PARTS
@@ -0,0 +1,39 @@
+#
+# $Id: PARTS 697 2007-11-06 19:22:39Z kawk $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+#     Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+#     and PXA210 Applications Processors User's Manual", February 2002,
+#     Order Number: 278525-001
+#
+
+# bits 27-12 of the Device Identification Register
+1001001001100001	sa1110		SA1110  # see 16.6.2 in [1]
+1001001001100100	pxa250		PXA250	# see 9.4.3 in [2]
+1001001001101100	pxa210		PXA210	# see 9.4.3 in [2]
+1001001001110100	ixp425		IXP425-533MHz	# see IXP425 bdsl file from the devel CD
+1001001001110101	ixp425		IXP425-400MHz	# see IXP425 bdsl file from the devel CD
+1001001001110111	ixp425		IXP425-266MHz	# see IXP425 bdsl file from the devel CD
+1001001001100101	pxa270		PXA270	# see bulbcx.dat from Intel Jflash source code
+
--- a/sie_fs/usr/local/share/urjtag/intel/ixp425/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/intel/ixp425/STEPPINGS
@@ -0,0 +1,26 @@
+#
+# $Id: STEPPINGS 578 2003-10-13 18:36:11Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ixp425		A0
+0001	ixp425		B0
--- a/sie_fs/usr/local/share/urjtag/intel/ixp425/ixp425
+++ b/sie_fs/usr/local/share/urjtag/intel/ixp425/ixp425
@@ -0,0 +1,634 @@
+#
+# $Id: ixp425 558 2003-09-05 21:09:14Z telka $
+#
+# JTAG declarations for IXP425
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Christian Pellegrin <chri@ascensit.com>, 2003.
+#
+
+signal	EX_CS[0]	K26
+signal	EX_CS[1]	L24
+signal	EX_CS[2]	M22
+signal	EX_CS[3]	J26
+signal	EX_CS[4]	K24
+signal	EX_CS[5]	J25
+signal	EX_CS[6]	H26
+signal	EX_CS[7]	K23
+signal	EX_WR		F22
+signal	EX_RD		A23
+signal	EX_RDY[0]	V26
+signal	EX_RDY[1]	U24
+signal	EX_RDY[2]	U23
+signal	EX_RDY[3]	T22
+signal	EX_IOWAIT	B23
+signal	EX_CLK		M23
+signal	EX_ALE		D22
+signal	EX_ADDR[0]		G1
+signal	EX_ADDR[1]		H2
+signal	EX_ADDR[2]		H1
+signal	EX_ADDR[3]		H6
+signal	EX_ADDR[4]		J6
+signal	EX_ADDR[5]		J5
+signal	EX_ADDR[6]		J3
+signal	EX_ADDR[7]		J1
+signal	EX_ADDR[8]		K1
+signal	EX_ADDR[9]		K2
+signal	EX_ADDR[10]		K5
+signal	EX_ADDR[11]		K6
+signal	EX_ADDR[12]		L1
+signal	EX_ADDR[13]		L3
+signal	EX_ADDR[14]		M1
+signal	EX_ADDR[15]		M3
+signal	EX_ADDR[16]		N3
+signal	EX_ADDR[17]		P1
+signal	EX_ADDR[18]		R1
+signal	EX_ADDR[19]		P2
+signal	EX_ADDR[20]		R3
+signal	EX_ADDR[21]		T4
+signal	EX_ADDR[22]		R5
+signal	EX_ADDR[23]		P5
+signal	EX_ADDR[24]		T5
+signal	EX_ADDR[25]		P4
+signal	EX_DATA[0]		N4
+signal	EX_DATA[1]		M5
+signal	EX_DATA[2]		L5
+signal	EX_DATA[3]		T6
+signal	EX_DATA[4]		N6
+signal	EX_DATA[5]		T7
+signal	EX_DATA[6]		M6
+signal	EX_DATA[7]		M7
+signal	EX_DATA[8]		M9
+signal	EX_DATA[9]		T10
+signal	EX_DATA[10]		R9
+signal	EX_DATA[11]		T11
+signal	EX_DATA[12]		P11
+signal	EX_DATA[13]		N10
+signal	EX_DATA[14]		T12
+signal	EX_DATA[15]		M10
+signal	EX_DATA[16]		H3
+signal	EX_DATA[17]		H5
+signal	EX_DATA[18]		J4
+signal	EX_DATA[19]		K3
+signal	EX_DATA[20]		L4
+signal	EX_DATA[21]		M2
+signal	EX_DATA[22]		N1
+signal	EX_DATA[23]		T3
+signal	EX_DATA[24]		P6
+signal	EX_DATA[25]		R7
+signal	EX_DATA[26]		P7
+signal	EX_DATA[27]		P8
+signal	EX_DATA[28]		L8
+signal	EX_DATA[29]		P10
+signal	EX_DATA[30]		R11
+signal	EX_DATA[31]		P12
+signal	GPIO[0]		U25
+signal	GPIO[1]		U22
+signal	GPIO[2]		V24
+signal	GPIO[3]		W26
+signal	GPIO[4]		W25
+signal	GPIO[5]		Y26
+signal	GPIO[6]		V22
+signal	GPIO[7]		W23
+signal	GPIO[8]		AA26
+signal	GPIO[9]		V21
+signal	GPIO[10]	Y24
+signal	GPIO[11]	AB26
+signal	GPIO[12]	AA24
+signal	GPIO[13]	AC26
+signal	GPIO[14]	W21
+signal	GPIO[15]	Y22
+
+# mandatory data registers
+register	BSR		498	# Boundary Scan Register
+register	BR		1	# Bypass Register
+# optional data registers
+register	DIR		32	# Device Identification Register
+
+instruction length 7
+# mandatory instructions
+instruction EXTEST		0000000	BSR
+instruction SAMPLE/PRELOAD	0000001	BSR
+instruction BYPASS		1111111	BR
+# optional instructions
+instruction CLAMP		1001001	BR
+instruction HIGHZ		1001010	BR
+instruction IDCODE		1111110	DIR
+
+# boundary scan register
+
+bit 497 C ? .
+bit 496 C ? .
+bit 495 C ? .
+bit 494 C ? .
+bit 493 C ? .
+bit 492 C ? .
+bit 491 C ? .
+bit 490 C ? .
+bit 489 C ? .
+bit 488 C ? .
+bit 487 C ? .
+bit 486 C ? .
+bit 485 C ? .
+bit 484 C ? .
+bit 483 C ? .
+bit 482 C ? .
+bit 481 C ? .
+bit 480 C ? .
+bit 479 C ? .
+bit 478 C ? .
+bit 477 C ? .
+bit 476 C ? .
+bit 475 C ? .
+bit 474 C ? .
+bit 473 C ? .
+bit 472 C ? .
+bit 471 C ? .
+bit 470 C ? .
+bit 469 C ? .
+bit 468 C ? .
+bit 467 C ? .
+bit 466 C ? .
+bit 465 C ? .
+bit 464 C ? .
+bit 463 C ? .
+bit 462 C ? .
+bit 461 C ? .
+bit 460 C ? .
+bit 459 C ? .
+bit 458 C ? .
+bit 457 C ? .
+bit 456 C ? .
+bit 455 C ? .
+bit 454 C ? .
+bit 453 C ? .
+bit 452 C ? .
+bit 451 C ? .
+bit 450 C ? .
+bit 449 C ? .
+bit 448 C ? .
+bit 447 C ? .
+bit 446 C ? .
+bit 445 C ? .
+bit 444 C ? .
+bit 443 C ? .
+bit 442 C ? .
+bit 441 C ? .
+bit 440 C ? .
+bit 439 C ? .
+bit 438 C ? .
+bit 437 C ? .
+bit 436 C ? .
+bit 435 C ? .
+bit 434 C ? .
+bit 433 C ? .
+bit 432 C ? .
+bit 431 C ? .
+bit 430 C ? .
+bit 429 C ? .
+bit 428 C ? .
+bit 427 C ? .
+bit 426 C ? .
+bit 425 C ? .
+bit 424 C ? .
+bit 423 C ? .
+bit 422 C ? .
+bit 421 C ? .
+bit 420 C ? .
+bit 419 C ? .
+bit 418 C ? .
+bit 417 C ? .
+bit 416 C ? .
+bit 415 C ? .
+bit 414 C ? .
+bit 413 C ? .
+bit 412 C ? .
+bit 411 C ? .
+bit 410 C ? .
+bit 409 C ? .
+bit 408 C ? .
+bit 407 C ? .
+bit 406 C ? .
+bit 405 C ? .
+bit 404 C ? .
+bit 403 C ? .
+bit 402 C ? .
+bit 401 C ? .
+bit 400 C ? .
+bit 399 C ? .
+bit 398 C ? .
+bit 397 C ? .
+bit 396 C ? .
+bit 395 C ? .
+bit 394 C ? .
+bit 393 C ? .
+bit 392 C ? .
+bit 391 C ? .
+bit 390 C ? .
+bit 389 C ? .
+bit 388 C ? .
+bit 387 C ? .
+bit 386 C ? .
+bit 385 C ? .
+bit 384 B ? GPIO[1] 369 1 Z
+bit 383 B ? GPIO[2] 368 1 Z
+bit 382 B ? GPIO[3] 367 1 Z
+bit 381 B ? GPIO[4] 366 1 Z
+bit 380 B ? GPIO[5] 365 1 Z
+bit 379 B ? GPIO[6] 364 1 Z
+bit 378 B ? GPIO[7] 363 1 Z
+bit 377 B ? GPIO[8] 362 1 Z
+bit 376 B ? GPIO[9] 361 1 Z
+bit 375 B ? GPIO[10] 360 1 Z
+bit 374 B ? GPIO[11] 359 1 Z
+bit 373 B ? GPIO[12] 358 1 Z
+bit 372 B ? GPIO[13] 357 1 Z
+bit 371 B ? GPIO[14] 356 1 Z
+bit 370 B ? GPIO[15] 355 1 Z
+bit 369 C ? .
+bit 368 C ? .
+bit 367 C ? .
+bit 366 C ? .
+bit 365 C ? .
+bit 364 C ? .
+bit 363 C ? .
+bit 362 C ? .
+bit 361 C ? .
+bit 360 C ? .
+bit 359 C ? .
+bit 358 C ? .
+bit 357 C ? .
+bit 356 C ? .
+bit 355 C ? .
+bit 354 I ? EX_IOWAIT
+bit 353 I ? EX_CLK 
+bit 352 O ? EX_ALE 297 1 Z
+bit 351 O ? EX_ADDR[0] 296 1 Z
+bit 350 O ? EX_ADDR[1] 295 1 Z
+bit 349 O ? EX_ADDR[2] 294 1 Z
+bit 348 O ? EX_ADDR[3] 293 1 Z
+bit 347 O ? EX_ADDR[4] 292 1 Z
+bit 346 O ? EX_ADDR[5] 291 1 Z
+bit 345 O ? EX_ADDR[6] 290 1 Z
+bit 344 O ? EX_ADDR[7] 289 1 Z
+bit 343 O ? EX_ADDR[8] 288 1 Z
+bit 342 O ? EX_ADDR[9] 287 1 Z
+bit 341 O ? EX_ADDR[10] 286 1 Z
+bit 340 O ? EX_ADDR[11] 285 1 Z
+bit 339 O ? EX_ADDR[12] 284 1 Z
+bit 338 O ? EX_ADDR[13] 283 1 Z
+bit 337 O ? EX_ADDR[14] 282 1 Z
+bit 336 O ? EX_ADDR[15] 281 1 Z
+bit 335 O ? EX_ADDR[16] 280 1 Z
+bit 334 O ? EX_ADDR[17] 279 1 Z
+bit 333 O ? EX_ADDR[18] 278 1 Z
+bit 332 O ? EX_ADDR[19] 277 1 Z
+bit 331 O ? EX_ADDR[20] 276 1 Z
+bit 330 O ? EX_ADDR[21] 275 1 Z
+bit 329 O ? EX_ADDR[22] 274 1 Z
+bit 328 O ? EX_ADDR[23] 273 1 Z
+bit 327 O ? EX_WR 272 1 Z
+bit 326 O ? EX_RD 271 1 Z
+bit 325 O ? EX_CS[0] 270 1 Z
+bit 324 O ? EX_CS[1] 269 1 Z
+bit 323 O ? EX_CS[2] 268 1 Z
+bit 322 O ? EX_CS[3] 267 1 Z
+bit 321 O ? EX_CS[4] 266 1 Z
+bit 320 O ? EX_CS[5] 265 1 Z
+bit 319 O ? EX_CS[6] 264 1 Z
+bit 318 O ? EX_CS[7] 263 1 Z
+bit 317 B ? EX_DATA[0] 262 1 Z
+bit 316 B ? EX_DATA[1] 261 1 Z
+bit 315 B ? EX_DATA[2] 260 1 Z
+bit 314 B ? EX_DATA[3] 259 1 Z
+bit 313 B ? EX_DATA[4] 258 1 Z
+bit 312 B ? EX_DATA[5] 257 1 Z
+bit 311 B ? EX_DATA[6] 256 1 Z
+bit 310 B ? EX_DATA[7] 255 1 Z
+bit 309 B ? EX_DATA[8] 254 1 Z
+bit 308 B ? EX_DATA[9] 253 1 Z
+bit 307 B ? EX_DATA[10] 252 1 Z
+bit 306 B ? EX_DATA[11] 251 1 Z
+bit 305 B ? EX_DATA[12] 250 1 Z
+bit 304 B ? EX_DATA[13] 249 1 Z
+bit 303 B ? EX_DATA[14] 248 1 Z
+bit 302 B ? EX_DATA[15] 247 1 Z
+bit 301 I ? EX_RDY[0]
+bit 300 I ? EX_RDY[1]
+bit 299 I ? EX_RDY[2]
+bit 298 I ? EX_RDY[3]
+bit 297 C ? .
+bit 296 C ? .
+bit 295 C ? .
+bit 294 C ? .
+bit 293 C ? .
+bit 292 C ? .
+bit 291 C ? .
+bit 290 C ? .
+bit 289 C ? .
+bit 288 C ? .
+bit 287 C ? .
+bit 286 C ? .
+bit 285 C ? .
+bit 284 C ? .
+bit 283 C ? .
+bit 282 C ? .
+bit 281 C ? .
+bit 280 C ? .
+bit 279 C ? .
+bit 278 C ? .
+bit 277 C ? .
+bit 276 C ? .
+bit 275 C ? .
+bit 274 C ? .
+bit 273 C ? .
+bit 272 C ? .
+bit 271 C ? .
+bit 270 C ? .
+bit 269 C ? .
+bit 268 C ? .
+bit 267 C ? .
+bit 266 C ? .
+bit 265 C ? .
+bit 264 C ? .
+bit 263 C ? .
+bit 262 C ? .
+bit 261 C ? .
+bit 260 C ? .
+bit 259 C ? .
+bit 258 C ? .
+bit 257 C ? .
+bit 256 C ? .
+bit 255 C ? .
+bit 254 C ? .
+bit 253 C ? .
+bit 252 C ? .
+bit 251 C ? .
+bit 250 C ? .
+bit 249 C ? .
+bit 248 C ? .
+bit 247 C ? .
+bit 246 C ? .
+bit 245 C ? .
+bit 244 C ? .
+bit 243 C ? .
+bit 242 C ? .
+bit 241 C ? .
+bit 240 C ? .
+bit 239 C ? .
+bit 238 C ? .
+bit 237 C ? .
+bit 236 C ? .
+bit 235 C ? .
+bit 234 C ? .
+bit 233 C ? .
+bit 232 C ? .
+bit 231 C ? .
+bit 230 C ? .
+bit 229 C ? .
+bit 228 C ? .
+bit 227 C ? .
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 C ? .
+bit 221 C ? .
+bit 220 C ? .
+bit 219 C ? .
+bit 218 C ? .
+bit 217 C ? .
+bit 216 C ? .
+bit 215 C ? .
+bit 214 C ? .
+bit 213 C ? .
+bit 212 C ? .
+bit 211 C ? .
+bit 210 C ? .
+bit 209 C ? .
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 C ? .
+bit 203 C ? .
+bit 202 C ? .
+bit 201 C ? .
+bit 200 C ? .
+bit 199 C ? .
+bit 198 C ? .
+bit 197 C ? .
+bit 196 C ? .
+bit 195 C ? .
+bit 194 C ? .
+bit 193 C ? .
+bit 192 C ? .
+bit 191 C ? .
+bit 190 C ? .
+bit 189 C ? .
+bit 188 C ? .
+bit 187 C ? .
+bit 186 C ? .
+bit 185 C ? .
+bit 184 C ? .
+bit 183 C ? .
+bit 182 C ? .
+bit 181 C ? .
+bit 180 C ? .
+bit 179 C ? .
+bit 178 C ? .
+bit 177 C ? .
+bit 176 C ? .
+bit 175 C ? .
+bit 174 C ? .
+bit 173 C ? .
+bit 172 C ? .
+bit 171 C ? .
+bit 170 C ? .
+bit 169 C ? .
+bit 168 C ? .
+bit 167 C ? .
+bit 166 C ? .
+bit 165 C ? .
+bit 164 C ? .
+bit 163 C ? .
+bit 162 C ? .
+bit 161 C ? .
+bit 160 C ? .
+bit 159 C ? .
+bit 158 C ? .
+bit 157 C ? .
+bit 156 C ? .
+bit 155 C ? .
+bit 154 C ? .
+bit 153 C ? .
+bit 152 C ? .
+bit 151 C ? .
+bit 150 C ? .
+bit 149 C ? .
+bit 148 C ? .
+bit 147 C ? .
+bit 146 C ? .
+bit 145 C ? .
+bit 144 C ? .
+bit 143 C ? .
+bit 142 C ? .
+bit 141 C ? .
+bit 140 C ? .
+bit 139 C ? .
+bit 138 C ? .
+bit 137 C ? .
+bit 136 C ? .
+bit 135 C ? .
+bit 134 C ? .
+bit 133 C ? .
+bit 132 C ? .
+bit 131 C ? .
+bit 130 C ? .
+bit 129 C ? .
+bit 128 C ? .
+bit 127 C ? .
+bit 126 C ? .
+bit 125 C ? .
+bit 124 C ? .
+bit 123 C ? .
+bit 122 C ? .
+bit 121 C ? .
+bit 120 C ? .
+bit 119 C ? .
+bit 118 C ? .
+bit 117 C ? .
+bit 116 C ? .
+bit 115 C ? .
+bit 114 C ? .
+bit 113 C ? .
+bit 112 C ? .
+bit 111 C ? .
+bit 110 C ? .
+bit 109 C ? .
+bit 108 C ? .
+bit 107 C ? .
+bit 106 C ? .
+bit 105 C ? .
+bit 104 C ? .
+bit 103 C ? .
+bit 102 C ? .
+bit 101 C ? .
+bit 100 C ? .
+bit 99 C ? .
+bit 98 C ? .
+bit 97 C ? .
+bit 96 C ? .
+bit 95 C ? .
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus ixp425
--- a/sie_fs/usr/local/share/urjtag/intel/pxa250/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/intel/pxa250/STEPPINGS
@@ -0,0 +1,36 @@
+#
+# $Id: STEPPINGS 401 2003-03-18 22:54:45Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+#     Specification Update", February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000	pxa250		A0
+0001	pxa250		A1
+0010	pxa250		B0
+0011	pxa250		B1
+0100	pxa250		B2
+0101	pxa250c0	C0
+0110	pxa250c0	PXA255A0
--- a/sie_fs/usr/local/share/urjtag/intel/pxa250/pxa250
+++ b/sie_fs/usr/local/share/urjtag/intel/pxa250/pxa250
@@ -0,0 +1,642 @@
+#
+# $Id: pxa250 558 2003-09-05 21:09:14Z telka $
+#
+# JTAG declarations for PXA250
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+#     Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+#     and PXA210 Application Processors User's Manual", February 2002,
+#     Order Number: 278525-001
+# [3] Intel Corporation, "BSDL description for top level entity pxa250_jtag", 2002-03-06,
+#     http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA250_bsdl_bga.txt
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+#     Specification Update", January 2003, Order Number: 278534-011
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal	nACRESET	D10
+signal	nBATT_FAULT	K12
+signal	BOOT_SEL[0]	G16
+signal	BOOT_SEL[1]	G13
+signal	BOOT_SEL[2]	F13
+signal	nCS[0]		N8
+signal	DQM[0]		M8
+signal	DQM[1]		B1
+signal	DQM[2]		B2
+signal	DQM[3]		L7
+signal	GPIO[0]		L10
+signal	GPIO[1]		L12
+signal	GPIO[2]		L13
+signal	GPIO[3]		K14
+signal	GPIO[4]		J12
+signal	GPIO[5]		J11
+signal	GPIO[6]		H14
+signal	GPIO[7]		G15
+signal	GPIO[8]		F14
+signal	GPIO[9]		F12
+signal	GPIO[10]	F7
+signal	GPIO[11]	A7
+signal	GPIO[12]	B6
+signal	GPIO[13]	B5
+signal	GPIO[14]	B4
+signal	GPIO[15]	T8
+signal	GPIO[16]	E12
+signal	GPIO[17]	D12
+signal	GPIO[18]	C1
+signal	GPIO[19]	N14
+signal	GPIO[20]	N12
+signal	GPIO[21]	N15
+signal	GPIO[22]	M12
+signal	GPIO[23]	F9
+signal	GPIO[24]	E9
+signal	GPIO[25]	D9
+signal	GPIO[26]	A9
+signal	GPIO[27]	B9
+signal	GPIO[28]	C9
+signal	GPIO[29]	E10
+signal	GPIO[30]	A10
+signal	GPIO[31]	E11
+signal	GPIO[32]	A16
+signal	GPIO[33]	T13
+signal	GPIO[34]	A13
+signal	GPIO[35]	A14
+signal	GPIO[36]	A12
+signal	GPIO[37]	B11
+signal	GPIO[38]	B10
+signal	GPIO[39]	E13
+signal	GPIO[40]	F10
+signal	GPIO[41]	F8
+signal	GPIO[42]	B13
+signal	GPIO[43]	D13
+signal	GPIO[44]	A15
+signal	GPIO[45]	B14
+signal	GPIO[46]	B15
+signal	GPIO[47]	C15
+signal	GPIO[48]	P13
+signal	GPIO[49]	T14
+signal	GPIO[50]	T15
+signal	GPIO[51]	R15
+signal	GPIO[52]	P14
+signal	GPIO[53]	R16
+signal	GPIO[54]	P16
+signal	GPIO[55]	M13
+signal	GPIO[56]	N16
+signal	GPIO[57]	M16
+signal	GPIO[58]	E7
+signal	GPIO[59]	D7
+signal	GPIO[60]	C7
+signal	GPIO[61]	B7
+signal	GPIO[62]	E6
+signal	GPIO[63]	D6
+signal	GPIO[64]	E5
+signal	GPIO[65]	A6
+signal	GPIO[66]	C5
+signal	GPIO[67]	A5
+signal	GPIO[68]	D5
+signal	GPIO[69]	A4
+signal	GPIO[70]	A3
+signal	GPIO[71]	A2
+signal	GPIO[72]	C3
+signal	GPIO[73]	B3
+signal	GPIO[74]	E8
+signal	GPIO[75]	D8
+signal	GPIO[76]	B8
+signal	GPIO[77]	A8
+signal	GPIO[78]	P9
+signal	GPIO[79]	T9
+signal	GPIO[80]	R13
+signal	MA[0]		G1
+signal	MA[1]		H2
+signal	MA[2]		H1
+signal	MA[3]		H6
+signal	MA[4]		J6
+signal	MA[5]		J5
+signal	MA[6]		J3
+signal	MA[7]		J1
+signal	MA[8]		K1
+signal	MA[9]		K2
+signal	MA[10]		K5
+signal	MA[11]		K6
+signal	MA[12]		L1
+signal	MA[13]		L3
+signal	MA[14]		M1
+signal	MA[15]		M3
+signal	MA[16]		N3
+signal	MA[17]		P1
+signal	MA[18]		R1
+signal	MA[19]		P2
+signal	MA[20]		R3
+signal	MA[21]		T4
+signal	MA[22]		R5
+signal	MA[23]		P5
+signal	MA[24]		T5
+signal	MA[25]		P4
+signal	MD[0]		N4
+signal	MD[1]		M5
+signal	MD[2]		L5
+signal	MD[3]		T6
+signal	MD[4]		N6
+signal	MD[5]		T7
+signal	MD[6]		M6
+signal	MD[7]		M7
+signal	MD[8]		M9
+signal	MD[9]		T10
+signal	MD[10]		R9
+signal	MD[11]		T11
+signal	MD[12]		P11
+signal	MD[13]		N10
+signal	MD[14]		T12
+signal	MD[15]		M10
+signal	MD[16]		H3
+signal	MD[17]		H5
+signal	MD[18]		J4
+signal	MD[19]		K3
+signal	MD[20]		L4
+signal	MD[21]		M2
+signal	MD[22]		N1
+signal	MD[23]		T3
+signal	MD[24]		P6
+signal	MD[25]		R7
+signal	MD[26]		P7
+signal	MD[27]		P8
+signal	MD[28]		L8
+signal	MD[29]		P10
+signal	MD[30]		R11
+signal	MD[31]		P12
+signal	MMCMD		D14
+signal	MMDAT		B16
+signal	nOE		G5
+signal	PEXTAL		K16
+signal	PLL_VCC		J15
+signal	PLL_VSS		J16
+signal	PWR_EN		L11
+signal	PXTAL		K15
+signal	RDnWR		D3
+signal	nRESET		J13
+signal	nRESET_OUT	K11
+signal	SCL		D11
+signal	SDA		A11
+signal	nSDCAS		F3
+signal	SDCKE[0]	E4
+signal	SDCKE[1]	E3
+signal	SDCLK[0]	D2
+signal	SDCLK[1]	F5
+signal	SDCLK[2]	D1
+signal	nSDCS[0]	F1
+signal	nSDCS[1]	G6
+signal	nSDCS[2]	G3
+signal	nSDCS[3]	F2
+signal	nSDRAS		E1
+signal	TCK		H12
+signal	TDI		H15
+signal	TDO		H16
+signal	TEST		G12
+signal	TESTCLK		G11
+signal	TEXTAL		L15
+signal	TXTAL		L16
+signal	TMS		H13
+signal	nTRST		H11
+signal	USB_N		B12
+signal	USB_P		C12
+signal	VCC		F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal	VCCN		A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal	VCCQ		C6 C10 C13 D15 E14 G14 M11
+signal	nVDD_FAULT	K13
+signal	VSS		C16 H8 H9 J8 J9 T1
+signal	VSSN		C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal	VSSQ		C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal	nWE		G4
+
+# mandatory data registers
+register	BSR		385	# Boundary Scan Register (see [3])
+register	BR		1	# Bypass Register
+# optional data registers
+register	DIR		32	# Device Identification Register
+# user defined registers
+register	DBG_SR		36	# see 10.10 in [2]
+register	LDIC_SR1	33	# see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST		00000	BSR
+instruction SAMPLE/PRELOAD	00001	BSR
+instruction BYPASS		11111	BR
+# optional instructions
+instruction CLAMP		00100	BR
+instruction HIGHZ		01000	BR
+instruction IDCODE		11110	DIR
+# user-defined instructions
+instruction DBGRX		00010	DBG_SR
+instruction LDIC		00111	LDIC_SR1
+instruction SELDCSR		01001	DBG_SR	# see 10.10.1 in [2]
+instruction DBGTX		10000	DBG_SR
+
+# see [3]
+bit 384 I ? nRESET
+bit 383 I ? BOOT_SEL[2]
+bit 382 I ? BOOT_SEL[1]
+bit 381 I ? BOOT_SEL[0]
+bit 380 I ? nBATT_FAULT
+bit 379 I ? nVDD_FAULT
+bit 378 I ? TESTCLK
+bit 377 I ? TEST
+bit 376 X ? .
+bit 375 I ? MD[31]
+bit 374 I ? MD[30]
+bit 373 I ? MD[29]
+bit 372 I ? MD[28]
+bit 371 I ? MD[27]
+bit 370 I ? MD[26]
+bit 369 I ? MD[25]
+bit 368 I ? MD[24]
+bit 367 I ? MD[23]
+bit 366 I ? MD[22]
+bit 365 I ? MD[21]
+bit 364 I ? MD[20]
+bit 363 I ? MD[19]
+bit 362 I ? MD[18]
+bit 361 I ? MD[17]
+bit 360 I ? MD[16]
+bit 359 I ? MD[15]
+bit 358 I ? MD[14]
+bit 357 I ? MD[13]
+bit 356 I ? MD[12]
+bit 355 I ? MD[11]
+bit 354 I ? MD[10]
+bit 353 I ? MD[9]
+bit 352 I ? MD[8]
+bit 351 I ? MD[7]
+bit 350 I ? MD[6]
+bit 349 I ? MD[5]
+bit 348 I ? MD[4]
+bit 347 I ? MD[3]
+bit 346 I ? MD[2]
+bit 345 I ? MD[1]
+bit 344 I ? MD[0]
+bit 343 I ? MMCMD
+bit 342 I ? MMDAT
+bit 341 I ? USB_P
+bit 340 I ? USB_N
+bit 339 I ? SDA
+bit 338 I ? SCL
+bit 337 I ? GPIO[80]
+bit 336 I ? GPIO[79]
+bit 335 I ? GPIO[78]
+bit 334 I ? GPIO[77]
+bit 333 I ? GPIO[76]
+bit 332 I ? GPIO[75]
+bit 331 I ? GPIO[74]
+bit 330 I ? GPIO[73]
+bit 329 I ? GPIO[72]
+bit 328 I ? GPIO[71]
+bit 327 I ? GPIO[70]
+bit 326 I ? GPIO[69]
+bit 325 I ? GPIO[68]
+bit 324 I ? GPIO[67]
+bit 323 I ? GPIO[66]
+bit 322 I ? GPIO[65]
+bit 321 I ? GPIO[64]
+bit 320 I ? GPIO[63]
+bit 319 I ? GPIO[62]
+bit 318 I ? GPIO[61]
+bit 317 I ? GPIO[60]
+bit 316 I ? GPIO[59]
+bit 315 I ? GPIO[58]
+bit 314 I ? GPIO[57]
+bit 313 I ? GPIO[56]
+bit 312 I ? GPIO[55]
+bit 311 I ? GPIO[54]
+bit 310 I ? GPIO[53]
+bit 309 I ? GPIO[52]
+bit 308 I ? GPIO[51]
+bit 307 I ? GPIO[50]
+bit 306 I ? GPIO[49]
+bit 305 I ? GPIO[48]
+bit 304 I ? GPIO[47]
+bit 303 I ? GPIO[46]
+bit 302 I ? GPIO[45]
+bit 301 I ? GPIO[44]
+bit 300 I ? GPIO[43]
+bit 299 I ? GPIO[42]
+bit 298 I ? GPIO[41]
+bit 297 I ? GPIO[40]
+bit 296 I ? GPIO[39]
+bit 295 I ? GPIO[38]
+bit 294 I ? GPIO[37]
+bit 293 I ? GPIO[36]
+bit 292 I ? GPIO[35]
+bit 291 I ? GPIO[34]
+bit 290 I ? GPIO[33]
+bit 289 I ? GPIO[32]
+bit 288 I ? GPIO[31]
+bit 287 I ? GPIO[30]
+bit 286 I ? GPIO[29]
+bit 285 I ? GPIO[28]
+bit 284 I ? GPIO[27]
+bit 283 I ? GPIO[26]
+bit 282 I ? GPIO[25]
+bit 281 I ? GPIO[24]
+bit 280 I ? GPIO[23]
+bit 279 I ? GPIO[22]
+bit 278 I ? GPIO[21]
+bit 277 I ? GPIO[20]
+bit 276 I ? GPIO[19]
+bit 275 I ? GPIO[18]
+bit 274 I ? GPIO[17]
+bit 273 I ? GPIO[16]
+bit 272 I ? GPIO[15]
+bit 271 I ? GPIO[14]
+bit 270 I ? GPIO[13]
+bit 269 I ? GPIO[12]
+bit 268 I ? GPIO[11]
+bit 267 I ? GPIO[10]
+bit 266 I ? GPIO[9]
+bit 265 I ? GPIO[8]
+bit 264 I ? GPIO[7]
+bit 263 I ? GPIO[6]
+bit 262 I ? GPIO[5]
+bit 261 I ? GPIO[4]
+bit 260 I ? GPIO[3]
+bit 259 I ? GPIO[2]
+bit 258 I ? GPIO[1]
+bit 257 I ? GPIO[0]
+bit 256 O ? MA[25] 208 0 Z
+bit 255 O ? MA[24] 208 0 Z
+bit 254 O ? MA[23] 208 0 Z
+bit 253 O ? MA[22] 208 0 Z
+bit 252 O ? MA[21] 208 0 Z
+bit 251 O ? MA[20] 208 0 Z
+bit 250 O ? MA[19] 208 0 Z
+bit 249 O ? MA[18] 208 0 Z
+bit 248 O ? MA[17] 208 0 Z
+bit 247 O ? MA[16] 208 0 Z
+bit 246 O ? MA[15] 208 0 Z
+bit 245 O ? MA[14] 208 0 Z
+bit 244 O ? MA[13] 208 0 Z
+bit 243 O ? MA[12] 208 0 Z
+bit 242 O ? MA[11] 208 0 Z
+bit 241 O ? MA[10] 208 0 Z
+bit 240 O ? MA[9] 208 0 Z
+bit 239 O ? MA[8] 208 0 Z
+bit 238 O ? MA[7] 208 0 Z
+bit 237 O ? MA[6] 208 0 Z
+bit 236 O ? MA[5] 208 0 Z
+bit 235 O ? MA[4] 208 0 Z
+bit 234 O ? MA[3] 208 0 Z
+bit 233 O ? MA[2] 208 0 Z
+bit 232 O ? MA[1] 208 0 Z
+bit 231 O ? MA[0] 208 0 Z
+bit 230 O ? nCS[0] 206 0 Z
+bit 229 O ? nOE 207 0 Z
+bit 228 O ? nWE 207 0 Z
+bit 227 O ? nSDRAS 208 0 Z
+bit 226 O ? nSDCAS 208 0 Z
+bit 225 O ? DQM[3] 205 0 Z
+bit 224 O ? DQM[2] 205 0 Z
+bit 223 O ? DQM[1] 208 0 Z
+bit 222 O ? DQM[0] 208 0 Z
+bit 221 O ? nSDCS[3]
+bit 220 O ? nSDCS[2]
+bit 219 O ? nSDCS[1]
+bit 218 O ? nSDCS[0] 208 0 Z
+bit 217 O ? SDCKE[1]
+bit 216 O ? SDCKE[0]
+bit 215 O ? SDCLK[2]
+bit 214 O ? SDCLK[1] 208 0 Z
+bit 213 O ? SDCLK[0]
+bit 212 O ? RDnWR 205 0 Z
+bit 211 O ? nACRESET
+bit 210 O ? nRESET_OUT
+bit 209 O ? PWR_EN
+bit 208 C ? .
+bit 207 C ? .
+bit 206 C ? .
+bit 205 C ? .
+bit 204 O ? MD[31] 84 0 Z
+bit 203 O ? MD[30] 84 0 Z
+bit 202 O ? MD[29] 84 0 Z
+bit 201 O ? MD[28] 84 0 Z
+bit 200 O ? MD[27] 84 0 Z
+bit 199 O ? MD[26] 84 0 Z
+bit 198 O ? MD[25] 84 0 Z
+bit 197 O ? MD[24] 84 0 Z
+bit 196 O ? MD[23] 84 0 Z
+bit 195 O ? MD[22] 84 0 Z
+bit 194 O ? MD[21] 84 0 Z
+bit 193 O ? MD[20] 84 0 Z
+bit 192 O ? MD[19] 84 0 Z
+bit 191 O ? MD[18] 84 0 Z
+bit 190 O ? MD[17] 84 0 Z
+bit 189 O ? MD[16] 84 0 Z
+bit 188 O ? MD[15] 85 0 Z
+bit 187 O ? MD[14] 85 0 Z
+bit 186 O ? MD[13] 85 0 Z
+bit 185 O ? MD[12] 85 0 Z
+bit 184 O ? MD[11] 85 0 Z
+bit 183 O ? MD[10] 85 0 Z
+bit 182 O ? MD[9] 85 0 Z
+bit 181 O ? MD[8] 85 0 Z
+bit 180 O ? MD[7] 85 0 Z
+bit 179 O ? MD[6] 85 0 Z
+bit 178 O ? MD[5] 85 0 Z
+bit 177 O ? MD[4] 85 0 Z
+bit 176 O ? MD[3] 85 0 Z
+bit 175 O ? MD[2] 85 0 Z
+bit 174 O ? MD[1] 85 0 Z
+bit 173 O ? MD[0] 85 0 Z
+bit 172 O ? MMCMD 83 0 Z
+bit 171 O ? MMDAT 82 0 Z
+bit 170 O ? USB_P 81 0 Z
+bit 169 O ? USB_N 81 0 Z
+bit 168 O ? SDA			# FIXME: see WEAK1 in [3]
+bit 167 O ? SCL			# FIXME: see WEAK1 in [3]
+bit 166 O ? GPIO[80] 80 0 Z
+bit 165 O ? GPIO[79] 79 0 Z
+bit 164 O ? GPIO[78] 78 0 Z
+bit 163 O ? GPIO[77] 77 0 Z
+bit 162 O ? GPIO[76] 76 0 Z
+bit 161 O ? GPIO[75] 75 0 Z
+bit 160 O ? GPIO[74] 74 0 Z
+bit 159 O ? GPIO[73] 73 0 Z
+bit 158 O ? GPIO[72] 72 0 Z
+bit 157 O ? GPIO[71] 71 0 Z
+bit 156 O ? GPIO[70] 70 0 Z
+bit 155 O ? GPIO[69] 69 0 Z
+bit 154 O ? GPIO[68] 68 0 Z
+bit 153 O ? GPIO[67] 67 0 Z
+bit 152 O ? GPIO[66] 66 0 Z
+bit 151 O ? GPIO[65] 65 0 Z
+bit 150 O ? GPIO[64] 64 0 Z
+bit 149 O ? GPIO[63] 63 0 Z
+bit 148 O ? GPIO[62] 62 0 Z
+bit 147 O ? GPIO[61] 61 0 Z
+bit 146 O ? GPIO[60] 60 0 Z
+bit 145 O ? GPIO[59] 59 0 Z
+bit 144 O ? GPIO[58] 58 0 Z
+bit 143 O ? GPIO[57] 57 0 Z
+bit 142 O ? GPIO[56] 56 0 Z
+bit 141 O ? GPIO[55] 55 0 Z
+bit 140 O ? GPIO[54] 54 0 Z
+bit 139 O ? GPIO[53] 53 0 Z
+bit 138 O ? GPIO[52] 52 0 Z
+bit 137 O ? GPIO[51] 51 0 Z
+bit 136 O ? GPIO[50] 50 0 Z
+bit 135 O ? GPIO[49] 49 0 Z
+bit 134 O ? GPIO[48] 48 0 Z
+bit 133 O ? GPIO[47] 47 0 Z
+bit 132 O ? GPIO[46] 46 0 Z
+bit 131 O ? GPIO[45] 45 0 Z
+bit 130 O ? GPIO[44] 44 0 Z
+bit 129 O ? GPIO[43] 43 0 Z
+bit 128 O ? GPIO[42] 42 0 Z
+bit 127 O ? GPIO[41] 41 0 Z
+bit 126 O ? GPIO[40] 40 0 Z
+bit 125 O ? GPIO[39] 39 0 Z
+bit 124 O ? GPIO[38] 38 0 Z
+bit 123 O ? GPIO[37] 37 0 Z
+bit 122 O ? GPIO[36] 36 0 Z
+bit 121 O ? GPIO[35] 35 0 Z
+bit 120 O ? GPIO[34] 34 0 Z
+bit 119 O ? GPIO[33] 33 0 Z
+bit 118 O ? GPIO[32] 32 0 Z
+bit 117 O ? GPIO[31] 31 0 Z
+bit 116 O ? GPIO[30] 30 0 Z
+bit 115 O ? GPIO[29] 29 0 Z
+bit 114 O ? GPIO[28] 28 0 Z
+bit 113 O ? GPIO[27] 27 0 Z
+bit 112 O ? GPIO[26] 26 0 Z
+bit 111 O ? GPIO[25] 25 0 Z
+bit 110 O ? GPIO[24] 24 0 Z
+bit 109 O ? GPIO[23] 23 0 Z
+bit 108 O ? GPIO[22] 22 0 Z
+bit 107 O ? GPIO[21] 21 0 Z
+bit 106 O ? GPIO[20] 20 0 Z
+bit 105 O ? GPIO[19] 19 0 Z
+bit 104 O ? GPIO[18] 18 0 Z
+bit 103 O ? GPIO[17] 17 0 Z
+bit 102 O ? GPIO[16] 16 0 Z
+bit 101 O ? GPIO[15] 15 0 Z
+bit 100 O ? GPIO[14] 14 0 Z
+bit 99 O ? GPIO[13] 13 0 Z
+bit 98 O ? GPIO[12] 12 0 Z
+bit 97 O ? GPIO[11] 11 0 Z
+bit 96 O ? GPIO[10] 10 0 Z
+bit 95 O ? GPIO[9] 9 0 Z
+bit 94 O ? GPIO[8] 8 0 Z
+bit 93 O ? GPIO[7] 7 0 Z
+bit 92 O ? GPIO[6] 6 0 Z
+bit 91 O ? GPIO[5] 5 0 Z
+bit 90 O ? GPIO[4] 4 0 Z
+bit 89 O ? GPIO[3] 3 0 Z
+bit 88 O ? GPIO[2] 2 0 Z
+bit 87 O ? GPIO[1] 1 0 Z
+bit 86 O ? GPIO[0] 0 0 Z
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- a/sie_fs/usr/local/share/urjtag/intel/pxa250/pxa250c0
+++ b/sie_fs/usr/local/share/urjtag/intel/pxa250/pxa250c0
@@ -0,0 +1,669 @@
+#
+# $Id: pxa250c0 558 2003-09-05 21:09:14Z telka $
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+#     Design Guide", February 2002, Order Number: 278523-001
+# [2] Intel Corporation, "Intel XScale Microarchitecture for the PXA250
+#     and PXA210 Application Processors User's Manual", February 2002,
+#     Order Number: 278525-001
+# [3] Intel Corporation, "BSDL Description for Top-Level Entity pxa26x_jtag_B0 Revision: C0 v1_6",
+#     http://developer.intel.com/design/pca/applicationsprocessors/bsdl/PXA26x_bsdl_B0_v1_6.bsdl
+# [4] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
+#     Specification Update", January 2003, Order Number: 278534-011
+# [5] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
+#     October 2002, Order Number: 278638-001
+#
+
+# see Table 1-4 in [1] and D29. in [4]
+signal	nACRESET	D10
+signal	nBATT_FAULT	K12
+signal	BOOT_SEL[0]	G16
+signal	BOOT_SEL[1]	G13
+signal	BOOT_SEL[2]	F13
+signal	nCS[0]		N8
+signal	DQM[0]		M8
+signal	DQM[1]		B1
+signal	DQM[2]		B2
+signal	DQM[3]		L7
+signal	GPIO[0]		L10
+signal	GPIO[1]		L12
+signal	GPIO[2]		L13
+signal	GPIO[3]		K14
+signal	GPIO[4]		J12
+signal	GPIO[5]		J11
+signal	GPIO[6]		H14
+signal	GPIO[7]		G15
+signal	GPIO[8]		F14
+signal	GPIO[9]		F12
+signal	GPIO[10]	F7
+signal	GPIO[11]	A7
+signal	GPIO[12]	B6
+signal	GPIO[13]	B5
+signal	GPIO[14]	B4
+signal	GPIO[15]	T8
+signal	GPIO[16]	E12
+signal	GPIO[17]	D12
+signal	GPIO[18]	C1
+signal	GPIO[19]	N14
+signal	GPIO[20]	N12
+signal	GPIO[21]	N15
+signal	GPIO[22]	M12
+signal	GPIO[23]	F9
+signal	GPIO[24]	E9
+signal	GPIO[25]	D9
+signal	GPIO[26]	A9
+signal	GPIO[27]	B9
+signal	GPIO[28]	C9
+signal	GPIO[29]	E10
+signal	GPIO[30]	A10
+signal	GPIO[31]	E11
+signal	GPIO[32]	A16
+signal	GPIO[33]	T13
+signal	GPIO[34]	A13
+signal	GPIO[35]	A14
+signal	GPIO[36]	A12
+signal	GPIO[37]	B11
+signal	GPIO[38]	B10
+signal	GPIO[39]	E13
+signal	GPIO[40]	F10
+signal	GPIO[41]	F8
+signal	GPIO[42]	B13
+signal	GPIO[43]	D13
+signal	GPIO[44]	A15
+signal	GPIO[45]	B14
+signal	GPIO[46]	B15
+signal	GPIO[47]	C15
+signal	GPIO[48]	P13
+signal	GPIO[49]	T14
+signal	GPIO[50]	T15
+signal	GPIO[51]	R15
+signal	GPIO[52]	P14
+signal	GPIO[53]	R16
+signal	GPIO[54]	P16
+signal	GPIO[55]	M13
+signal	GPIO[56]	N16
+signal	GPIO[57]	M16
+signal	GPIO[58]	E7
+signal	GPIO[59]	D7
+signal	GPIO[60]	C7
+signal	GPIO[61]	B7
+signal	GPIO[62]	E6
+signal	GPIO[63]	D6
+signal	GPIO[64]	E5
+signal	GPIO[65]	A6
+signal	GPIO[66]	C5
+signal	GPIO[67]	A5
+signal	GPIO[68]	D5
+signal	GPIO[69]	A4
+signal	GPIO[70]	A3
+signal	GPIO[71]	A2
+signal	GPIO[72]	C3
+signal	GPIO[73]	B3
+signal	GPIO[74]	E8
+signal	GPIO[75]	D8
+signal	GPIO[76]	B8
+signal	GPIO[77]	A8
+signal	GPIO[78]	P9
+signal	GPIO[79]	T9
+signal	GPIO[80]	R13
+signal	MA[0]		G1
+signal	MA[1]		H2
+signal	MA[2]		H1
+signal	MA[3]		H6
+signal	MA[4]		J6
+signal	MA[5]		J5
+signal	MA[6]		J3
+signal	MA[7]		J1
+signal	MA[8]		K1
+signal	MA[9]		K2
+signal	MA[10]		K5
+signal	MA[11]		K6
+signal	MA[12]		L1
+signal	MA[13]		L3
+signal	MA[14]		M1
+signal	MA[15]		M3
+signal	MA[16]		N3
+signal	MA[17]		P1
+signal	MA[18]		R1
+signal	MA[19]		P2
+signal	MA[20]		R3
+signal	MA[21]		T4
+signal	MA[22]		R5
+signal	MA[23]		P5
+signal	MA[24]		T5
+signal	MA[25]		P4
+signal	MD[0]		N4
+signal	MD[1]		M5
+signal	MD[2]		L5
+signal	MD[3]		T6
+signal	MD[4]		N6
+signal	MD[5]		T7
+signal	MD[6]		M6
+signal	MD[7]		M7
+signal	MD[8]		M9
+signal	MD[9]		T10
+signal	MD[10]		R9
+signal	MD[11]		T11
+signal	MD[12]		P11
+signal	MD[13]		N10
+signal	MD[14]		T12
+signal	MD[15]		M10
+signal	MD[16]		H3
+signal	MD[17]		H5
+signal	MD[18]		J4
+signal	MD[19]		K3
+signal	MD[20]		L4
+signal	MD[21]		M2
+signal	MD[22]		N1
+signal	MD[23]		T3
+signal	MD[24]		P6
+signal	MD[25]		R7
+signal	MD[26]		P7
+signal	MD[27]		P8
+signal	MD[28]		L8
+signal	MD[29]		P10
+signal	MD[30]		R11
+signal	MD[31]		P12
+signal	MMCMD		D14
+signal	MMDAT		B16
+signal	nOE		G5
+signal	PEXTAL		K16
+signal	PLL_VCC		J15
+signal	PLL_VSS		J16
+signal	PWR_EN		L11
+signal	PXTAL		K15
+signal	RDnWR		D3
+signal	nRESET		J13
+signal	nRESET_OUT	K11
+signal	SCL		D11
+signal	SDA		A11
+signal	nSDCAS		F3
+signal	SDCKE[0]	E4
+signal	SDCKE[1]	E3
+signal	SDCLK[0]	D2
+signal	SDCLK[1]	F5
+signal	SDCLK[2]	D1
+signal	nSDCS[0]	F1
+signal	nSDCS[1]	G6
+signal	nSDCS[2]	G3
+signal	nSDCS[3]	F2
+signal	nSDRAS		E1
+signal	TCK		H12
+signal	TDI		H15
+signal	TDO		H16
+signal	TEST		G12
+signal	TESTCLK		G11
+signal	TEXTAL		L15
+signal	TXTAL		L16
+signal	TMS		H13
+signal	nTRST		H11
+signal	USB_N		B12
+signal	USB_P		C12
+signal	VCC		F11 G7 G9 H10 J7 K8 K10 L6 L9
+signal	VCCN		A1 D4 F4 H4 K4 M4 M14 N5 N7 N9 N11 N13 P3 T2 T16
+signal	VCCQ		C6 C10 C13 D15 E14 G14 M11
+signal	nVDD_FAULT	K13
+signal	VSS		C16 H8 H9 J8 J9 T1
+signal	VSSN		C2 E2 G2 J2 L2 M15 N2 P15 R2 R4 R6 R8 R10 R12 R14
+signal	VSSQ		C4 C8 C11 C14 D16 E15 E16 F6 F15 F16 G8 G10 H7 J10 J14 K7 K9 L14
+signal	nWE		G4
+
+# mandatory data registers
+register	BSR		410	# Boundary Scan Register (see [3])
+register	BR		1	# Bypass Register
+# optional data registers
+register	DIR		32	# Device Identification Register
+# user defined registers
+register	DBG_SR		36	# see 10.10 in [2]
+register	LDIC_SR1	33	# see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 5
+# mandatory instructions
+instruction EXTEST		00000	BSR
+instruction SAMPLE/PRELOAD	00001	BSR
+instruction BYPASS		11111	BR
+# optional instructions
+instruction CLAMP		00100	BR
+instruction HIGHZ		01000	BR
+instruction IDCODE		11110	DIR
+# user-defined instructions
+instruction DBGRX		00010	DBG_SR
+instruction LDIC		00111	LDIC_SR1
+instruction SELDCSR		01001	DBG_SR	# see 10.10.1 in [2]
+instruction DBGTX		10000	DBG_SR
+
+# see [3]
+bit 409 I ? nRESET
+bit 408 I ? BOOT_SEL[2]
+bit 407 I ? BOOT_SEL[1]
+bit 406 I ? BOOT_SEL[0]
+bit 405 I ? nBATT_FAULT
+bit 404 I ? nVDD_FAULT
+bit 403 I ? TESTCLK
+bit 402 I ? TEST
+bit 401 X ? .
+bit 400 I ? MD[31]
+bit 399 I ? MD[30]
+bit 398 I ? MD[29]
+bit 397 I ? MD[28]
+bit 396 I ? MD[27]
+bit 395 I ? MD[26]
+bit 394 I ? MD[25]
+bit 393 I ? MD[24]
+bit 392 I ? MD[23]
+bit 391 I ? MD[22]
+bit 390 I ? MD[21]
+bit 389 I ? MD[20]
+bit 388 I ? MD[19]
+bit 387 I ? MD[18]
+bit 386 I ? MD[17]
+bit 385 I ? MD[16]
+bit 384 I ? MD[15]
+bit 383 I ? MD[14]
+bit 382 I ? MD[13]
+bit 381 I ? MD[12]
+bit 380 I ? MD[11]
+bit 379 I ? MD[10]
+bit 378 I ? MD[9]
+bit 377 I ? MD[8]
+bit 376 I ? MD[7]
+bit 375 I ? MD[6]
+bit 374 I ? MD[5]
+bit 373 I ? MD[4]
+bit 372 I ? MD[3]
+bit 371 I ? MD[2]
+bit 370 I ? MD[1]
+bit 369 I ? MD[0]
+bit 368 I ? MMCMD
+bit 367 I ? MMDAT
+bit 366 I ? USB_P
+bit 365 I ? USB_N
+bit 364 I ? SDA
+bit 363 I ? SCL
+bit 362 I ? nACRESET		# see Table 2-7. in [5]
+bit 361 I ? RDnWR		# see Table 2-7. in [5]
+bit 360 I ? nSDCS[3]		# see Table 2-7. in [5]
+bit 359 I ? nSDCS[2]		# see Table 2-7. in [5]
+bit 358 I ? GPIO[85]
+bit 357 I ? GPIO[84]
+bit 356 I ? GPIO[83]
+bit 355 I ? GPIO[82]
+bit 354 I ? GPIO[81]
+bit 353 I ? GPIO[80]
+bit 352 I ? GPIO[79]
+bit 351 I ? GPIO[78]
+bit 350 I ? GPIO[77]
+bit 349 I ? GPIO[76]
+bit 348 I ? GPIO[75]
+bit 347 I ? GPIO[74]
+bit 346 I ? GPIO[73]
+bit 345 I ? GPIO[72]
+bit 344 I ? GPIO[71]
+bit 343 I ? GPIO[70]
+bit 342 I ? GPIO[69]
+bit 341 I ? GPIO[68]
+bit 340 I ? GPIO[67]
+bit 339 I ? GPIO[66]
+bit 338 I ? GPIO[65]
+bit 337 I ? GPIO[64]
+bit 336 I ? GPIO[63]
+bit 335 I ? GPIO[62]
+bit 334 I ? GPIO[61]
+bit 333 I ? GPIO[60]
+bit 332 I ? GPIO[59]
+bit 331 I ? GPIO[58]
+bit 330 I ? GPIO[57]
+bit 329 I ? GPIO[56]
+bit 328 I ? GPIO[55]
+bit 327 I ? GPIO[54]
+bit 326 I ? GPIO[53]
+bit 325 I ? GPIO[52]
+bit 324 I ? GPIO[51]
+bit 323 I ? GPIO[50]
+bit 322 I ? GPIO[49]
+bit 321 I ? GPIO[48]
+bit 320 I ? GPIO[47]
+bit 319 I ? GPIO[46]
+bit 318 I ? GPIO[45]
+bit 317 I ? GPIO[44]
+bit 316 I ? GPIO[43]
+bit 315 I ? GPIO[42]
+bit 314 I ? GPIO[41]
+bit 313 I ? GPIO[40]
+bit 312 I ? GPIO[39]
+bit 311 I ? GPIO[38]
+bit 310 I ? GPIO[37]
+bit 309 I ? GPIO[36]
+bit 308 I ? GPIO[35]
+bit 307 I ? GPIO[34]
+bit 306 I ? GPIO[33]
+bit 305 I ? GPIO[32]
+bit 304 I ? GPIO[31]
+bit 303 I ? GPIO[30]
+bit 302 I ? GPIO[29]
+bit 301 I ? GPIO[28]
+bit 300 I ? GPIO[27]
+bit 299 I ? GPIO[26]
+bit 298 I ? GPIO[25]
+bit 297 I ? GPIO[24]
+bit 296 I ? GPIO[23]
+bit 295 I ? GPIO[22]
+bit 294 I ? GPIO[21]
+bit 293 I ? GPIO[20]
+bit 292 I ? GPIO[19]
+bit 291 I ? GPIO[18]
+bit 290 I ? GPIO[17]
+bit 289 I ? GPIO[16]
+bit 288 I ? GPIO[15]
+bit 287 I ? GPIO[14]
+bit 286 I ? GPIO[13]
+bit 285 I ? GPIO[12]
+bit 284 I ? GPIO[11]
+bit 283 I ? GPIO[10]
+bit 282 I ? GPIO[9]
+bit 281 I ? GPIO[8]
+bit 280 I ? GPIO[7]
+bit 279 I ? GPIO[6]
+bit 278 I ? GPIO[5]
+bit 277 I ? GPIO[4]
+bit 276 I ? GPIO[3]
+bit 275 I ? GPIO[2]
+bit 274 I ? GPIO[1]
+bit 273 I ? GPIO[0]
+bit 272 O ? MA[25] 226 0 Z
+bit 271 O ? MA[24] 226 0 Z
+bit 270 O ? MA[23] 226 0 Z
+bit 269 O ? MA[22] 226 0 Z
+bit 268 O ? MA[21] 226 0 Z
+bit 267 O ? MA[20] 226 0 Z
+bit 266 O ? MA[19] 226 0 Z
+bit 265 O ? MA[18] 226 0 Z
+bit 264 O ? MA[17] 226 0 Z
+bit 263 O ? MA[16] 226 0 Z
+bit 262 O ? MA[15] 226 0 Z
+bit 261 O ? MA[14] 226 0 Z
+bit 260 O ? MA[13] 226 0 Z
+bit 259 O ? MA[12] 226 0 Z
+bit 258 O ? MA[11] 226 0 Z
+bit 257 O ? MA[10] 226 0 Z
+bit 256 O ? MA[9] 226 0 Z
+bit 255 O ? MA[8] 226 0 Z
+bit 254 O ? MA[7] 226 0 Z
+bit 253 O ? MA[6] 226 0 Z
+bit 252 O ? MA[5] 226 0 Z
+bit 251 O ? MA[4] 226 0 Z
+bit 250 O ? MA[3] 226 0 Z
+bit 249 O ? MA[2] 226 0 Z
+bit 248 O ? MA[1] 226 0 Z
+bit 247 O ? MA[0] 226 0 Z
+bit 246 O ? nCS[0] 224 0 Z
+bit 245 O ? nOE 225 0 Z
+bit 244 O ? nWE 225 0 Z
+bit 243 O ? nSDRAS 226 0 Z
+bit 242 O ? nSDCAS 226 0 Z
+bit 241 O ? DQM[3] 223 0 Z
+bit 240 O ? DQM[2] 223 0 Z
+bit 239 O ? DQM[1] 226 0 Z
+bit 238 O ? DQM[0] 226 0 Z
+bit 237 C ? .
+bit 236 C ? .
+bit 235 O ? nSDCS[1]
+bit 234 O ? nSDCS[0] 226 0 Z
+bit 233 O ? SDCKE[1]
+bit 232 O ? SDCKE[0]
+bit 231 O ? SDCLK[2]
+bit 230 O ? SDCLK[1] 226 0 Z
+bit 229 O ? SDCLK[0]
+bit 228 O ? nRESET_OUT
+bit 227 O ? PWR_EN
+bit 226 C ? .
+bit 225 C ? .
+bit 224 C ? .
+bit 223 C ? .
+bit 222 O ? MD[31] 93 0 Z
+bit 221 O ? MD[30] 93 0 Z
+bit 220 O ? MD[29] 93 0 Z
+bit 219 O ? MD[28] 93 0 Z
+bit 218 O ? MD[27] 93 0 Z
+bit 217 O ? MD[26] 93 0 Z
+bit 216 O ? MD[25] 93 0 Z
+bit 215 O ? MD[24] 93 0 Z
+bit 214 O ? MD[23] 93 0 Z
+bit 213 O ? MD[22] 93 0 Z
+bit 212 O ? MD[21] 93 0 Z
+bit 211 O ? MD[20] 93 0 Z
+bit 210 O ? MD[19] 93 0 Z
+bit 209 O ? MD[18] 93 0 Z
+bit 208 O ? MD[17] 93 0 Z
+bit 207 O ? MD[16] 93 0 Z
+bit 206 O ? MD[15] 94 0 Z
+bit 205 O ? MD[14] 94 0 Z
+bit 204 O ? MD[13] 94 0 Z
+bit 203 O ? MD[12] 94 0 Z
+bit 202 O ? MD[11] 94 0 Z
+bit 201 O ? MD[10] 94 0 Z
+bit 200 O ? MD[9] 94 0 Z
+bit 199 O ? MD[8] 94 0 Z
+bit 198 O ? MD[7] 94 0 Z
+bit 197 O ? MD[6] 94 0 Z
+bit 196 O ? MD[5] 94 0 Z
+bit 195 O ? MD[4] 94 0 Z
+bit 194 O ? MD[3] 94 0 Z
+bit 193 O ? MD[2] 94 0 Z
+bit 192 O ? MD[1] 94 0 Z
+bit 191 O ? MD[0] 94 0 Z
+bit 190 O ? MMCMD 92 0 Z
+bit 189 O ? MMDAT 91 0 Z
+bit 188 O ? USB_P 90 0 Z
+bit 187 O ? USB_N 90 0 Z
+bit 186 O ? SDA 237 0 Z
+bit 185 O ? SCL 236 0 Z
+bit 184 O ? nACRESET 89 0 Z	# see Table 2-7. in [5]
+bit 183 O ? RDnWR 88 0 Z	# see Table 2-7. in [5]
+bit 182 O ? nSDCS[3] 87 0 Z	# see Table 2-7. in [5]
+bit 181 O ? nSDCS[2] 86 0 Z	# see Table 2-7. in [5]
+bit 180 O ? GPIO[85] 85 0 Z
+bit 179 O ? GPIO[84] 84 0 Z
+bit 178 O ? GPIO[83] 83 0 Z
+bit 177 O ? GPIO[82] 82 0 Z
+bit 176 O ? GPIO[81] 81 0 Z
+bit 175 O ? GPIO[80] 80 0 Z
+bit 174 O ? GPIO[79] 79 0 Z
+bit 173 O ? GPIO[78] 78 0 Z
+bit 172 O ? GPIO[77] 77 0 Z
+bit 171 O ? GPIO[76] 76 0 Z
+bit 170 O ? GPIO[75] 75 0 Z
+bit 169 O ? GPIO[74] 74 0 Z
+bit 168 O ? GPIO[73] 73 0 Z
+bit 167 O ? GPIO[72] 72 0 Z
+bit 166 O ? GPIO[71] 71 0 Z
+bit 165 O ? GPIO[70] 70 0 Z
+bit 164 O ? GPIO[69] 69 0 Z
+bit 163 O ? GPIO[68] 68 0 Z
+bit 162 O ? GPIO[67] 67 0 Z
+bit 161 O ? GPIO[66] 66 0 Z
+bit 160 O ? GPIO[65] 65 0 Z
+bit 159 O ? GPIO[64] 64 0 Z
+bit 158 O ? GPIO[63] 63 0 Z
+bit 157 O ? GPIO[62] 62 0 Z
+bit 156 O ? GPIO[61] 61 0 Z
+bit 155 O ? GPIO[60] 60 0 Z
+bit 154 O ? GPIO[59] 59 0 Z
+bit 153 O ? GPIO[58] 58 0 Z
+bit 152 O ? GPIO[57] 57 0 Z
+bit 151 O ? GPIO[56] 56 0 Z
+bit 150 O ? GPIO[55] 55 0 Z
+bit 149 O ? GPIO[54] 54 0 Z
+bit 148 O ? GPIO[53] 53 0 Z
+bit 147 O ? GPIO[52] 52 0 Z
+bit 146 O ? GPIO[51] 51 0 Z
+bit 145 O ? GPIO[50] 50 0 Z
+bit 144 O ? GPIO[49] 49 0 Z
+bit 143 O ? GPIO[48] 48 0 Z
+bit 142 O ? GPIO[47] 47 0 Z
+bit 141 O ? GPIO[46] 46 0 Z
+bit 140 O ? GPIO[45] 45 0 Z
+bit 139 O ? GPIO[44] 44 0 Z
+bit 138 O ? GPIO[43] 43 0 Z
+bit 137 O ? GPIO[42] 42 0 Z
+bit 136 O ? GPIO[41] 41 0 Z
+bit 135 O ? GPIO[40] 40 0 Z
+bit 134 O ? GPIO[39] 39 0 Z
+bit 133 O ? GPIO[38] 38 0 Z
+bit 132 O ? GPIO[37] 37 0 Z
+bit 131 O ? GPIO[36] 36 0 Z
+bit 130 O ? GPIO[35] 35 0 Z
+bit 129 O ? GPIO[34] 34 0 Z
+bit 128 O ? GPIO[33] 33 0 Z
+bit 127 O ? GPIO[32] 32 0 Z
+bit 126 O ? GPIO[31] 31 0 Z
+bit 125 O ? GPIO[30] 30 0 Z
+bit 124 O ? GPIO[29] 29 0 Z
+bit 123 O ? GPIO[28] 28 0 Z
+bit 122 O ? GPIO[27] 27 0 Z
+bit 121 O ? GPIO[26] 26 0 Z
+bit 120 O ? GPIO[25] 25 0 Z
+bit 119 O ? GPIO[24] 24 0 Z
+bit 118 O ? GPIO[23] 23 0 Z
+bit 117 O ? GPIO[22] 22 0 Z
+bit 116 O ? GPIO[21] 21 0 Z
+bit 115 O ? GPIO[20] 20 0 Z
+bit 114 O ? GPIO[19] 19 0 Z
+bit 113 O ? GPIO[18] 18 0 Z
+bit 112 O ? GPIO[17] 17 0 Z
+bit 111 O ? GPIO[16] 16 0 Z
+bit 110 O ? GPIO[15] 15 0 Z
+bit 109 O ? GPIO[14] 14 0 Z
+bit 108 O ? GPIO[13] 13 0 Z
+bit 107 O ? GPIO[12] 12 0 Z
+bit 106 O ? GPIO[11] 11 0 Z
+bit 105 O ? GPIO[10] 10 0 Z
+bit 104 O ? GPIO[9] 9 0 Z
+bit 103 O ? GPIO[8] 8 0 Z
+bit 102 O ? GPIO[7] 7 0 Z
+bit 101 O ? GPIO[6] 6 0 Z
+bit 100 O ? GPIO[5] 5 0 Z
+bit 99 O ? GPIO[4] 4 0 Z
+bit 98 O ? GPIO[3] 3 0 Z
+bit 97 O ? GPIO[2] 2 0 Z
+bit 96 O ? GPIO[1] 1 0 Z
+bit 95 O ? GPIO[0] 0 0 Z
+bit 94 C ? .
+bit 93 C ? .
+bit 92 C ? .
+bit 91 C ? .
+bit 90 C ? .
+bit 89 C ? .
+bit 88 C ? .
+bit 87 C ? .
+bit 86 C ? .
+bit 85 C ? .
+bit 84 C ? .
+bit 83 C ? .
+bit 82 C ? .
+bit 81 C ? .
+bit 80 C ? .
+bit 79 C ? .
+bit 78 C ? .
+bit 77 C ? .
+bit 76 C ? .
+bit 75 C ? .
+bit 74 C ? .
+bit 73 C ? .
+bit 72 C ? .
+bit 71 C ? .
+bit 70 C ? .
+bit 69 C ? .
+bit 68 C ? .
+bit 67 C ? .
+bit 66 C ? .
+bit 65 C ? .
+bit 64 C ? .
+bit 63 C ? .
+bit 62 C ? .
+bit 61 C ? .
+bit 60 C ? .
+bit 59 C ? .
+bit 58 C ? .
+bit 57 C ? .
+bit 56 C ? .
+bit 55 C ? .
+bit 54 C ? .
+bit 53 C ? .
+bit 52 C ? .
+bit 51 C ? .
+bit 50 C ? .
+bit 49 C ? .
+bit 48 C ? .
+bit 47 C ? .
+bit 46 C ? .
+bit 45 C ? .
+bit 44 C ? .
+bit 43 C ? .
+bit 42 C ? .
+bit 41 C ? .
+bit 40 C ? .
+bit 39 C ? .
+bit 38 C ? .
+bit 37 C ? .
+bit 36 C ? .
+bit 35 C ? .
+bit 34 C ? .
+bit 33 C ? .
+bit 32 C ? .
+bit 31 C ? .
+bit 30 C ? .
+bit 29 C ? .
+bit 28 C ? .
+bit 27 C ? .
+bit 26 C ? .
+bit 25 C ? .
+bit 24 C ? .
+bit 23 C ? .
+bit 22 C ? .
+bit 21 C ? .
+bit 20 C ? .
+bit 19 C ? .
+bit 18 C ? .
+bit 17 C ? .
+bit 16 C ? .
+bit 15 C ? .
+bit 14 C ? .
+bit 13 C ? .
+bit 12 C ? .
+bit 11 C ? .
+bit 10 C ? .
+bit 9 C ? .
+bit 8 C ? .
+bit 7 C ? .
+bit 6 C ? .
+bit 5 C ? .
+bit 4 C ? .
+bit 3 C ? .
+bit 2 C ? .
+bit 1 C ? .
+bit 0 C ? .
+
+initbus pxa2x0
--- a/sie_fs/usr/local/share/urjtag/intel/pxa270/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/intel/pxa270/STEPPINGS
@@ -0,0 +1,36 @@
+#
+# $Id: STEPPINGS,v 1.7 2003/03/18 22:54:45 telka Exp $
+#
+# Copyright (C) 2004 BEC Systems <http://bec-systems.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Cliff Brake <cliff.brake@gmail.com>
+#
+# Documentation:
+# [1] Intel Corporation, "Intel PXA270 Developers Manual"
+#     February 2003, Order Number: 278534-012
+#
+
+# bits 31-28 of the Device Identification Register
+# see D55. in [1]
+0000	pxa270		A0
+0001	pxa270		A1
+0010	pxa270		B0
+0011	pxa270		B1
+0100	pxa270		C0
+0111	pxa270		C5
+
--- a/sie_fs/usr/local/share/urjtag/intel/pxa270/pxa270
+++ b/sie_fs/usr/local/share/urjtag/intel/pxa270/pxa270
@@ -0,0 +1,802 @@
+#
+# $Id: pxa250c0,v 1.4 2003/09/05 21:09:11 telka Exp $
+#
+# JTAG declarations for PXA250C0
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# 2005-01-03: Cliff Brake <cliff.brake@gmail.com> <http://bec-systems.com>
+#   - Modified for PXA270 (from PXA255)
+#
+# Documentation:
+# [1] Intel Corporation, "Jflash source code", 
+#
+# [2] Intel Corporation, "Intel PAX270 Processor Electrical, Mechanical,
+#     and Thermal Specification", December 2004, Order Number: 280002-004
+
+# signals -- see "bulbcx.dat" file in [1] and Table 4-1 in [2]
+
+signal  nBATT_FAULT	AB24
+signal  BOOT_SEL	AB23
+signal  CLK_REQ		W24
+signal	nCS[0]		B3
+signal  DQM[0]		AB9
+signal  DQM[1]		AB10
+signal  DQM[2]		AC9
+signal  DQM[3]		AC10
+signal  GPIO[0]		V22
+signal  GPIO[1]		Y24
+signal  SYS_EN		AA24	# dedicated
+signal  GPIO[3]		W21
+signal  GPIO[4]		W23
+signal	PWR_CAP[0]	AB21
+signal  PWR_CAP[1]	AD22
+signal  PWR_CAP[2]	AC22
+signal	PWR_CAP[3]	AA20
+signal	GPIO[9]		U22
+signal  GPIO[10]	V23
+signal	GPIO[11]  	C11
+signal	GPIO[12]  	B10
+signal	GPIO[13]  	C10
+signal	GPIO[14]  	T24
+signal	GPIO[15]  	A3
+signal	GPIO[16]  	A18
+signal	GPIO[17]  	C16
+signal	GPIO[18]  	B9
+signal	GPIO[19]  	R22
+signal	GPIO[20]  	AB6
+signal	GPIO[21]  	AD5
+signal	GPIO[22]  	D13
+signal	GPIO[23]  	B16
+signal	GPIO[24]  	A17
+signal	GPIO[25]  	D16
+signal	GPIO[26]  	B15
+signal	GPIO[27]  	C15
+signal	GPIO[28]  	A14
+signal	GPIO[29]  	B13
+signal	GPIO[30]  	C13
+signal	GPIO[31]  	C12
+signal	GPIO[32]  	A20
+signal	GPIO[33]  	B6
+signal	GPIO[34]  	A21
+signal	GPIO[35]  	B19
+signal	GPIO[36]  	C14
+signal	GPIO[37]  	A15
+signal	GPIO[38]  	B14
+signal	GPIO[39]  	D19
+signal	GPIO[40]  	D14
+signal	GPIO[41]  	C18
+signal	GPIO[42]  	C21
+signal	GPIO[43]  	C22
+signal	GPIO[44]  	B20
+signal	GPIO[45]  	C19
+signal	GPIO[46]  	B11
+signal	GPIO[47]  	A11
+signal	GPIO[48]  	AC13
+signal	GPIO[49]  	A10
+signal	GPIO[50]  	AB13
+signal	GPIO[51]  	AD13
+signal	GPIO[52]  	AC14
+signal	GPIO[53]  	AB14
+signal	GPIO[54]  	AA14
+signal	GPIO[55]  	AA10
+signal	GPIO[56]  	AB11
+signal	GPIO[57]  	AC11
+signal	GPIO[58]  	G24
+signal	GPIO[59]  	G22
+signal	GPIO[60]  	G23
+signal	GPIO[61]  	H24
+signal	GPIO[62]  	H22
+signal	GPIO[63]  	H23
+signal	GPIO[64]  	J22
+signal	GPIO[65]  	K24
+signal	GPIO[66]  	K22
+signal	GPIO[67]  	K23
+signal	GPIO[68]  	L21
+signal	GPIO[69]  	L23
+signal	GPIO[70]  	M24
+signal	GPIO[71]  	L22
+signal	GPIO[72]  	N24
+signal	GPIO[73]  	M22
+signal	GPIO[74]  	R23
+signal	GPIO[75]  	P23
+signal	GPIO[76]  	P22
+signal	GPIO[77]  	R21
+signal	GPIO[78]  	B7
+signal	GPIO[79]  	C8
+signal	GPIO[80]  	C7
+signal	GPIO[81]  	AB12
+signal	GPIO[82]  	AD9
+signal	GPIO[83]  	AD10
+signal	GPIO[84]  	AA11
+signal	GPIO[85]  	AC12
+signal	GPIO[86]  	N22
+signal	GPIO[87]  	N23
+signal	GPIO[88]  	C23
+signal	GPIO[89]  	D22
+signal	GPIO[90]  	F22
+signal	GPIO[91]  	F23
+signal	GPIO[92]  	A19
+signal	GPIO[93]  	AB19
+signal	GPIO[94]  	AD19
+signal	GPIO[95]  	AA18
+signal	GPIO[96]  	AC19
+signal	GPIO[97]  	AA17
+signal	GPIO[98]  	AD18
+signal	GPIO[99]  	AB18
+signal	GPIO[100] 	AC18
+signal	GPIO[101] 	AC17
+signal	GPIO[102] 	AB17
+signal	GPIO[103] 	AC16
+signal	GPIO[104] 	AD15
+signal	GPIO[105] 	AB16
+signal	GPIO[106] 	AB15
+signal	GPIO[107] 	AC15
+signal	GPIO[108] 	AD14
+signal	GPIO[109] 	D17
+signal	GPIO[110] 	B17
+signal	GPIO[111] 	C17
+signal	GPIO[112] 	B18
+signal	GPIO[113] 	A13
+signal	GPIO[114] 	D24
+signal	GPIO[115] 	E21
+signal	GPIO[116] 	C24
+signal	GPIO[117] 	D20
+signal	GPIO[118] 	A22
+signal  MA[0]		C6
+signal  MA[1]		A6
+signal  MA[2]		K4
+signal  MA[3]		J1
+signal  MA[4]		K2
+signal  MA[5]		K3
+signal  MA[6]		J2
+signal  MA[7]		J3
+signal  MA[8]		G1
+signal  MA[9]		H2
+signal  MA[10]		H3
+signal  MA[11]		G2
+signal  MA[12]		G3
+signal  MA[13]		E1
+signal  MA[14]		F2
+signal  MA[15]		G4
+signal  MA[16]		F3
+signal  MA[17]		D1
+signal  MA[18]		C1
+signal  MA[19]		E3
+signal  MA[20]		E4
+signal  MA[21]		D2
+signal  MA[22]		C2
+signal  MA[23]		D4
+signal  MA[24]		C4
+signal  MA[25]		D6
+signal  MD[0]		AB4
+signal  MD[1]		AB1
+signal  MD[2]		AA3
+signal  MD[3]		Y3
+signal  MD[4]		Y2
+signal  MD[5]		U4
+signal  MD[6]		V3
+signal  MD[7]		U1
+signal  MD[8]		T3
+signal  MD[9]		R4
+signal  MD[10]		P4
+signal  MD[11]		P2
+signal  MD[12]		N3
+signal  MD[13]		M4
+signal  MD[14]		L1
+signal  MD[15]		K1
+signal  MD[16]		AA4
+signal  MD[17]		AB3
+signal  MD[18]		AA1
+signal  MD[19]		Y1
+signal  MD[20]		W1
+signal  MD[21]		V1
+signal  MD[22]		V2
+signal  MD[23]		T1
+signal  MD[24]		R1
+signal  MD[25]		R3
+signal  MD[26]		P3
+signal  MD[27]		N1
+signal  MD[28]		N2
+signal  MD[29]		M3
+signal  MD[30]		M2
+signal  MD[31]		L2
+signal	nOE		AC5
+signal	PWR_EN		Y23
+signal	PWR_OUT		AB22  
+signal	PXTAL_IN	AC21
+signal	PXTAL_OUT	AD21
+signal	nRESET		Y22
+signal	nRESET_OUT	Y21
+signal  RDnWR		C9
+signal	nSDCAS		AA6
+signal	nSDCS[0]	AB7
+signal	nSDCS[1]	AB8
+signal	SDCKE[1]	AD6
+signal	SDCLK[0]	AC4
+signal	SDCLK[1]	AD7
+signal	SDCLK[2]	AD3
+signal	nSDRAS		AC7
+signal	TEST		U24
+signal	TESTCLK		T23
+signal	TXTAL_IN	AA22
+signal	TXTAL_OUT	AA23
+signal	TDI		U23  
+signal  TMS		T21  
+signal	TCK		T22  
+signal	TDO		V24  
+signal	nTRST		U21
+signal	UIO		E23
+signal	USBC_N		C20
+signal	USBC_P		B22
+signal	USBH_N_0	D23
+signal	USBH_P_0	E22
+signal	VCC_BATT	AB20
+signal	VCC_BB		AD12
+signal	VCC_CORE	AD11 T2 AD4 W3 B21 M23 R24 AD16 F24 L24 J23 D3 A7 B12
+signal	VCC_IO		AD17 A12 A16
+signal	VCC_LCD		J24 P24
+signal	VCC_MEM		W2 AC6 A4 B8 AC8 AA2 U2 AD8 F1 H1 M1 AD1 AC1 AC2 AD2 L3 E2 C3 P1  
+signal  VCC_PLL     	AC20  
+signal	VCC_RAM		B4 A5 A8 A9  
+signal	VCC_USB		A23 A24 B23 B24
+signal	VCC_USIM	E24  
+signal	VSS_BB		AA13  
+signal	VSS_CORE	AA12 W4 D8 D12 D21 G21 K21 P21 AA7 U3 M21 AA15 D10 J21 A1 B1 A2 B2 D7 B5  
+signal	VSS_IO		D11 D15 D18 F21 H21 N21 AA19 AA16                        
+signal	VSS_MEM		Y4 C5 R2 N4 D9 AA9 AA8 AA5 V4 T4 L4 AB2 AC3 J4 H4 F4 D5  
+signal	VSS_PAD		V21 AD23 AC23 AD24 AC24 AA21  
+signal	VSS_PLL		AD20  
+signal	nVDD_FAULT	W22
+signal	nWE		AB5
+
+# mandatory data registers
+register	BSR		504	# Boundary Scan Register (see [3])
+register	BR		1	# Bypass Register
+# optional data registers
+register	DIR		32	# Device Identification Register
+# user defined registers
+#register	DBG_SR		36	# see 10.10 in [2]
+#register	LDIC_SR1	33	# see 10.13.2 in [2]
+
+# see 9.3.1 in [2]
+instruction length 7
+# mandatory instructions
+instruction EXTEST		0000000	BSR
+instruction SAMPLE/PRELOAD	0000001	BSR
+instruction BYPASS		1111111	BR
+# optional instructions
+instruction CLAMP		0000100	BR
+instruction HIGHZ		0001000	BR
+instruction IDCODE		1111110	DIR
+# user-defined instructions
+#instruction DBGRX		00010	DBG_SR
+#instruction LDIC		00111	LDIC_SR1
+#instruction SELDCSR		01001	DBG_SR	# see 10.10.1 in [2]
+#instruction DBGTX		10000	DBG_SR
+
+#========================================================================
+
+bit 503 O 0 *
+bit 502 I 1 USBH_P_0
+bit 501 O 0 *
+bit 500 I 1 USBH_N_0
+bit 499 I 1 USBC_P
+bit 498 I 1 USBC_N
+bit 497 I 1 UIO
+bit 496 I 1 TESTCLK
+bit 495 I 1 TEST
+bit 494 I 1 NVDD_FAULT
+bit 493 I 1 NRESET
+bit 492 I 1 NBATT_FAULT
+bit 491 I 1 MD[0]
+bit 490 I 1 MD[1]
+bit 489 I 1 MD[2]
+bit 488 I 1 MD[3]
+bit 487 I 1 MD[4]
+bit 486 I 1 MD[5]
+bit 485 I 1 MD[6]
+bit 484 I 1 MD[7]
+bit 483 I 1 MD[8]
+bit 482 I 1 MD[9]
+bit 481 I 1 MD[10]
+bit 480 I 1 MD[11]
+bit 479 I 1 MD[12]
+bit 478 I 1 MD[13]
+bit 477 I 1 MD[14]
+bit 476 I 1 MD[15]
+bit 475 I 1 MD[16]
+bit 474 I 1 MD[17]
+bit 473 I 1 MD[18]
+bit 472 I 1 MD[19]
+bit 471 I 1 MD[20]
+bit 470 I 1 MD[21]
+bit 469 I 1 MD[22]
+bit 468 I 1 MD[23]
+bit 467 I 1 MD[24]
+bit 466 I 1 MD[25]
+bit 465 I 1 MD[26]
+bit 464 I 1 MD[27]
+bit 463 I 1 MD[28]
+bit 462 I 1 MD[29]
+bit 461 I 1 MD[30]
+bit 460 I 1 MD[31]
+bit 459 I 1 GPIO[0]
+bit 458 I 1 GPIO[1]
+bit 457 I 1 GPIO[2]
+bit 456 I 1 GPIO[3]
+bit 455 I 1 GPIO[4]
+bit 454 I 1 GPIO[5]
+bit 453 I 1 GPIO[6]
+bit 452 I 1 GPIO[7]
+bit 451 I 1 GPIO[8]
+bit 450 I 1 GPIO[9]
+bit 449 I 1 GPIO[10]
+bit 448 I 1 GPIO[11]
+bit 447 I 1 GPIO[12]
+bit 446 I 1 GPIO[13]
+bit 445 I 1 GPIO[14]
+bit 444 I 1 GPIO[15]
+bit 443 I 1 GPIO[16]
+bit 442 I 1 GPIO[17]
+bit 441 I 1 GPIO[18]
+bit 440 I 1 GPIO[19]
+bit 439 I 1 GPIO[20]
+bit 438 I 1 GPIO[21]
+bit 437 I 1 GPIO[22]
+bit 436 I 1 GPIO[23]
+bit 435 I 1 GPIO[24]
+bit 434 I 1 GPIO[25]
+bit 433 I 1 GPIO[26]
+bit 432 I 1 GPIO[27]
+bit 431 I 1 GPIO[28]
+bit 430 I 1 GPIO[29]
+bit 429 I 1 GPIO[30]
+bit 428 I 1 GPIO[31]
+bit 427 I 1 GPIO[32]
+bit 426 I 1 GPIO[33]
+bit 425 I 1 GPIO[34]
+bit 424 I 1 GPIO[35]
+bit 423 I 1 GPIO[36]
+bit 422 I 1 GPIO[37]
+bit 421 I 1 GPIO[38]
+bit 420 I 1 GPIO[39]
+bit 419 I 1 GPIO[40]
+bit 418 I 1 GPIO[41]
+bit 417 I 1 GPIO[42]
+bit 416 I 1 GPIO[43]
+bit 415 I 1 GPIO[44]
+bit 414 I 1 GPIO[45]
+bit 413 I 1 GPIO[46]
+bit 412 I 1 GPIO[47]
+bit 411 I 1 GPIO[48]
+bit 410 I 1 GPIO[49]
+bit 409 I 1 GPIO[50]
+bit 408 I 1 GPIO[51]
+bit 407 I 1 GPIO[52]
+bit 406 I 1 GPIO[53]
+bit 405 I 1 GPIO[54]
+bit 404 I 1 GPIO[55]
+bit 403 I 1 GPIO[56]
+bit 402 I 1 GPIO[57]
+bit 401 I 1 GPIO[58]
+bit 400 I 1 GPIO[59]
+bit 399 I 1 GPIO[60]
+bit 398 I 1 GPIO[61]
+bit 397 I 1 GPIO[62]
+bit 396 I 1 GPIO[63]
+bit 395 I 1 GPIO[64]
+bit 394 I 1 GPIO[65]
+bit 393 I 1 GPIO[66]
+bit 392 I 1 GPIO[67]
+bit 391 I 1 GPIO[68]
+bit 390 I 1 GPIO[69]
+bit 389 I 1 GPIO[70]
+bit 388 I 1 GPIO[71]
+bit 387 I 1 GPIO[72]
+bit 386 I 1 GPIO[73]
+bit 385 I 1 GPIO[74]
+bit 384 I 1 GPIO[75]
+bit 383 I 1 GPIO[76]
+bit 382 I 1 GPIO[77]
+bit 381 I 1 GPIO[78]
+bit 380 I 1 GPIO[79]
+bit 379 I 1 GPIO[80]
+bit 378 I 1 GPIO[81]
+bit 377 I 1 GPIO[82]
+bit 376 I 1 GPIO[83]
+bit 375 I 1 GPIO[84]
+bit 374 I 1 GPIO[85]
+bit 373 I 1 GPIO[86]
+bit 372 I 1 GPIO[87]
+bit 371 I 1 GPIO[88]
+bit 370 I 1 GPIO[89]
+bit 369 I 1 GPIO[90]
+bit 368 I 1 GPIO[91]
+bit 367 I 1 GPIO[92]
+bit 366 I 1 GPIO[93]
+bit 365 I 1 GPIO[94]
+bit 364 I 1 GPIO[95]
+bit 363 I 1 GPIO[96]
+bit 362 I 1 GPIO[97]
+bit 361 I 1 GPIO[98]
+bit 360 I 1 GPIO[99]
+bit 359 I 1 GPIO[100]
+bit 358 I 1 GPIO[101]
+bit 357 I 1 GPIO[102]
+bit 356 I 1 GPIO[103]
+bit 355 I 1 GPIO[104]
+bit 354 I 1 GPIO[105]
+bit 353 I 1 GPIO[106]
+bit 352 I 1 GPIO[107]
+bit 351 I 1 GPIO[108]
+bit 350 I 1 GPIO[109]
+bit 349 I 1 GPIO[110]
+bit 348 I 1 GPIO[111]
+bit 347 I 1 GPIO[112]
+bit 346 I 1 GPIO[113]
+bit 345 I 1 GPIO[114]
+bit 344 I 1 GPIO[115]
+bit 343 I 1 GPIO[116]
+bit 342 I 1 GPIO[117]
+bit 341 I 1 GPIO[118]
+bit 340 O 0 *
+bit 339 O 0 *
+bit 338 I 1 CLK_REQ
+bit 337 I 1 BOOT_SEL
+bit 336 O 0 *
+bit 335 O 1 USBH_P_0 331 1 Z
+bit 334 O 0 *
+bit 333 O 1 USBH_N_0 331 1 Z
+bit 332 O 1 *
+bit 331 C 1 *
+bit 330 O 1 USBC_P 328 0 Z
+bit 329 O 1 USBC_N 328 0 Z
+bit 328 C 0 *
+bit 327 C 0 *
+bit 326 O 1 UIO 327 0 Z
+bit 325 C 0 *
+bit 324 O 1 SDCLK[2] 75 0 Z
+bit 323 O 1 SDCLK[1] 69 0 Z
+bit 322 O 1 SDCKE[1] 75 0 Z
+bit 321 O 1 nSDRAS 69 0 Z
+bit 320 O 1 nSDCS[1] 75 0 Z
+bit 319 O 1 nSDCS[0] 69 0 Z
+bit 318 O 1 GPIO[0] 197 0 Z
+bit 317 O 1 GPIO[1] 196 0 Z
+bit 316 O 1 GPIO[2] 195 0 Z
+bit 315 O 1 GPIO[3] 194 0 Z
+bit 314 O 1 GPIO[4] 193 0 Z
+bit 313 O 1 GPIO[5] 192 0 Z
+bit 312 O 1 GPIO[6] 191 0 Z
+bit 311 O 1 GPIO[7] 190 0 Z
+bit 310 O 1 GPIO[8] 189 0 Z
+bit 309 O 1 GPIO[9] 188 0 Z
+bit 308 O 1 GPIO[10] 187 0 Z
+bit 307 O 1 GPIO[11] 186 0 Z
+bit 306 O 1 GPIO[12] 185 0 Z
+bit 305 O 1 GPIO[13] 184 0 Z
+bit 304 O 1 GPIO[14] 183 0 Z
+bit 303 O 1 GPIO[15] 182 0 Z
+bit 302 O 1 GPIO[16] 181 0 Z
+bit 301 O 1 GPIO[17] 180 0 Z
+bit 300 O 1 GPIO[18] 179 0 Z
+bit 299 O 1 GPIO[19] 178 0 Z
+bit 298 O 1 GPIO[20] 177 0 Z
+bit 297 O 1 GPIO[21] 176 0 Z
+bit 296 O 1 GPIO[22] 175 0 Z
+bit 295 O 1 GPIO[23] 174 0 Z
+bit 294 O 1 GPIO[24] 173 0 Z
+bit 293 O 1 GPIO[25] 172 0 Z
+bit 292 O 1 GPIO[26] 171 0 Z
+bit 291 O 1 GPIO[27] 170 0 Z
+bit 290 O 1 GPIO[28] 169 0 Z
+bit 289 O 1 GPIO[29] 168 0 Z
+bit 288 O 1 GPIO[30] 167 0 Z
+bit 287 O 1 GPIO[31] 166 0 Z
+bit 286 O 1 GPIO[32] 165 0 Z
+bit 285 O 1 GPIO[33] 164 0 Z
+bit 284 O 1 GPIO[34] 163 0 Z
+bit 283 O 1 GPIO[35] 162 0 Z
+bit 282 O 1 GPIO[36] 161 0 Z
+bit 281 O 1 GPIO[37] 160 0 Z
+bit 280 O 1 GPIO[38] 159 0 Z
+bit 279 O 1 GPIO[39] 158 0 Z
+bit 278 O 1 GPIO[40] 157 0 Z
+bit 277 O 1 GPIO[41] 156 0 Z
+bit 276 O 1 GPIO[42] 155 0 Z
+bit 275 O 1 GPIO[43] 154 0 Z
+bit 274 O 1 GPIO[44] 153 0 Z
+bit 273 O 1 GPIO[45] 152 0 Z
+bit 272 O 1 GPIO[46] 151 0 Z
+bit 271 O 1 GPIO[47] 150 0 Z
+bit 270 O 1 GPIO[48] 149 0 Z
+bit 269 O 1 GPIO[49] 148 0 Z
+bit 268 O 1 GPIO[50] 147 0 Z
+bit 267 O 1 GPIO[51] 146 0 Z
+bit 266 O 1 GPIO[52] 145 0 Z
+bit 265 O 1 GPIO[53] 144 0 Z
+bit 264 O 1 GPIO[54] 143 0 Z
+bit 263 O 1 GPIO[55] 142 0 Z
+bit 262 O 1 GPIO[56] 141 0 Z
+bit 261 O 1 GPIO[57] 140 0 Z
+bit 260 O 1 GPIO[58] 139 0 Z
+bit 259 O 1 GPIO[59] 138 0 Z
+bit 258 O 1 GPIO[60] 137 0 Z
+bit 257 O 1 GPIO[61] 136 0 Z
+bit 256 O 1 GPIO[62] 135 0 Z
+bit 255 O 1 GPIO[63] 134 0 Z
+bit 254 O 1 GPIO[64] 133 0 Z
+bit 253 O 1 GPIO[65] 132 0 Z
+bit 252 O 1 GPIO[66] 131 0 Z
+bit 251 O 1 GPIO[67] 130 0 Z
+bit 250 O 1 GPIO[68] 129 0 Z
+bit 249 O 1 GPIO[69] 128 0 Z
+bit 248 O 1 GPIO[70] 127 0 Z
+bit 247 O 1 GPIO[71] 126 0 Z
+bit 246 O 1 GPIO[72] 125 0 Z
+bit 245 O 1 GPIO[73] 124 0 Z
+bit 244 O 1 GPIO[74] 123 0 Z
+bit 243 O 1 GPIO[75] 122 0 Z
+bit 242 O 1 GPIO[76] 121 0 Z
+bit 241 O 1 GPIO[77] 120 0 Z
+bit 240 O 1 GPIO[78] 119 0 Z
+bit 239 O 1 GPIO[79] 118 0 Z
+bit 238 O 1 GPIO[80] 117 0 Z
+bit 237 O 1 GPIO[81] 116 0 Z
+bit 236 O 1 GPIO[82] 115 0 Z
+bit 235 O 1 GPIO[83] 114 0 Z
+bit 234 O 1 GPIO[84] 113 0 Z
+bit 233 O 1 GPIO[85] 112 0 Z
+bit 232 O 1 GPIO[86] 111 0 Z
+bit 231 O 1 GPIO[87] 110 0 Z
+bit 230 O 1 GPIO[88] 109 0 Z
+bit 229 O 1 GPIO[89] 108 0 Z
+bit 228 O 1 GPIO[90] 107 0 Z
+bit 227 O 1 GPIO[91] 106 0 Z
+bit 226 O 1 GPIO[92] 105 0 Z
+bit 225 O 1 GPIO[93] 104 0 Z
+bit 224 O 1 GPIO[94] 103 0 Z
+bit 223 O 1 GPIO[95] 102 0 Z
+bit 222 O 1 GPIO[96] 101 0 Z
+bit 221 O 1 GPIO[97] 100 0 Z
+bit 220 O 1 GPIO[98] 99 0 Z
+bit 219 O 1 GPIO[99] 98 0 Z
+bit 218 O 1 GPIO[100] 97 0 Z
+bit 217 O 1 GPIO[101] 96 0 Z
+bit 216 O 1 GPIO[102] 95 0 Z
+bit 215 O 1 GPIO[103] 94 0 Z
+bit 214 O 1 GPIO[104] 93 0 Z
+bit 213 O 1 GPIO[105] 92 0 Z
+bit 212 O 1 GPIO[106] 91 0 Z
+bit 211 O 1 GPIO[107] 90 0 Z
+bit 210 O 1 GPIO[108] 89 0 Z
+bit 209 O 1 GPIO[109] 88 0 Z
+bit 208 O 1 GPIO[110] 87 0 Z
+bit 207 O 1 GPIO[111] 86 0 Z
+bit 206 O 1 GPIO[112] 85 0 Z
+bit 205 O 1 GPIO[113] 84 0 Z
+bit 204 O 1 GPIO[114] 83 0 Z
+bit 203 O 1 GPIO[115] 82 0 Z
+bit 202 O 1 GPIO[116] 81 0 Z
+bit 201 O 1 GPIO[117] 80 0 Z
+bit 200 O 1 GPIO[118] 79 0 Z
+bit 199 O 0 *       
+bit 198 O 0 *
+bit 197 C 0 *
+bit 196 C 0 *
+bit 195 C 0 *
+bit 194 C 0 *
+bit 193 C 0 *
+bit 192 C 0 *
+bit 191 C 0 *
+bit 190 C 0 *
+bit 189 C 0 *
+bit 188 C 0 *
+bit 187 C 0 *
+bit 186 C 0 *
+bit 185 C 0 *
+bit 184 C 0 *
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 C 0 *
+bit 179 C 0 *
+bit 178 C 0 *
+bit 177 C 0 *
+bit 176 C 0 *
+bit 175 C 0 *
+bit 174 C 0 *
+bit 173 C 0 *
+bit 172 C 0 *
+bit 171 C 0 *
+bit 170 C 0 *
+bit 169 C 0 *
+bit 168 C 0 *
+bit 167 C 0 *
+bit 166 C 0 *
+bit 165 C 0 *
+bit 164 C 0 *
+bit 163 C 0 *
+bit 162 C 0 *
+bit 161 C 0 *
+bit 160 C 0 *
+bit 159 C 0 *
+bit 158 C 0 *
+bit 157 C 0 *
+bit 156 C 0 *
+bit 155 C 0 *
+bit 154 C 0 *
+bit 153 C 0 *
+bit 152 C 0 *
+bit 151 C 0 *
+bit 150 C 0 *
+bit 149 C 0 *
+bit 148 C 0 *
+bit 147 C 0 *
+bit 146 C 0 *
+bit 145 C 0 *
+bit 144 C 0 *
+bit 143 C 0 *
+bit 142 C 0 *
+bit 141 C 0 *
+bit 140 C 0 *
+bit 139 C 0 *
+bit 138 C 0 *
+bit 137 C 0 *
+bit 136 C 0 *
+bit 135 C 0 *
+bit 134 C 0 *
+bit 133 C 0 *
+bit 132 C 0 *
+bit 131 C 0 *
+bit 130 C 0 *
+bit 129 C 0 *
+bit 128 C 0 *
+bit 127 C 0 *
+bit 126 C 0 *
+bit 125 C 0 *
+bit 124 C 0 *
+bit 123 C 0 *
+bit 122 C 0 *
+bit 121 C 0 *
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 C 0 *
+bit 115 C 0 *
+bit 114 C 0 *
+bit 113 C 0 *
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 C 0 *
+bit 108 C 0 *
+bit 107 C 0 *
+bit 106 C 0 *
+bit 105 C 0 *
+bit 104 C 0 *
+bit 103 C 0 *
+bit 102 C 0 *
+bit 101 C 0 *
+bit 100 C 0 *                            
+bit 99 C 0 *
+bit 98 C 0 *
+bit 97 C 0 *
+bit 96 C 0 *
+bit 95 C 0 *
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 C 0 *
+bit 90 C 0 *
+bit 89 C 0 *
+bit 88 C 0 *
+bit 87 C 0 *
+bit 86 C 0 *
+bit 85 C 0 *
+bit 84 C 0 *
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 C 0 *
+bit 79 C 0 *
+bit 78 O 0 *
+bit 77 O 0 *
+bit 76 O 1 CLK_REQ 325 0 Z
+bit 75 C 0 *
+bit 74 C 0 *
+bit 73 C 0 *
+bit 72 C 0 *
+bit 71 C 0 *
+bit 70 C 0 *
+bit 69 C 0 *
+bit 68 O 1 RDnWR 69 0 Z
+bit 67 O 1 DQM[0] 69 0 Z
+bit 66 O 1 DQM[1] 69 0 Z
+bit 65 O 1 DQM[2] 70 0 Z
+bit 64 O 1 DQM[3] 70 0 Z
+bit 63 O 0 *
+bit 62 O 1 SDCLK[0] 75 0 Z
+bit 61 O 1 nCS[0] 74 0 Z
+bit 60 O 1 nOE 74 0 Z
+bit 59 O 1 nWE 73 0 Z
+bit 58 O 1 nSDCAS 69 0 Z
+bit 57 O 1 MD[0] 71 0 Z
+bit 56 O 1 MD[1] 71 0 Z
+bit 55 O 1 MD[2] 71 0 Z
+bit 54 O 1 MD[3] 71 0 Z
+bit 53 O 1 MD[4] 71 0 Z
+bit 52 O 1 MD[5] 71 0 Z
+bit 51 O 1 MD[6] 71 0 Z
+bit 50 O 1 MD[7] 71 0 Z
+bit 49 O 1 MD[8] 71 0 Z
+bit 48 O 1 MD[9] 71 0 Z
+bit 47 O 1 MD[10] 71 0 Z
+bit 46 O 1 MD[11] 71 0 Z
+bit 45 O 1 MD[12] 71 0 Z
+bit 44 O 1 MD[13] 71 0 Z
+bit 43 O 1 MD[14] 71 0 Z
+bit 42 O 1 MD[15] 71 0 Z
+bit 41 O 1 MD[16] 72 0 Z
+bit 40 O 1 MD[17] 72 0 Z
+bit 39 O 1 MD[18] 72 0 Z
+bit 38 O 1 MD[19] 72 0 Z
+bit 37 O 1 MD[20] 72 0 Z
+bit 36 O 1 MD[21] 72 0 Z
+bit 35 O 1 MD[22] 72 0 Z
+bit 34 O 1 MD[23] 72 0 Z
+bit 33 O 1 MD[24] 72 0 Z
+bit 32 O 1 MD[25] 72 0 Z
+bit 31 O 1 MD[26] 72 0 Z
+bit 30 O 1 MD[27] 72 0 Z
+bit 29 O 1 MD[28] 72 0 Z
+bit 28 O 1 MD[29] 72 0 Z
+bit 27 O 1 MD[30] 72 0 Z
+bit 26 O 1 MD[31] 72 0 Z
+bit 25 O 1 MA[0] 69 0 Z
+bit 24 O 1 MA[1] 69 0 Z
+bit 23 O 1 MA[2] 69 0 Z
+bit 22 O 1 MA[3] 69 0 Z
+bit 21 O 1 MA[4] 69 0 Z
+bit 20 O 1 MA[5] 69 0 Z
+bit 19 O 1 MA[6] 69 0 Z
+bit 18 O 1 MA[7] 69 0 Z
+bit 17 O 1 MA[8] 69 0 Z
+bit 16 O 1 MA[9] 69 0 Z
+bit 15 O 1 MA[10] 69 0 Z
+bit 14 O 1 MA[11] 69 0 Z
+bit 13 O 1 MA[12] 69 0 Z
+bit 12 O 1 MA[13] 69 0 Z
+bit 11 O 1 MA[14] 69 0 Z
+bit 10 O 1 MA[15] 69 0 Z
+bit 9 O 1 MA[16] 69 0 Z
+bit 8 O 1 MA[17] 69 0 Z
+bit 7 O 1 MA[18] 69 0 Z
+bit 6 O 1 MA[19] 69 0 Z
+bit 5 O 1 MA[20] 69 0 Z
+bit 4 O 1 MA[21] 69 0 Z
+bit 3 O 1 MA[22] 69 0 Z
+bit 2 O 1 MA[23] 69 0 Z
+bit 1 O 1 MA[24] 69 0 Z
+bit 0 O 1 MA[25] 69 0 Z
+
+initbus pxa27x
+
--- a/sie_fs/usr/local/share/urjtag/intel/sa1110/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/intel/sa1110/STEPPINGS
@@ -0,0 +1,35 @@
+#
+# $Id: STEPPINGS 111 2002-08-26 20:08:09Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+#     Developer's Manual", October 2001, Order Number: 278240-004
+#
+
+# bits 31-28 of the Device Identification Register
+# see 16.6.2 in [1]
+0000	sa1110		A0
+0100	sa1110		B0
+0101	sa1110		B1
+0110	sa1110		B2
+1000	sa1110		B4
+1001	sa1110		B5
--- a/sie_fs/usr/local/share/urjtag/intel/sa1110/sa1110
+++ b/sie_fs/usr/local/share/urjtag/intel/sa1110/sa1110
@@ -0,0 +1,516 @@
+#
+# $Id: sa1110 558 2003-09-05 21:09:14Z telka $
+#
+# JTAG declarations for SA-1110
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+#     Developer's Manual", October 2001, Order Number: 278240-004
+# [2] Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
+#     Specification Update", December 2001, Order Number: 278259-023
+#
+
+# see Table 14-2 in [1]
+signal	A0		D12
+signal	A1		C12
+signal	A2		B12
+signal	A3		A13
+signal	A4		C13
+signal	A5		B13
+signal	A6		A14
+signal	A7		A15
+signal	A8		A16
+signal	A9		B15
+signal	A10		B14
+signal	A11		C14
+signal	A12		B16
+signal	A13		D13
+signal	A14		E13
+signal	A15		C16
+signal	A16		D15
+signal	A17		E14
+signal	A18		D16
+signal	A19		E15
+signal	A20		F14
+signal	A21		E16
+signal	A22		F15
+signal	A23		F13
+signal	A24		G13
+signal	A25		F16
+signal	BATT_FAULT	A4
+signal	nCAS0		J14
+signal	nCAS1		J15
+signal	nCAS2		K15
+signal	nCAS3		K13
+signal	nCS0		G14
+signal	nCS1		G15
+signal	nCS2		G16
+signal	nCS3		H14
+signal	nCS4		H15
+signal	nCS5		H16
+signal	D0		E4
+signal	D1		F4
+signal	D2		F2
+signal	D3		G2
+signal	D4		H1
+signal	D5		J4
+signal	D6		K1
+signal	D7		L1
+signal	D8		D2
+signal	D9		E2
+signal	D10		F1
+signal	D11		H6
+signal	D12		J6
+signal	D13		J1
+signal	D14		K4
+signal	D15		L4
+signal	D16		D1
+signal	D17		E1
+signal	D18		G4
+signal	D19		G1
+signal	D20		J2
+signal	D21		K2
+signal	D22		L3
+signal	D23		M2
+signal	D24		E3
+signal	D25		F3
+signal	D26		G3
+signal	D27		H4
+signal	D28		J3
+signal	D29		K3
+signal	D30		L2
+signal	D31		M1
+signal	GP0		T10
+signal	GP1		P10
+signal	GP2		R10
+signal	GP3		N10
+signal	GP4		T9
+signal	GP5		P9
+signal	GP6		R8
+signal	GP7		N8
+signal	GP8		P8
+signal	GP9		T7
+signal	GP10		P7
+signal	GP11		T6
+signal	GP12		R7
+signal	GP13		R6
+signal	GP14		P6
+signal	GP15		N6
+signal	GP16		T5
+signal	GP17		R5
+signal	GP18		P5
+signal	GP19		T4
+signal	GP20		R4
+signal	GP21		T3
+signal	GP22		R3
+signal	GP23		T2
+signal	GP24		P4
+signal	GP25		R2
+signal	GP26		T1
+signal	GP27		R1
+signal	nIOIS16		N13
+signal	L_BIAS		R11
+signal	L_FCLK		T14
+signal	L_LCLK		R14
+signal	L_PCLK		P11
+signal	LDD0		N12
+signal	LDD1		T11
+signal	LDD2		R12
+signal	LDD3		P12
+signal	LDD4		T12
+signal	LDD5		R13
+signal	LDD6		T13
+signal	LDD7		P13
+signal	nOE		M15
+signal	nPCE1		M16
+signal	nPCE2		N15
+signal	PEXTAL		A8
+signal	nPIOR		T16
+signal	nPIOW		R16
+signal	nPOE		R15
+signal	nPREG		N14
+signal	PSKTSEL		P16
+signal	nPWAIT		N16
+signal	nPWE		T16
+signal	PWR_EN		A3
+signal	PXTAL		B8
+signal	nRAS0		K16
+signal	nRAS1		L13
+signal	nRAS2		L14
+signal	nRAS3		L15
+signal	RD_nWR		J13
+signal	RDY		H13
+signal	nRESET		B7
+signal	nRESET_OUT	C7
+signal	ROM_SEL		D6		# typo in Table 14-2 in [1] ('ROMSEL' is bad pin name)
+signal	RXD_1		B11
+signal	RXD_2		B10
+signal	RXD_3		C10
+signal	RXD_C		B1
+signal	SCLK_C		A2
+signal	nSDCAS		L16
+signal	SDCKE0		N1
+signal	SDCKE1		N2
+signal	SDCLK0		P1
+signal	SDCLK1		N3
+signal	SDCLK2		M3
+signal	nSDRAS		M14
+signal	SFRM_C		B3
+signal	SMROM_EN	M4
+signal	TCK		C5
+signal	TCK_BYP		A6
+signal	TDI		A5
+signal	TDO		B5
+signal	TESTCLK		B6
+signal	TEXTAL		C9
+signal	TMS		C6
+signal	nTRST		B4
+signal	TXTAL		B9
+signal	TXD_1		A11
+signal	TXD_2		D10
+signal	TXD_3		A10
+signal	TXD_C		C2
+signal	UDC-		A12
+signal	UDC+		C11
+signal	VDD		A7 C1 C15 H3 J16 P3 P15 T8
+signal	VDD_FAULT	C4
+signal	VDDP		C8
+signal	VDDX1		D5 D9 D11 E6 E7 E8 E9 E10 E11 K10 K11 L10 L11 M6 M7 M8 M9 M10 M11 N7 N9 N11
+signal	VDDX2		E12 F5 F12 G5 G12 H5 H12 J5 J12 K5 K12 L5 L12 M5 M12 N4 N5
+signal	VDDX3		D7
+signal	VSS		A8 D3 D8 D14 H2 K14 P2 P14 R9
+signal	VSSX		A1 B2 C3 D4 E5 F6 F7 F8 F9 F10 F11 G6 G7 G8 G9 G10 G11 H7 H8 H9 H10 H11 J7 J8 J9 J10 J11 K6 K7 K8 K9 L6 L7 L8 L9
+signal	nWE		M13
+
+# mandatory data registers
+register	BSR	292	# Boundary Scan Register (see Table 16-2 in [1])
+register	BR	1	# Bypass Register
+# optional data registers
+register	DIR	32	# Device Identification Register
+
+# see 16.5 in [1]
+instruction length 5
+
+# mandatory instructions
+instruction EXTEST		00000	BSR
+instruction SAMPLE/PRELOAD	00001	BSR
+instruction BYPASS		11111	BR
+
+# optional instructions
+instruction CLAMP		00100	BR
+instruction HIGHZ		00101	BR
+instruction IDCODE		00110	DIR
+
+# see Table 16-2 in [1]
+bit 291 I ? BATT_FAULT
+bit 290 I ? VDD_FAULT
+bit 289 O 1 PWR_EN
+bit 288 C 0 SFRM_C
+bit 287 O ? SFRM_C 288 0 Z
+bit 286 I ? SFRM_C
+bit 285 C 0 SCLK_C
+bit 284 O ? SCLK_C 285 0 Z
+bit 283 I ? SCLK_C
+bit 282 C 0 RXD_C
+bit 281 O ? RXD_C 282 0 Z
+bit 280 I ? RXD_C
+bit 279 C 0 TXD_C
+bit 278 O ? TXD_C 279 0 Z
+bit 277 I ? TXD_C
+bit 276 O ? D0 212 1 Z
+bit 275 I ? D0
+bit 274 O ? D8 212 1 Z
+bit 273 I ? D8
+bit 272 O ? D16 212 1 Z
+bit 271 I ? D16
+bit 270 O ? D24 212 1 Z
+bit 269 I ? D24
+bit 268 O ? D1 212 1 Z
+bit 267 I ? D1
+bit 266 O ? D9 212 1 Z
+bit 265 I ? D9
+bit 264 O ? D17 212 1 Z
+bit 263 I ? D17
+bit 262 O ? D25 212 1 Z
+bit 261 I ? D25
+bit 260 O ? D2 212 1 Z
+bit 259 I ? D2
+bit 258 O ? D10 212 1 Z
+bit 257 I ? D10
+bit 256 O ? D18 212 1 Z
+bit 255 I ? D18
+bit 254 O ? D26 212 1 Z
+bit 253 I ? D26
+bit 252 O ? D3 212 1 Z
+bit 251 I ? D3
+bit 250 O ? D11 212 1 Z
+bit 249 I ? D11
+bit 248 O ? D19 212 1 Z
+bit 247 I ? D19
+bit 246 O ? D27 212 1 Z
+bit 245 I ? D27
+bit 244 O ? D4 212 1 Z
+bit 243 I ? D4
+bit 242 O ? D12 212 1 Z
+bit 241 I ? D12
+bit 240 O ? D20 212 1 Z
+bit 239 I ? D20
+bit 238 O ? D28 212 1 Z
+bit 237 I ? D28
+bit 236 O ? D5 212 1 Z
+bit 235 I ? D5
+bit 234 O ? D13 212 1 Z
+bit 233 I ? D13
+bit 232 O ? D21 212 1 Z
+bit 231 I ? D21
+bit 230 O ? D29 212 1 Z
+bit 229 I ? D29
+bit 228 O ? D6 212 1 Z
+bit 227 I ? D6
+bit 226 O ? D14 212 1 Z
+bit 225 I ? D14
+bit 224 O ? D22 212 1 Z
+bit 223 I ? D22
+bit 222 O ? D30 212 1 Z
+bit 221 I ? D30
+bit 220 O ? D7 212 1 Z
+bit 219 I ? D7
+bit 218 O ? D15 212 1 Z
+bit 217 I ? D15
+bit 216 O ? D23 212 1 Z
+bit 215 I ? D23
+bit 214 O ? D31 212 1 Z
+bit 213 I ? D31
+bit 212 C 1 D[31:0]
+bit 211 O 0 SDCLK2
+bit 210 O 1 SDCKE1
+bit 209 C 1 SDCLK1
+bit 208 O ? SDCLK1 209 1 Z	# error (bad name) in Table 16-2 in [1]
+bit 207 O 0 SDCLK0
+bit 206 O 0 SDCKE0
+bit 205 I ? SMROM_EN
+bit 204 C 0 GP27
+bit 203 O ? GP27 204 0 Z
+bit 202 I ? GP27
+bit 201 C 0 GP26
+bit 200 O ? GP26 201 0 Z
+bit 199 I ? GP26
+bit 198 C 0 GP25
+bit 197 O ? GP25 198 0 Z
+bit 196 I ? GP25
+bit 195 C 0 GP24
+bit 194 O ? GP24 195 0 Z
+bit 193 I ? GP24
+bit 192 C 0 GP23
+bit 191 O ? GP23 192 0 Z
+bit 190 I ? GP23
+bit 189 C 0 GP22
+bit 188 O ? GP22 189 0 Z
+bit 187 I ? GP22
+bit 186 C 0 GP21
+bit 185 O ? GP21 186 0 Z
+bit 184 I ? GP21
+bit 183 C 0 GP20
+bit 182 O ? GP20 183 0 Z
+bit 181 I ? GP20
+bit 180 C 0 GP19
+bit 179 O ? GP19 180 0 Z
+bit 178 I ? GP19
+bit 177 C 0 GP18
+bit 176 O ? GP18 177 0 Z
+bit 175 I ? GP18
+bit 174 C 0 GP17
+bit 173 O ? GP17 174 0 Z
+bit 172 I ? GP17
+bit 171 C 0 GP16
+bit 170 O ? GP16 171 0 Z
+bit 169 I ? GP16
+bit 168 C 0 GP15
+bit 167 O ? GP15 168 0 Z
+bit 166 I ? GP15
+bit 165 C 0 GP14
+bit 164 O ? GP14 165 0 Z
+bit 163 I ? GP14
+bit 162 C 0 GP13
+bit 161 O ? GP13 162 0 Z
+bit 160 I ? GP13
+bit 159 C 0 GP12
+bit 158 O ? GP12 159 0 Z
+bit 157 I ? GP12
+bit 156 C 0 GP11
+bit 155 O ? GP11 156 0 Z
+bit 154 I ? GP11
+bit 153 C 0 GP10
+bit 152 O ? GP10 153 0 Z
+bit 151 I ? GP10
+bit 150 C 0 GP9
+bit 149 O ? GP9 150 0 Z
+bit 148 I ? GP9
+bit 147 C 0 GP8
+bit 146 O ? GP8 147 0 Z
+bit 145 I ? GP8
+bit 144 C 0 GP7
+bit 143 O ? GP7 144 0 Z
+bit 142 I ? GP7
+bit 141 C 0 GP6
+bit 140 O ? GP6 141 0 Z
+bit 139 I ? GP6
+bit 138 C 0 GP5
+bit 137 O ? GP5 138 0 Z
+bit 136 I ? GP5
+bit 135 C 0 GP4
+bit 134 O ? GP4 135 0 Z
+bit 133 I ? GP4
+bit 132 C 0 GP3
+bit 131 O ? GP3 132 0 Z
+bit 130 I ? GP3
+bit 129 C 0 GP2
+bit 128 O ? GP2 129 0 Z
+bit 127 I ? GP2
+bit 126 C 0 GP1
+bit 125 O ? GP1 126 0 Z
+bit 124 I ? GP1
+bit 123 C 0 GP0
+bit 122 O ? GP0 123 0 Z
+bit 121 I ? GP0
+bit 120 C 0 L_BIAS
+bit 119 O ? L_BIAS 120 0 Z
+bit 118 I ? L_BIAS
+bit 117 C 0 L_PCLK
+bit 116 O ? L_PCLK 117 0 Z
+bit 115 I ? L_PCLK
+bit 114 C 0 LDD0
+bit 113 O ? LDD0 114 0 Z
+bit 112 I ? LDD0
+bit 111 C 0 LDD1
+bit 110 O ? LDD1 111 0 Z
+bit 109 I ? LDD1
+bit 108 C 0 LDD2
+bit 107 O ? LDD2 108 0 Z
+bit 106 I ? LDD2
+bit 105 C 0 LDD3
+bit 104 O ? LDD3 105 0 Z
+bit 103 I ? LDD3
+bit 102 C 0 LDD4
+bit 101 O ? LDD4 102 0 Z
+bit 100 I ? LDD4
+bit  99 C 0 LDD5
+bit  98 O ? LDD5 99 0 Z
+bit  97 I ? LDD5
+bit  96 C 0 LDD6
+bit  95 O ? LDD6 96 0 Z
+bit  94 I ? LDD6
+bit  93 C 0 LDD7
+bit  92 O ? LDD7 93 0 Z
+bit  91 I ? LDD7
+bit  90 C 0 L_LCLK
+bit  89 O ? L_LCLK 90 0 Z
+bit  88 I ? L_LCLK
+bit  87 C 0 L_FCLK
+bit  86 O ? L_FCLK 87 0 Z
+bit  85 I ? L_FCLK
+bit  84 O 0 nPOE
+bit  83 O 0 nPWE
+bit  82 O 0 nPIOR
+bit  81 O 0 nPIOW
+bit  80 O 0 PSKTSEL
+bit  79 I ? nIOIS16
+bit  78 I ? nPWAIT
+bit  77 O 0 nPREG
+bit  76 O 1 nPCE2
+bit  75 O 1 nPCE1
+bit  74 O 1 .
+bit  73 O 1 nWE 74 1 Z
+bit  72 O 0 nOE 74 1 Z
+bit  71 O 0 nSDRAS 74 1 Z
+bit  70 O 0 nSDCAS 74 1 Z
+bit  69 O 0 nRAS3
+bit  68 O 0 nRAS2
+bit  67 O 0 nRAS1
+bit  66 O 1 nRAS0 74 1 Z
+bit  65 O 1 nCAS3 74 1 Z
+bit  64 O 1 nCAS2 74 1 Z
+bit  63 O 1 nCAS1 74 1 Z
+bit  62 O 1 nCAS0 74 1 Z
+bit  61 O 0 RD_nWR
+bit  60 I ? RDY
+bit  59 O 1 nCS5
+bit  58 O 1 nCS4
+bit  57 O 1 nCS3
+bit  56 O 1 nCS2
+bit  55 O 1 nCS1
+bit  54 O 1 nCS0
+bit  53 O 0 A25 74 1 Z
+bit  52 O 0 A24 74 1 Z
+bit  51 O 0 A23 74 1 Z
+bit  50 O 0 A22 74 1 Z
+bit  49 O 0 A21 74 1 Z
+bit  48 O 0 A20 74 1 Z
+bit  47 O 0 A19 74 1 Z
+bit  46 O 0 A18 74 1 Z
+bit  45 O 0 A17 74 1 Z
+bit  44 O 0 A16 74 1 Z
+bit  43 O 0 A15 74 1 Z
+bit  42 O 0 A14 74 1 Z
+bit  41 O 0 A13 74 1 Z
+bit  40 O 0 A12 74 1 Z
+bit  39 O 0 A11 74 1 Z
+bit  38 O 0 A10 74 1 Z
+bit  37 O 0 A9 74 1 Z
+bit  36 O 0 A8 74 1 Z
+bit  35 O 0 A7 74 1 Z
+bit  34 O 0 A6 74 1 Z
+bit  33 O 0 A5 74 1 Z
+bit  32 O 0 A4 74 1 Z
+bit  31 O 0 A3 74 1 Z
+bit  30 O 0 A2 74 1 Z
+bit  29 O 0 A1 74 1 Z
+bit  28 O 0 A0 74 1 Z
+bit  27 C 1 UDC-
+bit  26 O ? UDC- 27 1 Z
+bit  25 I ? UDC-
+bit  24 X ? UDC-/UDC+
+bit  23 C 1 UDC+
+bit  22 O ? UDC+ 23 1 Z
+bit  21 I ? UDC+
+bit  20 C 0 RXD_1
+bit  19 O ? RXD_1 20 0 Z
+bit  18 I ? RXD_1
+bit  17 C 0 TXD_1
+bit  16 O ? TXD_1 17 0 Z
+bit  15 I ? TXD_1
+bit  14 C 0 RXD_2
+bit  13 O ? RXD_2 14 0 Z
+bit  12 I ? RXD_2
+bit  11 C 0 TXD_2
+bit  10 O ? TXD_2 11 0 Z
+bit   9 I ? TXD_2
+bit   8 C 0 RXD_3
+bit   7 O ? RXD_3 8 0 Z
+bit   6 I ? RXD_3
+bit   5 C 0 TXD_3
+bit   4 O ? TXD_3 5 0 Z
+bit   3 I ? TXD_3
+bit   2 I ? nRESET
+bit   1 O 1 nRESET_OUT
+bit   0 I ? ROM_SEL
+
+initbus sa1110
--- a/sie_fs/usr/local/share/urjtag/lattice/PARTS
+++ b/sie_fs/usr/local/share/urjtag/lattice/PARTS
@@ -0,0 +1,28 @@
+#
+# $Id: PARTS 752 2007-11-10 17:17:09Z kawk $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 27-12 of the Device Identification Register
+0111010010000110  m4a3-64.32-tqfp48     M4A3-64/32-TQFP48
+0001100000000101  lc4032v-tqfp48        LC4032V-TQFP48
+0000011000001111  m4a3-256.192-fpbga256 M4A3-256/192-fpBGA256
+0001100000010000  lc4128c-tqfp100       LC4128C-TQFP100
--- a/sie_fs/usr/local/share/urjtag/lattice/lc4032v-tqfp48/STEPPINGS
+++ b/sie_fs/usr/local/share/urjtag/lattice/lc4032v-tqfp48/STEPPINGS
@@ -0,0 +1,27 @@
+#
+# $Id: STEPPINGS 619 2004-11-16 21:51:27Z telka $
+#
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+# bits 31-28 of the Device Identification Register
+
+0000	lc4032v-tqfp48	0
+0001	lc4032v-tqfp48	1
--- a/sie_fs/usr/local/share/urjtag/lattice/lc4032v-tqfp48/lc4032v-tqfp48
+++ b/sie_fs/usr/local/share/urjtag/lattice/lc4032v-tqfp48/lc4032v-tqfp48
@@ -0,0 +1,179 @@
+#
+# $Id: lc4032v-tqfp48 619 2004-11-16 21:51:27Z telka $
+#
+# JTAG declarations for Lattice LC4032V (48-pin TQFP)
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+
+signal IOA0  44
+signal IOA1  45
+signal IOA2  46
+signal IOA3  47
+signal IOA4  48
+signal IOA5   2
+signal IOA6   3
+signal IOA7   4
+signal IOA8   7
+signal IOA9   8
+signal IOA10  9
+signal IOA11 10
+signal IOA12 14
+signal IOA13 15
+signal IOA14 16
+signal IOA15 17
+signal IOB0  20
+signal IOB1  21
+signal IOB2  22
+signal IOB3  23
+signal IOB4  24
+signal IOB5  26
+signal IOB6  27
+signal IOB7  28
+signal IOB8  31
+signal IOB9  32
+signal IOB10 33
+signal IOB11 34
+signal IOB12 38
+signal IOB13 39
+signal IOB14 40
+signal IOB15 41
+signal CLK0  43
+signal CLK1  18
+signal CLK2  19
+signal CLK3  42
+signal TDI    1
+signal TCK   11
+signal TMS   25
+signal TDO   35
+signal GND0   5
+signal GND1  29
+signal GND   13 37
+signal VCCO0  6
+signal VCCO1 30
+signal VCC   12 36
+
+
+# mandatory data registers
+register    BSR  68 # Boundary Scan Register
+register    BR    1 # Bypass Register
+
+# optional data registers
+register    DIR	 32 # Device Identification Register
+
+instruction length 8
+
+# mandatory instructions
+instruction EXTEST         00000000	BSR
+instruction SAMPLE/PRELOAD 00011100	BSR
+instruction BYPASS         11111111 BR
+
+# optional instructions
+instruction IDCODE   00010110 DIR
+instruction USERCODE 00010111 DIR
+instruction HIGHZ    00011000 BR
+instruction CLAMP    00100000 BR
+
+# ISC instructions
+#instruction ISC_ENABLE           00010101
+#instruction ISC_DISABLE          00011110
+#instruction ISC_NOOP             00110000
+#instruction ISC_ADDRESS_SHIFT    00000001
+#instruction ISC_DATA_SHIFT       00000010
+#instruction ISC_ERASE            00000011
+#instruction ISC_DISCHARGE        00010100
+#instruction ISC_PROGRAM_INCR     00100111
+#instruction ISC_READ_INCR        00101010
+#instruction ISC_PROGRAM_SECURITY 00001001
+#instruction ISC_PROGRAM_DONE     00101111
+#instruction ISC_ERASE_DONE       00100100
+#instruction ISC_PROGRAM_USERCODE 00011010
+#instruction LSC_ADDRESS_INIT     00100001
+
+
+# Boundary Scan Register bit definition
+
+bit 67 I ? CLK0
+bit 66 B ? IOA0 65 0 Z
+bit 65 C 0 IOA0
+bit 64 B ? IOA1 63 0 Z
+bit 63 C 0 IOA1
+bit 62 B ? IOA2 61 0 Z
+bit 61 C 0 IOA2
+bit 60 B ? IOA3 59 0 Z
+bit 59 C 0 IOA3
+bit 58 B ? IOA4 57 0 Z
+bit 57 C 0 IOA4
+bit 56 B ? IOA5 55 0 Z
+bit 55 C 0 IOA5
+bit 54 B ? IOA6 53 0 Z
+bit 53 C 0 IOA6
+bit 52 B ? IOA7 51 0 Z
+bit 51 C 0 IOA7
+bit 50 B ? IOA8 49 0 Z
+bit 49 C 0 IOA8
+bit 48 B ? IOA9 47 0 Z
+bit 47 C 0 IOA9
+bit 46 B ? IOA10 45 0 Z
+bit 45 C 0 IOA10
+bit 44 B ? IOA11 43 0 Z
+bit 43 C 0 IOA11
+bit 42 B ? IOA12 41 0 Z
+bit 41 C 0 IOA12
+bit 40 B ? IOA13 39 0 Z
+bit 39 C 0 IOA13
+bit 38 B ? IOA14 37 0 Z
+bit 37 C 0 IOA14
+bit 36 B ? IOA15 35 0 Z
+bit 35 C 0 IOA15
+bit 34 I ? CLK1
+bit 33 I ? CLK2
+bit 32 B ? IOB0 31 0 Z
+bit 31 C 0 IOB0
+bit 30 B ? IOB1 29 0 Z
+bit 29 C 0 IOB1
+bit 28 B ? IOB2 27 0 Z
+bit 27 C 0 IOB2
+bit 26 B ? IOB3 25 0 Z
+bit 25 C 0 IOB3
+bit 24 B ? IOB4 23 0 Z
+bit 23 C 0 IOB4
+bit 22 B ? IOB5 21 0 Z
+bit 21 C 0 IOB5
+bit 20 B ? IOB6 19 0 Z
+bit 19 C 0 IOB6
+bit 18 B ? IOB7 17 0 Z
+bit 17 C 0 IOB7
+bit 16 B ? IOB8 15 0 Z
+bit 15 C 0 IOB8
+bit 14 B ? IOB9 13 0 Z
+bit 13 C 0 IOB9
+bit 12 B ? IOB10 11 0 Z
+bit 11 C 0 IOB10
+bit 10 B ? IOB11 9 0 Z
+bit  9 C 0 IOB11
+bit  8 B ? IOB12 7 0 Z
+bit  7 C 0 IOB12
+bit  6 B ? IOB13 5 0 Z
+bit  5 C 0 IOB13
+bit  4 B ? IOB14 3 0 Z
+bit  3 C 0 IOB14
+bit  2 B ? IOB15 1 0 Z
+bit  1 C 0 IOB15
+bit  0 I ? CLK3
--- a/Show More
+++ b/Show More