Adding file-system

lm32/logic/sakc/system_tb.v

@@ -47,9 +47,13 @@ always #(tck/2) clk <= ~clk;
 
 /* Simulation setup */
 initial begin
-	$dumpfile("system_tb.vcd");
-	$dumpvars(-1, dut);
 
+
+
+	$dumpfile("system_tb.vcd");
+	//$monitor("%b,%b,%b,%b",clk,rst,uart_txd,uart_rxd);
+	$dumpvars(-1, dut);
+//	$dumpvars(-1,clk,rst,uart_txd,uart_rxd);
 	// reset
 	#0  rst <= 0;
 	#80 rst <= 1;

sie_fs/etc/init.d/start

@@ -0,0 +1,4 @@
+#!/bin/sh
+/usr/bin/jtag /root/scripts/jtag/load_ADC_test
+/usr/bin/sgen -f 1000 &
+/root/binaries/ADC -qws -nomouse &

sie_fs/etc/inittab

@@ -0,0 +1,8 @@
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K stop
+tts/0::askfirst:/bin/ash --login
+#ttyS0::askfirst:/bin/ash --login
+tty1::askfirst:/bin/ash --login
+tty2::askfirst:/bin/ash --login
+tty3::askfirst:/bin/ash --login
+tty4::askfirst:/bin/ash --login

sie_fs/root/.jtag/rc

@@ -0,0 +1,8 @@
+cable jz47xx
+detect
+pri
+instruction CFG_OUT  000100 BYPASS
+instruction CFG_IN   000101 BYPASS
+instruction JSTART   001100 BYPASS
+instruction JPROGRAM 001011 BYPASS
+

sie_fs/root/.viminfo

@@ -0,0 +1,61 @@
+# This viminfo file was generated by Vim 7.1.
+# You may edit it if you're careful!
+
+
+# hlsearch on (H) or off (h):
+~h
+# Command Line History (newest to oldest):
+:x!
+
+# Search String History (newest to oldest):
+
+# Expression History (newest to oldest):
+
+# Input Line History (newest to oldest):
+
+# Input Line History (newest to oldest):
+
+# Registers:
+""-	CHAR	0
+	/
+
+# File marks:
+'0  2  32  /etc/init.d/start
+'1  31  7  ~/jtag_cmds
+'2  9  7  ~/load_bitstream_jtag
+
+# Jumplist (newest first):
+-'  2  32  /etc/init.d/start
+-'  1  0  /etc/init.d/start
+-'  31  7  ~/jtag_cmds
+-'  1  0  ~/jtag_cmds
+-'  9  7  ~/load_bitstream_jtag
+-'  1  0  ~/load_bitstream_jtag
+-'  9  7  ~/load_bitstream_jtag
+-'  1  0  ~/load_bitstream_jtag
+-'  31  7  ~/jtag_cmds
+-'  1  0  ~/jtag_cmds
+-'  9  7  ~/load_bitstream_jtag
+-'  1  0  ~/load_bitstream_jtag
+-'  9  7  ~/load_bitstream_jtag
+-'  1  0  ~/load_bitstream_jtag
+
+# History of marks within files (newest to oldest):
+
+> /etc/init.d/start
+	"	2	32
+	^	2	33
+	.	2	20
+	+	2	20
+
+> ~/jtag_cmds
+	"	31	7
+	^	31	8
+	.	31	7
+	+	31	7
+
+> ~/load_bitstream_jtag
+	"	9	7
+	^	9	8
+	.	9	7
+	+	9	7

sie_fs/root/binaries/bsdl2jtag

@@ -0,0 +1,48 @@
+#!/bin/bash
+#
+# $Id: bsdl2jtag 1467 2009-03-28 00:31:24Z arniml $
+#
+# Convert a BSDL file to a jtag part description
+#
+# Copyright (C) 2009, A. Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+scriptname=`basename $0`
+
+function usage ()
+{
+    cat <<EOF
+Usage:	$scriptname <bsdl-file> <jtag-file>
+Converts a BSDL file to a jtag part description.
+
+Parameters
+  bsdl-file :  Name of BSDL file
+  jtag-file :  Name of converted jtag description file
+
+EOF
+}
+
+if [[ -z $1 || -z $2 ]]; then
+    usage
+    exit 1
+fi
+
+
+echo "bsdl dump $1" | jtag > $2
+
+exit 0

sie_fs/root/binaries/devlist.txt

@@ -0,0 +1,20 @@
+# IDCODE    IR Length	Text
+0140d093	6	XC3S50
+01414093	6	XC3S200
+0141c093	6	XC3S400
+01428093	6	XC3S1000
+01434093	6	XC3S1500
+01440093	6	XC3S2000
+01448093	6	XC3S4000
+01450093	6	XC3S5000
+05045093	8	XCF02S
+00608093	5	XC2S15
+0060c093	5	XC2S30
+00610093	5	XC2S50
+00614093	5	XC2S100
+00618093	5	XC2S150
+0061c093	5	XC2S200
+11c10093        6       XC3S100E
+11c1a093        6       XC3S250E
+41c22093	6	XC3S500E
+

sie_fs/root/binaries/flash_kernel.sh

@@ -0,0 +1,3 @@
+#!/bin/bash
+sudo usbboot -f ./usbboot_2gb_nand.cfg  -c "boot"
+sudo usbboot -f ./usbboot_2gb_nand.cfg  -c "nprog 1024 openwrt-xburst-qi_lb60-uImage.bin 0 0 -n"

sie_fs/root/binaries/inittab

@@ -0,0 +1,11 @@
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K stop
+tts/0::askfirst:/bin/ash --login
+tty1::askfirst:/bin/ash --login
+tty2::askfirst:/bin/ash --login
+tty3::askfirst:/bin/ash --login
+tty4::askfirst:/bin/ash --login
+tty5::askfirst:/bin/ash --login
+tty6::askfirst:/bin/ash --login
+tty7::askfirst:/bin/ash --login
+tty8::askfirst:/bin/ash --login

sie_fs/root/binaries/install_binaries

@@ -0,0 +1,9 @@
+mkdir -p /usr/share/xc3sprog
+cp xc3sprog /usr/bin
+cp devlist.txt /usr/share/xc3sprog/
+mv /etc/init.d/start /root/
+cp sgen /usr/bin
+cp sweepgen /usr/bin
+cp inittab /etc/
+cp jtag /usr/bin
+cp bsdl2jtag /usr/bin

sie_fs/root/binaries/load_u-boot.sh

@@ -0,0 +1,2 @@
+sudo usbboot -f ./usbboot_2gb_nand.cfg -c "boot"
+sudo usbboot -f ./usbboot_2gb_nand.cfg  -c "nprog 0 openwrt-xburst-qi_lb60-u-boot.bin 0 0 -n" 

sie_fs/root/binaries/program_rootfs.sh

@@ -0,0 +1,4 @@
+#!/bin/bash
+ROOTFS=openwrt-xburst-qi_lb60-root.ubi
+sudo usbboot -f ./usbboot_2gb_nand.cfg  -c "boot"
+sudo usbboot -f ./usbboot_2gb_nand.cfg  -c "nprog 2048 $ROOTFS 0 0 -n"

sie_fs/root/binaries/usbboot_2gb_nand.cfg

@@ -0,0 +1,59 @@
+#
+# usbboot configuration file
+#
+# Utility to respond to the Ingenic XBurst USB boot protocol, provide
+# initial boot stages and ability to access NAND on device.
+#
+# Authors: Ingenic Semiconductor, Inc.
+#          Xiangfu Liu <xiangfu@qi-hardware.com>
+#          Marek Lindner <lindner_marek@yahoo.de>
+#          Wolfgang Spraul <wolfgang@qi-hardware.com>
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# [PLL]
+EXTCLK = 12	#Define the external crystal in MHz
+CPUSPEED = 252	#Define the PLL output frequency
+PHMDIV = 3	#Define the frequency divider ratio of PLL=CCLK:PCLK=HCLK=MCLK
+BOUDRATE = 57600	#Define the uart boudrate
+USEUART = 0	#Use which uart, 0/1 for jz4740,0/1/2/3 for jz4750
+
+# [SDRAM]
+BUSWIDTH = 16	#The bus width of the SDRAM in bits (16|32)
+BANKS = 4	#The bank number (2|4)
+ROWADDR = 13	#Row address width in bits (11-13)
+COLADDR = 9	#Column address width in bits (8-12)
+ISMOBILE = 0	#Define whether SDRAM is mobile SDRAM, this only valid for Jz4750 ,1:yes 0:no
+ISBUSSHARE = 1	#Define whether SDRAM bus share with NAND 1:shared 0:unshared
+DEBUGOPS = 0
+
+# [NAND]
+NAND_BUSWIDTH = 8	#The width of the NAND flash chip in bits (8|16|32)
+NAND_ROWCYCLES = 3	#The row address cycles (2|3)
+NAND_PAGESIZE = 4096	#The page size of the NAND chip in bytes(512|2048|4096)
+NAND_PAGEPERBLOCK = 128	#The page number per block
+NAND_FORCEERASE = 1	#The force to erase flag (0|1)
+NAND_OOBSIZE = 128	#oob size in byte
+NAND_ECCPOS = 12	#Specify the ECC offset inside the oob data (0-[oobsize-1])
+NAND_BADBLOCKPOS = 0	#Specify the badblock flag offset inside the oob (0-[oobsize-1])
+NAND_BADBLOCKPAGE = 127	#Specify the page number of badblock flag inside a block(0-[PAGEPERBLOCK-1])
+NAND_PLANENUM = 1	#The planes number of target nand flash
+NAND_BCHBIT = 4		#Specify the hardware BCH algorithm for 4750 (4|8)
+NAND_WPPIN = 0		#Specify the write protect pin number
+NAND_BLOCKPERCHIP = 0	#Specify the block number per chip,0 means ignore
+
+#The program will calculate the total SDRAM size by : size = 2^(ROWADDR + COLADDR) * BANKNUM * (SDRAMWIDTH / 4)
+#The CPUSPEED has restriction as: ( CPUSPEED % EXTCLK == 0 ) && ( CPUSPEED % 12 == 0 )
+#For jz4750, the program just init BANK0(DSC0).
+#Beware all variables must be set correct!

sie_fs/root/scripts/jtag/jtag_cmds

@@ -0,0 +1,31 @@
+cable jz47xx
+detect
+instruction EXTEST
+pri
+shift ir
+set signal P44 out 1
+shift dr
+usleep 1000000
+Get signal P44
+set signal P44 out 0 
+shift dr
+usleep 100000
+Get signal P44
+set signal P44 out 1
+shift dr
+usleep 100000
+Get signal P44
+set signal P44 out 0
+shift dr
+usleep 100000
+Get signal P44
+set signal P44 out 1
+shift dr
+usleep 100000
+Get signal P44
+set signal P44 out 0
+shift dr
+usleep 100000
+Get signal P44
+instruction  BYPASS
+shift ir

sie_fs/root/scripts/jtag/load_ADC_test

@@ -0,0 +1,7 @@
+cable jz47xx
+detect
+instruction CFG_OUT  000100 BYPASS
+instruction CFG_IN   000101 BYPASS
+instruction JSTART   001100 BYPASS
+instruction JPROGRAM 001011 BYPASS
+pld load /root/FPGA/ADC.bit

sie_fs/root/scripts/jtag/load_bitstream_jtag

@@ -0,0 +1,9 @@
+cable jz47xx
+detect
+instruction CFG_OUT  000100 BYPASS
+instruction CFG_IN   000101 BYPASS
+instruction JSTART   001100 BYPASS
+instruction JPROGRAM 001011 BYPASS
+pld load binaries/blink.bit
+instruction BYPASS
+shift ir

sie_fs/root/scripts/jtag/rc

@@ -0,0 +1,8 @@
+cable jz47xx
+detect
+pri
+instruction CFG_OUT  000100 BYPASS
+instruction CFG_IN   000101 BYPASS
+instruction JSTART   001100 BYPASS
+instruction JPROGRAM 001011 BYPASS
+

sie_fs/root/scripts/lua/test/README

@@ -0,0 +1,26 @@
+These are simple tests for Lua.  Some of them contain useful code.
+They are meant to be run to make sure Lua is built correctly and also
+to be read, to see how Lua programs look.
+
+Here is a one-line summary of each program:
+
+   bisect.lua		bisection method for solving non-linear equations
+   cf.lua		temperature conversion table (celsius to farenheit)
+   echo.lua             echo command line arguments
+   env.lua              environment variables as automatic global variables
+   factorial.lua	factorial without recursion
+   fib.lua		fibonacci function with cache
+   fibfor.lua		fibonacci numbers with coroutines and generators
+   globals.lua		report global variable usage
+   hello.lua		the first program in every language
+   life.lua		Conway's Game of Life
+   luac.lua	 	bare-bones luac
+   printf.lua		an implementation of printf
+   readonly.lua		make global variables readonly
+   sieve.lua		the sieve of of Eratosthenes programmed with coroutines
+   sort.lua		two implementations of a sort function
+   table.lua		make table, grouping all data for the same item
+   trace-calls.lua	trace calls
+   trace-globals.lua	trace assigments to global variables
+   xd.lua		hex dump
+

sie_fs/root/scripts/lua/test/bisect.lua

@@ -0,0 +1,27 @@
+-- bisection method for solving non-linear equations
+
+delta=1e-6	-- tolerance
+
+function bisect(f,a,b,fa,fb)
+ local c=(a+b)/2
+ io.write(n," c=",c," a=",a," b=",b,"\n")
+ if c==a or c==b or math.abs(a-b)<delta then return c,b-a end
+ n=n+1
+ local fc=f(c)
+ if fa*fc<0 then return bisect(f,a,c,fa,fc) else return bisect(f,c,b,fc,fb) end
+end
+
+-- find root of f in the inverval [a,b]. needs f(a)*f(b)<0
+function solve(f,a,b)
+ n=0
+ local z,e=bisect(f,a,b,f(a),f(b))
+ io.write(string.format("after %d steps, root is %.17g with error %.1e, f=%.1e\n",n,z,e,f(z)))
+end
+
+-- our function
+function f(x)
+ return x*x*x-x-1
+end
+
+-- find zero in [1,2]
+solve(f,1,2)

sie_fs/root/scripts/lua/test/cf.lua

@@ -0,0 +1,16 @@
+-- temperature conversion table (celsius to farenheit)
+
+for c0=-20,50-1,10 do
+	io.write("C ")
+	for c=c0,c0+10-1 do
+		io.write(string.format("%3.0f ",c))
+	end
+	io.write("\n")
+	
+	io.write("F ")
+	for c=c0,c0+10-1 do
+		f=(9/5)*c+32
+		io.write(string.format("%3.0f ",f))
+	end
+	io.write("\n\n")
+end

sie_fs/root/scripts/lua/test/echo.lua

@@ -0,0 +1,5 @@
+-- echo command line arguments
+
+for i=0,table.getn(arg) do
+ print(i,arg[i])
+end

sie_fs/root/scripts/lua/test/env.lua

@@ -0,0 +1,7 @@
+-- read environment variables as if they were global variables
+
+local f=function (t,i) return os.getenv(i) end
+setmetatable(getfenv(),{__index=f})
+
+-- an example
+print(a,USER,PATH)

sie_fs/root/scripts/lua/test/factorial.lua

@@ -0,0 +1,32 @@
+-- function closures are powerful
+
+-- traditional fixed-point operator from functional programming
+Y = function (g)
+      local a = function (f) return f(f) end
+      return a(function (f)
+                 return g(function (x)
+                             local c=f(f)
+                             return c(x)
+                           end)
+               end)
+end
+
+
+-- factorial without recursion
+F = function (f)
+      return function (n)
+               if n == 0 then return 1
+               else return n*f(n-1) end
+             end
+    end
+
+factorial = Y(F)   -- factorial is the fixed point of F
+
+-- now test it
+function test(x)
+	io.write(x,"! = ",factorial(x),"\n")
+end
+
+for n=0,16 do
+	test(n)
+end

sie_fs/root/scripts/lua/test/fib.lua

@@ -0,0 +1,40 @@
+-- fibonacci function with cache
+
+-- very inefficient fibonacci function
+function fib(n)
+	N=N+1
+	if n<2 then
+		return n
+	else
+		return fib(n-1)+fib(n-2)
+	end
+end
+
+-- a general-purpose value cache
+function cache(f)
+	local c={}
+	return function (x)
+		local y=c[x]
+		if not y then
+			y=f(x)
+			c[x]=y
+		end
+		return y
+	end
+end
+
+-- run and time it
+function test(s,f)
+	N=0
+	local c=os.clock()
+	local v=f(n)
+	local t=os.clock()-c
+	print(s,n,v,t,N)
+end
+
+n=arg[1] or 24		-- for other values, do lua fib.lua XX
+n=tonumber(n)
+print("","n","value","time","evals")
+test("plain",fib)
+fib=cache(fib)
+test("cached",fib)

sie_fs/root/scripts/lua/test/fibfor.lua

@@ -0,0 +1,13 @@
+-- example of for with generator functions
+
+function generatefib (n)
+  return coroutine.wrap(function ()
+    local a,b = 1, 1
+    while a <= n do
+      coroutine.yield(a)
+      a, b = b, a+b
+    end
+  end)
+end
+
+for i in generatefib(1000) do print(i) end

sie_fs/root/scripts/lua/test/globals.lua

@@ -0,0 +1,13 @@
+-- reads luac listings and reports global variable usage
+-- lines where a global is written to are marked with "*"
+-- typical usage: luac -p -l file.lua | lua globals.lua | sort | lua table.lua
+
+while 1 do
+ local s=io.read()
+ if s==nil then break end
+ local ok,_,l,op,g=string.find(s,"%[%-?(%d*)%]%s*([GS])ETGLOBAL.-;%s+(.*)$")
+ if ok then
+  if op=="S" then op="*" else op="" end
+  io.write(g,"\t",l,op,"\n")
+ end
+end

sie_fs/root/scripts/lua/test/hello.lua

@@ -0,0 +1,3 @@
+-- the first program in every language
+
+io.write("Hello world, from ",_VERSION,"!\n")

sie_fs/root/scripts/lua/test/life.lua

@@ -0,0 +1,111 @@
+-- life.lua
+-- original by Dave Bollinger <DBollinger@compuserve.com> posted to lua-l
+-- modified to use ANSI terminal escape sequences
+-- modified to use for instead of while
+
+local write=io.write
+
+ALIVE="¥"	DEAD="þ"
+ALIVE="O"	DEAD="-"
+
+function delay() -- NOTE: SYSTEM-DEPENDENT, adjust as necessary
+  for i=1,10000 do end
+  -- local i=os.clock()+1 while(os.clock()<i) do end
+end
+
+function ARRAY2D(w,h)
+  local t = {w=w,h=h}
+  for y=1,h do
+    t[y] = {}
+    for x=1,w do
+      t[y][x]=0
+    end
+  end
+  return t
+end
+
+_CELLS = {}
+
+-- give birth to a "shape" within the cell array
+function _CELLS:spawn(shape,left,top)
+  for y=0,shape.h-1 do
+    for x=0,shape.w-1 do
+      self[top+y][left+x] = shape[y*shape.w+x+1]
+    end
+  end
+end
+
+-- run the CA and produce the next generation
+function _CELLS:evolve(next)
+  local ym1,y,yp1,yi=self.h-1,self.h,1,self.h
+  while yi > 0 do
+    local xm1,x,xp1,xi=self.w-1,self.w,1,self.w
+    while xi > 0 do
+      local sum = self[ym1][xm1] + self[ym1][x] + self[ym1][xp1] +
+                  self[y][xm1] + self[y][xp1] +
+                  self[yp1][xm1] + self[yp1][x] + self[yp1][xp1]
+      next[y][x] = ((sum==2) and self[y][x]) or ((sum==3) and 1) or 0
+      xm1,x,xp1,xi = x,xp1,xp1+1,xi-1
+    end
+    ym1,y,yp1,yi = y,yp1,yp1+1,yi-1
+  end
+end
+
+-- output the array to screen
+function _CELLS:draw()
+  local out="" -- accumulate to reduce flicker
+  for y=1,self.h do
+   for x=1,self.w do
+      out=out..(((self[y][x]>0) and ALIVE) or DEAD)
+    end
+    out=out.."\n"
+  end
+  write(out)
+end
+
+-- constructor
+function CELLS(w,h)
+  local c = ARRAY2D(w,h)
+  c.spawn = _CELLS.spawn
+  c.evolve = _CELLS.evolve
+  c.draw = _CELLS.draw
+  return c
+end
+
+--
+-- shapes suitable for use with spawn() above
+--
+HEART = { 1,0,1,1,0,1,1,1,1; w=3,h=3 }
+GLIDER = { 0,0,1,1,0,1,0,1,1; w=3,h=3 }
+EXPLODE = { 0,1,0,1,1,1,1,0,1,0,1,0; w=3,h=4 }
+FISH = { 0,1,1,1,1,1,0,0,0,1,0,0,0,0,1,1,0,0,1,0; w=5,h=4 }
+BUTTERFLY = { 1,0,0,0,1,0,1,1,1,0,1,0,0,0,1,1,0,1,0,1,1,0,0,0,1; w=5,h=5 }
+
+-- the main routine
+function LIFE(w,h)
+  -- create two arrays
+  local thisgen = CELLS(w,h)
+  local nextgen = CELLS(w,h)
+
+  -- create some life
+  -- about 1000 generations of fun, then a glider steady-state
+  thisgen:spawn(GLIDER,5,4)
+  thisgen:spawn(EXPLODE,25,10)
+  thisgen:spawn(FISH,4,12)
+
+  -- run until break
+  local gen=1
+  write("\027[2J")	-- ANSI clear screen
+  while 1 do
+    thisgen:evolve(nextgen)
+    thisgen,nextgen = nextgen,thisgen
+    write("\027[H")	-- ANSI home cursor
+    thisgen:draw()
+    write("Life - generation ",gen,"\n")
+    gen=gen+1
+    if gen>2000 then break end
+    --delay()		-- no delay
+  end
+end
+
+LIFE(40,20)

sie_fs/root/scripts/lua/test/luac.lua

@@ -0,0 +1,7 @@
+-- bare-bones luac in Lua
+-- usage: lua luac.lua file.lua
+
+assert(arg[1]~=nil and arg[2]==nil,"usage: lua luac.lua file.lua")
+f=assert(io.open("luac.out","wb"))
+assert(f:write(string.dump(assert(loadfile(arg[1])))))
+assert(f:close())

sie_fs/root/scripts/lua/test/printf.lua

@@ -0,0 +1,7 @@
+-- an implementation of printf
+
+function printf(...)
+ io.write(string.format(...))
+end
+
+printf("Hello %s from %s on %s\n",os.getenv"USER" or "there",_VERSION,os.date())

sie_fs/root/scripts/lua/test/readonly.lua

@@ -0,0 +1,12 @@
+-- make global variables readonly
+
+local f=function (t,i) error("cannot redefine global variable `"..i.."'",2) end
+local g={}
+local G=getfenv()
+setmetatable(g,{__index=G,__newindex=f})
+setfenv(1,g)
+
+-- an example
+rawset(g,"x",3)
+x=2
+y=1	-- cannot redefine `y'

sie_fs/root/scripts/lua/test/sieve.lua

@@ -0,0 +1,29 @@
+-- the sieve of of Eratosthenes programmed with coroutines
+-- typical usage: lua -e N=1000 sieve.lua | column
+
+-- generate all the numbers from 2 to n
+function gen (n)
+  return coroutine.wrap(function ()
+    for i=2,n do coroutine.yield(i) end
+  end)
+end
+
+-- filter the numbers generated by `g', removing multiples of `p'
+function filter (p, g)
+  return coroutine.wrap(function ()
+    while 1 do
+      local n = g()
+      if n == nil then return end
+      if math.mod(n, p) ~= 0 then coroutine.yield(n) end
+    end
+  end)
+end
+
+N=N or 1000		-- from command line
+x = gen(N)		-- generate primes up to N
+while 1 do
+  local n = x()		-- pick a number until done
+  if n == nil then break end
+  print(n)		-- must be a prime number
+  x = filter(n, x)	-- now remove its multiples
+end

sie_fs/root/scripts/lua/test/sort.lua

@@ -0,0 +1,66 @@
+-- two implementations of a sort function
+-- this is an example only. Lua has now a built-in function "sort"
+
+-- extracted from Programming Pearls, page 110
+function qsort(x,l,u,f)
+ if l<u then
+  local m=math.random(u-(l-1))+l-1	-- choose a random pivot in range l..u
+  x[l],x[m]=x[m],x[l]			-- swap pivot to first position
+  local t=x[l]				-- pivot value
+  m=l
+  local i=l+1
+  while i<=u do
+    -- invariant: x[l+1..m] < t <= x[m+1..i-1]
+    if f(x[i],t) then
+      m=m+1
+      x[m],x[i]=x[i],x[m]		-- swap x[i] and x[m]
+    end
+    i=i+1
+  end
+  x[l],x[m]=x[m],x[l]			-- swap pivot to a valid place
+  -- x[l+1..m-1] < x[m] <= x[m+1..u]
+  qsort(x,l,m-1,f)
+  qsort(x,m+1,u,f)
+ end
+end
+
+function selectionsort(x,n,f)
+ local i=1
+ while i<=n do
+  local m,j=i,i+1
+  while j<=n do
+   if f(x[j],x[m]) then m=j end
+   j=j+1
+  end
+ x[i],x[m]=x[m],x[i]			-- swap x[i] and x[m]
+ i=i+1
+ end
+end
+
+function show(m,x)
+ io.write(m,"\n\t")
+ local i=1
+ while x[i] do
+  io.write(x[i])
+  i=i+1
+  if x[i] then io.write(",") end
+ end
+ io.write("\n")
+end
+
+function testsorts(x)
+ local n=1
+ while x[n] do n=n+1 end; n=n-1		-- count elements
+ show("original",x)
+ qsort(x,1,n,function (x,y) return x<y end)
+ show("after quicksort",x)
+ selectionsort(x,n,function (x,y) return x>y end)
+ show("after reverse selection sort",x)
+ qsort(x,1,n,function (x,y) return x<y end)
+ show("after quicksort again",x)
+end
+
+-- array to be sorted
+x={"Jan","Feb","Mar","Apr","May","Jun","Jul","Aug","Sep","Oct","Nov","Dec"}
+
+testsorts(x)

sie_fs/root/scripts/lua/test/table.lua

@@ -0,0 +1,12 @@
+-- make table, grouping all data for the same item
+-- input is 2 columns (item, data)
+
+local A
+while 1 do
+ local l=io.read()
+ if l==nil then break end
+ local _,_,a,b=string.find(l,'"?([_%w]+)"?%s*(.*)$')
+ if a~=A then A=a io.write("\n",a,":") end
+ io.write(" ",b)
+end
+io.write("\n")

sie_fs/root/scripts/lua/test/trace-calls.lua

@@ -0,0 +1,32 @@
+-- trace calls
+-- example: lua -ltrace-calls bisect.lua
+
+local level=0
+
+local function hook(event)
+ local t=debug.getinfo(3)
+ io.write(level," >>> ",string.rep(" ",level))
+ if t~=nil and t.currentline>=0 then io.write(t.short_src,":",t.currentline," ") end
+ t=debug.getinfo(2)
+ if event=="call" then
+  level=level+1
+ else
+  level=level-1 if level<0 then level=0 end
+ end
+ if t.what=="main" then
+  if event=="call" then
+   io.write("begin ",t.short_src)
+  else
+   io.write("end ",t.short_src)
+  end
+ elseif t.what=="Lua" then
+-- table.foreach(t,print)
+  io.write(event," ",t.name or "(Lua)"," <",t.linedefined,":",t.short_src,">")
+ else
+ io.write(event," ",t.name or "(C)"," [",t.what,"] ")
+ end
+ io.write("\n")
+end
+
+debug.sethook(hook,"cr")
+level=0

sie_fs/root/scripts/lua/test/trace-globals.lua

@@ -0,0 +1,38 @@
+-- trace assigments to global variables
+
+do
+ -- a tostring that quotes strings. note the use of the original tostring.
+ local _tostring=tostring
+ local tostring=function(a)
+  if type(a)=="string" then
+   return string.format("%q",a)
+  else
+   return _tostring(a)
+  end
+ end
+
+ local log=function (name,old,new)
+  local t=debug.getinfo(3,"Sl")
+  local line=t.currentline
+  io.write(t.short_src)
+  if line>=0 then io.write(":",line) end
+  io.write(": ",name," is now ",tostring(new)," (was ",tostring(old),")","\n")
+ end
+
+ local g={}
+ local set=function (t,name,value)
+  log(name,g[name],value)
+  g[name]=value
+ end
+ setmetatable(getfenv(),{__index=g,__newindex=set})
+end
+
+-- an example
+
+a=1
+b=2
+a=10
+b=20
+b=nil
+b=200
+print(a,b,c)

sie_fs/root/scripts/lua/test/xd.lua

@@ -0,0 +1,14 @@
+-- hex dump
+-- usage: lua xd.lua < file
+
+local offset=0
+while true do
+ local s=io.read(16)
+ if s==nil then return end
+ io.write(string.format("%08X  ",offset))
+ string.gsub(s,"(.)",
+	function (c) io.write(string.format("%02X ",string.byte(c))) end)
+ io.write(string.rep(" ",3*(16-string.len(s))))
+ io.write(" ",string.gsub(s,"%c","."),"\n") 
+ offset=offset+16
+end

sie_fs/root/scripts/lua/test_gpio.lua

@@ -0,0 +1,28 @@
+package.cpath = "./?.so"
+require "gpio"
+
+  PORT_A = 0
+  PORT_B = 1
+  PORT_C = 2
+  PORT_D = 3
+
+  function pulse()
+    gpio.set_pin(pio,17)
+    delay_s(1)
+    gpio.clear_pin(pio,17)
+    delay_s(1)
+  end
+
+  function delay_s(delay)
+    delay = delay or 1
+    local time_to = os.time() + delay
+    while os.time() < time_to do end
+  end
+
+  pio=gpio.open_port(PORT_C)
+  gpio.gpio_as_output(pio,17)
+
+  for i=0,2,1 do
+    pulse()
+  end
+

sie_fs/usr/bin/bsdl2jtag

@@ -0,0 +1,48 @@
+#!/bin/bash
+#
+# $Id: bsdl2jtag 1467 2009-03-28 00:31:24Z arniml $
+#
+# Convert a BSDL file to a jtag part description
+#
+# Copyright (C) 2009, A. Laeuger
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+
+scriptname=`basename $0`
+
+function usage ()
+{
+    cat <<EOF
+Usage:	$scriptname <bsdl-file> <jtag-file>
+Converts a BSDL file to a jtag part description.
+
+Parameters
+  bsdl-file :  Name of BSDL file
+  jtag-file :  Name of converted jtag description file
+
+EOF
+}
+
+if [[ -z $1 || -z $2 ]]; then
+    usage
+    exit 1
+fi
+
+
+echo "bsdl dump $1" | jtag > $2
+
+exit 0

sie_fs/usr/local/share/urjtag/MANUFACTURERS

@@ -0,0 +1,48 @@
+#
+# $Id: MANUFACTURERS 856 2007-12-16 11:25:37Z kawk $
+#
+# Manufacturer ID database
+# Copyright (C) 2002 ETC s.r.o.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marcel Telka <marcel@telka.sk>, 2002.
+#
+# Documentation:
+# [1] JEDEC Solid State Technology Association, "Standard Manufacturer's
+#     Identification Code", September 2001, Order Number: JEP106-K
+#
+
+# bits 11-1 of the Device Identification Register
+00000000110	lexra		Lexr
+00000000111	hitachi		Hitachi
+00000001001	intel		Intel
+00000001110	freescale	Freescale (Motorola)
+00000010101	philips		Philips Semi. (Signetics)
+00000011000	toshiba		Toshiba
+00000011111	atmel		Atmel
+00000100001	lattice		Lattice Semiconductors
+00000100100	ibm		IBM Semiconductors
+00000110100	cypress		Cypress
+00000110101	dec		DEC
+00001001001	xilinx		Xilinx
+00001100101	analog		Analog Devices
+00001101110	altera		Altera
+00010101011	lattice		Lattice Semiconductors
+00010111111	broadcom	Broadcom
+00101010000	broadcom	Broadcom	# or "Sibyte, Incorporated" ?
+00101110000	brecis		Brecis (PMC-Sierra)
+11110000111	arm  		ARM

sie_fs/usr/local/share/urjtag/admtek/adm5120/adm5120

@@ -0,0 +1,50 @@
+#
+# $Id$
+#
+# JTAG declarations for ADMtek/Infineon ADM5120
+# Copyright (C) 2005 Marek Michalkiewicz
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Marek Michalkiewicz <marekm@amelek.gda.pl>, 2005.
+#
+
+register	BR		 1
+register	BSR		 1
+register	DIR		32
+register	EJIMPCODE	32
+register	EJADDRESS	32
+register	EJDATA		32
+register	EJCONTROL	32
+register	EJALL		96
+register	EJFASTDATA	33
+
+instruction length 5
+
+instruction	BYPASS		11111	BR
+instruction	SAMPLE/PRELOAD	00010	BSR
+instruction	IDCODE		00001	DIR
+instruction	EJTAG_IMPCODE	00011	EJIMPCODE
+instruction	EJTAG_ADDRESS	01000	EJADDRESS
+instruction	EJTAG_DATA	01001	EJDATA
+instruction	EJTAG_CONTROL	01010	EJCONTROL
+instruction	EJTAG_ALL	01011	EJALL
+instruction	EJTAGBOOT	01100	BR
+instruction	NORMALBOOT	01101	BR
+instruction	EJTAG_FASTDATA	01110	EJFASTDATA
+
+initbus ejtag
+endian little

sie_fs/usr/local/share/urjtag/altera/PARTS

@@ -0,0 +1,28 @@
+#
+# $Id: PARTS 897 2007-12-29 13:02:32Z arniml $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 27-12 of the Device Identification Register
+0010000010000010	ep1c6q240		EP1C6Q240
+0010000010000011	ep1c12			EP1C12
+0010000010000100	ep1c20f400		EP1C20F400
+0111000100101000	epm7128aetc100		EPM7128AETC100
+0111000001100100	epm3064a		EPM3064A
+0010000010110010	ep2c8			EP2C8

sie_fs/usr/local/share/urjtag/altera/ep1c12/STEPPINGS

@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep1c12		0

sie_fs/usr/local/share/urjtag/altera/ep1c12/f256

@@ -0,0 +1,204 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IOB2	BSC0
+salias	IOA2	BSC1
+salias	IOB3	BSC2
+salias	IOC4	BSC3
+salias	IOB4	BSC4
+salias	IOA4	BSC5
+salias	IOB5	BSC6
+salias	IOC5	BSC7
+salias	IOE5	BSC8
+salias	IOE6	BSC9
+salias	IOD5	BSC10
+salias	IOD6	BSC11
+salias	IOC6	BSC12
+salias	IOB6	BSC13
+salias	IOE7	BSC14
+salias	IOA6	BSC16
+salias	IOB7	BSC17
+salias	IOC7	BSC18
+salias	IOD7	BSC19
+salias	IOB8	BSC20
+salias	IOA8	BSC21
+salias	IOE8	BSC22
+salias	IOD8	BSC26
+salias	IOC8	BSC27
+salias	IOE10	BSC30
+salias	IOC9	BSC33
+salias	IOD9	BSC34
+salias	IOB9	BSC36
+salias	IOA9	BSC37
+salias	IOD10	BSC38
+salias	IOC10	BSC39
+salias	IOB10	BSC40
+salias	IOA11	BSC41
+salias	IOB11	BSC42
+salias	IOC11	BSC43
+salias	IOD11	BSC48
+salias	IOD12	BSC49
+salias	IOE9	BSC50
+salias	IOE11	BSC51
+salias	IOE12	BSC52
+salias	IOC12	BSC53
+salias	IOB12	BSC54
+salias	IOA13	BSC55
+salias	IOB13	BSC56
+salias	IOC13	BSC57
+salias	IOB14	BSC58
+salias	IOA15	BSC59
+salias	IOB15	BSC60
+salias	IOD13	BSC61
+salias	IOC14	BSC62
+salias	IOC15	BSC63
+salias	IOB16	BSC64
+salias	IOG12	BSC65
+salias	IOH13	BSC66
+salias	IOD14	BSC67
+salias	IOE13	BSC68
+salias	IOF12	BSC69
+salias	IOE14	BSC70
+salias	IOD15	BSC71
+salias	IOD16	BSC72
+salias	IOE15	BSC73
+salias	IOE16	BSC74
+salias	IOF15	BSC75
+salias	IOF13	BSC76
+salias	IOF14	BSC77
+salias	IOF16	BSC78
+salias	IOG15	BSC79
+salias	IOG13	BSC80
+salias	IOG14	BSC81
+salias	IOH12	BSC91
+salias	IOJ16	BSC96
+salias	IOK15	BSC97
+salias	IOK16	BSC108
+salias	IOL16	BSC109
+salias	IOL15	BSC110
+salias	IOL14	BSC111
+salias	IOM16	BSC112
+salias	IOM15	BSC113
+salias	IOL13	BSC114
+salias	IOM14	BSC115
+salias	IOM13	BSC116
+salias	ION14	BSC117
+salias	IOL12	BSC118
+salias	IOK14	BSC119
+salias	IOK12	BSC120
+salias	ION16	BSC121
+salias	ION15	BSC122
+salias	IOR16	BSC123
+salias	IOP15	BSC124
+salias	IOP14	BSC125
+salias	ION13	BSC126
+salias	IOR15	BSC127
+salias	IOT15	BSC128
+salias	IOP13	BSC129
+salias	IOR14	BSC130
+salias	IOR13	BSC131
+salias	IOT13	BSC132
+salias	IOR12	BSC133
+salias	IOP12	BSC134
+salias	IOM12	BSC135
+salias	IOM11	BSC136
+salias	IOM9	BSC137
+salias	ION12	BSC138
+salias	ION11	BSC139
+salias	IOP11	BSC144
+salias	IOR11	BSC145
+salias	IOP10	BSC146
+salias	ION10	BSC147
+salias	IOT11	BSC148
+salias	IOR10	BSC149
+salias	ION9	BSC150
+salias	IOP9	BSC151
+salias	IOT9	BSC153
+salias	IOR9	BSC154
+salias	IOM10	BSC157
+salias	IOP8	BSC160
+salias	ION8	BSC161
+salias	IOM8	BSC165
+salias	IOT8	BSC166
+salias	IOR8	BSC167
+salias	ION7	BSC168
+salias	IOP7	BSC169
+salias	IOR7	BSC170
+salias	IOT6	BSC171
+salias	IOM7	BSC173
+salias	IOR6	BSC174
+salias	IOP6	BSC175
+salias	ION6	BSC176
+salias	ION5	BSC177
+salias	IOM6	BSC178
+salias	IOM5	BSC179
+salias	IOP5	BSC180
+salias	IOR5	BSC181
+salias	IOT4	BSC182
+salias	IOR4	BSC183
+salias	IOP4	BSC184
+salias	IOR3	BSC185
+salias	IOT2	BSC186
+salias	IOR2	BSC187
+salias	ION4	BSC188
+salias	IOP3	BSC189
+salias	IOP2	BSC190
+salias	IOR1	BSC191
+salias	IOL4	BSC192
+salias	IOK5	BSC193
+salias	ION3	BSC194
+salias	IOM4	BSC195
+salias	IOL5	BSC196
+salias	IOM3	BSC197
+salias	ION2	BSC198
+salias	IOM2	BSC199
+salias	ION1	BSC200
+salias	IOM1	BSC201
+salias	IOL2	BSC202
+salias	IOL1	BSC203
+salias	IOK1	BSC204
+salias	IOL3	BSC205
+salias	IOK2	BSC216
+salias	IOJ1	BSC217
+salias	IOK3	BSC218
+salias	IOG4	BSC228
+salias	IOH5	BSC229
+salias	IOF1	BSC239
+salias	IOG2	BSC240
+salias	IOE1	BSC241
+salias	IOF2	BSC242
+salias	IOG3	BSC243
+salias	IOF3	BSC244
+salias	IOD1	BSC245
+salias	IOE2	BSC246
+salias	IOD2	BSC247
+salias	IOE3	BSC248
+salias	IOF5	BSC249
+salias	IOE4	BSC250
+salias	IOD3	BSC251
+salias	IOF4	BSC252
+salias	IOG5	BSC253
+salias	IOB1	BSC254
+salias	IOC2	BSC255
+salias	IOC3	BSC256
+salias	IOD4	BSC257

sie_fs/usr/local/share/urjtag/altera/ep1c12/f324

@@ -0,0 +1,268 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12F324
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IOC4	BSC0
+salias	IOB3	BSC1
+salias	IOG8	BSC2
+salias	IOF8	BSC3
+salias	IOB4	BSC4
+salias	IOA4	BSC5
+salias	IOD5	BSC6
+salias	IOC5	BSC7
+salias	IOB5	BSC8
+salias	IOA6	BSC9
+salias	IOC6	BSC10
+salias	IOB6	BSC11
+salias	IOD6	BSC12
+salias	IOE6	BSC13
+salias	IOC7	BSC14
+salias	IOD7	BSC15
+salias	IOB7	BSC16
+salias	IOA7	BSC17
+salias	IOE7	BSC18
+salias	IOE8	BSC19
+salias	IOB8	BSC20
+salias	IOA8	BSC21
+salias	IOC8	BSC22
+salias	IOD8	BSC23
+salias	IOB9	BSC24
+salias	IOA9	BSC25
+salias	IOC9	BSC26
+salias	IOD9	BSC27
+salias	IOF9	BSC28
+salias	IOG9	BSC29
+salias	IOE10	BSC30
+salias	IOA10	BSC31
+salias	IOB10	BSC32
+salias	IOD10	BSC33
+salias	IOC10	BSC34
+salias	IOE11	BSC35
+salias	IOA11	BSC36
+salias	IOB11	BSC37
+salias	IOD11	BSC38
+salias	IOC11	BSC39
+salias	IOA12	BSC40
+salias	IOB12	BSC41
+salias	IOC12	BSC42
+salias	IOD12	BSC43
+salias	IOC13	BSC44
+salias	IOD13	BSC45
+salias	IOA13	BSC46
+salias	IOB13	BSC47
+salias	IOF10	BSC48
+salias	IOG10	BSC49
+salias	IOE13	BSC50
+salias	IOC14	BSC51
+salias	IOB14	BSC52
+salias	IOD14	BSC53
+salias	IOC15	BSC54
+salias	IOA15	BSC55
+salias	IOB15	BSC56
+salias	IOF11	BSC57
+salias	IOG11	BSC58
+salias	IOB16	BSC59
+salias	IOC16	BSC60
+salias	IOD17	BSC61
+salias	IOC17	BSC62
+salias	IOD15	BSC63
+salias	IOD16	BSC64
+salias	IOE14	BSC65
+salias	IOD18	BSC66
+salias	IOE15	BSC67
+salias	IOE16	BSC68
+salias	IOE17	BSC69
+salias	IOF15	BSC70
+salias	IOF16	BSC71
+salias	IOF14	BSC72
+salias	IOF13	BSC73
+salias	IOF17	BSC74
+salias	IOF18	BSC75
+salias	IOF12	BSC76
+salias	IOG12	BSC77
+salias	IOG16	BSC78
+salias	IOG15	BSC79
+salias	IOG14	BSC80
+salias	IOG13	BSC81
+salias	IOG17	BSC82
+salias	IOG18	BSC83
+salias	IOH18	BSC84
+salias	IOH17	BSC85
+salias	IOH16	BSC86
+salias	IOH15	BSC87
+salias	IOH14	BSC88
+salias	IOH13	BSC89
+salias	IOJ13	BSC90
+salias	IOJ14	BSC91
+salias	IOK15	BSC96
+salias	IOK16	BSC97
+salias	IOL14	BSC98
+salias	IOL15	BSC99
+salias	IOL16	BSC100
+salias	IOL13	BSC101
+salias	IOM13	BSC102
+salias	IOL17	BSC103
+salias	IOL18	BSC104
+salias	IOM16	BSC105
+salias	IOM15	BSC106
+salias	IOM14	BSC107
+salias	IOM17	BSC108
+salias	IOM18	BSC109
+salias	ION15	BSC110
+salias	ION16	BSC111
+salias	ION12	BSC112
+salias	ION13	BSC113
+salias	ION17	BSC114
+salias	ION18	BSC115
+salias	ION14	BSC116
+salias	IOP14	BSC117
+salias	IOP15	BSC118
+salias	IOP17	BSC119
+salias	IOP16	BSC120
+salias	IOR16	BSC121
+salias	IOR15	BSC122
+salias	IOR18	BSC123
+salias	IOR17	BSC124
+salias	IOT17	BSC125
+salias	IOT16	BSC126
+salias	IOT15	BSC127
+salias	IOU16	BSC128
+salias	IOM11	BSC129
+salias	ION11	BSC130
+salias	IOU15	BSC131
+salias	IOV15	BSC132
+salias	IOR14	BSC133
+salias	IOT14	BSC134
+salias	IOU14	BSC135
+salias	IOP13	BSC136
+salias	IOP12	BSC137
+salias	IOM10	BSC138
+salias	ION10	BSC139
+salias	IOR13	BSC140
+salias	IOT13	BSC141
+salias	IOU13	BSC142
+salias	IOV13	BSC143
+salias	IOR12	BSC144
+salias	IOT12	BSC145
+salias	IOU12	BSC146
+salias	IOV12	BSC147
+salias	IOV11	BSC148
+salias	IOU11	BSC149
+salias	IOT11	BSC150
+salias	IOR11	BSC151
+salias	IOP10	BSC152
+salias	IOR10	BSC153
+salias	IOT10	BSC154
+salias	IOV10	BSC155
+salias	IOU10	BSC156
+salias	IOP9	BSC157
+salias	ION9	BSC158
+salias	IOM9	BSC159
+salias	IOT9	BSC160
+salias	IOR9	BSC161
+salias	IOV9	BSC162
+salias	IOU9	BSC163
+salias	IOR8	BSC164
+salias	IOT8	BSC165
+salias	IOV8	BSC166
+salias	IOU8	BSC167
+salias	IOR7	BSC168
+salias	IOT7	BSC169
+salias	IOV7	BSC170
+salias	IOU7	BSC171
+salias	IOR6	BSC172
+salias	IOT6	BSC173
+salias	IOP7	BSC174
+salias	IOP6	BSC175
+salias	IOU6	BSC176
+salias	IOV6	BSC177
+salias	IOR5	BSC178
+salias	IOR4	BSC179
+salias	IOU5	BSC180
+salias	IOT5	BSC181
+salias	IOU4	BSC182
+salias	IOT4	BSC183
+salias	ION8	BSC184
+salias	IOM8	BSC185
+salias	IOV4	BSC186
+salias	IOU3	BSC187
+salias	IOT3	BSC188
+salias	IOT2	BSC189
+salias	IOR3	BSC190
+salias	IOR2	BSC191
+salias	IOP4	BSC192
+salias	IOR1	BSC193
+salias	IOP3	BSC194
+salias	IOP2	BSC195
+salias	IOP5	BSC196
+salias	ION4	BSC197
+salias	ION3	BSC198
+salias	ION6	BSC199
+salias	ION5	BSC200
+salias	ION7	BSC201
+salias	IOM6	BSC202
+salias	ION2	BSC203
+salias	ION1	BSC204
+salias	IOM4	BSC205
+salias	IOM5	BSC206
+salias	IOM2	BSC207
+salias	IOM3	BSC208
+salias	IOM1	BSC209
+salias	IOL4	BSC210
+salias	IOL5	BSC211
+salias	IOL3	BSC212
+salias	IOL2	BSC213
+salias	IOL6	BSC214
+salias	IOL7	BSC215
+salias	IOK5	BSC216
+salias	IOK4	BSC217
+salias	IOK6	BSC218
+salias	IOJ1	BSC228
+salias	IOH6	BSC229
+salias	IOH5	BSC230
+salias	IOH4	BSC231
+salias	IOH3	BSC232
+salias	IOH2	BSC233
+salias	IOH1	BSC234
+salias	IOG6	BSC235
+salias	IOG5	BSC236
+salias	IOG4	BSC237
+salias	IOG3	BSC238
+salias	IOF7	BSC239
+salias	IOF6	BSC240
+salias	IOG2	BSC241
+salias	IOG1	BSC242
+salias	IOF5	BSC243
+salias	IOF4	BSC244
+salias	IOF3	BSC245
+salias	IOF2	BSC246
+salias	IOE5	BSC247
+salias	IOE4	BSC248
+salias	IOF1	BSC249
+salias	IOE2	BSC250
+salias	IOE3	BSC251
+salias	IOD1	BSC252
+salias	IOD4	BSC253
+salias	IOD2	BSC254
+salias	IOD3	BSC255
+salias	IOC2	BSC256
+salias	IOC3	BSC257

sie_fs/usr/local/share/urjtag/altera/ep1c12/q240

@@ -0,0 +1,192 @@
+#
+# $Id$
+#
+# JTAG package script for EP1C12Q240
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IO240	BSC0
+salias	IO239	BSC1
+salias	IO238	BSC2
+salias	IO237	BSC3
+salias	IO236	BSC4
+salias	IO235	BSC5
+salias	IO234	BSC6
+salias	IO233	BSC7
+salias	IO228	BSC8
+salias	IO227	BSC9
+salias	IO226	BSC10
+salias	IO225	BSC11
+salias	IO224	BSC12
+salias	IO223	BSC13
+salias	IO222	BSC14
+salias	IO219	BSC16
+salias	IO218	BSC17
+salias	IO217	BSC18
+salias	IO216	BSC19
+salias	IO215	BSC20
+salias	IO214	BSC21
+salias	IO213	BSC22
+salias	IO208	BSC30
+salias	IO207	BSC33
+salias	IO206	BSC34
+salias	IO203	BSC36
+salias	IO202	BSC37
+salias	IO201	BSC38
+salias	IO200	BSC39
+salias	IO197	BSC48
+salias	IO196	BSC49
+salias	IO195	BSC50
+salias	IO194	BSC51
+salias	IO193	BSC52
+salias	IO188	BSC53
+salias	IO187	BSC54
+salias	IO186	BSC55
+salias	IO185	BSC56
+salias	IO184	BSC57
+salias	IO183	BSC58
+salias	IO182	BSC59
+salias	IO181	BSC60
+salias	IO180	BSC61
+salias	IO179	BSC62
+salias	IO178	BSC63
+salias	IO177	BSC64
+salias	IO176	BSC65
+salias	IO175	BSC66
+salias	IO174	BSC67
+salias	IO173	BSC68
+salias	IO170	BSC69
+salias	IO169	BSC70
+salias	IO168	BSC71
+salias	IO167	BSC72
+salias	IO166	BSC73
+salias	IO165	BSC74
+salias	IO164	BSC75
+salias	IO163	BSC76
+salias	IO162	BSC77
+salias	IO161	BSC78
+salias	IO160	BSC79
+salias	IO159	BSC80
+salias	IO158	BSC81
+salias	IO156	BSC91
+salias	IO144	BSC96
+salias	IO143	BSC97
+salias	IO141	BSC108
+salias	IO140	BSC109
+salias	IO139	BSC110
+salias	IO138	BSC111
+salias	IO137	BSC112
+salias	IO136	BSC113
+salias	IO135	BSC114
+salias	IO134	BSC115
+salias	IO133	BSC116
+salias	IO132	BSC117
+salias	IO131	BSC118
+salias	IO128	BSC119
+salias	IO127	BSC120
+salias	IO126	BSC121
+salias	IO125	BSC122
+salias	IO124	BSC123
+salias	IO123	BSC124
+salias	IO122	BSC125
+salias	IO121	BSC126
+salias	IO120	BSC127
+salias	IO119	BSC128
+salias	IO118	BSC129
+salias	IO117	BSC130
+salias	IO116	BSC131
+salias	IO115	BSC132
+salias	IO114	BSC133
+salias	IO113	BSC134
+salias	IO108	BSC135
+salias	IO107	BSC136
+salias	IO106	BSC137
+salias	IO105	BSC138
+salias	IO104	BSC139
+salias	IO101	BSC148
+salias	IO100	BSC149
+salias	IO99	BSC150
+salias	IO98	BSC151
+salias	IO95	BSC153
+salias	IO94	BSC154
+salias	IO93	BSC157
+salias	IO88	BSC165
+salias	IO87	BSC166
+salias	IO86	BSC167
+salias	IO85	BSC168
+salias	IO84	BSC169
+salias	IO83	BSC170
+salias	IO82	BSC171
+salias	IO79	BSC173
+salias	IO78	BSC174
+salias	IO77	BSC175
+salias	IO76	BSC176
+salias	IO75	BSC177
+salias	IO74	BSC178
+salias	IO73	BSC179
+salias	IO68	BSC180
+salias	IO67	BSC181
+salias	IO66	BSC182
+salias	IO65	BSC183
+salias	IO64	BSC184
+salias	IO63	BSC185
+salias	IO62	BSC186
+salias	IO61	BSC187
+salias	IO60	BSC188
+salias	IO59	BSC189
+salias	IO58	BSC190
+salias	IO57	BSC191
+salias	IO56	BSC192
+salias	IO55	BSC193
+salias	IO54	BSC194
+salias	IO53	BSC195
+salias	IO50	BSC196
+salias	IO49	BSC197
+salias	IO48	BSC198
+salias	IO47	BSC199
+salias	IO46	BSC200
+salias	IO45	BSC201
+salias	IO44	BSC202
+salias	IO43	BSC203
+salias	IO42	BSC204
+salias	IO41	BSC205
+salias	IO39	BSC216
+salias	IO38	BSC217
+salias	IO37	BSC218
+salias	IO24	BSC228
+salias	IO23	BSC229
+salias	IO21	BSC239
+salias	IO20	BSC240
+salias	IO19	BSC241
+salias	IO18	BSC242
+salias	IO17	BSC243
+salias	IO16	BSC244
+salias	IO15	BSC245
+salias	IO14	BSC246
+salias	IO13	BSC247
+salias	IO12	BSC248
+salias	IO11	BSC249
+salias	IO8	BSC250
+salias	IO7	BSC251
+salias	IO6	BSC252
+salias	IO5	BSC253
+salias	IO4	BSC254
+salias	IO3	BSC255
+salias	IO2	BSC256
+salias	IO1	BSC257

sie_fs/usr/local/share/urjtag/altera/ep1c20f400/STEPPINGS

@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep1c20f400		0

sie_fs/usr/local/share/urjtag/altera/ep1c6q240/ep1c6q240

@@ -0,0 +1,818 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Kent Palmkvist <kentp@isy.liu.se>
+#
+
+# JTAG declarations for EP1C6Q240 idcode 00000010000010000010000011011101
+# generated on Thu Jun 30 23:25:36 2005 by /home/tde/kentp/bsdl2jtag_kp.pl 0.1 from /home/tde/kentp/ep1c6q240_kp.bsd
+signal IO13
+signal IO93
+signal IO113
+signal IO203
+signal IO174
+signal IO41
+signal IO38
+signal IO127
+signal IO73
+signal IO64
+signal TMS
+signal IO83
+signal IO7
+signal IO85
+signal IO107
+signal IO118
+signal IO2
+signal IO234
+signal IO239
+signal IO135
+signal IO218
+signal IO98
+signal IO167
+signal IO137
+signal IO236
+signal IO14
+signal MSEL0
+signal IO221
+signal IO58
+signal IO184
+signal IO49
+signal IO18
+signal IO97
+signal TCK
+signal IO143
+signal IO186
+signal CLK2
+signal IO81
+signal IO63
+signal IO177
+signal IO123
+signal IO100
+signal IO144
+signal IO162
+signal IO185
+signal IO20
+signal IO198
+signal IO74
+signal IO104
+signal IO21
+signal DCLK
+signal IO217
+signal IO68
+signal IO164
+signal IO139
+signal IO45
+signal IO228
+signal IO238
+signal IO114
+signal IO188
+signal IO205
+signal IO116
+signal IO102
+signal GND
+signal IO222
+signal IO176
+signal IO56
+signal IO179
+signal IO165
+signal IO240
+signal IO1
+signal IO76
+signal IO182
+signal IO53
+signal IO200
+signal DATA0
+signal IO161
+signal IO24
+signal IO78
+signal IO94
+signal IO43
+signal IO4
+signal IO195
+signal IO16
+signal CLK0
+signal IO214
+signal IO121
+signal VCC
+signal IO47
+signal IO61
+signal IO160
+signal IO11
+signal IO82
+signal IO187
+signal IO65
+signal IO180
+signal IO213
+signal IO15
+signal IO88
+signal IO220
+signal IO156
+signal IO226
+signal IO158
+signal TDO
+signal IO126
+signal IO215
+signal IO134
+signal IO206
+signal IO23
+signal IO122
+signal IO169
+signal IO99
+signal IO54
+signal IO119
+signal IO80
+signal IO95
+signal IO128
+signal IO17
+signal IO106
+signal IO59
+signal IO202
+signal IO67
+signal IO124
+signal IO168
+signal IO132
+signal IO108
+signal IO235
+signal IO12
+signal NCONFIG
+signal NCE
+signal IO224
+signal IO233
+signal IO199
+signal IO183
+signal NCEO
+signal IO48
+signal IO19
+signal IO131
+signal IO136
+signal IO39
+signal IO96
+signal MSEL1
+signal IO6
+signal IO178
+signal IO101
+signal IO87
+signal IO175
+signal IO138
+signal TDI
+signal IO196
+signal IO193
+signal IO159
+signal IO237
+signal IO125
+signal IO105
+signal IO86
+signal IO117
+signal IO163
+signal CLK3
+signal IO140
+signal IO194
+signal IO5
+signal IO75
+signal IO50
+signal IO84
+signal IO181
+signal IO225
+signal IO170
+signal NSTATUS
+signal IO141
+signal IO207
+signal IO103
+signal IO120
+signal IO8
+signal IO166
+signal IO208
+signal CONF_DONE
+signal IO216
+signal IO79
+signal IO66
+signal IO57
+signal IO62
+signal IO77
+signal IO133
+signal IO223
+signal IO3
+signal IO55
+signal IO173
+signal IO219
+signal IO227
+signal IO60
+signal IO46
+signal IO44
+signal IO197
+signal IO204
+signal CLK1
+signal IO42
+signal IO115
+signal IO37
+signal IO201
+register BYPASS 1
+register BSR 582
+register IOCSR 3366
+register DEVICE_ID 32
+instruction length 10
+instruction BYPASS 1111111111 BYPASS
+instruction IDCODE 0000000110 DEVICE_ID
+# instruction USERCODE 0000000111 <unspecified>
+instruction SAMPLE/PRELOAD 0000000101 BSR
+instruction EXTEST 0000000000 BSR
+# instruction CLAMP 0000001010 <unspecified>
+# instruction HIGHZ 0000001011 <unspecified>
+instruction CONFIG_IO 0000001101 IOCSR
+bit  0 I ? IO240
+bit  1 C 1 *
+bit  2 O ? IO240 1 1 Z
+bit  3 I ? IO239
+bit  4 C 1 *
+bit  5 O ? IO239 4 1 Z
+bit  6 I ? IO238
+bit  7 C 1 *
+bit  8 O ? IO238 7 1 Z
+bit  9 I ? IO237
+bit 10 C 1 *
+bit 11 O ? IO237 10 1 Z
+bit 12 I ? IO236
+bit 13 C 1 *
+bit 14 O ? IO236 13 1 Z
+bit 15 I ? IO235
+bit 16 C 1 *
+bit 17 O ? IO235 16 1 Z
+bit 18 I ? IO234
+bit 19 C 1 *
+bit 20 O ? IO234 19 1 Z
+bit 21 I ? IO233
+bit 22 C 1 *
+bit 23 O ? IO233 22 1 Z
+bit 24 I ? IO228
+bit 25 C 1 *
+bit 26 O ? IO228 25 1 Z
+bit 27 I ? IO227
+bit 28 C 1 *
+bit 29 O ? IO227 28 1 Z
+bit 30 I ? IO226
+bit 31 C 1 *
+bit 32 O ? IO226 31 1 Z
+bit 33 I ? IO225
+bit 34 C 1 *
+bit 35 O ? IO225 34 1 Z
+bit 36 I ? IO224
+bit 37 C 1 *
+bit 38 O ? IO224 37 1 Z
+bit 39 I ? IO223
+bit 40 C 1 *
+bit 41 O ? IO223 40 1 Z
+bit 42 I ? IO222
+bit 43 C 1 *
+bit 44 O ? IO222 43 1 Z
+bit 45 I ? IO221
+bit 46 C 1 *
+bit 47 O ? IO221 46 1 Z
+bit 48 I ? IO220
+bit 49 C 1 *
+bit 50 O ? IO220 49 1 Z
+bit 51 I ? IO219
+bit 52 C 1 *
+bit 53 O ? IO219 52 1 Z
+bit 54 I ? IO218
+bit 55 C 1 *
+bit 56 O ? IO218 55 1 Z
+bit 57 I ? IO217
+bit 58 C 1 *
+bit 59 O ? IO217 58 1 Z
+bit 60 I ? IO216
+bit 61 C 1 *
+bit 62 O ? IO216 61 1 Z
+bit 63 I ? IO215
+bit 64 C 1 *
+bit 65 O ? IO215 64 1 Z
+bit 66 I ? IO214
+bit 67 C 1 *
+bit 68 O ? IO214 67 1 Z
+bit 69 I ? IO213
+bit 70 C 1 *
+bit 71 O ? IO213 70 1 Z
+bit 72 I ? IO208
+bit 73 C 1 *
+bit 74 O ? IO208 73 1 Z
+bit 75 I ? IO207
+bit 76 C 1 *
+bit 77 O ? IO207 76 1 Z
+bit 78 I ? IO206
+bit 79 C 1 *
+bit 80 O ? IO206 79 1 Z
+bit 81 I ? IO205
+bit 82 C 1 *
+bit 83 O ? IO205 82 1 Z
+bit 84 I ? IO204
+bit 85 C 1 *
+bit 86 O ? IO204 85 1 Z
+bit 87 I ? IO203
+bit 88 C 1 *
+bit 89 O ? IO203 88 1 Z
+bit 90 I ? IO202
+bit 91 C 1 *
+bit 92 O ? IO202 91 1 Z
+bit 93 I ? IO201
+bit 94 C 1 *
+bit 95 O ? IO201 94 1 Z
+bit 96 I ? IO200
+bit 97 C 1 *
+bit 98 O ? IO200 97 1 Z
+bit 99 I ? IO199
+bit 100 C 1 *
+bit 101 O ? IO199 100 1 Z
+bit 102 I ? IO198
+bit 103 C 1 *
+bit 104 O ? IO198 103 1 Z
+bit 105 I ? IO197
+bit 106 C 1 *
+bit 107 O ? IO197 106 1 Z
+bit 108 I ? IO196
+bit 109 C 1 *
+bit 110 O ? IO196 109 1 Z
+bit 111 I ? IO195
+bit 112 C 1 *
+bit 113 O ? IO195 112 1 Z
+bit 114 I ? IO194
+bit 115 C 1 *
+bit 116 O ? IO194 115 1 Z
+bit 117 I ? IO193
+bit 118 C 1 *
+bit 119 O ? IO193 118 1 Z
+bit 120 I ? IO188
+bit 121 C 1 *
+bit 122 O ? IO188 121 1 Z
+bit 123 I ? IO187
+bit 124 C 1 *
+bit 125 O ? IO187 124 1 Z
+bit 126 I ? IO186
+bit 127 C 1 *
+bit 128 O ? IO186 127 1 Z
+bit 129 I ? IO185
+bit 130 C 1 *
+bit 131 O ? IO185 130 1 Z
+bit 132 I ? IO184
+bit 133 C 1 *
+bit 134 O ? IO184 133 1 Z
+bit 135 I ? IO183
+bit 136 C 1 *
+bit 137 O ? IO183 136 1 Z
+bit 138 I ? IO182
+bit 139 C 1 *
+bit 140 O ? IO182 139 1 Z
+bit 141 I ? IO181
+bit 142 C 1 *
+bit 143 O ? IO181 142 1 Z
+bit 144 I ? IO180
+bit 145 C 1 *
+bit 146 O ? IO180 145 1 Z
+bit 147 I ? IO179
+bit 148 C 1 *
+bit 149 O ? IO179 148 1 Z
+bit 150 I ? IO178
+bit 151 C 1 *
+bit 152 O ? IO178 151 1 Z
+bit 153 I ? IO177
+bit 154 C 1 *
+bit 155 O ? IO177 154 1 Z
+bit 156 I ? IO176
+bit 157 C 1 *
+bit 158 O ? IO176 157 1 Z
+bit 159 I ? IO175
+bit 160 C 1 *
+bit 161 O ? IO175 160 1 Z
+bit 162 I ? IO174
+bit 163 C 1 *
+bit 164 O ? IO174 163 1 Z
+bit 165 I ? IO173
+bit 166 C 1 *
+bit 167 O ? IO173 166 1 Z
+bit 168 I ? IO170
+bit 169 C 1 *
+bit 170 O ? IO170 169 1 Z
+bit 171 I ? IO169
+bit 172 C 1 *
+bit 173 O ? IO169 172 1 Z
+bit 174 I ? IO168
+bit 175 C 1 *
+bit 176 O ? IO168 175 1 Z
+bit 177 I ? IO167
+bit 178 C 1 *
+bit 179 O ? IO167 178 1 Z
+bit 180 I ? IO166
+bit 181 C 1 *
+bit 182 O ? IO166 181 1 Z
+bit 183 I ? IO165
+bit 184 C 1 *
+bit 185 O ? IO165 184 1 Z
+bit 186 I ? IO164
+bit 187 C 1 *
+bit 188 O ? IO164 187 1 Z
+bit 189 I ? IO163
+bit 190 C 1 *
+bit 191 O ? IO163 190 1 Z
+bit 192 I ? IO162
+bit 193 C 1 *
+bit 194 O ? IO162 193 1 Z
+bit 195 I ? IO161
+bit 196 C 1 *
+bit 197 O ? IO161 196 1 Z
+bit 198 I ? IO160
+bit 199 C 1 *
+bit 200 O ? IO160 199 1 Z
+bit 201 I ? IO159
+bit 202 C 1 *
+bit 203 O ? IO159 202 1 Z
+bit 204 I ? IO158
+bit 205 C 1 *
+bit 206 O ? IO158 205 1 Z
+bit 207 I ? IO156
+bit 208 C 1 *
+bit 209 O ? IO156 208 1 Z
+bit 210 I ? CLK2
+bit 211 X ? *
+bit 212 X ? *
+bit 213 X ? *
+bit 214 X 1 *
+bit 215 X ? *
+bit 216 X ? *
+bit 217 X 1 *
+bit 218 X ? *
+bit 219 X ? *
+bit 220 X 1 *
+bit 221 X ? *
+bit 222 I ? IO144
+bit 223 C 1 *
+bit 224 O ? IO144 223 1 Z
+bit 225 I ? IO143
+bit 226 C 1 *
+bit 227 O ? IO143 226 1 Z
+bit 228 I ? IO141
+bit 229 C 1 *
+bit 230 O ? IO141 229 1 Z
+bit 231 I ? IO140
+bit 232 C 1 *
+bit 233 O ? IO140 232 1 Z
+bit 234 I ? IO139
+bit 235 C 1 *
+bit 236 O ? IO139 235 1 Z
+bit 237 I ? IO138
+bit 238 C 1 *
+bit 239 O ? IO138 238 1 Z
+bit 240 I ? IO137
+bit 241 C 1 *
+bit 242 O ? IO137 241 1 Z
+bit 243 I ? IO136
+bit 244 C 1 *
+bit 245 O ? IO136 244 1 Z
+bit 246 I ? IO135
+bit 247 C 1 *
+bit 248 O ? IO135 247 1 Z
+bit 249 I ? IO134
+bit 250 C 1 *
+bit 251 O ? IO134 250 1 Z
+bit 252 I ? IO133
+bit 253 C 1 *
+bit 254 O ? IO133 253 1 Z
+bit 255 I ? IO132
+bit 256 C 1 *
+bit 257 O ? IO132 256 1 Z
+bit 258 I ? IO131
+bit 259 C 1 *
+bit 260 O ? IO131 259 1 Z
+bit 261 I ? IO128
+bit 262 C 1 *
+bit 263 O ? IO128 262 1 Z
+bit 264 I ? IO127
+bit 265 C 1 *
+bit 266 O ? IO127 265 1 Z
+bit 267 I ? IO126
+bit 268 C 1 *
+bit 269 O ? IO126 268 1 Z
+bit 270 I ? IO125
+bit 271 C 1 *
+bit 272 O ? IO125 271 1 Z
+bit 273 I ? IO124
+bit 274 C 1 *
+bit 275 O ? IO124 274 1 Z
+bit 276 I ? IO123
+bit 277 C 1 *
+bit 278 O ? IO123 277 1 Z
+bit 279 I ? IO122
+bit 280 C 1 *
+bit 281 O ? IO122 280 1 Z
+bit 282 I ? IO121
+bit 283 C 1 *
+bit 284 O ? IO121 283 1 Z
+bit 285 I ? IO120
+bit 286 C 1 *
+bit 287 O ? IO120 286 1 Z
+bit 288 I ? IO119
+bit 289 C 1 *
+bit 290 O ? IO119 289 1 Z
+bit 291 I ? IO118
+bit 292 C 1 *
+bit 293 O ? IO118 292 1 Z
+bit 294 I ? IO117
+bit 295 C 1 *
+bit 296 O ? IO117 295 1 Z
+bit 297 I ? IO116
+bit 298 C 1 *
+bit 299 O ? IO116 298 1 Z
+bit 300 I ? IO115
+bit 301 C 1 *
+bit 302 O ? IO115 301 1 Z
+bit 303 I ? IO114
+bit 304 C 1 *
+bit 305 O ? IO114 304 1 Z
+bit 306 I ? IO113
+bit 307 C 1 *
+bit 308 O ? IO113 307 1 Z
+bit 309 I ? IO108
+bit 310 C 1 *
+bit 311 O ? IO108 310 1 Z
+bit 312 I ? IO107
+bit 313 C 1 *
+bit 314 O ? IO107 313 1 Z
+bit 315 I ? IO106
+bit 316 C 1 *
+bit 317 O ? IO106 316 1 Z
+bit 318 I ? IO105
+bit 319 C 1 *
+bit 320 O ? IO105 319 1 Z
+bit 321 I ? IO104
+bit 322 C 1 *
+bit 323 O ? IO104 322 1 Z
+bit 324 I ? IO103
+bit 325 C 1 *
+bit 326 O ? IO103 325 1 Z
+bit 327 I ? IO102
+bit 328 C 1 *
+bit 329 O ? IO102 328 1 Z
+bit 330 I ? IO101
+bit 331 C 1 *
+bit 332 O ? IO101 331 1 Z
+bit 333 I ? IO100
+bit 334 C 1 *
+bit 335 O ? IO100 334 1 Z
+bit 336 I ? IO99
+bit 337 C 1 *
+bit 338 O ? IO99 337 1 Z
+bit 339 I ? IO98
+bit 340 C 1 *
+bit 341 O ? IO98 340 1 Z
+bit 342 I ? IO97
+bit 343 C 1 *
+bit 344 O ? IO97 343 1 Z
+bit 345 I ? IO96
+bit 346 C 1 *
+bit 347 O ? IO96 346 1 Z
+bit 348 I ? IO95
+bit 349 C 1 *
+bit 350 O ? IO95 349 1 Z
+bit 351 I ? IO94
+bit 352 C 1 *
+bit 353 O ? IO94 352 1 Z
+bit 354 I ? IO93
+bit 355 C 1 *
+bit 356 O ? IO93 355 1 Z
+bit 357 I ? IO88
+bit 358 C 1 *
+bit 359 O ? IO88 358 1 Z
+bit 360 I ? IO87
+bit 361 C 1 *
+bit 362 O ? IO87 361 1 Z
+bit 363 I ? IO86
+bit 364 C 1 *
+bit 365 O ? IO86 364 1 Z
+bit 366 I ? IO85
+bit 367 C 1 *
+bit 368 O ? IO85 367 1 Z
+bit 369 I ? IO84
+bit 370 C 1 *
+bit 371 O ? IO84 370 1 Z
+bit 372 I ? IO83
+bit 373 C 1 *
+bit 374 O ? IO83 373 1 Z
+bit 375 I ? IO82
+bit 376 C 1 *
+bit 377 O ? IO82 376 1 Z
+bit 378 I ? IO81
+bit 379 C 1 *
+bit 380 O ? IO81 379 1 Z
+bit 381 I ? IO80
+bit 382 C 1 *
+bit 383 O ? IO80 382 1 Z
+bit 384 I ? IO79
+bit 385 C 1 *
+bit 386 O ? IO79 385 1 Z
+bit 387 I ? IO78
+bit 388 C 1 *
+bit 389 O ? IO78 388 1 Z
+bit 390 I ? IO77
+bit 391 C 1 *
+bit 392 O ? IO77 391 1 Z
+bit 393 I ? IO76
+bit 394 C 1 *
+bit 395 O ? IO76 394 1 Z
+bit 396 I ? IO75
+bit 397 C 1 *
+bit 398 O ? IO75 397 1 Z
+bit 399 I ? IO74
+bit 400 C 1 *
+bit 401 O ? IO74 400 1 Z
+bit 402 I ? IO73
+bit 403 C 1 *
+bit 404 O ? IO73 403 1 Z
+bit 405 I ? IO68
+bit 406 C 1 *
+bit 407 O ? IO68 406 1 Z
+bit 408 I ? IO67
+bit 409 C 1 *
+bit 410 O ? IO67 409 1 Z
+bit 411 I ? IO66
+bit 412 C 1 *
+bit 413 O ? IO66 412 1 Z
+bit 414 I ? IO65
+bit 415 C 1 *
+bit 416 O ? IO65 415 1 Z
+bit 417 I ? IO64
+bit 418 C 1 *
+bit 419 O ? IO64 418 1 Z
+bit 420 I ? IO63
+bit 421 C 1 *
+bit 422 O ? IO63 421 1 Z
+bit 423 I ? IO62
+bit 424 C 1 *
+bit 425 O ? IO62 424 1 Z
+bit 426 I ? IO61
+bit 427 C 1 *
+bit 428 O ? IO61 427 1 Z
+bit 429 I ? IO60
+bit 430 C 1 *
+bit 431 O ? IO60 430 1 Z
+bit 432 I ? IO59
+bit 433 C 1 *
+bit 434 O ? IO59 433 1 Z
+bit 435 I ? IO58
+bit 436 C 1 *
+bit 437 O ? IO58 436 1 Z
+bit 438 I ? IO57
+bit 439 C 1 *
+bit 440 O ? IO57 439 1 Z
+bit 441 I ? IO56
+bit 442 C 1 *
+bit 443 O ? IO56 442 1 Z
+bit 444 I ? IO55
+bit 445 C 1 *
+bit 446 O ? IO55 445 1 Z
+bit 447 I ? IO54
+bit 448 C 1 *
+bit 449 O ? IO54 448 1 Z
+bit 450 I ? IO53
+bit 451 C 1 *
+bit 452 O ? IO53 451 1 Z
+bit 453 I ? IO50
+bit 454 C 1 *
+bit 455 O ? IO50 454 1 Z
+bit 456 I ? IO49
+bit 457 C 1 *
+bit 458 O ? IO49 457 1 Z
+bit 459 I ? IO48
+bit 460 C 1 *
+bit 461 O ? IO48 460 1 Z
+bit 462 I ? IO47
+bit 463 C 1 *
+bit 464 O ? IO47 463 1 Z
+bit 465 I ? IO46
+bit 466 C 1 *
+bit 467 O ? IO46 466 1 Z
+bit 468 I ? IO45
+bit 469 C 1 *
+bit 470 O ? IO45 469 1 Z
+bit 471 I ? IO44
+bit 472 C 1 *
+bit 473 O ? IO44 472 1 Z
+bit 474 I ? IO43
+bit 475 C 1 *
+bit 476 O ? IO43 475 1 Z
+bit 477 I ? IO42
+bit 478 C 1 *
+bit 479 O ? IO42 478 1 Z
+bit 480 I ? IO41
+bit 481 C 1 *
+bit 482 O ? IO41 481 1 Z
+bit 483 I ? IO39
+bit 484 C 1 *
+bit 485 O ? IO39 484 1 Z
+bit 486 I ? IO38
+bit 487 C 1 *
+bit 488 O ? IO38 487 1 Z
+bit 489 I ? IO37
+bit 490 C 1 *
+bit 491 O ? IO37 490 1 Z
+bit 492 I ? DCLK
+bit 493 C 1 *
+bit 494 O ? DCLK 493 1 Z
+bit 495 I ? MSEL1
+bit 496 X ? *
+bit 497 X ? *
+bit 498 I ? MSEL0
+bit 499 X ? *
+bit 500 X ? *
+bit 501 X ? *
+bit 502 X 1 *
+bit 503 X ? *
+bit 504 X ? *
+bit 505 X 1 *
+bit 506 X ? *
+bit 507 X ? *
+bit 508 X 1 *
+bit 509 X ? *
+bit 510 I ? CLK0
+bit 511 X ? *
+bit 512 X ? *
+bit 513 X ? *
+bit 514 X 1 *
+bit 515 X ? *
+bit 516 I ? DATA0
+bit 517 X ? *
+bit 518 X ? *
+bit 519 I ? IO24
+bit 520 C 1 *
+bit 521 O ? IO24 520 1 Z
+bit 522 I ? IO23
+bit 523 C 1 *
+bit 524 O ? IO23 523 1 Z
+bit 525 I ? IO21
+bit 526 C 1 *
+bit 527 O ? IO21 526 1 Z
+bit 528 I ? IO20
+bit 529 C 1 *
+bit 530 O ? IO20 529 1 Z
+bit 531 I ? IO19
+bit 532 C 1 *
+bit 533 O ? IO19 532 1 Z
+bit 534 I ? IO18
+bit 535 C 1 *
+bit 536 O ? IO18 535 1 Z
+bit 537 I ? IO17
+bit 538 C 1 *
+bit 539 O ? IO17 538 1 Z
+bit 540 I ? IO16
+bit 541 C 1 *
+bit 542 O ? IO16 541 1 Z
+bit 543 I ? IO15
+bit 544 C 1 *
+bit 545 O ? IO15 544 1 Z
+bit 546 I ? IO14
+bit 547 C 1 *
+bit 548 O ? IO14 547 1 Z
+bit 549 I ? IO13
+bit 550 C 1 *
+bit 551 O ? IO13 550 1 Z
+bit 552 I ? IO12
+bit 553 C 1 *
+bit 554 O ? IO12 553 1 Z
+bit 555 I ? IO11
+bit 556 C 1 *
+bit 557 O ? IO11 556 1 Z
+bit 558 I ? IO8
+bit 559 C 1 *
+bit 560 O ? IO8 559 1 Z
+bit 561 I ? IO7
+bit 562 C 1 *
+bit 563 O ? IO7 562 1 Z
+bit 564 I ? IO6
+bit 565 C 1 *
+bit 566 O ? IO6 565 1 Z
+bit 567 I ? IO5
+bit 568 C 1 *
+bit 569 O ? IO5 568 1 Z
+bit 570 I ? IO4
+bit 571 C 1 *
+bit 572 O ? IO4 571 1 Z
+bit 573 I ? IO3
+bit 574 C 1 *
+bit 575 O ? IO3 574 1 Z
+bit 576 I ? IO2
+bit 577 C 1 *
+bit 578 O ? IO2 577 1 Z
+bit 579 I ? IO1
+bit 580 C 1 *
+bit 581 O ? IO1 580 1 Z

sie_fs/usr/local/share/urjtag/altera/ep2c8/STEPPINGS

@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 897 2007-12-29 13:02:32Z arniml $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	ep2c8		0

sie_fs/usr/local/share/urjtag/altera/ep2c8/f256

@@ -0,0 +1,226 @@
+#
+# $Id: f256 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8F256
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IOC3	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IOF4	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IOC1	BSC196
+salias	IOC2	BSC195
+salias	IOD5	BSC194
+salias	IOE5	BSC193
+salias	IOF5	BSC192
+#		BSC191	# unused pad
+salias	IOD3	BSC190
+salias	IOD4	BSC189
+salias	IOF3	BSC188
+salias	IOD2	BSC187
+salias	IOD1	BSC186
+salias	IOE3	BSC185
+salias	IOE4	BSC184
+salias	IOG4	BSC183
+salias	IOJ6	BSC182
+salias	IOH6	BSC181
+salias	IOE1	BSC180
+salias	IOE2	BSC179
+salias	DATA0	BSC178	# Family-specific input pin F1
+salias	DCLK	BSC177	# Family-specific input pin H4
+#	nCE	BSC176	# untestable Family-specific pin G5
+salias	CLK0	BSC175	# Family-specific input pin H2
+salias	CLK1	BSC174	# Family-specific input pin H1
+#	nCONFIG	BSC173	# untestable Family-specific pin J5
+salias	CLK2	BSC172	# Family-specific input pin J2
+salias	CLK3	BSC171	# Family-specific input pin J1
+salias	IOK2	BSC170
+salias	IOK1	BSC169
+salias	IOK4	BSC168
+salias	IOK5	BSC167
+#		BSC166	# unused pad
+salias	IOL1	BSC165
+salias	IOL2	BSC164
+salias	IOJ4	BSC163
+salias	IOM1	BSC162
+salias	IOM2	BSC161
+salias	IOM3	BSC160
+salias	IOL3	BSC159
+salias	ION1	BSC158
+salias	ION2	BSC157
+salias	IOP1	BSC156
+salias	IOP2	BSC155
+#		BSC154	# unused pad
+salias	ION3	BSC153
+salias	ION4	BSC152
+salias	IOP3	BSC151
+salias	IOL4	BSC150
+salias	IOM4	BSC149
+salias	IOR3	BSC148
+salias	IOT3	BSC147
+salias	IOP5	BSC146
+salias	IOP4	BSC145
+salias	IOT4	BSC144
+salias	IOR4	BSC143
+salias	IOT5	BSC142
+salias	IOR5	BSC141
+salias	ION7	BSC140
+salias	IOK7	BSC139
+salias	IOK6	BSC138
+salias	IOT6	BSC137
+salias	IOR6	BSC136
+salias	IOP6	BSC135
+salias	ION6	BSC134
+salias	ION8	BSC133
+salias	IOT7	BSC132
+salias	IOR7	BSC131
+salias	IOL7	BSC130
+salias	IOL8	BSC129
+salias	IOT8	BSC128
+salias	IOR8	BSC127
+salias	IOT9	BSC126
+salias	IOR9	BSC125
+salias	ION9	BSC124
+salias	ION10	BSC123
+salias	IOT11	BSC122
+salias	IOR11	BSC121
+salias	IOP11	BSC120
+salias	IOL9	BSC119
+salias	IOL10	BSC118
+salias	IOR10	BSC117
+salias	IOT10	BSC116
+salias	IOK11	BSC115
+salias	IOK10	BSC114
+salias	ION11	BSC113
+salias	IOP12	BSC112
+salias	IOP13	BSC111
+salias	IOT12	BSC110
+salias	IOR12	BSC109
+#		BSC108	# unused pad
+salias	IOT13	BSC107
+salias	IOR13	BSC106
+salias	IOT14	BSC105
+salias	IOR14	BSC104
+salias	IOM11	BSC103
+salias	IOL11	BSC102
+salias	ION12	BSC101
+salias	IOM12	BSC100
+salias	IOL12	BSC099
+salias	IOK13	BSC098
+salias	ION13	BSC097
+salias	ION14	BSC096
+salias	IOP15	BSC095
+salias	IOP16	BSC094
+salias	ION15	BSC093
+salias	ION16	BSC092
+salias	IOP14	BSC091
+#		BSC090	# unused pad
+#		BSC089	# unused pad
+salias	IOM14	BSC088
+salias	IOM15	BSC087
+salias	IOM16	BSC086
+#		BSC085	# unused pad
+salias	IOL14	BSC084
+salias	IOL15	BSC083
+salias	IOL16	BSC082
+#	nSTATUS	BSC081	# untestable Family-specific pin M13
+#	CONF_DONE	BSC080	# untestable Family-specific pin L13
+salias	MSEL1	BSC079	# Family-specific input pin K12
+salias	MSEL0	BSC078	# Family-specific input pin J13
+salias	IOK16	BSC077
+salias	IOK15	BSC076
+salias	CLK7	BSC075	# Family-specific input pin J16
+salias	CLK6	BSC074	# Family-specific input pin J15
+salias	CLK5	BSC073	# Family-specific input pin H15
+salias	CLK4	BSC072	# Family-specific input pin H16
+salias	IOH12	BSC071
+salias	IOJ12	BSC070
+salias	IOG16	BSC069
+salias	IOG15	BSC068
+salias	IOF15	BSC067
+salias	IOF16	BSC066
+salias	IOJ11	BSC065
+salias	IOH11	BSC064
+salias	IOG12	BSC063
+salias	IOG13	BSC062
+salias	IOE13	BSC061
+salias	IOF13	BSC060
+salias	IOH13	BSC059
+salias	IOD15	BSC058
+salias	IOD16	BSC057
+salias	IOE15	BSC056
+salias	IOE16	BSC055
+salias	IOF14	BSC054
+salias	IOC15	BSC053
+salias	IOC16	BSC052
+salias	IOC14	BSC051
+salias	IOD13	BSC050
+salias	IOE14	BSC049
+salias	IOD14	BSC048
+salias	IOB14	BSC047
+salias	IOA14	BSC046
+salias	IOC13	BSC045
+salias	IOC12	BSC044
+salias	IOB13	BSC043
+salias	IOA13	BSC042
+salias	IOB12	BSC041
+salias	IOA12	BSC040
+salias	IOC11	BSC039
+salias	IOB11	BSC038
+salias	IOA11	BSC037
+salias	IOG10	BSC036
+salias	IOG11	BSC035
+salias	IOB10	BSC034
+salias	IOA10	BSC033
+salias	IOF10	BSC032
+salias	IOF9	BSC031
+salias	IOD9	BSC030
+salias	IOD11	BSC029
+salias	IOD10	BSC028
+salias	IOA9	BSC027
+salias	IOB9	BSC026
+salias	IOA8	BSC025
+salias	IOB8	BSC024
+salias	IOA7	BSC023
+salias	IOB7	BSC022
+salias	IOF7	BSC021
+salias	IOF8	BSC020
+#		BSC019	# unused pad
+#		BSC018	# unused pad
+salias	IOD8	BSC017
+salias	IOB6	BSC016
+salias	IOA6	BSC015
+salias	IOG6	BSC014
+salias	IOG7	BSC013
+salias	IOD7	BSC012
+salias	IOD6	BSC011
+salias	IOC6	BSC010
+salias	IOC5	BSC009
+salias	IOC4	BSC008
+salias	IOB5	BSC007
+salias	IOA5	BSC006
+salias	IOB4	BSC005
+salias	IOA4	BSC004
+salias	IOA3	BSC003
+salias	IOB3	BSC002
+salias	IOE6	BSC001
+salias	IOF6	BSC000

sie_fs/usr/local/share/urjtag/altera/ep2c8/q208

@@ -0,0 +1,226 @@
+#
+# $Id: q208 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8Q208
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IO1	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IO2	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IO3	BSC196
+salias	IO4	BSC195
+salias	IO5	BSC194
+salias	IO6	BSC193
+salias	IO8	BSC192
+salias	IO10	BSC191
+salias	IO11	BSC190
+salias	IO12	BSC189
+salias	IO13	BSC188
+#		BSC187	# unused pad
+#		BSC186	# unused pad
+#		BSC185	# unused pad
+#		BSC184	# unused pad
+#		BSC183	# unused pad
+#		BSC182	# unused pad
+#		BSC181	# unused pad
+salias	IO14	BSC180
+salias	IO15	BSC179
+salias	DATA0	BSC178	# Family-specific input pin 20
+salias	DCLK	BSC177	# Family-specific input pin 21
+#	nCE	BSC176	# untestable Family-specific pin 22
+salias	CLK0	BSC175	# Family-specific input pin 23
+salias	CLK1	BSC174	# Family-specific input pin 24
+#	nCONFIG	BSC173	# untestable Family-specific pin 26
+salias	CLK2	BSC172	# Family-specific input pin 27
+salias	CLK3	BSC171	# Family-specific input pin 28
+salias	IO30	BSC170
+salias	IO31	BSC169
+#		BSC168	# unused pad
+salias	IO33	BSC167
+salias	IO34	BSC166
+salias	IO35	BSC165
+#		BSC164	# unused pad
+salias	IO37	BSC163
+#		BSC162	# unused pad
+#		BSC161	# unused pad
+#		BSC160	# unused pad
+salias	IO39	BSC159
+salias	IO40	BSC158
+salias	IO41	BSC157
+#		BSC156	# unused pad
+#		BSC155	# unused pad
+salias	IO43	BSC154
+salias	IO44	BSC153
+salias	IO45	BSC152
+salias	IO46	BSC151
+salias	IO47	BSC150
+salias	IO48	BSC149
+salias	IO56	BSC148
+salias	IO57	BSC147
+salias	IO58	BSC146
+salias	IO59	BSC145
+salias	IO60	BSC144
+salias	IO61	BSC143
+salias	IO63	BSC142
+salias	IO64	BSC141
+#		BSC140	# unused pad
+#		BSC139	# unused pad
+#		BSC138	# unused pad
+#		BSC137	# unused pad
+#		BSC136	# unused pad
+#		BSC135	# unused pad
+#		BSC134	# unused pad
+salias	IO67	BSC133
+salias	IO68	BSC132
+salias	IO69	BSC131
+#		BSC130	# unused pad
+#		BSC129	# unused pad
+salias	IO70	BSC128
+salias	IO72	BSC127
+salias	IO74	BSC126
+salias	IO75	BSC125
+salias	IO76	BSC124
+salias	IO77	BSC123
+#		BSC122	# unused pad
+#		BSC121	# unused pad
+salias	IO80	BSC120
+salias	IO81	BSC119
+salias	IO82	BSC118
+salias	IO84	BSC117
+salias	IO86	BSC116
+salias	IO87	BSC115
+salias	IO88	BSC114
+salias	IO89	BSC113
+salias	IO90	BSC112
+salias	IO92	BSC111
+salias	IO94	BSC110
+salias	IO95	BSC109
+salias	IO96	BSC108
+salias	IO97	BSC107
+salias	IO99	BSC106
+salias	IO101	BSC105
+salias	IO102	BSC104
+salias	IO103	BSC103
+salias	IO104	BSC102
+salias	IO105	BSC101
+salias	IO106	BSC100
+#		BSC099	# unused pad
+#		BSC098	# unused pad
+salias	IO107	BSC097
+salias	IO108	BSC096
+salias	IO110	BSC095
+salias	IO112	BSC094
+salias	IO113	BSC093
+salias	IO114	BSC092
+#		BSC091	# unused pad
+salias	IO115	BSC090
+salias	IO116	BSC089
+salias	IO117	BSC088
+#		BSC087	# unused pad
+#		BSC086	# unused pad
+salias	IO118	BSC085
+#		BSC084	# unused pad
+#		BSC083	# unused pad
+#		BSC082	# unused pad
+#	nSTATUS	BSC081	# untestable Family-specific pin 121
+#	CONF_DONE	BSC080	# untestable Family-specific pin 123
+salias	MSEL1	BSC079	# Family-specific input pin 125
+salias	MSEL0	BSC078	# Family-specific input pin 126
+salias	IO127	BSC077
+salias	IO128	BSC076
+salias	CLK7	BSC075	# Family-specific input pin 129
+salias	CLK6	BSC074	# Family-specific input pin 130
+salias	CLK5	BSC073	# Family-specific input pin 131
+salias	CLK4	BSC072	# Family-specific input pin 132
+salias	IO133	BSC071
+salias	IO134	BSC070
+salias	IO135	BSC069
+salias	IO137	BSC068
+salias	IO138	BSC067
+salias	IO139	BSC066
+salias	IO141	BSC065
+salias	IO142	BSC064
+#		BSC063	# unused pad
+#		BSC062	# unused pad
+salias	IO143	BSC061
+salias	IO144	BSC060
+salias	IO145	BSC059
+#		BSC058	# unused pad
+#		BSC057	# unused pad
+#		BSC056	# unused pad
+#		BSC055	# unused pad
+#		BSC054	# unused pad
+salias	IO146	BSC053
+salias	IO147	BSC052
+salias	IO149	BSC051
+salias	IO150	BSC050
+salias	IO151	BSC049
+salias	IO152	BSC048
+salias	IO160	BSC047
+salias	IO161	BSC046
+salias	IO162	BSC045
+salias	IO163	BSC044
+salias	IO164	BSC043
+salias	IO165	BSC042
+salias	IO168	BSC041
+salias	IO169	BSC040
+salias	IO170	BSC039
+salias	IO171	BSC038
+salias	IO173	BSC037
+#		BSC036	# unused pad
+#		BSC035	# unused pad
+salias	IO175	BSC034
+salias	IO176	BSC033
+#		BSC032	# unused pad
+#		BSC031	# unused pad
+#		BSC030	# unused pad
+salias	IO179	BSC029
+salias	IO180	BSC028
+salias	IO181	BSC027
+salias	IO182	BSC026
+#		BSC025	# unused pad
+#		BSC024	# unused pad
+#		BSC023	# unused pad
+salias	IO185	BSC022
+salias	IO187	BSC021
+salias	IO188	BSC020
+salias	IO189	BSC019
+salias	IO191	BSC018
+salias	IO192	BSC017
+salias	IO193	BSC016
+salias	IO195	BSC015
+#		BSC014	# unused pad
+#		BSC013	# unused pad
+#		BSC012	# unused pad
+salias	IO197	BSC011
+salias	IO198	BSC010
+#		BSC009	# unused pad
+#		BSC008	# unused pad
+salias	IO199	BSC007
+salias	IO200	BSC006
+salias	IO201	BSC005
+salias	IO203	BSC004
+salias	IO205	BSC003
+salias	IO206	BSC002
+salias	IO207	BSC001
+salias	IO208	BSC000

sie_fs/usr/local/share/urjtag/altera/ep2c8/t144

@@ -0,0 +1,226 @@
+#
+# $Id: t144 897 2007-12-29 13:02:32Z arniml $
+#
+# JTAG package script for EP2C8T144
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by H Hartley Sweeten <hsweeten@visionengravers.com>
+#
+# Note:
+#   The signals defined in this file as unused pad are specified as
+#   I/O pins in the main configuration file ep2c8.
+#
+
+salias	IO1	BSC198	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (ASDO)
+salias	IO2	BSC197	# Note: this pin is specified as I/O. If AS mode is specified by MSEL it is output only (nCSO)
+salias	IO3	BSC196
+salias	IO4	BSC195
+#		BSC194	# unused pad
+#		BSC193	# unused pad
+#		BSC192	# unused pad
+#		BSC191	# unused pad
+#		BSC190	# unused pad
+#		BSC189	# unused pad
+salias	IO7	BSC188
+#		BSC187	# unused pad
+#		BSC186	# unused pad
+#		BSC185	# unused pad
+#		BSC184	# unused pad
+#		BSC183	# unused pad
+#		BSC182	# unused pad
+#		BSC181	# unused pad
+salias	IO8	BSC180
+salias	IO9	BSC179
+salias	DATA0	BSC178	# Family-specific input pin 14
+salias	DCLK	BSC177	# Family-specific input pin 15
+#	nCE	BSC176	# untestable Family-specific pin 16
+salias	CLK0	BSC175	# Family-specific input pin 17
+salias	CLK1	BSC174	# Family-specific input pin 18
+#	nCONFIG	BSC173	# untestable Family-specific pin 20
+salias	CLK2	BSC172	# Family-specific input pin 21
+salias	CLK3	BSC171	# Family-specific input pin 22
+salias	IO24	BSC170
+salias	IO25	BSC169
+#		BSC168	# unused pad
+#		BSC167	# unused pad
+#		BSC166	# unused pad
+#		BSC165	# unused pad
+#		BSC164	# unused pad
+salias	IO28	BSC163
+#		BSC162	# unused pad
+#		BSC161	# unused pad
+#		BSC160	# unused pad
+#		BSC159	# unused pad
+#		BSC158	# unused pad
+#		BSC157	# unused pad
+#		BSC156	# unused pad
+#		BSC155	# unused pad
+#		BSC154	# unused pad
+#		BSC153	# unused pad
+#		BSC152	# unused pad
+salias	IO30	BSC151
+salias	IO31	BSC150
+salias	IO32	BSC149
+salias	IO40	BSC148
+salias	IO41	BSC147
+salias	IO42	BSC146
+salias	IO43	BSC145
+salias	IO44	BSC144
+salias	IO45	BSC143
+salias	IO47	BSC142
+salias	IO48	BSC141
+#		BSC140	# unused pad
+#		BSC139	# unused pad
+#		BSC138	# unused pad
+#		BSC137	# unused pad
+#		BSC136	# unused pad
+#		BSC135	# unused pad
+#		BSC134	# unused pad
+salias	IO51	BSC133
+salias	IO52	BSC132
+#		BSC131	# unused pad
+#		BSC130	# unused pad
+#		BSC129	# unused pad
+salias	IO53	BSC128
+salias	IO55	BSC127
+salias	IO57	BSC126
+salias	IO58	BSC125
+salias	IO59	BSC124
+salias	IO60	BSC123
+#		BSC122	# unused pad
+#		BSC121	# unused pad
+#		BSC120	# unused pad
+#		BSC119	# unused pad
+#		BSC118	# unused pad
+#		BSC117	# unused pad
+#		BSC116	# unused pad
+#		BSC115	# unused pad
+#		BSC114	# unused pad
+salias	IO63	BSC113
+#		BSC112	# unused pad
+#		BSC111	# unused pad
+salias	IO64	BSC110
+salias	IO65	BSC109
+#		BSC108	# unused pad
+#		BSC107	# unused pad
+salias	IO67	BSC106
+salias	IO69	BSC105
+salias	IO70	BSC104
+salias	IO71	BSC103
+salias	IO72	BSC102
+salias	IO73	BSC101
+salias	IO74	BSC100
+#		BSC099	# unused pad
+#		BSC098	# unused pad
+salias	IO75	BSC097
+salias	IO76	BSC096
+#		BSC095	# unused pad
+#		BSC094	# unused pad
+#		BSC093	# unused pad
+#		BSC092	# unused pad
+#		BSC091	# unused pad
+#		BSC090	# unused pad
+#		BSC089	# unused pad
+salias	IO79	BSC088
+#		BSC087	# unused pad
+#		BSC086	# unused pad
+#		BSC085	# unused pad
+#		BSC084	# unused pad
+#		BSC083	# unused pad
+#		BSC082	# unused pad
+#	nSTATUS	BSC081	# untestable Family-specific pin 82
+#	CONF_DONE	BSC080	# untestable Family-specific pin 83
+salias	MSEL1	BSC079	# Family-specific input pin 84
+salias	MSEL0	BSC078	# Family-specific input pin 85
+salias	IO86	BSC077
+salias	IO87	BSC076
+salias	CLK7	BSC075	# Family-specific input pin 88
+salias	CLK6	BSC074	# Family-specific input pin 89
+salias	CLK5	BSC073	# Family-specific input pin 90
+salias	CLK4	BSC072	# Family-specific input pin 91
+salias	IO92	BSC071
+salias	IO93	BSC070
+salias	IO94	BSC069
+salias	IO96	BSC068
+salias	IO97	BSC067
+#		BSC066	# unused pad
+#		BSC065	# unused pad
+#		BSC064	# unused pad
+#		BSC063	# unused pad
+#		BSC062	# unused pad
+#		BSC061	# unused pad
+#		BSC060	# unused pad
+salias	IO99	BSC059
+#		BSC058	# unused pad
+#		BSC057	# unused pad
+#		BSC056	# unused pad
+#		BSC055	# unused pad
+#		BSC054	# unused pad
+salias	IO100	BSC053
+salias	IO101	BSC052
+#		BSC051	# unused pad
+#		BSC050	# unused pad
+salias	IO103	BSC049
+salias	IO104	BSC048
+salias	IO112	BSC047
+salias	IO113	BSC046
+salias	IO114	BSC045
+salias	IO115	BSC044
+#		BSC043	# unused pad
+#		BSC042	# unused pad
+salias	IO118	BSC041
+salias	IO119	BSC040
+salias	IO120	BSC039
+salias	IO121	BSC038
+salias	IO122	BSC037
+#		BSC036	# unused pad
+#		BSC035	# unused pad
+#		BSC034	# unused pad
+#		BSC033	# unused pad
+#		BSC032	# unused pad
+#		BSC031	# unused pad
+#		BSC030	# unused pad
+salias	IO125	BSC029
+salias	IO126	BSC028
+#		BSC027	# unused pad
+#		BSC026	# unused pad
+#		BSC025	# unused pad
+#		BSC024	# unused pad
+#		BSC023	# unused pad
+salias	IO129	BSC022
+#		BSC021	# unused pad
+#		BSC020	# unused pad
+#		BSC019	# unused pad
+#		BSC018	# unused pad
+salias	IO132	BSC017
+salias	IO133	BSC016
+salias	IO134	BSC015
+#		BSC014	# unused pad
+#		BSC013	# unused pad
+#		BSC012	# unused pad
+#		BSC011	# unused pad
+#		BSC010	# unused pad
+#		BSC009	# unused pad
+#		BSC008	# unused pad
+salias	IO135	BSC007
+salias	IO136	BSC006
+salias	IO137	BSC005
+salias	IO139	BSC004
+salias	IO141	BSC003
+salias	IO142	BSC002
+salias	IO143	BSC001
+salias	IO144	BSC000

sie_fs/usr/local/share/urjtag/altera/epm3064a/STEPPINGS

@@ -0,0 +1,23 @@
+#
+# $Id$
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0001	epm3064a		1

sie_fs/usr/local/share/urjtag/altera/epm3064a/epm3064a

@@ -0,0 +1,297 @@
+#
+# $Id$
+#
+# JTAG declarations for EPM3064A
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+# Note:
+#   The signals defined in this file are generic for any EPM3064A.
+#   Signalnames according to Altera's package tables are set in the
+#   package specific scripts.
+#
+
+register	BYPASS		1
+register	BSR		192
+register	DEVICE_ID	32
+register	USERCODE	32
+
+instruction length 10
+instruction	BYPASS		1111111111	BYPASS
+instruction	IDCODE		0001011001	DEVICE_ID
+instruction	USERCODE	0000000111	USERCODE
+instruction	SAMPLE/PRELOAD	0001010101	BSR
+instruction	EXTEST		0000000000	BSR
+
+signal	BSC0
+signal	BSC1
+signal	BSC10
+signal	BSC11
+signal	BSC12
+signal	BSC13
+signal	BSC14
+signal	BSC15
+signal	BSC16
+signal	BSC17
+signal	BSC18
+signal	BSC19
+signal	BSC2
+signal	BSC20
+signal	BSC21
+signal	BSC22
+signal	BSC23
+signal	BSC24
+signal	BSC25
+signal	BSC26
+signal	BSC27
+signal	BSC28
+signal	BSC29
+signal	BSC3
+signal	BSC30
+signal	BSC31
+signal	BSC32
+signal	BSC33
+signal	BSC34
+signal	BSC35
+signal	BSC36
+signal	BSC37
+signal	BSC38
+signal	BSC39
+signal	BSC4
+signal	BSC40
+signal	BSC41
+signal	BSC42
+signal	BSC43
+signal	BSC44
+signal	BSC45
+signal	BSC46
+signal	BSC47
+signal	BSC48
+signal	BSC49
+signal	BSC5
+signal	BSC50
+signal	BSC51
+signal	BSC52
+signal	BSC53
+signal	BSC54
+signal	BSC55
+signal	BSC56
+signal	BSC57
+signal	BSC58
+signal	BSC59
+signal	BSC6
+signal	BSC60
+signal	BSC61
+signal	BSC62
+signal	BSC63
+signal	BSC7
+signal	BSC8
+signal	BSC9
+
+bit  0 I ? BSC0
+bit  1 X ? *
+bit  2 X ? *
+bit  3 I ? BSC1
+bit  4 X ? *
+bit  5 X ? *
+bit  6 I ? BSC2
+bit  7 C 0 *
+bit  8 O ? BSC2 7 0 Z
+bit  9 I ? BSC3
+bit 10 C 0 *
+bit 11 O ? BSC3 10 0 Z
+bit 12 I ? BSC4
+bit 13 C 0 *
+bit 14 O ? BSC4 13 0 Z
+bit 15 I ? BSC5
+bit 16 C 0 *
+bit 17 O ? BSC5 16 0 Z
+bit 18 I ? BSC6
+bit 19 C 0 *
+bit 20 O ? BSC6 19 0 Z
+bit 21 I ? BSC7
+bit 22 C 0 *
+bit 23 O ? BSC7 22 0 Z
+bit 24 I ? BSC8
+bit 25 C 0 *
+bit 26 O ? BSC8 25 0 Z
+bit 27 I ? BSC9
+bit 28 C 0 *
+bit 29 O ? BSC9 28 0 Z
+bit 30 I ? BSC10
+bit 31 C 0 *
+bit 32 O ? BSC10 31 0 Z
+bit 33 I ? BSC11
+bit 34 C 0 *
+bit 35 O ? BSC11 34 0 Z
+bit 36 I ? BSC12
+bit 37 C 0 *
+bit 38 O ? BSC12 37 0 Z
+bit 39 I ? BSC13
+bit 40 C 0 *
+bit 41 O ? BSC13 40 0 Z
+bit 42 I ? BSC14
+bit 43 C 0 *
+bit 44 O ? BSC14 43 0 Z
+bit 45 I ? BSC15
+bit 46 C 0 *
+bit 47 O ? BSC15 46 0 Z
+bit 48 I ? BSC16
+bit 49 C 0 *
+bit 50 O ? BSC16 49 0 Z
+bit 51 I ? BSC17
+bit 52 C 0 *
+bit 53 O ? BSC17 52 0 Z
+bit 54 I ? BSC18
+bit 55 C 0 *
+bit 56 O ? BSC18 55 0 Z
+bit 57 I ? BSC19
+bit 58 C 0 *
+bit 59 O ? BSC19 58 0 Z
+bit 60 I ? BSC20
+bit 61 C 0 *
+bit 62 O ? BSC20 61 0 Z
+bit 63 I ? BSC21
+bit 64 C 0 *
+bit 65 O ? BSC21 64 0 Z
+bit 66 I ? BSC22
+bit 67 C 0 *
+bit 68 O ? BSC22 67 0 Z
+bit 69 I ? BSC23
+bit 70 C 0 *
+bit 71 O ? BSC23 70 0 Z
+bit 72 I ? BSC24
+bit 73 C 0 *
+bit 74 O ? BSC24 73 0 Z
+bit 75 I ? BSC25
+bit 76 C 0 *
+bit 77 O ? BSC25 76 0 Z
+bit 78 I ? BSC26
+bit 79 C 0 *
+bit 80 O ? BSC26 79 0 Z
+bit 81 I ? BSC27
+bit 82 C 0 *
+bit 83 O ? BSC27 82 0 Z
+bit 84 I ? BSC28
+bit 85 C 0 *
+bit 86 O ? BSC28 85 0 Z
+bit 87 I ? BSC29
+bit 88 C 0 *
+bit 89 O ? BSC29 88 0 Z
+bit 90 I ? BSC30
+bit 91 C 0 *
+bit 92 O ? BSC30 91 0 Z
+bit 93 I ? BSC31
+bit 94 C 0 *
+bit 95 O ? BSC31 94 0 Z
+bit 96 I ? BSC32
+bit 97 C 0 *
+bit 98 O ? BSC32 97 0 Z
+bit 99 I ? BSC33
+bit 100 C 0 *
+bit 101 O ? BSC33 100 0 Z
+bit 102 I ? BSC34
+bit 103 C 0 *
+bit 104 O ? BSC34 103 0 Z
+bit 105 I ? BSC35
+bit 106 C 0 *
+bit 107 O ? BSC35 106 0 Z
+bit 108 I ? BSC36
+bit 109 C 0 *
+bit 110 O ? BSC36 109 0 Z
+bit 111 I ? BSC37
+bit 112 C 0 *
+bit 113 O ? BSC37 112 0 Z
+bit 114 I ? BSC38
+bit 115 C 0 *
+bit 116 O ? BSC38 115 0 Z
+bit 117 I ? BSC39
+bit 118 C 0 *
+bit 119 O ? BSC39 118 0 Z
+bit 120 I ? BSC40
+bit 121 C 0 *
+bit 122 O ? BSC40 121 0 Z
+bit 123 I ? BSC41
+bit 124 C 0 *
+bit 125 O ? BSC41 124 0 Z
+bit 126 I ? BSC42
+bit 127 C 0 *
+bit 128 O ? BSC42 127 0 Z
+bit 129 I ? BSC43
+bit 130 C 0 *
+bit 131 O ? BSC43 130 0 Z
+bit 132 I ? BSC44
+bit 133 C 0 *
+bit 134 O ? BSC44 133 0 Z
+bit 135 I ? BSC45
+bit 136 C 0 *
+bit 137 O ? BSC45 136 0 Z
+bit 138 I ? BSC46
+bit 139 C 0 *
+bit 140 O ? BSC46 139 0 Z
+bit 141 I ? BSC47
+bit 142 C 0 *
+bit 143 O ? BSC47 142 0 Z
+bit 144 I ? BSC48
+bit 145 C 0 *
+bit 146 O ? BSC48 145 0 Z
+bit 147 I ? BSC49
+bit 148 C 0 *
+bit 149 O ? BSC49 148 0 Z
+bit 150 I ? BSC50
+bit 151 C 0 *
+bit 152 O ? BSC50 151 0 Z
+bit 153 I ? BSC51
+bit 154 C 0 *
+bit 155 O ? BSC51 154 0 Z
+bit 156 I ? BSC52
+bit 157 C 0 *
+bit 158 O ? BCS52 157 0 Z
+bit 159 I ? BSC53
+bit 160 C 0 *
+bit 161 O ? BSC53 160 0 Z
+bit 162 I ? BSC54
+bit 163 C 0 *
+bit 164 O ? BSC54 163 0 Z
+bit 165 I ? BSC55
+bit 166 C 0 *
+bit 167 O ? BSC55 166 0 Z
+bit 168 I ? BSC56
+bit 169 C 0 *
+bit 170 O ? BSC56 169 0 Z
+bit 171 I ? BSC57
+bit 172 C 0 *
+bit 173 O ? BSC57 172 0 Z
+bit 174 I ? BSC58
+bit 175 C 0 *
+bit 176 O ? BSC58 175 0 Z
+bit 177 I ? BSC59
+bit 178 C 0 *
+bit 179 O ? BSC59 178 0 Z
+bit 180 I ? BSC60
+bit 181 C 0 *
+bit 182 O ? BSC60 181 0 Z
+bit 183 I ? BSC61
+bit 184 C 0 *
+bit 185 O ? BSC61 184 0 Z
+bit 186 I ? BSC62
+bit 187 X ? *
+bit 188 X ? *
+bit 189 I ? BSC63
+bit 190 X ? *
+bit 191 X ? *

sie_fs/usr/local/share/urjtag/altera/epm3064a/l44

@@ -0,0 +1,53 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AL44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN44	BSC0
+salias	IN43	BSC1
+salias	IO41	BSC2
+salias	IO40	BSC4
+salias	IO39	BSC9
+salias	IO37	BSC12
+salias	IO34	BSC14
+salias	IO33	BSC16
+salias	IO31	BSC18
+salias	IO29	BSC23
+salias	IO28	BSC24
+salias	IO27	BSC27
+salias	IO26	BSC28
+salias	IO25	BSC29
+salias	IO24	BSC31
+salias	IO21	BSC32
+salias	IO20	BSC34
+salias	IO19	BSC35
+salias	IO18	BSC36
+salias	IO16	BSC40
+salias	IO14	BSC45
+salias	IO12	BSC47
+salias	IO11	BSC49
+salias	IO9	BSC50
+salias	IO8	BSC51
+salias	IO6	BSC56
+salias	IO5	BSC59
+salias	IO4	BSC61
+salias	IN2	BSC62
+salias	IN1	BSC63

sie_fs/usr/local/share/urjtag/altera/epm3064a/t100

@@ -0,0 +1,85 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT100
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN88	BSC0
+salias	IN87	BSC1
+salias	IO85	BSC2
+salias	IO84	BSC3
+salias	IO83	BSC4
+salias	IO81	BSC5
+salias	IO80	BSC6
+salias	IO79	BSC7
+salias	IO76	BSC8
+salias	IO75	BSC9
+salias	IO71	BSC10
+salias	IO69	BSC11
+salias	IO68	BSC12
+salias	IO67	BSC13
+salias	IO64	BSC15
+salias	IO63	BSC16
+salias	IO61	BSC17
+salias	IO60	BSC18
+salias	IO58	BSC19
+salias	IO57	BSC20
+salias	IO56	BSC21
+salias	IO54	BSC22
+salias	IO52	BSC23
+salias	IO48	BSC24
+salias	IO47	BSC25
+salias	IO46	BSC26
+salias	IO45	BSC27
+salias	IO44	BSC28
+salias	IO42	BSC29
+salias	IO41	BSC30
+salias	IO40	BSC31
+salias	IO37	BSC32
+salias	IO36	BSC33
+salias	IO35	BSC34
+salias	IO32	BSC36
+salias	IO31	BSC37
+salias	IO30	BSC38
+salias	IO29	BSC39
+salias	IO25	BSC40
+salias	IO23	BSC41
+salias	IO21	BSC42
+salias	IO20	BSC43
+salias	IO19	BSC44
+salias	IO17	BSC45
+salias	IO16	BSC46
+salias	IO14	BSC47
+salias	IO13	BSC48
+salias	IO12	BSC49
+salias	IO10	BSC50
+salias	IO9	BSC51
+salias	IO8	BSC52
+salias	IO6	BSC53
+salias	IO100	BSC54
+salias	IO99	BSC55
+salias	IO98	BSC56
+salias	IO97	BSC57
+salias	IO96	BSC58
+salias	IO94	BSC59
+salias	IO93	BSC60
+salias	IO92	BSC61
+salias	IN90	BSC62
+salias	IN89	BSC63

sie_fs/usr/local/share/urjtag/altera/epm3064a/t44

@@ -0,0 +1,53 @@
+#
+# $Id$
+#
+# JTAG package script for EPM3064AT44
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Arnim Laeuger <arniml@users.sourceforge.net>
+#
+
+salias	IN38	BSC0
+salias	IN37	BSC1
+salias	IO35	BSC2
+salias	IO34	BSC4
+salias	IO33	BSC9
+salias	IO31	BSC12
+salias	IO28	BSC14
+salias	IO27	BSC16
+salias	IO25	BSC18
+salias	IO23	BSC23
+salias	IO22	BSC24
+salias	IO21	BSC27
+salias	IO20	BSC28
+salias	IO19	BSC29
+salias	IO18	BSC31
+salias	IO15	BSC32
+salias	IO14	BSC34
+salias	IO13	BSC35
+salias	IO12	BSC36
+salias	IO10	BSC40
+salias	IO8	BSC45
+salias	IO6	BSC47
+salias	IO5	BSC49
+salias	IO3	BSC50
+salias	IO2	BSC51
+salias	IO44	BSC56
+salias	IO43	BSC59
+salias	IO42	BSC61
+salias	IN40	BSC62
+salias	IN39	BSC63

sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/STEPPINGS

@@ -0,0 +1,23 @@
+#
+# $Id: STEPPINGS 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+# bits 31-28 of the Device Identification Register
+0001	epm7128aetc100		1

sie_fs/usr/local/share/urjtag/altera/epm7128aetc100/epm7128aetc100

@@ -0,0 +1,414 @@
+#
+# $Id: epm7128aetc100 541 2003-08-22 11:16:02Z telka $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Rojhalat Ibrahim <ibrahim@schenk.isar.de>
+#
+
+signal tdi
+signal tck
+signal tms
+signal tdo
+signal IO1
+signal IO2
+signal IO5
+signal IO6
+signal IO7
+signal IO8
+signal IO9
+signal IO10
+signal IO12
+signal IO13
+signal IO14
+signal IO16
+signal IO17
+signal IO19
+signal IO20
+signal IO21
+signal IO22
+signal IO23
+signal IO24
+signal IO25
+signal IO27
+signal IO28
+signal IO29
+signal IO30
+signal IO31
+signal IO32
+signal IO33
+signal IO35
+signal IO36
+signal IO37
+signal IO40
+signal IO41
+signal IO42
+signal IO44
+signal IO45
+signal IO46
+signal IO47
+signal IO48
+signal IO49
+signal IO50
+signal IO52
+signal IO53
+signal IO54
+signal IO55
+signal IO56
+signal IO57
+signal IO58
+signal IO60
+signal IO61
+signal IO63
+signal IO64
+signal IO65
+signal IO67
+signal IO68
+signal IO69
+signal IO70
+signal IO71
+signal IO72
+signal IO75
+signal IO76
+signal IO77
+signal IO78
+signal IO79
+signal IO80
+signal IO81
+signal IO83
+signal IO84
+signal IO85
+signal IN87
+signal IN88
+signal IN89
+signal IN90
+signal IO92
+signal IO93
+signal IO94
+signal IO96
+signal IO97
+signal IO98
+signal IO99
+signal IO100
+
+
+# mandatory data registers
+register	BSR	288
+register	BR	1
+
+# optional data registers
+register	DIR	32
+
+# instructions
+instruction length 10
+
+# mandatory instructions
+instruction EXTEST		0000000000	BSR
+instruction SAMPLE/PRELOAD	0001010101	BSR
+instruction BYPASS		1111111111	BR
+instruction IDCODE		0001011001	DIR
+instruction USERCODE		0000000111	DIR
+
+
+bit 287 O 1 *
+bit 286 O 1 *
+bit 285 I 1 IN89
+bit 284 O 1 *
+bit 283 O 1 *
+bit 282 I 1 IN90
+bit 281 O 1 IO92 280 0 Z
+bit 280 C 0 *
+bit 279 I 1 IO92
+bit 278 O 1 IO93 277 0 Z
+bit 277 C 0 *
+bit 276 I 1 IO93
+bit 275 O 1 IO94 274 0 Z
+bit 274 C 0 *
+bit 273 I 1 IO94
+bit 272 O 1 *
+bit 271 O 0 *
+bit 270 O 1 *
+bit 269 O 1 IO96 268 0 Z
+bit 268 C 0 *
+bit 267 I 1 IO96
+bit 266 O 1 IO97 265 0 Z
+bit 265 C 0 *
+bit 264 I 1 IO97
+bit 263 O 1 IO98 262 0 Z
+bit 262 C 0 *
+bit 261 I 1 IO98
+bit 260 O 1 IO99 259 0 Z
+bit 259 C 0 *
+bit 258 I 1 IO99
+bit 257 O 1 IO100 256 0 Z
+bit 256 C 0 *
+bit 255 I 1 IO100
+bit 254 O 1 *
+bit 253 O 0 *
+bit 252 O 1 *
+bit 251 O 1 IO1 250 0 Z
+bit 250 C 0 *
+bit 249 I 1 IO1
+bit 248 O 1 IO2 247 0 Z
+bit 247 C 0 *
+bit 246 I 1 IO2
+bit 245 O 1 IO5 244 0 Z
+bit 244 C 0 *
+bit 243 I 1 IO5
+bit 242 O 1 IO6 241 0 Z
+bit 241 C 0 *
+bit 240 I 1 IO6
+bit 239 O 1 *
+bit 238 O 0 *
+bit 237 O 1 *
+bit 236 O 1 IO7 235 0 Z
+bit 235 C 0 *
+bit 234 I 1 IO7
+bit 233 O 1 IO8 232 0 Z
+bit 232 C 0 *
+bit 231 I 1 IO8
+bit 230 O 1 IO9 229 0 Z
+bit 229 C 0 *
+bit 228 I 1 IO9
+bit 227 O 1 IO10 226 0 Z
+bit 226 C 0 *
+bit 225 I 1 IO10
+bit 224 O 1 IO12 223 0 Z
+bit 223 C 0 *
+bit 222 I 1 IO12
+bit 221 O 1 *
+bit 220 O 0 *
+bit 219 O 1 *
+bit 218 O 1 IO13 217 0 Z
+bit 217 C 0 *
+bit 216 I 1 IO13
+bit 215 O 1 IO14 214 0 Z
+bit 214 C 0 *
+bit 213 I 1 IO14
+bit 212 O 1 IO16 211 0 Z
+bit 211 C 0 *
+bit 210 I 1 IO16
+bit 209 O 1 IO17 208 0 Z
+bit 208 C 0 *
+bit 207 I 1 IO17
+bit 206 O 1 *
+bit 205 O 0 *
+bit 204 O 1 *
+bit 203 O 1 IO19 202 0 Z
+bit 202 C 0 *
+bit 201 I 1 IO19
+bit 200 O 1 IO20 199 0 Z
+bit 199 C 0 *
+bit 198 I 1 IO20
+bit 197 O 1 IO21 196 0 Z
+bit 196 C 0 *
+bit 195 I 1 IO21
+bit 194 O 1 IO22 193 0 Z
+bit 193 C 0 *
+bit 192 I 1 IO22
+bit 191 O 1 IO23 190 0 Z
+bit 190 C 0 *
+bit 189 I 1 IO23
+bit 188 O 1 *
+bit 187 O 0 *
+bit 186 O 1 *
+bit 185 O 1 IO24 184 0 Z
+bit 184 C 0 *
+bit 183 I 1 IO24
+bit 182 O 1 IO25 181 0 Z
+bit 181 C 0 *
+bit 180 I 1 IO25
+bit 179 O 1 IO27 178 0 Z
+bit 178 C 0 *
+bit 177 I 1 IO27
+bit 176 O 1 IO28 175 0 Z
+bit 175 C 0 *
+bit 174 I 1 IO28
+bit 173 O 1 IO29 172 0 Z
+bit 172 C 0 *
+bit 171 I 1 IO29
+bit 170 O 1 *
+bit 169 O 0 *
+bit 168 O 1 *
+bit 167 O 1 IO30 166 0 Z
+bit 166 C 0 *
+bit 165 I 1 IO30
+bit 164 O 1 IO31 163 0 Z
+bit 163 C 0 *
+bit 162 I 1 IO31
+bit 161 O 1 IO32 160 0 Z
+bit 160 C 0 *
+bit 159 I 1 IO32
+bit 158 O 1 IO33 157 0 Z
+bit 157 C 0 *
+bit 156 I 1 IO33
+bit 155 O 1 IO35 154 0 Z
+bit 154 C 0 *
+bit 153 I 1 IO35
+bit 152 O 1 *
+bit 151 O 0 *
+bit 150 O 1 *
+bit 149 O 1 IO36 148 0 Z
+bit 148 C 0 *
+bit 147 I 1 IO36
+bit 146 O 1 IO37 145 0 Z
+bit 145 C 0 *
+bit 144 I 1 IO37
+bit 143 O 1 IO40 142 0 Z
+bit 142 C 0 *
+bit 141 I 1 IO40
+bit 140 O 1 IO41 139 0 Z
+bit 139 C 0 *
+bit 138 I 1 IO41
+bit 137 O 1 *
+bit 136 O 0 *
+bit 135 O 1 *
+bit 134 O 1 IO42 133 0 Z
+bit 133 C 0 *
+bit 132 I 1 IO42
+bit 131 O 1 IO44 130 0 Z
+bit 130 C 0 *
+bit 129 I 1 IO44
+bit 128 O 1 IO45 127 0 Z
+bit 127 C 0 *
+bit 126 I 1 IO45
+bit 125 O 1 IO46 124 0 Z
+bit 124 C 0 *
+bit 123 I 1 IO46
+bit 122 O 1 IO47 121 0 Z
+bit 121 C 0 *
+bit 120 I 1 IO47
+bit 119 O 1 *
+bit 118 O 0 *
+bit 117 O 1 *
+bit 116 O 1 IO48 115 0 Z
+bit 115 C 0 *
+bit 114 I 1 IO48
+bit 113 O 1 IO49 112 0 Z
+bit 112 C 0 *
+bit 111 I 1 IO49
+bit 110 O 1 IO50 109 0 Z
+bit 109 C 0 *
+bit 108 I 1 IO50
+bit 107 O 1 IO52 106 0 Z
+bit 106 C 0 *
+bit 105 I 1 IO52
+bit 104 O 1 IO53 103 0 Z
+bit 103 C 0 *
+bit 102 I 1 IO53
+bit 101 O 1 *
+bit 100 O 0 *
+bit 99 O 1 *
+bit 98 O 1 IO54 97 0 Z
+bit 97 C 0 *
+bit 96 I 1 IO54
+bit 95 O 1 IO55 94 0 Z
+bit 94 C 0 *
+bit 93 I 1 IO55
+bit 92 O 1 IO56 91 0 Z
+bit 91 C 0 *
+bit 90 I 1 IO56
+bit 89 O 1 IO57 88 0 Z
+bit 88 C 0 *
+bit 87 I 1 IO57
+bit 86 O 1 IO58 85 0 Z
+bit 85 C 0 *
+bit 84 I 1 IO58
+bit 83 O 1 *
+bit 82 O 0 *
+bit 81 O 1 *
+bit 80 O 1 IO60 79 0 Z
+bit 79 C 0 *
+bit 78 I 1 IO60
+bit 77 O 1 IO61 76 0 Z
+bit 76 C 0 *
+bit 75 I 1 IO61
+bit 74 O 1 IO63 73 0 Z
+bit 73 C 0 *
+bit 72 I 1 IO63
+bit 71 O 1 IO64 70 0 Z
+bit 70 C 0 *
+bit 69 I 1 IO64
+bit 68 O 1 *
+bit 67 O 0 *
+bit 66 O 1 *
+bit 65 O 1 IO65 64 0 Z
+bit 64 C 0 *
+bit 63 I 1 IO65
+bit 62 O 1 IO67 61 0 Z
+bit 61 C 0 *
+bit 60 I 1 IO67
+bit 59 O 1 IO68 58 0 Z
+bit 58 C 0 *
+bit 57 I 1 IO68
+bit 56 O 1 IO69 55 0 Z
+bit 55 C 0 *
+bit 54 I 1 IO69
+bit 53 O 1 IO70 52 0 Z
+bit 52 C 0 *
+bit 51 I 1 IO70
+bit 50 O 1 *
+bit 49 O 0 *
+bit 48 O 1 *
+bit 47 O 1 IO71 46 0 Z
+bit 46 C 0 *
+bit 45 I 1 IO71
+bit 44 O 1 IO72 43 0 Z
+bit 43 C 0 *
+bit 42 I 1 IO72
+bit 41 O 1 IO75 40 0 Z
+bit 40 C 0 *
+bit 39 I 1 IO75
+bit 38 O 1 IO76 37 0 Z
+bit 37 C 0 *
+bit 36 I 1 IO76
+bit 35 O 1 *
+bit 34 O 0 *
+bit 33 O 1 *
+bit 32 O 1 IO77 31 0 Z
+bit 31 C 0 *
+bit 30 I 1 IO77
+bit 29 O 1 IO78 28 0 Z
+bit 28 C 0 *
+bit 27 I 1 IO78
+bit 26 O 1 IO79 25 0 Z
+bit 25 C 0 *
+bit 24 I 1 IO79
+bit 23 O 1 IO80 22 0 Z
+bit 22 C 0 *
+bit 21 I 1 IO80
+bit 20 O 1 IO81 19 0 Z
+bit 19 C 0 *
+bit 18 I 1 IO81
+bit 17 O 1 *
+bit 16 O 0 *
+bit 15 O 1 *
+bit 14 O 1 IO83 13 0 Z
+bit 13 C 0 *
+bit 12 I 1 IO83
+bit 11 O 1 IO84 10 0 Z
+bit 10 C 0 *
+bit 9 I 1 IO84
+bit 8 O 1 IO85 7 0 Z
+bit 7 C 0 *
+bit 6 I 1 IO85
+bit 5 O 1 *
+bit 4 O 1 *
+bit 3 I 1 IN87
+bit 2 O 1 *
+bit 1 O 1 *
+bit 0 I 1 IN88
+

sie_fs/usr/local/share/urjtag/analog/PARTS

@@ -0,0 +1,30 @@
+#
+# $Id: PARTS,v 1.1.1.1 2005/03/18 15:02:50 klingler Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 27-12 of the Device Identification Register
+0010011110100111	sharc21065l		SHARC
+0010011111100100	bf527			BF526
+0010011111100000	bf527			BF527
+0010011110100101	bf533			BF533
+0010011111001000	bf537			BF537
+0010011111000100	bf538			BF538
+0010011111011110	bf549			BF549
+0010011110111011	bf561			BF561

sie_fs/usr/local/share/urjtag/analog/bf527/STEPPINGS

@@ -0,0 +1,22 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf527		0

sie_fs/usr/local/share/urjtag/analog/bf527/bf527

@@ -0,0 +1,543 @@
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BMODE3
+signal PJ1
+signal PJ0
+signal PJ2
+signal PJ3
+signal NMI_B
+signal RESET_B
+signal CLKOUT
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARE_B
+signal AWE_B
+signal ARDY
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SCAS_B
+signal SWE_B
+signal SA10
+signal ABE_B0
+signal ABE_B1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal VDDOTP
+signal OTPVPP
+signal USB_ID
+signal USB_RSET
+signal VDDUSB0
+signal VDDUSB1
+signal USB_VREF
+signal USB_XTALIN
+signal USB_XTALOUT
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal RTXI
+signal RTXO
+signal SSPG
+signal CLKIN
+signal VROUT
+signal EXT_WAKE
+signal USB_DM
+signal USB_DP
+signal USB_VBUS
+signal CLKBUF
+signal VDDRTC
+signal VDDMEM0
+signal VDDMEM1
+signal VDDMEM2
+signal VDDMEM3
+signal VDDMEM4
+signal VDDMEM5
+signal VDDMEM6
+signal VDDMEM7
+signal VDDMEM8
+signal VDDMEM9
+signal VDDMEM10
+signal VDDMEM11
+signal VDDMEM12
+signal VDDMEM13
+signal VDDMEM14
+signal VDDMEM15
+signal VDDMEM16
+signal VDDMEM17
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDINT12
+signal VDDINT13
+signal VDDINT14
+signal VDDINT15
+signal VDDINT16
+signal VDDINT17
+signal VDDINT18
+signal VDDINT19
+signal VDDINT20
+signal VDDINT21
+signal VDDINT22
+signal VDDINT23
+signal VDDINT24
+signal VDDINT25
+signal VDDINT26
+signal VDDINT27
+signal VDDINT28
+signal VDDINT29
+signal VDDINT30
+signal VDDINT31
+signal VDDINT32
+signal VRSEL
+signal XTAL
+signal ADCLRC
+signal ADCDAT
+signal DACLRC
+signal DACDAT
+signal BCLK
+signal XTO
+signal XTI_MCLK
+signal LHPOUT
+signal RHPOUT
+signal CSCL
+signal CSDA
+signal CCLKOUT
+signal CSB
+signal CMODE
+signal LLINEIN
+signal LOUT
+signal RLINEIN
+signal ROUT
+signal VMID
+signal MICBIAS
+signal MICIN
+signal AVDD0
+signal AVDD1
+signal AGND0
+signal AGND1
+
+register	BSR	233
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 232 C 0 *
+bit 231 O 1 ADDR14 8 0 Z
+bit 230 O 1 ADDR15 8 0 Z
+bit 229 O 1 ADDR16 8 0 Z
+bit 228 O 1 ADDR17 8 0 Z
+bit 227 O 1 ADDR18 8 0 Z
+bit 226 O 1 ADDR19 8 0 Z
+bit 225 O 1 DATA0 232 0 Z
+bit 224 I 1 DATA0
+bit 223 O 1 DATA1 232 0 Z
+bit 222 I 1 DATA1
+bit 221 O 1 DATA2 232 0 Z
+bit 220 I 1 DATA2
+bit 219 O 1 DATA3 232 0 Z
+bit 218 I 1 DATA3
+bit 217 O 1 DATA4 232 0 Z
+bit 216 I 1 DATA4
+bit 215 O 1 DATA5 232 0 Z
+bit 214 I 1 DATA5
+bit 213 O 1 DATA6 232 0 Z
+bit 212 I 1 DATA6
+bit 211 O 1 DATA7 232 0 Z
+bit 210 I 1 DATA7
+bit 209 O 1 DATA8 232 0 Z
+bit 208 I 1 DATA8
+bit 207 O 1 DATA9 232 0 Z
+bit 206 I 1 DATA9
+bit 205 O 1 DATA10 232 0 Z
+bit 204 I 1 DATA10
+bit 203 O 1 DATA11 232 0 Z
+bit 202 I 1 DATA11
+bit 201 O 1 DATA12 232 0 Z
+bit 200 I 1 DATA12
+bit 199 O 1 DATA13 232 0 Z
+bit 198 I 1 DATA13
+bit 197 O 1 DATA14 232 0 Z
+bit 196 I 1 DATA14
+bit 195 O 1 DATA15 232 0 Z
+bit 194 I 1 DATA15
+bit 193 C 0 *
+bit 192 O 1 PG0 193 0 Z
+bit 191 I 1 PG0
+bit 190 C 0 *
+bit 189 O 1 PG1 190 0 Z
+bit 188 I 1 PG1
+bit 187 C 0 *
+bit 186 O 1 PG2 187 0 Z
+bit 185 I 1 PG2
+bit 184 C 0 *
+bit 183 O 1 PG3 184 0 Z
+bit 182 I 1 PG3
+bit 181 I 1 BMODE0
+bit 180 I 1 BMODE1
+bit 179 I 1 BMODE2
+bit 178 I 1 BMODE3
+bit 177 C 0 *
+bit 176 O 1 PG4 177 0 Z
+bit 175 I 1 PG4
+bit 174 C 0 *
+bit 173 O 1 PG5 174 0 Z
+bit 172 I 1 PG5
+bit 171 C 0 *
+bit 170 O 1 PG6 171 0 Z
+bit 169 I 1 PG6
+bit 168 C 0 *
+bit 167 O 1 PG7 168 0 Z
+bit 166 I 1 PG7
+bit 165 C 0 *
+bit 164 O 1 PG8 165 0 Z
+bit 163 I 1 PG8
+bit 162 C 0 *
+bit 161 O 1 PG9 162 0 Z
+bit 160 I 1 PG9
+bit 159 C 0 *
+bit 158 O 1 PG10 159 0 Z
+bit 157 I 1 PG10
+bit 156 C 0 *
+bit 155 O 1 PG11 156 0 Z
+bit 154 I 1 PG11
+bit 153 C 0 *
+bit 152 O 1 PG12 153 0 Z
+bit 151 I 1 PG12
+bit 150 C 0 *
+bit 149 O 1 PG13 150 0 Z
+bit 148 I 1 PG13
+bit 147 C 0 *
+bit 146 O 1 PG14 147 0 Z
+bit 145 I 1 PG14
+bit 144 C 0 *
+bit 143 O 1 PG15 144 0 Z
+bit 142 I 1 PG15
+bit 141 I 1 PJ1
+bit 140 C 0 *
+bit 139 O 1 PJ0 140 0 Z
+bit 138 I 1 PJ0
+bit 137 C 0 *
+bit 136 O 1 PF0 137 0 Z
+bit 135 I 1 PF0
+bit 134 C 0 *
+bit 133 O 1 PF1 134 0 Z
+bit 132 I 1 PF1
+bit 131 C 0 *
+bit 130 O 1 PF2 131 0 Z
+bit 129 I 1 PF2
+bit 128 C 0 *
+bit 127 O 1 PF3 128 0 Z
+bit 126 I 1 PF3
+bit 125 C 0 *
+bit 124 O 1 PF4 125 0 Z
+bit 123 I 1 PF4
+bit 122 C 0 *
+bit 121 O 1 PF5 122 0 Z
+bit 120 I 1 PF5
+bit 119 C 0 *
+bit 118 O 1 PF6 119 0 Z
+bit 117 I 1 PF6
+bit 116 C 0 *
+bit 115 O 1 PF7 116 0 Z
+bit 114 I 1 PF7
+bit 113 C 0 *
+bit 112 O 1 PF8 113 0 Z
+bit 111 I 1 PF8
+bit 110 C 0 *
+bit 109 O 1 PF9 110 0 Z
+bit 108 I 1 PF9
+bit 107 C 0 *
+bit 106 O 1 PF10 107 0 Z
+bit 105 I 1 PF10
+bit 104 C 0 *
+bit 103 O 1 PF11 104 0 Z
+bit 102 I 1 PF11
+bit 101 O 1 *
+bit 100 O 1 PJ2 100 1 Z
+bit 99 I 1 PJ2
+bit 98 O 1 *
+bit 97 O 1 PJ3 97 1 Z
+bit 96 I 1 PJ3
+bit 95 C 0 *
+bit 94 O 1 PF12 95 0 Z
+bit 93 I 1 PF12
+bit 92 C 0 *
+bit 91 O 1 PF13 92 0 Z
+bit 90 I 1 PF13
+bit 89 C 0 *
+bit 88 O 1 PF14 89 0 Z
+bit 87 I 1 PF14
+bit 86 C 0 *
+bit 85 O 1 PF15 86 0 Z
+bit 84 I 1 PF15
+bit 83 C 0 *
+bit 82 O 1 PH0 83 0 Z
+bit 81 I 1 PH0
+bit 80 C 0 *
+bit 79 O 1 PH1 80 0 Z
+bit 78 I 1 PH1
+bit 77 C 0 *
+bit 76 O 1 PH2 77 0 Z
+bit 75 I 1 PH2
+bit 74 C 0 *
+bit 73 O 1 PH3 74 0 Z
+bit 72 I 1 PH3
+bit 71 C 0 *
+bit 70 O 1 PH4 71 0 Z
+bit 69 I 1 PH4
+bit 68 C 0 *
+bit 67 O 1 PH5 68 0 Z
+bit 66 I 1 PH5
+bit 65 C 0 *
+bit 64 O 1 PH6 65 0 Z
+bit 63 I 1 PH6
+bit 62 C 0 *
+bit 61 O 1 PH7 62 0 Z
+bit 60 I 1 PH7
+bit 59 C 0 *
+bit 58 O 1 PH8 59 0 Z
+bit 57 I 1 PH8
+bit 56 O 0 *
+bit 55 C 0 *
+bit 54 O 1 PH9 55 0 Z
+bit 53 I 1 PH9
+bit 52 C 0 *
+bit 51 O 1 PH10 52 0 Z
+bit 50 I 1 PH10
+bit 49 C 0 *
+bit 48 O 1 PH11 49 0 Z
+bit 47 I 1 PH11
+bit 46 C 0 *
+bit 45 O 1 PH12 46 0 Z
+bit 44 I 1 PH12
+bit 43 C 0 *
+bit 42 O 1 PH13 43 0 Z
+bit 41 I 1 PH13
+bit 40 C 0 *
+bit 39 O 1 PH14 40 0 Z
+bit 38 I 1 PH14
+bit 37 C 0 *
+bit 36 O 1 PH15 37 0 Z
+bit 35 I 1 PH15
+bit 34 I 1 NMI_B
+bit 33 I 1 RESET_B
+bit 32 C 0 *
+bit 31 O 1 CLKOUT 32 0 Z
+bit 30 O 1 AMS_B0 25 0 Z
+bit 29 O 1 AMS_B1 25 0 Z
+bit 28 O 1 AMS_B2 25 0 Z
+bit 27 O 1 AMS_B3 25 0 Z
+bit 26 O 1 AOE_B 25 0 Z
+bit 25 C 0 *
+bit 24 O 1 ARE_B 25 0 Z
+bit 23 O 1 AWE_B 25 0 Z
+bit 22 I 1 ARDY
+bit 21 O 1 SCKE 32 0 Z
+bit 20 O 1 SMS_B 32 0 Z
+bit 19 O 1 SRAS_B 32 0 Z
+bit 18 O 1 SCAS_B 32 0 Z
+bit 17 O 1 SWE_B 32 0 Z
+bit 16 O 1 SA10 32 0 Z
+bit 15 O 1 ABE_B0 8 0 Z
+bit 14 O 1 ABE_B1 8 0 Z
+bit 13 O 1 ADDR1 8 0 Z
+bit 12 O 1 ADDR2 8 0 Z
+bit 11 O 1 ADDR3 8 0 Z
+bit 10 O 1 ADDR4 8 0 Z
+bit 9 O 1 ADDR5 8 0 Z
+bit 8 C 0 *
+bit 7 O 1 ADDR6 8 0 Z
+bit 6 O 1 ADDR7 8 0 Z
+bit 5 O 1 ADDR8 8 0 Z
+bit 4 O 1 ADDR9 8 0 Z
+bit 3 O 1 ADDR10 8 0 Z
+bit 2 O 1 ADDR11 8 0 Z
+bit 1 O 1 ADDR12 8 0 Z
+bit 0 O 1 ADDR13 8 0 Z

sie_fs/usr/local/share/urjtag/analog/bf533/STEPPINGS

@@ -0,0 +1,28 @@
+#
+# $Id: STEPPINGS,v 1.3 2005/07/08 15:05:41 rgetz Exp $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000    bf533           0
+0001    bf533           1
+0010	bf533		2
+0011	bf533		3
+0100	bf533		4
+0101    bf533        	5

sie_fs/usr/local/share/urjtag/analog/bf533/bf533

@@ -0,0 +1,378 @@
+signal ADDR[1]
+signal ADDR[2]
+signal ADDR[3]
+signal ADDR[4]
+signal ADDR[5]
+signal ADDR[6]
+signal ADDR[7]
+signal ADDR[8]
+signal ADDR[9]
+signal ADDR[10]
+signal ADDR[11]
+signal ADDR[12]
+signal ADDR[13]
+signal ADDR[14]
+signal ADDR[15]
+signal ADDR[16]
+signal ADDR[17]
+signal ADDR[18]
+signal ADDR[19]
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal DATA[0]
+signal DATA[1]
+signal DATA[2]
+signal DATA[3]
+signal DATA[4]
+signal DATA[5]
+signal DATA[6]
+signal DATA[7]
+signal DATA[8]
+signal DATA[9]
+signal DATA[10]
+signal DATA[11]
+signal DATA[12]
+signal DATA[13]
+signal DATA[14]
+signal DATA[15]
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PP_CLK
+signal PP0
+signal PP1
+signal PP2
+signal PP3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal CLKOUT
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal TMR0
+signal TMR1
+signal TMR2
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal VROUT0
+
+register	BSR	197
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction BYPASS 11111 BR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 196 C 0 *
+bit 195 O 1 DATA[0] 196 0 Z
+bit 194 I 1 DATA[0]
+bit 193 O 1 DATA[1] 196 0 Z
+bit 192 I 1 DATA[1]
+bit 191 O 1 DATA[2] 196 0 Z
+bit 190 I 1 DATA[2]
+bit 189 O 1 DATA[3] 196 0 Z
+bit 188 I 1 DATA[3]
+bit 187 O 1 DATA[4] 196 0 Z
+bit 186 I 1 DATA[4]
+bit 185 O 1 DATA[5] 196 0 Z
+bit 184 I 1 DATA[5]
+bit 183 O 1 DATA[6] 196 0 Z
+bit 182 I 1 DATA[6]
+bit 181 O 1 DATA[7] 196 0 Z
+bit 180 I 1 DATA[7]
+bit 179 O 1 DATA[8] 196 0 Z
+bit 178 I 1 DATA[8]
+bit 177 O 1 DATA[9] 196 0 Z
+bit 176 I 1 DATA[9]
+bit 175 O 1 DATA[10] 196 0 Z
+bit 174 I 1 DATA[10]
+bit 173 O 1 DATA[11] 196 0 Z
+bit 172 I 1 DATA[11]
+bit 171 O 1 DATA[12] 196 0 Z
+bit 170 I 1 DATA[12]
+bit 169 O 1 DATA[13] 196 0 Z
+bit 168 I 1 DATA[13]
+bit 167 O 1 DATA[14] 196 0 Z
+bit 166 I 1 DATA[14]
+bit 165 O 1 DATA[15] 196 0 Z
+bit 164 I 1 DATA[15]
+bit 163 I 1 TEST
+bit 162 I 1 BMODE0
+bit 161 I 1 BMODE1
+bit 160 I 1 RX
+bit 159 O 1 TX
+bit 158 C 0 *
+bit 157 O 1 TMR0 158 0 Z
+bit 156 I 1 TMR0
+bit 155 C 0 *
+bit 154 O 1 TMR1 155 0 Z
+bit 153 I 1 TMR1
+bit 152 C 0 *
+bit 151 O 1 TMR2 152 0 Z
+bit 150 I 1 TMR2
+bit 149 C 0 *
+bit 148 O 1 RSCLK0 149 0 Z
+bit 147 I 1 RSCLK0
+bit 146 C 0 *
+bit 145 O 1 RFS0 146 0 Z
+bit 144 I 1 RFS0
+bit 143 I 1 DR0PRI
+bit 142 I 1 DR0SEC
+bit 141 C 0 *
+bit 140 O 1 TSCLK0 141 0 Z
+bit 139 I 1 TSCLK0
+bit 138 C 0 *
+bit 137 O 1 TFS0 138 0 Z
+bit 136 I 1 TFS0
+bit 135 C 0 *
+bit 134 O 1 DT0PRI 135 0 Z
+bit 133 C 0 *
+bit 132 O 1 DT0SEC 133 0 Z
+bit 131 C 0 *
+bit 130 O 1 RSCLK1 131 0 Z
+bit 129 I 1 RSCLK1
+bit 128 C 0 *
+bit 127 O 1 RFS1 128 0 Z
+bit 126 I 1 RFS1
+bit 125 I 1 DR1PRI
+bit 124 I 1 DR1SEC
+bit 123 C 0 *
+bit 122 O 1 TSCLK1 123 0 Z
+bit 121 I 1 TSCLK1
+bit 120 C 0 *
+bit 119 O 1 TFS1 120 0 Z
+bit 118 I 1 TFS1
+bit 117 C 0 *
+bit 116 O 1 DT1PRI 117 0 Z
+bit 115 C 0 *
+bit 114 O 1 DT1SEC 115 0 Z
+bit 113 C 0 *
+bit 112 O 1 MOSI 113 0 Z
+bit 111 I 1 MOSI
+bit 110 C 0 *
+bit 109 O 1 MISO 110 0 Z
+bit 108 I 1 MISO
+bit 107 C 0 *
+bit 106 O 1 SCK 107 0 Z
+bit 105 I 1 SCK
+bit 104 C 0 *
+bit 103 O 1 PF0 104 0 Z
+bit 102 I 1 PF0
+bit 101 C 0 *
+bit 100 O 1 PF1 101 0 Z
+bit 99 I 1 PF1
+bit 98 C 0 *
+bit 97 O 1 PF2 98 0 Z
+bit 96 I 1 PF2
+bit 95 C 0 *
+bit 94 O 1 PF3 95 0 Z
+bit 93 I 1 PF3
+bit 92 C 0 *
+bit 91 O 1 PF4 92 0 Z
+bit 90 I 1 PF4
+bit 89 C 0 *
+bit 88 O 1 PF5 89 0 Z
+bit 87 I 1 PF5
+bit 86 C 0 *
+bit 85 O 1 PF6 86 0 Z
+bit 84 I 1 PF6
+bit 83 C 0 *
+bit 82 O 1 PF7 83 0 Z
+bit 81 I 1 PF7
+bit 80 C 0 *
+bit 79 O 1 PF8 80 0 Z
+bit 78 I 1 PF8
+bit 77 C 0 *
+bit 76 O 1 PF9 77 0 Z
+bit 75 I 1 PF9
+bit 74 C 0 *
+bit 73 O 1 PF10 74 0 Z
+bit 72 I 1 PF10
+bit 71 C 0 *
+bit 70 O 1 PF11 71 0 Z
+bit 69 I 1 PF11
+bit 68 C 0 *
+bit 67 O 1 PF12 68 0 Z
+bit 66 I 1 PF12
+bit 65 C 0 *
+bit 64 O 1 PF13 65 0 Z
+bit 63 I 1 PF13
+bit 62 C 0 *
+bit 61 O 1 PF14 62 0 Z
+bit 60 I 1 PF14
+bit 59 C 0 *
+bit 58 O 1 PF15 59 0 Z
+bit 57 I 1 PF15
+bit 56 C 0 *
+bit 55 O 1 PP3 56 0 Z
+bit 54 I 1 PP3
+bit 53 C 0 *
+bit 52 O 1 PP2 53 0 Z
+bit 51 I 1 PP2
+bit 50 C 0 *
+bit 49 O 1 PP1 50 0 Z
+bit 48 I 1 PP1
+bit 47 C 0 *
+bit 46 O 1 PP0 47 0 Z
+bit 45 I 1 PP0
+bit 44 I 1 PP_CLK
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR[1] 17 0 Z
+bit 20 O 1 ADDR[2] 17 0 Z
+bit 19 O 1 ADDR[3] 17 0 Z
+bit 18 O 1 ADDR[4] 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR[5] 17 0 Z
+bit 15 O 1 ADDR[6] 17 0 Z
+bit 14 O 1 ADDR[7] 17 0 Z
+bit 13 O 1 ADDR[8] 17 0 Z
+bit 12 O 1 ADDR[9] 17 0 Z
+bit 11 O 1 ADDR[10] 17 0 Z
+bit 10 O 1 ADDR[11] 17 0 Z
+bit 9 O 1 ADDR[12] 17 0 Z
+bit 8 O 1 ADDR[13] 17 0 Z
+bit 7 O 1 ADDR[14] 17 0 Z
+bit 6 O 1 ADDR[15] 17 0 Z
+bit 5 O 1 ADDR[16] 17 0 Z
+bit 4 O 1 ADDR[17] 17 0 Z
+bit 3 O 1 ADDR[18] 17 0 Z
+bit 2 O 1 ADDR[19] 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B

sie_fs/usr/local/share/urjtag/analog/bf537/STEPPINGS

@@ -0,0 +1,26 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf537		0
+0001	bf537		1
+0010	bf537		2
+0011	bf537		3

sie_fs/usr/local/share/urjtag/analog/bf537/bf537

@@ -0,0 +1,464 @@
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BMODE2
+signal BR_B
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal NMI
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PG0
+signal PG1
+signal PG2
+signal PG3
+signal PG4
+signal PG5
+signal PG6
+signal PG7
+signal PG8
+signal PG9
+signal PG10
+signal PG11
+signal PG12
+signal PG13
+signal PG14
+signal PG15
+signal PH0
+signal PH1
+signal PH2
+signal PH3
+signal PH4
+signal PH5
+signal PH6
+signal PH7
+signal PH8
+signal PH9
+signal PH10
+signal PH11
+signal PH12
+signal PH13
+signal PH14
+signal PH15
+signal PJ0
+signal PJ1
+signal PJ2
+signal PJ3
+signal PJ4
+signal PJ5
+signal PJ6
+signal PJ7
+signal PJ8
+signal PJ9
+signal PJ10
+signal PJ11
+signal RESET_B
+signal CLKOUT
+signal SA10
+signal SCAS_B
+signal SCKE
+signal SMS_B
+signal SRAS_B
+signal SWE_B
+signal TDI
+signal TDO
+signal TCK
+signal TMS
+signal TRST_B
+signal TEST
+signal EMU_B
+signal RTXI
+signal RTXO
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal VDD_RTC
+signal CLKIN
+signal XTAL
+signal CLKBUF
+signal VROUT0
+
+register	BSR	261
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 260 C 0 *
+bit 259 O 1 DATA0 260 0 Z
+bit 258 I 1 DATA0
+bit 257 O 1 DATA1 260 0 Z
+bit 256 I 1 DATA1
+bit 255 O 1 DATA2 260 0 Z
+bit 254 I 1 DATA2
+bit 253 O 1 DATA3 260 0 Z
+bit 252 I 1 DATA3
+bit 251 O 1 DATA4 260 0 Z
+bit 250 I 1 DATA4
+bit 249 O 1 DATA5 260 0 Z
+bit 248 I 1 DATA5
+bit 247 O 1 DATA6 260 0 Z
+bit 246 I 1 DATA6
+bit 245 O 1 DATA7 260 0 Z
+bit 244 I 1 DATA7
+bit 243 O 1 DATA8 260 0 Z
+bit 242 I 1 DATA8
+bit 241 O 1 DATA9 260 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA10 260 0 Z
+bit 238 I 1 DATA10
+bit 237 O 1 DATA11 260 0 Z
+bit 236 I 1 DATA11
+bit 235 O 1 DATA12 260 0 Z
+bit 234 I 1 DATA12
+bit 233 O 1 DATA13 260 0 Z
+bit 232 I 1 DATA13
+bit 231 O 1 DATA14 260 0 Z
+bit 230 I 1 DATA14
+bit 229 O 1 DATA15 260 0 Z
+bit 228 I 1 DATA15
+bit 227 I 1 TEST
+bit 226 I 1 BMODE0
+bit 225 I 1 BMODE1
+bit 224 I 1 BMODE2
+bit 223 C 0 *
+bit 222 O 1 PF0 223 0 Z
+bit 221 I 1 PF0
+bit 220 C 0 *
+bit 219 O 1 PF1 220 0 Z
+bit 218 I 1 PF1
+bit 217 C 0 *
+bit 216 O 1 PF2 217 0 Z
+bit 215 I 1 PF2
+bit 214 C 0 *
+bit 213 O 1 PF3 214 0 Z
+bit 212 I 1 PF3
+bit 211 C 0 *
+bit 210 O 1 PF4 211 0 Z
+bit 209 I 1 PF4
+bit 208 C 0 *
+bit 207 O 1 PF5 208 0 Z
+bit 206 I 1 PF5
+bit 205 C 0 *
+bit 204 O 1 PF6 205 0 Z
+bit 203 I 1 PF6
+bit 202 C 0 *
+bit 201 O 1 PF7 202 0 Z
+bit 200 I 1 PF7
+bit 199 C 0 *
+bit 198 O 1 PF8 199 0 Z
+bit 197 I 1 PF8
+bit 196 C 0 *
+bit 195 O 1 PF9 196 0 Z
+bit 194 I 1 PF9
+bit 193 C 0 *
+bit 192 O 1 PF10 193 0 Z
+bit 191 I 1 PF10
+bit 190 C 0 *
+bit 189 O 1 PF11 190 0 Z
+bit 188 I 1 PF11
+bit 187 C 0 *
+bit 186 O 1 PF12 187 0 Z
+bit 185 I 1 PF12
+bit 184 C 0 *
+bit 183 O 1 PF13 184 0 Z
+bit 182 I 1 PF13
+bit 181 C 0 *
+bit 180 O 1 PF14 181 0 Z
+bit 179 I 1 PF14
+bit 178 C 0 *
+bit 177 O 1 PF15 178 0 Z
+bit 176 I 1 PF15
+bit 175 C 0 *
+bit 174 O 1 PG0 175 0 Z
+bit 173 I 1 PG0
+bit 172 C 0 *
+bit 171 O 1 PG1 172 0 Z
+bit 170 I 1 PG1
+bit 169 C 0 *
+bit 168 O 1 PG2 169 0 Z
+bit 167 I 1 PG2
+bit 166 C 0 *
+bit 165 O 1 PG3 166 0 Z
+bit 164 I 1 PG3
+bit 163 C 0 *
+bit 162 O 1 PG4 163 0 Z
+bit 161 I 1 PG4
+bit 160 C 0 *
+bit 159 O 1 PG5 160 0 Z
+bit 158 I 1 PG5
+bit 157 C 0 *
+bit 156 O 1 PG6 157 0 Z
+bit 155 I 1 PG6
+bit 154 C 0 *
+bit 153 O 1 PG7 154 0 Z
+bit 152 I 1 PG7
+bit 151 C 0 *
+bit 150 O 1 PG10 151 0 Z
+bit 149 I 1 PG10
+bit 148 C 0 *
+bit 147 O 1 PG11 148 0 Z
+bit 146 I 1 PG11
+bit 145 C 0 *
+bit 144 O 1 PG12 145 0 Z
+bit 143 I 1 PG12
+bit 142 C 0 *
+bit 141 O 1 PG8 142 0 Z
+bit 140 I 1 PG8
+bit 139 C 0 *
+bit 138 O 1 PG9 139 0 Z
+bit 137 I 1 PG9
+bit 136 C 0 *
+bit 135 O 1 PG13 136 0 Z
+bit 134 I 1 PG13
+bit 133 C 0 *
+bit 132 O 1 PG14 133 0 Z
+bit 131 I 1 PG14
+bit 130 C 0 *
+bit 129 O 1 PG15 130 0 Z
+bit 128 I 1 PG15
+bit 127 C 0 *
+bit 126 O 1 PH0 127 0 Z
+bit 125 I 1 PH0
+bit 124 C 0 *
+bit 123 O 1 PH1 124 0 Z
+bit 122 I 1 PH1
+bit 121 C 0 *
+bit 120 O 1 PH2 121 0 Z
+bit 119 I 1 PH2
+bit 118 C 0 *
+bit 117 O 1 PH3 118 0 Z
+bit 116 I 1 PH3
+bit 115 C 0 *
+bit 114 O 1 PH4 115 0 Z
+bit 113 I 1 PH4
+bit 112 C 0 *
+bit 111 O 1 PH5 112 0 Z
+bit 110 I 1 PH5
+bit 109 C 0 *
+bit 108 O 1 PH6 109 0 Z
+bit 107 I 1 PH6
+bit 106 C 0 *
+bit 105 O 1 PH7 106 0 Z
+bit 104 I 1 PH7
+bit 103 C 0 *
+bit 102 O 1 PH8 103 0 Z
+bit 101 I 1 PH8
+bit 100 C 0 *
+bit 99 O 1 PH9 100 0 Z
+bit 98 I 1 PH9
+bit 97 C 0 *
+bit 96 O 1 PH10 97 0 Z
+bit 95 I 1 PH10
+bit 94 C 0 *
+bit 93 O 1 PH11 94 0 Z
+bit 92 I 1 PH11
+bit 91 C 0 *
+bit 90 O 1 PH12 91 0 Z
+bit 89 I 1 PH12
+bit 88 C 0 *
+bit 87 O 1 PH13 88 0 Z
+bit 86 I 1 PH13
+bit 85 C 0 *
+bit 84 O 1 PH14 85 0 Z
+bit 83 I 1 PH14
+bit 82 C 0 *
+bit 81 O 1 PH15 82 0 Z
+bit 80 I 1 PH15
+bit 79 C 0 *
+bit 78 O 1 PJ0 79 0 Z
+bit 77 I 1 PJ0
+bit 76 C 0 *
+bit 75 O 1 PJ1 76 0 Z
+bit 74 I 1 PJ1
+bit 73 C 0 *
+bit 72 O 1 PJ6 73 0 Z
+bit 71 I 1 PJ6
+bit 70 C 0 *
+bit 69 O 1 PJ7 70 0 Z
+bit 68 I 1 PJ7
+bit 67 C 0 *
+bit 66 O 1 PJ8 67 0 Z
+bit 65 I 1 PJ8
+bit 64 C 0 *
+bit 63 O 1 PJ4 64 0 Z
+bit 62 I 1 PJ4
+bit 61 C 0 *
+bit 60 O 1 PJ5 61 0 Z
+bit 59 I 1 PJ5
+bit 58 C 0 *
+bit 57 O 1 PJ9 58 0 Z
+bit 56 I 1 PJ9
+bit 55 C 0 *
+bit 54 O 1 PJ10 55 0 Z
+bit 53 I 1 PJ10
+bit 52 C 0 *
+bit 51 O 1 PJ11 52 0 Z
+bit 50 I 1 PJ11
+bit 49 C 0 *
+bit 48 O 1 PJ2 49 0 Z
+bit 47 I 1 PJ2
+bit 46 C 0 *
+bit 45 O 1 PJ3 46 0 Z
+bit 44 I 1 PJ3
+bit 43 I 1 NMI
+bit 42 I 1 RESET_B
+bit 41 O 1 SCKE 39 0 Z
+bit 40 O 1 SMS_B 39 0 Z
+bit 39 C 0 *
+bit 38 O 1 CLKOUT 39 0 Z
+bit 37 O 1 SRAS_B 39 0 Z
+bit 36 O 1 SCAS_B 39 0 Z
+bit 35 O 1 SWE_B 39 0 Z
+bit 34 O 1 SA10 39 0 Z
+bit 33 I 1 BR_B
+bit 32 I 1 ARDY
+bit 31 O 1 AMS_B0 27 0 Z
+bit 30 O 1 AMS_B1 27 0 Z
+bit 29 O 1 AMS_B2 27 0 Z
+bit 28 O 1 AMS_B3 27 0 Z
+bit 27 C 0 *
+bit 26 O 1 AOE_B 27 0 Z
+bit 25 O 1 ARE_B 27 0 Z
+bit 24 O 1 AWE_B 27 0 Z
+bit 23 O 1 ABE_B0 17 0 Z
+bit 22 O 1 ABE_B1 17 0 Z
+bit 21 O 1 ADDR1 17 0 Z
+bit 20 O 1 ADDR2 17 0 Z
+bit 19 O 1 ADDR3 17 0 Z
+bit 18 O 1 ADDR4 17 0 Z
+bit 17 C 0 *
+bit 16 O 1 ADDR5 17 0 Z
+bit 15 O 1 ADDR6 17 0 Z
+bit 14 O 1 ADDR7 17 0 Z
+bit 13 O 1 ADDR8 17 0 Z
+bit 12 O 1 ADDR9 17 0 Z
+bit 11 O 1 ADDR10 17 0 Z
+bit 10 O 1 ADDR11 17 0 Z
+bit 9 O 1 ADDR12 17 0 Z
+bit 8 O 1 ADDR13 17 0 Z
+bit 7 O 1 ADDR14 17 0 Z
+bit 6 O 1 ADDR15 17 0 Z
+bit 5 O 1 ADDR16 17 0 Z
+bit 4 O 1 ADDR17 17 0 Z
+bit 3 O 1 ADDR18 17 0 Z
+bit 2 O 1 ADDR19 17 0 Z
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B

sie_fs/usr/local/share/urjtag/analog/bf538/STEPPINGS

@@ -0,0 +1,28 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf538		0
+0001	bf538		1
+0010	bf538		2
+0011	bf538		3
+0100	bf538		4
+0101	bf538		5

sie_fs/usr/local/share/urjtag/analog/bf538/bf538

@@ -0,0 +1,661 @@
+signal ABE_B0
+signal ABE_B1
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal CANRX
+signal CANTX
+signal CLKIN
+signal CLKOUT
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DR2PRI
+signal DR2SEC
+signal DR3PRI
+signal DR3SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal DT2PRI
+signal DT2SEC
+signal DT3PRI
+signal DT3SEC
+signal EMU_B
+signal FCE_B
+signal FRESET_B
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+signal GND34
+signal GND35
+signal GND36
+signal GND37
+signal GND38
+signal GND39
+signal GND40
+signal GND41
+signal GND42
+signal GND43
+signal GND44
+signal GND45
+signal GND46
+signal GND47
+signal GND48
+signal GND49
+signal GND50
+signal GND51
+signal GND52
+signal GND53
+signal GND54
+signal GND55
+signal GND56
+signal GND57
+signal GND58
+signal GND59
+signal GND60
+signal GND61
+signal GND62
+signal GND63
+signal GND64
+signal GND65
+signal GND66
+signal GND67
+signal GND68
+signal GND69
+signal GND70
+signal GND71
+signal GND72
+signal GND73
+signal GND74
+signal GND75
+signal GND76
+signal GND77
+signal GND78
+signal GND79
+signal GND80
+signal GND81
+signal GND82
+signal GND83
+signal GND84
+signal GND85
+signal GND86
+signal GND87
+signal GND88
+signal GND89
+signal GND90
+signal GND91
+signal GND92
+signal GND93
+signal GND94
+signal GND95
+signal GND96
+signal GND97
+signal GND98
+signal GND99
+signal GND100
+signal GND101
+signal GND102
+signal GND103
+signal GND104
+signal GND105
+signal GND106
+signal GND107
+signal GND108
+signal GND109
+signal GND110
+signal GND111
+signal GND112
+signal GND113
+signal GND114
+signal GND115
+signal GND116
+signal GND117
+signal GND118
+signal GP
+signal GPW_B
+signal MISO0
+signal MISO1
+signal MISO2
+signal MOSI0
+signal MOSI1
+signal MOSI2
+signal PC4
+signal PC6
+signal PC7
+signal PC8
+signal PC5
+signal NC
+signal NMI_B
+signal PC9
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal PPI_CLK
+signal PPI0
+signal PPI1
+signal PPI2
+signal PPI3
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RFS2
+signal RFS3
+signal RSCLK0
+signal RSCLK1
+signal RSCLK2
+signal RSCLK3
+signal RTXI
+signal RTXO
+signal RX0
+signal RX1
+signal RX2
+signal SA10
+signal SCAS_B
+signal SCK0
+signal SCK1
+signal SCK2
+signal SCKE
+signal SCL0
+signal SCL1
+signal SDA0
+signal SDA1
+signal SMS_B
+signal SPI1SS_B
+signal SPI1SEL1_B
+signal SPI2SS_B
+signal SPI2SEL1_B
+signal SRAS_B
+signal SWE_B
+signal TCK
+signal TDI
+signal TDO
+signal TFS0
+signal TFS1
+signal TFS2
+signal TFS3
+signal TMR0
+signal TMR1
+signal TMR2
+signal TMS
+signal TRST_B
+signal TSCLK0
+signal TSCLK1
+signal TSCLK2
+signal TSCLK3
+signal TX0
+signal TX1
+signal TX2
+signal VDDEXT0
+signal VDDEXT1
+signal VDDEXT2
+signal VDDEXT3
+signal VDDEXT4
+signal VDDEXT5
+signal VDDEXT6
+signal VDDEXT7
+signal VDDEXT8
+signal VDDEXT9
+signal VDDEXT10
+signal VDDEXT11
+signal VDDEXT12
+signal VDDEXT13
+signal VDDEXT14
+signal VDDEXT15
+signal VDDEXT16
+signal VDDEXT17
+signal VDDEXT18
+signal VDDEXT19
+signal VDDINT0
+signal VDDINT1
+signal VDDINT2
+signal VDDINT3
+signal VDDINT4
+signal VDDINT5
+signal VDDINT6
+signal VDDINT7
+signal VDDINT8
+signal VDDINT9
+signal VDDINT10
+signal VDDINT11
+signal VDDRTC
+signal VROUT0
+signal VROUT1
+
+register	BSR	325
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 324 C 0 *
+bit 323 O 1 DATA0 324 0 Z
+bit 322 I 1 DATA0
+bit 321 O 1 DATA1 324 0 Z
+bit 320 I 1 DATA1
+bit 319 O 1 DATA2 324 0 Z
+bit 318 I 1 DATA2
+bit 317 C 0 *
+bit 316 O 1 TSCLK2 317 0 Z
+bit 315 I 1 TSCLK2
+bit 314 C 0 *
+bit 313 O 1 DR2SEC 314 0 Z
+bit 312 I 1 DR2SEC
+bit 311 C 0 *
+bit 310 O 1 DR2PRI 311 0 Z
+bit 309 I 1 DR2PRI
+bit 308 O 1 DATA3 324 0 Z
+bit 307 I 1 DATA3
+bit 306 O 1 DATA4 324 0 Z
+bit 305 I 1 DATA4
+bit 304 O 1 DATA5 324 0 Z
+bit 303 I 1 DATA5
+bit 302 O 1 DATA6 324 0 Z
+bit 301 I 1 DATA6
+bit 300 C 0 *
+bit 299 O 1 RFS2 300 0 Z
+bit 298 I 1 RFS2
+bit 297 O 1 DATA7 324 0 Z
+bit 296 I 1 DATA7
+bit 295 O 1 DATA8 324 0 Z
+bit 294 I 1 DATA8
+bit 293 O 1 DATA9 324 0 Z
+bit 292 I 1 DATA9
+bit 291 O 1 DATA10 324 0 Z
+bit 290 I 1 DATA10
+bit 289 O 1 DATA11 324 0 Z
+bit 288 I 1 DATA11
+bit 287 C 0 *
+bit 286 O 1 RSCLK2 287 0 Z
+bit 285 I 1 RSCLK2
+bit 284 C 0 *
+bit 283 O 1 RX2 284 0 Z
+bit 282 I 1 RX2
+bit 281 O 1 DATA12 324 0 Z
+bit 280 I 1 DATA12
+bit 279 O 1 DATA13 324 0 Z
+bit 278 I 1 DATA13
+bit 277 O 1 DATA14 324 0 Z
+bit 276 I 1 DATA14
+bit 275 O 1 DATA15 324 0 Z
+bit 274 I 1 DATA15
+bit 273 I 1 BMODE0
+bit 272 I 1 BMODE1
+bit 271 I 1 RX0
+bit 270 O 1 TX0
+bit 269 C 0 *
+bit 268 O 1 RSCLK1 269 0 Z
+bit 267 I 1 RSCLK1
+bit 266 C 0 *
+bit 265 O 1 TMR0 266 0 Z
+bit 264 I 1 TMR0
+bit 263 C 0 *
+bit 262 O 1 TMR1 263 0 Z
+bit 261 I 1 TMR1
+bit 260 C 0 *
+bit 259 O 1 TMR2 260 0 Z
+bit 258 I 1 TMR2
+bit 257 C 0 *
+bit 256 O 1 RSCLK0 257 0 Z
+bit 255 I 1 RSCLK0
+bit 254 C 0 *
+bit 253 O 1 RFS0 254 0 Z
+bit 252 I 1 RFS0
+bit 251 I 1 DR0PRI
+bit 250 I 1 DR0SEC
+bit 249 C 0 *
+bit 248 O 1 RFS1 249 0 Z
+bit 247 I 1 RFS1
+bit 246 I 1 DR1PRI
+bit 245 I 1 DR1SEC
+bit 244 C 0 *
+bit 243 O 1 TSCLK0 244 0 Z
+bit 242 I 1 TSCLK0
+bit 241 C 0 *
+bit 240 O 1 TFS0 241 0 Z
+bit 239 I 1 TFS0
+bit 238 C 0 *
+bit 237 O 1 DT0PRI 238 0 Z
+bit 236 C 0 *
+bit 235 O 1 DT0SEC 236 0 Z
+bit 234 C 0 *
+bit 233 O 1 PF0 234 0 Z
+bit 232 I 1 PF0
+bit 231 C 0 *
+bit 230 O 1 PF1 231 0 Z
+bit 229 I 1 PF1
+bit 228 C 0 *
+bit 227 O 1 PF2 228 0 Z
+bit 226 I 1 PF2
+bit 225 C 0 *
+bit 224 O 1 PF3 225 0 Z
+bit 223 I 1 PF3
+bit 222 C 0 *
+bit 221 O 1 PF4 222 0 Z
+bit 220 I 1 PF4
+bit 219 C 0 *
+bit 218 O 1 PF5 219 0 Z
+bit 217 I 1 PF5
+bit 216 C 0 *
+bit 215 O 1 TSCLK1 216 0 Z
+bit 214 I 1 TSCLK1
+bit 213 C 0 *
+bit 212 O 1 TFS1 213 0 Z
+bit 211 I 1 TFS1
+bit 210 C 0 *
+bit 209 O 1 DT1PRI 210 0 Z
+bit 208 C 0 *
+bit 207 O 1 PF6 208 0 Z
+bit 206 I 1 PF6
+bit 205 C 0 *
+bit 204 O 1 MOSI0 205 0 Z
+bit 203 I 1 MOSI0
+bit 202 C 0 *
+bit 201 O 1 MISO0 202 0 Z
+bit 200 I 1 MISO0
+bit 199 C 0 *
+bit 198 O 1 DT1SEC 199 0 Z
+bit 197 C 0 *
+bit 196 O 1 SCK0 197 0 Z
+bit 195 I 1 SCK0
+bit 194 C 0 *
+bit 193 O 1 PF7 194 0 Z
+bit 192 I 1 PF7
+bit 191 C 0 *
+bit 190 O 1 PF8 191 0 Z
+bit 189 I 1 PF8
+bit 188 C 0 *
+bit 187 O 1 PF9 188 0 Z
+bit 186 I 1 PF9
+bit 185 C 0 *
+bit 184 O 1 PF10 185 0 Z
+bit 183 I 1 PF10
+bit 182 C 0 *
+bit 181 O 1 PF11 182 0 Z
+bit 180 I 1 PF11
+bit 179 C 0 *
+bit 178 O 1 PF12 179 0 Z
+bit 177 I 1 PF12
+bit 176 C 0 *
+bit 175 O 1 PF13 176 0 Z
+bit 174 I 1 PF13
+bit 173 C 0 *
+bit 172 O 1 PF14 173 0 Z
+bit 171 I 1 PF14
+bit 170 C 0 *
+bit 169 O 1 PF15 170 0 Z
+bit 168 I 1 PF15
+bit 167 C 0 *
+bit 166 O 1 PPI3 167 0 Z
+bit 165 I 1 PPI3
+bit 164 C 0 *
+bit 163 O 1 PPI2 164 0 Z
+bit 162 I 1 PPI2
+bit 161 C 0 *
+bit 160 O 1 PPI1 161 0 Z
+bit 159 I 1 PPI1
+bit 158 C 0 *
+bit 157 O 1 PPI0 158 0 Z
+bit 156 I 1 PPI0
+bit 155 C 0 *
+bit 154 O 1 RX1 155 0 Z
+bit 153 I 1 RX1
+bit 152 C 0 *
+bit 151 O 1 TX1 152 0 Z
+bit 150 I 1 TX1
+bit 149 I 1 PPI_CLK
+bit 148 C 0 *
+bit 147 O 1 SCL0 148 0 Z
+bit 146 I 1 SCL0
+bit 145 C 0 *
+bit 144 O 1 SDA0 145 0 Z
+bit 143 I 1 SDA0
+bit 142 O 0 *
+bit 141 O 0 *
+bit 140 I 1 CANRX
+bit 139 C 0 *
+bit 138 O 1 CANTX 139 0 Z
+bit 137 I 1 CANTX
+bit 136 C 0 *
+bit 135 O 1 SPI2SEL1_B 136 0 Z
+bit 134 I 1 SPI2SEL1_B
+bit 133 C 0 *
+bit 132 O 1 SPI2SS_B 133 0 Z
+bit 131 I 1 SPI2SS_B
+bit 130 C 0 *
+bit 129 O 1 MOSI2 130 0 Z
+bit 128 I 1 MOSI2
+bit 127 C 0 *
+bit 126 O 1 MISO2 127 0 Z
+bit 125 I 1 MISO2
+bit 124 I 1 NMI_B
+bit 123 I 1 RESET_B
+bit 122 C 0 *
+bit 121 O 1 SCK2 122 0 Z
+bit 120 I 1 SCK2
+bit 119 C 0 *
+bit 118 O 1 SPI1SEL1_B 119 0 Z
+bit 117 I 1 SPI1SEL1_B
+bit 116 C 0 *
+bit 115 O 1 SPI1SS_B 116 0 Z
+bit 114 I 1 SPI1SS_B
+bit 113 C 0 *
+bit 112 O 1 MOSI1 113 0 Z
+bit 111 I 1 MOSI1
+bit 110 C 0 *
+bit 109 O 1 MISO1 110 0 Z
+bit 108 I 1 MISO1
+bit 107 C 0 *
+bit 106 O 1 SCK1 107 0 Z
+bit 105 I 1 SCK1
+bit 104 C 0 *
+bit 103 O 1 SCL1 104 0 Z
+bit 102 I 1 SCL1
+bit 101 C 0 *
+bit 100 O 1 SDA1 101 0 Z
+bit 99 I 1 SDA1
+bit 98 C 0 *
+bit 97 O 1 PC9 98 0 Z
+bit 96 I 1 PC9
+bit 95 O 0 *
+bit 94 O 0 *
+bit 93 I 1 GPW_B
+bit 92 O 1 SCKE 84 0 Z
+bit 91 O 1 SMS_B 84 0 Z
+bit 90 C 0 *
+bit 89 O 1 PC6 90 0 Z
+bit 88 I 1 PC6
+bit 87 C 0 *
+bit 86 O 1 PC7 87 0 Z
+bit 85 I 1 PC7
+bit 84 C 0 *
+bit 83 O 1 CLKOUT 84 0 Z
+bit 82 I 1 ARDY
+bit 81 I 1 BR_B
+bit 80 C 0 *
+bit 79 O 1 DT3SEC 80 0 Z
+bit 78 I 1 DT3SEC
+bit 77 C 0 *
+bit 76 O 1 DT3PRI 77 0 Z
+bit 75 I 1 DT3PRI
+bit 74 C 0 *
+bit 73 O 1 TFS3 74 0 Z
+bit 72 I 1 TFS3
+bit 71 O 1 SRAS_B 84 0 Z
+bit 70 O 1 SCAS_B 84 0 Z
+bit 69 O 1 SWE_B 84 0 Z
+bit 68 O 1 SA10 84 0 Z
+bit 67 C 0 *
+bit 66 O 1 PC8 67 0 Z
+bit 65 I 1 PC8
+bit 64 C 0 *
+bit 63 O 1 PC5 64 0 Z
+bit 62 I 1 PC5
+bit 61 O 0 *
+bit 60 O 0 *
+bit 59 I 1 PC4
+bit 58 O 1 AMS_B0 45 0 Z
+bit 57 C 0 *
+bit 56 O 1 TSCLK3 57 0 Z
+bit 55 I 1 TSCLK3
+bit 54 C 0 *
+bit 53 O 1 DR3SEC 54 0 Z
+bit 52 I 1 DR3SEC
+bit 51 C 0 *
+bit 50 O 1 DR3PRI 51 0 Z
+bit 49 I 1 DR3PRI
+bit 48 O 1 AMS_B1 45 0 Z
+bit 47 O 1 AMS_B2 45 0 Z
+bit 46 O 1 AMS_B3 45 0 Z
+bit 45 C 0 *
+bit 44 O 1 AOE_B 45 0 Z
+bit 43 O 1 ARE_B 45 0 Z
+bit 42 O 1 AWE_B 45 0 Z
+bit 41 O 1 ABE_B0 26 0 Z
+bit 40 O 1 ABE_B1 26 0 Z
+bit 39 C 0 *
+bit 38 O 1 RFS3 39 0 Z
+bit 37 I 1 RFS3
+bit 36 C 0 *
+bit 35 O 1 RSCLK3 36 0 Z
+bit 34 I 1 RSCLK3
+bit 33 C 0 *
+bit 32 O 1 TX2 33 0 Z
+bit 31 I 1 TX2
+bit 30 O 1 ADDR1 26 0 Z
+bit 29 O 1 ADDR2 26 0 Z
+bit 28 O 1 ADDR3 26 0 Z
+bit 27 O 1 ADDR4 26 0 Z
+bit 26 C 0 *
+bit 25 O 1 ADDR5 26 0 Z
+bit 24 O 1 ADDR6 26 0 Z
+bit 23 O 1 ADDR7 26 0 Z
+bit 22 O 1 ADDR8 26 0 Z
+bit 21 O 1 ADDR9 26 0 Z
+bit 20 O 1 ADDR10 26 0 Z
+bit 19 O 1 ADDR11 26 0 Z
+bit 18 O 1 ADDR12 26 0 Z
+bit 17 O 1 ADDR13 26 0 Z
+bit 16 O 1 ADDR14 26 0 Z
+bit 15 C 0 *
+bit 14 O 1 DT2SEC 15 0 Z
+bit 13 I 1 DT2SEC
+bit 12 C 0 *
+bit 11 O 1 DT2PRI 12 0 Z
+bit 10 I 1 DT2PRI
+bit 9 O 1 ADDR15 26 0 Z
+bit 8 O 1 ADDR16 26 0 Z
+bit 7 O 1 ADDR17 26 0 Z
+bit 6 O 1 ADDR18 26 0 Z
+bit 5 O 1 ADDR19 26 0 Z
+bit 4 C 0 *
+bit 3 O 1 TFS2 4 0 Z
+bit 2 I 1 TFS2
+bit 1 O 1 BGH_B
+bit 0 O 1 BG_B

sie_fs/usr/local/share/urjtag/analog/bf549/STEPPINGS

@@ -0,0 +1,24 @@
+#
+# $Id: STEPPINGS 75 2005-11-11 09:12:34Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0000	bf549		0
+0001	bf549		1

sie_fs/usr/local/share/urjtag/analog/bf561/STEPPINGS

@@ -0,0 +1,25 @@
+#
+# $Id: STEPPINGS 82 2006-11-06 04:22:52Z jiez $
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Richard Klingler <richard@klingler.net>
+#
+
+# bits 31-28 of the Device Identification Register
+0010	bf561		2
+0011	bf561		3
+0101	bf561		5

sie_fs/usr/local/share/urjtag/analog/bf561/bf561

@@ -0,0 +1,610 @@
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal ADDR24
+signal ADDR25
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal AMS_B0
+signal AMS_B1
+signal AMS_B2
+signal AMS_B3
+signal AOE_B
+signal ARDY
+signal ARE_B
+signal AWE_B
+signal ABE_B0
+signal ABE_B1
+signal ABE_B2
+signal ABE_B3
+signal BG_B
+signal BGH_B
+signal BMODE0
+signal BMODE1
+signal BR_B
+signal BY_PASS
+signal PPI1_DATA0
+signal PPI1_DATA1
+signal PPI1_DATA2
+signal PPI1_DATA3
+signal PPI1_DATA4
+signal PPI1_DATA5
+signal PPI1_DATA6
+signal PPI1_DATA7
+signal PPI1_DATA8
+signal PPI1_DATA9
+signal PPI1_DATA10
+signal PPI1_DATA11
+signal PPI1_DATA12
+signal PPI1_DATA13
+signal PPI1_DATA14
+signal PPI1_DATA15
+signal PPI2_DATA0
+signal PPI2_DATA1
+signal PPI2_DATA2
+signal PPI2_DATA3
+signal PPI2_DATA4
+signal PPI2_DATA5
+signal PPI2_DATA6
+signal PPI2_DATA7
+signal PPI2_DATA8
+signal PPI2_DATA9
+signal PPI2_DATA10
+signal PPI2_DATA11
+signal PPI2_DATA12
+signal PPI2_DATA13
+signal PPI2_DATA14
+signal PPI2_DATA15
+signal DR0PRI
+signal DR0SEC
+signal DR1PRI
+signal DR1SEC
+signal DT0PRI
+signal DT0SEC
+signal DT1PRI
+signal DT1SEC
+signal MISO
+signal MOSI
+signal NMI_0
+signal NMI_1
+signal PF0
+signal PF1
+signal PF2
+signal PF3
+signal PF4
+signal PF5
+signal PF6
+signal PF7
+signal PF8
+signal PF9
+signal PF10
+signal PF11
+signal PF12
+signal PF13
+signal PF14
+signal PF15
+signal RESET_B
+signal RFS0
+signal RFS1
+signal RSCLK0
+signal RSCLK1
+signal TSCLK0
+signal TSCLK1
+signal RX
+signal TX
+signal SA10
+signal SCAS_B
+signal SCK
+signal SCKE
+signal SLEEP
+signal SMS_B0
+signal SMS_B1
+signal SMS_B2
+signal SMS_B3
+signal SRAS_B
+signal SWE_B
+signal SCLK0
+signal SCLK1
+signal TCK
+signal TDI
+signal TDO
+signal TMS
+signal TRST_B
+signal EMU_B
+signal TEST
+signal TFS0
+signal TFS1
+signal PPI1_CLK
+signal PPI2_CLK
+signal PPI1_SYNC1
+signal PPI1_SYNC2
+signal PPI1_SYNC3
+signal PPI2_SYNC1
+signal PPI2_SYNC2
+signal PPI2_SYNC3
+signal VDD_INT0
+signal VDD_INT1
+signal VDD_INT2
+signal VDD_INT3
+signal VDD_INT4
+signal VDD_INT5
+signal VDD_INT6
+signal VDD_INT7
+signal VDD_INT8
+signal GND_INT0
+signal GND_INT1
+signal GND_INT2
+signal GND_INT3
+signal GND_INT4
+signal GND_INT5
+signal GND_INT6
+signal VDD_EXT0
+signal VDD_EXT1
+signal VDD_EXT2
+signal VDD_EXT3
+signal VDD_EXT4
+signal VDD_EXT5
+signal VDD_EXT6
+signal VDD_EXT7
+signal VDD_EXT8
+signal VDD_EXT9
+signal VDD_EXT10
+signal VDD_EXT11
+signal VDD_EXT12
+signal VDD_EXT13
+signal VDD_EXT14
+signal VDD_EXT15
+signal VDD_EXT16
+signal VDD_EXT17
+signal VDD_EXT18
+signal CLKIN
+signal XTAL
+signal VREF_FLT
+signal VREG
+signal PSMON_VDD
+signal PSMON_GND
+signal GND_EXT0
+signal GND_EXT1
+signal GND_EXT2
+signal GND_EXT3
+signal GND_EXT4
+signal GND_EXT5
+signal GND_EXT6
+signal GND_EXT7
+signal GND_EXT8
+signal GND_EXT9
+signal GND_EXT10
+signal GND_EXT11
+signal GND_EXT12
+signal GND_EXT13
+signal GND_EXT14
+signal GND_EXT15
+signal GND_EXT16
+signal GND_EXT17
+signal GND_EXT18
+
+register	BSR	355
+register	BR	1
+register	DIR	32
+register	DBGSTAT	16
+register	DBGCTL	16
+register	EMUIR	32
+register	EMUDAT	32
+register	EMUPC	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+instruction IDCODE 00010 DIR
+instruction DBGSTAT_SCAN 01100 DBGSTAT
+instruction DBGCTL_SCAN 00100 DBGCTL
+instruction EMUIR_SCAN 01000 EMUIR
+instruction EMUDAT_SCAN 10100 EMUDAT
+instruction EMUPC_SCAN 11110 EMUPC
+
+bit 354 I 1 TEST
+bit 353 I 1 BMODE1
+bit 352 I 1 BMODE0
+bit 351 O 1 SLEEP
+bit 350 I 1 NMI_0
+bit 349 C 0 *
+bit 348 O 1 MISO 349 0 Z
+bit 347 I 1 MISO
+bit 346 C 0 *
+bit 345 O 1 MOSI 346 0 Z
+bit 344 I 1 MOSI
+bit 343 C 0 *
+bit 342 O 1 SCK 343 0 Z
+bit 341 I 1 SCK
+bit 340 C 0 *
+bit 339 O 1 RX 340 0 Z
+bit 338 I 1 RX
+bit 337 C 0 *
+bit 336 O 1 TX 337 0 Z
+bit 335 I 1 TX
+bit 334 C 0 *
+bit 333 O 1 RSCLK1 334 0 Z
+bit 332 I 1 RSCLK1
+bit 331 C 0 *
+bit 330 O 1 RFS1 331 0 Z
+bit 329 I 1 RFS1
+bit 328 C 0 *
+bit 327 O 1 DR1SEC 328 0 Z
+bit 326 I 1 DR1SEC
+bit 325 C 0 *
+bit 324 O 1 DR1PRI 325 0 Z
+bit 323 I 1 DR1PRI
+bit 322 C 0 *
+bit 321 O 1 TSCLK1 322 0 Z
+bit 320 I 1 TSCLK1
+bit 319 C 0 *
+bit 318 O 1 TFS1 319 0 Z
+bit 317 I 1 TFS1
+bit 316 C 0 *
+bit 315 O 1 DT1SEC 316 0 Z
+bit 314 I 1 DT1SEC
+bit 313 C 0 *
+bit 312 O 1 DT1PRI 313 0 Z
+bit 311 I 1 DT1PRI
+bit 310 C 0 *
+bit 309 O 1 RSCLK0 310 0 Z
+bit 308 I 1 RSCLK0
+bit 307 C 0 *
+bit 306 O 1 RFS0 307 0 Z
+bit 305 I 1 RFS0
+bit 304 C 0 *
+bit 303 O 1 DR0SEC 304 0 Z
+bit 302 I 1 DR0SEC
+bit 301 C 0 *
+bit 300 O 1 DR0PRI 301 0 Z
+bit 299 I 1 DR0PRI
+bit 298 C 0 *
+bit 297 O 1 TSCLK0 298 0 Z
+bit 296 I 1 TSCLK0
+bit 295 C 0 *
+bit 294 O 1 TFS0 295 0 Z
+bit 293 I 1 TFS0
+bit 292 C 0 *
+bit 291 O 1 DT0SEC 292 0 Z
+bit 290 I 1 DT0SEC
+bit 289 C 0 *
+bit 288 O 1 DT0PRI 289 0 Z
+bit 287 I 1 DT0PRI
+bit 286 O 1 DATA31 254 0 Z
+bit 285 I 1 DATA31
+bit 284 O 1 DATA30 254 0 Z
+bit 283 I 1 DATA30
+bit 282 O 1 DATA29 254 0 Z
+bit 281 I 1 DATA29
+bit 280 O 1 DATA28 254 0 Z
+bit 279 I 1 DATA28
+bit 278 O 1 DATA27 254 0 Z
+bit 277 I 1 DATA27
+bit 276 O 1 DATA26 254 0 Z
+bit 275 I 1 DATA26
+bit 274 O 1 DATA25 254 0 Z
+bit 273 I 1 DATA25
+bit 272 O 1 DATA24 254 0 Z
+bit 271 I 1 DATA24
+bit 270 O 1 DATA23 254 0 Z
+bit 269 I 1 DATA23
+bit 268 O 1 DATA22 254 0 Z
+bit 267 I 1 DATA22
+bit 266 O 1 DATA21 254 0 Z
+bit 265 I 1 DATA21
+bit 264 O 1 DATA20 254 0 Z
+bit 263 I 1 DATA20
+bit 262 O 1 DATA19 254 0 Z
+bit 261 I 1 DATA19
+bit 260 O 1 DATA18 254 0 Z
+bit 259 I 1 DATA18
+bit 258 O 1 DATA17 254 0 Z
+bit 257 I 1 DATA17
+bit 256 O 1 DATA16 254 0 Z
+bit 255 I 1 DATA16
+bit 254 C 0 *
+bit 253 O 1 DATA15 221 0 Z
+bit 252 I 1 DATA15
+bit 251 O 1 DATA14 221 0 Z
+bit 250 I 1 DATA14
+bit 249 O 1 DATA13 221 0 Z
+bit 248 I 1 DATA13
+bit 247 O 1 DATA12 221 0 Z
+bit 246 I 1 DATA12
+bit 245 O 1 DATA11 221 0 Z
+bit 244 I 1 DATA11
+bit 243 O 1 DATA10 221 0 Z
+bit 242 I 1 DATA10
+bit 241 O 1 DATA9 221 0 Z
+bit 240 I 1 DATA9
+bit 239 O 1 DATA8 221 0 Z
+bit 238 I 1 DATA8
+bit 237 O 1 DATA7 221 0 Z
+bit 236 I 1 DATA7
+bit 235 O 1 DATA6 221 0 Z
+bit 234 I 1 DATA6
+bit 233 O 1 DATA5 221 0 Z
+bit 232 I 1 DATA5
+bit 231 O 1 DATA4 221 0 Z
+bit 230 I 1 DATA4
+bit 229 O 1 DATA3 221 0 Z
+bit 228 I 1 DATA3
+bit 227 O 1 DATA2 221 0 Z
+bit 226 I 1 DATA2
+bit 225 O 1 DATA1 221 0 Z
+bit 224 I 1 DATA1
+bit 223 O 1 DATA0 221 0 Z
+bit 222 I 1 DATA0
+bit 221 C 0 *
+bit 220 O 1 ADDR2 219 0 Z
+bit 219 C 0 *
+bit 218 O 1 ADDR3 219 0 Z
+bit 217 O 1 ADDR4 219 0 Z
+bit 216 O 1 ADDR5 219 0 Z
+bit 215 O 1 ADDR6 219 0 Z
+bit 214 O 1 ADDR7 219 0 Z
+bit 213 O 1 ADDR8 219 0 Z
+bit 212 O 1 ABE_B3 219 0 Z
+bit 211 O 1 ABE_B2 219 0 Z
+bit 210 O 1 ABE_B1 219 0 Z
+bit 209 O 1 ABE_B0 219 0 Z
+bit 208 O 1 BGH_B
+bit 207 O 1 BG_B
+bit 206 I 1 BR_B
+bit 205 O 1 SA10 194 0 Z
+bit 204 O 1 SCLK1 194 0 Z
+bit 203 O 1 SCLK0 194 0 Z
+bit 202 O 1 SWE_B 194 0 Z
+bit 201 O 1 SCAS_B 194 0 Z
+bit 200 O 1 SCKE 194 0 Z
+bit 199 O 1 SRAS_B 194 0 Z
+bit 198 O 1 SMS_B3 194 0 Z
+bit 197 O 1 SMS_B2 194 0 Z
+bit 196 O 1 SMS_B1 194 0 Z
+bit 195 O 1 SMS_B0 194 0 Z
+bit 194 C 0 *
+bit 193 I 1 ARDY
+bit 192 O 1 ARE_B 189 0 Z
+bit 191 O 1 AOE_B 189 0 Z
+bit 190 O 1 AWE_B 189 0 Z
+bit 189 C 0 *
+bit 188 O 1 AMS_B0 189 0 Z
+bit 187 O 1 AMS_B1 189 0 Z
+bit 186 O 1 AMS_B2 189 0 Z
+bit 185 O 1 AMS_B3 189 0 Z
+bit 184 O 1 ADDR9 175 0 Z
+bit 183 O 1 ADDR10 175 0 Z
+bit 182 O 1 ADDR11 175 0 Z
+bit 181 O 1 ADDR12 175 0 Z
+bit 180 O 1 ADDR13 175 0 Z
+bit 179 O 1 ADDR14 175 0 Z
+bit 178 O 1 ADDR15 175 0 Z
+bit 177 O 1 ADDR16 175 0 Z
+bit 176 O 1 ADDR17 175 0 Z
+bit 175 C 0 *
+bit 174 O 1 ADDR18 175 0 Z
+bit 173 O 1 ADDR19 175 0 Z
+bit 172 O 1 ADDR20 175 0 Z
+bit 171 O 1 ADDR21 175 0 Z
+bit 170 O 1 ADDR22 175 0 Z
+bit 169 O 1 ADDR23 175 0 Z
+bit 168 O 1 ADDR24 175 0 Z
+bit 167 O 1 ADDR25 175 0 Z
+bit 166 I 1 PPI2_CLK
+bit 165 I 1 PPI1_CLK
+bit 164 C 0 *
+bit 163 O 1 PPI1_SYNC3 164 0 Z
+bit 162 I 1 PPI1_SYNC3
+bit 161 C 0 *
+bit 160 O 1 PPI1_SYNC2 161 0 Z
+bit 159 I 1 PPI1_SYNC2
+bit 158 C 0 *
+bit 157 O 1 PPI1_SYNC1 158 0 Z
+bit 156 I 1 PPI1_SYNC1
+bit 155 C 0 *
+bit 154 O 1 PPI1_DATA15 155 0 Z
+bit 153 I 1 PPI1_DATA15
+bit 152 C 0 *
+bit 151 O 1 PPI1_DATA14 152 0 Z
+bit 150 I 1 PPI1_DATA14
+bit 149 C 0 *
+bit 148 O 1 PPI1_DATA13 149 0 Z
+bit 147 I 1 PPI1_DATA13
+bit 146 C 0 *
+bit 145 O 1 PPI1_DATA12 146 0 Z
+bit 144 I 1 PPI1_DATA12
+bit 143 C 0 *
+bit 142 O 1 PPI1_DATA11 143 0 Z
+bit 141 I 1 PPI1_DATA11
+bit 140 C 0 *
+bit 139 O 1 PPI1_DATA10 140 0 Z
+bit 138 I 1 PPI1_DATA10
+bit 137 I 1 RESET_B
+bit 136 I 1 BY_PASS
+bit 135 C 0 *
+bit 134 O 1 PPI1_DATA9 135 0 Z
+bit 133 I 1 PPI1_DATA9
+bit 132 C 0 *
+bit 131 O 1 PPI1_DATA8 132 0 Z
+bit 130 I 1 PPI1_DATA8
+bit 129 C 0 *
+bit 128 O 1 PPI1_DATA7 129 0 Z
+bit 127 I 1 PPI1_DATA7
+bit 126 C 0 *
+bit 125 O 1 PPI1_DATA6 126 0 Z
+bit 124 I 1 PPI1_DATA6
+bit 123 C 0 *
+bit 122 O 1 PPI1_DATA5 123 0 Z
+bit 121 I 1 PPI1_DATA5
+bit 120 C 0 *
+bit 119 O 1 PPI1_DATA4 120 0 Z
+bit 118 I 1 PPI1_DATA4
+bit 117 C 0 *
+bit 116 O 1 PPI1_DATA3 117 0 Z
+bit 115 I 1 PPI1_DATA3
+bit 114 C 0 *
+bit 113 O 1 PPI1_DATA2 114 0 Z
+bit 112 I 1 PPI1_DATA2
+bit 111 C 0 *
+bit 110 O 1 PPI1_DATA1 111 0 Z
+bit 109 I 1 PPI1_DATA1
+bit 108 C 0 *
+bit 107 O 1 PPI1_DATA0 108 0 Z
+bit 106 I 1 PPI1_DATA0
+bit 105 C 0 *
+bit 104 O 1 PPI2_SYNC3 105 0 Z
+bit 103 I 1 PPI2_SYNC3
+bit 102 C 0 *
+bit 101 O 1 PPI2_SYNC2 102 0 Z
+bit 100 I 1 PPI2_SYNC2
+bit 99 C 0 *
+bit 98 O 1 PPI2_SYNC1 99 0 Z
+bit 97 I 1 PPI2_SYNC1
+bit 96 C 0 *
+bit 95 O 1 PPI2_DATA15 96 0 Z
+bit 94 I 1 PPI2_DATA15
+bit 93 C 0 *
+bit 92 O 1 PPI2_DATA14 93 0 Z
+bit 91 I 1 PPI2_DATA14
+bit 90 C 0 *
+bit 89 O 1 PPI2_DATA13 90 0 Z
+bit 88 I 1 PPI2_DATA13
+bit 87 C 0 *
+bit 86 O 1 PPI2_DATA12 87 0 Z
+bit 85 I 1 PPI2_DATA12
+bit 84 C 0 *
+bit 83 O 1 PPI2_DATA11 84 0 Z
+bit 82 I 1 PPI2_DATA11
+bit 81 C 0 *
+bit 80 O 1 PPI2_DATA10 81 0 Z
+bit 79 I 1 PPI2_DATA10
+bit 78 C 0 *
+bit 77 O 1 PPI2_DATA9 78 0 Z
+bit 76 I 1 PPI2_DATA9
+bit 75 C 0 *
+bit 74 O 1 PPI2_DATA8 75 0 Z
+bit 73 I 1 PPI2_DATA8
+bit 72 C 0 *
+bit 71 O 1 PPI2_DATA7 72 0 Z
+bit 70 I 1 PPI2_DATA7
+bit 69 C 0 *
+bit 68 O 1 PPI2_DATA6 69 0 Z
+bit 67 I 1 PPI2_DATA6
+bit 66 C 0 *
+bit 65 O 1 PPI2_DATA5 66 0 Z
+bit 64 I 1 PPI2_DATA5
+bit 63 C 0 *
+bit 62 O 1 PPI2_DATA4 63 0 Z
+bit 61 I 1 PPI2_DATA4
+bit 60 C 0 *
+bit 59 O 1 PPI2_DATA3 60 0 Z
+bit 58 I 1 PPI2_DATA3
+bit 57 C 0 *
+bit 56 O 1 PPI2_DATA2 57 0 Z
+bit 55 I 1 PPI2_DATA2
+bit 54 C 0 *
+bit 53 O 1 PPI2_DATA1 54 0 Z
+bit 52 I 1 PPI2_DATA1
+bit 51 C 0 *
+bit 50 O 1 PPI2_DATA0 51 0 Z
+bit 49 I 1 PPI2_DATA0
+bit 48 C 0 *
+bit 47 O 1 PF0 48 0 Z
+bit 46 I 1 PF0
+bit 45 C 0 *
+bit 44 O 1 PF1 45 0 Z
+bit 43 I 1 PF1
+bit 42 C 0 *
+bit 41 O 1 PF2 42 0 Z
+bit 40 I 1 PF2
+bit 39 C 0 *
+bit 38 O 1 PF3 39 0 Z
+bit 37 I 1 PF3
+bit 36 C 0 *
+bit 35 O 1 PF4 36 0 Z
+bit 34 I 1 PF4
+bit 33 C 0 *
+bit 32 O 1 PF5 33 0 Z
+bit 31 I 1 PF5
+bit 30 C 0 *
+bit 29 O 1 PF6 30 0 Z
+bit 28 I 1 PF6
+bit 27 C 0 *
+bit 26 O 1 PF7 27 0 Z
+bit 25 I 1 PF7
+bit 24 C 0 *
+bit 23 O 1 PF8 24 0 Z
+bit 22 I 1 PF8
+bit 21 C 0 *
+bit 20 O 1 PF9 21 0 Z
+bit 19 I 1 PF9
+bit 18 C 0 *
+bit 17 O 1 PF10 18 0 Z
+bit 16 I 1 PF10
+bit 15 C 0 *
+bit 14 O 1 PF11 15 0 Z
+bit 13 I 1 PF11
+bit 12 C 0 *
+bit 11 O 1 PF12 12 0 Z
+bit 10 I 1 PF12
+bit 9 C 0 *
+bit 8 O 1 PF13 9 0 Z
+bit 7 I 1 PF13
+bit 6 C 0 *
+bit 5 O 1 PF14 6 0 Z
+bit 4 I 1 PF14
+bit 3 C 0 *
+bit 2 O 1 PF15 3 0 Z
+bit 1 I 1 PF15
+bit 0 I 1 NMI_1

sie_fs/usr/local/share/urjtag/analog/sharc21065l/STEPPINGS

@@ -0,0 +1,32 @@
+#
+# $Id: STEPPINGS v 1.0 20/09/2006 $
+#
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+#       [1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+#
+#
+# bits 31-28 of the Device Identification Register
+0000    sharc21065l		0
+0001    sharc21065l		1
+0010	sharc21065l		2
+0011	sharc21065l		3
+

sie_fs/usr/local/share/urjtag/analog/sharc21065l/sharc21065l

@@ -0,0 +1,515 @@
+#
+# $Id: sharc21065l,v 1.0 20/09/2006 $
+#
+# JTAG declarations for ADSP SHARC 21065L
+# Copyright (C) 2006 Kila Medical Systems.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+#
+# Written by Lesly A.M <leslyam@kila.com>, 2006
+#
+# Documentation:
+#	[1] Analog Devices Inc.,"ADSP-21065L SHARC Technical Reference", September 1998
+#	[2] Analog Devices Inc.,"BSDL Description for ADSP-21065L: MBGA Package", BSDL rev 1.1
+#   http://www.analog.com/UploadedFiles/BSDL_Files/435954194035486111591903bsdl_21065l_bga.txt
+#
+#
+
+
+signal ADDR0
+signal ADDR1
+signal ADDR2
+signal ADDR3
+signal ADDR4
+signal ADDR5
+signal ADDR6
+signal ADDR7
+signal ADDR8
+signal ADDR9
+signal ADDR10
+signal ADDR11
+signal ADDR12
+signal ADDR13
+signal ADDR14
+signal ADDR15
+signal ADDR16
+signal ADDR17
+signal ADDR18
+signal ADDR19
+signal ADDR20
+signal ADDR21
+signal ADDR22
+signal ADDR23
+signal DATA0
+signal DATA1
+signal DATA2
+signal DATA3
+signal DATA4
+signal DATA5
+signal DATA6
+signal DATA7
+signal DATA8
+signal DATA9
+signal DATA10
+signal DATA11
+signal DATA12
+signal DATA13
+signal DATA14
+signal DATA15
+signal DATA16
+signal DATA17
+signal DATA18
+signal DATA19
+signal DATA20
+signal DATA21
+signal DATA22
+signal DATA23
+signal DATA24
+signal DATA25
+signal DATA26
+signal DATA27
+signal DATA28
+signal DATA29
+signal DATA30
+signal DATA31
+signal MS0
+signal MS1
+signal MS2
+signal MS3
+signal RD_B
+signal WR_B
+signal SW_B
+signal ACK
+signal TS_B
+signal IRQ0_B
+signal IRQ1_B
+signal IRQ2_B
+signal FLAG0
+signal FLAG1
+signal FLAG2
+signal FLAG3
+signal FLAG4
+signal FLAG5
+signal FLAG6
+signal FLAG7
+signal FLAG8
+signal FLAG9
+signal FLAG10
+signal FLAG11
+signal HBR_B
+signal HBG_B
+signal CS_B
+signal REDY
+signal DMAR1_B
+signal DMAR2_B
+signal DMAG1_B
+signal DMAG2_B
+signal BR1
+signal BR2
+signal ID0
+signal ID1
+signal CPA_B
+signal DT0A
+signal DT0B
+signal DR0A
+signal DR0B
+signal TCLK0
+signal RCLK0
+signal TFS0
+signal RFS0
+signal DT1A
+signal DT1B
+signal DR1A
+signal DR1B
+signal TCLK1
+signal RCLK1
+signal TFS1
+signal RFS1
+signal BSEL
+signal BMS_B
+signal CLKIN
+signal RESET_B
+signal TCK
+signal TMS
+signal TDI
+signal TDO
+signal TRST
+signal EMU
+signal BMSTR
+signal SDWE_B
+signal SDA10
+signal CAS_B
+signal RAS_B
+signal DQM
+signal SDCKE
+signal SDCLK0
+signal SDCLK1
+signal PWM_EVENT0
+signal PWM_EVENT1
+signal VDD0
+signal VDD1
+signal VDD2
+signal VDD3
+signal VDD4
+signal VDD5
+signal VDD6
+signal VDD7
+signal VDD8
+signal VDD9
+signal VDD10
+signal VDD11
+signal VDD12
+signal VDD13
+signal VDD14
+signal VDD15
+signal VDD16
+signal VDD17
+signal VDD18
+signal VDD19
+signal VDD20
+signal VDD21
+signal GND0
+signal GND1
+signal GND2
+signal GND3
+signal GND4
+signal GND5
+signal GND6
+signal GND7
+signal GND8
+signal GND9
+signal GND10
+signal GND11
+signal GND12
+signal GND13
+signal GND14
+signal GND15
+signal GND16
+signal GND17
+signal GND18
+signal GND19
+signal GND20
+signal GND21
+signal GND22
+signal GND23
+signal GND24
+signal GND25
+signal GND26
+signal GND27
+signal GND28
+signal GND29
+signal GND30
+signal GND31
+signal GND32
+signal GND33
+
+register	BSR	285
+register	BR	1
+register	DIR	32
+
+instruction length 5
+
+instruction BYPASS 11111 BR
+instruction EXTEST 00000 BSR
+instruction SAMPLE/PRELOAD 10000 BSR
+
+bit 284 O 1 EMU 278 0 Z
+bit 283 I 1 ID0
+bit 282 I 1 ID1
+bit 281 O 1 *
+bit 280 O 1 *
+bit 279 O 1 *
+bit 278 C 0 *
+bit 277 C 0 *
+bit 276 I 1 FLAG4
+bit 275 O 1 FLAG4 277 0 Z
+bit 274 I 1 FLAG5
+bit 273 O 1 FLAG5 270 0 Z
+bit 272 I 1 FLAG6
+bit 271 O 1 FLAG6 269 0 Z
+bit 270 C 0 *
+bit 269 C 0 *
+bit 268 C 0 *
+bit 267 I 1 FLAG7
+bit 266 O 1 FLAG7 268 0 Z
+bit 265 I 1 DATA31
+bit 264 O 1 DATA31 243 0 Z
+bit 263 I 1 DATA30
+bit 262 O 1 DATA30 243 0 Z
+bit 261 I 1 DATA29
+bit 260 O 1 DATA29 243 0 Z
+bit 259 I 1 DATA28
+bit 258 O 1 DATA28 243 0 Z
+bit 257 I 1 DATA27
+bit 256 O 1 DATA27 243 0 Z
+bit 255 I 1 DATA26
+bit 254 O 1 DATA26 243 0 Z
+bit 253 I 1 DATA25
+bit 252 O 1 DATA25 243 0 Z
+bit 251 I 1 DATA24
+bit 250 O 1 DATA24 243 0 Z
+bit 249 I 1 DATA23
+bit 248 O 1 DATA23 243 0 Z
+bit 247 I 1 DATA22
+bit 246 O 1 DATA22 243 0 Z
+bit 245 I 1 DATA21
+bit 244 O 1 DATA21 243 0 Z
+bit 243 C 0 *
+bit 242 O 1 *
+bit 241 O 1 *
+bit 240 O 1 *
+bit 239 I 1 DATA20
+bit 238 O 1 DATA20 243 0 Z
+bit 237 I 1 DATA19
+bit 236 O 1 DATA19 243 0 Z
+bit 235 I 1 DATA18
+bit 234 O 1 DATA18 243 0 Z
+bit 233 I 1 DATA17
+bit 232 O 1 DATA17 243 0 Z
+bit 231 I 1 DATA16
+bit 230 O 1 DATA16 243 0 Z
+bit 229 I 1 DATA15
+bit 228 O 1 DATA15 243 0 Z
+bit 227 I 1 DATA14
+bit 226 O 1 DATA14 243 0 Z
+bit 225 O 1 *
+bit 224 O 1 *
+bit 223 O 1 *
+bit 222 O 1 *
+bit 221 O 1 *
+bit 220 O 1 *
+bit 219 I 1 DATA13
+bit 218 O 1 DATA13 209 0 Z
+bit 217 I 1 DATA12
+bit 216 O 1 DATA12 209 0 Z
+bit 215 I 1 DATA11
+bit 214 O 1 DATA11 209 0 Z
+bit 213 I 1 DATA10
+bit 212 O 1 DATA10 209 0 Z
+bit 211 I 1 DATA9
+bit 210 O 1 DATA9 209 0 Z
+bit 209 C 0 *
+bit 208 I 1 DATA8
+bit 207 O 1 DATA8 209 0 Z
+bit 206 I 1 DATA7
+bit 205 O 1 DATA7 209 0 Z
+bit 204 I 1 DATA6
+bit 203 O 1 DATA6 209 0 Z
+bit 202 I 1 DATA5
+bit 201 O 1 DATA5 209 0 Z
+bit 200 I 1 DATA4
+bit 199 O 1 DATA4 209 0 Z
+bit 198 I 1 DATA3
+bit 197 O 1 DATA3 209 0 Z
+bit 196 I 1 DATA2
+bit 195 O 1 DATA2 209 0 Z
+bit 194 I 1 DATA1
+bit 193 O 1 DATA1 209 0 Z
+bit 192 I 1 DATA0
+bit 191 O 1 DATA0 209 0 Z
+bit 190 C 0 *
+bit 189 I 1 FLAG8
+bit 188 O 1 FLAG8 190 0 Z
+bit 187 I 1 FLAG9
+bit 186 O 1 FLAG9 183 0 Z
+bit 185 I 1 FLAG10
+bit 184 O 1 FLAG10 182 0 Z
+bit 183 C 0 *
+bit 182 C 0 *
+bit 181 C 0 *
+bit 180 I 1 FLAG11
+bit 179 O 1 FLAG11 181 0 Z
+bit 178 I 1 MS3
+bit 177 O 1 MS3 153 0 Z
+bit 176 I 1 MS2
+bit 175 O 1 MS2 153 0 Z
+bit 174 I 1 MS1
+bit 173 O 1 MS1 153 0 Z
+bit 172 I 1 MS0
+bit 171 O 1 MS0 153 0 Z
+bit 170 I 1 ACK
+bit 169 O 1 ACK 167 0 Z
+bit 168 O 1 *
+bit 167 C 0 *
+bit 166 I 1 CPA_B
+bit 165 O 1 CPA_B 165 1 Z
+bit 164 I 1 SW_B
+bit 163 O 1 SW_B 153 0 Z
+bit 162 O 1 REDY 161 0 Z
+bit 161 C 0 *
+bit 160 I 1 RD_B
+bit 159 O 1 RD_B 153 0 Z
+bit 158 I 1 WR_B
+bit 157 O 1 WR_B 153 0 Z
+bit 156 O 1 *
+bit 155 I 1 TS_B
+bit 154 I 1 CS_B
+bit 153 C 0 *
+bit 152 O 1 BMSTR
+bit 151 I 1 HBG_B
+bit 150 O 1 HBG_B 147 0 Z
+bit 149 O 1 DMAG2_B 153 0 Z
+bit 148 O 1 DMAG1_B 153 0 Z
+bit 147 C 0 *
+bit 146 O 1 SDA10 131 0 Z
+bit 145 I 1 SDCKE
+bit 144 O 1 SDCKE 131 0 Z
+bit 143 O 1 DQM 131 0 Z
+bit 142 I 1 SDWE_B
+bit 141 O 1 SDWE_B 131 0 Z
+bit 140 I 1 CAS_B
+bit 139 O 1 CAS_B 131 0 Z
+bit 138 I 1 RAS_B
+bit 137 O 1 RAS_B 131 0 Z
+bit 136 I 1 HBR_B
+bit 135 I 1 DMAR2_B
+bit 134 I 1 DMAR1_B
+bit 133 I 1 SDCLK0
+bit 132 O 1 SDCLK0 131 0 Z
+bit 131 C 0 *
+bit 130 I 1 SDCLK1
+bit 129 O 1 SDCLK1 128 0 Z
+bit 128 C 0 *
+bit 127 I 1 CLKIN
+bit 126 I 1 BR2
+bit 125 O 1 BR2 120 0 Z
+bit 124 I 1 BR1
+bit 123 O 1 BR1 119 0 Z
+bit 122 I 1 PWM_EVENT0
+bit 121 O 1 PWM_EVENT0 118 0 Z
+bit 120 C 0 *
+bit 119 C 0 *
+bit 118 C 0 *
+bit 117 C 0 *
+bit 116 I 1 PWM_EVENT1
+bit 115 O 1 PWM_EVENT1 117 0 Z
+bit 114 O 1 DT1B 112 0 Z
+bit 113 O 1 DT1A 111 0 Z
+bit 112 C 0 *
+bit 111 C 0 *
+bit 110 C 0 *
+bit 109 I 1 TCLK1
+bit 108 O 1 TCLK1 110 0 Z
+bit 107 I 1 TFS1
+bit 106 O 1 TFS1 101 0 Z
+bit 105 I 1 DR1B
+bit 104 I 1 DR1A
+bit 103 I 1 RCLK1
+bit 102 O 1 RCLK1 100 0 Z
+bit 101 C 0 *
+bit 100 C 0 *
+bit 99 C 0 *
+bit 98 I 1 RFS1
+bit 97 O 1 RFS1 99 0 Z
+bit 96 O 1 DT0B 94 0 Z
+bit 95 O 1 DT0A 93 0 Z
+bit 94 C 0 *
+bit 93 C 0 *
+bit 92 C 0 *
+bit 91 I 1 TCLK0
+bit 90 O 1 TCLK0 92 0 Z
+bit 89 I 1 TFS0
+bit 88 O 1 TFS0 83 0 Z
+bit 87 I 1 DR0B
+bit 86 I 1 DR0A
+bit 85 I 1 RCLK0
+bit 84 O 1 RCLK0 82 0 Z
+bit 83 C 0 *
+bit 82 C 0 *
+bit 81 C 0 *
+bit 80 I 1 RFS0
+bit 79 O 1 RFS0 81 0 Z
+bit 78 O 1 *
+bit 77 O 1 *
+bit 76 O 1 *
+bit 75 I 1 IRQ2_B
+bit 74 I 1 IRQ1_B
+bit 73 I 1 IRQ0_B
+bit 72 O 1 *
+bit 71 O 1 *
+bit 70 O 1 *
+bit 69 O 1 *
+bit 68 O 1 *
+bit 67 O 1 *
+bit 66 I 1 FLAG3
+bit 65 O 1 FLAG3 64 0 Z
+bit 64 C 0 *
+bit 63 C 0 *
+bit 62 I 1 FLAG2
+bit 61 O 1 FLAG2 63 0 Z
+bit 60 I 1 FLAG1
+bit 59 O 1 FLAG1 56 0 Z
+bit 58 I 1 FLAG0
+bit 57 O 1 FLAG0 55 0 Z
+bit 56 C 0 *
+bit 55 C 0 *
+bit 54 I 1 ADDR0
+bit 53 O 1 ADDR0 36 0 Z
+bit 52 I 1 ADDR1
+bit 51 O 1 ADDR1 36 0 Z
+bit 50 I 1 ADDR2
+bit 49 O 1 ADDR2 36 0 Z
+bit 48 I 1 ADDR3
+bit 47 O 1 ADDR3 36 0 Z
+bit 46 I 1 ADDR4
+bit 45 O 1 ADDR4 36 0 Z
+bit 44 I 1 ADDR5
+bit 43 O 1 ADDR5 36 0 Z
+bit 42 I 1 ADDR6
+bit 41 O 1 ADDR6 36 0 Z
+bit 40 I 1 ADDR7
+bit 39 O 1 ADDR7 36 0 Z
+bit 38 I 1 ADDR8
+bit 37 O 1 ADDR8 36 0 Z
+bit 36 C 0 *
+bit 35 I 1 ADDR9
+bit 34 O 1 ADDR9 36 0 Z
+bit 33 I 1 ADDR10
+bit 32 O 1 ADDR10 36 0 Z
+bit 31 I 1 ADDR11
+bit 30 O 1 ADDR11 36 0 Z
+bit 29 I 1 ADDR12
+bit 28 O 1 ADDR12 36 0 Z
+bit 27 I 1 ADDR13
+bit 26 O 1 ADDR13 36 0 Z
+bit 25 I 1 ADDR14
+bit 24 O 1 ADDR14 36 0 Z
+bit 23 I 1 ADDR15
+bit 22 O 1 ADDR15 36 0 Z
+bit 21 I 1 ADDR16
+bit 20 O 1 ADDR16 36 0 Z
+bit 19 I 1 ADDR17
+bit 18 O 1 ADDR17 36 0 Z
+bit 17 I 1 ADDR18
+bit 16 O 1 ADDR18 36 0 Z
+bit 15 I 1 ADDR19
+bit 14 O 1 ADDR19 36 0 Z
+bit 13 I 1 ADDR20
+bit 12 O 1 ADDR20 36 0 Z
+bit 11 I 1 ADDR21
+bit 10 O 1 ADDR21 36 0 Z
+bit 9 I 1 ADDR22
+bit 8 O 1 ADDR22 36 0 Z
+bit 7 I 1 ADDR23
+bit 6 O 1 ADDR23 36 0 Z
+bit 5 I 1 RESET_B
+bit 4 C 0 *
+bit 3 O 1 *
+bit 2 I 1 BMS_B
+bit 1 O 1 BMS_B 4 0 Z
+bit 0 I 1 BSEL
+
+initbus SHARC_21065L