mirror of
git://projects.qi-hardware.com/nn-usb-fpga.git
synced 2025-01-06 15:20:14 +02:00
Adding u-boot patch
This commit is contained in:
Carlos Camargo
parent
a4dfb2eb9d
commit
f8f81c4541
920
u-boot_sakc/0003-add-sack-support.patch
Normal file
920
u-boot_sakc/0003-add-sack-support.patch
Normal file
@ -0,0 +1,920 @@
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diff -urN a/board/qi_lb60/config.mk b/board/qi_lb60/config.mk
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--- a/board/qi_lb60/config.mk 2010-02-24 23:28:04.093795814 -0500
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+++ b/board/qi_lb60/config.mk 2010-02-24 20:51:12.581795112 -0500
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@@ -19,7 +19,7 @@
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#
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#
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-# Qi Hardware, Inc. Ben NanoNote (QI_LB60)
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+# SACK Board
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#
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ifndef TEXT_BASE
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diff -urN a/board/sack/config.mk b/board/sack/config.mk
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--- a/board/sack/config.mk 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/config.mk 2010-02-24 20:51:04.189295427 -0500
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@@ -0,0 +1,31 @@
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+#
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+# (C) Copyright 2006 Qi Hardware, Inc.
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+# Author: Xiangfu Liu <xiangfu.z@gmail.com>
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+#
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+# This program is free software; you can redistribute it and/or
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+# modify it under the terms of the GNU General Public License as
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+# published by the Free Software Foundation; either version 2 of
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+# the License, or (at your option) any later version.
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+#
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+# This program is distributed in the hope that it will be useful,
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+# but WITHOUT ANY WARRANTY; without even the implied warranty of
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+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+# GNU General Public License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with this program; if not, write to the Free Software
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+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+# MA 02111-1307 USA
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+#
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+
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+#
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+# SACK Board
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+#
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+
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+ifndef TEXT_BASE
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+# ROM version
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+# TEXT_BASE = 0x88000000
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+
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+# RAM version
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+TEXT_BASE = 0x80100000
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+endif
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diff -urN a/board/sack/flash.c b/board/sack/flash.c
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--- a/board/sack/flash.c 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/flash.c 2010-02-24 20:51:55.173492988 -0500
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@@ -0,0 +1,50 @@
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+/*
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+ * (C) Copyright 2009 PI
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+ * xiangfu liu, <xiangfu@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 3 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <common.h>
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+
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+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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+
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+/*
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+ * flash_init()
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+ *
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+ * sets up flash_info and returns size of FLASH (bytes)
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+ */
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+unsigned long flash_init (void)
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+{
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+ return (0);
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+}
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+
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+int flash_erase (flash_info_t * info, int s_first, int s_last)
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+{
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+ printf ("flash_erase not implemented\n");
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+ return 0;
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+}
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+
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+void flash_print_info (flash_info_t * info)
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+{
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+ printf ("flash_print_info not implemented\n");
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+}
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+
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+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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+{
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+ printf ("write_buff not implemented\n");
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+ return (-1);
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+}
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diff -urN a/board/sack/Makefile b/board/sack/Makefile
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--- a/board/sack/Makefile 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/Makefile 2010-02-24 20:49:03.137972186 -0500
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@@ -0,0 +1,38 @@
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+#
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+# (C) Copyright 2006
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+# Ingenic Semiconductor, <jlwei@ingenic.cn>
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+#
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+# This program is free software; you can redistribute it and/or
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+# modify it under the terms of the GNU General Public License as
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+# published by the Free Software Foundation; either version 2 of
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+# the License, or (at your option) any later version.
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+#
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+# This program is distributed in the hope that it will be useful,
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+# but WITHOUT ANY WARRANTY; without even the implied warranty of
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+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+# GNU General Public License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with this program; if not, write to the Free Software
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+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+# MA 02111-1307 USA
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+#
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+
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+include $(TOPDIR)/config.mk
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+
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+LIB = lib$(BOARD).a
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+
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+OBJS = $(BOARD).o
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+SOBJS =
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+
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+$(LIB): .depend $(OBJS) $(SOBJS)
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+ $(AR) crv $@ $(OBJS) $(SOBJS)
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+
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+#########################################################################
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+
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+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
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+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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+
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+sinclude .depend
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+
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+#########################################################################
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diff -urN a/board/sack/sack.c b/board/sack/sack.c
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--- a/board/sack/sack.c 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/sack.c 2010-02-24 23:14:37.029795516 -0500
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@@ -0,0 +1,128 @@
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+/*
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+ * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 3 of the License, or (at your option) any later version.
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+ */
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+
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+#include <common.h>
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+#include <command.h>
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+#include <asm/mipsregs.h>
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+#include <asm/jz4740.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+static void gpio_init(void)
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+{
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+ /*
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+ * Initialize NAND Flash Pins
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+ */
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+ __gpio_as_nand();
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+
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+ /*
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+ * Initialize SDRAM pins
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+ */
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+ __gpio_as_sdram_16bit_4725();
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+
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+ /*
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+ * Initialize UART0 pins
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+ */
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+ __gpio_as_uart0();
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+
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+ /*
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+ * Initialize LCD pins
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+ */
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+ __gpio_as_lcd_18bit();
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+
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+ /*
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+ * Initialize MSC pins
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+ */
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+ __gpio_as_msc();
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+
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+ /*
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+ * Initialize LCD pins
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+ */
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+ __gpio_as_lcd_18bit();
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+
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+ /*
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+ * Initialize SSI pins
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+ */
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+ __gpio_as_ssi();
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+
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+ /*
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+ * Initialize I2C pins
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+ */
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+ __gpio_as_i2c();
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+
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+ /*
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+ * Initialize MSC pins
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+ */
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+ __gpio_as_msc();
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+
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+ /*
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+ * Initialize Other pins
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+ */
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+ /* TODO SACK
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+ unsigned int i;
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+ for (i = 0; i < 7; i++){
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+ __gpio_as_input(GPIO_KEYIN_BASE + i);
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+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
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+ }
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+
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+ for (i = 0; i < 8; i++) {
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+ __gpio_as_output(GPIO_KEYOUT_BASE + i);
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+ __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
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+ }
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+
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+ __gpio_as_output(GPIO_AUDIO_POP);
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+ __gpio_set_pin(GPIO_AUDIO_POP);
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+
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+ __gpio_as_output(GPIO_LCD_CS);
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+ __gpio_clear_pin(GPIO_LCD_CS);
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+
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+ __gpio_as_output(GPIO_AMP_EN);
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+ __gpio_clear_pin(GPIO_AMP_EN);
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+
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+ __gpio_as_output(GPIO_SDPW_EN);
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+ __gpio_disable_pull(GPIO_SDPW_EN);
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+ __gpio_clear_pin(GPIO_SDPW_EN);
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+
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+ __gpio_as_input(GPIO_SD_DETECT);
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+ __gpio_disable_pull(GPIO_SD_DETECT);
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+
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+ __gpio_as_input(GPIO_USB_DETECT);
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+ __gpio_enable_pull(GPIO_USB_DETECT);
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+ */
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+}
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+/* TODO SACK
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+static void cpm_init(void)
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+{
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+ __cpm_stop_ipu();
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+ __cpm_stop_cim();
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+ __cpm_stop_i2c();
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+ __cpm_stop_ssi();
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+ __cpm_stop_uart1();
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+ __cpm_stop_sadc();
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+ __cpm_stop_uhc();
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+ __cpm_stop_aic1();
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+ __cpm_stop_aic2();
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+}*/
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+
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+void board_early_init(void)
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+{
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+ gpio_init();
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+ //cpm_init(); //TODO SACK
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+}
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+
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+/* U-Boot common routines */
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+
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+int checkboard (void)
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+{
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+
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+ printf("Board: SACK (Ingenic XBurst Jz4725 SoC, Speed %d MHz)\n",
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+ gd->cpu_clk/1000000);
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+
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+ return 0; /* success */
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+}
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diff -urN a/board/sack/u-boot.lds b/board/sack/u-boot.lds
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--- a/board/sack/u-boot.lds 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/u-boot.lds 2010-02-24 21:05:10.189795324 -0500
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@@ -0,0 +1,63 @@
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+/*
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+ * (C) Copyright 2006
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+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
|
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
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+
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+OUTPUT_ARCH(mips)
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+ENTRY(_start)
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+SECTIONS
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+{
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+ . = 0x00000000;
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+
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+ . = ALIGN(4);
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+ .text :
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+ {
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+ *(.text)
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+ }
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+
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+ . = ALIGN(4);
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+ .rodata : { *(.rodata) }
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+
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+ . = ALIGN(4);
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+ .data : { *(.data) }
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+
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+ . = ALIGN(4);
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+ .sdata : { *(.sdata) }
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+
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+ _gp = ALIGN(16);
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+
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+ __got_start = .;
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+ .got : { *(.got) }
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+ __got_end = .;
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+
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+ .sdata : { *(.sdata) }
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+
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+ __u_boot_cmd_start = .;
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+ .u_boot_cmd : { *(.u_boot_cmd) }
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+ __u_boot_cmd_end = .;
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+
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+ uboot_end_data = .;
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+ num_got_entries = (__got_end - __got_start) >> 2;
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+
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+ . = ALIGN(4);
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+ .sbss : { *(.sbss) }
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+ .bss : { *(.bss) }
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+ uboot_end = .;
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+}
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diff -urN a/board/sack/u-boot-nand.lds b/board/sack/u-boot-nand.lds
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--- a/board/sack/u-boot-nand.lds 1969-12-31 19:00:00.000000000 -0500
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+++ b/board/sack/u-boot-nand.lds 2010-02-24 21:04:07.737295583 -0500
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@@ -0,0 +1,63 @@
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+/*
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+ * (C) Copyright 2006
|
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+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
|
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+ *
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of
|
||||
+ * the License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
+ * MA 02111-1307 USA
|
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+ */
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+
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+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
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+
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+OUTPUT_ARCH(mips)
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+ENTRY(_start)
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+SECTIONS
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+{
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+ . = 0x00000000;
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+
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+ . = ALIGN(4);
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+ .text :
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+ {
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+ *(.text)
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+ }
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+
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+ . = ALIGN(4);
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+ .rodata : { *(.rodata) }
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+
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+ . = ALIGN(4);
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+ .data : { *(.data) }
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+
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+ . = ALIGN(4);
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+ .sdata : { *(.sdata) }
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+
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+ _gp = ALIGN(16);
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+
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+ __got_start = .;
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+ .got : { *(.got) }
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+ __got_end = .;
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+
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+ .sdata : { *(.sdata) }
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+
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+ __u_boot_cmd_start = .;
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+ .u_boot_cmd : { *(.u_boot_cmd) }
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+ __u_boot_cmd_end = .;
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+
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+ uboot_end_data = .;
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+ num_got_entries = (__got_end - __got_start) >> 2;
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+
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+ . = ALIGN(4);
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+ .sbss : { *(.sbss) }
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+ .bss : { *(.bss) }
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+ uboot_end = .;
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+}
|
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diff -urN a/cpu/mips/jz_lcd.c b/cpu/mips/jz_lcd.c
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--- a/cpu/mips/jz_lcd.c 2010-02-24 23:28:04.093795814 -0500
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+++ b/cpu/mips/jz_lcd.c 2010-02-24 21:33:07.913295513 -0500
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@@ -109,7 +109,7 @@
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#if defined(CONFIG_PAVO)
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MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N,
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320, 240, 18, 110, 1, 1, 10, 50, 10, 13
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- #elif defined(CONFIG_QI_LB60)
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+ #elif defined(CONFIG_QI_LB60||CONFIG_SACK)
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MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
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320, 240, 32, 70, 1, 1, 273, 140, 1, 20
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#else /* defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && (!defined(CONFIG_PAVO)) */
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diff -urN a/cpu/mips/jz_lcd.h b/cpu/mips/jz_lcd.h
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--- a/cpu/mips/jz_lcd.h 2010-02-24 23:28:04.093795814 -0500
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+++ b/cpu/mips/jz_lcd.h 2010-02-24 21:36:21.789795795 -0500
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@@ -59,7 +59,7 @@
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#if defined(CONFIG_PAVO)
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#define CONFIG_MIPS_JZ4740_PAVO 1
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#endif
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-#if defined(CONFIG_QI_LB60)
|
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+#if defined(CONFIG_QI_LB60 || CONFIG_SACK)
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#define CONFIG_MIPS_JZ4740_PI 1
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#endif
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#if defined(CONFIG_VIRGO)
|
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@@ -364,7 +364,7 @@
|
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__gpio_as_output(LCD_RET);\
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} while (0)
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|
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-#if defined(CONFIG_QI_LB60)
|
||||
+#if defined(CONFIG_QI_LB60 || CONFIG_SACK)
|
||||
#define __lcd_special_on() \
|
||||
do { \
|
||||
udelay(50);\
|
||||
diff -urN a/cpu/mips/Makefile b/cpu/mips/Makefile
|
||||
--- a/cpu/mips/Makefile 2010-02-24 23:28:04.109795399 -0500
|
||||
+++ b/cpu/mips/Makefile 2010-02-24 23:17:46.721295446 -0500
|
||||
@@ -36,7 +36,7 @@
|
||||
COBJS-$(CONFIG_JZSOC) += jz4740.o jz_serial.o jz_i2c.o jz_mmc.o jz4740_nand.o
|
||||
COBJS-$(CONFIG_DRIVER_CS8900) += jz_cs8900.o
|
||||
COBJS-$(CONFIG_QI_LB60) += qi_lb60_gpm940b0.o
|
||||
-
|
||||
+COBJS-$(CONFIG_SACK) += qi_lb60_gpm940b0.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
|
||||
diff -urN a/include/configs/sack.h b/include/configs/sack.h
|
||||
--- a/include/configs/sack.h 1969-12-31 19:00:00.000000000 -0500
|
||||
+++ b/include/configs/sack.h 2010-02-24 23:22:24.425295521 -0500
|
||||
@@ -0,0 +1,216 @@
|
||||
+/*
|
||||
+ * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License
|
||||
+ * as published by the Free Software Foundation; either version
|
||||
+ * 3 of the License, or (at your option) any later version.
|
||||
+ */
|
||||
+
|
||||
+/*
|
||||
+ * This file contains the configuration parameters for SACK.
|
||||
+ */
|
||||
+#ifndef __CONFIG_H
|
||||
+#define __CONFIG_H
|
||||
+
|
||||
+#define DEBUG
|
||||
+#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
|
||||
+#define CONFIG_JzRISC 1 /* JzRISC core */
|
||||
+#define CONFIG_JZSOC 1 /* Jz SoC */
|
||||
+#define CONFIG_JZ4725 1 /* Jz4725 SoC */
|
||||
+#define CONFIG_JZ4740 1 /* Jz4740 SoC */
|
||||
+#define CONFIG_SACK 1 /* SACK board */
|
||||
+
|
||||
+//#define CONFIG_LCD 1 /* LCD support */
|
||||
+//#define LCD_BPP LCD_COLOR32 /*5:18,24,32 bits per pixel */
|
||||
+//#define CONFIG_SYS_WHITE_ON_BLACK 1
|
||||
+
|
||||
+#define CONFIG_CPU_SPEED 336000000 /* CPU clock: 336 MHz */
|
||||
+#define CONFIG_EXTAL 12000000 /* EXTAL freq: 12 MHz */
|
||||
+#define CONFIG_SYS_HZ (CONFIG_EXTAL / 256) /* incrementer freq */
|
||||
+#define CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_CPU_SPEED
|
||||
+
|
||||
+#define CONFIG_SYS_UART_BASE UART0_BASE /* Base of the UART channel */
|
||||
+#define CONFIG_BAUDRATE 57600
|
||||
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
+
|
||||
+#define CONFIG_MMC 1
|
||||
+#define CONFIG_FAT 1
|
||||
+#define CONFIG_DOS_PARTITION 1
|
||||
+#define CONFIG_SKIP_LOWLEVEL_INIT 1
|
||||
+#define CONFIG_BOARD_EARLY_INIT_F 1
|
||||
+#define CONFIG_SYS_NO_FLASH 1
|
||||
+#define CONFIG_ENV_OVERWRITE 1
|
||||
+
|
||||
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAUL)
|
||||
+#define CONFIG_BOOTDELAY 3
|
||||
+#define CONFIG_BOOTFILE "uImage" /* file to load */
|
||||
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
|
||||
+#define CONFIG_EXTRA_ENV_SETTINGS 1
|
||||
+#define CONFIG_BOOTARGSFROMSD "mem=32M console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p1 rw rootwait"
|
||||
+#define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x200000;bootm"
|
||||
+
|
||||
+/*
|
||||
+ * Command line configuration.
|
||||
+ */
|
||||
+#define CONFIG_CMD_BDI /* bdinfo */
|
||||
+#define CONFIG_CMD_BOOTD /* bootd */
|
||||
+#define CONFIG_CMD_CONSOLE /* coninfo */
|
||||
+#define CONFIG_CMD_ECHO /* echo arguments */
|
||||
+#define CONFIG_CMD_IMI /* iminfo */
|
||||
+#define CONFIG_CMD_ITEST /* Integer (and string) test */
|
||||
+
|
||||
+#define CONFIG_CMD_LOADB /* loadb */
|
||||
+#define CONFIG_CMD_LOADS /* loads */
|
||||
+#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
|
||||
+#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
|
||||
+#define CONFIG_CMD_RUN /* run command in env variable */
|
||||
+#define CONFIG_CMD_SAVEENV /* saveenv */
|
||||
+#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
|
||||
+#define CONFIG_CMD_SOURCE /* "source" command support */
|
||||
+#define CONFIG_CMD_XIMG /* Load part of Multi Image */
|
||||
+
|
||||
+#define CONFIG_CMD_NAND
|
||||
+#define CONFIG_CMD_MMC
|
||||
+#define CONFIG_CMD_FAT
|
||||
+
|
||||
+/*
|
||||
+ * Serial download configuration
|
||||
+ */
|
||||
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
+#define CONFIG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
+
|
||||
+/*
|
||||
+ * Miscellaneous configurable options
|
||||
+ */
|
||||
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
+#define CONFIG_SYS_PROMPT "SACK# " /* Monitor Command Prompt */
|
||||
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
+/* Print Buffer Size */
|
||||
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
|
||||
+
|
||||
+#define CONFIG_SYS_MALLOC_LEN 128 * 1024
|
||||
+#define CONFIG_SYS_BOOTPARAMS_LEN 128 * 1024
|
||||
+
|
||||
+#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
|
||||
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
|
||||
+#define CONFIG_SYS_LOAD_ADDR 0x80600000 /* default load address */
|
||||
+#define CONFIG_SYS_MEMTEST_START 0x80100000
|
||||
+#define CONFIG_SYS_MEMTEST_END 0x80800000
|
||||
+
|
||||
+/*
|
||||
+ * Environment
|
||||
+ */
|
||||
+#define CONFIG_ENV_IS_IN_NAND 1 /* use NAND for environment vars */
|
||||
+
|
||||
+/*
|
||||
+ * NAND FLASH configuration
|
||||
+ */
|
||||
+/* NAND Boot config code */
|
||||
+#define JZ4740_NANDBOOT_CFG JZ4740_NANDBOOT_B8R3
|
||||
+
|
||||
+#define SACK_NAND_SIZE 1 /* if board nand flash is 1GB, set to 1
|
||||
+ * if board nand flash is 2GB, set to 2
|
||||
+ * for change the PAGE_SIZE and BLOCK_SIZE
|
||||
+ * will delete when there is no 1GB flash
|
||||
+ */
|
||||
+
|
||||
+#define CONFIG_NAND_PAGE_SIZE (2048 * SACK_NAND_SIZE)
|
||||
+/* nand chip block size */
|
||||
+#define CONFIG_NAND_BLOCK_SIZE (256 * SACK_NAND_SIZE << 10)
|
||||
+/* nand bad block was marked at this page in a block, start from 0 */
|
||||
+#define CONFIG_NAND_BADBLOCK_PAGE 127
|
||||
+/* ECC offset position in oob area, default value is 6 if it isn't defined */
|
||||
+#define CONFIG_NAND_ECC_POS (6 * SACK_NAND_SIZE)
|
||||
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
+#define NAND_MAX_CHIPS 1
|
||||
+#define CONFIG_SYS_NAND_BASE 0xB8000000
|
||||
+#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl.*/
|
||||
+#define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
|
||||
+
|
||||
+/*
|
||||
+ * IPL (Initial Program Loader, integrated inside CPU)
|
||||
+ * Will load first 8k from NAND (SPL) into cache and execute it from there.
|
||||
+ *
|
||||
+ * SPL (Secondary Program Loader)
|
||||
+ * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
|
||||
+ * has to fit into 8kByte. It sets up the CPU and configures the SDRAM
|
||||
+ * controller and the NAND controller so that the special U-Boot image can be
|
||||
+ * loaded from NAND to SDRAM.
|
||||
+ *
|
||||
+ * NUB (NAND U-Boot)
|
||||
+ * This NAND U-Boot (NUB) is a special U-Boot version which can be started
|
||||
+ * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
|
||||
+ *
|
||||
+ */
|
||||
+#define CONFIG_NAND_U_BOOT_DST 0x80100000 /* Load NUB to this addr */
|
||||
+#define CONFIG_NAND_U_BOOT_START CONFIG_NAND_U_BOOT_DST
|
||||
+/* Start NUB from this addr*/
|
||||
+
|
||||
+/*
|
||||
+ * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
|
||||
+ */
|
||||
+#define CONFIG_NAND_U_BOOT_OFFS (256 << 10) /* Offset to RAM U-Boot image */
|
||||
+#define CONFIG_NAND_U_BOOT_SIZE (512 << 10) /* Size of RAM U-Boot image */
|
||||
+
|
||||
+#define CONFIG_ENV_SIZE CONFIG_NAND_BLOCK_SIZE
|
||||
+#define CONFIG_ENV_OFFSET (CONFIG_NAND_BLOCK_SIZE + CONFIG_NAND_U_BOOT_SIZE + CONFIG_NAND_BLOCK_SIZE)
|
||||
+/* environment starts here */
|
||||
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
|
||||
+
|
||||
+/* in qi_lb60.h/config.mk TEXT_BAS = 0x88000000 */
|
||||
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
|
||||
+
|
||||
+/*
|
||||
+ * SDRAM Info.
|
||||
+ */
|
||||
+#define CONFIG_NR_DRAM_BANKS 1
|
||||
+
|
||||
+/* SDRAM paramters */
|
||||
+#define SDRAM_BW16 1 /* Data bus width: 0-32bit, 1-16bit */
|
||||
+#define SDRAM_BANK4 1 /* Banks each chip: 0-2bank, 1-4bank */
|
||||
+#define SDRAM_ROW 13 /* Row address: 11 to 13 */
|
||||
+#define SDRAM_COL 9 /* Column address: 8 to 12 */
|
||||
+#define SDRAM_CASL 2 /* CAS latency: 2 or 3 */
|
||||
+
|
||||
+/* SDRAM Timings, unit: ns */
|
||||
+#define SDRAM_TRAS 45 /* RAS# Active Time */
|
||||
+#define SDRAM_RCD 20 /* RAS# to CAS# Delay */
|
||||
+#define SDRAM_TPC 20 /* RAS# Precharge Time */
|
||||
+#define SDRAM_TRWL 7 /* Write Latency Time */
|
||||
+#define SDRAM_TREF 15625 /* Refresh period: 8192 cycles/64ms */
|
||||
+
|
||||
+/*
|
||||
+ * Cache Configuration
|
||||
+ */
|
||||
+#define CONFIG_SYS_DCACHE_SIZE 16384
|
||||
+#define CONFIG_SYS_ICACHE_SIZE 16384
|
||||
+#define CONFIG_SYS_CACHELINE_SIZE 32
|
||||
+
|
||||
+/*
|
||||
+ * GPIO definition
|
||||
+ */
|
||||
+#define GPIO_LCD_CS (2 * 32 + 21)
|
||||
+#define GPIO_DISP_OFF_N (3 * 32 + 21)
|
||||
+#define GPIO_PWM (3 * 32 + 27)
|
||||
+
|
||||
+#define GPIO_AMP_EN (3 * 32 + 4)
|
||||
+
|
||||
+#define GPIO_SDPW_EN (3 * 32 + 2)
|
||||
+#define GPIO_SD_DETECT (3 * 32 + 0)
|
||||
+
|
||||
+#define GPIO_USB_DETECT (3 * 32 + 27)
|
||||
+#define GPIO_BUZZ_PWM (3 * 32 + 28)
|
||||
+
|
||||
+#define GPIO_AUDIO_POP (1 * 32 + 29)
|
||||
+#define GPIO_COB_TEST (1 * 32 + 30)
|
||||
+
|
||||
+#define GPIO_KEYOUT_BASE (2 * 32 + 10)
|
||||
+#define GPIO_KEYIN_BASE (3 * 32 + 18)
|
||||
+#define GPIO_KEYIN_8 (3 * 32 + 26)
|
||||
+
|
||||
+#define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */
|
||||
+#define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */
|
||||
+
|
||||
+#endif /* __CONFIG_H */
|
||||
diff -urN a/Makefile b/Makefile
|
||||
--- a/Makefile 2010-02-24 23:28:04.109795399 -0500
|
||||
+++ b/Makefile 2010-02-24 22:01:28.269795702 -0500
|
||||
@@ -3448,6 +3448,13 @@
|
||||
@echo "TEXT_BASE = 0x80100000" > $(obj)board/qi_lb60/config.tmp
|
||||
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
||||
|
||||
+sack_config : unconfig
|
||||
+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
|
||||
+ @echo "Compile NAND boot image for SACK"
|
||||
+ @$(MKCONFIG) -a sack mips mips sack
|
||||
+ @echo "TEXT_BASE = 0x80100000" > $(obj)board/sack/config.tmp
|
||||
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
|
||||
+
|
||||
#########################################################################
|
||||
## MIPS64 5Kc
|
||||
#########################################################################
|
||||
diff -urN a/nand_spl/board/sack/config.mk b/nand_spl/board/sack/config.mk
|
||||
--- a/nand_spl/board/sack/config.mk 1969-12-31 19:00:00.000000000 -0500
|
||||
+++ b/nand_spl/board/sack/config.mk 2010-02-24 22:36:56.701295513 -0500
|
||||
@@ -0,0 +1,34 @@
|
||||
+#
|
||||
+# (C) Copyright 2006
|
||||
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
+#
|
||||
+# See file CREDITS for list of people who contributed to this
|
||||
+# project.
|
||||
+#
|
||||
+# This program is free software; you can redistribute it and/or
|
||||
+# modify it under the terms of the GNU General Public License as
|
||||
+# published by the Free Software Foundation; either version 2 of
|
||||
+# the License, or (at your option) any later version.
|
||||
+#
|
||||
+# This program is distributed in the hope that it will be useful,
|
||||
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+# GNU General Public License for more details.
|
||||
+#
|
||||
+# You should have received a copy of the GNU General Public License
|
||||
+# along with this program; if not, write to the Free Software
|
||||
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
+# MA 02111-1307 USA
|
||||
+#
|
||||
+#
|
||||
+# Ingenic JZ4740 Reference Platform
|
||||
+#
|
||||
+
|
||||
+#
|
||||
+# TEXT_BASE for SPL:
|
||||
+#
|
||||
+# On JZ4730 platforms the SPL is located at 0x80000000...0x80001000,
|
||||
+# in the first 4kBytes of memory space in cache. So we set
|
||||
+# TEXT_BASE to starting address in internal cache here.
|
||||
+#
|
||||
+TEXT_BASE = 0x80000000
|
||||
diff -urN a/nand_spl/board/sack/Makefile b/nand_spl/board/sack/Makefile
|
||||
--- a/nand_spl/board/sack/Makefile 1969-12-31 19:00:00.000000000 -0500
|
||||
+++ b/nand_spl/board/sack/Makefile 2010-02-24 21:48:24.097295400 -0500
|
||||
@@ -0,0 +1,104 @@
|
||||
+#
|
||||
+# (C) Copyright 2006
|
||||
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
+#
|
||||
+# See file CREDITS for list of people who contributed to this
|
||||
+# project.
|
||||
+#
|
||||
+# This program is free software; you can redistribute it and/or
|
||||
+# modify it under the terms of the GNU General Public License as
|
||||
+# published by the Free Software Foundation; either version 2 of
|
||||
+# the License, or (at your option) any later version.
|
||||
+#
|
||||
+# This program is distributed in the hope that it will be useful,
|
||||
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+# GNU General Public License for more details.
|
||||
+#
|
||||
+# You should have received a copy of the GNU General Public License
|
||||
+# along with this program; if not, write to the Free Software
|
||||
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
+# MA 02111-1307 USA
|
||||
+#
|
||||
+
|
||||
+include $(TOPDIR)/config.mk
|
||||
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
|
||||
+
|
||||
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
||||
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE)
|
||||
+AFLAGS += -DCONFIG_NAND_SPL
|
||||
+CFLAGS += -DCONFIG_NAND_SPL
|
||||
+
|
||||
+SOBJS = start.o usb_boot.o
|
||||
+COBJS = nand_boot_jz4740.o cpu.o jz4740.o jz_serial.o
|
||||
+
|
||||
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
+__OBJS := $(SOBJS) $(COBJS)
|
||||
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
|
||||
+
|
||||
+nandobj := $(OBJTREE)/nand_spl/
|
||||
+
|
||||
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
|
||||
+all: $(obj).depend $(ALL)
|
||||
+
|
||||
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin
|
||||
+ dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1
|
||||
+ cat $< $(nandobj)junk1 > $(nandobj)junk2
|
||||
+ dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3
|
||||
+ cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4
|
||||
+ dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5
|
||||
+ cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6
|
||||
+ dd bs=1024 count=256 if=$(nandobj)junk6 of=$@
|
||||
+ rm -f $(nandobj)junk*
|
||||
+
|
||||
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
|
||||
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
+
|
||||
+$(nandobj)u-boot-spl: $(OBJS)
|
||||
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
|
||||
+ -Map $(nandobj)u-boot-spl.map \
|
||||
+ -o $(nandobj)u-boot-spl
|
||||
+
|
||||
+# create symbolic links for common files
|
||||
+
|
||||
+# from cpu directory
|
||||
+$(obj)start.S:
|
||||
+ @rm -f $(obj)start.S
|
||||
+ ln -s $(SRCTREE)/cpu/mips/start.S $(obj)start.S
|
||||
+
|
||||
+$(obj)usb_boot.S:
|
||||
+ @rm -f $(obj)usb_boot.S
|
||||
+ ln -s $(SRCTREE)/cpu/mips/usb_boot.S $(obj)usb_boot.S
|
||||
+
|
||||
+$(obj)cpu.c:
|
||||
+ @rm -f $(obj)cpu.c
|
||||
+ ln -s $(SRCTREE)/cpu/mips/cpu.c $(obj)cpu.c
|
||||
+
|
||||
+$(obj)jz4740.c:
|
||||
+ @rm -f $(obj)jz4740.c
|
||||
+ ln -s $(SRCTREE)/cpu/mips/jz4740.c $(obj)jz4740.c
|
||||
+
|
||||
+$(obj)jz_serial.c:
|
||||
+ @rm -f $(obj)jz_serial.c
|
||||
+ ln -s $(SRCTREE)/cpu/mips/jz_serial.c $(obj)jz_serial.c
|
||||
+
|
||||
+# from nand_spl directory
|
||||
+$(obj)nand_boot_jz4740.c:
|
||||
+ @rm -f $(obj)nand_boot_jz4740.c
|
||||
+ ln -s $(SRCTREE)/nand_spl/nand_boot_jz4740.c $(obj)nand_boot_jz4740.c
|
||||
+
|
||||
+#########################################################################
|
||||
+
|
||||
+$(obj)%.o: $(obj)%.S
|
||||
+ $(CC) $(AFLAGS) -c -o $@ $<
|
||||
+
|
||||
+$(obj)%.o: $(obj)%.c
|
||||
+ $(CC) $(CFLAGS) -c -o $@ $<
|
||||
+
|
||||
+# defines $(obj).depend target
|
||||
+include $(SRCTREE)/rules.mk
|
||||
+
|
||||
+sinclude $(obj).depend
|
||||
+
|
||||
+#########################################################################
|
||||
diff -urN a/nand_spl/board/sack/u-boot.lds b/nand_spl/board/sack/u-boot.lds
|
||||
--- a/nand_spl/board/sack/u-boot.lds 1969-12-31 19:00:00.000000000 -0500
|
||||
+++ b/nand_spl/board/sack/u-boot.lds 2010-02-24 22:40:05.585295492 -0500
|
||||
@@ -0,0 +1,63 @@
|
||||
+/*
|
||||
+ * (C) Copyright 2005
|
||||
+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of
|
||||
+ * the License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
+ * MA 02111-1307 USA
|
||||
+ */
|
||||
+
|
||||
+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
|
||||
+
|
||||
+OUTPUT_ARCH(mips)
|
||||
+ENTRY(_start)
|
||||
+SECTIONS
|
||||
+{
|
||||
+ . = 0x00000000;
|
||||
+
|
||||
+ . = ALIGN(4);
|
||||
+ .text :
|
||||
+ {
|
||||
+ *(.text)
|
||||
+ }
|
||||
+
|
||||
+ . = ALIGN(4);
|
||||
+ .rodata : { *(.rodata) }
|
||||
+
|
||||
+ . = ALIGN(4);
|
||||
+ .data : { *(.data) }
|
||||
+
|
||||
+ . = ALIGN(4);
|
||||
+ .sdata : { *(.sdata) }
|
||||
+
|
||||
+ _gp = ALIGN(16);
|
||||
+
|
||||
+ __got_start = .;
|
||||
+ .got : { *(.got) }
|
||||
+ __got_end = .;
|
||||
+
|
||||
+ .sdata : { *(.sdata) }
|
||||
+
|
||||
+ __u_boot_cmd_start = .;
|
||||
+ .u_boot_cmd : { *(.u_boot_cmd) }
|
||||
+ __u_boot_cmd_end = .;
|
||||
+
|
||||
+ uboot_end_data = .;
|
||||
+ num_got_entries = (__got_end - __got_start) >> 2;
|
||||
+
|
||||
+ . = ALIGN(4);
|
||||
+ .sbss : { *(.sbss) }
|
||||
+ .bss : { *(.bss) }
|
||||
+ uboot_end = .;
|
||||
+}
|
||||
diff -urN a/nand_spl/nand_boot_jz4740.c b/nand_spl/nand_boot_jz4740.c
|
||||
--- a/nand_spl/nand_boot_jz4740.c 2010-02-24 23:28:04.113795368 -0500
|
||||
+++ b/nand_spl/nand_boot_jz4740.c 2010-02-24 22:20:09.801295367 -0500
|
||||
@@ -385,10 +385,12 @@
|
||||
pll_init();
|
||||
sdram_init();
|
||||
|
||||
+#if defined(CONFIG_QI_LB60)
|
||||
if(is_usb_boot()) {
|
||||
serial_puts("enter USB BOOT mode\n");
|
||||
usb_boot();
|
||||
}
|
||||
+#endif
|
||||
|
||||
#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3)
|
||||
bus_width = 8;
|
||||
Loading…
Reference in New Issue
Block a user