carlos 372739573d Connecting FPGA GPIOs to U6 (max3223) allowing RS232 serial communication ...

Change J6-J7 layout allowing the creation of a serial communication channel between ingenic CPU and FPGA.
Changing LCD analog ground, according to LCD datasheet

2010-10-02 11:04:00 -05:00

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FSK_Trasnceiver_AND_Signal_Adecuation

Renaming Kicad and Orcad design files directory, uploading new kicad version

2010-07-29 08:32:39 -05:00

kicad_components

Renaming Kicad and Orcad design files directory, uploading new kicad version

2010-07-29 08:32:39 -05:00

kicad_models

Renaming Kicad and Orcad design files directory, uploading new kicad version

2010-07-29 08:32:39 -05:00

SAKC_PCB

Renaming Kicad and Orcad design files directory, uploading new kicad version

2010-07-29 08:32:39 -05:00

SAKC_PCB_v2

Connecting FPGA GPIOs to U6 (max3223) allowing RS232 serial communication

2010-10-02 11:04:00 -05:00