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mirror of git://projects.qi-hardware.com/nn-usb-fpga.git synced 2024-12-13 07:42:28 +02:00
nn-usb-fpga/design_files/ECB_JZ7425.opj
Carlos Camargo ea03c86992 Remove RC Power On Reset Circuit (C8, C9, R8, R9)
Change Y3 footprint
Change D10 footprint
Remove J18, Using J17 circuit for switch between USB and DC plug power supply, this remove the possibility that the USB host
will be connected to DC wall adapter.
Change L13 footprint
2010-07-28 09:22:40 -05:00

149 lines
4.8 KiB
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(ExpressProject "ECB_JZ7425"
(ProjectVersion "19981106")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library"
(File ".\xburst.olb"
(Type "Schematic Library")))
(NoModify)
(File ".\ecb_jz7425.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
(GATE_&_PIN_SWAP_Scope "0")
(GATE_&_PIN_SWAP_File_Name "C:\CAINPCB\ECB_JZ7425\ECB_JZ7425.SWP")
(Backannotation_TAB "1")
(ANNOTATE_Scope "0")
(ANNOTATE_Mode "1")
(ANNOTATE_Action "1")
(Annotate_Page_Order "0")
(ANNOTATE_Reset_References_to_1 "FALSE")
(ANNOTATE_No_Page_Number_Change "FALSE")
(ANNOTATE_Property_Combine "{Value}{Source Package}{POWER_GROUP}")
(ANNOTATE_IncludeNonPrimitive "FALSE")
(Netlist_TAB "3")
(LAYOUT_Netlist_File "ECB_JZ7425.MNL")
(LAYOUT_PCB_Footprint "{PCB Footprint}")
(FALSE)
(LAYOUT_Units "0")
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(Board_sim_option "VHDL_flow")
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
(TRUE)
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(FALSE)
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(TRUE)
( "TRUE"))
(Folder "Outputs"
(File ".\ecb_jz7425.mnl"
(Type "LAYOUT Netlist File")))
(Folder "Referenced Projects")
(PartMRUSelector
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(Tab 0))))