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openwrt-xburst/target/linux/at91/patches-2.6.25/001-vlink-machine.patch

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--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -151,6 +151,12 @@
help
Select this if you are using Toptech's TT9200 board.
+config MACH_VLINK
+ bool "Figment Design Labs VersaLink"
+ depends on ARCH_AT91RM9200
+ help
+ Select this if you are using FDL's VersaLink board
+
endif
# ----------------------------------------------------------
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -29,6 +29,7 @@
obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
obj-$(CONFIG_MACH_KAFA) += board-kafa.o
obj-$(CONFIG_MACH_CHUB) += board-chub.o
+obj-$(CONFIG_MACH_VLINK) += board-vlink.o
obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
obj-$(CONFIG_MACH_HOMEMATIC) += board-homematic.o
obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
--- /dev/null
+++ b/arch/arm/mach-at91/board-vlink.c
@@ -0,0 +1,201 @@
+/*
+ * linux/arch/arm/mach-at91/board-vlink.c
+ *
+ * Copyright (C) 2005 SAN People
+ * Copyright (C) 2006,2007 Guthrie Consulting
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91rm9200_mc.h>
+
+#include "generic.h"
+
+
+static void __init vlink_map_io(void)
+{
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
+
+ /* Setup the LEDs */
+ at91_init_leds(AT91_PIN_PC14, AT91_PIN_PC15);
+
+ /* Setup serial ports */
+
+ /* DBGU on ttyS0. (RX and TX only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DSR, DTR, DCD, RI) */
+ at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS
+ | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR
+ | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+ /* USART0 on ttys2. (Rx, Tx, CTS, RTS, DTR, DCD, RI) */
+ at91_register_uart(AT91RM9200_ID_US0, 2, ATMEL_UART_CTS
+ | ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+ /* USART3 on ttyS3. (Rx, Tx, CTS, RTS, DTR, DCD, RI) */
+ at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS
+ | ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+ /* USART2 on ttyS4. (Rx and Tx only) */
+ at91_register_uart(AT91RM9200_ID_US2, 4, 0);
+
+ /* Console on ttyS0 (ie DBGU) */
+ at91_set_serial_console(0);
+}
+
+static void __init vlink_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
+static struct at91_eth_data __initdata vlink_eth_data = {
+ .phy_irq_pin = AT91_PIN_PC4,
+ .is_rmii = 1,
+};
+
+static struct at91_usbh_data __initdata vlink_usbh_data = {
+ .ports = 1,
+};
+
+/*
+static struct at91_udc_data __initdata vlink_udc_data = {
+ .vbus_pin = AT91_PIN_PD4,
+ .pullup_pin = AT91_PIN_PD5,
+};
+*/
+
+static struct at91_mmc_data __initdata vlink_mmc_data = {
+// .det_pin = AT91_PIN_PB27,
+ .slot_b = 0,
+ .wire4 = 1,
+// .wp_pin = AT91_PIN_PA17,
+};
+
+static struct spi_board_info vlink_spi_devices[] = {
+ { /* DataFlash chip */
+ .modalias = "mtd_dataflash",
+ .chip_select = 0,
+ .max_speed_hz = 15 * 1000 * 1000,
+ },
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+ { /* DataFlash card */
+ .modalias = "mtd_dataflash",
+ .chip_select = 3,
+ .max_speed_hz = 15 * 1000 * 1000,
+ },
+#endif
+};
+
+/*static struct at91_gpio_led vlink_leds[] = {
+ {
+ .name = "led0",
+ .gpio = AT91_PIN_PC14,
+ .trigger = "heartbeat",
+ },
+ {
+ .name = "led1",
+ .gpio = AT91_PIN_PC15,
+ .trigger = "timer",
+ }
+};
+*/
+
+static void __init vlink_board_init(void)
+{
+ /* Serial */
+ at91_add_device_serial();
+ /* Ethernet */
+ at91_add_device_eth(&vlink_eth_data);
+ /* USB Host */
+ at91_add_device_usbh(&vlink_usbh_data);
+ /* USB Device */
+// at91_add_device_udc(&vlink_udc_data);
+// at91_set_multi_drive(vlink_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
+ /* I2C */
+// at91_add_device_i2c();
+ /* SPI */
+ at91_add_device_spi(vlink_spi_devices, ARRAY_SIZE(vlink_spi_devices));
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+ /* DataFlash card */
+// at91_set_gpio_output(AT91_PIN_PB22, 0);
+#else
+ /* MMC */
+// at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
+ at91_add_device_mmc(0, &vlink_mmc_data);
+#endif
+ /* LEDs */
+// at91_gpio_leds(vlink_leds, ARRAY_SIZE(vlink_leds));
+
+/* Other LED's */
+ at91_set_gpio_output(AT91_PIN_PC7, 1); // LED FRONT AP1
+ at91_set_gpio_output(AT91_PIN_PC8, 1); // LED FRONT BP1
+ at91_set_gpio_output(AT91_PIN_PB14, 1); // LED BACK AP1
+ at91_set_gpio_output(AT91_PIN_PB15, 1); // LED BACK BP1
+ at91_set_gpio_output(AT91_PIN_PB16, 1); // LED BACK AP2
+ at91_set_gpio_output(AT91_PIN_PB17, 1); // LED BACK BP2
+
+/* SIM Cards */
+ at91_set_gpio_output(AT91_PIN_PB9, 1); // ENBSC3
+ at91_set_gpio_output(AT91_PIN_PB10, 1); // ENBSC2
+ at91_set_gpio_output(AT91_PIN_PB11, 1); // ENBSC1
+
+/* GSM Module Control */
+ at91_set_gpio_output(AT91_PIN_PB12, 1); // GSMONOFF
+
+/* Test jig presence detection */
+ at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
+
+/* Power indicator */
+ at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
+
+/* USB Device control */
+ at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
+ at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
+ at91_set_multi_drive(AT91_PIN_PB28, 1); // Set to multi-drive
+
+}
+
+MACHINE_START(VLINK, "FDL VersaLink")
+ /* Maintainer: Guthrie Consulting */
+ .phys_io = AT91_BASE_SYS,
+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91rm9200_timer,
+ .map_io = vlink_map_io,
+ .init_irq = vlink_init_irq,
+ .init_machine = vlink_board_init,
+MACHINE_END