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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-27 16:43:09 +02:00

[coldfire]: remove 2.6.25 support

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24088 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz 2010-11-22 13:31:46 +00:00
parent 12a0868f92
commit 02028358c7
87 changed files with 0 additions and 66838 deletions

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@ -1,94 +0,0 @@
From d54d785a28afb65811c5d5ad727c57233deb6f60 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 16:36:51 -0600
Subject: [PATCH] Scripts to allow running files through checkpatch.pl
Scripts based on scripts/checkfiles that are in various trees.
These should not be sent up because there are already patches from
the original script author.
LTIBName: mcfv4e-checkfiles-script
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
scripts/checkfiles | 35 +++++++++++++++++++++++++++++++++++
scripts/checkfilesterse | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 69 insertions(+), 0 deletions(-)
create mode 100755 scripts/checkfiles
create mode 100755 scripts/checkfilesterse
--- /dev/null
+++ b/scripts/checkfiles
@@ -0,0 +1,35 @@
+#!/bin/sh
+# (c) 2007, Erez Zadok <ezk@cs.sunysb.edu> (initial version)
+# Licensed under the terms of the GNU GPL License version 2
+#
+# Check source files for compliance with coding standards, using terse
+# output in the style that g/cc produces. This output can be easily parsed
+# within text editors (e.g., emacs/vim) which can produce a split text
+# screen showing in one screen the error message, and in another screen the
+# corresponding source file, with the cursor placed on the offending line.
+# See for example the documentation for Emacs's "next-error" command, often
+# bound to M-x ` (ESC x back-tick).
+
+# Usage: checkfiles file [files...]
+# if "file" is a directory, will check all *.[hc] files recursively
+
+# check usage
+usage() {
+ echo "Usage: checkfiles file [files...]"
+ echo "(if \"file\" is a directory, check recursively for all C sources/headers)"
+ exit 1
+}
+
+# if test -z "$@" ; then
+# usage
+# fi
+if ! test -f scripts/checkpatch.pl ; then
+ echo "checkfiles: must run from top level source tree"
+ exit 1
+fi
+
+# check coding-style compliance of each source file found
+find "$@" -type f -name '*.[hc]' | \
+while read f ; do
+ diff -u /dev/null $f | perl scripts/checkpatch.pl -
+done
--- /dev/null
+++ b/scripts/checkfilesterse
@@ -0,0 +1,34 @@
+#!/bin/sh
+# (c) 2007, Erez Zadok <ezk@cs.sunysb.edu> (initial version)
+# Licensed under the terms of the GNU GPL License version 2
+#
+# Check source files for compliance with coding standards, using terse
+# output in the style that g/cc produces. This output can be easily parsed
+# within text editors (e.g., emacs/vim) which can produce a split text
+# screen showing in one screen the error message, and in another screen the
+# corresponding source file, with the cursor placed on the offending line.
+# See for example the documentation for Emacs's "next-error" command, often
+# bound to M-x ` (ESC x back-tick).
+
+# Usage: checkfiles file [files...]
+# if "file" is a directory, will check all *.[hc] files recursively
+
+# check usage
+usage() {
+ echo "Usage: checkfiles file [files...]"
+ echo "(if \"file\" is a directory, check recursively for all C sources/headers)"
+ exit 1
+}
+if test -z "" ; then
+ usage
+fi
+if ! test -f scripts/checkpatch.pl ; then
+ echo "checkfiles: must run from top level source tree"
+ exit 1
+fi
+
+# check coding-style compliance of each source file found, using terse output
+find "$@" -type f -name '*.[hc]' | \
+while read f ; do
+ diff -u /dev/null $f | perl scripts/checkpatch.pl -t -
+done

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@ -1,571 +0,0 @@
From 823ad3e6e88353226ec28f48183a467181887a1b Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 16:56:09 -0600
Subject: [PATCH] Core Coldfire/MCF54455 kernel changes.
LTIBName: mcfv4e-kernel-mods
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/Kconfig | 65 ++++++++++++++++++++++++++++++++++++++-
arch/m68k/Kconfig.debug | 9 +++++
arch/m68k/Makefile | 14 ++++++++
arch/m68k/kernel/Makefile | 15 ++++++---
arch/m68k/kernel/asm-offsets.c | 7 ++++
arch/m68k/kernel/dma.c | 17 ++++++++++
arch/m68k/kernel/process.c | 57 +++++++++++++++++++++++++++++++++++
arch/m68k/kernel/setup.c | 49 ++++++++++++++++++++++++++----
arch/m68k/kernel/time.c | 5 +++
arch/m68k/kernel/vmlinux.lds.S | 2 +
10 files changed, 227 insertions(+), 13 deletions(-)
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -119,6 +119,20 @@ config SUN3
If you don't want to compile a kernel exclusively for a Sun 3, say N.
+config COLDFIRE
+ bool "ColdFire V4e support"
+ default y
+ select CFV4E
+ help
+ Say Y if you want to build a kernel to run on one of the ColdFire
+ V4e boards.
+
+config CFV4E
+ bool
+ depends on COLDFIRE
+ select MMU_CFV4E if MMU
+ default y
+
config AMIGA
bool "Amiga support"
depends on !MMU_SUN3
@@ -294,14 +308,53 @@ config M68060
If you anticipate running this kernel on a computer with a MC68060
processor, say Y. Otherwise, say N.
+config M54455
+ bool "MCF54455 support"
+ depends on COLDFIRE
+ default y
+ help
+ This option will add support for the MCF54455 processor with mmu.
+
+config MCFCLK
+ int "M54455EVB System Clock"
+ depends on M54455
+ default 266666666
+ help
+ System clock for EVB. Usually 266MHz for u-boot and 200MHz for dBUG.
+
+config MCF_USER_HALT
+ bool "Coldfire User Halt Enable"
+ depends on M54455
+ default n
+ help
+ Enables the HALT instruction in User Mode.
+
config MMU_MOTOROLA
bool
- depends on MMU && !MMU_SUN3
+ depends on MMU && !MMU_SUN3 && !COLDFIRE
default y
config MMU_SUN3
bool
+config MMU_CFV4E
+ bool
+
+config SDRAM_BASE
+ hex
+ depends on M54455
+ default 0x40000000
+
+config SDRAM_SIZE
+ hex
+ depends on M54455
+ default 0x0FFFFFFF
+
+config NOR_FLASH_BASE
+ hex "NOR Flash Base Address"
+ depends on M54455
+ default 0x00000000
+
config M68KFPU_EMU
bool "Math emulation support (EXPERIMENTAL)"
depends on EXPERIMENTAL
@@ -468,6 +521,14 @@ config ZONE_DMA
source "drivers/pci/Kconfig"
source "drivers/zorro/Kconfig"
+endmenu
+
+menu "Power management options"
+
+config PM
+ bool "Power Management support"
+ help
+ Support processor power management modes
endmenu
@@ -647,7 +708,7 @@ config DN_SERIAL
config SERIAL_CONSOLE
bool "Support for serial port console"
- depends on (AMIGA || ATARI || MAC || SUN3 || SUN3X || VME || APOLLO) && (ATARI_MFPSER=y || ATARI_SCC=y || ATARI_MIDI=y || MAC_SCC=y || AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y || SERIAL=y || MVME147_SCC || SERIAL167 || MVME162_SCC || BVME6000_SCC || DN_SERIAL)
+ depends on (AMIGA || ATARI || MAC || SUN3 || SUN3X || VME || APOLLO || COLDFIRE) && (ATARI_MFPSER=y || ATARI_SCC=y || ATARI_MIDI=y || MAC_SCC=y || AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y || SERIAL=y || MVME147_SCC || SERIAL167 || MVME162_SCC || BVME6000_SCC || DN_SERIAL || SERIAL_COLDFIRE)
---help---
If you say Y here, it will be possible to use a serial port as the
system console (the system console is the device which receives all
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,4 +2,13 @@ menu "Kernel hacking"
source "lib/Kconfig.debug"
+config BOOTPARAM
+ bool 'Compiled-in Kernel Boot Parameter'
+ depends on COLDFIRE
+
+config BOOTPARAM_STRING
+ string 'Kernel Boot Parameter'
+ default 'console=ttyS0,115200'
+ depends on BOOTPARAM
+
endmenu
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -16,7 +16,9 @@
KBUILD_DEFCONFIG := amiga_defconfig
# override top level makefile
+ifndef CONFIG_COLDFIRE
AS += -m68020
+endif
LDFLAGS := -m m68kelf
LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
ifneq ($(SUBARCH),$(ARCH))
@@ -36,6 +38,7 @@ CHECKFLAGS += -D__mc68000__
KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
# enable processor switch if compiled only for a single cpu
+ifndef CONFIG_COLDFIRE
ifndef CONFIG_M68020
ifndef CONFIG_M68030
@@ -49,6 +52,12 @@ endif
endif
endif
+endif
+
+ifdef CONFIG_M54455
+CFLAGS := $(CFLAGS) -march=isac -mcpu=54455 -msoft-float -g
+AFLAGS := $(AFLAGS) -march=isac -mcpu=54455 -msoft-float
+endif
ifdef CONFIG_KGDB
# If configured for kgdb support, include debugging infos and keep the
@@ -57,8 +66,12 @@ KBUILD_CFLAGS := $(subst -fomit-frame-po
endif
ifndef CONFIG_SUN3
+ifndef CONFIG_COLDFIRE
head-y := arch/m68k/kernel/head.o
else
+head-y := arch/m68k/coldfire/head.o
+endif
+else
head-y := arch/m68k/kernel/sun3-head.o
endif
@@ -79,6 +92,7 @@ core-$(CONFIG_SUN3) += arch/m68k/sun3/
core-$(CONFIG_M68040) += arch/m68k/fpsp040/
core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
+core-$(CONFIG_COLDFIRE) += arch/m68k/coldfire/
all: zImage
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -2,14 +2,19 @@
# Makefile for the linux kernel.
#
-ifndef CONFIG_SUN3
- extra-y := head.o
+ifdef CONFIG_SUN3
+ extra-y := sun3-head.o vmlinux.lds
+ obj-y := entry.o signal.o ints.o
else
- extra-y := sun3-head.o
+ifndef CONFIG_COLDFIRE
+ extra-y := head.o vmlinux.lds
+ obj-y := entry.o signal.o traps.o ints.o
+else # CONFIG_COLDFIRE
+ extra-y := ../coldfire/head.o vmlinux.lds
+endif
endif
-extra-y += vmlinux.lds
-obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
+obj-y += process.o ptrace.o module.o \
sys_m68k.o time.o semaphore.o setup.o m68k_ksyms.o devres.o
devres-y = ../../../kernel/irq/devres.o
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -58,8 +58,15 @@ int main(void)
DEFINE(PT_A2, offsetof(struct pt_regs, a2));
DEFINE(PT_PC, offsetof(struct pt_regs, pc));
DEFINE(PT_SR, offsetof(struct pt_regs, sr));
+#ifdef CONFIG_COLDFIRE
+ /* Need to get the context out of struct mm for ASID setting */
+ DEFINE(MM_CONTEXT, offsetof(struct mm_struct, context));
+ /* Coldfire exception frame has vector *before* pc */
+ DEFINE(PT_VECTOR, offsetof(struct pt_regs, pc) - 4);
+#else
/* bitfields are a bit difficult */
DEFINE(PT_VECTOR, offsetof(struct pt_regs, pc) + 4);
+#endif
/* offsets into the irq_handler struct */
DEFINE(IRQ_HANDLER, offsetof(struct irq_node, handler));
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -17,6 +17,7 @@
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *handle, gfp_t flag)
{
+#ifndef CONFIG_M54455
struct page *page, **map;
pgprot_t pgprot;
void *addr;
@@ -55,6 +56,18 @@ void *dma_alloc_coherent(struct device *
kfree(map);
return addr;
+#else
+ /*
+ * On the M5445x platform the memory allocated with GFP_DMA
+ * is guaranteed to be DMA'able.
+ */
+ void *addr;
+
+ size = PAGE_ALIGN(size);
+ addr = kmalloc(size, GFP_DMA);
+ *handle = virt_to_phys(addr);
+ return addr;
+#endif
}
EXPORT_SYMBOL(dma_alloc_coherent);
@@ -62,7 +75,11 @@ void dma_free_coherent(struct device *de
void *addr, dma_addr_t handle)
{
pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
+#ifndef CONFIG_M54455
vfree(addr);
+#else
+ kfree(addr);
+#endif
}
EXPORT_SYMBOL(dma_free_coherent);
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -191,6 +191,7 @@ EXPORT_SYMBOL(kernel_thread);
void flush_thread(void)
{
+#if !defined(CONFIG_COLDFIRE)
unsigned long zero = 0;
set_fs(USER_DS);
current->thread.fs = __USER_DS;
@@ -198,6 +199,14 @@ void flush_thread(void)
asm volatile (".chip 68k/68881\n\t"
"frestore %0@\n\t"
".chip 68k" : : "a" (&zero));
+#else
+ set_fs(USER_DS);
+ current->thread.fs = USER_DS;
+#if defined(CONFIG_FPU)
+ if (!FPU_IS_EMU)
+ asm volatile ("frestore %0@\n\t" : : "a" (&zero));
+#endif
+#endif
}
/*
@@ -261,6 +270,7 @@ int copy_thread(int nr, unsigned long cl
* Must save the current SFC/DFC value, NOT the value when
* the parent was last descheduled - RGH 10-08-96
*/
+#if !defined(CONFIG_COLDFIRE)
p->thread.fs = get_fs().seg;
if (!FPU_IS_EMU) {
@@ -272,9 +282,34 @@ int copy_thread(int nr, unsigned long cl
"fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
: : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
: "memory");
+#else
+ p->thread.fs = get_fs();
+
+#if defined(CONFIG_FPU)
+ if (!FPU_IS_EMU) {
+ /* Copy the current fpu state */
+ asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0])
+ : "memory");
+
+ if (p->thread.fpstate[0]) {
+ asm volatile ("fmovemd %/fp0-%/fp7,%0"
+ : : "m" (p->thread.fp[0])
+ : "memory");
+ asm volatile ("fmovel %/fpiar,%0"
+ : : "m" (p->thread.fpcntl[0])
+ : "memory");
+ asm volatile ("fmovel %/fpcr,%0"
+ : : "m" (p->thread.fpcntl[1])
+ : "memory");
+ asm volatile ("fmovel %/fpsr,%0"
+ : : "m" (p->thread.fpcntl[2])
+ : "memory");
+ }
/* Restore the state in case the fpu was busy */
asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
}
+#endif
+#endif
return 0;
}
@@ -283,7 +318,9 @@ int copy_thread(int nr, unsigned long cl
int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
{
+#if !defined(CONFIG_COLDFIRE) || defined(CONFIG_FPU)
char fpustate[216];
+#endif
if (FPU_IS_EMU) {
int i;
@@ -300,6 +337,7 @@ int dump_fpu (struct pt_regs *regs, stru
}
/* First dump the fpu context to avoid protocol violation. */
+#if !defined(CONFIG_COLDFIRE)
asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
return 0;
@@ -310,6 +348,25 @@ int dump_fpu (struct pt_regs *regs, stru
asm volatile ("fmovemx %/fp0-%/fp7,%0"
:: "m" (fpu->fpregs[0])
: "memory");
+#elif defined(CONFIG_FPU)
+ asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
+ if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
+ return 0;
+
+ asm volatile ("fmovel %/fpiar,%0"
+ : : "m" (fpu->fpcntl[0])
+ : "memory");
+ asm volatile ("fmovel %/fpcr,%0"
+ : : "m" (fpu->fpcntl[1])
+ : "memory");
+ asm volatile ("fmovel %/fpsr,%0"
+ : : "m" (fpu->fpcntl[2])
+ : "memory");
+ asm volatile ("fmovemd %/fp0-%/fp7,%0"
+ : : "m" (fpu->fpregs[0])
+ : "memory");
+#endif
+
return 1;
}
EXPORT_SYMBOL(dump_fpu);
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -67,13 +67,22 @@ EXPORT_SYMBOL(m68k_memory);
struct mem_info m68k_ramdisk;
+#if !defined(CONFIG_COLDFIRE)
static char m68k_command_line[CL_SIZE];
+#else
+char m68k_command_line[CL_SIZE];
+unsigned long uboot_info_stk;
+EXPORT_SYMBOL(uboot_info_stk);
+#endif
void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
/* machine dependent irq functions */
void (*mach_init_IRQ) (void) __initdata = NULL;
void (*mach_get_model) (char *model);
int (*mach_get_hardware_list) (char *buffer);
+#ifdef CONFIG_COLDFIRE
+void (*mach_tick)(void);
+#endif
/* machine dependent timer functions */
unsigned long (*mach_gettimeoffset) (void);
int (*mach_hwclk) (int, struct rtc_time*);
@@ -128,13 +137,17 @@ extern void config_hp300(void);
extern void config_q40(void);
extern void config_sun3x(void);
+#ifdef CONFIG_COLDFIRE
+void coldfire_sort_memrec(void);
+#endif
+
#define MASK_256K 0xfffc0000
extern void paging_init(void);
static void __init m68k_parse_bootinfo(const struct bi_record *record)
{
- while (record->tag != BI_LAST) {
+ while ((record->tag != BI_LAST) && !(CONFIG_COLDFIRE)) {
int unknown = 0;
const unsigned long *data = record->data;
@@ -192,7 +205,11 @@ static void __init m68k_parse_bootinfo(c
record->size);
}
- m68k_realnum_memory = m68k_num_memory;
+#ifdef CONFIG_COLDFIRE
+ coldfire_sort_memrec();
+#endif
+
+ m68k_realnum_memory = m68k_num_memory;
#ifdef CONFIG_SINGLE_MEMORY_CHUNK
if (m68k_num_memory > 1) {
printk("Ignoring last %i chunks of physical memory\n",
@@ -205,7 +222,9 @@ static void __init m68k_parse_bootinfo(c
void __init setup_arch(char **cmdline_p)
{
extern int _etext, _edata, _end;
+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
int i;
+#endif
/* The bootinfo is located right after the kernel bss */
m68k_parse_bootinfo((const struct bi_record *)&_end);
@@ -220,9 +239,10 @@ void __init setup_arch(char **cmdline_p)
* We should really do our own FPU check at startup.
* [what do we do with buggy 68LC040s? if we have problems
* with them, we should add a test to check_bugs() below] */
-#ifndef CONFIG_M68KFPU_EMU_ONLY
+#if !defined(CONFIG_M68KFPU_EMU_ONLY) && defined(CONFIG_FPU)
/* clear the fpu if we have one */
- if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
+ if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060|
+ FPU_CFV4E)) {
volatile int zero = 0;
asm volatile ("frestore %0" : : "m" (zero));
}
@@ -310,13 +330,18 @@ void __init setup_arch(char **cmdline_p)
config_sun3x();
break;
#endif
+#ifdef CONFIG_COLDFIRE
+ case MACH_CFMMU:
+ config_coldfire();
+ break;
+#endif
default:
panic("No configuration setup");
}
paging_init();
-#ifndef CONFIG_SUN3
+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
for (i = 1; i < m68k_num_memory; i++)
free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
m68k_memory[i].size);
@@ -343,6 +368,10 @@ void __init setup_arch(char **cmdline_p)
#endif /* !CONFIG_SUN3 */
+#ifdef CONFIG_COLDFIRE
+ mmu_context_init();
+#endif
+
/* set ISA defs early as possible */
#if defined(CONFIG_ISA) && defined(MULTI_ISA)
#if defined(CONFIG_Q40)
@@ -373,6 +402,7 @@ static int show_cpuinfo(struct seq_file
#define LOOP_CYCLES_68030 (8)
#define LOOP_CYCLES_68040 (3)
#define LOOP_CYCLES_68060 (1)
+#define LOOP_CYCLES_COLDFIRE (2)
if (CPU_IS_020) {
cpu = "68020";
@@ -386,6 +416,9 @@ static int show_cpuinfo(struct seq_file
} else if (CPU_IS_060) {
cpu = "68060";
clockfactor = LOOP_CYCLES_68060;
+ } else if (CPU_IS_CFV4E) {
+ cpu = "ColdFire V4e";
+ clockfactor = LOOP_CYCLES_COLDFIRE;
} else {
cpu = "680x0";
clockfactor = 0;
@@ -404,6 +437,8 @@ static int show_cpuinfo(struct seq_file
fpu = "68060";
else if (m68k_fputype & FPU_SUNFPA)
fpu = "Sun FPA";
+ else if (m68k_fputype & FPU_CFV4E)
+ fpu = "ColdFire V4e";
else
fpu = "none";
#endif
@@ -420,6 +455,8 @@ static int show_cpuinfo(struct seq_file
mmu = "Sun-3";
else if (m68k_mmutype & MMU_APOLLO)
mmu = "Apollo";
+ else if (m68k_mmutype & MMU_CFV4E)
+ mmu = "ColdFire";
else
mmu = "unknown";
@@ -482,7 +519,7 @@ int get_hardware_list(char *buffer)
void check_bugs(void)
{
-#ifndef CONFIG_M68KFPU_EMU
+#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M54455)
if (m68k_fputype == 0) {
printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
"WHICH IS REQUIRED BY LINUX/M68K ***\n");
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -40,6 +40,11 @@ static inline int set_rtc_mmss(unsigned
*/
static irqreturn_t timer_interrupt(int irq, void *dummy)
{
+#ifdef CONFIG_COLDFIRE
+ /* kick hardware timer if necessary */
+ if (mach_tick)
+ mach_tick();
+#endif
do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(get_irq_regs()));
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -5,6 +5,8 @@ PHDRS
}
#ifdef CONFIG_SUN3
#include "vmlinux-sun3.lds"
+#elif CONFIG_COLDFIRE
+#include "../coldfire/vmlinux-cf.lds"
#else
#include "vmlinux-std.lds"
#endif

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@ -1,564 +0,0 @@
From a9faf34ba120d9d39ff0c7656ee3de12a110e22a Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 16:57:05 -0600
Subject: [PATCH] Core Coldfire/MCF5445x arch lib changes.
LTIBName: mcfv4e-arch-lib-mods
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/lib/checksum.c | 124 +++++++++++++++++++++++
arch/m68k/lib/muldi3.c | 10 ++
arch/m68k/lib/semaphore.S | 25 +++++
arch/m68k/lib/string.c | 64 ++++++++++++
arch/m68k/lib/uaccess.c | 242 +++++++++++++++++++++++++++++++++++++++++++++
5 files changed, 465 insertions(+), 0 deletions(-)
--- a/arch/m68k/lib/checksum.c
+++ b/arch/m68k/lib/checksum.c
@@ -39,8 +39,131 @@
* computes a partial checksum, e.g. for TCP/UDP fragments
*/
+#ifdef CONFIG_COLDFIRE
+
+static inline unsigned short from32to16(unsigned long x)
+{
+ /* add up 16-bit and 16-bit for 16+c bit */
+ x = (x & 0xffff) + (x >> 16);
+ /* add up carry.. */
+ x = (x & 0xffff) + (x >> 16);
+ return x;
+}
+
+static unsigned long do_csum(const unsigned char *buff, int len)
+{
+ int odd, count;
+ unsigned long result = 0;
+
+ if (len <= 0)
+ goto out;
+ odd = 1 & (unsigned long) buff;
+ if (odd) {
+ result = *buff;
+ len--;
+ buff++;
+ }
+ count = len >> 1; /* nr of 16-bit words.. */
+ if (count) {
+ if (2 & (unsigned long) buff) {
+ result += *(unsigned short *) buff;
+ count--;
+ len -= 2;
+ buff += 2;
+ }
+ count >>= 1; /* nr of 32-bit words.. */
+ if (count) {
+ unsigned long carry = 0;
+ do {
+ unsigned long w = *(unsigned long *) buff;
+ count--;
+ buff += 4;
+ result += carry;
+ result += w;
+ carry = (w > result);
+ } while (count);
+ result += carry;
+ result = (result & 0xffff) + (result >> 16);
+ }
+ if (len & 2) {
+ result += *(unsigned short *) buff;
+ buff += 2;
+ }
+ }
+ if (len & 1)
+ result += (*buff << 8);
+ result = from32to16(result);
+ if (odd)
+ result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
+out:
+ return result;
+}
+
+/*
+ * This is a version of ip_compute_csum() optimized for IP headers,
+ * which always checksum on 4 octet boundaries.
+ */
+__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+ return ~do_csum(iph, ihl*4);
+}
+EXPORT_SYMBOL(ip_fast_csum);
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
__wsum csum_partial(const void *buff, int len, __wsum sum)
{
+ unsigned int result = do_csum(buff, len);
+
+ /* add in old sum, and carry.. */
+ result += sum;
+ if (sum > result)
+ result += 1;
+ return result;
+}
+EXPORT_SYMBOL(csum_partial);
+
+/*
+ * copy from fs while checksumming, otherwise like csum_partial
+ */
+
+__wsum
+csum_partial_copy_from_user(const void __user *src, void *dst, int len,
+ __wsum sum, int *csum_err)
+{
+ if (csum_err) *csum_err = 0;
+ memcpy(dst, src, len);
+ return csum_partial(dst, len, sum);
+}
+EXPORT_SYMBOL(csum_partial_copy_from_user);
+
+/*
+ * copy from ds while checksumming, otherwise like csum_partial
+ */
+
+__wsum
+csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
+{
+ memcpy(dst, src, len);
+ return csum_partial(dst, len, sum);
+}
+EXPORT_SYMBOL(csum_partial_copy_nocheck);
+
+#else /* !CONFIG_COLDFIRE */
+
+unsigned int
+csum_partial(const unsigned char *buff, int len, unsigned int sum)
+{
unsigned long tmp1, tmp2;
/*
* Experiments with ethernet and slip connections show that buff
@@ -423,3 +546,4 @@ csum_partial_copy_nocheck(const void *sr
return(sum);
}
EXPORT_SYMBOL(csum_partial_copy_nocheck);
+#endif /* CONFIG_COLDFIRE */
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -21,12 +21,22 @@ Boston, MA 02111-1307, USA. */
#define BITS_PER_UNIT 8
+#ifdef CONFIG_COLDFIRE
+#define umul_ppmm(w1, w0, u, v) \
+ do { \
+ unsigned long long x; \
+ x = (unsigned long long)u * v; \
+ w0 = (unsigned long)(x & 0x00000000ffffffff); \
+ w1 = (unsigned long)(x & 0xffffffff00000000) >> 32; \
+ } while (0)
+#else /* CONFIG_COLDFIRE */
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mulu%.l %3,%1:%0" \
: "=d" ((USItype)(w0)), \
"=d" ((USItype)(w1)) \
: "%0" ((USItype)(u)), \
"dmi" ((USItype)(v)))
+#endif /* CONFIG_COLDFIRE */
#define __umulsidi3(u, v) \
({DIunion __w; \
--- a/arch/m68k/lib/semaphore.S
+++ b/arch/m68k/lib/semaphore.S
@@ -16,11 +16,24 @@
* there is contention on the semaphore.
*/
ENTRY(__down_failed)
+#ifndef CONFIG_COLDFIRE
moveml %a0/%d0/%d1,-(%sp)
+#else
+ movel %a0,-(%sp)
+ movel %d0,-(%sp)
+ movel %d1,-(%sp)
+#endif
movel %a1,-(%sp)
jbsr __down
movel (%sp)+,%a1
+#ifndef CONFIG_COLDFIRE
moveml (%sp)+,%a0/%d0/%d1
+#else
+ movel (%sp)+,%d1
+ movel (%sp)+,%d0
+ movel (%sp)+,%a0
+#endif
+
rts
ENTRY(__down_failed_interruptible)
@@ -44,10 +57,22 @@ ENTRY(__down_failed_trylock)
rts
ENTRY(__up_wakeup)
+#ifndef CONFIG_COLDFIRE
moveml %a0/%d0/%d1,-(%sp)
+#else
+ movel %a0,-(%sp)
+ movel %d0,-(%sp)
+ movel %d1,-(%sp)
+#endif
movel %a1,-(%sp)
jbsr __up
movel (%sp)+,%a1
+#ifndef CONFIG_COLDFIRE
moveml (%sp)+,%a0/%d0/%d1
+#else
+ movel (%sp)+,%d1
+ movel (%sp)+,%d0
+ movel (%sp)+,%a0
+#endif
rts
--- a/arch/m68k/lib/string.c
+++ b/arch/m68k/lib/string.c
@@ -15,6 +15,7 @@ char *strcpy(char *dest, const char *src
}
EXPORT_SYMBOL(strcpy);
+#ifndef CONFIG_COLDFIRE
void *memset(void *s, int c, size_t count)
{
void *xs = s;
@@ -143,6 +144,69 @@ void *memcpy(void *to, const void *from,
}
EXPORT_SYMBOL(memcpy);
+#else /* CONFIG_COLDFIRE */
+
+void *memset(void *s, int c, size_t count)
+{
+ unsigned long x;
+ void *originalTo;
+
+ for (x = 0; x < count; x++)
+ *(unsigned char *)s++ = (unsigned char)c;
+
+ return originalTo;
+}
+EXPORT_SYMBOL(memset);
+
+void *memcpy(void *to, const void *from, size_t n)
+{
+ void *xto = to;
+ size_t temp;
+
+ if (!n)
+ return xto;
+ if ((long) to & 1) {
+ char *cto = to;
+ const char *cfrom = from;
+ *cto++ = *cfrom++;
+ to = cto;
+ from = cfrom;
+ n--;
+ }
+ if (n > 2 && (long) to & 2) {
+ short *sto = to;
+ const short *sfrom = from;
+ *sto++ = *sfrom++;
+ to = sto;
+ from = sfrom;
+ n -= 2;
+ }
+ temp = n >> 2;
+ if (temp) {
+ long *lto = to;
+ const long *lfrom = from;
+ for (; temp; temp--)
+ *lto++ = *lfrom++;
+ to = lto;
+ from = lfrom;
+ }
+ if (n & 2) {
+ short *sto = to;
+ const short *sfrom = from;
+ *sto++ = *sfrom++;
+ to = sto;
+ from = sfrom;
+ }
+ if (n & 1) {
+ char *cto = to;
+ const char *cfrom = from;
+ *cto = *cfrom;
+ }
+ return xto;
+}
+EXPORT_SYMBOL(memcpy);
+#endif /* CONFIG_COLDFIRE */
+
void *memmove(void *dest, const void *src, size_t n)
{
void *xdest = dest;
--- a/arch/m68k/lib/uaccess.c
+++ b/arch/m68k/lib/uaccess.c
@@ -5,6 +5,7 @@
*/
#include <linux/module.h>
+#ifndef CONFIG_COLDFIRE
#include <asm/uaccess.h>
unsigned long __generic_copy_from_user(void *to, const void __user *from,
@@ -220,3 +221,244 @@ unsigned long __clear_user(void __user *
return res;
}
EXPORT_SYMBOL(__clear_user);
+
+#else /* CONFIG_COLDFIRE */
+
+#include <asm/cf_uaccess.h>
+
+unsigned long __generic_copy_from_user(void *to, const void *from,
+ unsigned long n)
+{
+ unsigned long tmp;
+ __asm__ __volatile__
+ (" tstl %2\n"
+ " jeq 2f\n"
+ "1: movel (%1)+,%3\n"
+ " movel %3,(%0)+\n"
+ " subql #1,%2\n"
+ " jne 1b\n"
+ "2: movel %4,%2\n"
+ " bclr #1,%2\n"
+ " jeq 4f\n"
+ "3: movew (%1)+,%3\n"
+ " movew %3,(%0)+\n"
+ "4: bclr #0,%2\n"
+ " jeq 6f\n"
+ "5: moveb (%1)+,%3\n"
+ " moveb %3,(%0)+\n"
+ "6:\n"
+ ".section .fixup,\"ax\"\n"
+ " .even\n"
+ "7: movel %2,%%d0\n"
+ "71:clrl (%0)+\n"
+ " subql #1,%%d0\n"
+ " jne 71b\n"
+ " lsll #2,%2\n"
+ " addl %4,%2\n"
+ " btst #1,%4\n"
+ " jne 81f\n"
+ " btst #0,%4\n"
+ " jne 91f\n"
+ " jra 6b\n"
+ "8: addql #2,%2\n"
+ "81:clrw (%0)+\n"
+ " btst #0,%4\n"
+ " jne 91f\n"
+ " jra 6b\n"
+ "9: addql #1,%2\n"
+ "91:clrb (%0)+\n"
+ " jra 6b\n"
+ ".previous\n"
+ ".section __ex_table,\"a\"\n"
+ " .align 4\n"
+ " .long 1b,7b\n"
+ " .long 3b,8b\n"
+ " .long 5b,9b\n"
+ ".previous"
+ : "=a"(to), "=a"(from), "=d"(n), "=&d"(tmp)
+ : "d"(n & 3), "0"(to), "1"(from), "2"(n/4)
+ : "d0", "memory");
+ return n;
+}
+EXPORT_SYMBOL(__generic_copy_from_user);
+
+
+unsigned long __generic_copy_to_user(void *to, const void *from,
+ unsigned long n)
+{
+ unsigned long tmp;
+ __asm__ __volatile__
+ (" tstl %2\n"
+ " jeq 3f\n"
+ "1: movel (%1)+,%3\n"
+ "22:movel %3,(%0)+\n"
+ "2: subql #1,%2\n"
+ " jne 1b\n"
+ "3: movel %4,%2\n"
+ " bclr #1,%2\n"
+ " jeq 4f\n"
+ " movew (%1)+,%3\n"
+ "24:movew %3,(%0)+\n"
+ "4: bclr #0,%2\n"
+ " jeq 5f\n"
+ " moveb (%1)+,%3\n"
+ "25:moveb %3,(%0)+\n"
+ "5:\n"
+ ".section .fixup,\"ax\"\n"
+ " .even\n"
+ "60:addql #1,%2\n"
+ "6: lsll #2,%2\n"
+ " addl %4,%2\n"
+ " jra 5b\n"
+ "7: addql #2,%2\n"
+ " jra 5b\n"
+ "8: addql #1,%2\n"
+ " jra 5b\n"
+ ".previous\n"
+ ".section __ex_table,\"a\"\n"
+ " .align 4\n"
+ " .long 1b,60b\n"
+ " .long 22b,6b\n"
+ " .long 2b,6b\n"
+ " .long 24b,7b\n"
+ " .long 3b,60b\n"
+ " .long 4b,7b\n"
+ " .long 25b,8b\n"
+ " .long 5b,8b\n"
+ ".previous"
+ : "=a"(to), "=a"(from), "=d"(n), "=&d"(tmp)
+ : "r"(n & 3), "0"(to), "1"(from), "2"(n / 4)
+ : "memory");
+ return n;
+}
+EXPORT_SYMBOL(__generic_copy_to_user);
+
+/*
+ * Copy a null terminated string from userspace.
+ */
+
+long strncpy_from_user(char *dst, const char *src, long count)
+{
+ long res = -EFAULT;
+ if (!(access_ok(VERIFY_READ, src, 1))) /* --tym-- */
+ return res;
+ if (count == 0) return count;
+ __asm__ __volatile__
+ ("1: moveb (%2)+,%%d0\n"
+ "12:moveb %%d0,(%1)+\n"
+ " jeq 2f\n"
+ " subql #1,%3\n"
+ " jne 1b\n"
+ "2: subl %3,%0\n"
+ "3:\n"
+ ".section .fixup,\"ax\"\n"
+ " .even\n"
+ "4: movel %4,%0\n"
+ " jra 3b\n"
+ ".previous\n"
+ ".section __ex_table,\"a\"\n"
+ " .align 4\n"
+ " .long 1b,4b\n"
+ " .long 12b,4b\n"
+ ".previous"
+ : "=d"(res), "=a"(dst), "=a"(src), "=d"(count)
+ : "i"(-EFAULT), "0"(count), "1"(dst), "2"(src), "3"(count)
+ : "d0", "memory");
+ return res;
+}
+EXPORT_SYMBOL(strncpy_from_user);
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 on exception, a value greater than N if too long
+ */
+long strnlen_user(const char *src, long n)
+{
+ long res = -EFAULT;
+ if (!(access_ok(VERIFY_READ, src, 1))) /* --tym-- */
+ return res;
+
+ res = -(long)src;
+ __asm__ __volatile__
+ ("1:\n"
+ " tstl %2\n"
+ " jeq 3f\n"
+ "2: moveb (%1)+,%%d0\n"
+ "22:\n"
+ " subql #1,%2\n"
+ " tstb %%d0\n"
+ " jne 1b\n"
+ " jra 4f\n"
+ "3:\n"
+ " addql #1,%0\n"
+ "4:\n"
+ " addl %1,%0\n"
+ "5:\n"
+ ".section .fixup,\"ax\"\n"
+ " .even\n"
+ "6: moveq %3,%0\n"
+ " jra 5b\n"
+ ".previous\n"
+ ".section __ex_table,\"a\"\n"
+ " .align 4\n"
+ " .long 2b,6b\n"
+ " .long 22b,6b\n"
+ ".previous"
+ : "=d"(res), "=a"(src), "=d"(n)
+ : "i"(0), "0"(res), "1"(src), "2"(n)
+ : "d0");
+ return res;
+}
+EXPORT_SYMBOL(strnlen_user);
+
+
+/*
+ * Zero Userspace
+ */
+
+unsigned long __clear_user(void *to, unsigned long n)
+{
+ __asm__ __volatile__
+ (" tstl %1\n"
+ " jeq 3f\n"
+ "1: movel %3,(%0)+\n"
+ "2: subql #1,%1\n"
+ " jne 1b\n"
+ "3: movel %2,%1\n"
+ " bclr #1,%1\n"
+ " jeq 4f\n"
+ "24:movew %3,(%0)+\n"
+ "4: bclr #0,%1\n"
+ " jeq 5f\n"
+ "25:moveb %3,(%0)+\n"
+ "5:\n"
+ ".section .fixup,\"ax\"\n"
+ " .even\n"
+ "61:addql #1,%1\n"
+ "6: lsll #2,%1\n"
+ " addl %2,%1\n"
+ " jra 5b\n"
+ "7: addql #2,%1\n"
+ " jra 5b\n"
+ "8: addql #1,%1\n"
+ " jra 5b\n"
+ ".previous\n"
+ ".section __ex_table,\"a\"\n"
+ " .align 4\n"
+ " .long 1b,61b\n"
+ " .long 2b,6b\n"
+ " .long 3b,61b\n"
+ " .long 24b,7b\n"
+ " .long 4b,7b\n"
+ " .long 25b,8b\n"
+ " .long 5b,8b\n"
+ ".previous"
+ : "=a"(to), "=d"(n)
+ : "r"(n & 3), "d"(0), "0"(to), "1"(n/4));
+ return n;
+}
+EXPORT_SYMBOL(__clear_user);
+
+#endif /* CONFIG_COLDFIRE */
+

View File

@ -1,513 +0,0 @@
From 2bef1f8ce148cce9e782f75f9537767c1d8c0eea Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 16:58:27 -0600
Subject: [PATCH] Core Coldfire/MCF5445x arch/mm changes.
LTIBName: mcfv4e-arch-mm-mods-1
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/mm/Makefile | 1 +
arch/m68k/mm/cache.c | 41 ++++++++
arch/m68k/mm/cf-mmu.c | 251 +++++++++++++++++++++++++++++++++++++++++++++++++
arch/m68k/mm/hwtest.c | 2 +
arch/m68k/mm/init.c | 3 +-
arch/m68k/mm/kmap.c | 13 +++
arch/m68k/mm/memory.c | 66 +++++++++++++-
7 files changed, 373 insertions(+), 4 deletions(-)
create mode 100644 arch/m68k/mm/cf-mmu.c
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -6,3 +6,4 @@ obj-y := cache.o init.o fault.o hwtest.
obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
+obj-$(CONFIG_MMU_CFV4E) += cf-mmu.o kmap.o memory.o
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -10,7 +10,11 @@
#include <asm/pgalloc.h>
#include <asm/traps.h>
+#ifdef CONFIG_COLDFIRE
+#include <asm/cfcache.h>
+#endif /* CONFIG_COLDFIRE */
+#ifndef CONFIG_COLDFIRE
static unsigned long virt_to_phys_slow(unsigned long vaddr)
{
if (CPU_IS_060) {
@@ -69,11 +73,45 @@ static unsigned long virt_to_phys_slow(u
}
return 0;
}
+#endif /* CONFIG_COLDFIRE */
+
/* Push n pages at kernel virtual address and clear the icache */
/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
void flush_icache_range(unsigned long address, unsigned long endaddr)
{
+#ifdef CONFIG_COLDFIRE
+ unsigned long set;
+ unsigned long start_set;
+ unsigned long end_set;
+
+ start_set = address & _ICACHE_SET_MASK;
+ end_set = endaddr & _ICACHE_SET_MASK;
+
+ if (start_set > end_set) {
+ /* from the begining to the lowest address */
+ for (set = 0; set <= end_set; set += (0x10 - 3))
+ asm volatile ("cpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)" : : "a" (set));
+
+ /* next loop will finish the cache ie pass the hole */
+ end_set = LAST_ICACHE_ADDR;
+ }
+ for (set = start_set; set <= end_set; set += (0x10 - 3))
+ asm volatile ("cpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)" : : "a" (set));
+
+#else /* !CONFIG_COLDFIRE */
if (CPU_IS_040_OR_060) {
address &= PAGE_MASK;
@@ -94,9 +132,11 @@ void flush_icache_range(unsigned long ad
: "=&d" (tmp)
: "di" (FLUSH_I));
}
+#endif /* CONFIG_COLDFIRE */
}
EXPORT_SYMBOL(flush_icache_range);
+#ifndef CONFIG_COLDFIRE
void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
unsigned long addr, int len)
{
@@ -115,4 +155,5 @@ void flush_icache_user_range(struct vm_a
: "di" (FLUSH_I));
}
}
+#endif /* CONFIG_COLDFIRE */
--- /dev/null
+++ b/arch/m68k/mm/cf-mmu.c
@@ -0,0 +1,251 @@
+/*
+ * linux/arch/m68k/mm/cf-mmu.c
+ *
+ * Based upon linux/arch/m68k/mm/sun3mmu.c
+ * Based upon linux/arch/ppc/mm/mmu_context.c
+ *
+ * Implementations of mm routines specific to the Coldfire MMU.
+ *
+ * Copyright (c) 2008 Freescale Semiconductor, Inc.
+ */
+
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#ifdef CONFIG_BLK_DEV_RAM
+#include <linux/blkdev.h>
+#endif
+#include <linux/bootmem.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/cf_pgalloc.h>
+
+#include <asm/coldfire.h>
+#include <asm/tlbflush.h>
+
+mm_context_t next_mmu_context;
+unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
+
+atomic_t nr_free_contexts;
+struct mm_struct *context_mm[LAST_CONTEXT+1];
+void steal_context(void);
+
+
+const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n";
+
+extern unsigned long empty_bad_page_table;
+extern unsigned long empty_bad_page;
+extern unsigned long num_pages;
+
+extern char __init_begin, __init_end;
+
+void free_initmem(void)
+{
+ unsigned long addr;
+ unsigned long start = (unsigned long)&__init_begin;
+ unsigned long end = (unsigned long)&__init_end;
+
+ printk(KERN_INFO "free_initmem: __init_begin = 0x%lx __init_end = 0x%lx\n", start, end);
+
+ addr = (unsigned long)&__init_begin;
+ for (; addr < (unsigned long)&__init_end; addr += PAGE_SIZE) {
+ /* not currently used */
+ virt_to_page(addr)->flags &= ~(1 << PG_reserved);
+ init_page_count(virt_to_page(addr));
+ free_page(addr);
+ totalram_pages++;
+ }
+}
+
+/* Coldfire paging_init derived from sun3 */
+void __init paging_init(void)
+{
+ pgd_t * pg_dir;
+ pte_t * pg_table;
+ int i;
+ unsigned long address;
+ unsigned long next_pgtable;
+ unsigned long bootmem_end;
+ unsigned long zones_size[MAX_NR_ZONES];
+ unsigned long size;
+ enum zone_type zone;
+
+ empty_zero_page = (void *)alloc_bootmem_pages(PAGE_SIZE);
+ memset((void *)empty_zero_page, 0, PAGE_SIZE);
+
+ pg_dir = swapper_pg_dir;
+ memset(swapper_pg_dir, 0, sizeof (swapper_pg_dir));
+
+ size = num_pages * sizeof(pte_t);
+ size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
+ next_pgtable = (unsigned long)alloc_bootmem_pages(size);
+
+ bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK;
+ pg_dir += PAGE_OFFSET >> PGDIR_SHIFT;
+
+ address = PAGE_OFFSET;
+ while (address < (unsigned long)high_memory)
+ {
+ pg_table = (pte_t *)next_pgtable;
+ next_pgtable += PTRS_PER_PTE * sizeof (pte_t);
+ pgd_val(*pg_dir) = (unsigned long) pg_table;
+ pg_dir++;
+
+ /* now change pg_table to kernel virtual addresses */
+ for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table)
+ {
+ pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
+ if (address >= (unsigned long)high_memory)
+ pte_val (pte) = 0;
+
+ set_pte (pg_table, pte);
+ address += PAGE_SIZE;
+ }
+ }
+
+ current->mm = NULL;
+
+ /* clear zones */
+ for (zone = 0; zone < MAX_NR_ZONES; zone++)
+ zones_size[zone] = 0x0;
+
+ /* allocate the bottom 32M (0x40x 0x41x) to DMA - head.S marks them NO CACHE */
+ /* JKM - this should be changed to allocate from the TOP (0x4f,0x4e) but the
+ * allocator is being a bit challenging */
+ zones_size[ZONE_DMA] = (32*1024*1024) >> PAGE_SHIFT;
+
+ /* allocate the rest to NORMAL - head.S marks them CACHE */
+ zones_size[ZONE_NORMAL] = (((unsigned long)high_memory - PAGE_OFFSET) >> PAGE_SHIFT) - zones_size[0];
+
+ free_area_init(zones_size);
+}
+
+
+int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
+{
+ struct mm_struct *mm;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned long mmuar;
+ int asid;
+ int flags;
+
+ local_save_flags(flags);
+ local_irq_disable();
+
+ mmuar = ( dtlb ) ? regs->mmuar
+ : regs->pc + (extension_word * sizeof(long));
+
+ mm = (!user_mode(regs) && (mmuar >= PAGE_OFFSET)) ? &init_mm
+ : current->mm;
+ if (!mm) {
+ local_irq_restore(flags);
+ return (-1);
+ }
+
+ pgd = pgd_offset(mm, mmuar);
+ if (pgd_none(*pgd)) {
+ local_irq_restore(flags);
+ return (-1);
+ }
+
+ pmd = pmd_offset(pgd, mmuar);
+ if (pmd_none(*pmd)) {
+ local_irq_restore(flags);
+ return (-1);
+ }
+
+ pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
+ : pte_offset_map(pmd, mmuar);
+ if (pte_none(*pte) || !pte_present(*pte)) {
+ local_irq_restore(flags);
+ return (-1);
+ }
+
+ if (write) {
+ if (!pte_write(*pte)) {
+ local_irq_restore(flags);
+ return (-1);
+ }
+ set_pte(pte, pte_mkdirty(*pte));
+ }
+
+ set_pte(pte, pte_mkyoung(*pte));
+ asid = mm->context & 0xff;
+ if (!pte_dirty(*pte) && mmuar<=PAGE_OFFSET)
+ set_pte(pte, pte_wrprotect(*pte));
+
+ *MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
+ | (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK ) >> CF_PAGE_MMUTR_SHIFT)
+ | MMUTR_V;
+
+ *MMUDR = (pte_val(*pte) & PAGE_MASK)
+ | ((pte->pte) & CF_PAGE_MMUDR_MASK)
+ | MMUDR_SZ8K | MMUDR_X;
+
+ if ( dtlb )
+ *MMUOR = MMUOR_ACC | MMUOR_UAA;
+ else
+ *MMUOR = MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA;
+
+ asm ("nop");
+ /*printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
+ (pte_val(*pte) & PAGE_MASK));*/
+ local_irq_restore(flags);
+ return (0);
+}
+
+
+/* The following was taken from arch/ppc/mmu_context.c
+ *
+ * Initialize the context management stuff.
+ */
+void __init mmu_context_init(void)
+{
+ /*
+ * Some processors have too few contexts to reserve one for
+ * init_mm, and require using context 0 for a normal task.
+ * Other processors reserve the use of context zero for the kernel.
+ * This code assumes FIRST_CONTEXT < 32.
+ */
+ context_map[0] = (1 << FIRST_CONTEXT) - 1;
+ next_mmu_context = FIRST_CONTEXT;
+ atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
+}
+
+/*
+ * Steal a context from a task that has one at the moment.
+ * This is only used on 8xx and 4xx and we presently assume that
+ * they don't do SMP. If they do then thicfpgalloc.hs will have to check
+ * whether the MM we steal is in use.
+ * We also assume that this is only used on systems that don't
+ * use an MMU hash table - this is true for 8xx and 4xx.
+ * This isn't an LRU system, it just frees up each context in
+ * turn (sort-of pseudo-random replacement :). This would be the
+ * place to implement an LRU scheme if anyone was motivated to do it.
+ * -- paulus
+ */
+void steal_context(void)
+{
+ struct mm_struct *mm;
+ /* free up context `next_mmu_context' */
+ /* if we shouldn't free context 0, don't... */
+ if (next_mmu_context < FIRST_CONTEXT)
+ next_mmu_context = FIRST_CONTEXT;
+ mm = context_mm[next_mmu_context];
+ flush_tlb_mm(mm);
+ destroy_context(mm);
+}
--- a/arch/m68k/mm/hwtest.c
+++ b/arch/m68k/mm/hwtest.c
@@ -25,6 +25,7 @@
#include <linux/module.h>
+#ifndef CONFIG_COLDFIRE
int hwreg_present( volatile void *regp )
{
int ret = 0;
@@ -82,4 +83,5 @@ int hwreg_write( volatile void *regp, un
return( ret );
}
EXPORT_SYMBOL(hwreg_write);
+#endif
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -122,7 +122,6 @@ void __init mem_init(void)
if (MACH_IS_ATARI)
atari_stram_mem_init_hook();
#endif
-
/* this will put all memory onto the freelists */
totalram_pages = num_physpages = 0;
for_each_online_pgdat(pgdat) {
@@ -146,7 +145,7 @@ void __init mem_init(void)
}
}
-#ifndef CONFIG_SUN3
+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
/* insert pointer tables allocated so far into the tablelist */
init_pointer_table((unsigned long)kernel_pg_dir);
for (i = 0; i < PTRS_PER_PGD; i++) {
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -24,7 +24,11 @@
#undef DEBUG
+#ifndef CONFIG_COLDFIRE
#define PTRTREESIZE (256*1024)
+#else
+#define PTRTREESIZE PAGE_SIZE
+#endif
/*
* For 040/060 we can use the virtual memory area like other architectures,
@@ -50,7 +54,11 @@ static inline void free_io_area(void *ad
#else
+#ifdef CONFIG_COLDFIRE
+#define IO_SIZE PAGE_SIZE
+#else
#define IO_SIZE (256*1024)
+#endif
static struct vm_struct *iolist;
@@ -170,7 +178,12 @@ void __iomem *__ioremap(unsigned long ph
break;
}
} else {
+#ifndef CONFIG_COLDFIRE
physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
+#else
+ physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY | \
+ _PAGE_READWRITE);
+#endif
switch (cacheflag) {
case IOMAP_NOCACHE_SER:
case IOMAP_NOCACHE_NONSER:
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -203,7 +203,38 @@ static inline void pushcl040(unsigned lo
void cache_clear (unsigned long paddr, int len)
{
- if (CPU_IS_040_OR_060) {
+ if (CPU_IS_CFV4E) {
+ unsigned long set;
+ unsigned long start_set;
+ unsigned long end_set;
+
+ start_set = paddr & _ICACHE_SET_MASK;
+ end_set = (paddr+len-1) & _ICACHE_SET_MASK;
+
+ if (start_set > end_set) {
+ /* from the begining to the lowest address */
+ for (set = 0; set <= end_set; set += (0x10 - 3))
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : : "a" (set));
+
+ /* next loop will finish the cache ie pass the hole */
+ end_set = LAST_ICACHE_ADDR;
+ }
+ for (set = start_set; set <= end_set; set += (0x10 - 3))
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : : "a" (set));
+
+ } else if (CPU_IS_040_OR_060) {
int tmp;
/*
@@ -250,7 +281,38 @@ EXPORT_SYMBOL(cache_clear);
void cache_push (unsigned long paddr, int len)
{
- if (CPU_IS_040_OR_060) {
+ if (CPU_IS_CFV4E) {
+ unsigned long set;
+ unsigned long start_set;
+ unsigned long end_set;
+
+ start_set = paddr & _ICACHE_SET_MASK;
+ end_set = (paddr+len-1) & _ICACHE_SET_MASK;
+
+ if (start_set > end_set) {
+ /* from the begining to the lowest address */
+ for (set = 0; set <= end_set; set += (0x10 - 3))
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : : "a" (set));
+
+ /* next loop will finish the cache ie pass the hole */
+ end_set = LAST_ICACHE_ADDR;
+ }
+ for (set = start_set; set <= end_set; set += (0x10 - 3))
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : : "a" (set));
+
+ } else if (CPU_IS_040_OR_060) {
int tmp = PAGE_SIZE;
/*

File diff suppressed because it is too large Load Diff

View File

@ -1,73 +0,0 @@
From 4b5a534c16325217c05a87938885c0ee1fe69a34 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 17:01:41 -0600
Subject: [PATCH] MCF5445x core serial support.
LTIBName: m5445x-serial
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/serial/mcfserial.c | 23 +++++++++++++++++++++--
1 files changed, 21 insertions(+), 2 deletions(-)
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -45,7 +45,9 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#ifdef CONFIG_NETtel
#include <asm/nettel.h>
+#endif
#include <asm/uaccess.h>
#include "mcfserial.h"
@@ -61,7 +63,8 @@ struct timer_list mcfrs_timer_struct;
#define CONSOLE_BAUD_RATE 38400
#define DEFAULT_CBAUD B38400
#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || \
- defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO)
+ defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO) || \
+ defined(CONFIG_M54455)
#define CONSOLE_BAUD_RATE 115200
#define DEFAULT_CBAUD B115200
#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
@@ -94,7 +97,7 @@ static struct tty_driver *mcfrs_serial_d
#undef SERIAL_DEBUG_FLOW
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
#define IRQBASE (MCFINT_VECBASE+MCFINT_UART0)
#else
#define IRQBASE 73
@@ -1604,6 +1607,20 @@ static void mcfrs_irqinit(struct mcf_ser
/* GPIOs also must be initalized, depends on board */
break;
}
+#elif defined(CONFIG_M54455)
+ volatile unsigned char *uartp;
+ uartp = info->addr;
+ switch (info->line) {
+ case 0:
+ MCF_GPIO_PAR_UART |= 0x000F;
+ break;
+ case 1:
+ MCF_GPIO_PAR_UART |= 0x0FF0;
+ break;
+ case 2:
+ /* GPIOs also must be initalized, depends on board */
+ break;
+ }
#else
volatile unsigned char *icrp, *uartp;
@@ -1966,7 +1983,9 @@ struct console mcfrs_console = {
static int __init mcfrs_console_init(void)
{
+#ifndef CONFIG_M54455
register_console(&mcfrs_console);
+#endif
return 0;
}

View File

@ -1,392 +0,0 @@
From c562ab80fe383e6fa49dbe38257421cf37f0e4b3 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 17:07:25 -0600
Subject: [PATCH] MCF5445x FEC support.
LTIBName: m5445x-fec
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/net/Kconfig | 8 ++-
drivers/net/fec.c | 207 ++++++++++++++++++++++++++++++++++++++++++++++----
drivers/net/fec.h | 2 +-
3 files changed, 198 insertions(+), 19 deletions(-)
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1973,7 +1973,7 @@ config 68360_ENET
config FEC
bool "FEC ethernet controller (of ColdFire CPUs)"
- depends on M523x || M527x || M5272 || M528x || M520x
+ depends on M523x || M527x || M5272 || M528x || M520x || M54455
help
Say Y here if you want to use the built-in 10/100 Fast ethernet
controller on some Motorola ColdFire processors.
@@ -1985,6 +1985,12 @@ config FEC2
Say Y here if you want to use the second built-in 10/100 Fast
ethernet controller on some Motorola ColdFire processors.
+config FEC_SHARED_PHY
+ bool "Shared PHY interface(on some ColdFire designs)"
+ depends on FEC2
+ help
+ Say Y here if both PHYs are controlled via a single channel.
+
config FEC_MPC52xx
tristate "MPC52xx FEC driver"
depends on PPC_MERGE && PPC_MPC52xx && PPC_BESTCOMM_FEC
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -51,7 +51,9 @@
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
+ defined(CONFIG_M54455)
+
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include "fec.h"
@@ -82,6 +84,11 @@ static unsigned int fec_hw[] = {
(MCF_MBAR+0x30000),
#elif defined(CONFIG_M532x)
(MCF_MBAR+0xfc030000),
+#elif defined(CONFIG_M54455)
+ (MCF_MBAR+0xfc030000),
+#if defined(CONFIG_FEC2)
+ (MCF_MBAR+0xfc034000),
+#endif
#else
&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec),
#endif
@@ -172,7 +179,7 @@ typedef struct {
* account when setting it.
*/
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
#else
#define OPT_FRAME_SIZE 0
@@ -213,6 +220,7 @@ struct fec_enet_private {
uint phy_speed;
phy_info_t const *phy;
struct work_struct phy_task;
+ volatile fec_t *phy_hwp;
uint sequence_done;
uint mii_phy_task_queued;
@@ -349,7 +357,8 @@ fec_enet_start_xmit(struct sk_buff *skb,
if (bdp->cbd_bufaddr & 0x3) {
unsigned int index;
index = bdp - fep->tx_bd_base;
- memcpy(fep->tx_bounce[index], (void *) bdp->cbd_bufaddr, bdp->cbd_datlen);
+ memcpy(fep->tx_bounce[index],
+ (void *)skb->data, bdp->cbd_datlen);
bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]);
}
@@ -702,7 +711,7 @@ fec_enet_mii(struct net_device *dev)
uint mii_reg;
fep = netdev_priv(dev);
- ep = fep->hwp;
+ ep = fep->phy_hwp;
mii_reg = ep->fec_mii_data;
spin_lock(&fep->lock);
@@ -753,7 +762,7 @@ mii_queue(struct net_device *dev, int re
mii_tail = mip;
} else {
mii_head = mii_tail = mip;
- fep->hwp->fec_mii_data = regval;
+ fep->phy_hwp->fec_mii_data = regval;
}
} else {
retval = 1;
@@ -1151,8 +1160,7 @@ static phy_info_t const phy_info_ks8721b
};
/* ------------------------------------------------------------------------- */
-/* register definitions for the DP83848 */
-
+/* register definitions for the DP83848 and DP83849 */
#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */
static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev)
@@ -1186,27 +1194,50 @@ static void mii_parse_dp8384x_sr2(uint m
*s |= PHY_STAT_FAULT;
}
+static phy_cmd_t const phy_cmd_dp8384x_ack_int[] = {
+ { mk_mii_end, }
+ };
+
+static phy_cmd_t const phy_cmd_dp8384x_shutdown[] = {
+ { mk_mii_end, }
+ };
+
static phy_info_t phy_info_dp83848= {
- 0x020005c9,
- "DP83848",
+ .id = 0x020005c9,
+ .name = "DP83848",
- (const phy_cmd_t []) { /* config */
+ .config = (const phy_cmd_t []) { /* config */
{ mk_mii_read(MII_REG_CR), mii_parse_cr },
{ mk_mii_read(MII_REG_ANAR), mii_parse_anar },
{ mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
{ mk_mii_end, }
},
- (const phy_cmd_t []) { /* startup - enable interrupts */
+ .startup = (const phy_cmd_t []) { /* startup - enable interrupts */
{ mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
{ mk_mii_read(MII_REG_SR), mii_parse_sr },
{ mk_mii_end, }
},
- (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */
+ .ack_int = phy_cmd_dp8384x_ack_int,
+ .shutdown = phy_cmd_dp8384x_shutdown,
+};
+
+static phy_info_t phy_info_dp83849 = {
+ .id = 0x020005ca,
+ .name = "DP83849",
+
+ .config = (const phy_cmd_t []) { /* config */
+ { mk_mii_read(MII_REG_CR), mii_parse_cr },
+ { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+ { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
{ mk_mii_end, }
},
- (const phy_cmd_t []) { /* shutdown */
+ .startup = (const phy_cmd_t []) { /* startup - enable interrupts */
+ { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
+ { mk_mii_read(MII_REG_SR), mii_parse_sr },
{ mk_mii_end, }
},
+ .ack_int = phy_cmd_dp8384x_ack_int,
+ .shutdown = phy_cmd_dp8384x_shutdown,
};
/* ------------------------------------------------------------------------- */
@@ -1218,6 +1249,7 @@ static phy_info_t const * const phy_info
&phy_info_am79c874,
&phy_info_ks8721bl,
&phy_info_dp83848,
+ &phy_info_dp83849,
NULL
};
@@ -1799,6 +1831,138 @@ static void __inline__ fec_uncache(unsig
/* ------------------------------------------------------------------------- */
+#elif defined(CONFIG_M54455)
+/*
+ * Code specific for M54455
+ */
+
+static void __inline__ fec_request_intrs(struct net_device *dev)
+{
+ struct fec_enet_private *fep;
+ int b;
+ static const struct idesc {
+ char *name;
+ unsigned short irq;
+ } *idp, id[] = {
+ { "fec(TXF)", 36 },
+ { "fec(TXB)", 37 },
+ { "fec(TXFIFO)", 38 },
+ { "fec(TXCR)", 39 },
+ { "fec(RXF)", 40 },
+ { "fec(RXB)", 41 },
+ { "fec(MII)", 42 },
+ { "fec(LC)", 43 },
+ { "fec(HBERR)", 44 },
+ { "fec(GRA)", 45 },
+ { "fec(EBERR)", 46 },
+ { "fec(BABT)", 47 },
+ { "fec(BABR)", 48 },
+ { NULL },
+ };
+
+ fep = netdev_priv(dev);
+ b = (fep->index) ? 77 : 64;
+
+ /* Setup interrupt handlers. */
+ for (idp = id; idp->name; idp++) {
+ if (request_irq(b+idp->irq, fec_enet_interrupt, 0,
+ idp->name, dev) != 0)
+ printk(KERN_ERR "FEC: Could not alloc %s IRQ(%d)!\n",
+ idp->name, b+idp->irq);
+ }
+
+ if (fep->index) {
+ /* Configure RMII */
+ MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC &
+ MCF_GPIO_PAR_FEC_FEC1_MASK) |
+ MCF_GPIO_PAR_FEC_FEC1_RMII_GPIO;
+ } else {
+ /* Configure RMII */
+ MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC &
+ MCF_GPIO_PAR_FEC_FEC0_MASK) |
+ MCF_GPIO_PAR_FEC_FEC0_RMII_GPIO;
+ }
+
+ /* Set up gpio outputs for MII lines on FEC0 */
+ MCF_GPIO_PAR_FECI2C |= (0 |
+ MCF_GPIO_PAR_FECI2C_MDIO0_MDIO0 |
+ MCF_GPIO_PAR_FECI2C_MDC0_MDC0);
+}
+
+static void __inline__ fec_set_mii(struct net_device *dev,
+ struct fec_enet_private *fep)
+{
+ volatile fec_t *fecp;
+
+ fecp = fep->hwp;
+ fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
+ fecp->fec_x_cntrl = 0x00;
+
+ /*
+ * Set MII speed to 2.5 MHz
+ */
+ fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2;
+ fecp->fec_mii_speed = fep->phy_speed;
+
+ fec_restart(dev, 0);
+}
+
+static void __inline__ fec_get_mac(struct net_device *dev)
+{
+ struct fec_enet_private *fep = netdev_priv(dev);
+ volatile fec_t *fecp;
+ unsigned char *iap, tmpaddr[ETH_ALEN];
+
+ fecp = fep->hwp;
+
+ if (FEC_FLASHMAC) {
+ /*
+ * Get MAC address from FLASH.
+ * If it is all 1's or 0's, use the default.
+ */
+ iap = FEC_FLASHMAC;
+ if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) &&
+ (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0))
+ iap = fec_mac_default;
+ if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) &&
+ (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
+ iap = fec_mac_default;
+ } else {
+ *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
+ *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
+ iap = &tmpaddr[0];
+ }
+
+ memcpy(dev->dev_addr, iap, ETH_ALEN);
+
+ /* Adjust MAC if using default MAC address */
+ if (iap == fec_mac_default)
+ dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] +
+ fep->index;
+}
+
+static void __inline__ fec_enable_phy_intr(void)
+{
+}
+
+static void __inline__ fec_disable_phy_intr(void)
+{
+}
+
+static void __inline__ fec_phy_ack_intr(void)
+{
+}
+
+static void __inline__ fec_localhw_setup(void)
+{
+}
+
+static void __inline__ fec_uncache(unsigned long addr)
+{
+}
+
+/* ------------------------------------------------------------------------- */
+
#else
@@ -2305,7 +2469,7 @@ fec_set_mac_address(struct net_device *d
}
-/* Initialize the FEC Ethernet on 860T (or ColdFire 5272).
+/* Initialize the FEC Ethernet.
*/
/*
* XXX: We need to clean up on failure exits here.
@@ -2326,7 +2490,7 @@ int __init fec_enet_init(struct net_devi
/* Allocate memory for buffer descriptors.
*/
- mem_addr = __get_free_page(GFP_KERNEL);
+ mem_addr = __get_free_page(GFP_DMA);
if (mem_addr == 0) {
printk("FEC: allocate descriptor memory failed?\n");
return -ENOMEM;
@@ -2339,6 +2503,11 @@ int __init fec_enet_init(struct net_devi
fep->index = index;
fep->hwp = fecp;
fep->netdev = dev;
+#ifdef CONFIG_FEC_SHARED_PHY
+ fep->phy_hwp = (volatile fec_t *) fec_hw[index & ~1];
+#else
+ fep->phy_hwp = fecp;
+#endif
/* Whack a reset. We should wait for this.
*/
@@ -2375,7 +2544,7 @@ int __init fec_enet_init(struct net_devi
/* Allocate a page.
*/
- mem_addr = __get_free_page(GFP_KERNEL);
+ mem_addr = __get_free_page(GFP_DMA);
/* XXX: missing check for allocation failure */
fec_uncache(mem_addr);
@@ -2400,7 +2569,7 @@ int __init fec_enet_init(struct net_devi
bdp = fep->tx_bd_base;
for (i=0, j=FEC_ENET_TX_FRPPG; i<TX_RING_SIZE; i++) {
if (j >= FEC_ENET_TX_FRPPG) {
- mem_addr = __get_free_page(GFP_KERNEL);
+ mem_addr = __get_free_page(GFP_DMA);
j = 1;
} else {
mem_addr += FEC_ENET_TX_FRSIZE;
@@ -2462,7 +2631,11 @@ int __init fec_enet_init(struct net_devi
* remainder of the interface.
*/
fep->phy_id_done = 0;
+#ifndef CONFIG_FEC_SHARED_PHY
fep->phy_addr = 0;
+#else
+ fep->phy_addr = fep->index;
+#endif
mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
index++;
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -14,7 +14,7 @@
/****************************************************************************/
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
/*
* Just figures, Motorola would have to change the offsets for
* registers in the same peripheral device on different models

View File

@ -1,25 +0,0 @@
From a51f4e9bff26cc43b53938169f98c27183ec63ea Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 17:08:59 -0600
Subject: [PATCH] Change to align on page size for COLDFIRE.
LTIBName: mcfv4e-namespace-align
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
fs/namespace.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -1364,7 +1364,11 @@ int copy_mount_options(const void __user
/* copy_from_user cannot cross TASK_SIZE ! */
size = TASK_SIZE - (unsigned long)data;
if (size > PAGE_SIZE)
+#ifndef CONFIG_COLDFIRE
size = PAGE_SIZE;
+#else
+ size = PAGE_SIZE - ((unsigned long)data & ~PAGE_MASK);
+#endif
i = size - exact_copy_from_user((void *)page, data, size);
if (!i) {

View File

@ -1,877 +0,0 @@
From d0910067712299dc63cf58447b5dd83513fcbdb4 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 31 Oct 2007 17:12:03 -0600
Subject: [PATCH] MCF54455 EVB default configuration.
LTIBName: m5445x-defconfig-base
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/configs/m54455evb_defconfig | 862 +++++++++++++++++++++++++++++++++
1 files changed, 862 insertions(+), 0 deletions(-)
create mode 100644 arch/m68k/configs/m54455evb_defconfig
--- /dev/null
+++ b/arch/m68k/configs/m54455evb_defconfig
@@ -0,0 +1,862 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+# Tue Nov 27 23:42:38 2007
+#
+CONFIG_M68K=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_TIME_LOW_RES=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_NO_IOPORT=y
+# CONFIG_NO_DMA is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# Platform dependent setup
+#
+# CONFIG_SUN3 is not set
+CONFIG_COLDFIRE=y
+CONFIG_CFV4E=y
+# CONFIG_AMIGA is not set
+# CONFIG_ATARI is not set
+# CONFIG_MAC is not set
+# CONFIG_APOLLO is not set
+# CONFIG_VME is not set
+# CONFIG_HP300 is not set
+# CONFIG_SUN3X is not set
+# CONFIG_Q40 is not set
+
+#
+# Processor type
+#
+# CONFIG_M68020 is not set
+# CONFIG_M68030 is not set
+# CONFIG_M68040 is not set
+# CONFIG_M68060 is not set
+CONFIG_M54455=y
+CONFIG_MCFCLK=266666666
+# CONFIG_MCF_USER_HALT is not set
+CONFIG_MMU_CFV4E=y
+CONFIG_SDRAM_BASE=0x40000000
+CONFIG_SDRAM_SIZE=0x0FFFFFFF
+CONFIG_NOR_FLASH_BASE=0x00000000
+# CONFIG_M68KFPU_EMU is not set
+CONFIG_ADVANCED=y
+# CONFIG_RMW_INSNS is not set
+CONFIG_SINGLE_MEMORY_CHUNK=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_NEED_MULTIPLE_NODES=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+
+#
+# General setup
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_PROC_HARDWARE=y
+CONFIG_ZONE_DMA=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_DEBUG_VERBOSE=0
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x1000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=1
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=64000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_PATA_FSL=m
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_FEC=y
+# CONFIG_FEC2 is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_COLDFIRE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# Character devices
+#
+# CONFIG_SERIAL_CONSOLE is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_ROMFS_FS is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+CONFIG_DEBUG_SLAB=y
+# CONFIG_DEBUG_SLAB_LEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_FRAME_POINTER is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/nfs rw nfsroot=172.27.163.2:/tftpboot/ltib ip=172.27.163.3:172.27.163.2:172.27.255.254:255.255.0.0::eth0:off mtdparts=phys_mapped_flash:16m(User)"
+
+#
+# CodeTEST Setup
+#
+# CONFIG_CODETEST is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_MCFCAU=y
+CONFIG_CRYPTO_DEV_MCFCAU_DES=y
+CONFIG_CRYPTO_DEV_MCFCAU_AES=y
+CONFIG_CRYPTO_DEV_MCFCAU_MD5=y
+CONFIG_CRYPTO_DEV_MCFCAU_SHA1=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y

File diff suppressed because it is too large Load Diff

View File

@ -1,61 +0,0 @@
From ed9d4b88136173a4e17701d9c1162ddfecf902e4 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 19 Nov 2007 15:24:30 -0700
Subject: [PATCH] Short circuit IOREMAP calls in the 0xF0000000 range.
LTIBName: m5445x-ioremap-xf0000000
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 4 ++--
arch/m68k/mm/kmap.c | 14 ++++++++++++--
2 files changed, 14 insertions(+), 4 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -56,13 +56,13 @@
* Setup ACR mappings to provide the following memory map:
* Data
* 0xA0000000 -> 0xAFFFFFFF [0] NO CACHE / PRECISE / SUPER ONLY
- * 0xFC000000 -> 0xFCFFFFFF [1] NO CACHE / PRECISE / SUPER ONLY
+ * 0xF0000000 -> 0xFFFFFFFF [1] NO CACHE / PRECISE / SUPER ONLY
* Code
* None currently (mapped via TLBs)
*/
#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */
-#define ACR1_DEFAULT #0xFC00A040 /* ACR1 default value */
+#define ACR1_DEFAULT #0xF00FA040 /* ACR1 default value */
#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -133,8 +133,18 @@ void __iomem *__ioremap(unsigned long ph
}
#endif
+#ifdef CONFIG_M54455
+ if (physaddr >= 0xf0000000) {
+ /* short circuit mappings for xf0000000 */
#ifdef DEBUG
- printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
+ printk(KERN_INFO "ioremap: short circuiting 0x%lx mapping\n", physaddr);
+#endif
+ return (void __iomem *)physaddr;
+ }
+#endif
+
+#ifdef DEBUG
+ printk("ioremap: paddr=0x%lx,size=0x%lx(%d) - ", physaddr, size, cacheflag);
#endif
/*
* Mappings have to be aligned
@@ -153,7 +163,7 @@ void __iomem *__ioremap(unsigned long ph
virtaddr = (unsigned long)area->addr;
retaddr = virtaddr + offset;
#ifdef DEBUG
- printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
+ printk(" paddr=0x%lx,vaddr=0x%lx,retaddr=0x%lx", physaddr, virtaddr, retaddr);
#endif
/*

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -1,25 +0,0 @@
From 2beb3e5edd46ea1d87ac87dbb977dce423a1f124 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 21 Nov 2007 14:56:19 -0700
Subject: [PATCH] Change elf entry point from _start to _stext.
Changing the symbol was required by CodeWarrior so it could
locate the entry point.
LTIBName: mcfv4e-elf-entry-stext
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/vmlinux-cf.lds | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/m68k/coldfire/vmlinux-cf.lds
+++ b/arch/m68k/coldfire/vmlinux-cf.lds
@@ -4,7 +4,7 @@
OUTPUT_FORMAT("elf32-m68k", "elf32-m68k", "elf32-m68k")
OUTPUT_ARCH(m68k)
-ENTRY(_start)
+ENTRY(_stext)
jiffies = jiffies_64 + 4;
SECTIONS
{

View File

@ -1,187 +0,0 @@
From 3aa2c28ff4271e9232b6c98ba000804de3ed3f33 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 26 Nov 2007 23:41:23 -0700
Subject: [PATCH] Rewrite coldfire linker script.
LTIBName: mcfv4e-linker-script-update
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/vmlinux-cf.lds | 107 ++++++++++++++++++++++++-------------
arch/m68k/kernel/vmlinux.lds.S | 3 +-
2 files changed, 72 insertions(+), 38 deletions(-)
--- a/arch/m68k/coldfire/vmlinux-cf.lds
+++ b/arch/m68k/coldfire/vmlinux-cf.lds
@@ -1,76 +1,115 @@
-/* ld script to make m68k Coldfire Linux kernel */
+/* ld script to make m68k Coldfire Linux kernel
+ *
+ * Derived from arch/m68k/kernel/vmlinux-std.lds
+ *
+ * Updated 11/26/2007 for new CodeSourcery toolset
+ * by Kurt Mahan <kmahan@freescale.com>
+ */
+
+#define LOAD_OFFSET 0x00000000
#include <asm-generic/vmlinux.lds.h>
+#include <asm/page_offset.h>
+
+#define START_OFFSET 0x00020000
+#define IMAGE_START PAGE_OFFSET_RAW + START_OFFSET
OUTPUT_FORMAT("elf32-m68k", "elf32-m68k", "elf32-m68k")
OUTPUT_ARCH(m68k)
ENTRY(_stext)
jiffies = jiffies_64 + 4;
+
SECTIONS
{
- . = 0xC0020000;
- _text = .; /* Text and read-only data */
- .text : {
+ . = IMAGE_START;
+ .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) {
+ _text = .; /* Text and read-only data */
*(.text.head)
+ } :text = 0x4e75
+
+ .text : AT(ADDR(.text) - LOAD_OFFSET) {
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
*(.fixup)
*(.gnu.warning)
- } :text = 0x4e75
-
+ } :text = 0x4e75
_etext = .; /* End of text section */
. = ALIGN(16);
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
+ __start___ex_table = .;
+ *(__ex_table)
+ __stop___ex_table = .;
+ }
RODATA
- .data : { /* Data */
+ . = ALIGN(8192);
+ .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */
DATA_DATA
CONSTRUCTORS
- }
+ } :data
- .bss : { *(.bss) } /* BSS */
+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { /* BSS */
+ *(.bss)
+ }
. = ALIGN(16);
- .data.cacheline_aligned : { *(.data.cacheline_aligned) } :data
+ .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET ) {
+ *(.data.cacheline_aligned)
+ } :data
_edata = .; /* End of data section */
. = ALIGN(8192); /* Initrd */
- __init_begin = .;
- .init.text : {
+ .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
+ __init_begin = .;
_sinittext = .;
*(.init.text)
_einittext = .;
}
- .init.data : { *(.init.data) }
+
+ .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
+ *(.init.data)
+ }
+
. = ALIGN(16);
- __setup_start = .;
- .init.setup : { *(.init.setup) }
- __setup_end = .;
- __initcall_start = .;
- .initcall.init : {
+ .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
+ __setup_start = .;
+ *(.init.setup)
+ __setup_end = .;
+ }
+
+ .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
+ __initcall_start = .;
INITCALLS
+ __initcall_end = .;
}
- __initcall_end = .;
- __con_initcall_start = .;
- .con_initcall.init : { *(.con_initcall.init) }
- __con_initcall_end = .;
+
+ .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
+ __con_initcall_start = .;
+ *(.con_initcall.init)
+ __con_initcall_end = .;
+ }
+
SECURITY_INIT
+
#ifdef CONFIG_BLK_DEV_INITRD
. = ALIGN(8192);
- __initramfs_start = .;
- .init.ramfs : { *(.init.ramfs) }
- __initramfs_end = .;
+ .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
+ __initramfs_start = .;
+ *(.init.ramfs)
+ __initramfs_end = .;
+ }
#endif
+
. = ALIGN(8192);
__init_end = .;
- .data.init_task : { *(.data.init_task) } /* The initial task and kernel stack */
+ .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
+ *(.data.init_task) /* The initial task and kernel stack */
+ }
_end = . ;
@@ -79,14 +118,8 @@ SECTIONS
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
- }
+ }
/* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
+ STABS_DEBUG
}
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,6 +1,7 @@
PHDRS
{
- text PT_LOAD FILEHDR PHDRS FLAGS (7);
+ headers PT_PHDR PHDRS ;
+ text PT_LOAD FILEHDR PHDRS FLAGS (5);
data PT_LOAD FLAGS (7);
}
#ifdef CONFIG_SUN3

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@ -1,168 +0,0 @@
From 3f698a1cf08cc02911cdb2ca3217be77eeba794b Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 27 Nov 2007 23:17:53 -0700
Subject: [PATCH] Change inline assembly memory params.
For various routines change how the assembly memory pointer
is passed in.
LTIBName: mcfv4e-inline-memory-params
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/bitops.h | 68 ++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 67 insertions(+), 1 deletions(-)
--- a/include/asm-m68k/bitops.h
+++ b/include/asm-m68k/bitops.h
@@ -465,7 +465,7 @@ static inline int ext2_find_next_bit(con
__constant_coldfire_test_and_set_bit(nr, vaddr) : \
__generic_coldfire_test_and_set_bit(nr, vaddr))
-
+#if 0
static __inline__ int __constant_coldfire_test_and_set_bit(int nr,
volatile void *vaddr)
{
@@ -477,6 +477,17 @@ static __inline__ int __constant_coldfir
: "di" (nr & 7));
return retval;
}
+#else
+static __inline__ int __constant_coldfire_test_and_set_bit(int nr,volatile void * vaddr)
+{
+ char retval;
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+ __asm__ __volatile__ ("bset %2,(%4); sne %0"
+ : "=d" (retval), "=m" (*p)
+ : "di" (nr & 7), "m" (*p), "a" (p));
+ return retval;
+}
+#endif
static __inline__ int __generic_coldfire_test_and_set_bit(int nr,
volatile void *vaddr)
@@ -496,6 +507,7 @@ static __inline__ int __generic_coldfire
__constant_coldfire_set_bit(nr, vaddr) : \
__generic_coldfire_set_bit(nr, vaddr))
+#if 0
static __inline__ void __constant_coldfire_set_bit(int nr,
volatile void *vaddr)
{
@@ -503,6 +515,14 @@ static __inline__ void __constant_coldfi
__asm__ __volatile__ ("bset %1,%0"
: "+QUd" (*p) : "di" (nr & 7));
}
+#else
+static __inline__ void __constant_coldfire_set_bit(int nr, volatile void * vaddr)
+{
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+ __asm__ __volatile__ ("bset %1,(%3)"
+ : "=m" (*p) : "di" (nr & 7), "m" (*p), "a" (p));
+}
+#endif
static __inline__ void __generic_coldfire_set_bit(int nr, volatile void *vaddr)
{
@@ -518,6 +538,7 @@ static __inline__ void __generic_coldfir
__constant_coldfire_test_and_clear_bit(nr, vaddr) : \
__generic_coldfire_test_and_clear_bit(nr, vaddr))
+#if 0
static __inline__ int __constant_coldfire_test_and_clear_bit(int nr,
volatile void *vaddr)
{
@@ -530,6 +551,19 @@ static __inline__ int __constant_coldfir
return retval;
}
+#else
+static __inline__ int __constant_coldfire_test_and_clear_bit(int nr, volatile void *vaddr)
+{
+ char retval;
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+
+ __asm__ __volatile__ ("bclr %2,(%4); sne %0"
+ : "=d" (retval), "=m" (*p)
+ : "id" (nr & 7), "m" (*p), "a" (p));
+
+ return retval;
+}
+#endif
static __inline__ int __generic_coldfire_test_and_clear_bit(int nr,
volatile void *vaddr)
@@ -556,6 +590,7 @@ static __inline__ int __generic_coldfire
__constant_coldfire_clear_bit(nr, vaddr) : \
__generic_coldfire_clear_bit(nr, vaddr))
+#if 0
static __inline__ void __constant_coldfire_clear_bit(int nr,
volatile void *vaddr)
{
@@ -563,6 +598,14 @@ static __inline__ void __constant_coldfi
__asm__ __volatile__ ("bclr %1,%0"
: "+QUd" (*p) : "id" (nr & 7));
}
+#else
+static __inline__ void __constant_coldfire_clear_bit(int nr, volatile void * vaddr)
+{
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+ __asm__ __volatile__ ("bclr %1,(%3)"
+ : "=m" (*p) : "id" (nr & 7), "m" (*p), "a" (p));
+}
+#endif
static __inline__ void __generic_coldfire_clear_bit(int nr,
volatile void *vaddr)
@@ -579,6 +622,7 @@ static __inline__ void __generic_coldfir
__constant_coldfire_test_and_change_bit(nr, vaddr) : \
__generic_coldfire_test_and_change_bit(nr, vaddr))
+#if 0
static __inline__ int __constant_coldfire_test_and_change_bit(int nr,
volatile void *vaddr)
{
@@ -591,6 +635,19 @@ static __inline__ int __constant_coldfir
return retval;
}
+#else
+static __inline__ int __constant_coldfire_test_and_change_bit(int nr, volatile void * vaddr)
+{
+ char retval;
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+
+ __asm__ __volatile__ ("bchg %2,(%4); sne %0"
+ : "=d" (retval), "=m" (*p)
+ : "id" (nr & 7), "m" (*p), "a" (p));
+
+ return retval;
+}
+#endif
static __inline__ int __generic_coldfire_test_and_change_bit(int nr,
volatile void *vaddr)
@@ -612,6 +669,7 @@ static __inline__ int __generic_coldfire
__constant_coldfire_change_bit(nr, vaddr) : \
__generic_coldfire_change_bit(nr, vaddr))
+#if 0
static __inline__ void __constant_coldfire_change_bit(int nr,
volatile void *vaddr)
{
@@ -619,6 +677,14 @@ static __inline__ void __constant_coldfi
__asm__ __volatile__ ("bchg %1,%0"
: "+QUd" (*p) : "id" (nr & 7));
}
+#else
+static __inline__ void __constant_coldfire_change_bit(int nr, volatile void * vaddr)
+{
+ volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
+ __asm__ __volatile__ ("bchg %1,(%3)"
+ : "=m" (*p) : "id" (nr & 7), "m" (*p), "a" (p));
+}
+#endif
static __inline__ void __generic_coldfire_change_bit(int nr,
volatile void *vaddr)

View File

@ -1,45 +0,0 @@
From 3d7f85e904cf9dab191eeab9933ecac1e90d06e4 Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Thu, 29 Nov 2007 16:30:47 -0700
Subject: [PATCH] USB pre-merge
LTIBName: m5445x-usb-premerge
Signed-off-by: Duck <duck@freescale.com>
---
drivers/usb/host/ehci-arc.c | 18 +++++++++++++++++-
1 files changed, 17 insertions(+), 1 deletions(-)
--- a/drivers/usb/host/ehci-arc.c
+++ b/drivers/usb/host/ehci-arc.c
@@ -373,14 +373,30 @@ static int ehci_fsl_drv_resume(struct pl
pr_debug("%s pdev=0x%p pdata=0x%p ehci=0x%p hcd=0x%p\n",
__FUNCTION__, pdev, pdata, ehci, hcd);
- pr_debug("%s ehci->regs=0x%p hcd->regs=0x%p",
+ pr_debug("%s ehci->regs=0x%p hcd->regs=0x%p\n",
__FUNCTION__, ehci->regs, hcd->regs);
memcpy(ehci->regs, (void *)&usb_ehci_regs, sizeof(struct ehci_regs));
+
+#if 0 // DDD test
ehci_writel(ehci, usb_ehci_portsc, &ehci->regs->port_status[0]);
+ printk("set portsc %08x %08x\n", usb_ehci_portsc,
+ ehci_readl(ehci, &ehci->regs->port_status[0]));
+ printk("set usbmode %08x\n",
+ ehci_readl(ehci, &ehci->regs + FSL_SOC_USB_USBMODE));
tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
+#else
+ tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
+ ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
+ printk("tmp %08x set usbmode %08x\n", tmp,
+ ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE));
+
+ ehci_writel(ehci, usb_ehci_portsc, &ehci->regs->port_status[0]);
+ printk("set portsc %08x %08x\n", usb_ehci_portsc,
+ ehci_readl(ehci, &ehci->regs->port_status[0]));
+#endif
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
hcd->state = HC_STATE_RUNNING;

View File

@ -1,54 +0,0 @@
From b100a50c3bf7884a97d5008fc79d9b45f3b6e999 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 30 Nov 2007 12:55:12 -0700
Subject: [PATCH] Fix bitfield definitions.
LTIBName: m5445x-ccm-bitdefs
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/mcf5445x_ccm.h | 34 ++++++++++++++++++----------------
1 files changed, 18 insertions(+), 16 deletions(-)
--- a/include/asm-m68k/mcf5445x_ccm.h
+++ b/include/asm-m68k/mcf5445x_ccm.h
@@ -118,22 +118,24 @@
#define MCF_CCM_MISCCR_BMT(x) (((x) & 0x0007) << 8) /* Bus monitor timing field */
#define MCF_CCM_MISCCR_BME (0x0800) /* Bus monitor external enable bit */
#define MCF_CCM_MISCCR_LIMP (0x1000) /* Limp mode enable */
-#define MCF_CCM_MISCCR_BMT_65536 (0)
-#define MCF_CCM_MISCCR_BMT_32768 (1)
-#define MCF_CCM_MISCCR_BMT_16384 (2)
-#define MCF_CCM_MISCCR_BMT_8192 (3)
-#define MCF_CCM_MISCCR_BMT_4096 (4)
-#define MCF_CCM_MISCCR_BMT_2048 (5)
-#define MCF_CCM_MISCCR_BMT_1024 (6)
-#define MCF_CCM_MISCCR_BMT_512 (7)
-#define MCF_CCM_MISCCR_SSIPUS_UP (1)
-#define MCF_CCM_MISCCR_SSIPUS_DOWN (0)
-#define MCF_CCM_MISCCR_TIMDMA_TIM (1)
-#define MCF_CCM_MISCCR_TIMDMA_SSI (0)
-#define MCF_CCM_MISCCR_SSISRC_CLKIN (0)
-#define MCF_CCM_MISCCR_SSISRC_PLL (1)
-#define MCF_CCM_MISCCR_USBOC_ACTHI (0)
-#define MCF_CCM_MISCCR_USBOV_ACTLO (1)
+#define MCF_CCM_MISCCR_BMT_65536 (0 << 8)
+#define MCF_CCM_MISCCR_BMT_32768 (1 << 8)
+#define MCF_CCM_MISCCR_BMT_16384 (2 << 8)
+#define MCF_CCM_MISCCR_BMT_8192 (3 << 8)
+#define MCF_CCM_MISCCR_BMT_4096 (4 << 8)
+#define MCF_CCM_MISCCR_BMT_2048 (5 << 8)
+#define MCF_CCM_MISCCR_BMT_1024 (6 << 8)
+#define MCF_CCM_MISCCR_BMT_512 (7 << 8)
+#define MCF_CCM_MISCCR_SSIPUE_UP (1 << 7)
+#define MCF_CCM_MISCCR_SSIPUE_DOWN (0 << 7)
+#define MCF_CCM_MISCCR_SSIPUS_UP (1 << 6)
+#define MCF_CCM_MISCCR_SSIPUS_DOWN (0 << 6)
+#define MCF_CCM_MISCCR_TIMDMA_TIM (1 << 5)
+#define MCF_CCM_MISCCR_TIMDMA_SSI (0 << 5)
+#define MCF_CCM_MISCCR_SSISRC_CLKIN (0 << 4)
+#define MCF_CCM_MISCCR_SSISRC_PLL (1 << 4)
+#define MCF_CCM_MISCCR_USBOC_ACTHI (0 << 1)
+#define MCF_CCM_MISCCR_USBOC_ACTLO (1 << 1)
#define MCF_CCM_MISCCR_USBSRC_CLKIN (0)
#define MCF_CCM_MISCCR_USBSRC_PLL (1)

View File

@ -1,40 +0,0 @@
From 96de11ad11db226423d364a75cc82c6118a18a1f Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 4 Dec 2007 00:04:21 -0700
Subject: [PATCH] Enable Cache Store Buffer.
LTIBName: m5445x-enable-cache-store
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 2 ++
include/asm-m68k/cfcache.h | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -21,6 +21,7 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/cfcache.h>
+#include <asm/cacheflush.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/cfmmu.h>
@@ -165,6 +166,7 @@ asmlinkage void __init cf_early_init(voi
+ sizeof(record->data[0]) + sizeof(record->data[1]);
/* Invalidate caches via CACR */
+ flush_bcache();
cacr_set(CACHE_DISABLE_MODE);
/* Turn on caches via CACR, enable EUSP */
--- a/include/asm-m68k/cfcache.h
+++ b/include/asm-m68k/cfcache.h
@@ -64,6 +64,7 @@
#define CACHE_INITIAL_MODE (CF_CACR_DEC+ \
CF_CACR_BEC+ \
CF_CACR_IEC+ \
+ CF_CACR_DESB+ \
CF_CACR_EUSP)
#else
/* cache disabled for testing */

View File

@ -1,22 +0,0 @@
From 2ff438b85bd3f34f31886883d9dacbd15bc16df8 Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Tue, 4 Dec 2007 11:30:14 -0700
Subject: [PATCH] USB: restore usb_autosuspend_delay
LTIBName: m5445x-usb-autosuspend-delay
Signed-off-by: Duck <duck@freescale.com>
---
drivers/usb/core/usb.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -52,7 +52,7 @@ static int nousb; /* Disable USB when bu
struct workqueue_struct *ksuspend_usb_wq;
#ifdef CONFIG_USB_SUSPEND
-static int usb_autosuspend_delay = -1; /* Default delay value,
+static int usb_autosuspend_delay = 2; /* Default delay value,
* in seconds */
module_param_named(autosuspend, usb_autosuspend_delay, int, 0644);
MODULE_PARM_DESC(autosuspend, "default autosuspend delay");

View File

@ -1,470 +0,0 @@
From b014a8a0b66b1f0f55b3384f586f43e67e6dcc5d Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Tue, 4 Dec 2007 16:03:17 -0700
Subject: [PATCH] USB: cleanup
LTIBName: m5445x-usb-cleanup-2
Signed-off-by: Duck <duck@freescale.com>
---
drivers/usb/gadget/mcf5445x_udc.c | 14 ---
drivers/usb/host/ehci-arc.c | 19 +---
drivers/usb/otg/fsl_otg.c | 225 ++-----------------------------------
drivers/usb/otg/otg_fsm.h | 2 +-
include/linux/usb/fsl_usb2.h | 5 +-
5 files changed, 15 insertions(+), 250 deletions(-)
--- a/drivers/usb/gadget/mcf5445x_udc.c
+++ b/drivers/usb/gadget/mcf5445x_udc.c
@@ -321,11 +321,6 @@ static void pullup_enable(struct fsl_udc
temp = fsl_readl(&dr_regs->usbcmd);
temp |= USB_CMD_RUN_STOP;
fsl_writel(temp, &dr_regs->usbcmd);
-
-#ifdef NEVER /* DDD FIXME: we want this? */
- if (!udc->transceiver)
- *((u16 *)(MCF_FBCS1_CSAR)) &= ~0x1; /* Enable pullup register */
-#endif
}
static void pullup_disable(struct fsl_udc *udc)
@@ -345,12 +340,6 @@ static void pullup_disable(struct fsl_ud
tmp = fsl_readl(&dr_regs->usbcmd);
tmp &= ~USB_CMD_RUN_STOP;
fsl_writel(tmp, &dr_regs->usbcmd);
-
-#ifdef NEVER /* DDD FIXME: we want this? */
- if (!udc->transceiver)
- *((u16 *)(MCF_FBCS1_CSAR)) |= 0x1; /* Disable pullup register */
-#endif
-
}
static void dr_controller_run(struct fsl_udc *udc)
@@ -2598,9 +2587,6 @@ static int __init fsl_udc_probe(struct p
ret = -ENOMEM;
goto err4;
}
-#if 0 // DDD why this? hoarks OTG host
- pullup_disable(udc);
-#endif
create_proc_file();
return 0;
--- a/drivers/usb/host/ehci-arc.c
+++ b/drivers/usb/host/ehci-arc.c
@@ -378,25 +378,14 @@ static int ehci_fsl_drv_resume(struct pl
memcpy(ehci->regs, (void *)&usb_ehci_regs, sizeof(struct ehci_regs));
-#if 0 // DDD test
- ehci_writel(ehci, usb_ehci_portsc, &ehci->regs->port_status[0]);
- printk("set portsc %08x %08x\n", usb_ehci_portsc,
- ehci_readl(ehci, &ehci->regs->port_status[0]));
- printk("set usbmode %08x\n",
- ehci_readl(ehci, &ehci->regs + FSL_SOC_USB_USBMODE));
-
tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
-#else
- tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
- ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
- printk("tmp %08x set usbmode %08x\n", tmp,
- ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE));
+ pr_debug("tmp %08x set usbmode %08x\n", tmp,
+ ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE));
ehci_writel(ehci, usb_ehci_portsc, &ehci->regs->port_status[0]);
- printk("set portsc %08x %08x\n", usb_ehci_portsc,
- ehci_readl(ehci, &ehci->regs->port_status[0]));
-#endif
+ pr_debug("set portsc %08x %08x\n", usb_ehci_portsc,
+ ehci_readl(ehci, &ehci->regs->port_status[0]));
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
hcd->state = HC_STATE_RUNNING;
--- a/drivers/usb/otg/fsl_otg.c
+++ b/drivers/usb/otg/fsl_otg.c
@@ -98,6 +98,7 @@ static struct fsl_otg_config fsl_otg_ini
.otg_port = 1,
};
+#if 0
static void dump_state(const char *string, struct otg_fsm *fsm)
{
printk(KERN_DEBUG "%s\n\tOTG state: %s\n", string,
@@ -135,6 +136,7 @@ static void dump_state(const char *strin
printk(KERN_DEBUG "\tb_sess_vld: %d\n", fsm->b_sess_vld);
printk(KERN_DEBUG "\tid: %d\n", fsm->id);
}
+#endif
/* Routines to access transceiver ULPI registers */
@@ -537,6 +539,7 @@ int fsl_otg_start_gadget(struct otg_fsm
return 0;
}
+#if 0
static void fsl_otg_enable(struct otg_transceiver *otg_p)
{
struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
@@ -549,7 +552,7 @@ static void fsl_otg_enable(struct otg_tr
otg_sc |= OTGSC_INTERRUPT_ENABLE_BITS_MASK;
otg_sc &= ~OTGSC_IE_1ms_TIMER;
otg_sc &= ~OTGSC_CTRL_VBUS_DISCHARGE;
- otg_sc |= OTGSC_IE_USB_ID; /* DDD added this */
+ otg_sc |= OTGSC_IE_USB_ID;
fsl_writel(otg_sc, &usb_dr_regs->otgsc);
fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
@@ -570,6 +573,7 @@ static void fsl_otg_enable(struct otg_tr
fsm->a_sess_vld = (otg_sc & OTGSC_STS_A_SESSION_VALID) ? 1 : 0;
fsm->b_sess_end = (otg_sc & OTGSC_STS_B_SESSION_END) ? 1 : 0;
}
+#endif
/*
* Called by initialization code of host driver. Register host controller
@@ -577,34 +581,6 @@ static void fsl_otg_enable(struct otg_tr
*/
static int fsl_otg_set_host(struct otg_transceiver *otg_p, struct usb_bus *host)
{
-#if 0 // DDD beta-final
- struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
- struct device *dev = host->controller;
-
- if (!otg_p || otg_dev != fsl_otg_dev)
- return -ENODEV;
-
- otg_p->host = host;
- otg_p->host->is_b_host = otg_dev->fsm.id;
-
- otg_dev->fsm.a_bus_drop = 0;
- otg_dev->fsm.a_bus_req = 1;
-
- otg_p->host->otg_port = fsl_otg_initdata.otg_port;
-
- if (dev && dev->driver) {
- VDBG("suspending host\n");
- dev->driver->suspend(dev, PMSG_SUSPEND);
- otg_dev->host_working = 0;
- VDBG("back\n");
- }
-
-
- /* dump_state("set_host running statemachine", &otg_dev->fsm); DDD */
- otg_statemachine(&otg_dev->fsm);
-
- return 0;
-#else
struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg);
if (!otg_p || otg_dev != fsl_otg_dev)
@@ -644,7 +620,6 @@ static int fsl_otg_set_host(struct otg_t
otg_statemachine(&otg_dev->fsm);
return 0;
-#endif
}
/* Called by initialization code of udc. Register udc to OTG.*/
@@ -673,12 +648,6 @@ static int fsl_otg_set_peripheral(struct
otg_dev->fsm.b_bus_req = 1;
-#if 0 /* DDD uClinux */
- if (otg_p->host) {
- fsl_otg_enable(otg_p);
- otg_statemachine(&otg_dev->fsm);
- }
-#endif
/* start the gadget right away if the ID pin says Mini-B */
DBG("ID pin=%d\n", otg_dev->fsm.id);
if (otg_dev->fsm.id == 1) {
@@ -815,162 +784,6 @@ irqreturn_t fsl_otg_isr(int irq, void *d
}
-#if 0 // DDD feta-final
-irqreturn_t foo_fsl_otg_isr(int irq, void *dev_id)
-{
- struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
- struct otg_transceiver *otg = &((struct fsl_otg *)dev_id)->otg;
- u32 otg_int_src, usb_int_src, otg_sc;
- int trigger = 0;
- int tmp;
-
- usb_int_src = fsl_readl(&usb_dr_regs->usbsts);
- otg_sc = fsl_readl(&usb_dr_regs->otgsc);
- otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
-
- /* Only clear otg interrupts */
- fsl_writel(otg_sc, &usb_dr_regs->otgsc);
-
- /*FIXME: ID change not generate when init to 0 */
- /* process OTG interrupts */
- if (otg_int_src) {
- VDBG("\nOTG irq 0x%08x\n", otg_int_src);
- if (otg_int_src & OTGSC_INTSTS_1MS_TIMER)
- trigger = fsl_otg_tick_timer();
-
- if (otg_int_src & OTGSC_INTSTS_USB_ID) {
- fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
- otg->default_a = (fsm->id == 0);
- if (otg->host)
- otg->host->is_b_host = fsm->id;
- if (otg->gadget)
- otg->gadget->is_a_peripheral = !fsm->id;
- VDBG("IRQ=ID now=%d\n", fsm->id);
-
- if (fsm->id) { /* switch to gadget */
- schedule_delayed_work(&((struct fsl_otg *)
- dev_id)->otg_event, 25);
- } else { /* switch to host */
- cancel_delayed_work(&
- ((struct fsl_otg *)dev_id)->
- otg_event);
- fsl_otg_start_gadget(fsm, 0);
- fsl_otg_drv_vbus(1);
- fsl_otg_start_host(fsm, 1);
- }
-
- return IRQ_HANDLED;
- }
- if (otg_int_src & OTGSC_INTSTS_DATA_PULSE) {
- fsm->a_srp_det = 1;
- trigger = 1;
- VDBG("!!!!Data pulse int\n");
- }
- if (otg_int_src & OTGSC_INTSTS_A_SESSION_VALID) {
- fsm->a_sess_vld =
- (otg_sc & OTGSC_STS_A_SESSION_VALID) ? 1 : 0;
- /* detect VBUS pulsing */
- if ((fsm->transceiver->state == OTG_STATE_A_IDLE)
- && fsm->a_sess_vld)
- fsm->a_srp_det = 1;
- trigger = 1;
- VDBG("!!!a_sess_vld int state=%d\n", fsm->a_sess_vld);
- }
- if (otg_int_src & OTGSC_INTSTS_A_VBUS_VALID) {
- fsm->a_vbus_vld = !!(otg_sc & OTGSC_STS_A_VBUS_VALID);
- trigger = 1;
- VDBG("!!!a_vbus_vld int state=%d\n", fsm->a_vbus_vld);
-
-#if 1
- if ((fsm->a_vbus_vld == 0) && (fsm->id == 0)) {
- if (fsm->transceiver->state != OTG_STATE_A_WAIT_VFALL)
- /* Warning insted of transfer to Error state. */
- printk(KERN_WARNING "ulpi: The USB Device is "
- "sinking too much current!!\n");
- fsm->a_vbus_vld = 1;
- }
-#endif
-
-
- }
- if (otg_int_src & OTGSC_INTSTS_B_SESSION_VALID) {
- fsm->b_sess_vld =
- (otg_sc & OTGSC_STS_B_SESSION_VALID) ? 1 : 0;
- trigger = 1;
- /* SRP done */
- if ((fsl_otg_dev->otg.state == OTG_STATE_B_SRP_INIT) &&
- fsm->b_sess_vld && srp_wait_done)
- fsm->b_srp_done = 1;
- VDBG("!!!!b_sess_vld int state=%d\n", fsm->b_sess_vld);
- }
- if (otg_int_src & OTGSC_INTSTS_B_SESSION_END) {
- fsm->b_sess_end =
- (otg_sc & OTGSC_STS_B_SESSION_END) ? 1 : 0;
- trigger = 1;
- VDBG("!!!!b_sess_end int state=%d\n", fsm->b_sess_end);
- }
- }
-
- /* process USB interrupts */
- if ((usb_int_src & USB_STS_PORT_CHANGE)
- && (fsm->protocol == PROTO_HOST)) {
- VDBG("\nUSB irq A 0x%08x\n", usb_int_src);
- /* Device resume do not generate statemachine change */
- if (fsl_readl(&usb_dr_regs->portsc1) &
- PORTSCX_PORT_FORCE_RESUME) {
- if (otg->default_a) {
- fsm->b_bus_resume = 1;
- trigger = 1;
- } else {
- fsm->a_bus_resume = 1;
- trigger = 1;
- }
- }
-
- tmp = (fsl_readl(&usb_dr_regs->portsc1) &
- PORTSCX_CURRENT_CONNECT_STATUS) ? 1 : 0;
- if (otg->default_a && (fsm->b_conn != tmp)) {
- fsm->b_conn = tmp;
- trigger = 1;
- } else if (!otg->default_a && (fsm->a_conn != tmp)) {
- fsm->a_conn = tmp;
- trigger = 1;
- }
- }
- /* Workaround: sometimes CSC bit will lost. We change to
- * polling CCS bit for connect change */
- if (fsm->protocol == PROTO_GADGET) {
- if (usb_int_src & USB_STS_SUSPEND) {
- VDBG("\nUSB irq B 0x%08x\n", usb_int_src);
- VDBG("peripheral detected suspend\n");
- if (otg->default_a)
- /* A-device detects B suspend */
- fsm->b_bus_suspend = 1;
- else
- /* B-device detects A suspend */
- fsm->a_bus_suspend = 1;
- trigger = 1;
- } else if (usb_int_src & USB_STS_PORT_CHANGE) {
- VDBG("\nUSB irq C 0x%08x\n", usb_int_src);
- VDBG("peripheral resumed\n");
- if (otg->default_a)
- fsm->b_bus_suspend = 0;
- else
- fsm->a_bus_suspend = 0;
- trigger = 1;
- }
- }
-
- /* Invoke statemachine until state is stable */
- while (trigger) {
- trigger = otg_statemachine(fsm);
- }
-
- return IRQ_HANDLED;
-}
-#endif
-
-
static struct otg_fsm_ops fsl_otg_ops = {
.chrg_vbus = fsl_otg_chrg_vbus,
.drv_vbus = fsl_otg_drv_vbus,
@@ -1003,7 +816,6 @@ int fsl_otg_cfg(struct platform_device *
if (!fsl_otg_tc)
return -ENODEV;
-#if 1 // DDD
if (pdata->regs) {
fsl_otg_tc->dr_mem_map = pdata->regs;
} else {
@@ -1013,8 +825,10 @@ int fsl_otg_cfg(struct platform_device *
return -ENODEV;
}
+ /*
printk("DDD %s(): rsrc_start=0x%x rsrc_len=0x%x\n",
__FUNCTION__, res->start, res->end - res->start + 1);
+ */
if (!request_mem_region(res->start, res->end - res->start + 1,
"OTG")) {
@@ -1026,7 +840,6 @@ int fsl_otg_cfg(struct platform_device *
}
DBG("set dr_mem_map to 0x%p\n", fsl_otg_tc->dr_mem_map);
-#endif
INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
INIT_LIST_HEAD(&active_timers);
@@ -1035,12 +848,11 @@ int fsl_otg_cfg(struct platform_device *
/* Set OTG state machine operations */
fsl_otg_tc->fsm.ops = &fsl_otg_ops;
-#if 1 /* DDD */
/* record initial state of ID pin */
fsl_otg_tc->fsm.id = (fsl_otg_tc->dr_mem_map->otgsc & OTGSC_STS_USB_ID)
? 1 : 0;
DBG("initial ID pin=%d\n", fsl_otg_tc->fsm.id);
-#endif
+
/* initialize the otg structure */
fsl_otg_tc->otg.label = DRIVER_DESC;
fsl_otg_tc->otg.set_host = fsl_otg_set_host;
@@ -1115,13 +927,8 @@ int usb_otg_start(struct platform_device
__FUNCTION__, timeout);
/* configure the VBUSHS as IDLE(both host and device) */
-#if 0
- /* DDD really have to check into setting the following */
- fsl_writel(USB_MODE_STREAM_DISABLE, &usb_dr_regs->usbmode);
-#else
temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USBMODE_ES : 0);
fsl_writel(temp, &usb_dr_regs->usbmode);
-#endif
/* configure PHY interface */
temp = fsl_readl(&usb_dr_regs->portsc1);
@@ -1135,24 +942,11 @@ int usb_otg_start(struct platform_device
/* disable all interrupt and clear all OTGSC status */
temp = fsl_readl(&usb_dr_regs->otgsc);
temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
-#if 0 // DDD
- /* DDD only want ID int
- * temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
- */
- temp |= OTGSC_IE_USB_ID; /* DDD added this */
- temp &= ~OTGSC_IE_1ms_TIMER; /* DDD added this */
-#else
temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
-#endif
fsl_writel(temp, &usb_dr_regs->otgsc);
fsl_otg_drv_vbus(0);
-#if 0 // DDD beta-final
- temp = fsl_readl(&usb_dr_regs->otgsc);
- temp |= OTGSC_IE_A_SESSION_VALID;
- fsl_writel(temp, &usb_dr_regs->otgsc);
-#else
/*
* The identification (id) input is FALSE when a Mini-A plug is inserted
* in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
@@ -1173,7 +967,6 @@ int usb_otg_start(struct platform_device
temp |= OTGSC_IE_USB_ID;
temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_IE_1ms_TIMER);
fsl_writel(temp, &usb_dr_regs->otgsc);
-#endif
return 0;
}
@@ -1427,10 +1220,8 @@ static int __init fsl_otg_probe(struct p
return -ENOMEM;
pdata = pdev->dev.platform_data;
-#if 1 // DDD do this elsewhere
/* Initialize the clock, multiplexing pin and PHY interface */
board_init(pdev);
-#endif
/* configure the OTG */
status = fsl_otg_cfg(pdev);
--- a/drivers/usb/otg/otg_fsm.h
+++ b/drivers/usb/otg/otg_fsm.h
@@ -18,7 +18,7 @@
#ifndef OTG_FSM_H
#define OTG_FSM_H
-#if 1
+#if 0
#define DEBUG 1
#define VERBOSE 1
#endif
--- a/include/linux/usb/fsl_usb2.h
+++ b/include/linux/usb/fsl_usb2.h
@@ -104,9 +104,8 @@ struct fsl_usb_host_regs {
#if 0
u32 endptctrl[USB_MAX_ENDPOINTS]; /* Endpoint Control Registers */
#else
- // DDD: do these exits in the host register set??
- // DDD see DCCPARAMS:DEN for the real number of device endpoints
- // DDD 16 is the max
+ /* DDD see DCCPARAMS:DEN for the real number of device endpoints */
+ /* DDD 16 is the max */
u32 endptctrl[16]; /* Endpoint Control Registers */
#endif
};

View File

@ -1,130 +0,0 @@
From b6b6d18a54e22784cb48e1953201484830d030e4 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 6 Dec 2007 14:17:46 -0700
Subject: [PATCH] Change USB to SDRAM priority.
Increase the USB priority to the maximum, above ColdfireCore,
in the SDRAM crossbar switch. This fixes the issues with the
USB core not being able to transfer to memory fast enough to
keep up with HS.
LTIBName: m5445x-usb-sdram-priority
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 12 ++++++
include/asm-m68k/mcf5445x_xbs.h | 81 +++++++++++++++++++++++++++++++++++++++
2 files changed, 93 insertions(+), 0 deletions(-)
create mode 100644 include/asm-m68k/mcf5445x_xbs.h
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -36,6 +36,7 @@
#include <asm/mcf5445x_sdramc.h>
#include <asm/mcf5445x_fbcs.h>
#include <asm/mcf5445x_dtim.h>
+#include <asm/mcf5445x_xbs.h>
/* JKM -- testing */
#include <linux/pfn.h>
@@ -131,6 +132,17 @@ asmlinkage void __init cf_early_init(voi
MCF_SDRAMC_SDCS(1) = (256*1024*1024) | 0x1B;
#endif
+ /* Setup SDRAM crossbar(XBS) priorities */
+printk(KERN_INFO "Bumping USB Priority\n");
+ MCF_XBS_PRS2 = (MCF_XBS_PRS_M0(MCF_XBS_PRI_2) |
+ MCF_XBS_PRS_M1(MCF_XBS_PRI_3) |
+ MCF_XBS_PRS_M2(MCF_XBS_PRI_4) |
+ MCF_XBS_PRS_M3(MCF_XBS_PRI_5) |
+ MCF_XBS_PRS_M5(MCF_XBS_PRI_6) |
+ MCF_XBS_PRS_M6(MCF_XBS_PRI_1) |
+ MCF_XBS_PRS_M7(MCF_XBS_PRI_7));
+
+
m68k_machtype = MACH_CFMMU;
m68k_fputype = FPU_CFV4E;
m68k_mmutype = MMU_CFV4E;
--- /dev/null
+++ b/include/asm-m68k/mcf5445x_xbs.h
@@ -0,0 +1,81 @@
+/*
+ * Kurt Mahan kmahan@freescale.com
+ *
+ * Copyright Freescale Semiconductor, Inc. 2007
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __MCF5445X_XBS_H__
+#define __MCF5445X_XBS_H__
+
+/*
+ * Crossbar Switch (XBS)
+ */
+
+/* Register read/write macros */
+#define MCF_XBS_PRS1 MCF_REG32(0xFC004100) /* Flexbus Priority */
+#define MCF_XBS_CRS1 MCF_REG32(0xFC004110) /* Flexbus Control */
+#define MCF_XBS_PRS2 MCF_REG32(0xFC004200) /* SDRam Priority */
+#define MCF_XBS_CRS2 MCF_REG32(0xFC004210) /* SDRam Control */
+#define MCF_XBS_PRS3 MCF_REG32(0xFC004300) /* ATA Priority */
+#define MCF_XBS_CRS3 MCF_REG32(0xFC004310) /* ATA Control */
+#define MCF_XBS_PRS4 MCF_REG32(0xFC004400) /* SRAM Priority */
+#define MCF_XBS_CRS4 MCF_REG32(0xFC004410) /* SRAM Control */
+#define MCF_XBS_PRS5 MCF_REG32(0xFC004500) /* PCI Priority */
+#define MCF_XBS_CRS5 MCF_REG32(0xFC004510) /* PCI Control */
+#define MCF_XBS_PRS6 MCF_REG32(0xFC004600) /* Slave6 Priority */
+#define MCF_XBS_CRS6 MCF_REG32(0xFC004610) /* Slave6 Control */
+#define MCF_XBS_PRS7 MCF_REG32(0xFC004700) /* Other Priority */
+#define MCF_XBS_CRS7 MCF_REG32(0xFC004710) /* Other Control */
+
+/* Priorities */
+#define MCF_XBS_PRI_1 0 /* Level 1 (highest) */
+#define MCF_XBS_PRI_2 1 /* Level 2 */
+#define MCF_XBS_PRI_3 2 /* Level 3 */
+#define MCF_XBS_PRI_4 3 /* Level 4 */
+#define MCF_XBS_PRI_5 4 /* Level 5 */
+#define MCF_XBS_PRI_6 5 /* Level 6 */
+#define MCF_XBS_PRI_7 6 /* Level 7 (lowest) */
+#define MCF_XBS_PRI_MASK 7 /* Mask (Not a valid level) */
+
+/* Priority Register (PRSn) Defs */
+#define MCF_XBS_PRS_MACRO(m,p) ((p)<<((m)<<2))
+#define MCF_XBS_PRS_M0(p) MCF_XBS_PRS_MACRO(0, p) /* Coldfire Core */
+#define MCF_XBS_PRS_M1(p) MCF_XBS_PRS_MACRO(1, p) /* eDMA */
+#define MCF_XBS_PRS_M2(p) MCF_XBS_PRS_MACRO(2, p) /* FEC0 */
+#define MCF_XBS_PRS_M3(p) MCF_XBS_PRS_MACRO(3, p) /* FEC1 */
+#define MCF_XBS_PRS_M4(p) MCF_XBS_PRS_MACRO(4, p) /* Master 4 */
+#define MCF_XBS_PRS_M5(p) MCF_XBS_PRS_MACRO(5, p) /* PCI */
+#define MCF_XBS_PRS_M6(p) MCF_XBS_PRS_MACRO(6, p) /* USB OTG */
+#define MCF_XBS_PRS_M7(p) MCF_XBS_PRS_MACRO(7, p) /* Serial Boot */
+
+/* Control Register (CRSn) Defs */
+#define MCF_XBS_CRS_RO 0x80000000 /* Read Only */
+#define MCF_XBS_CRS_ARB 0x00000100 /* Arbitration Mode */
+#define MCF_XBS_CRS_PCTL 0x00000030 /* Parking Control */
+#define MCF_XBS_CRS_PARK 0x00000007 /* Park Location */
+
+/* MCF_XBS_CRS_ARB Defs */
+#define MCF_ABS_CRS_ARB_FIXED 0x00000000 /* Fixed priority */
+#define MCF_ABS_CRS_ARB_ROUND 0x00000100 /* Round Robin priority */
+
+/* MCF_XBS_CRS_PCTL Defs */
+#define MCF_ABS_CRS_PCTL_PARK 0x00000000 /* Park on the defined PARK */
+#define MCF_ABS_CRS_PCTL_LAST 0x00000010 /* Park on the last master */
+#define MCF_ABS_CRS_PCTL_NONE 0x00000020 /* Don't park */
+
+/* MCF_XBS_CRS_PARK Defs */
+#define MCF_ABS_CRS_PARK_M0 0x00000000 /* Park on Coldfire Core */
+#define MCF_ABS_CRS_PARK_M1 0x00000001 /* Park on eDMA */
+#define MCF_ABS_CRS_PARK_M2 0x00000002 /* Park on FEC0 */
+#define MCF_ABS_CRS_PARK_M3 0x00000003 /* Park on FEC1 */
+#define MCF_ABS_CRS_PARK_M4 0x00000004 /* Park on Reserved */
+#define MCF_ABS_CRS_PARK_M5 0x00000005 /* Park on PCI */
+#define MCF_ABS_CRS_PARK_M6 0x00000006 /* Park on USB OTG */
+#define MCF_ABS_CRS_PARK_M7 0x00000007 /* Park on Serial Boot */
+
+#endif /* __MCF5445X_XBS_H__ */

View File

@ -1,55 +0,0 @@
From 679a5be6f06b909adccc9c588feb26bf6d6df402 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 6 Dec 2007 16:40:39 -0700
Subject: [PATCH] Add zero length checking to cache routines.
LTIBName: mcfv4e-cache-ck-0-len
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/cf_cacheflush.h | 14 +++++++++++---
1 files changed, 11 insertions(+), 3 deletions(-)
--- a/include/asm-m68k/cf_cacheflush.h
+++ b/include/asm-m68k/cf_cacheflush.h
@@ -127,7 +127,9 @@ static inline void flush_bcache(void)
static inline void cf_cache_clear(unsigned long paddr, int len)
{
/* number of lines */
- len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
/* align on set boundary */
paddr &= 0xfffffff0;
@@ -161,7 +163,9 @@ static inline void cf_cache_clear(unsign
static inline void cf_cache_push(unsigned long paddr, int len)
{
/* number of lines */
- len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
/* align on set boundary */
paddr &= 0xfffffff0;
@@ -195,7 +199,9 @@ static inline void cf_cache_push(unsigne
static inline void cf_cache_flush(unsigned long paddr, int len)
{
/* number of lines */
- len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
/* align on set boundary */
paddr &= 0xfffffff0;
@@ -234,6 +240,8 @@ static inline void cf_cache_flush_range(
vstart &= 0xfffffff0;
vend = PAGE_ALIGN((vend + (CACHE_LINE_SIZE-1))) & 0xfffffff0;
len = vend - vstart;
+ if (len == 0)
+ return;
vstart = __pa(vstart);
vend = vstart + len;

View File

@ -1,22 +0,0 @@
From d6cd1bb1f60f790f8a5d410cfe40bfb344dde09b Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Thu, 6 Dec 2007 17:22:23 -0700
Subject: [PATCH] USB: gadget: turn off DEBUG
LTIBName: m5445x-usb-disable-debug
Signed-off-by: Duck <duck@freescale.com>
---
drivers/usb/gadget/mcf5445x_udc.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/usb/gadget/mcf5445x_udc.c
+++ b/drivers/usb/gadget/mcf5445x_udc.c
@@ -34,7 +34,7 @@
*
*/
-#define DEBUG
+#undef DEBUG
#undef VERBOSE
#include <linux/module.h>

View File

@ -1,21 +0,0 @@
From 5fb2a68befbec97dba2264b2834487c72f47095d Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Wed, 5 Dec 2007 14:43:19 -0700
Subject: [PATCH] USB: add is_dualspeed.
LTIBName: m5445x-usb-add-dualspeed
Signed-off-by: Duck <duck@freescale.com>
---
drivers/usb/gadget/mcf5445x_udc.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
--- a/drivers/usb/gadget/mcf5445x_udc.c
+++ b/drivers/usb/gadget/mcf5445x_udc.c
@@ -2538,6 +2538,7 @@ static int __init fsl_udc_probe(struct p
* set the fsl_udc->gadget.xxx
*/
udc->gadget.ops = &fsl_gadget_ops;
+ udc->gadget.is_dualspeed = 1;
/* gadget.ep0 is a pointer */
udc->gadget.ep0 = &udc->eps[0].ep;

View File

@ -1,273 +0,0 @@
From 023b850e67316fbf595bf0cda13f02fabca1f29d Mon Sep 17 00:00:00 2001
From: Bruce Schmid <duck@freescale.com>
Date: Fri, 7 Dec 2007 10:30:46 -0700
Subject: [PATCH] USB: add default USB settings
LTIBName: m5445x-usb-defconfig
Signed-off-by: Duck <duck@freescale.com>
---
arch/m68k/configs/m54455evb_defconfig | 175 +++++++++++++++++++++++++++++++--
1 files changed, 165 insertions(+), 10 deletions(-)
--- a/arch/m68k/configs/m54455evb_defconfig
+++ b/arch/m68k/configs/m54455evb_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23
-# Tue Nov 27 23:42:38 2007
+# Thu Dec 6 12:14:18 2007
#
CONFIG_M68K=y
CONFIG_MMU=y
@@ -347,6 +347,7 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=64000
@@ -361,7 +362,7 @@ CONFIG_MISC_DEVICES=y
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=m
+CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
@@ -370,7 +371,7 @@ CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
-CONFIG_BLK_DEV_SD=m
+CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
@@ -380,7 +381,7 @@ CONFIG_BLK_DEV_SD=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
-# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
@@ -420,6 +421,26 @@ CONFIG_NETDEV_10000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET_MII=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
@@ -446,13 +467,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
-# CONFIG_INPUT_KEYBOARD is not set
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
@@ -534,6 +561,7 @@ CONFIG_SPI_COLDFIRE_SSI_AUDIO=y
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
#
# Graphics support
@@ -560,19 +588,144 @@ CONFIG_DUMMY_CONSOLE=y
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
CONFIG_USB_SUPPORT=y
-# CONFIG_USB_ARCH_HAS_HCD is not set
+CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_SPLIT_ISO=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+CONFIG_USB_M5445X_ULPI=y
+# CONFIG_USB_M5445X_FSLS is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
# USB Gadget Support
#
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+CONFIG_USB_GADGET_MCF5445X=y
+CONFIG_USB_MCF5445X=m
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_RTC_CLASS is not set
@@ -603,7 +756,9 @@ CONFIG_USB_SUPPORT=y
#
# File systems
#
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set

View File

@ -1,553 +0,0 @@
From 7b5b08d99d5362e9c36fd7d42d6c06c2a848266c Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Sun, 9 Dec 2007 02:21:19 -0700
Subject: [PATCH] Update EDMA.
LTIBName: m5445x-edma-update
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/coldfire_edma.c | 261 +++++++++++++++++++++++---------------
include/asm-m68k/coldfire_edma.h | 9 +-
include/asm-m68k/mcf5445x_edma.h | 28 +++-
3 files changed, 188 insertions(+), 110 deletions(-)
--- a/drivers/spi/coldfire_edma.c
+++ b/drivers/spi/coldfire_edma.c
@@ -20,76 +20,91 @@
#include <linux/cdev.h>
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
+#ifdef CONFIG_M54455
#include <asm/mcf5445x_edma.h>
#include <asm/mcf5445x_intc.h>
+#endif /* CONFIG_M54455 */
#include <asm/coldfire_edma.h>
-
-/* callback handler data for each TCD */
+/*
+ * Callback handler data for each TCD
+ */
struct edma_isr_record {
- edma_irq_handler irq_handler; /* interrupt handler */
- edma_error_handler error_handler; /* error interrupt handler */
- void* dev; /* device used for the channel */
- int allocated; /* busy flag */
- spinlock_t *lock; /* spin lock (if needs to be locked in interrupt) */
- const char* device_id; /* device id string, used in proc file system */
+ edma_irq_handler irq_handler; /* interrupt handler */
+ edma_error_handler error_handler; /* error interrupt handler */
+ void *arg; /* argument to pass back */
+ int allocated; /* busy flag */
+ spinlock_t *lock; /* spin lock (optional) */
+ const char *device_id; /* dev id string, used in procfs */
};
-/* device structure */
+/*
+ * Device structure
+ */
struct coldfire_edma_dev {
- struct cdev cdev; /* character device */
- struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS]; /* channel handlers */
+ struct cdev cdev; /* character device */
+ struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS];
};
/* allocated major device number */
static int coldfire_dma_major;
+
/* device driver structure */
-static struct coldfire_edma_dev* devp = NULL;
+static struct coldfire_edma_dev *devp = NULL;
/* device driver file operations */
struct file_operations coldfire_edma_fops = {
.owner = THIS_MODULE,
};
-/* eDMA channel interrupt handler */
+/**
+ * dmaisr - eDMA channel interrupt handler
+ * @irq: interrupt number
+ * @dev_id: argument
+ */
static int dmaisr(int irq, void *dev_id)
{
int channel = irq - EDMA_INT_CONTROLLER_BASE - EDMA_INT_CHANNEL_BASE;
int result = IRQ_HANDLED;
- if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
- spin_lock(devp->dma_interrupt_handlers[channel].lock);
- }
+ if ((devp != NULL) &&
+ (devp->dma_interrupt_handlers[channel].irq_handler)) {
+ /* call user irq handler */
+ if (devp->dma_interrupt_handlers[channel].lock)
+ spin_lock(devp->dma_interrupt_handlers[channel].lock);
+
+ result = devp->dma_interrupt_handlers[channel].irq_handler(
+ channel, devp->dma_interrupt_handlers[channel].arg);
- if (devp!=NULL && devp->dma_interrupt_handlers[channel].irq_handler) {
- result = devp->dma_interrupt_handlers[channel].irq_handler(channel,
- devp->dma_interrupt_handlers[channel].dev);
+ if (devp->dma_interrupt_handlers[channel].lock)
+ spin_unlock(devp->dma_interrupt_handlers[channel].lock);
} else {
+ /* no irq handler so just ack it */
confirm_edma_interrupt_handled(channel);
- printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n", channel);
- }
-
- if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
- spin_unlock(devp->dma_interrupt_handlers[channel].lock);
+ printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n",
+ channel);
}
return result;
}
-/* eDMA error interrupt handler */
+/**
+ * dma_error_isr - eDMA error interrupt handler
+ * @irq: interrupt number
+ * @dev_id: argument
+ */
static int dma_error_isr(int irq, void* dev_id)
{
u16 err;
int i;
err = MCF_EDMA_ERR;
- for (i=0;i<EDMA_CHANNELS;i++) {
+ for (i=0; i<EDMA_CHANNELS; i++) {
if (err & (1<<i)) {
- if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler) {
- devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].dev);
- } else {
+ if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler)
+ devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].arg);
+ else
printk(KERN_WARNING EDMA_DRIVER_NAME ": DMA error on channel %d\n", i);
- }
}
}
@@ -97,11 +112,26 @@ static int dma_error_isr(int irq, void*
return IRQ_HANDLED;
}
-/* sets channel parameters */
+/**
+ * set_edma_params - Set transfer control descriptor (TCD)
+ * @channel: channel number
+ * @source: source address
+ * @dest: destination address
+ * @attr: attributes
+ * @soff: source offset
+ * @nbytes: number of bytes to be transfered in minor loop
+ * @slast: last source address adjustment
+ * @citer: major loop count
+ * @biter: beginning minor loop count
+ * @doff: destination offset
+ * @dlast_sga: last destination address adjustment
+ * @major_int: generate interrupt after each major loop
+ * @disable_req: disable DMA request after major loop
+ */
void set_edma_params(int channel, u32 source, u32 dest,
- u32 attr, u32 soff, u32 nbytes, u32 slast,
- u32 citer, u32 biter, u32 doff, u32 dlast_sga,
- int major_int, int disable_req)
+ u32 attr, u32 soff, u32 nbytes, u32 slast,
+ u32 citer, u32 biter, u32 doff, u32 dlast_sga,
+ int major_int, int disable_req)
{
if (channel<0 || channel>EDMA_CHANNELS)
@@ -117,45 +147,56 @@ void set_edma_params(int channel, u32 so
MCF_EDMA_TCD_BITER(channel)=MCF_EDMA_TCD_BITER_BITER(biter);
MCF_EDMA_TCD_DOFF(channel) = MCF_EDMA_TCD_DOFF_DOFF(doff);
MCF_EDMA_TCD_DLAST_SGA(channel) = MCF_EDMA_TCD_DLAST_SGA_DLAST_SGA(dlast_sga);
+
/* interrupt at the end of major loop */
- if (major_int) {
+ if (major_int)
MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_INT_MAJOR;
- } else {
+ else
MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_INT_MAJOR;
- }
+
/* disable request at the end of major loop of transfer or not*/
- if (disable_req) {
+ if (disable_req)
MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_D_REQ;
- } else {
+ else
MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_D_REQ;
- }
-
}
EXPORT_SYMBOL(set_edma_params);
-/* init eDMA controller */
+/**
+ * init_edma - Initialize the eDMA controller
+ */
void init_edma(void)
{
MCF_EDMA_CR = 0;
}
EXPORT_SYMBOL(init_edma);
-/* request eDMA channel */
+/**
+ * request_edma_channel - Request an eDMA channel
+ * @channel: channel number
+ * @handler: dma handler
+ * @error_handler: dma error handler
+ * @arg: argument to pass back
+ * @lock: optional spinlock to hold over interrupt
+ * @device_id: device id
+ *
+ * Returns 0 if success or a negative value if failure
+ */
int request_edma_channel(int channel,
- edma_irq_handler handler,
- edma_error_handler error_handler,
- void* dev,
- spinlock_t *lock,
- const char* device_id )
+ edma_irq_handler handler,
+ edma_error_handler error_handler,
+ void *arg,
+ spinlock_t *lock,
+ const char *device_id )
{
if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
- if (devp->dma_interrupt_handlers[channel].allocated) {
+ if (devp->dma_interrupt_handlers[channel].allocated)
return -EBUSY;
- }
+
devp->dma_interrupt_handlers[channel].allocated = 1;
devp->dma_interrupt_handlers[channel].irq_handler = handler;
devp->dma_interrupt_handlers[channel].error_handler = error_handler;
- devp->dma_interrupt_handlers[channel].dev = dev;
+ devp->dma_interrupt_handlers[channel].arg = arg;
devp->dma_interrupt_handlers[channel].lock = lock;
devp->dma_interrupt_handlers[channel].device_id = device_id;
return 0;
@@ -164,16 +205,22 @@ int request_edma_channel(int channel,
}
EXPORT_SYMBOL(request_edma_channel);
-/* free eDMA channel */
-int free_edma_channel(int channel, void* dev)
+/**
+ * free_edma_channel - Free the edma channel
+ * @channel: channel number
+ * @arg: argument created with
+ *
+ * Returns 0 if success or a negative value if failure
+ */
+int free_edma_channel(int channel, void *arg)
{
if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
if (devp->dma_interrupt_handlers[channel].allocated) {
- if (devp->dma_interrupt_handlers[channel].dev != dev) {
+ if (devp->dma_interrupt_handlers[channel].arg != arg)
return -EBUSY;
- }
+
devp->dma_interrupt_handlers[channel].allocated = 0;
- devp->dma_interrupt_handlers[channel].dev = NULL;
+ devp->dma_interrupt_handlers[channel].arg = NULL;
devp->dma_interrupt_handlers[channel].irq_handler = NULL;
devp->dma_interrupt_handlers[channel].error_handler = NULL;
devp->dma_interrupt_handlers[channel].lock = NULL;
@@ -184,7 +231,9 @@ int free_edma_channel(int channel, void*
}
EXPORT_SYMBOL(free_edma_channel);
-/* clean-up device driver allocated resources */
+/**
+ * coldfire_edma_cleanup - cleanup driver allocated resources
+ */
static void coldfire_edma_cleanup(void)
{
dev_t devno;
@@ -192,13 +241,10 @@ static void coldfire_edma_cleanup(void)
/* free interrupts/memory */
if (devp) {
- for (i=0;i<EDMA_CHANNELS;i++)
- {
- MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+i;
- free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i, devp);
- }
- MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
- free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS, devp);
+ for (i=0; i<EDMA_CHANNELS; i++)
+ free_irq(EDMA_INT_BASE+i, devp);
+
+ free_irq(EDMA_INT_BASE+EDMA_INT_ERR, devp);
cdev_del(&devp->cdev);
kfree(devp);
}
@@ -209,30 +255,42 @@ static void coldfire_edma_cleanup(void)
}
#ifdef CONFIG_PROC_FS
-/* proc file system support */
+/*
+ * proc file system support
+ */
#define FREE_CHANNEL "free"
#define DEVICE_UNKNOWN "device unknown"
+/**
+ * proc_edma_show - print out proc info
+ * @m: seq_file
+ * @v:
+ */
static int proc_edma_show(struct seq_file *m, void *v)
{
int i;
- if (devp==NULL) return 0;
+ if (devp == NULL)
+ return 0;
for (i = 0 ; i < EDMA_CHANNELS ; i++) {
if (devp->dma_interrupt_handlers[i].allocated) {
if (devp->dma_interrupt_handlers[i].device_id)
- seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
+ seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
else
seq_printf(m, "%2d: %s\n", i, DEVICE_UNKNOWN);
- } else {
+ } else
seq_printf(m, "%2d: %s\n", i, FREE_CHANNEL);
- }
}
return 0;
}
+/**
+ * proc_edma_open - open the proc file
+ * @inode: inode ptr
+ * @file: file ptr
+ */
static int proc_edma_open(struct inode *inode, struct file *file)
{
return single_open(file, proc_edma_show, NULL);
@@ -245,6 +303,9 @@ static const struct file_operations proc
.release = single_release,
};
+/**
+ * proc_edma_init - initialize proc filesystem
+ */
static int __init proc_edma_init(void)
{
struct proc_dir_entry *e;
@@ -258,7 +319,9 @@ static int __init proc_edma_init(void)
#endif
-/* initializes device driver */
+/**
+ * coldfire_edma_init - eDMA module init
+ */
static int __init coldfire_edma_init(void)
{
dev_t dev;
@@ -267,8 +330,9 @@ static int __init coldfire_edma_init(voi
/* allocate free major number */
result = alloc_chrdev_region(&dev, DMA_DEV_MINOR, 1, EDMA_DRIVER_NAME);
- if (result<0) {
- printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n", result);
+ if (result < 0) {
+ printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n",
+ result);
return result;
}
coldfire_dma_major = MAJOR(dev);
@@ -280,71 +344,68 @@ static int __init coldfire_edma_init(voi
goto fail;
}
- /* init handlers (no handlers for beggining) */
- for (i=0;i<EDMA_CHANNELS;i++) {
+ /* init handlers (no handlers for beginning) */
+ for (i = 0; i < EDMA_CHANNELS; i++) {
devp->dma_interrupt_handlers[i].irq_handler = NULL;
devp->dma_interrupt_handlers[i].error_handler = NULL;
- devp->dma_interrupt_handlers[i].dev = NULL;
+ devp->dma_interrupt_handlers[i].arg = NULL;
devp->dma_interrupt_handlers[i].allocated = 0;
devp->dma_interrupt_handlers[i].lock = NULL;
devp->dma_interrupt_handlers[i].device_id = NULL;
}
- /* register char device */
+ /* register char device */
cdev_init(&devp->cdev, &coldfire_edma_fops);
devp->cdev.owner = THIS_MODULE;
devp->cdev.ops = &coldfire_edma_fops;
result = cdev_add(&devp->cdev, dev, 1);
if (result) {
- printk(KERN_NOTICE EDMA_DRIVER_NAME": Error %d adding coldfire-dma device\n", result);
+ printk(KERN_NOTICE EDMA_DRIVER_NAME
+ ": Error %d adding coldfire-dma device\n", result);
result = -ENODEV;
goto fail;
}
/* request/enable irq for each eDMA channel */
- for (i=0;i<EDMA_CHANNELS;i++)
- {
- result = request_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i,
- dmaisr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
+ for (i = 0; i < EDMA_CHANNELS;i++) {
+ result = request_irq(EDMA_INT_BASE + i,
+ dmaisr, IRQF_DISABLED,
+ EDMA_DRIVER_NAME, devp);
if (result) {
- printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
- EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i);
+ printk(KERN_WARNING EDMA_DRIVER_NAME
+ ": Cannot request irq %d\n",
+ (EDMA_INT_BASE + EDMA_INT_ERR+i));
result = -EBUSY;
goto fail;
}
-
- MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+i) = EDMA_IRQ_LEVEL;
- MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+i;
-
}
- /* request error interrupt */
- result = request_irq(EDMA_INT_CHANNEL_BASE + EDMA_INT_CONTROLLER_BASE + EDMA_CHANNELS,
- dma_error_isr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
+ /* request error interrupt */
+ result = request_irq(EDMA_INT_BASE + EDMA_INT_ERR,
+ dma_error_isr, IRQF_DISABLED,
+ EDMA_DRIVER_NAME, devp);
if (result) {
- printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
- EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS);
+ printk(KERN_WARNING EDMA_DRIVER_NAME
+ ": Cannot request irq %d\n",
+ (EDMA_INT_BASE + EDMA_INT_ERR));
result = -EBUSY;
goto fail;
}
- /* enable error interrupt in interrupt controller */
- MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS) = EDMA_IRQ_LEVEL;
- MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
-
#ifdef CONFIG_PROC_FS
proc_edma_init();
#endif
printk(EDMA_DRIVER_NAME ": initialized successfully\n");
-
return 0;
fail:
coldfire_edma_cleanup();
return result;
-
}
+/**
+ * coldfire_edma_exit - eDMA module exit
+ */
static void __exit coldfire_edma_exit(void)
{
coldfire_edma_cleanup();
@@ -354,5 +415,5 @@ module_init(coldfire_edma_init);
module_exit(coldfire_edma_exit);
MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Yaroslav Vinogradov, Freescale Inc.");
-MODULE_DESCRIPTION("eDMA library for Coldfire 5445x");
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("eDMA library for Coldfire M5445x");
--- a/include/asm-m68k/coldfire_edma.h
+++ b/include/asm-m68k/coldfire_edma.h
@@ -20,11 +20,14 @@
#define EDMA_DRIVER_NAME "ColdFire-eDMA"
#define DMA_DEV_MINOR 1
+#ifdef CONFIG_M54455
#define EDMA_INT_CHANNEL_BASE 8
#define EDMA_INT_CONTROLLER_BASE 64
+#define EDMA_INT_BASE (EDMA_INT_CHANNEL_BASE + \
+ EDMA_INT_CONTROLLER_BASE)
#define EDMA_CHANNELS 16
-
-#define EDMA_IRQ_LEVEL 5
+#define EDMA_INT_ERR 16 /* edma error interrupt */
+#endif /* CONFIG_M54455 */
typedef irqreturn_t (*edma_irq_handler)(int, void *);
typedef void (*edma_error_handler)(int, void *);
@@ -38,7 +41,7 @@ typedef void (*edma_error_handler)(int,
* nbytes - number of bytes to be transfered in minor loop
* slast - last source address adjustment
* citer - major loop count
- * biter - beggining minor loop count
+ * biter - begining minor loop count
* doff - destination offset
* dlast_sga - last destination address adjustment
* major_int - generate interrupt after each major loop
--- a/include/asm-m68k/mcf5445x_edma.h
+++ b/include/asm-m68k/mcf5445x_edma.h
@@ -11,11 +11,27 @@
#ifndef __MCF5445X_EDMA_H__
#define __MCF5445X_EDMA_H__
-/*********************************************************************
-*
-* Enhanced DMA (EDMA)
-*
-*********************************************************************/
+/*
+ * Enhanced DMA (EDMA)
+ */
+
+/* Channels */
+#define MCF_EDMA_CHAN_DREQ0 0 /* External DMA request 0 */
+#define MCF_EDMA_CHAN_DREQ1 1 /* External DMA request 1 */
+#define MCF_EDMA_CHAN_UART0_RX 2 /* UART0 Receive */
+#define MCF_EDMA_CHAN_UART0_TX 3 /* UART0 Transmit */
+#define MCF_EDMA_CHAN_UART1_RX 4 /* UART1 Receive */
+#define MCF_EDMA_CHAN_UART1_TX 5 /* UART1 Transmit */
+#define MCF_EDMA_CHAN_UART2_RX 6 /* UART2 Receive */
+#define MCF_EDMA_CHAN_UART2_TX 7 /* UART2 Transmit */
+#define MCF_EDMA_CHAN_TIMER0 8 /* Timer 0 / SSI0 Rx */
+#define MCF_EDMA_CHAN_TIMER1 9 /* Timer 1 / SSI1 Rx */
+#define MCF_EDMA_CHAN_TIMER2 10 /* Timer 2 / SSI0 Tx */
+#define MCF_EDMA_CHAN_TIMER3 11 /* Timer 3 / SSI1 Tx */
+#define MCF_EDMA_CHAN_DSPI_RX 12 /* DSPI Receive */
+#define MCF_EDMA_CHAN_DSPI_TX 13 /* DSPI Transmit */
+#define MCF_EDMA_CHAN_ATA_RX 14 /* ATA Receive */
+#define MCF_EDMA_CHAN_ATA_TX 15 /* ATA Transmit */
/* Register read/write macros */
#define MCF_EDMA_CR MCF_REG32(0xFC044000)
@@ -1453,6 +1469,4 @@
#define MCF_EDMA_TCD15_CSR_LINKCH(x) (((x)&0x003F)<<8)
#define MCF_EDMA_TCD15_CSR_BWC(x) (((x)&0x0003)<<14)
-/********************************************************************/
-
#endif /* __MCF5445X_EDMA_H__ */

View File

@ -1,437 +0,0 @@
From 98e15babf1e25868d22c024dac6133cc29059d39 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Sun, 9 Dec 2007 02:24:13 -0700
Subject: [PATCH] Fix DMA mode and cleanup driver.
LTIBName: m5445x-ssi-cleanup
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/ssi_audio.c | 207 ++++++++++++++++++++++++-----------------------
1 files changed, 104 insertions(+), 103 deletions(-)
--- a/drivers/spi/ssi_audio.c
+++ b/drivers/spi/ssi_audio.c
@@ -2,7 +2,7 @@
* MCF5445x audio driver.
*
* Yaroslav Vinogradov yaroslav.vinogradov@freescale.com
- * Copyright Freescale Semiconductor, Inc. 2006
+ * Copyright Freescale Semiconductor, Inc. 2006, 2007
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,9 +25,11 @@
#include <asm/coldfire.h>
#include <asm/coldfire_edma.h>
+#ifdef CONFIG_M54455
#include <asm/mcf5445x_ssi.h>
#include <asm/mcf5445x_ccm.h>
#include <asm/mcf5445x_gpio.h>
+#endif
#define SOUND_DEVICE_NAME "sound"
#define DRIVER_NAME "ssi_audio"
@@ -47,8 +49,8 @@
/* TLV320DAC23 audio chip registers */
-#define CODEC_LEFT_IN_REG (0x00)
-#define CODEC_RIGHT_IN_REG (0x01)
+#define CODEC_LEFT_IN_REG (0x00)
+#define CODEC_RIGHT_IN_REG (0x01)
#define CODEC_LEFT_HP_VOL_REG (0x02)
#define CODEC_RIGHT_HP_VOL_REG (0x03)
#define CODEC_ANALOG_APATH_REG (0x04)
@@ -57,7 +59,7 @@
#define CODEC_DIGITAL_IF_FMT_REG (0x07)
#define CODEC_SAMPLE_RATE_REG (0x08)
#define CODEC_DIGITAL_IF_ACT_REG (0x09)
-#define CODEC_RESET_REG (0x0f)
+#define CODEC_RESET_REG (0x0f)
#define CODEC_SAMPLE_8KHZ (0x0C)
#define CODEC_SAMPLE_16KHZ (0x58)
@@ -71,21 +73,21 @@
/* DMA transfer size */
#define DMASIZE (16*1024)
-/* transmit eDMA channel for SSI channel 0 */
-#define DMA_TCD 10
-/* transmit eDMA channel for SSI channel 1 */
-#define DMA_TCD2 11
+/* eDMA channel for SSI channel 0 TX */
+#define DMA_TCD MCF_EDMA_CHAN_TIMER2
+/* eDMA channel for SSI channel 1 TX */
+#define DMA_TCD2 MCF_EDMA_CHAN_TIMER3
struct ssi_audio {
- struct spi_device *spi;
+ struct spi_device *spi;
u32 speed;
u32 stereo;
u32 bits;
u32 format;
- u8 isopen;
- u8 dmaing;
- u8 ssi_enabled;
- u8 channel;
+ u8 isopen;
+ u8 dmaing;
+ u8 ssi_enabled;
+ u8 channel;
spinlock_t lock;
u8* audio_buf;
};
@@ -129,7 +131,8 @@ static void ssi_audio_setsamplesize(int
}
#ifdef AUDIO_DEBUG
- printk(DRIVER_NAME ":ssi_audio_setsamplesize %d %d\n", audio_device->format, audio_device->bits);
+ printk(DRIVER_NAME ":ssi_audio_setsamplesize %d %d\n",
+ audio_device->format, audio_device->bits);
#endif
}
@@ -157,62 +160,57 @@ void __inline__ ssi_audio_dmarun(void)
{
set_edma_params(DMA_TCD,
#ifdef USE_MMU
- virt_to_phys(&(audio_device->audio_buf[audio_start])),
+ virt_to_phys(&(audio_device->audio_buf[audio_start])),
#else
- (u32)&(audio_device->audio_buf[audio_start]),
+ (u32)&(audio_device->audio_buf[audio_start]),
#endif
- (u32)&MCF_SSI_TX0,
- MCF_EDMA_TCD_ATTR_SSIZE_32BIT | MCF_EDMA_TCD_ATTR_DSIZE_32BIT,
- 8,
- 4,
- 0,
- audio_count/8,
- audio_count/8,
- 0,
- 0,
- 0, // major_int
- 0 // disable_req
- );
+ (u32)&MCF_SSI_TX0,
+ MCF_EDMA_TCD_ATTR_SSIZE_32BIT | MCF_EDMA_TCD_ATTR_DSIZE_32BIT,
+ 8,
+ 4,
+ 0,
+ audio_count/8,
+ audio_count/8,
+ 0,
+ 0,
+ 0, // major_int
+ 0 // disable_req
+ );
set_edma_params(DMA_TCD2,
#ifdef USE_MMU
- virt_to_phys(&(audio_device->audio_buf[audio_start+4])),
+ virt_to_phys(&(audio_device->audio_buf[audio_start+4])),
#else
- (u32)&(audio_device->audio_buf[audio_start+4]),
+ (u32)&(audio_device->audio_buf[audio_start+4]),
#endif
- (u32)&MCF_SSI_TX1,
- MCF_EDMA_TCD_ATTR_SSIZE_32BIT | MCF_EDMA_TCD_ATTR_DSIZE_32BIT,
- 8,
- 4,
- 0,
- audio_count/8,
- audio_count/8,
- 0,
- 0,
- 1, // major_int
- 0 // disable_req
- );
+ (u32)&MCF_SSI_TX1,
+ MCF_EDMA_TCD_ATTR_SSIZE_32BIT | MCF_EDMA_TCD_ATTR_DSIZE_32BIT,
+ 8,
+ 4,
+ 0,
+ audio_count/8,
+ audio_count/8,
+ 0,
+ 0,
+ 1, // major_int
+ 0 // disable_req
+ );
audio_device->dmaing = 1;
audio_txbusy = 1;
start_edma_transfer(DMA_TCD);
start_edma_transfer(DMA_TCD2);
-#if 0
- MCF_EDMA_ERQ |= (1<<DMA_TCD) | (1<<DMA_TCD2);
- MCF_EDMA_SSRT = DMA_TCD;
- MCF_EDMA_SSRT = DMA_TCD2;
-#endif
-
}
-/*
- * Start DMA'ing a new buffer of data if any available.
+/**
+ * ssi_audio_dmabuf - Start DMA'ing a new buffer of data if any available.
*/
static void ssi_audio_dmabuf(void)
{
#ifdef AUDIO_DEBUG
- printk(DRIVER_NAME ":ssi_audio_dmabuf(): append=%x start=%x\n", audio_append, audio_appstart);
+ printk(DRIVER_NAME ":ssi_audio_dmabuf(): append=%x start=%x\n",
+ audio_append, audio_appstart);
#endif
/* If already running then nothing to do... */
@@ -241,7 +239,8 @@ static void ssi_audio_dmabuf(void)
}
}
-void __inline__ stop_dma(void) {
+void __inline__ stop_dma(void)
+{
stop_edma_transfer(DMA_TCD);
stop_edma_transfer(DMA_TCD2);
}
@@ -283,7 +282,6 @@ static void init_dma(void)
#endif /* CONFIG_SSIAUDIO_USE_EDMA */
-
/* Write CODEC register using SPI
* address - CODEC register address
* data - data to be written into register
@@ -296,7 +294,8 @@ static int codec_write(u8 addr, u16 data
return -ENODEV;
spi_word = ((addr & 0x7F)<<9)|(data & 0x1FF);
- return spi_write(audio_device->spi, (const u8*)&spi_word, sizeof(spi_word));
+ return spi_write(audio_device->spi, (const u8*)&spi_word,
+ sizeof(spi_word));
}
static inline void enable_ssi(void)
@@ -359,7 +358,7 @@ static void init_audio_codec(void)
codec_write(CODEC_DIGITAL_APATH_REG, 0x007); /* Set A path */
/* set sample rate */
- adjust_codec_speed();
+ adjust_codec_speed();
codec_write(CODEC_LEFT_HP_VOL_REG, 0x075); /* set volume */
codec_write(CODEC_RIGHT_HP_VOL_REG, 0x075); /* set volume */
@@ -375,13 +374,12 @@ static void chip_init(void)
#endif
/* Enable the SSI pins */
- MCF_GPIO_PAR_SSI = ( 0
- | MCF_GPIO_PAR_SSI_MCLK
- | MCF_GPIO_PAR_SSI_STXD(3)
- | MCF_GPIO_PAR_SSI_SRXD(3)
- | MCF_GPIO_PAR_SSI_FS(3)
- | MCF_GPIO_PAR_SSI_BCLK(3) );
-
+ MCF_GPIO_PAR_SSI = (0
+ | MCF_GPIO_PAR_SSI_MCLK
+ | MCF_GPIO_PAR_SSI_STXD(3)
+ | MCF_GPIO_PAR_SSI_SRXD(3)
+ | MCF_GPIO_PAR_SSI_FS(3)
+ | MCF_GPIO_PAR_SSI_BCLK(3) );
}
static void init_ssi(void)
@@ -430,8 +428,8 @@ static void init_ssi(void)
;
MCF_SSI_FCSR = 0
- | MCF_SSI_FCSR_TFWM0(0)
- | MCF_SSI_FCSR_TFWM1(0)
+ | MCF_SSI_FCSR_TFWM0(2)
+ | MCF_SSI_FCSR_TFWM1(2)
;
MCF_SSI_IER = 0 // interrupts
@@ -459,9 +457,8 @@ static int ssi_audio_isr(int irq, void *
{
unsigned long *bp;
- if (audio_txbusy==0) {
+ if (audio_txbusy==0)
return IRQ_HANDLED;
- }
spin_lock(&(audio_device->lock));
@@ -560,7 +557,8 @@ static int ssi_audio_close(struct inode
}
/* write to audio device */
-static ssize_t ssi_audio_write(struct file *filp, const char *buf, size_t count, loff_t *ppos)
+static ssize_t ssi_audio_write(struct file *filp, const char *buf,
+ size_t count, loff_t *ppos)
{
unsigned long *dp, *buflp;
unsigned short *bufwp;
@@ -568,10 +566,12 @@ static ssize_t ssi_audio_write(struct fi
unsigned int slen, bufcnt, i, s, e;
#ifdef AUDIO_DEBUG
- printk(DRIVER_NAME ":ssi_audio_write(buf=%x,count=%d)\n", (int) buf, count);
+ printk(DRIVER_NAME ":ssi_audio_write(buf=%x,count=%d)\n",
+ (int)buf, count);
#endif
- if (audio_device==NULL) return (-ENODEV);
+ if (audio_device==NULL)
+ return (-ENODEV);
if (count <= 0)
return 0;
@@ -592,8 +592,8 @@ static ssize_t ssi_audio_write(struct fi
tryagain:
/*
- * Get a snapshot of buffer, so we can figure out how
- * much data we can fit in...
+ * Get a snapshot of buffer, so we can figure out how
+ * much data we can fit in...
*/
s = audio_start;
e = audio_append;
@@ -613,11 +613,12 @@ tryagain:
goto tryagain;
}
- /* For DMA we need to have data as 32 bit
- values (since SSI TX register is 32 bit).
- So, the incomming 16 bit data must be put to buffer as 32 bit values.
- Also, the endianess is converted if needed
- */
+ /*
+ * For DMA we need to have data as 32 bit
+ * values (since SSI TX register is 32 bit).
+ * So, the incoming 16 bit data must be put to buffer as 32 bit values.
+ * Also, the endianess is converted if needed
+ */
if (audio_device->stereo) {
if (audio_device->bits == 16) {
if (audio_device->format==AFMT_S16_LE) {
@@ -678,16 +679,19 @@ tryagain:
}
/* ioctl: control the driver */
-static int ssi_audio_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
+static int ssi_audio_ioctl(struct inode *inode, struct file *filp,
+ unsigned int cmd, unsigned long arg)
{
- long val;
- int rc = 0;
+ long val;
+ int rc = 0;
#ifdef AUDIO_DEBUG
- printk(DRIVER_NAME ":ssi_audio_ioctl(cmd=%x,arg=%x)\n", (int) cmd, (int) arg);
+ printk(DRIVER_NAME ":ssi_audio_ioctl(cmd=%x,arg=%x)\n",
+ (int)cmd, (int)arg);
#endif
- if (audio_device==NULL) return (-ENODEV);
+ if (audio_device==NULL)
+ return (-ENODEV);
switch (cmd) {
@@ -744,8 +748,6 @@ static int ssi_audio_ioctl(struct inode
return rc;
}
-/****************************************************************************/
-
struct file_operations ssi_audio_fops = {
open: ssi_audio_open, /* open */
release: ssi_audio_close, /* close */
@@ -756,8 +758,8 @@ struct file_operations ssi_audio_fops =
/* initialize audio driver */
static int __devinit ssi_audio_probe(struct spi_device *spi)
{
- struct ssi_audio *audio;
- int err;
+ struct ssi_audio *audio;
+ int err;
#ifdef AUDIO_DEBUG
printk(DRIVER_NAME": probe\n");
@@ -804,7 +806,7 @@ static int __devinit ssi_audio_probe(str
audio->spi = spi;
#ifndef CONFIG_SSIAUDIO_USE_EDMA
- if (request_irq(spi->irq, ssi_audio_isr, SA_INTERRUPT, spi->dev.bus_id, audio)) {
+ if (request_irq(spi->irq, ssi_audio_isr, IRQF_DISABLED, spi->dev.bus_id, audio)) {
dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
err = -EBUSY;
goto err_free_mem;
@@ -813,25 +815,21 @@ static int __devinit ssi_audio_probe(str
#else
/* request 2 eDMA channels since two channel output mode is used */
if (request_edma_channel(DMA_TCD,
- ssi_audio_dma_handler_empty,
- NULL,
- audio,
- &(audio_device->lock),
- DRIVER_NAME
- )!=0)
- {
+ ssi_audio_dma_handler_empty,
+ NULL,
+ audio,
+ &(audio_device->lock),
+ DRIVER_NAME)!=0) {
dev_dbg(&spi->dev, "DMA channel %d busy?\n", DMA_TCD);
err = -EBUSY;
goto err_free_mem;
}
if (request_edma_channel(DMA_TCD2,
- ssi_audio_dma_handler,
- NULL,
- audio,
- &(audio_device->lock),
- DRIVER_NAME
- )!=0)
- {
+ ssi_audio_dma_handler,
+ NULL,
+ audio,
+ &(audio_device->lock),
+ DRIVER_NAME)!=0) {
dev_dbg(&spi->dev, "DMA channel %d busy?\n", DMA_TCD2);
err = -EBUSY;
goto err_free_mem;
@@ -870,11 +868,13 @@ static int __devexit ssi_audio_remove(st
return 0;
}
-static int ssi_audio_suspend(struct spi_device *spi, pm_message_t message) {
+static int ssi_audio_suspend(struct spi_device *spi, pm_message_t message)
+{
return 0;
}
-static int ssi_audio_resume(struct spi_device *spi) {
+static int ssi_audio_resume(struct spi_device *spi)
+{
return 0;
}
@@ -902,5 +902,6 @@ static void __exit ssi_audio_exit(void)
}
module_exit(ssi_audio_exit);
-MODULE_DESCRIPTION("SSI/I2S Audio Driver");
MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("SSI/I2S Audio Driver");

View File

@ -1,22 +0,0 @@
From b999c1fe5c6e5fa4f7e43fae02f59fc547d18093 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Sun, 9 Dec 2007 02:24:57 -0700
Subject: [PATCH] Fix use of deprecated API.
LTIBName: m5445x-spi-deprecated-api
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/spi_coldfire.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/spi/spi_coldfire.c
+++ b/drivers/spi/spi_coldfire.c
@@ -1311,7 +1311,7 @@ static int coldfire_spi_probe(struct pla
irq = platform_info->irq_vector;
- status = request_irq(platform_info->irq_vector, qspi_interrupt, SA_INTERRUPT, dev->bus_id, drv_data);
+ status = request_irq(platform_info->irq_vector, qspi_interrupt, IRQF_DISABLED, dev->bus_id, drv_data);
if (status < 0) {
dev_err(&pdev->dev, "unable to attach ColdFire QSPI interrupt\n");
goto out_error_master_alloc;

View File

@ -1,83 +0,0 @@
From 898b269952d096ce3f990c51b02457c27e16b83c Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Sun, 9 Dec 2007 02:25:49 -0700
Subject: [PATCH] Clean up formatting.
LTIBName: mcfv4e-bitops-cleanup
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/bitops.h | 21 ++++++++++++++-------
1 files changed, 14 insertions(+), 7 deletions(-)
--- a/include/asm-m68k/bitops.h
+++ b/include/asm-m68k/bitops.h
@@ -478,7 +478,8 @@ static __inline__ int __constant_coldfir
return retval;
}
#else
-static __inline__ int __constant_coldfire_test_and_set_bit(int nr,volatile void * vaddr)
+static __inline__ int __constant_coldfire_test_and_set_bit(int nr,
+ volatile void *vaddr)
{
char retval;
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
@@ -516,7 +517,8 @@ static __inline__ void __constant_coldfi
: "+QUd" (*p) : "di" (nr & 7));
}
#else
-static __inline__ void __constant_coldfire_set_bit(int nr, volatile void * vaddr)
+static __inline__ void __constant_coldfire_set_bit(int nr,
+ volatile void *vaddr)
{
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
__asm__ __volatile__ ("bset %1,(%3)"
@@ -524,7 +526,8 @@ static __inline__ void __constant_coldfi
}
#endif
-static __inline__ void __generic_coldfire_set_bit(int nr, volatile void *vaddr)
+static __inline__ void __generic_coldfire_set_bit(int nr,
+ volatile void *vaddr)
{
__asm__ __volatile__ ("bset %1,%0"
: "=m" (((volatile char *)vaddr)[(nr^31) >> 3])
@@ -552,7 +555,8 @@ static __inline__ int __constant_coldfir
return retval;
}
#else
-static __inline__ int __constant_coldfire_test_and_clear_bit(int nr, volatile void *vaddr)
+static __inline__ int __constant_coldfire_test_and_clear_bit(int nr,
+ volatile void *vaddr)
{
char retval;
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
@@ -599,7 +603,8 @@ static __inline__ void __constant_coldfi
: "+QUd" (*p) : "id" (nr & 7));
}
#else
-static __inline__ void __constant_coldfire_clear_bit(int nr, volatile void * vaddr)
+static __inline__ void __constant_coldfire_clear_bit(int nr,
+ volatile void *vaddr)
{
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
__asm__ __volatile__ ("bclr %1,(%3)"
@@ -636,7 +641,8 @@ static __inline__ int __constant_coldfir
return retval;
}
#else
-static __inline__ int __constant_coldfire_test_and_change_bit(int nr, volatile void * vaddr)
+static __inline__ int __constant_coldfire_test_and_change_bit(int nr,
+ volatile void *vaddr)
{
char retval;
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
@@ -678,7 +684,8 @@ static __inline__ void __constant_coldfi
: "+QUd" (*p) : "id" (nr & 7));
}
#else
-static __inline__ void __constant_coldfire_change_bit(int nr, volatile void * vaddr)
+static __inline__ void __constant_coldfire_change_bit(int nr,
+ volatile void *vaddr)
{
volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3];
__asm__ __volatile__ ("bchg %1,(%3)"

View File

@ -1,251 +0,0 @@
From da8e8fe3d6ad5eb9589c8e77e7716e4f7e1a7499 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 10 Dec 2007 03:36:05 -0700
Subject: [PATCH] Coldfire M5445x PCI Bits.
LTIBName: m5445x-pci
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/Kconfig | 12 ++++++++++--
arch/m68k/Makefile | 4 ++++
arch/m68k/coldfire/config.c | 2 +-
arch/m68k/coldfire/iomap.c | 2 ++
arch/m68k/coldfire/mcf5445x-devices.c | 9 +++++++++
arch/m68k/coldfire/mcf5445x-pci.c | 5 +++--
arch/m68k/coldfire/pci.c | 6 +++---
arch/m68k/kernel/Makefile | 2 +-
drivers/macintosh/Kconfig | 1 -
drivers/pci/Makefile | 1 +
include/asm-m68k/io.h | 13 ++++++++++++-
include/asm-m68k/pci.h | 2 ++
12 files changed, 48 insertions(+), 11 deletions(-)
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -11,6 +11,14 @@ config MMU
bool
default y
+config GENERIC_TIME
+ bool
+ default n
+
+config GENERIC_CLOCKEVENTS
+ bool
+ default n
+
config RWSEM_GENERIC_SPINLOCK
bool
default y
@@ -48,7 +56,7 @@ config ARCH_MAY_HAVE_PC_FDC
default y
config NO_IOPORT
- def_bool y
+ def_bool !M54455
config NO_DMA
def_bool SUN3
@@ -159,7 +167,7 @@ config HADES
config PCI
bool
- depends on HADES
+ depends on HADES || M54455
default y
help
Find out whether you have a PCI motherboard. PCI is the name of a
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -32,6 +32,10 @@ ifdef CONFIG_SUN3
LDFLAGS_vmlinux = -N
endif
+ifdef CONFIG_COLDFIRE
+# LDFLAGS_vmlinux = --verbose
+endif
+
CHECKFLAGS += -D__mc68000__
# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -252,7 +252,7 @@ void __init coldfire_sched_init(irq_hand
MCF_DTIM_DTMR_FRR | MCF_DTIM_DTMR_RST_EN, \
MCF_DTIM0_DTMR);
- request_irq(mcf_timervector, handler, SA_INTERRUPT, \
+ request_irq(mcf_timervector, handler, IRQF_DISABLED, \
"timer", (void *)MCF_DTIM0_DTMR);
settimericr(1, mcf_timerlevel);
--- a/arch/m68k/coldfire/iomap.c
+++ b/arch/m68k/coldfire/iomap.c
@@ -12,6 +12,7 @@
#include <linux/pci.h>
#include <asm/io.h>
+#if 0
void __iomem *__attribute__ ((weak))
ioport_map(unsigned long port, unsigned int len)
{
@@ -52,3 +53,4 @@ void pci_iounmap(struct pci_dev *dev, vo
/* Nothing .. */
}
EXPORT_SYMBOL(ioport_unmap);
+#endif
--- a/arch/m68k/coldfire/mcf5445x-devices.c
+++ b/arch/m68k/coldfire/mcf5445x-devices.c
@@ -75,10 +75,19 @@ static int ata_get_clk_rate(void)
return MCF_BUSCLK;
}
+/* JKM -- move these to a header file */
+#define MCF_IDE_DMA_WATERMARK 32 /* DMA watermark level in bytes */
+#define MCF_IDE_DMA_BD_NR (512/3/4) /* number of BDs per channel */
+
static struct fsl_ata_platform_data ata_data = {
.init = ata_init,
.exit = ata_exit,
.get_clk_rate = ata_get_clk_rate,
+#ifdef CONFIG_PATA_FSL_USE_DMA
+ .udma_mask = 0x0F, /* the board handles up to UDMA3 */
+ .fifo_alarm = MCF_IDE_DMA_WATERMARK / 2,
+ .max_sg = MCF_IDE_DMA_BD_NR,
+#endif
};
static struct resource pata_fsl_resources[] = {
--- a/arch/m68k/coldfire/mcf5445x-pci.c
+++ b/arch/m68k/coldfire/mcf5445x-pci.c
@@ -8,6 +8,7 @@
*/
#include <linux/delay.h>
+#include <linux/interrupt.h>
#include <linux/pci.h>
#include <asm/mcfsim.h>
@@ -76,7 +77,7 @@ void mcf5445x_pci_dumpregs(void);
#endif
/*
- * static void mcf5445x_conf_device(struct pci_dev *dev)
+ * mcf5445x_conf_device(struct pci_dev *dev)
*
* Machine dependent Configure the given device.
*
@@ -84,7 +85,7 @@ void mcf5445x_pci_dumpregs(void);
*
* dev - the pci device.
*/
-void __init
+void
mcf5445x_conf_device(struct pci_dev *dev)
{
set_fpga(FPGA_PCI_IRQ_ENABLE, 0x0f);
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -56,7 +56,7 @@ struct pci_ops pci_root_ops = {
*
* Initialize the pcibios based on cmd line params.
*/
-char * __init
+char *
pcibios_setup(char *str)
{
if (!strcmp(str, "debug")) {
@@ -124,7 +124,7 @@ pcibios_map_irq(struct pci_dev *dev, u8
*
* Update a PCI interrupt.
*/
-void __init
+void
pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
@@ -171,7 +171,7 @@ pcibios_enable_device(struct pci_dev *de
/*
* pcibios_fixup_bus(struct pci_bus *bus)
*/
-void __init
+void
pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_dev *dev = bus->self;
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -9,6 +9,7 @@ else
ifndef CONFIG_COLDFIRE
extra-y := head.o vmlinux.lds
obj-y := entry.o signal.o traps.o ints.o
+ obj-$(CONFIG_PCI) += bios32.o
else # CONFIG_COLDFIRE
extra-y := ../coldfire/head.o vmlinux.lds
endif
@@ -19,7 +20,6 @@ obj-y += process.o ptrace.o module.o \
devres-y = ../../../kernel/irq/devres.o
-obj-$(CONFIG_PCI) += bios32.o
obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
EXTRA_AFLAGS := -traditional
--- a/drivers/macintosh/Kconfig
+++ b/drivers/macintosh/Kconfig
@@ -118,7 +118,6 @@ config PMAC_SMU
config PMAC_APM_EMU
tristate "APM emulation"
- select APM_EMULATION
depends on ADB_PMU && PM && PPC32
config PMAC_MEDIABAY
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_PPC) += setup-bus.o
obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
obj-$(CONFIG_X86_VISWS) += setup-irq.o
obj-$(CONFIG_MN10300) += setup-bus.o
+obj-$(CONFIG_M54455) += setup-bus.o setup-irq.o
#
# ACPI Related PCI FW Functions
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -306,7 +306,18 @@ static inline void isa_delay(void)
#define outw(val,port) out_le16((port),(val))
#define inl(port) in_le32(port)
#define outl(val,port) out_le32((port),(val))
-
+#define insb(port, buf, nr) \
+ raw_insb((u8 *)(port), (u8 *)(buf), (nr))
+#define outsb(port, buf, nr) \
+ raw_outsb((u8 *)(port), (u8 *)(buf), (nr))
+#define insw(port, buf, nr) \
+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr))
+#define outsw(port, buf, nr) \
+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr))
+#define insl(port, buf, nr) \
+ raw_insw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
+#define outsl(port, buf, nr) \
+ raw_outsw_swapw((u16 *)(port), (u16 *)(buf), (nr)<<1)
#else
/*
* kernel with both ISA and PCI compiled in, those have
--- a/include/asm-m68k/pci.h
+++ b/include/asm-m68k/pci.h
@@ -42,11 +42,13 @@ pcibios_penalize_isa_irq(int irq, int ac
/* no dynamic PCI IRQ allocation */
}
+#if 0
static inline void
pcibios_add_platform_entries(struct pci_dev *dev)
{
/* no special handling */
}
+#endif
static inline void
pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,

View File

@ -1,90 +0,0 @@
From acd937ac924aefd22ea9a66ea621ab80a4f9b594 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 10 Dec 2007 03:37:19 -0700
Subject: [PATCH] Update EDMA driver to allow callback/arg changes.
LTIBName: m5445x-edma-callback
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/coldfire_edma.c | 27 +++++++++++++++++++++++++++
include/asm-m68k/coldfire_edma.h | 20 ++++++++++++++++++++
2 files changed, 47 insertions(+), 0 deletions(-)
--- a/drivers/spi/coldfire_edma.c
+++ b/drivers/spi/coldfire_edma.c
@@ -206,6 +206,31 @@ int request_edma_channel(int channel,
EXPORT_SYMBOL(request_edma_channel);
/**
+ * set_edma_callback - Update the channel callback/arg
+ * @channel: channel number
+ * @handler: dma handler
+ * @error_handler: dma error handler
+ * @arg: argument to pass back
+ *
+ * Returns 0 if success or a negative value if failure
+ */
+int set_edma_callback(int channel,
+ edma_irq_handler handler,
+ edma_error_handler error_handler,
+ void *arg )
+{
+ if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS &&
+ devp->dma_interrupt_handlers[channel].allocated) {
+ devp->dma_interrupt_handlers[channel].irq_handler = handler;
+ devp->dma_interrupt_handlers[channel].error_handler = error_handler;
+ devp->dma_interrupt_handlers[channel].arg = arg;
+ return 0;
+ }
+ return -EINVAL;
+}
+EXPORT_SYMBOL(set_edma_callback);
+
+/**
* free_edma_channel - Free the edma channel
* @channel: channel number
* @arg: argument created with
@@ -216,8 +241,10 @@ int free_edma_channel(int channel, void
{
if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
if (devp->dma_interrupt_handlers[channel].allocated) {
+#if 0
if (devp->dma_interrupt_handlers[channel].arg != arg)
return -EBUSY;
+#endif
devp->dma_interrupt_handlers[channel].allocated = 0;
devp->dma_interrupt_handlers[channel].arg = NULL;
--- a/include/asm-m68k/coldfire_edma.h
+++ b/include/asm-m68k/coldfire_edma.h
@@ -96,10 +96,30 @@ int request_edma_channel(int channel,
void *dev,
spinlock_t *lock,
const char *device_id);
+
+/**
+ * set_edma_callback - Update the channel callback/arg
+ * @channel: channel number
+ * @handler: dma handler
+ * @error_handler: dma error handler
+ * @arg: argument to pass back
+ *
+ * Returns 0 if success or a negative value if failure
+ */
+int set_edma_callback(int channel,
+ edma_irq_handler handler,
+ edma_error_handler error_handler,
+ void *arg);
/* Free eDMA channel
* channel - eDMA TCD number
* dev - device
*/
int free_edma_channel(int channel, void *dev);
+
+/*
+ * DMA Modes
+ */
+#define DMA_MODE_READ 0
+#define DMA_MODE_WRITE 1
#endif

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@ -1,77 +0,0 @@
From de5f4660856350ac43f642bb7c5adf063fc68287 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 10 Dec 2007 13:15:33 -0700
Subject: [PATCH] Fix to allow playback at other than 44.1.
LTIBName: m5445x-audio-rates
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/ssi_audio.c | 34 ++++++++++++++++++++++++----------
1 files changed, 24 insertions(+), 10 deletions(-)
--- a/drivers/spi/ssi_audio.c
+++ b/drivers/spi/ssi_audio.c
@@ -34,7 +34,6 @@
#define SOUND_DEVICE_NAME "sound"
#define DRIVER_NAME "ssi_audio"
-
/* #define AUDIO_DEBUG */
#ifdef CONFIG_MMU
@@ -315,24 +314,36 @@ static inline void disable_ssi(void)
}
/* Audio CODEC initialization */
-/* TODO: also the SSI frequency/dividers must be adjusted */
static void adjust_codec_speed(void) {
#ifdef AUDIO_DEBUG
printk(DRIVER_NAME ":adjust_codec_speed: %d\n", audio_device->speed);
#endif
-
- if (audio_device->speed == 8000) {
+ disable_ssi();
+ switch (audio_device->speed) {
+ case 8000:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(255);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_8KHZ);
- } else if (audio_device->speed == 16000) {
+ break;
+ case 16000:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(129);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_16KHZ);
- } else if (audio_device->speed == 22000) {
+ break;
+ case 22000:
+ case 22050:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(94);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_22KHZ);
- } else if (audio_device->speed == 44000 || audio_device->speed == 44100) {
+ break;
+ case 44000:
+ case 44100:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(47);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_44KHZ);
- } else if (audio_device->speed == 48000) {
+ break;
+ case 48000:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(42);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_48KHZ);
- } else {
- /* default 44KHz */
+ break;
+ default:
+ MCF_CCM_CDR = MCF_CCM_CDR_SSIDIV(47);
codec_write(CODEC_SAMPLE_RATE_REG,CODEC_SAMPLE_44KHZ);
}
}
@@ -712,6 +723,9 @@ static int ssi_audio_ioctl(struct inode
case SNDCTL_DSP_SAMPLESIZE:
if (access_ok(VERIFY_READ, (void *) arg, sizeof(val))) {
get_user(val, (unsigned long *) arg);
+#ifdef AUDIO_DEBUG
+ printk(DRIVER_NAME ":ssi_audio_ioctl: SNDCTL_DSP_SAMPLESIZE: %d\n", val);
+#endif
ssi_audio_txdrain();
ssi_audio_setsamplesize(val);
} else {

View File

@ -1,32 +0,0 @@
From ea71d637a9d8606624056fad67d050face9fc03c Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 15 Feb 2008 15:32:35 -0700
Subject: [PATCH] Update to use KBUILD_ for CFLAGS and AFLAGS.
LTIBName: mcfv4e-kbuild-flags-update
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/Makefile | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -33,6 +33,7 @@ LDFLAGS_vmlinux = -N
endif
ifdef CONFIG_COLDFIRE
+# OBJCOPYFLAGS := -R .note -R .note.gnu.build-id -R .comment -S
# LDFLAGS_vmlinux = --verbose
endif
@@ -59,8 +60,8 @@ endif
endif
ifdef CONFIG_M54455
-CFLAGS := $(CFLAGS) -march=isac -mcpu=54455 -msoft-float -g
-AFLAGS := $(AFLAGS) -march=isac -mcpu=54455 -msoft-float
+KBUILD_CFLAGS += -march=isac -mcpu=54455 -msoft-float -g
+KBUILD_AFLAGS += -march=isac -mcpu=54455 -msoft-float
endif
ifdef CONFIG_KGDB

View File

@ -1,22 +0,0 @@
From 9d8ff9acf372506a60b2e54964d230e0a5a95eb1 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 15 Feb 2008 15:33:23 -0700
Subject: [PATCH] Change linux/usb_gadget.h to linux/usb/gadget.h
LTIBName: m5445x-usb-header-move
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/usb/gadget/mcf5445x_udc.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/usb/gadget/mcf5445x_udc.c
+++ b/drivers/usb/gadget/mcf5445x_udc.c
@@ -57,7 +57,7 @@
#include <linux/moduleparam.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
-#include <linux/usb_gadget.h>
+#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>

View File

@ -1,21 +0,0 @@
From ff3d02768c1cbfbc1f0f07db4aef3d500101e4a7 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 15 Feb 2008 15:34:06 -0700
Subject: [PATCH] Add generic lock header.
LTIBName: mcfv4e-bitops-lock-hdr
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/bitops.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
--- a/include/asm-m68k/bitops.h
+++ b/include/asm-m68k/bitops.h
@@ -874,6 +874,7 @@ static __inline__ int fls(int x)
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/lock.h>
#define minix_find_first_zero_bit(addr, size) find_next_zero_bit((addr), \
(size), 0)

View File

@ -1,49 +0,0 @@
From 329eae71bdbe9e30f76164ba3dd5ef0dba932eef Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 15 Feb 2008 15:34:58 -0700
Subject: [PATCH] Remove .port_disable and .irq_ack for 2.6.24.
LTIBName: m5445x-pata-24-cleanup
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/ata/pata_fsl.c | 15 ---------------
1 files changed, 0 insertions(+), 15 deletions(-)
--- a/drivers/ata/pata_fsl.c
+++ b/drivers/ata/pata_fsl.c
@@ -497,19 +497,6 @@ err_out:
}
#endif /* CONFIG_FSL_PATA_USE_DMA */
-static u8 pata_fsl_irq_ack(struct ata_port *ap, unsigned int chk_drq)
-{
- unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
- u8 status;
-
- status = ata_busy_wait(ap, bits, 1000);
- if (status & bits)
- if (ata_msg_err(ap))
- printk(KERN_ERR "abnormal status 0x%X\n", status);
-
- return status;
-}
-
static void ata_dummy_noret(struct ata_port *ap) { return; }
static struct scsi_host_template pata_fsl_sht = {
@@ -538,7 +525,6 @@ static struct ata_port_operations pata_f
.set_dmamode = pata_fsl_set_dmamode,
#endif
- .port_disable = ata_port_disable,
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
@@ -563,7 +549,6 @@ static struct ata_port_operations pata_f
.irq_clear = ata_dummy_noret,
.irq_on = ata_irq_on,
- .irq_ack = pata_fsl_irq_ack,
.port_start = pata_fsl_port_start,

View File

@ -1,31 +0,0 @@
From 13e26ba450f92bafe7dde67ad68779eeea65a53f Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 15 Feb 2008 15:36:04 -0700
Subject: [PATCH] Remove cdev as the structure has changed for 2.6.24.
LTIBName: m5445x-spi-cdev-remove
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/spi/spi_coldfire.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/spi/spi_coldfire.c
+++ b/drivers/spi/spi_coldfire.c
@@ -1115,7 +1115,7 @@ static int init_queue(struct driver_data
INIT_WORK(&drv_data->pump_messages, pump_messages/*, drv_data*/);
drv_data->workqueue = create_singlethread_workqueue(
- drv_data->master->cdev.dev->bus_id);
+ drv_data->master->dev.parent->bus_id);
if (drv_data->workqueue == NULL)
return -EBUSY;
@@ -1223,7 +1223,7 @@ static int coldfire_spi_probe(struct pla
if (!master)
return -ENOMEM;
- drv_data = class_get_devdata(&master->cdev);
+ drv_data = spi_master_get_devdata(master);
drv_data->master = master;
INIT_LIST_HEAD(&drv_data->queue);

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,22 +0,0 @@
From 62c2649ed2362a5f0478df60d56ed35414ac81ea Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 13 Mar 2008 22:06:35 -0600
Subject: [PATCH] Change internal name rigo to m548x_7x
LTIBName: m547x-8x-internal-rename
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -53,7 +53,7 @@
#define __FINIT .previous
#endif
-/* JKM -- REVISE DOCS FOR RIGO and PHYS MAPPING */
+/* JKM -- REVISE DOCS FOR M547x_8x and PHYS MAPPING */
/*
* Setup ACR mappings to provide the following memory map:
* Data

View File

@ -1,72 +0,0 @@
From 4e16f08c800d57b986217e0d39d4a06b5bdf641d Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 19 Mar 2008 17:37:44 -0600
Subject: [PATCH] Move BSS section in linker script and zero it on boot.
To work with the latest round of toolchains the bss section
in the linker script needed to be moved to the end (due to
the linker thinking there were overlapping sections).
The BSS section needs to be manually zeroed.
LTIBName: mcfv4e-linker-bss-cleanup
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 11 +++++++++++
arch/m68k/coldfire/vmlinux-cf.lds | 11 ++++++++---
2 files changed, 19 insertions(+), 3 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -321,6 +321,17 @@ ENTRY(__start)
movec %d0, %acr3
nop
+#ifdef CONFIG_COLDFIRE
+/* zero bss */
+ lea _sbss,%a0
+ lea _ebss,%a1
+ clrl %d0
+_loop_bss:
+ movel %d0,(%a0)+
+ cmpl %a0,%a1
+ bne _loop_bss
+#endif
+
/* If you change the memory size to another value make a matching
change in paging_init(cf-mmu.c) to zones_size[]. */
--- a/arch/m68k/coldfire/vmlinux-cf.lds
+++ b/arch/m68k/coldfire/vmlinux-cf.lds
@@ -51,9 +51,6 @@ SECTIONS
CONSTRUCTORS
} :data
- .bss : AT(ADDR(.bss) - LOAD_OFFSET) { /* BSS */
- *(.bss)
- }
. = ALIGN(16);
.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET ) {
@@ -62,6 +59,8 @@ SECTIONS
_edata = .; /* End of data section */
+ NOTES /* support ld --build-id */
+
. = ALIGN(8192); /* Initrd */
.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
__init_begin = .;
@@ -111,6 +110,12 @@ SECTIONS
*(.data.init_task) /* The initial task and kernel stack */
}
+ _sbss = .;
+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { /* BSS */
+ *(.bss)
+ }
+ _ebss = .;
+
_end = . ;
/* Sections to be discarded */

View File

@ -1,31 +0,0 @@
From 3487b77acbb12f4174f46237f942918651b23aa7 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 15 Apr 2008 17:14:55 -0600
Subject: [PATCH] Fix setting low 31 interrupts to deal with magic bit 0
of the IMRL register.
LTIBName: mcfv4e-irq-magic-bit
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/ints.c | 9 ++++++---
1 files changed, 6 insertions(+), 3 deletions(-)
--- a/arch/m68k/coldfire/ints.c
+++ b/arch/m68k/coldfire/ints.c
@@ -420,10 +420,13 @@ void m547x_8x_irq_enable(unsigned int ir
}
#endif
- if (irq < 32)
- MCF_IMRL &= ~(1 << irq);
- else
+ if (irq < 32) {
+ /* *grumble* don't set low bit of IMRL */
+ MCF_IMRL &= (~(1 << irq) & 0xfffffffe);
+ }
+ else {
MCF_IMRH &= ~(1 << (irq - 32));
+ }
}
void m547x_8x_irq_disable(unsigned int irq)

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,42 +0,0 @@
From eba69831e8f35174e2e15e373a66f40dc0be8929 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 14 May 2008 12:23:12 -0600
Subject: [PATCH] Force branch-cache invalidate on task switch.
When finishing a task switch make sure the branch cache
gets invalidated to ensure no stale entries exist for
the next user space.
LTIBName: mcfv4e-brcache-inval
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/system.h | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
--- a/include/asm-m68k/system.h
+++ b/include/asm-m68k/system.h
@@ -5,9 +5,24 @@
#include <linux/kernel.h>
#include <asm/segment.h>
#include <asm/entry.h>
+#include <asm/cfcache.h>
#ifdef __KERNEL__
+#ifdef CONFIG_COLDFIRE
+#define FLUSH_BC (0x00040000)
+
+#define finish_arch_switch(prev) do { \
+ unsigned long tmpreg; \
+ asm volatile ( "move.l %2,%0\n" \
+ "orl %1,%0\n" \
+ "movec %0,%%cacr" \
+ : "=&d" (tmpreg) \
+ : "id" (FLUSH_BC), "m" (shadow_cacr)); \
+ } while(0)
+
+#endif
+
/*
* switch_to(n) should switch tasks to task ptr, first checking that
* ptr isn't the current task, in which case it does nothing. This

File diff suppressed because it is too large Load Diff

View File

@ -1,808 +0,0 @@
From ce57fc22543d0ee0ca33157264815a52fc8cf9a3 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 15 May 2008 13:23:27 -0600
Subject: [PATCH] Add I2C bus driver for MCF547x and MCF548x.
LTIBName: m547x-8x-i2c
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: Shrek Wu <b16972@freescale.com>
---
arch/m68k/coldfire/Makefile | 1 +
arch/m68k/coldfire/mcf548x-devices.c | 94 ++++++
drivers/i2c/busses/Kconfig | 12 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-algo-mcf.h | 23 ++
drivers/i2c/busses/i2c-mcf548x.c | 573 ++++++++++++++++++++++++++++++++++
include/asm-m68k/m5485i2c.h | 45 +++
7 files changed, 749 insertions(+), 0 deletions(-)
create mode 100644 arch/m68k/coldfire/mcf548x-devices.c
create mode 100644 drivers/i2c/busses/i2c-algo-mcf.h
create mode 100644 drivers/i2c/busses/i2c-mcf548x.c
create mode 100644 include/asm-m68k/m5485i2c.h
--- a/arch/m68k/coldfire/Makefile
+++ b/arch/m68k/coldfire/Makefile
@@ -11,4 +11,5 @@ endif
obj-$(CONFIG_PCI) += pci.o mcf5445x-pci.o iomap.o
obj-$(CONFIG_M54455) += mcf5445x-devices.o
obj-$(CONFIG_M547X_8X) += m547x_8x-devices.o
+obj-$(CONFIG_M547X_8X) += mcf548x-devices.o
obj-$(CONFIG_MCD_DMA) += m547x_8x-dma.o
--- /dev/null
+++ b/arch/m68k/coldfire/mcf548x-devices.c
@@ -0,0 +1,94 @@
+/*
+ * arch/m68k/coldfire/mcf5445x-devices.c
+ *
+ * Coldfire M5445x Platform Device Configuration
+ *
+ * Based on the Freescale MXC devices.c
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Kurt Mahan <kmahan@freescale.com>
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <linux/fsl_devices.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+static struct resource coldfire_i2c_resources[] = {
+ [0] = { /* I/O */
+ .start = MCF_MBAR + 0x008F00,
+ .end = MCF_MBAR + 0x008F20,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = { /* IRQ */
+ .start = 40,
+ .end = 40,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device coldfire_i2c_device = {
+ .name = "MCF548X-i2c",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(coldfire_i2c_resources),
+ .resource = coldfire_i2c_resources,
+};
+
+static struct resource coldfire_sec_resources[] = {
+ [0] = { /* I/O */
+ .start = MCF_MBAR + 0x00020000,
+ .end = MCF_MBAR + 0x00033000,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = { /* IRQ */
+ .start = ISC_SEC,
+ .end = ISC_SEC,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device coldfire_sec_device = {
+ .name = "fsl-sec1",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(coldfire_sec_resources),
+ .resource = coldfire_sec_resources,
+};
+
+#if defined(CONFIG_MTD_PHYSMAP)
+static struct physmap_flash_data mcf5485_flash_data = {
+ .width = 2,
+};
+
+static struct resource mcf5485_flash_resource = {
+ .start = 0xf8000000,
+ .end = 0xf80fffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device mcf5485_flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &mcf5485_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &mcf5485_flash_resource,
+};
+#endif
+
+static int __init mcf5485_init_devices(void)
+{
+ printk(KERN_INFO "MCF5485x INIT_DEVICES\n");
+
+ platform_device_register(&coldfire_i2c_device);
+ platform_device_register(&coldfire_sec_device);
+/*#if defined(CONFIG_MTD_PHYSMAP)
+ platform_device_register(&mcf5485_flash_device);
+#endif*/
+ return 0;
+}
+arch_initcall(mcf5485_init_devices);
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -4,6 +4,18 @@
menu "I2C Hardware Bus support"
+config I2C_MCF548x
+ tristate "I2C MCF547x/548x interfaces"
+ depends on I2C
+ help
+ This allows you to use the I2C adapters found on the Freescale
+ MCF547x/548x microcontrollers.
+ Say Y if you own an I2C adapter belonging to this class and then say
+ Y to the specific driver for you adapter below.
+
+ This support is also available as a module. If so, the module
+ will be called i2c-algo-mcf.
+
config I2C_ALI1535
tristate "ALI 1535"
depends on PCI
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
+obj-$(CONFIG_I2C_MCF548x) += i2c-mcf548x.o
ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
EXTRA_CFLAGS += -DDEBUG
--- /dev/null
+++ b/drivers/i2c/busses/i2c-algo-mcf.h
@@ -0,0 +1,23 @@
+#ifndef I2C_ALGO_MCF_H
+#define I2C_ALGO_MCF_H 1
+
+/* --- Defines for pcf-adapters --------------------------------------- */
+#include <linux/i2c.h>
+
+struct i2c_algo_mcf_data {
+ void *data; /* private data for lolevel routines */
+ void (*setmcf) (void *data, int ctl, int val);
+ int (*getmcf) (void *data, int ctl);
+ int (*getown) (void *data);
+ int (*getclock) (void *data);
+ void (*waitforpin) (void);
+ /* local settings */
+ int udelay;
+ int mdelay;
+ int timeout;
+};
+
+int i2c_mcf_add_bus(struct i2c_adapter *);
+int i2c_mcf_del_bus(struct i2c_adapter *);
+
+#endif /* I2C_ALGO_MCF_H */
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mcf548x.c
@@ -0,0 +1,573 @@
+/*
+ * Performance and stability improvements: (C) Copyright 2008,
+ * Adrian Cox <adrian@humboldt.co.uk>
+ * ColdFire 547x/548x I2C master support
+ * Shrek Wu (b16972@freescale.com )moved the code driver/i2c/alg/mcf.c
+ * into driver/i2c/busses.And changed the driver to a platform driver.
+ */
+#include <linux/i2c.h>
+#include "i2c-algo-mcf.h"
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+
+#include <asm/coldfire.h>
+#include <asm/m5485sim.h>
+#include <asm/m5485i2c.h>
+
+#define get_clock(adap) (clock)
+#define get_own(adap) (own)
+
+static int clock = 0x3b; /*50000 / 1024 ~ 49 KHz*/
+module_param(clock, int, 0);
+MODULE_PARM_DESC(clock,
+ "Set I2C clock in kHz: 400=fast mode (default == 49khz)");
+
+static int own = 0x78;
+module_param(own, int, 0);
+MODULE_PARM_DESC(clock, "Set I2C Master controller address(0x78)");
+
+static struct i2c_algo_mcf_data i2c_mcf_board_data = {
+ .timeout = 10000,
+};
+
+static struct i2c_adapter i2c_mcf_board_adapter = {
+ .owner = THIS_MODULE,
+ .name = "MCF5485 adapter",
+ .id = I2C_HW_MPC107,
+ .algo_data = &i2c_mcf_board_data,
+ .class = I2C_CLASS_HWMON,
+ .timeout = 1,
+ .retries = 1
+};
+/*
+ * static void i2c_start()
+ *
+ * Generates START signal
+ */
+static void
+i2c_start(
+ struct i2c_algo_mcf_data *adap
+) {
+ MCF_I2CR |= MCF_I2CR_MSTA;
+}
+
+
+/*
+ * static void i2c_stop()
+ *
+ * Generates STOP signal
+ */
+static void
+i2c_stop(
+ struct i2c_algo_mcf_data *adap
+) {
+ MCF_I2CR &= ~MCF_I2CR_MSTA;
+}
+
+static int
+i2c_getack(
+ struct i2c_algo_mcf_data *adap
+) {
+ return !(MCF_I2SR & MCF_I2SR_RXAK);
+}
+
+/*
+ * static void i2c_repstart()
+ *
+ * Generates repeated start signal (without STOP while mastering the bus)
+ */
+static void
+i2c_repstart(
+ struct i2c_algo_mcf_data *adap
+) {
+ MCF_I2CR |= MCF_I2CR_RSTA;
+ MCF_I2CR |= MCF_I2CR_MTX;
+}
+
+
+/*
+ * static void wait_for_bb()
+ *
+ * Wait for bus idle state
+ */
+static int
+wait_for_bb(
+ struct i2c_algo_mcf_data *adap
+) {
+ int i;
+ for (i = 0; i < adap->timeout; i++) {
+ if (!(MCF_I2SR & MCF_I2SR_IBB))
+ return 0;
+ udelay(10);
+ }
+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
+ return -ETIMEDOUT;
+}
+
+/*
+ * static void wait_for_not_bb()
+ *
+ * Wait for bus busy state
+ */
+static int
+wait_for_not_bb(
+ struct i2c_algo_mcf_data *adap
+) {
+ int i;
+ for (i = 0; i < adap->timeout; i++) {
+ if (MCF_I2SR & MCF_I2SR_IBB)
+ return 0;
+ udelay(10);
+ }
+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
+ return -ETIMEDOUT;
+}
+
+/*
+ * static void wait_xfer_done()
+ *
+ * Wait for transfer to complete
+ */
+static int
+wait_xfer_done(
+ struct i2c_algo_mcf_data *adap
+) {
+ int i;
+
+ for (i = 0; i < adap->timeout; i++) {
+ if (MCF_I2SR & MCF_I2SR_IIF) {
+ MCF_I2SR &= ~MCF_I2SR_IIF;
+ return 0;
+ }
+ udelay(1);
+ }
+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
+ return -ETIMEDOUT;
+}
+
+
+/*
+ * static void i2c_set_addr()
+ *
+ * Sets slave address to communicate
+ */
+static int
+i2c_set_addr(
+ struct i2c_algo_mcf_data *adap,
+ struct i2c_msg *msg,
+ int retries
+) {
+ unsigned short flags = msg->flags;
+ unsigned char addr;
+
+ if ((flags & I2C_M_TEN)) {
+ /* 10 bit address not supported yet */
+ return -EIO;
+ } else {
+ /* normal 7bit address */
+ addr = (msg->addr << 1);
+ if (flags & I2C_M_RD)
+ addr |= 1;
+ if (flags & I2C_M_REV_DIR_ADDR)
+ addr ^= 1;
+
+ MCF_I2DR = addr;
+ }
+ return 0;
+}
+
+
+/*
+ * static void mcf_i2c_init()
+ *
+ * Perform ColdFire i2c initialization
+ */
+static void
+mcf_i2c_init(struct i2c_algo_mcf_data *adap)
+{
+ u8 dummy;
+ /* Setup GPIO lines */
+ MCF_PAR_FECI2CIRQ |= MCF_PAR_SDA;
+ MCF_PAR_FECI2CIRQ |= MCF_PAR_SCL;
+
+ /* Ensure slaves are in idle state */
+ if (MCF_I2SR & MCF_I2SR_IBB) {
+ MCF_I2ICR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2CR = 0x0A;
+ dummy = MCF_I2DR;
+ MCF_I2SR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2ICR = 0x01;
+ }
+
+ /* setup SCL clock */
+ MCF_I2FDR = get_clock(adap);
+
+ /* set slave address */
+ MCF_I2AR = get_own(adap);
+
+ /* enable I2C module */
+ MCF_I2CR = MCF_I2CR_IEN;
+}
+
+static int i2c_outb(
+ struct i2c_adapter *i2c_adap,
+ char c
+) {
+
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
+ int timeout;
+ /* Put data to be sent */
+ MCF_I2DR = c;
+ /* Wait for xfer completed*/
+ timeout = wait_xfer_done(adap);
+ if (timeout) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ printk(KERN_ERR "i2c-algo-mcf: %s i2c_write: "
+ "error - timeout.\n", i2c_adap->name);
+ return -EREMOTEIO; /* got a better one ?? */
+ }
+
+ return 0;
+}
+
+
+/*
+ * static void mcf_sendbytes()
+ *
+ * Perform tx data transfer
+ */
+static int
+mcf_sendbytes(
+ struct i2c_adapter *i2c_adap,
+ const char *buf,
+ int count, int last
+) {
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
+ int ret, i;
+
+ /* Set master TX mode */
+ MCF_I2CR |= MCF_I2CR_MTX;
+
+ for (i = 0; i < count; ++i) {
+ printk(KERN_DEBUG "i2c-algo-mcf: %s i2c_write: writing %2.2X\n",
+ i2c_adap->name, buf[i]&0xff);
+ ret = i2c_outb(i2c_adap, buf[i]);
+ if (ret < 0)
+ return ret;
+ }
+ if (last) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ } else {
+ i2c_repstart(adap);
+ }
+
+ return (i);
+}
+
+
+/*
+ * static void mcf_readbytes()
+ *
+ * Perform rx data transfer
+ */
+static int
+mcf_readbytes(
+ struct i2c_adapter *i2c_adap,
+ char *buf,
+ int count, int last
+) {
+ int i;
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
+ u8 dummy;
+
+ /* Set master RX mode */
+ MCF_I2CR &= ~MCF_I2CR_MTX;
+ MCF_I2CR &= ~MCF_I2CR_TXAK;
+ dummy = MCF_I2DR;
+
+ for (i = 0; i < count-1; i++) {
+ if (wait_xfer_done(adap)) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ printk(KERN_DEBUG
+ "i2c-algo-mcf: mcf_readbytes timed out.\n");
+ return (-1);
+ }
+
+ /* store next data byte */
+ buf[i] = MCF_I2DR;
+ }
+
+ if (wait_xfer_done(adap)) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ printk(KERN_DEBUG "i2c-algo-mcf: mcf_readbytes timed out.\n");
+ return (-1);
+ }
+
+ /* Disable acknowlege (set I2CR.TXAK) */
+ MCF_I2CR |= MCF_I2CR_TXAK;
+ buf[i] = MCF_I2DR;
+ if (wait_xfer_done(adap)) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ printk(KERN_DEBUG "i2c-algo-mcf: mcf_readbytes timed out.\n");
+ return (-1);
+ }
+
+ if (last) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ } else {
+ i2c_repstart(adap);
+ }
+
+ return (i+1);
+}
+
+
+/*
+ * static void mcf_xfer()
+ *
+ * Perform master data I/O transfer
+ */
+static int
+mcf_xfer(
+ struct i2c_adapter *i2c_adap,
+ struct i2c_msg *msgs,
+ int num
+) {
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
+ struct i2c_msg *pmsg;
+ int i;
+ int ret = 0, timeout;
+
+ /* Skip own address */
+ if (get_own(adap) == (msgs[0].addr << 1))
+ return -EIO;
+
+ /* Ensure slaves are in idle state */
+ if (MCF_I2SR & MCF_I2SR_IBB) {
+ MCF_I2ICR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2CR = 0x0A;
+ timeout = MCF_I2DR;
+ MCF_I2SR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2ICR = 0x01;
+ }
+ /* setup SCL clock */
+ MCF_I2FDR = get_clock(adap);
+ /* set slave address */
+ MCF_I2AR = get_own(adap);
+ /* enable I2C module */
+ MCF_I2CR = MCF_I2CR_IEN;
+
+ MCF_I2CR |= MCF_I2CR_TXAK;
+
+ /* Check for bus busy */
+ wait_for_bb(adap);
+
+ for (i = 0; ret >= 0 && i < num; i++) {
+ pmsg = &msgs[i];
+
+ printk(KERN_DEBUG "i2c-algo-mcf: Doing %s %d bytes "
+ "to 0x%02x - %d of %d messages\n",
+ pmsg->flags & I2C_M_RD ? "read" : "write",
+ pmsg->len, pmsg->addr, i + 1, num);
+
+ /* Send START */
+ if (i == 0)
+ i2c_start(adap);
+
+ /* Wait for Bus Busy */
+ wait_for_not_bb(adap);
+
+ MCF_I2CR |= MCF_I2CR_MTX;
+
+ ret = i2c_set_addr(adap, pmsg, i2c_adap->retries);
+ if (ret < 0)
+ return ret;
+
+ /* Wait for address transfer completion */
+ wait_xfer_done(adap);
+
+ /* Check for ACK */
+ if (!i2c_getack(adap)) {
+ i2c_stop(adap);
+ wait_for_bb(adap);
+ printk(KERN_DEBUG "i2c-algo-mcf: No ack after "
+ "send address in mcf_xfer\n");
+ return (-EREMOTEIO);
+ }
+
+ printk(KERN_DEBUG "i2c-algo-mcf: Msg %d, "
+ "addr = 0x%x, flags = 0x%x, len = %d\n",
+ i, msgs[i].addr, msgs[i].flags, msgs[i].len);
+ /* Read */
+ if (pmsg->flags & I2C_M_RD) {
+ /* read bytes into buffer*/
+ ret = mcf_readbytes(i2c_adap, pmsg->buf, pmsg->len,
+ (i + 1 == num));
+
+ if (ret != pmsg->len) {
+ printk(KERN_DEBUG "i2c-algo-mcf: fail: "
+ "only read %d bytes.\n", ret);
+ } else {
+ printk(KERN_DEBUG "i2c-algo-mcf: "
+ "read %d bytes.\n", ret);
+ }
+ } else {
+ /* write bytes into buffer*/
+ ret = mcf_sendbytes(i2c_adap, pmsg->buf, pmsg->len,
+ (i + 1 == num));
+ if (ret != pmsg->len) {
+ printk(KERN_DEBUG "i2c-algo-mcf: fail: "
+ "only wrote %d bytes.\n", ret);
+ } else {
+ printk(KERN_DEBUG "i2c-algo-mcf: wrote"
+ "%d bytes.\n", ret);
+ }
+ }
+ }
+
+ /* Disable I2C module */
+ MCF_I2CR = 0;
+ return (i);
+}
+
+
+/*
+ * static void mcf_func()
+ *
+ * Return algorithm funtionality
+ */
+static u32
+mcf_func(
+ struct i2c_adapter *i2c_adap
+) {
+ return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
+}
+
+/*
+ * ColdFire bus algorithm callbacks
+ */
+static struct i2c_algorithm mcf_algo = {
+ .master_xfer = mcf_xfer,
+ .functionality = mcf_func,
+};
+
+/***********************************************************/
+struct coldfire_i2c {
+ void __iomem *base;
+ struct resource *irqarea;
+ struct resource *ioarea;
+ u32 irq;
+ struct i2c_adapter *adap;
+ u32 flags;
+};
+
+/*
+ * registering functions to load algorithms at runtime
+ */
+int i2c_mcf_add_bus(struct i2c_adapter *adap)
+{
+ struct i2c_algo_mcf_data *mcf_adap = adap->algo_data;
+
+ /*adap->id |= mcf_algo.id;*/
+ adap->algo = &mcf_algo;
+ adap->timeout = 100;
+
+ mcf_i2c_init(mcf_adap);
+
+#ifdef MODULE
+ MOD_INC_USE_COUNT;
+#endif
+
+ i2c_add_adapter(adap);
+
+ return 0;
+}
+
+static int mcf548x_i2c_probe(struct platform_device *pdev)
+{
+ struct coldfire_i2c *i2c;
+ int rc = 0;
+
+ /************************************************************/
+ i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
+ if (!i2c) {
+ printk(KERN_ERR "%s kzalloc coldfire_i2c faile\n",
+ __FUNCTION__);
+ return -ENOMEM;
+ }
+ /****************************************************************/
+ platform_set_drvdata(pdev, i2c);
+
+ i2c->adap = &i2c_mcf_board_adapter;
+ i2c->adap->dev.parent = &pdev->dev;
+ rc = i2c_mcf_add_bus(i2c->adap);
+ if (rc < 0) {
+ printk(KERN_ERR "%s - failed to add adapter\n", __FUNCTION__);
+ rc = -ENODEV;
+ goto fail_add;
+ }
+
+ printk(KERN_INFO "i2c-algo-mcf.o: I2C ColdFire algorithm"
+ " module is loaded.\n");
+ return rc;
+
+fail_add:
+ kfree(i2c);
+ return rc;
+};
+
+static int mcf548x_i2c_remove(struct platform_device *pdev)
+{
+ struct coldfire_i2c *i2c = platform_get_drvdata(pdev);
+
+ i2c_del_adapter(i2c->adap);
+ platform_set_drvdata(pdev, NULL);
+ iounmap(i2c->base);
+ kfree(i2c);
+ return 0;
+};
+
+/* Structure for a device driver */
+static struct platform_driver mcf548x_i2c_driver = {
+ .probe = mcf548x_i2c_probe,
+ .remove = mcf548x_i2c_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "MCF548X-i2c",
+ },
+};
+
+static int __init coldfire_i2c_init(void)
+{
+ return platform_driver_register(&mcf548x_i2c_driver);
+}
+
+static void __exit coldfire_i2c_exit(void)
+{
+ platform_driver_unregister(&mcf548x_i2c_driver);
+}
+
+module_init(coldfire_i2c_init);
+module_exit(coldfire_i2c_exit);
+
+MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
+MODULE_DESCRIPTION
+ ("I2C-Bus adapter for MCF547x and MCF548x processors");
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/include/asm-m68k/m5485i2c.h
@@ -0,0 +1,45 @@
+/*
+ * m5485i2c.h -- ColdFire 547x/548x i2c controller support.
+ */
+#ifndef M548X_I2C_H
+#define M548X_I2C_H
+
+/* Register read/write macros */
+#define MCF_I2AR MCF_REG08(0x008F00) /* I2C Address */
+#define MCF_I2FDR MCF_REG08(0x008F04) /* I2C Frequency Divider */
+#define MCF_I2CR MCF_REG08(0x008F08) /* I2C Control */
+#define MCF_I2SR MCF_REG08(0x008F0C) /* I2C Status */
+#define MCF_I2DR MCF_REG08(0x008F10) /* I2C Data I/O */
+#define MCF_I2ICR MCF_REG08(0x008F20) /* I2C Interrupt Control */
+
+/* Bit definitions and macros for MCF_I2C_I2AR */
+#define MCF_I2AR_ADR(x) (((x)&0x7F)<<1)
+
+/* Bit definitions and macros for MCF_I2C_I2FDR */
+#define MCF_I2FDR_IC(x) (((x)&0x3F)<<0)
+
+/* Bit definitions and macros for MCF_I2C_I2CR */
+#define MCF_I2CR_RSTA (0x04)
+#define MCF_I2CR_TXAK (0x08)
+#define MCF_I2CR_MTX (0x10)
+#define MCF_I2CR_MSTA (0x20)
+#define MCF_I2CR_IIEN (0x40)
+#define MCF_I2CR_IEN (0x80)
+
+/* Bit definitions and macros for MCF_I2C_I2SR */
+#define MCF_I2SR_RXAK (0x01)
+#define MCF_I2SR_IIF (0x02)
+#define MCF_I2SR_SRW (0x04)
+#define MCF_I2SR_IAL (0x10)
+#define MCF_I2SR_IBB (0x20)
+#define MCF_I2SR_IAAS (0x40)
+#define MCF_I2SR_ICF (0x80)
+
+/* Bit definitions and macros for MCF_I2C_I2ICR */
+#define MCF_I2ICR_IE (0x01)
+#define MCF_I2ICR_RE (0x02)
+#define MCF_I2ICR_TE (0x04)
+#define MCF_I2ICR_BNBE (0x08)
+
+/********************************************************************/
+#endif

View File

@ -1,127 +0,0 @@
From 1353cd9749377dbcc8290dab5c098deec66fb956 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 15 May 2008 13:24:58 -0600
Subject: [PATCH] Add RTC RV5C387A driver for MCF547x and MCF548x.
LTIBName: m547x-8x-rtc-rv5c387a
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: Shrek Wu <b16972@freescale.com>
---
drivers/rtc/rtc-rs5c372.c | 67 +++++++++++++++++++++++++++++++++++++++++---
1 files changed, 62 insertions(+), 5 deletions(-)
--- a/drivers/rtc/rtc-rs5c372.c
+++ b/drivers/rtc/rtc-rs5c372.c
@@ -15,7 +15,6 @@
#define DRV_VERSION "0.5"
-
/*
* Ricoh has a family of I2C based RTCs, which differ only slightly from
* each other. Differences center on pinout (e.g. how many interrupts,
@@ -60,6 +59,15 @@
/* to read (style 1) or write registers starting at R */
#define RS5C_ADDR(R) (((R) << 4) | 0)
+#ifdef CONFIG_M547X_8X
+#define DRV_NAME "rv5c387a"
+/* i2c configuration */
+#define RV5C387_I2C_ADDR 0x32
+static unsigned short normal_i2c[] = {
+ RV5C387_I2C_ADDR, I2C_CLIENT_END
+};
+I2C_CLIENT_INSMOD; /* defines addr_data */
+#endif
enum rtc_type {
rtc_undef = 0,
@@ -506,14 +514,14 @@ static int rs5c372_probe(struct i2c_clie
err = -ENODEV;
goto exit;
}
-
- if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) {
+ rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL);
+ if (!rs5c372) {
err = -ENOMEM;
goto exit;
}
/* we read registers 0x0f then 0x00-0x0f; skip the first one */
- rs5c372->regs=&rs5c372->buf[1];
+ rs5c372->regs = &rs5c372->buf[1];
rs5c372->client = client;
i2c_set_clientdata(client, rs5c372);
@@ -605,7 +613,7 @@ static int rs5c372_probe(struct i2c_clie
case rtc_rv5c386: s = "rv5c386"; break;
case rtc_rv5c387a: s = "rv5c387a"; break;
default: s = "chip"; break;
- }; s;}),
+ }; s; }),
rs5c372->time24 ? "24hr" : "am/pm"
);
@@ -645,12 +653,61 @@ static int rs5c372_remove(struct i2c_cli
return 0;
}
+#ifdef CONFIG_M547X_8X
+static int rv5c387_probe(struct i2c_adapter *adapter, int addr, int kind)
+{
+ int rc = 0;
+ struct i2c_client *new_client = NULL;
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
+ rc = -ENODEV;
+ printk(KERN_DEBUG "%s i2c_check_functionality\n", __FUNCTION__);
+ goto failout;
+ }
+
+ new_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
+ if (new_client == NULL) {
+ rc = -ENOMEM;
+ printk(KERN_DEBUG "%s kzalloc new_client\n", __FUNCTION__);
+ goto failout;
+ }
+
+ new_client->addr = addr;
+ new_client->adapter = adapter;
+ new_client->driver = &rs5c372_driver;
+ new_client->flags = 0;
+ strcpy(new_client->name, DRV_NAME);
+
+ rc = i2c_attach_client(new_client);
+ if (rc < 0) {
+ printk(KERN_DEBUG "%s i2c_attach_client\n", __FUNCTION__);
+ goto failout;
+ }
+
+ rs5c372_probe(new_client);
+ return 0;
+failout:
+ kfree(new_client);
+ return rc;
+}
+
+static int
+rv5c387_attach_adapter(struct i2c_adapter *adapter)
+{
+ return i2c_probe(adapter, &addr_data, rv5c387_probe);
+}
+#endif
+
static struct i2c_driver rs5c372_driver = {
.driver = {
.name = "rtc-rs5c372",
},
+#ifdef CONFIG_M547X_8X
+ .attach_adapter = &rv5c387_attach_adapter,
+#else
.probe = rs5c372_probe,
.remove = rs5c372_remove,
+#endif
};
static __init int rs5c372_init(void)

View File

@ -1,55 +0,0 @@
From a2360b8ebb8b2b0d55f8aea3fdce51bce9b57b10 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 15 May 2008 15:48:59 -0600
Subject: [PATCH] Add mm arg to pte/pmd/pud/pgd_free and add pmd_pgtable macro.
Add mm argument to pte/pmd/pud/pgd_free as per commit
5e5419734c8719cbc01af959ad9c0844002c0df5.
LTIBName: mcfv4e-add-mm-args
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/cf_pgalloc.h | 10 ++++++----
1 files changed, 6 insertions(+), 4 deletions(-)
--- a/include/asm-m68k/cf_pgalloc.h
+++ b/include/asm-m68k/cf_pgalloc.h
@@ -6,7 +6,7 @@
#include <asm/cf_tlbflush.h>
#include <asm/cf_cacheflush.h>
-extern inline void pte_free_kernel(pte_t *pte)
+extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
{
free_page((unsigned long) pte);
}
@@ -40,6 +40,8 @@ extern inline pmd_t *pmd_alloc_kernel(pg
#define pmd_populate_kernel(mm, pmd, pte) (pmd_val(*pmd) = (unsigned long)(pte))
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *page)
{
__free_page(page);
@@ -68,7 +70,7 @@ static inline struct page *pte_alloc_one
return page;
}
-extern inline void pte_free(struct page *page)
+extern inline void pte_free(struct mm_struct *mm, struct page *page)
{
__free_page(page);
}
@@ -77,9 +79,9 @@ extern inline void pte_free(struct page
* In our implementation, each pgd entry contains 1 pmd that is never allocated
* or freed. pgd_present is always 1, so this should never be called. -NL
*/
-#define pmd_free(pmd) BUG()
+#define pmd_free(mm, pmd) BUG()
-extern inline void pgd_free(pgd_t *pgd)
+extern inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
{
free_page((unsigned long) pgd);
}

View File

@ -1,43 +0,0 @@
From a64bac5fc75aa2872a8abe54a9f9aaa0fce31588 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 22 May 2008 09:50:31 -0600
Subject: [PATCH] Add elf relocation types for TLS/NPTL.
These relocations are from the draft TLS/NPTL ABI document v0.2
by Joseph Myers of CodeSourcery.
LTIBName: mcfv4e-tlsnptl-elf-reloc
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/elf.h | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
--- a/include/asm-m68k/elf.h
+++ b/include/asm-m68k/elf.h
@@ -34,6 +34,26 @@
#define R_68K_GLOB_DAT 20
#define R_68K_JMP_SLOT 21
#define R_68K_RELATIVE 22
+/* TLS static relocations */
+#define R_68K_TLS_GD32 25
+#define R_68K_TLS_GD16 26
+#define R_68K_TLS_GD8 27
+#define R_68K_TLS_LDM32 28
+#define R_68K_TLS_LDM16 29
+#define R_68K_TLS_LDM8 30
+#define R_68K_TLS_LDO32 31
+#define R_68K_TLS_LDO16 32
+#define R_68K_TLS_LDO8 33
+#define R_68K_TLS_IE32 34
+#define R_68K_TLS_IE16 35
+#define R_68K_TLS_IE8 36
+#define R_68K_TLS_LE32 37
+#define R_68K_TLS_LE16 38
+#define R_68K_TLS_LE8 39
+/* TLS dynamic relocations */
+#define R_68K_TLS_DTPMOD32 40
+#define R_68K_TLS_DTPREL32 41
+#define R_68K_TLS_TPREL32 42
typedef unsigned long elf_greg_t;

View File

@ -1,79 +0,0 @@
From a05af27aec00eacf533ff111ba8eb3dec328d9af Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 22 May 2008 11:20:53 -0600
Subject: [PATCH] Initial vDSO header changes.
LTIBName: mcfv4e-vdso-headers
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/auxvec.h | 9 +++++++++
include/asm-m68k/elf.h | 31 +++++++++++++++++++++++++++++++
include/asm-m68k/page.h | 5 +++++
3 files changed, 45 insertions(+), 0 deletions(-)
--- a/include/asm-m68k/auxvec.h
+++ b/include/asm-m68k/auxvec.h
@@ -1,4 +1,13 @@
#ifndef __ASMm68k_AUXVEC_H
#define __ASMm68k_AUXVEC_H
+/*
+ * Architecture-neutral AT_ values in 0-17, leave some room
+ * for more of them.
+ */
+
+#ifdef CONFIG_VSYSCALL
+/* Entry point to the vsyscall page */
+#define AT_SYSINFO_EHDR 33
+#endif
#endif
--- a/include/asm-m68k/elf.h
+++ b/include/asm-m68k/elf.h
@@ -136,4 +136,35 @@ typedef struct user_m68kfp_struct elf_fp
#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
+/*
+ * VDSO
+ */
+#ifdef CONFIG_VSYSCALL
+extern unsigned int vdso_enabled;
+
+#define VDSO_BASE ((unsigned long)current->mm->context.vdso)
+#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x))
+
+#define VSYSCALL_AUX_ENT \
+ if (vdso_enabled) \
+ NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);
+
+/* additional pages */
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+
+struct linux_binprm;
+extern int arch_setup_additional_pages(struct linux_binprm *bprm,
+ int executable_stack);
+
+#else
+/* no VSYSCALL_AUX_ENT */
+#define VSYSCALL_AUX_ENT
+#endif
+
+#define ARCH_DLINFO \
+do { \
+ /* vsyscall entry */ \
+ VSYSCALL_AUX_ENT; \
+} while (0);
+
#endif
--- a/include/asm-m68k/page.h
+++ b/include/asm-m68k/page.h
@@ -252,4 +252,9 @@ static inline __attribute_const__ int __
#include <asm-generic/page.h>
+#ifdef CONFIG_VSYSCALL
+/* vDSO support */
+#define __HAVE_ARCH_GATE_AREA
+#endif
+
#endif /* _M68K_PAGE_H */

View File

@ -1,152 +0,0 @@
From 961a1f1ccbb2121a4e650cd64ca1f5c15b232e18 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 29 May 2008 22:03:08 -0600
Subject: [PATCH] Update M547x/M548x memory map.
- Move internal memory
0xF0000000 MBAR
0xF1000000 MMUBAR
0xF3000000 RAMBAR0
0xF3001000 RAMBAR1
- Move KMAP area
0xD0000000 -> 0xDFFFFFFF
- Update pagefault code for KMAP area
LTIBName: m547x-8x-move-memmap
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 2 +-
arch/m68k/mm/cf-mmu.c | 20 ++++++++++----------
arch/m68k/mm/kmap.c | 18 +++++++++++++++---
include/asm-m68k/coldfire.h | 8 ++++----
include/asm-m68k/pgtable.h | 4 ++--
5 files changed, 32 insertions(+), 20 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -87,7 +87,7 @@
#else
#if defined(CONFIG_M54455)
#elif defined(CONFIG_M547X_8X)
-#define ACR0_DEFAULT #0xE000C040 /* ACR0 default value */
+#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
#define ACR3_DEFAULT #0x000FA008 /* ACR3 default value */
--- a/arch/m68k/mm/cf-mmu.c
+++ b/arch/m68k/mm/cf-mmu.c
@@ -35,11 +35,9 @@
#include <asm/coldfire.h>
#include <asm/tlbflush.h>
-#if PAGE_OFFSET == CONFIG_SDRAM_BASE
-#define KERNRAM(x) ((x >= PAGE_OFFSET) && (x < (PAGE_OFFSET + CONFIG_SDRAM_SIZE)))
-#else
-#define KERNRAM(x) (x >= PAGE_OFFSET)
-#endif
+#define KMAPAREA(x) ((x >= KMAP_START) && ( x < KMAP_END))
+
+#undef DEBUG
mm_context_t next_mmu_context;
unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
@@ -162,7 +160,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
mmuar = ( dtlb ) ? regs->mmuar
: regs->pc + (extension_word * sizeof(long));
- mm = (!user_mode(regs) && KERNRAM(mmuar)) ? &init_mm : current->mm;
+ mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
if (!mm) {
local_irq_restore(flags);
@@ -181,7 +179,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
return (-1);
}
- pte = (KERNRAM(mmuar)) ? pte_offset_kernel(pmd, mmuar)
+ pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
: pte_offset_map(pmd, mmuar);
if (pte_none(*pte) || !pte_present(*pte)) {
local_irq_restore(flags);
@@ -198,7 +196,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
set_pte(pte, pte_mkyoung(*pte));
asid = mm->context & 0xff;
- if (!pte_dirty(*pte) && !KERNRAM(mmuar))
+ if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
set_pte(pte, pte_wrprotect(*pte));
*MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
@@ -216,8 +214,10 @@ int cf_tlb_miss(struct pt_regs *regs, in
asm("nop");
- /*printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
- (pte_val(*pte) & PAGE_MASK));*/
+#ifdef DEBUG
+ printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
+ (pte_val(*pte) & PAGE_MASK));
+#endif
local_irq_restore(flags);
return (0);
}
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -135,10 +135,22 @@ void __iomem *__ioremap(unsigned long ph
#ifdef CONFIG_M54455
if (physaddr >= 0xf0000000) {
- /* short circuit mappings for xf0000000 */
-#ifdef DEBUG
- printk(KERN_INFO "ioremap: short circuiting 0x%lx mapping\n", physaddr);
+ /*
+ * On the M5445x processors an ACR is setup to map
+ * the 0xF0000000 range into kernel memory as
+ * non-cacheable.
+ */
+ return (void __iomem *)physaddr;
+ }
#endif
+
+#ifdef CONFIG_M547X_8X
+ if (physaddr >= 0xf0000000) {
+ /*
+ * On the M547x/M548x processors an ACR is setup to map
+ * the 0xF0000000 range into kernel memory as
+ * non-cacheable.
+ */
return (void __iomem *)physaddr;
}
#endif
--- a/include/asm-m68k/coldfire.h
+++ b/include/asm-m68k/coldfire.h
@@ -6,10 +6,10 @@
#define MCF_RAMBAR1 0x40000000
#define MCF_SRAM 0x80000000
#elif defined(CONFIG_M547X_8X)
-#define MCF_MBAR 0xE0000000
-#define MCF_MMUBAR 0xE1000000
-#define MCF_RAMBAR0 0xE3000000
-#define MCF_RAMBAR1 0xE3001000
+#define MCF_MBAR 0xF0000000
+#define MCF_MMUBAR 0xF1000000
+#define MCF_RAMBAR0 0xF3000000
+#define MCF_RAMBAR1 0xF3001000
#endif
#define MCF_CLK CONFIG_MCFCLK
--- a/include/asm-m68k/pgtable.h
+++ b/include/asm-m68k/pgtable.h
@@ -73,8 +73,8 @@
#define KMAP_START 0x0DC00000
#define KMAP_END 0x0E000000
#elif defined(CONFIG_COLDFIRE)
-#define KMAP_START 0xe0000000
-#define KMAP_END 0xf0000000
+#define KMAP_START 0xd0000000
+#define KMAP_END 0xe0000000
#else
#define KMAP_START 0xd0000000
#define KMAP_END 0xf0000000

View File

@ -1,791 +0,0 @@
From 778c1668df4a4c634fae8ef99a05120121cce838 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 18 Jun 2008 15:17:31 -0600
Subject: [PATCH] Convert CONFIG_M54455 to CONFIG_M5445X for clarity.
LTIBName: m5445x-rename-config
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/Kconfig | 50 ++++++++++++++++++++++++++++---------
arch/m68k/Makefile | 2 +-
arch/m68k/coldfire/Makefile | 2 +-
arch/m68k/coldfire/config.c | 33 +++++++++++++++----------
arch/m68k/coldfire/head.S | 23 ++++++++++-------
arch/m68k/coldfire/ints.c | 6 ++--
arch/m68k/kernel/dma.c | 4 +-
arch/m68k/kernel/setup.c | 2 +-
arch/m68k/mm/kmap.c | 2 +-
drivers/crypto/Kconfig | 12 ++++----
drivers/crypto/mcfcau-aes.c | 2 +-
drivers/crypto/mcfcau-des.c | 2 +-
drivers/crypto/mcfcau-md5.c | 2 +-
drivers/crypto/mcfcau-sha1.c | 2 +-
drivers/crypto/mcfcau.c | 2 +-
drivers/crypto/mcfcau.h | 2 +-
drivers/net/Kconfig | 2 +-
drivers/net/fec.c | 10 ++++----
drivers/net/fec.h | 2 +-
drivers/serial/mcfserial.c | 8 +++---
drivers/spi/coldfire_edma.c | 4 +-
drivers/spi/spi_coldfire.c | 2 +-
drivers/spi/ssi_audio.c | 2 +-
include/asm-m68k/cfcache.h | 2 +-
include/asm-m68k/coldfire.h | 4 +-
include/asm-m68k/coldfire_edma.h | 4 +-
include/asm-m68k/mcfsim.h | 2 +-
include/asm-m68k/mcfuart.h | 2 +-
include/asm-m68k/page_offset.h | 2 +-
include/asm-m68k/setup.h | 2 +-
30 files changed, 116 insertions(+), 80 deletions(-)
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -56,7 +56,7 @@ config ARCH_MAY_HAVE_PC_FDC
default y
config NO_IOPORT
- def_bool !(M54455 || M547X_8X)
+ def_bool !(M5445X || M547X_8X)
config NO_DMA
def_bool SUN3
@@ -143,7 +143,7 @@ config CFV4E
config MCD_DMA
bool "ColdFire MCD DMA support"
- depends on CFV4E
+ depends on M547X_8X
default y
help
This enables support for the ColdFire 547x/548x family
@@ -177,7 +177,7 @@ config HADES
config PCI
bool
depends on HADES || M54455
- default y
+ default n
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
@@ -325,11 +325,34 @@ config M68060
If you anticipate running this kernel on a computer with a MC68060
processor, say Y. Otherwise, say N.
-config M54455
- bool "MCF54455 support"
+config M5445X
+ bool "MCF5445x support"
depends on COLDFIRE
help
- This option will add support for the MCF54455 processor with mmu.
+ This option will add support for the MCF5445 processor with mmu.
+
+config M54451
+ bool
+ depends on M5445X
+ default n
+
+config M54455
+ bool
+ depends on M5445X
+ default n
+
+choice
+ prompt "Model"
+ depends on M5445X
+ default M54451EVB
+ config M54451EVB
+ bool "M54451EVB"
+ select M54451
+ config M54455EVB
+ bool "M54455EVB"
+ select M54455
+endchoice
+
config M547X_8X
bool "MCF547x/MCF548x support"
@@ -393,7 +416,8 @@ endchoice
config MCFCLK
int
- default 266666666 if M54455
+ default 266666666 if M54455EVB
+ default 240000000 if M54451EVB
default 266000000 if M547X
default 200000000 if M548X
help
@@ -401,7 +425,7 @@ config MCFCLK
config MCF_USER_HALT
bool "Coldfire User Halt Enable"
- depends on M54455 || M547X_8X
+ depends on M5445X || M547X_8X
default n
help
Enables the HALT instruction in User Mode.
@@ -420,19 +444,21 @@ config MMU_CFV4E
config SDRAM_BASE
hex
depends on COLDFIRE
- default 0x40000000 if M54455
+ default 0x40000000 if M5445X
default 0x00000000 if M547X_8X
config SDRAM_SIZE
hex
depends on COLDFIRE
- default 0x0FFFFFFF if M54455
+ default 0x08000000 if M54451EVB
+ default 0x10000000 if M54455EVB
default 0x04000000 if M547X_8X
config NOR_FLASH_BASE
hex "NOR Flash Base Address"
- depends on M54455
- default 0x00000000
+ depends on COLDFIRE
+ default 0x00000000 if M54451EVB
+ default 0x00000000 if M54455EVB
config M68KFPU_EMU
bool "Math emulation support (EXPERIMENTAL)"
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -59,7 +59,7 @@ endif
endif
endif
-ifdef CONFIG_M54455
+ifdef CONFIG_M5445X
KBUILD_CFLAGS += -march=isac -mcpu=54455 -msoft-float -g
KBUILD_AFLAGS += -march=isac -mcpu=54455 -msoft-float
endif
--- a/arch/m68k/coldfire/Makefile
+++ b/arch/m68k/coldfire/Makefile
@@ -9,7 +9,7 @@ ifneq ($(strip $(CONFIG_USB) $(CONFIG_US
endif
obj-$(CONFIG_PCI) += pci.o mcf5445x-pci.o iomap.o
-obj-$(CONFIG_M54455) += mcf5445x-devices.o
+obj-$(CONFIG_M5445X) += mcf5445x-devices.o
obj-$(CONFIG_M547X_8X) += m547x_8x-devices.o
obj-$(CONFIG_M547X_8X) += mcf548x-devices.o
obj-$(CONFIG_MCD_DMA) += m547x_8x-dma.o
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -35,14 +35,14 @@
#include <asm/mcfsim.h>
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#define UBOOT_EXTRA_CLOCKS
#elif defined(CONFIG_M547X_8X)
#define UBOOT_PCI
#endif
#include <asm/bootinfo.h>
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
#include <asm/mcf5445x_intc.h>
#include <asm/mcf5445x_sdramc.h>
#include <asm/mcf5445x_fbcs.h>
@@ -132,8 +132,9 @@ int __init uboot_commandline(char *boota
/*
* This routine does things not done in the bootloader.
*/
-#if defined(CONFIG_M54455)
-#define DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+#if defined(CONFIG_M5445X)
+#define FOO_DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/redstripe/rootfs/ ip=172.27.155.51:172.27.155.1"
#elif defined(CONFIG_M547X_8X)
#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/rigo/rootfs/ ip=172.27.155.85:172.27.155.1"
#endif
@@ -143,14 +144,14 @@ asmlinkage void __init cf_early_init(voi
extern char _end;
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
SET_VBR((void *)MCF_RAMBAR1);
#elif defined(CONFIG_M547X_8X)
SET_VBR((void *)MCF_RAMBAR0);
#endif
/* Mask all interrupts */
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
MCF_INTC0_IMRL = 0xFFFFFFFF;
MCF_INTC0_IMRH = 0xFFFFFFFF;
MCF_INTC1_IMRL = 0xFFFFFFFF;
@@ -160,7 +161,7 @@ asmlinkage void __init cf_early_init(voi
MCF_IMRH = 0xFFFFFFFF;
#endif
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#if defined(CONFIG_NOR_FLASH_BASE)
MCF_FBCS_CSAR(1) = CONFIG_NOR_FLASH_BASE;
#else
@@ -171,9 +172,9 @@ asmlinkage void __init cf_early_init(voi
/* Init optional SDRAM chip select */
MCF_SDRAMC_SDCS(1) = (256*1024*1024) | 0x1B;
#endif
-#endif /* CONFIG_M54455 */
+#endif /* CONFIG_M5445X */
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
/* Setup SDRAM crossbar(XBS) priorities */
MCF_XBS_PRS2 = (MCF_XBS_PRS_M0(MCF_XBS_PRI_2) |
MCF_XBS_PRS_M1(MCF_XBS_PRI_3) |
@@ -193,6 +194,7 @@ asmlinkage void __init cf_early_init(voi
m68k_memory[m68k_num_memory].addr = CONFIG_SDRAM_BASE;
m68k_memory[m68k_num_memory++].size = CONFIG_SDRAM_SIZE;
+#if 0
if (!uboot_commandline(m68k_command_line)) {
#if defined(CONFIG_BOOTPARAM)
strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE-1);
@@ -200,6 +202,10 @@ asmlinkage void __init cf_early_init(voi
strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
#endif
}
+#endif
+/* JKM -- temporary! */
+strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
+/* JKM -- temporary! */
#if defined(CONFIG_BLK_DEV_INITRD)
/* add initrd image */
@@ -223,9 +229,10 @@ asmlinkage void __init cf_early_init(voi
/* Turn on caches via CACR, enable EUSP */
cacr_set(CACHE_INITIAL_MODE);
+
}
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
void settimericr(unsigned int timer, unsigned int level)
{
volatile unsigned char *icrp;
@@ -256,7 +263,7 @@ void __init coldfire_trap_init(void)
int i = 0;
e_vector *vectors;
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
vectors = (e_vector *)MCF_RAMBAR1;
#elif defined(CONFIG_M547X_8X)
vectors = (e_vector *)MCF_RAMBAR0;
@@ -281,7 +288,7 @@ void __init coldfire_trap_init(void)
vectors[32] = system_call;
}
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
void coldfire_tick(void)
{
@@ -369,7 +376,7 @@ unsigned long coldfire_gettimeoffset(voi
void coldfire_reboot(void)
{
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
/* disable interrupts and do a software reset */
asm("movew #0x2700, %%sr\n\t"
"moveb #0x80, %%d0\n\t"
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -63,8 +63,8 @@
* None currently (mapped via TLBs)
*/
-#if CONFIG_SDRAM_BASE != PAGE_BASE
-#if defined(CONFIG_M54455)
+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
+#if defined(CONFIG_M5445X)
#if 0
#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */
#endif
@@ -85,7 +85,11 @@
#endif
#else
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
+#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
+#define ACR1_DEFAULT #0x400FA008 /* ACR1 default value */
+#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
+#define ACR3_DEFAULT #0x400FA008 /* ACR3 default value */
#elif defined(CONFIG_M547X_8X)
#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
@@ -280,7 +284,7 @@ ENTRY(__start)
subl %a0,%a0
movel %a0,%usp
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
movel #(MCF_RAMBAR1 + 0x221), %d0
movec %d0, %rambar1
#elif defined(CONFIG_M547X_8X)
@@ -331,12 +335,11 @@ _loop_bss:
cmpl %a0,%a1
bne _loop_bss
#endif
-
/* If you change the memory size to another value make a matching
change in paging_init(cf-mmu.c) to zones_size[]. */
#if CONFIG_SDRAM_BASE != PAGE_OFFSET
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
/* Map 256MB as code */
mmu_map (PAGE_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), \
MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC, MMUDR_SP, \
@@ -502,7 +505,7 @@ _loop_bss:
* enabled and we are executing in high memory.
*/
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
/* Map first 16 MB as code */
mmu_map (PHYS_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), \
MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_INC, MMUDR_SP, 0, \
@@ -562,7 +565,7 @@ ENTRY(__running_high)
/* Unmap unity mappings */
#if CONFIG_SDRAM_BASE != PAGE_OFFSET
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
mmu_unmap (PHYS_OFFSET+0*0x1000000), MMUOR_ITLB, %d0
mmu_unmap (PHYS_OFFSET+0*0x1000000), 0, %d0
#elif defined(CONFIG_M547X_8X)
@@ -599,9 +602,9 @@ func_start set_context,%d0,(1*4)
movec %d0,%asid
func_return set_context
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
/*
- * set_fpga(addr,val) on the M54455EVB
+ * set_fpga(addr,val) on the M5445X
*
* Map in 0x00000000 -> 0x0fffffff and then do the write.
*/
--- a/arch/m68k/coldfire/ints.c
+++ b/arch/m68k/coldfire/ints.c
@@ -47,7 +47,7 @@ static int irq_depth[SYS_IRQS];
/*
* IRQ Controller
*/
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
void m5445x_irq_enable(unsigned int irq);
void m5445x_irq_disable(unsigned int irq);
static struct irq_controller m5445x_irq_controller = {
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
{
int i;
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
for (i = 0; i < SYS_IRQS; i++)
irq_controller[i] = &m5445x_irq_controller;
#elif defined(CONFIG_M547X_8X)
@@ -337,7 +337,7 @@ asmlinkage void handle_badint(struct pt_
}
EXPORT_SYMBOL(handle_badint);
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
/*
* M5445X Implementation
*/
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -17,7 +17,7 @@
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *handle, gfp_t flag)
{
-#ifndef CONFIG_M54455
+#ifndef CONFIG_M5445X
struct page *page, **map;
pgprot_t pgprot;
void *addr;
@@ -75,7 +75,7 @@ void dma_free_coherent(struct device *de
void *addr, dma_addr_t handle)
{
pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
-#ifndef CONFIG_M54455
+#ifndef CONFIG_M5445X
vfree(addr);
#else
kfree(addr);
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -519,7 +519,7 @@ int get_hardware_list(char *buffer)
void check_bugs(void)
{
-#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M54455)
+#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M5445X)
if (m68k_fputype == 0) {
printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
"WHICH IS REQUIRED BY LINUX/M68K ***\n");
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -133,7 +133,7 @@ void __iomem *__ioremap(unsigned long ph
}
#endif
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
if (physaddr >= 0xf0000000) {
/*
* On the M5445x processors an ACR is setup to map
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -62,15 +62,15 @@ config CRYPTO_DEV_GEODE
config CRYPTO_DEV_MCFCAU
bool "Support for Freescale Coldfire Cryptographic Acceleration Unit (CAU)"
- depends on M54455
+ depends on M5445X
select CRYPTO_ALGAPI
help
The cryptographic acceleration unit (CAU) is a ColdFire coprocessor
implementing a set of specialized operations in hardware. For example, you can
- find it on MCF54455.
+ find it on MCF5445X.
config CRYPTO_DEV_MCFCAU_DES
- tristate "DES and Triple DES cipher algorithms (MCF54455)"
+ tristate "DES and Triple DES cipher algorithms (MCF5445X)"
depends on CRYPTO_DEV_MCFCAU
select CRYPTO_ALGAPI
select CRYPTO_BLKCIPHER
@@ -84,7 +84,7 @@ config CRYPTO_DEV_MCFCAU_DES
will be called mcfcau-des.
config CRYPTO_DEV_MCFCAU_AES
- tristate "AES cipher algorithm (MCF54455)"
+ tristate "AES cipher algorithm (MCF5445X)"
depends on CRYPTO_DEV_MCFCAU
select CRYPTO_ALGAPI
select CRYPTO_BLKCIPHER
@@ -98,7 +98,7 @@ config CRYPTO_DEV_MCFCAU_AES
will be called mcfcau-aes.
config CRYPTO_DEV_MCFCAU_MD5
- tristate "MD5 digest algorithm (MCF54455)"
+ tristate "MD5 digest algorithm (MCF5445X)"
depends on CRYPTO_DEV_MCFCAU
select CRYPTO_ALGAPI
help
@@ -111,7 +111,7 @@ config CRYPTO_DEV_MCFCAU_MD5
will be called mcfcau-md5.
config CRYPTO_DEV_MCFCAU_SHA1
- tristate "SHA1 digest algorithm (MCF54455)"
+ tristate "SHA1 digest algorithm (MCF5445X)"
depends on CRYPTO_DEV_MCFCAU
select CRYPTO_ALGAPI
help
--- a/drivers/crypto/mcfcau-aes.c
+++ b/drivers/crypto/mcfcau-aes.c
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/crypto/mcfcau-des.c
+++ b/drivers/crypto/mcfcau-des.c
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/crypto/mcfcau-md5.c
+++ b/drivers/crypto/mcfcau-md5.c
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/crypto/mcfcau-sha1.c
+++ b/drivers/crypto/mcfcau-sha1.c
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/crypto/mcfcau.c
+++ b/drivers/crypto/mcfcau.c
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/crypto/mcfcau.h
+++ b/drivers/crypto/mcfcau.h
@@ -5,7 +5,7 @@
* Author: Andrey Butok
* Copyright Freescale Semiconductor Inc. 2007
*
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1975,7 +1975,7 @@ config 68360_ENET
config FEC
bool "FEC ethernet controller (of ColdFire CPUs)"
- depends on M523x || M527x || M5272 || M528x || M520x || M54455
+ depends on M523x || M527x || M5272 || M528x || M520x || M5445X
help
Say Y here if you want to use the built-in 10/100 Fast ethernet
controller on some Motorola ColdFire processors.
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -52,7 +52,7 @@
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
- defined(CONFIG_M54455)
+ defined(CONFIG_M5445X)
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
@@ -84,7 +84,7 @@ static unsigned int fec_hw[] = {
(MCF_MBAR+0x30000),
#elif defined(CONFIG_M532x)
(MCF_MBAR+0xfc030000),
-#elif defined(CONFIG_M54455)
+#elif defined(CONFIG_M5445X)
(MCF_MBAR+0xfc030000),
#if defined(CONFIG_FEC2)
(MCF_MBAR+0xfc034000),
@@ -179,7 +179,7 @@ typedef struct {
* account when setting it.
*/
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X)
#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
#else
#define OPT_FRAME_SIZE 0
@@ -1831,9 +1831,9 @@ static void __inline__ fec_uncache(unsig
/* ------------------------------------------------------------------------- */
-#elif defined(CONFIG_M54455)
+#elif defined(CONFIG_M5445X)
/*
- * Code specific for M54455
+ * Code specific for M5445X
*/
static void __inline__ fec_request_intrs(struct net_device *dev)
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -14,7 +14,7 @@
/****************************************************************************/
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X)
/*
* Just figures, Motorola would have to change the offsets for
* registers in the same peripheral device on different models
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -69,7 +69,7 @@ struct timer_list mcfrs_timer_struct;
#define DEFAULT_CBAUD B38400
#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || \
defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO) || \
- defined(CONFIG_M54455) || defined(CONFIG_M547X_8X)
+ defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
#define CONSOLE_BAUD_RATE 115200
#define DEFAULT_CBAUD B115200
#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
@@ -102,7 +102,7 @@ static struct tty_driver *mcfrs_serial_d
#undef SERIAL_DEBUG_FLOW
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455) || \
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X) || \
defined(CONFIG_M547X_8X)
#define IRQBASE (MCFINT_VECBASE+MCFINT_UART0)
#else
@@ -1630,7 +1630,7 @@ static void mcfrs_irqinit(struct mcf_ser
/* GPIOs also must be initalized, depends on board */
break;
}
-#elif defined(CONFIG_M54455)
+#elif defined(CONFIG_M5445X)
volatile unsigned char *uartp;
uartp = info->addr;
switch (info->line) {
@@ -2022,7 +2022,7 @@ struct console mcfrs_console = {
static int __init mcfrs_console_init(void)
{
-#if !(defined(CONFIG_M54455) || defined(CONFIG_M547X_8X))
+#if !(defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X))
register_console(&mcfrs_console);
#endif
return 0;
--- a/drivers/spi/coldfire_edma.c
+++ b/drivers/spi/coldfire_edma.c
@@ -20,10 +20,10 @@
#include <linux/cdev.h>
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
#include <asm/mcf5445x_edma.h>
#include <asm/mcf5445x_intc.h>
-#endif /* CONFIG_M54455 */
+#endif /* CONFIG_M5445X */
#include <asm/coldfire_edma.h>
/*
--- a/drivers/spi/spi_coldfire.c
+++ b/drivers/spi/spi_coldfire.c
@@ -57,7 +57,7 @@
#include <asm/mcfqspi.h>
#include <asm/coldfire.h>
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#include <asm/virtconvert.h>
#define SPI_DSPI
--- a/drivers/spi/ssi_audio.c
+++ b/drivers/spi/ssi_audio.c
@@ -25,7 +25,7 @@
#include <asm/coldfire.h>
#include <asm/coldfire_edma.h>
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
#include <asm/mcf5445x_ssi.h>
#include <asm/mcf5445x_ccm.h>
#include <asm/mcf5445x_gpio.h>
--- a/include/asm-m68k/cfcache.h
+++ b/include/asm-m68k/cfcache.h
@@ -40,7 +40,7 @@
#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */
#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
/*
* M5445x Cache Configuration
* - cache line size is 16 bytes
--- a/include/asm-m68k/coldfire.h
+++ b/include/asm-m68k/coldfire.h
@@ -1,9 +1,9 @@
#ifndef _COLDFIRE_H_
#define _COLDFIRE_H_
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#define MCF_MBAR 0x0
-#define MCF_RAMBAR1 0x40000000
+#define MCF_RAMBAR1 0x80000000
#define MCF_SRAM 0x80000000
#elif defined(CONFIG_M547X_8X)
#define MCF_MBAR 0xF0000000
--- a/include/asm-m68k/coldfire_edma.h
+++ b/include/asm-m68k/coldfire_edma.h
@@ -20,14 +20,14 @@
#define EDMA_DRIVER_NAME "ColdFire-eDMA"
#define DMA_DEV_MINOR 1
-#ifdef CONFIG_M54455
+#ifdef CONFIG_M5445X
#define EDMA_INT_CHANNEL_BASE 8
#define EDMA_INT_CONTROLLER_BASE 64
#define EDMA_INT_BASE (EDMA_INT_CHANNEL_BASE + \
EDMA_INT_CONTROLLER_BASE)
#define EDMA_CHANNELS 16
#define EDMA_INT_ERR 16 /* edma error interrupt */
-#endif /* CONFIG_M54455 */
+#endif /* CONFIG_M5445X */
typedef irqreturn_t (*edma_irq_handler)(int, void *);
typedef void (*edma_error_handler)(int, void *);
--- a/include/asm-m68k/mcfsim.h
+++ b/include/asm-m68k/mcfsim.h
@@ -12,7 +12,7 @@
#include <asm/coldfire.h>
#endif
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#include <asm/mcf5445x_intc.h>
#include <asm/mcf5445x_gpio.h>
#include <asm/mcf5445x_i2c.h>
--- a/include/asm-m68k/mcfuart.h
+++ b/include/asm-m68k/mcfuart.h
@@ -15,7 +15,7 @@
* Define the base address of the UARTS within the MBAR address
* space.
*/
-#if defined(CONFIG_M54455)
+#if defined(CONFIG_M5445X)
#include <asm/mcf5445x_intc.h>
#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
--- a/include/asm-m68k/page_offset.h
+++ b/include/asm-m68k/page_offset.h
@@ -4,7 +4,7 @@
#if defined(CONFIG_SUN3)
#define PAGE_OFFSET_RAW 0x0E000000
-#elif defined(CONFIG_M54455) || defined(CONFIG_M547X_8X)
+#elif defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
#define PHYS_OFFSET CONFIG_SDRAM_BASE
#define PAGE_OFFSET_RAW (PHYS_OFFSET)
/* #define PAGE_OFFSET_RAW 0xC0000000 */
--- a/include/asm-m68k/setup.h
+++ b/include/asm-m68k/setup.h
@@ -240,7 +240,7 @@ extern unsigned long m68k_machtype;
#define FPU_68040 (1<<FPUB_68040)
#define FPU_68060 (1<<FPUB_68060)
#define FPU_SUNFPA (1<<FPUB_SUNFPA)
-#ifndef CONFIG_M54455
+#ifndef CONFIG_M5445X
#define FPU_CFV4E (1<<FPUB_CFV4E)
#else
#define FPU_CFV4E 0

View File

@ -1,979 +0,0 @@
From 940b4fea5ebfde3abe03c6469a57c01ee961497a Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 18 Jun 2008 15:20:21 -0600
Subject: [PATCH] Split 547x/548x and 5445x cache routines into separate files.
LTIBName: mcfv4e-cache-split
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
include/asm-m68k/cf_5445x_cacheflush.h | 447 ++++++++++++++++++++++++++++++++
include/asm-m68k/cf_548x_cacheflush.h | 259 ++++++++++++++++++
include/asm-m68k/cf_cacheflush.h | 244 +-----------------
3 files changed, 711 insertions(+), 239 deletions(-)
create mode 100644 include/asm-m68k/cf_5445x_cacheflush.h
create mode 100644 include/asm-m68k/cf_548x_cacheflush.h
--- /dev/null
+++ b/include/asm-m68k/cf_5445x_cacheflush.h
@@ -0,0 +1,447 @@
+/*
+ * include/asm-m68k/cf_5445x_cacheflush.h - Coldfire 5445x Cache
+ *
+ * Based on include/asm-m68k/cacheflush.h
+ *
+ * Coldfire pieces by:
+ * Kurt Mahan kmahan@freescale.com
+ *
+ * Copyright Freescale Semiconductor, Inc. 2007, 2008
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef M68K_CF_5445x_CACHEFLUSH_H
+#define M68K_CF_5445x_CACHEFLUSH_H
+
+#include <asm/cfcache.h>
+
+/*
+ * Coldfire Cache Model
+ *
+ * The Coldfire processors use a Harvard architecture cache configured
+ * as four-way set associative. The cache does not implement bus snooping
+ * so cache coherency with other masters must be maintained in software.
+ *
+ * The cache is managed via the CPUSHL instruction in conjunction with
+ * bits set in the CACR (cache control register). Currently the code
+ * uses the CPUSHL enhancement which adds the ability to
+ * invalidate/clear/push a cacheline by physical address. This feature
+ * is designated in the Hardware Configuration Register [D1-CPES].
+ *
+ * CACR Bits:
+ * DPI[28] cpushl invalidate disable for d-cache
+ * IDPI[12] cpushl invalidate disable for i-cache
+ * SPA[14] cpushl search by physical address
+ * IVO[20] cpushl invalidate only
+ *
+ * Random Terminology:
+ * * invalidate = reset the cache line's valid bit
+ * * push = generate a line-sized store of the data if its contents are marked
+ * as modifed (the modified flag is cleared after the store)
+ * * clear = push + invalidate
+ */
+
+/**
+ * flush_icache - Flush all of the instruction cache
+ */
+static inline void flush_icache(void)
+{
+ asm volatile("nop\n"
+ "moveq%.l #0,%%d0\n"
+ "moveq%.l #0,%%d1\n"
+ "move%.l %%d0,%%a0\n"
+ "1:\n"
+ "cpushl %%ic,(%%a0)\n"
+ "add%.l #0x0010,%%a0\n"
+ "addq%.l #1,%%d1\n"
+ "cmpi%.l %0,%%d1\n"
+ "bne 1b\n"
+ "moveq%.l #0,%%d1\n"
+ "addq%.l #1,%%d0\n"
+ "move%.l %%d0,%%a0\n"
+ "cmpi%.l #4,%%d0\n"
+ "bne 1b\n"
+ : : "i" (CACHE_SETS)
+ : "a0", "d0", "d1");
+}
+
+/**
+ * flush_dcache - Flush all of the data cache
+ */
+static inline void flush_dcache(void)
+{
+ asm volatile("nop\n"
+ "moveq%.l #0,%%d0\n"
+ "moveq%.l #0,%%d1\n"
+ "move%.l %%d0,%%a0\n"
+ "1:\n"
+ "cpushl %%dc,(%%a0)\n"
+ "add%.l #0x0010,%%a0\n"
+ "addq%.l #1,%%d1\n"
+ "cmpi%.l %0,%%d1\n"
+ "bne 1b\n"
+ "moveq%.l #0,%%d1\n"
+ "addq%.l #1,%%d0\n"
+ "move%.l %%d0,%%a0\n"
+ "cmpi%.l #4,%%d0\n"
+ "bne 1b\n"
+ : : "i" (CACHE_SETS)
+ : "a0", "d0", "d1");
+}
+
+/**
+ * flush_bcache - Flush all of both caches
+ */
+static inline void flush_bcache(void)
+{
+ asm volatile("nop\n"
+ "moveq%.l #0,%%d0\n"
+ "moveq%.l #0,%%d1\n"
+ "move%.l %%d0,%%a0\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "add%.l #0x0010,%%a0\n"
+ "addq%.l #1,%%d1\n"
+ "cmpi%.l %0,%%d1\n"
+ "bne 1b\n"
+ "moveq%.l #0,%%d1\n"
+ "addq%.l #1,%%d0\n"
+ "move%.l %%d0,%%a0\n"
+ "cmpi%.l #4,%%d0\n"
+ "bne 1b\n"
+ : : "i" (CACHE_SETS)
+ : "a0", "d0", "d1");
+}
+
+/**
+ * cf_cache_clear - invalidate cache
+ * @paddr: starting physical address
+ * @len: number of bytes
+ *
+ * Invalidate cache lines starting at paddr for len bytes.
+ * Those lines are not pushed.
+ */
+static inline void cf_cache_clear(unsigned long paddr, int len)
+{
+ /* number of lines */
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
+
+ /* align on set boundary */
+ paddr &= 0xfffffff0;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%d0\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "subq%.l #1,%%d0\n"
+ "bne%.b 1b\n"
+ "movec %2,%%cacr\n"
+ : : "a" (paddr), "r" (len),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA+CF_CACR_IVO)
+ : "a0", "d0");
+}
+
+/**
+ * cf_cache_push - Push dirty cache out with no invalidate
+ * @paddr: starting physical address
+ * @len: number of bytes
+ *
+ * Push the any dirty lines starting at paddr for len bytes.
+ * Those lines are not invalidated.
+ */
+static inline void cf_cache_push(unsigned long paddr, int len)
+{
+ /* number of lines */
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
+
+ /* align on set boundary */
+ paddr &= 0xfffffff0;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%d0\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "subq%.l #1,%%d0\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : : "a" (paddr), "r" (len),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA+CF_CACR_DPI+CF_CACR_IDPI)
+ : "a0", "d0");
+}
+
+/**
+ * cf_cache_flush - Push dirty cache out and invalidate
+ * @paddr: starting physical address
+ * @len: number of bytes
+ *
+ * Push the any dirty lines starting at paddr for len bytes and
+ * invalidate those lines.
+ */
+static inline void cf_cache_flush(unsigned long paddr, int len)
+{
+ /* number of lines */
+ len = (len + (CACHE_LINE_SIZE-1)) / CACHE_LINE_SIZE;
+ if (len == 0)
+ return;
+
+ /* align on set boundary */
+ paddr &= 0xfffffff0;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%d0\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "subq%.l #1,%%d0\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : : "a" (paddr), "r" (len),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA)
+ : "a0", "d0");
+}
+
+/**
+ * cf_cache_flush_range - Push dirty data/inst cache in range out and invalidate
+ * @vstart - starting virtual address
+ * @vend: ending virtual address
+ *
+ * Push the any dirty data/instr lines starting at paddr for len bytes and
+ * invalidate those lines.
+ */
+static inline void cf_cache_flush_range(unsigned long vstart, unsigned long vend)
+{
+ int len;
+
+ /* align on set boundary */
+ vstart &= 0xfffffff0;
+ vend = PAGE_ALIGN((vend + (CACHE_LINE_SIZE-1))) & 0xfffffff0;
+ len = vend - vstart;
+ if (len == 0)
+ return;
+ vstart = __pa(vstart);
+ vend = vstart + len;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%a1\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "cmpa%.l %%a0,%%a1\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : /* no return */
+ : "a" (vstart), "a" (vend),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA)
+ : "a0", "a1", "d0");
+}
+
+/**
+ * cf_dcache_flush_range - Push dirty data cache in range out and invalidate
+ * @vstart - starting virtual address
+ * @vend: ending virtual address
+ *
+ * Push the any dirty data lines starting at paddr for len bytes and
+ * invalidate those lines.
+ */
+static inline void cf_dcache_flush_range(unsigned long vstart, unsigned long vend)
+{
+ /* align on set boundary */
+ vstart &= 0xfffffff0;
+ vend = (vend + (CACHE_LINE_SIZE-1)) & 0xfffffff0;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%a1\n"
+ "1:\n"
+ "cpushl %%dc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "cmpa%.l %%a0,%%a1\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : /* no return */
+ : "a" (__pa(vstart)), "a" (__pa(vend)),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA)
+ : "a0", "a1", "d0");
+}
+
+/**
+ * cf_icache_flush_range - Push dirty inst cache in range out and invalidate
+ * @vstart - starting virtual address
+ * @vend: ending virtual address
+ *
+ * Push the any dirty instr lines starting at paddr for len bytes and
+ * invalidate those lines. This should just be an invalidate since you
+ * shouldn't be able to have dirty instruction cache.
+ */
+static inline void cf_icache_flush_range(unsigned long vstart, unsigned long vend)
+{
+ /* align on set boundary */
+ vstart &= 0xfffffff0;
+ vend = (vend + (CACHE_LINE_SIZE-1)) & 0xfffffff0;
+
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%a0\n"
+ "move%.l %1,%%a1\n"
+ "1:\n"
+ "cpushl %%ic,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "cmpa%.l %%a0,%%a1\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : /* no return */
+ : "a" (__pa(vstart)), "a" (__pa(vend)),
+ "r" (shadow_cacr),
+ "i" (CF_CACR_SPA)
+ : "a0", "a1", "d0");
+}
+
+/**
+ * flush_cache_mm - Flush an mm_struct
+ * @mm: mm_struct to flush
+ */
+static inline void flush_cache_mm(struct mm_struct *mm)
+{
+ if (mm == current->mm)
+ flush_bcache();
+}
+
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+
+/**
+ * flush_cache_range - Flush a cache range
+ * @vma: vma struct
+ * @start: Starting address
+ * @end: Ending address
+ *
+ * flush_cache_range must be a macro to avoid a dependency on
+ * linux/mm.h which includes this file.
+ */
+static inline void flush_cache_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
+{
+ if (vma->vm_mm == current->mm)
+ cf_cache_flush_range(start, end);
+}
+
+/**
+ * flush_cache_page - Flush a page of the cache
+ * @vma: vma struct
+ * @vmaddr:
+ * @pfn: page numer
+ *
+ * flush_cache_page must be a macro to avoid a dependency on
+ * linux/mm.h which includes this file.
+ */
+static inline void flush_cache_page(struct vm_area_struct *vma,
+ unsigned long vmaddr, unsigned long pfn)
+{
+ if (vma->vm_mm == current->mm)
+ cf_cache_flush_range(vmaddr, vmaddr+PAGE_SIZE);
+}
+
+/**
+ * __flush_page_to_ram - Push a page out of the cache
+ * @vaddr: Virtual address at start of page
+ *
+ * Push the page at kernel virtual address *vaddr* and clear
+ * the icache.
+ */
+static inline void __flush_page_to_ram(void *vaddr)
+{
+ asm volatile("nop\n"
+ "move%.l %2,%%d0\n"
+ "or%.l %3,%%d0\n"
+ "movec %%d0,%%cacr\n"
+ "move%.l %0,%%d0\n"
+ "and%.l #0xfffffff0,%%d0\n"
+ "move%.l %%d0,%%a0\n"
+ "move%.l %1,%%d0\n"
+ "1:\n"
+ "cpushl %%bc,(%%a0)\n"
+ "lea 0x10(%%a0),%%a0\n"
+ "subq%.l #1,%%d0\n"
+ "bne.b 1b\n"
+ "movec %2,%%cacr\n"
+ : : "a" (__pa(vaddr)), "i" (PAGE_SIZE / CACHE_LINE_SIZE),
+ "r" (shadow_cacr), "i" (CF_CACR_SPA)
+ : "a0", "d0");
+}
+
+/*
+ * Various defines for the kernel.
+ */
+
+extern void cache_clear(unsigned long paddr, int len);
+extern void cache_push(unsigned long paddr, int len);
+extern void flush_icache_range(unsigned long address, unsigned long endaddr);
+
+#define flush_cache_all() flush_bcache()
+#define flush_cache_vmap(start, end) flush_bcache()
+#define flush_cache_vunmap(start, end) flush_bcache()
+
+#define flush_dcache_range(vstart, vend) cf_dcache_flush_range(vstart, vend)
+#define flush_dcache_page(page) __flush_page_to_ram(page_address(page))
+#define flush_dcache_mmap_lock(mapping) do { } while (0)
+#define flush_dcache_mmap_unlock(mapping) do { } while (0)
+
+#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page))
+
+/**
+ * copy_to_user_page - Copy memory to user page
+ */
+static inline void copy_to_user_page(struct vm_area_struct *vma,
+ struct page *page, unsigned long vaddr,
+ void *dst, void *src, int len)
+{
+ memcpy(dst, src, len);
+ cf_cache_flush(page_to_phys(page), PAGE_SIZE);
+}
+
+/**
+ * copy_from_user_page - Copy memory from user page
+ */
+static inline void copy_from_user_page(struct vm_area_struct *vma,
+ struct page *page, unsigned long vaddr,
+ void *dst, void *src, int len)
+{
+ cf_cache_flush(page_to_phys(page), PAGE_SIZE);
+ memcpy(dst, src, len);
+}
+
+#endif /* M68K_CF_5445x_CACHEFLUSH_H */
--- /dev/null
+++ b/include/asm-m68k/cf_548x_cacheflush.h
@@ -0,0 +1,259 @@
+/*
+ * include/asm-m68k/cf_548x_cacheflush.h - Coldfire 547x/548x Cache
+ *
+ * Based on include/asm-m68k/cacheflush.h
+ *
+ * Coldfire pieces by:
+ * Kurt Mahan kmahan@freescale.com
+ *
+ * Copyright Freescale Semiconductor, Inc. 2007, 2008
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef M68K_CF_548x_CACHEFLUSH_H
+#define M68K_CF_548x_CACHEFLUSH_H
+
+#include <asm/cfcache.h>
+/*
+ * Cache handling functions
+ */
+
+#define flush_icache() \
+({ \
+ unsigned long set; \
+ unsigned long start_set; \
+ unsigned long end_set; \
+ \
+ start_set = 0; \
+ end_set = (unsigned long)LAST_DCACHE_ADDR; \
+ \
+ for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
+ asm volatile("cpushl %%ic,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%ic,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%ic,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set)); \
+ } \
+})
+
+#define flush_dcache() \
+({ \
+ unsigned long set; \
+ unsigned long start_set; \
+ unsigned long end_set; \
+ \
+ start_set = 0; \
+ end_set = (unsigned long)LAST_DCACHE_ADDR; \
+ \
+ for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
+ asm volatile("cpushl %%dc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%dc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%dc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%dc,(%0)" : "=a" (set) : "a" (set)); \
+ } \
+})
+
+#define flush_bcache() \
+({ \
+ unsigned long set; \
+ unsigned long start_set; \
+ unsigned long end_set; \
+ \
+ start_set = 0; \
+ end_set = (unsigned long)LAST_DCACHE_ADDR; \
+ \
+ for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
+ asm volatile("cpushl %%bc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%bc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%bc,(%0)\n" \
+ "\taddq%.l #1,%0\n" \
+ "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set)); \
+ } \
+})
+
+/*
+ * invalidate the cache for the specified memory range.
+ * It starts at the physical address specified for
+ * the given number of bytes.
+ */
+extern void cache_clear(unsigned long paddr, int len);
+/*
+ * push any dirty cache in the specified memory range.
+ * It starts at the physical address specified for
+ * the given number of bytes.
+ */
+extern void cache_push(unsigned long paddr, int len);
+
+/*
+ * push and invalidate pages in the specified user virtual
+ * memory range.
+ */
+extern void cache_push_v(unsigned long vaddr, int len);
+
+/* This is needed whenever the virtual mapping of the current
+ process changes. */
+
+/**
+ * flush_cache_mm - Flush an mm_struct
+ * @mm: mm_struct to flush
+ */
+static inline void flush_cache_mm(struct mm_struct *mm)
+{
+ if (mm == current->mm)
+ flush_bcache();
+}
+
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+
+#define flush_cache_all() flush_bcache()
+
+/**
+ * flush_cache_range - Flush a cache range
+ * @vma: vma struct
+ * @start: Starting address
+ * @end: Ending address
+ *
+ * flush_cache_range must be a macro to avoid a dependency on
+ * linux/mm.h which includes this file.
+ */
+static inline void flush_cache_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
+{
+ if (vma->vm_mm == current->mm)
+ flush_bcache();
+// cf_cache_flush_range(start, end);
+}
+
+/**
+ * flush_cache_page - Flush a page of the cache
+ * @vma: vma struct
+ * @vmaddr:
+ * @pfn: page numer
+ *
+ * flush_cache_page must be a macro to avoid a dependency on
+ * linux/mm.h which includes this file.
+ */
+static inline void flush_cache_page(struct vm_area_struct *vma,
+ unsigned long vmaddr, unsigned long pfn)
+{
+ if (vma->vm_mm == current->mm)
+ flush_bcache();
+// cf_cache_flush_range(vmaddr, vmaddr+PAGE_SIZE);
+}
+
+/* Push the page at kernel virtual address and clear the icache */
+/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
+#define flush_page_to_ram(page) __flush_page_to_ram((void *) page_address(page))
+extern inline void __flush_page_to_ram(void *address)
+{
+ unsigned long set;
+ unsigned long start_set;
+ unsigned long end_set;
+ unsigned long addr = (unsigned long) address;
+
+ addr &= ~(PAGE_SIZE - 1); /* round down to page start address */
+
+ start_set = addr & _ICACHE_SET_MASK;
+ end_set = (addr + PAGE_SIZE-1) & _ICACHE_SET_MASK;
+
+ if (start_set > end_set) {
+ /* from the begining to the lowest address */
+ for (set = 0; set <= end_set; set += (0x10 - 3)) {
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set));
+ }
+ /* next loop will finish the cache ie pass the hole */
+ end_set = LAST_ICACHE_ADDR;
+ }
+ for (set = start_set; set <= end_set; set += (0x10 - 3)) {
+ asm volatile("cpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set));
+ }
+}
+
+/* Use __flush_page_to_ram() for flush_dcache_page all values are same - MW */
+#define flush_dcache_page(page) \
+ __flush_page_to_ram((void *) page_address(page))
+#define flush_icache_page(vma,pg) \
+ __flush_page_to_ram((void *) page_address(pg))
+#define flush_icache_user_range(adr,len) do { } while (0)
+/* NL */
+#define flush_icache_user_page(vma,page,addr,len) do { } while (0)
+
+/* Push n pages at kernel virtual address and clear the icache */
+/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
+extern inline void flush_icache_range (unsigned long address,
+ unsigned long endaddr)
+{
+ unsigned long set;
+ unsigned long start_set;
+ unsigned long end_set;
+
+ start_set = address & _ICACHE_SET_MASK;
+ end_set = endaddr & _ICACHE_SET_MASK;
+
+ if (start_set > end_set) {
+ /* from the begining to the lowest address */
+ for (set = 0; set <= end_set; set += (0x10 - 3)) {
+ asm volatile("cpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set));
+ }
+ /* next loop will finish the cache ie pass the hole */
+ end_set = LAST_ICACHE_ADDR;
+ }
+ for (set = start_set; set <= end_set; set += (0x10 - 3)) {
+ asm volatile("cpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)\n"
+ "\taddq%.l #1,%0\n"
+ "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set));
+ }
+}
+
+static inline void copy_to_user_page(struct vm_area_struct *vma,
+ struct page *page, unsigned long vaddr,
+ void *dst, void *src, int len)
+{
+ memcpy(dst, src, len);
+ flush_icache_user_page(vma, page, vaddr, len);
+}
+static inline void copy_from_user_page(struct vm_area_struct *vma,
+ struct page *page, unsigned long vaddr,
+ void *dst, void *src, int len)
+{
+ memcpy(dst, src, len);
+}
+
+#define flush_cache_vmap(start, end) flush_cache_all()
+#define flush_cache_vunmap(start, end) flush_cache_all()
+#define flush_dcache_mmap_lock(mapping) do { } while (0)
+#define flush_dcache_mmap_unlock(mapping) do { } while (0)
+
+#endif /* M68K_CF_548x_CACHEFLUSH_H */
--- a/include/asm-m68k/cf_cacheflush.h
+++ b/include/asm-m68k/cf_cacheflush.h
@@ -1,244 +1,10 @@
#ifndef M68K_CF_CACHEFLUSH_H
#define M68K_CF_CACHEFLUSH_H
-#include <asm/cfcache.h>
-/*
- * Cache handling functions
- */
-
-#define flush_icache() \
-({ \
- unsigned long set; \
- unsigned long start_set; \
- unsigned long end_set; \
- \
- start_set = 0; \
- end_set = (unsigned long)LAST_DCACHE_ADDR; \
- \
- for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
- asm volatile("cpushl %%ic,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%ic,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%ic,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set)); \
- } \
-})
-
-#define flush_dcache() \
-({ \
- unsigned long set; \
- unsigned long start_set; \
- unsigned long end_set; \
- \
- start_set = 0; \
- end_set = (unsigned long)LAST_DCACHE_ADDR; \
- \
- for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
- asm volatile("cpushl %%dc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%dc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%dc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%dc,(%0)" : "=a" (set) : "a" (set)); \
- } \
-})
-
-#define flush_bcache() \
-({ \
- unsigned long set; \
- unsigned long start_set; \
- unsigned long end_set; \
- \
- start_set = 0; \
- end_set = (unsigned long)LAST_DCACHE_ADDR; \
- \
- for (set = start_set; set <= end_set; set += (0x10 - 3)) { \
- asm volatile("cpushl %%bc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%bc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%bc,(%0)\n" \
- "\taddq%.l #1,%0\n" \
- "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set)); \
- } \
-})
-
-/*
- * invalidate the cache for the specified memory range.
- * It starts at the physical address specified for
- * the given number of bytes.
- */
-extern void cache_clear(unsigned long paddr, int len);
-/*
- * push any dirty cache in the specified memory range.
- * It starts at the physical address specified for
- * the given number of bytes.
- */
-extern void cache_push(unsigned long paddr, int len);
-
-/*
- * push and invalidate pages in the specified user virtual
- * memory range.
- */
-extern void cache_push_v(unsigned long vaddr, int len);
-
-/* This is needed whenever the virtual mapping of the current
- process changes. */
-
-/**
- * flush_cache_mm - Flush an mm_struct
- * @mm: mm_struct to flush
- */
-static inline void flush_cache_mm(struct mm_struct *mm)
-{
- if (mm == current->mm)
- flush_bcache();
-}
-
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-
-#define flush_cache_all() flush_bcache()
-
-/**
- * flush_cache_range - Flush a cache range
- * @vma: vma struct
- * @start: Starting address
- * @end: Ending address
- *
- * flush_cache_range must be a macro to avoid a dependency on
- * linux/mm.h which includes this file.
- */
-static inline void flush_cache_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end)
-{
- if (vma->vm_mm == current->mm)
- flush_bcache();
-// cf_cache_flush_range(start, end);
-}
-
-/**
- * flush_cache_page - Flush a page of the cache
- * @vma: vma struct
- * @vmaddr:
- * @pfn: page numer
- *
- * flush_cache_page must be a macro to avoid a dependency on
- * linux/mm.h which includes this file.
- */
-static inline void flush_cache_page(struct vm_area_struct *vma,
- unsigned long vmaddr, unsigned long pfn)
-{
- if (vma->vm_mm == current->mm)
- flush_bcache();
-// cf_cache_flush_range(vmaddr, vmaddr+PAGE_SIZE);
-}
-
-/* Push the page at kernel virtual address and clear the icache */
-/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
-#define flush_page_to_ram(page) __flush_page_to_ram((void *) page_address(page))
-extern inline void __flush_page_to_ram(void *address)
-{
- unsigned long set;
- unsigned long start_set;
- unsigned long end_set;
- unsigned long addr = (unsigned long) address;
-
- addr &= ~(PAGE_SIZE - 1); /* round down to page start address */
-
- start_set = addr & _ICACHE_SET_MASK;
- end_set = (addr + PAGE_SIZE-1) & _ICACHE_SET_MASK;
-
- if (start_set > end_set) {
- /* from the begining to the lowest address */
- for (set = 0; set <= end_set; set += (0x10 - 3)) {
- asm volatile("cpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set));
- }
- /* next loop will finish the cache ie pass the hole */
- end_set = LAST_ICACHE_ADDR;
- }
- for (set = start_set; set <= end_set; set += (0x10 - 3)) {
- asm volatile("cpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%bc,(%0)" : "=a" (set) : "a" (set));
- }
-}
-
-/* Use __flush_page_to_ram() for flush_dcache_page all values are same - MW */
-#define flush_dcache_page(page) \
- __flush_page_to_ram((void *) page_address(page))
-#define flush_icache_page(vma,pg) \
- __flush_page_to_ram((void *) page_address(pg))
-#define flush_icache_user_range(adr,len) do { } while (0)
-/* NL */
-#define flush_icache_user_page(vma,page,addr,len) do { } while (0)
-
-/* Push n pages at kernel virtual address and clear the icache */
-/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
-extern inline void flush_icache_range (unsigned long address,
- unsigned long endaddr)
-{
- unsigned long set;
- unsigned long start_set;
- unsigned long end_set;
-
- start_set = address & _ICACHE_SET_MASK;
- end_set = endaddr & _ICACHE_SET_MASK;
-
- if (start_set > end_set) {
- /* from the begining to the lowest address */
- for (set = 0; set <= end_set; set += (0x10 - 3)) {
- asm volatile("cpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set));
- }
- /* next loop will finish the cache ie pass the hole */
- end_set = LAST_ICACHE_ADDR;
- }
- for (set = start_set; set <= end_set; set += (0x10 - 3)) {
- asm volatile("cpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)\n"
- "\taddq%.l #1,%0\n"
- "\tcpushl %%ic,(%0)" : "=a" (set) : "a" (set));
- }
-}
-
-static inline void copy_to_user_page(struct vm_area_struct *vma,
- struct page *page, unsigned long vaddr,
- void *dst, void *src, int len)
-{
- memcpy(dst, src, len);
- flush_icache_user_page(vma, page, vaddr, len);
-}
-static inline void copy_from_user_page(struct vm_area_struct *vma,
- struct page *page, unsigned long vaddr,
- void *dst, void *src, int len)
-{
- memcpy(dst, src, len);
-}
-
-#define flush_cache_vmap(start, end) flush_cache_all()
-#define flush_cache_vunmap(start, end) flush_cache_all()
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
+#ifdef CONFIG_M5445X
+#include "cf_5445x_cacheflush.h"
+#else
+#include "cf_548x_cacheflush.h"
+#endif
#endif /* M68K_CF_CACHEFLUSH_H */

View File

@ -1,44 +0,0 @@
From 6651009d31bfcb8e364e25e944618465f510bd0b Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 21:23:58 -0600
Subject: [PATCH] Update SRAM/RAMBAR1 configuration for M5445x.
LTIBName: m5445x-rambar-config
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 5 +++--
include/asm-m68k/coldfire.h | 9 +++++++--
2 files changed, 10 insertions(+), 4 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -285,8 +285,9 @@ ENTRY(__start)
movel %a0,%usp
#if defined(CONFIG_M5445X)
- movel #(MCF_RAMBAR1 + 0x221), %d0
- movec %d0, %rambar1
+/* JKM -- don't enable it currently -- fix */
+/* movel #(MCF_RAMBAR1 + 0x221), %d0 */
+/* movec %d0, %rambar1 */
#elif defined(CONFIG_M547X_8X)
movel #MCF_MBAR, %d0
movec %d0, %mbar
--- a/include/asm-m68k/coldfire.h
+++ b/include/asm-m68k/coldfire.h
@@ -3,8 +3,13 @@
#if defined(CONFIG_M5445X)
#define MCF_MBAR 0x0
-#define MCF_RAMBAR1 0x80000000
-#define MCF_SRAM 0x80000000
+/*
+ * Even though RAMBAR1 should be in the 0x8xxxxxxx range there
+ * is a problem that needs to be resolved. Currently head.S
+ * disables SRAM/RAMBAR1.
+ */
+#define MCF_RAMBAR1 0x40000000
+#define MCF_SRAM 0x40000000
#elif defined(CONFIG_M547X_8X)
#define MCF_MBAR 0xF0000000
#define MCF_MMUBAR 0xF1000000

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@ -1,30 +0,0 @@
From 7b2dd837d32050d88eadfb0c71c381f7478f55b3 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 22:09:34 -0600
Subject: [PATCH] Update default command lines.
LTIBName: mcfv4e-update-cmdlines
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -132,11 +132,13 @@ int __init uboot_commandline(char *boota
/*
* This routine does things not done in the bootloader.
*/
-#if defined(CONFIG_M5445X)
-#define FOO_DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+#if defined(CONFIG_M54451)
#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/redstripe/rootfs/ ip=172.27.155.51:172.27.155.1"
+#elif defined(CONFIG_M54455)
+#define MTD_DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/redstripe/rootfs/ ip=172.27.155.55:172.27.155.1"
#elif defined(CONFIG_M547X_8X)
-#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/rigo/rootfs/ ip=172.27.155.85:172.27.155.1"
+#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/rigo/rootfs/ ip=172.27.155.75:172.27.155.1"
#endif
asmlinkage void __init cf_early_init(void)
{

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@ -1,46 +0,0 @@
From 87ea76988875856dc1c3657b27ac792d2f0311e9 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 22:12:17 -0600
Subject: [PATCH] Move BSS initialization after mmu setup.
LTIBName: mcfv4e-bss-clear-move
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 19 +++++++++----------
1 files changed, 9 insertions(+), 10 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -326,16 +326,6 @@ ENTRY(__start)
movec %d0, %acr3
nop
-#ifdef CONFIG_COLDFIRE
-/* zero bss */
- lea _sbss,%a0
- lea _ebss,%a1
- clrl %d0
-_loop_bss:
- movel %d0,(%a0)+
- cmpl %a0,%a1
- bne _loop_bss
-#endif
/* If you change the memory size to another value make a matching
change in paging_init(cf-mmu.c) to zones_size[]. */
@@ -564,6 +554,15 @@ ENTRY(__running_high)
addl #PAGE_OFFSET,%a1
movel %a1,%a0@
+/* zero bss */
+ lea _sbss,%a0
+ lea _ebss,%a1
+ clrl %d0
+_loop_bss:
+ movel %d0,(%a0)+
+ cmpl %a0,%a1
+ bne _loop_bss
+
/* Unmap unity mappings */
#if CONFIG_SDRAM_BASE != PAGE_OFFSET
#if defined(CONFIG_M5445X)

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@ -1,22 +0,0 @@
From 601145f682eab66abca5d154a8a9fdf275acd8ba Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 22:20:31 -0600
Subject: [PATCH] Fix off by 1 error with endmem.
LTIBName: mcfv4e-endmem-fix
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -449,7 +449,7 @@ void __init config_coldfire(void)
/* mach_hwclk = coldfire_hwclk; to be done */
mach_get_model = coldfire_get_model;
- coldfire_bootmem_alloc(startmem, endmem);
+ coldfire_bootmem_alloc(startmem, endmem-1);
/*
* initrd setup

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@ -1,112 +0,0 @@
From ddc092180bd24b34afdd6fd7cd48b77b55a5bd5e Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 23:21:07 -0600
Subject: [PATCH] Cleanup ACR mappings and document.
LTIBName: mcfv4e-acr-cleanup
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 81 +++++++++++++++++++++++++-------------------
1 files changed, 46 insertions(+), 35 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -53,52 +53,63 @@
#define __FINIT .previous
#endif
-/* JKM -- REVISE DOCS FOR M547x_8x and PHYS MAPPING */
+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
/*
- * Setup ACR mappings to provide the following memory map:
- * Data
- * 0xA0000000 -> 0xAFFFFFFF [0] NO CACHE / PRECISE / SUPER ONLY
- * 0xF0000000 -> 0xFFFFFFFF [1] NO CACHE / PRECISE / SUPER ONLY
- * Code
- * None currently (mapped via TLBs)
+ * Kernel mapped to virtual ram address.
+ *
+ * M5445x:
+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
+ * Data[1]: 0xA0000000 -> 0xAFFFFFFF PCI
+ * Code[0]: Not Mapped
+ * Code[1]: Not Mapped
+ *
+ * M547x/M548x
+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
+ * Data[1]: Not Mapped
+ * Code[0]: Not Mapped
+ * Code[1]: Not Mapped
*/
-
-#if CONFIG_SDRAM_BASE != PAGE_OFFSET
#if defined(CONFIG_M5445X)
-#if 0
-#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */
-#endif
-#define ACR0_DEFAULT #0x400FA028 /* ACR0 default value */
-#define ACR1_DEFAULT #0xF00FA040 /* ACR1 default value */
-#if 0
-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
-#endif
-#define ACR2_DEFAULT #0x400FA028 /* ACR2 default value */
-#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */
-/* ACR mapping for FPGA (maps 0) */
-#define ACR0_FPGA #0x000FA048 /* ACR0 enable FPGA */
+#define ACR0_DEFAULT #0xF00FA048 /* System regs */
+#define ACR1_DEFAULT #0xA00FA048 /* PCI */
+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */
+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */
#elif defined(CONFIG_M547X_8X)
-#define ACR0_DEFAULT #0xE000C040 /* ACR0 default value */
-#define ACR1_DEFAULT #0x00000000 /* ACR1 default value */
-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
-#define ACR3_DEFAULT #0x00000000 /* ACR3 default value */
+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
+#define ACR1_DEFAULT #0x00000000 /* Not Mapped */
+#define ACR2_DEFAULT #0x00000000 /* Not Mapped */
+#define ACR3_DEFAULT #0x00000000 /* Not Mapped */
#endif
-#else
+#else /* CONFIG_SDRAM_BASE = PAGE_OFFSET */
+/*
+ * Kernel mapped to physical ram address.
+ *
+ * M5445x:
+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
+ * Data[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - uncached
+ * Code[0]: Not Mapped
+ * Code[1]: 0x40000000 -> 0x4FFFFFFF SDRAM - cached
+ *
+ * M547x/M548x
+ * Data[0]: 0xF0000000 -> 0xFFFFFFFF System regs
+ * Data[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - uncached
+ * Code[0]: Not Mapped
+ * Code[1]: 0x00000000 -> 0x0FFFFFFF SDRAM - cached
+ */
#if defined(CONFIG_M5445X)
-#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
-#define ACR1_DEFAULT #0x400FA008 /* ACR1 default value */
-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
-#define ACR3_DEFAULT #0x400FA008 /* ACR3 default value */
+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
+#define ACR1_DEFAULT #0x400FA048 /* SDRAM uncached */
+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
+#define ACR3_DEFAULT #0x400FA008 /* SDRAM cached */
#elif defined(CONFIG_M547X_8X)
-#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
-#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
-#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
-#define ACR3_DEFAULT #0x000FA008 /* ACR3 default value */
+#define ACR0_DEFAULT #0xF00FA048 /* System Regs */
+#define ACR1_DEFAULT #0x000FA048 /* SDRAM uncached */
+#define ACR2_DEFAULT #0x00000000 /* Not mapped */
+#define ACR3_DEFAULT #0x000FA008 /* SDRAM cached */
#endif
#endif
-
/* Several macros to make the writing of subroutines easier:
* - func_start marks the beginning of the routine which setups the frame
* register and saves the registers, it also defines another macro

View File

@ -1,21 +0,0 @@
From 423d67db899b8f2e20b09fac7da1f7eaaa4523cb Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 23:24:30 -0600
Subject: [PATCH] Add the M547x/M548x NOR_FLASH base address.
LTIBName: m547x-8x-NOR-FLASH-baseaddr
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/Kconfig | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -459,6 +459,7 @@ config NOR_FLASH_BASE
depends on COLDFIRE
default 0x00000000 if M54451EVB
default 0x00000000 if M54455EVB
+ default 0xE0000000 if M547X_8X
config M68KFPU_EMU
bool "Math emulation support (EXPERIMENTAL)"

View File

@ -1,32 +0,0 @@
From 8809b176ecde425d13cab8920a66fbfd6fb4c3b7 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 24 Jun 2008 23:26:54 -0600
Subject: [PATCH] Make sure interrupt handler calls aren't nested.
LTIBName: m5445x-fecint-nest
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/net/fec.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -23,6 +23,9 @@
*
* Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
* Copyright (c) 2004-2006 Macq Electronique SA.
+ *
+ * Coldfire bug fixes and cleanup by Kurt Mahan (kmahan@freescale.com)
+ * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/module.h>
@@ -1865,7 +1868,7 @@ static void __inline__ fec_request_intrs
/* Setup interrupt handlers. */
for (idp = id; idp->name; idp++) {
- if (request_irq(b+idp->irq, fec_enet_interrupt, 0,
+ if (request_irq(b+idp->irq, fec_enet_interrupt, IRQF_DISABLED,
idp->name, dev) != 0)
printk(KERN_ERR "FEC: Could not alloc %s IRQ(%d)!\n",
idp->name, b+idp->irq);

View File

@ -1,25 +0,0 @@
From 1667ce157c8cc2ffc13f1e31c64982d0af95d5a5 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 25 Jun 2008 01:34:30 -0600
Subject: [PATCH] Disable RAMBAR1 on initialization.
LTIBName: m5445x-rambar-init
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/head.S | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -296,9 +296,8 @@ ENTRY(__start)
movel %a0,%usp
#if defined(CONFIG_M5445X)
-/* JKM -- don't enable it currently -- fix */
-/* movel #(MCF_RAMBAR1 + 0x221), %d0 */
-/* movec %d0, %rambar1 */
+ movel #0x80000000, %d0
+ movec %d0, %rambar1
#elif defined(CONFIG_M547X_8X)
movel #MCF_MBAR, %d0
movec %d0, %mbar

View File

@ -1,699 +0,0 @@
From e1618e943f60a4f8f778c4f7c389e2fa13eb0a83 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 26 Jun 2008 16:29:56 -0600
Subject: [PATCH] Add I2C support for the M5445x platforms.
LTIBName: m5445x-i2c
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-mcf.c | 573 ++++++++++++++++++++++++++++++++++++++++++
drivers/i2c/busses/i2c-mcf.h | 75 ++++++
4 files changed, 659 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-mcf.c
create mode 100644 drivers/i2c/busses/i2c-mcf.h
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -302,6 +302,16 @@ config I2C_POWERMAC
This support is also available as a module. If so, the module
will be called i2c-powermac.
+config I2C_MCF
+ tristate "MCF ColdFire"
+ depends on I2C && EXPERIMENTAL
+ help
+ If you say yes to this option, support will be included for the
+ I2C on most ColdFire CPUs
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-mcf.
+
config I2C_MPC
tristate "MPC107/824x/85xx/52xx/86xx"
depends on PPC32
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3
obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
obj-$(CONFIG_I2C_MCF548x) += i2c-mcf548x.o
+obj-$(CONFIG_I2C_MCF) += i2c-mcf.o
ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
EXTRA_CFLAGS += -DDEBUG
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mcf.c
@@ -0,0 +1,573 @@
+/*
+ i2c-mcf.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
+
+ Copyright (c) 2005, Derek CL Cheung <derek.cheung@sympatico.ca>
+ <http://www3.sympatico.ca/derek.cheung>
+
+ Copyright (c) 2006-2007, emlix
+ Sebastian Hess <sh@emlix.com>
+
+ Copyright (c) 2006-2007 Freescale Semiconductor, Inc
+ Yaroslav Vinogradov <yaroslav.vinogradov@freescale.com>
+ Matt Waddel <Matt.Waddel@freescale.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ Changes:
+ v0.1 26 March 2005
+ Initial Release - developed on uClinux with 2.6.9 kernel
+
+ v0.2 29 May 2006
+ Modified to be more generic and added support for
+ i2c_master_xfer
+
+ This I2C adaptor supports the ColdFire CPU I2C module. Since most Coldfire
+ CPUs' I2C module use the same register set (e.g., MCF5249), the code is very
+ portable and re-usable to other Coldfire CPUs.
+
+ The transmission frequency is set at about 100KHz for the CPU board with
+ 8MHz crystal. If the CPU board uses different system clock frequency, you
+ should change the following line:
+ static int __init i2c_coldfire_init(void)
+ {
+ .........
+ // Set transmission frequency 0x15 = ~100kHz
+ *MCF_I2C_I2FDR = 0x15;
+ ........
+ }
+
+ Remember to perform a dummy read to set the ColdFire CPU's I2C module for
+ read before reading the actual byte from a device
+
+ The I2C_SM_BUS_BLOCK_DATA function are not yet ready but most lm_senors
+ do not care
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/types.h>
+#include <linux/platform_device.h>
+#include "i2c-mcf.h"
+
+
+static struct i2c_algorithm coldfire_algorithm = {
+ /*.name = "ColdFire I2C algorithm",
+ .id = I2C_ALGO_SMBUS,*/
+ .smbus_xfer = coldfire_i2c_access,
+ .master_xfer = coldfire_i2c_master,
+ .functionality = coldfire_func,
+};
+
+
+static struct i2c_adapter coldfire_adapter = {
+ .owner = THIS_MODULE,
+ .class = I2C_CLASS_HWMON,
+ .algo = &coldfire_algorithm,
+ .name = "ColdFire I2C adapter",
+};
+
+
+__u16 lastaddr;
+__u16 lastop;
+
+static inline int coldfire_do_first_start(__u16 addr,__u16 flags)
+{
+ int err;
+ /*
+ * Generate a stop and put the I2C module into slave mode
+ */
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MSTA;
+
+ /*
+ * Generate a new Start signal
+ */
+ err = coldfire_i2c_start(flags & I2C_M_RD ? I2C_SMBUS_READ : I2C_SMBUS_WRITE,
+ addr, FIRST_START);
+ if(err) return err;
+
+ lastaddr = addr;
+ lastop = flags & I2C_M_RD; /* Ensure everything for new start */
+ return 0;
+}
+
+
+/*
+ * read one byte data from the I2C bus
+ */
+static int coldfire_read_data(u8 * const rxData, const enum I2C_ACK_TYPE ackType) {
+
+ int timeout;
+
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MTX; /* master receive mode*/
+
+ if (ackType == NACK)
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; /* generate NA */
+ else
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK; /* generate ACK */
+
+
+ /* read data from the I2C bus */
+ *rxData = *MCF_I2C_I2DR;
+
+ /* printk(">>> %s I2DR data is %.2x \n", __FUNCTION__, *rxData); */
+
+ /* wait for data transfer to complete */
+ timeout = 500;
+ while (timeout-- && !(*MCF_I2C_I2SR & MCF_I2C_I2SR_IIF))
+ udelay(1);
+ if (timeout <= 0)
+ printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__,
+ timeout);
+
+
+ /* reset the interrupt bit */
+ *MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;
+
+ if (timeout <= 0 )
+ return -1;
+ else
+ return 0;
+
+};
+
+
+/*
+ * write one byte data onto the I2C bus
+ */
+static int coldfire_write_data(const u8 txData) {
+
+ int timeout;
+
+ timeout = 500;
+
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX; /* I2C module into TX mode */
+ *MCF_I2C_I2DR = txData; /* send the data */
+
+ /* wait for data transfer to complete */
+ /* rely on the interrupt handling bit */
+ timeout = 500;
+ while (timeout-- && !(*MCF_I2C_I2SR & MCF_I2C_I2SR_IIF))
+ udelay(1);
+ if (timeout <=0)
+ printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__,
+ timeout);
+
+
+ /* reset the interrupt bit */
+ *MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;
+
+ if (timeout <= 0 )
+ return -1;
+ else
+ return 0;
+
+};
+
+
+
+
+/*
+ * Generate I2C start or repeat start signal
+ * Combine the 7 bit target_address and the R/W bit and put it onto the I2C bus
+ */
+static int coldfire_i2c_start(const char read_write, const u16 target_address, const enum I2C_START_TYPE start_type) {
+
+ int timeout;
+
+ /* printk(">>> %s START TYPE %s \n", __FUNCTION__,
+ start_type == FIRST_START ? "FIRST_START":"REPEAT_START");*/
+
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_IEN;
+
+ if (start_type == FIRST_START) {
+ /* Make sure the I2C bus is idle */
+ timeout = 500; /* 500us timeout */
+ while (timeout-- && (*MCF_I2C_I2SR & MCF_I2C_I2SR_IBB))
+ udelay(1);
+ if (timeout <= 0) {
+ printk("%s - I2C bus always busy in the past 500us timeout is %d \n", __FUNCTION__, timeout);
+ goto check_rc;
+ }
+ /* generate a START and put the I2C module into MASTER TX mode*/
+ *MCF_I2C_I2CR |= (MCF_I2C_I2CR_MSTA | MCF_I2C_I2CR_MTX);
+
+ /* wait for bus busy to be set */
+ timeout = 500;
+ while (timeout-- && !(*MCF_I2C_I2SR & MCF_I2C_I2SR_IBB))
+ udelay(1);
+ if (timeout <= 0) {
+ printk("%s - I2C bus is never busy after START. Timeout is %d \n", __FUNCTION__, timeout);
+ goto check_rc;
+ }
+
+ } else {
+ /* this is repeat START */
+ udelay(500); /* need some delay before repeat start */
+ *MCF_I2C_I2CR |= (MCF_I2C_I2CR_MSTA | MCF_I2C_I2CR_RSTA);
+ }
+
+
+ /* combine the R/W bit and the 7 bit target address and put it onto
+ the I2C bus */
+ *MCF_I2C_I2DR = ((target_address & 0x7F) << 1) | (read_write == I2C_SMBUS_WRITE ? 0x00 : 0x01);
+
+ /* wait for bus transfer to complete */
+ /* when one byte transfer is completed, IIF set at the faling edge of
+ the 9th clock */
+ timeout = 500;
+ while (timeout-- && !(*MCF_I2C_I2SR & MCF_I2C_I2SR_IIF))
+ udelay(1);
+ if (timeout <= 0)
+ printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__, timeout);
+
+
+check_rc:
+ /* reset the interrupt bit */
+ *MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;
+
+ if (timeout <= 0)
+ return -1;
+ else
+ return 0;
+};
+
+
+/*
+ * 5282 SMBUS supporting functions
+ */
+
+static s32 coldfire_i2c_access(struct i2c_adapter *adap, u16 addr,
+ unsigned short flags, char read_write,
+ u8 command, int size, union i2c_smbus_data *data)
+{
+ int rc = 0;
+ u8 rxData, tempRxData[2];
+
+ switch (size) {
+ case I2C_SMBUS_QUICK:
+ rc = coldfire_i2c_start(read_write, addr, FIRST_START); /* generate START */
+ break;
+ case I2C_SMBUS_BYTE:
+ rc = coldfire_i2c_start(read_write, addr, FIRST_START);
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; /*generate NA */
+ if (read_write == I2C_SMBUS_WRITE)
+ rc += coldfire_write_data(command);
+ else {
+ coldfire_read_data(&rxData, NACK);/*dummy read*/
+ rc += coldfire_read_data(&rxData, NACK);
+ data->byte = rxData;
+ }
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK; /* reset ACK bit */
+ break;
+ case I2C_SMBUS_BYTE_DATA:
+ rc = coldfire_i2c_start(I2C_SMBUS_WRITE, addr, FIRST_START);
+ rc += coldfire_write_data(command);
+ if (read_write == I2C_SMBUS_WRITE)
+ rc += coldfire_write_data(data->byte);
+ else {
+ /* This is SMBus READ Byte Data Request.
+ Perform REPEAT START */
+ rc += coldfire_i2c_start(I2C_SMBUS_READ, addr,
+ REPEAT_START);
+ coldfire_read_data(&rxData, ACK);/* dummy read*/
+ /* Disable Acknowledge, generate STOP after
+ next byte transfer */
+ rc += coldfire_read_data(&rxData, NACK);
+ data->byte = rxData;
+ }
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK;/* reset to normal ACk */
+ break;
+ case I2C_SMBUS_PROC_CALL:
+ case I2C_SMBUS_WORD_DATA:
+ dev_info(&adap->dev, "size = I2C_SMBUS_WORD_DATA \n");
+ rc = coldfire_i2c_start(I2C_SMBUS_WRITE, addr,
+ FIRST_START);
+ rc += coldfire_write_data(command);
+ if (read_write == I2C_SMBUS_WRITE) {
+ rc += coldfire_write_data(data->word & 0x00FF);
+ rc += coldfire_write_data((data->word & 0x00FF) >> 8);
+ } else {
+ /* This is SMBUS READ WORD request.
+ Peform REPEAT START */
+ rc += coldfire_i2c_start(I2C_SMBUS_READ, addr,
+ REPEAT_START);
+ coldfire_read_data(&rxData, ACK);/* dummy read*/
+ /* Disable Acknowledge, generate STOP after
+ next byte transfer */
+ /* read the MS byte from the device */
+ rc += coldfire_read_data(&rxData, NACK);
+ tempRxData[1] = rxData;
+ /* read the LS byte from the device */
+ rc += coldfire_read_data(&rxData, NACK);
+ tempRxData[0] = rxData;
+ /* the host driver expect little endian
+ convention. Swap the byte */
+ data->word = (tempRxData[0] << 8)|tempRxData[1];
+ }
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK;
+ break;
+ case I2C_SMBUS_BLOCK_DATA:
+ /* Not done yet */
+ break;
+ default:
+ printk("Unsupported I2C size \n");
+ rc = -1;
+ break;
+ };
+
+ /* Generate a STOP and put I2C module into slave mode */
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MSTA;
+
+ /* restore interrupt */
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_IIEN;
+
+ if (rc < 0)
+ return -1;
+ else
+ return 0;
+};
+
+
+/*
+ * List the SMBUS functions supported by this I2C adaptor
+ * Also tell the I2C Subsystem that we are able of master_xfer()
+ */
+static u32 coldfire_func(struct i2c_adapter *adapter)
+{
+ return(I2C_FUNC_SMBUS_QUICK |
+ I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_PROC_CALL |
+ I2C_FUNC_SMBUS_BYTE_DATA |
+ I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_I2C |
+ I2C_FUNC_SMBUS_BLOCK_DATA);
+};
+
+static int coldfire_i2c_master(struct i2c_adapter *adap,struct i2c_msg *msgs,
+ int num)
+{
+ u8 dummyRead;
+ struct i2c_msg *p;
+ int i, err = 0;
+ int ic=0;
+
+ lastaddr = 0;
+ lastop = 8;
+
+ /* disable the IRQ, we are doing polling */
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_IIEN;
+
+ dev_dbg(&adap->dev,"Num of actions: %d\n", num);
+
+ for (i = 0; !err && i < num; i++) {
+ p = &msgs[i];
+
+
+ if (!p->len)
+ {
+ dev_dbg(&adap->dev,"p->len == 0!\n");
+ continue;
+ }
+ /*
+ * Generate a new Start, if the target address differs from
+ * the last target, generate a stop in this case first
+ */
+ if(p->addr != lastaddr)
+ {
+ err = coldfire_do_first_start(p->addr,p->flags);
+ if(err)
+ {
+ dev_dbg(&adap->dev,"First Init failed!\n");
+ break;
+ }
+ }
+
+ else if((p->flags & I2C_M_RD) != lastop)
+ {
+ /*
+ * If the Operational Mode changed, we need to do this
+ * here ...
+ */
+ dev_dbg(&adap->dev,"%s(): Direction changed, was: %d; is now: %d\n", __FUNCTION__, lastop, p->flags & I2C_M_RD);
+
+ /* Last op was an read, now it's write: complete stop
+ and reinit */
+ if (lastop & I2C_M_RD)
+ {
+ dev_dbg(&adap->dev,"%s(): The device is in read state, we must reset!\n", __FUNCTION__);
+ if((err = coldfire_do_first_start(p->addr,p->flags)))
+ break;
+ }
+ else
+ {
+ dev_dbg(&adap->dev,"%s(): We switchted to read mode\n",__FUNCTION__);
+ if((err = coldfire_i2c_start((p->flags & I2C_M_RD) ? I2C_SMBUS_READ : I2C_SMBUS_WRITE,
+ p->addr, REPEAT_START)))
+ break;
+ }
+
+ lastop = p->flags & I2C_M_RD; /* Save the last op */
+ }
+
+ if (p->flags & I2C_M_RD)
+ {
+ /*
+ * When ever we get here, a new session was activated,
+ * so read a dummy byte
+ */
+ coldfire_read_data(&dummyRead, ACK);
+ /*
+ * read p->len -1 bytes with ACK to the slave,
+ * read the last byte without the ACK, to inform him
+ * about the stop afterwards
+ */
+ ic = 0;
+ while(!err && (ic < p->len-1 ))
+ {
+ err = coldfire_read_data(p->buf+ic, ACK );
+ ic++;
+ }
+ if(!err)
+ err = coldfire_read_data(p->buf+ic, NACK);
+ dev_dbg(&coldfire_adapter.dev,"read: %2x\n",p->buf[ic]);
+ }
+ else
+ {
+ if(p->len == 2)
+ dev_dbg(&coldfire_adapter.dev,"writing: 0x %2x %2x\n", p->buf[0], p->buf[1]);
+
+ /*
+ * Write data to the slave
+ */
+ for(ic=0; !err && ic < p->len; ic++)
+ {
+ err = coldfire_write_data(p->buf[ic]);
+ if(err)
+ {
+ dev_dbg(&coldfire_adapter.dev, "Failed to write data\n");
+ }
+ }
+ }
+ }
+
+ /*
+ * Put the device into slave mode to enable the STOP Generation
+ * (the RTC needs this)
+ */
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MSTA;
+
+ *MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK; /* reset the ACK bit */
+
+ /* restore interrupt */
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_IIEN;
+
+ /* Return the number of messages processed, or the error code. */
+ if (err == 0)
+ err = num;
+ return err;
+}
+
+
+/*
+ * Initalize the 5282 I2C module
+ * Disable the 5282 I2C interrupt capability. Just use callback
+ */
+
+static int __init i2c_coldfire_init(void)
+{
+ int retval;
+ u8 dummyRead;
+
+#if defined(CONFIG_M532x) || defined(CONFIG_M5445X)
+ /*
+ * Initialize the GPIOs for I2C
+ */
+ MCF_GPIO_PAR_FECI2C |= (0
+ | MCF_GPIO_PAR_FECI2C_PAR_SDA(3)
+ | MCF_GPIO_PAR_FECI2C_PAR_SCL(3));
+#elif defined(CONFIG_M5253)
+ {
+ volatile u32 *reg;
+ /* GPIO Bit 41 = SCL0, Bit 42 = SDA0 */
+ reg = (volatile u32 *)(MCF_MBAR2 + MCFSIM2_GPIO1FUNC);
+ *reg &= 0xFFFFF9FF;
+ }
+#else
+ /* Initialize PASP0 and PASP1 to I2C functions, 5282 user guide 26-19 */
+ /* Port AS Pin Assignment Register (PASPAR) */
+ /* PASPA1 = 11 = AS1 pin is I2C SDA */
+ /* PASPA0 = 11 = AS0 pin is I2C SCL */
+ *MCF_GPIO_PASPAR |= 0x000F; /* u16 declaration */
+#endif
+
+
+ /* Set transmission frequency 0x15 = ~100kHz */
+ *MCF_I2C_I2FDR = 0x15;
+
+ /* set the 5282 I2C slave address though we never use it */
+ *MCF_I2C_I2ADR = 0x6A;
+
+ /* Enable I2C module and if IBB is set, do the special initialzation */
+ /* procedures as are documented at the 5282 User Guide page 24-11 */
+ *MCF_I2C_I2CR |= MCF_I2C_I2CR_IEN;
+ if ((*MCF_I2C_I2SR & MCF_I2C_I2SR_IBB) == 1) {
+ printk("%s - do special 5282 I2C init procedures \n",
+ __FUNCTION__);
+ *MCF_I2C_I2CR = 0x00;
+ *MCF_I2C_I2CR = 0xA0;
+ dummyRead = *MCF_I2C_I2DR;
+ *MCF_I2C_I2SR = 0x00;
+ *MCF_I2C_I2CR = 0x00;
+ }
+
+ /* default I2C mode is - slave and receive */
+ *MCF_I2C_I2CR &= ~(MCF_I2C_I2CR_MSTA | MCF_I2C_I2CR_MTX);
+
+ coldfire_adapter.dev.parent = &platform_bus;
+ retval = i2c_add_adapter(&coldfire_adapter);
+
+ if (retval < 0)
+ printk("%s - return code is: %d \n", __FUNCTION__, retval);
+
+ return retval;
+};
+
+
+/*
+ * I2C module exit function
+ */
+
+static void __exit i2c_coldfire_exit(void)
+{
+ /* disable I2C and Interrupt */
+ *MCF_I2C_I2CR &= ~(MCF_I2C_I2CR_IEN | MCF_I2C_I2CR_IIEN);
+ i2c_del_adapter(&coldfire_adapter);
+
+};
+
+
+MODULE_AUTHOR("Derek CL Cheung <derek.cheung@sympatico.ca>");
+MODULE_DESCRIPTION("MCF5282 I2C adaptor");
+MODULE_LICENSE("GPL");
+
+module_init(i2c_coldfire_init);
+module_exit(i2c_coldfire_exit);
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mcf.h
@@ -0,0 +1,75 @@
+/*
+ i2c-mcf.h - header file for i2c-mcf.c
+
+ Copyright (c) 2005, Derek CL Cheung <derek.cheung@sympatico.ca>
+ <http://www3.sympatico.ca/derek.cheung>
+
+ Copyright (c) 2006-2007, emlix
+ Sebastian Hess <sh@emlix.com>
+
+ Copyright (c) 2006-2007 Freescale Semiconductor, Inc
+ Yaroslav Vinogradov <yaroslav.vinogradov@freescale.com>
+ Matt Waddel <Matt.Waddel@freescale.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ Changes:
+ v0.1 26 March 2005
+ Initial Release - developed on uClinux with 2.6.9 kernel
+ v0.2 29 May 2006
+ Modified to be more generic and added support for
+ i2c_master_xfer
+*/
+
+
+#ifndef __I2C_MCF_H__
+#define __I2C_MCF_H__
+
+enum I2C_START_TYPE { FIRST_START, REPEAT_START };
+enum I2C_ACK_TYPE { ACK, NACK};
+
+/* Function prototypes */
+static u32 coldfire_func(struct i2c_adapter *adapter);
+static s32 coldfire_i2c_access(struct i2c_adapter *adap, u16 address,
+ unsigned short flags, char read_write,
+ u8 command, int size, union i2c_smbus_data *data);
+static int coldfire_write_data(const u8 data);
+static int coldfire_i2c_start(const char read_write, const u16 target_address, const enum I2C_START_TYPE i2c_start);
+static int coldfire_read_data(u8 * const rxData, const enum I2C_ACK_TYPE ackType);
+static int coldfire_i2c_master(struct i2c_adapter *adap,struct i2c_msg *msgs, int num);
+void dumpReg(char *, u16 addr, u8 data);
+
+#define MCF_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01)
+#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F))
+
+/* I2C Control Register */
+#define MCF_I2C_I2CR_IEN (0x80) /* I2C enable */
+#define MCF_I2C_I2CR_IIEN (0x40) /* interrupt enable */
+#define MCF_I2C_I2CR_MSTA (0x20) /* master/slave mode */
+#define MCF_I2C_I2CR_MTX (0x10) /* transmit/receive mode */
+#define MCF_I2C_I2CR_TXAK (0x08) /* transmit acknowledge enable */
+#define MCF_I2C_I2CR_RSTA (0x04) /* repeat start */
+
+/* I2C Status Register */
+#define MCF_I2C_I2SR_ICF (0x80) /* data transfer bit */
+#define MCF_I2C_I2SR_IAAS (0x40) /* I2C addressed as a slave */
+#define MCF_I2C_I2SR_IBB (0x20) /* I2C bus busy */
+#define MCF_I2C_I2SR_IAL (0x10) /* aribitration lost */
+#define MCF_I2C_I2SR_SRW (0x04) /* slave read/write */
+#define MCF_I2C_I2SR_IIF (0x02) /* I2C interrupt */
+#define MCF_I2C_I2SR_RXAK (0x01) /* received acknowledge */
+
+/********************************************************************/
+#endif /* __I2C_MCF_H__ */

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@ -1,24 +0,0 @@
From 69446dbc7af1fddf00f3ad0629008dd6875704a7 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Wed, 2 Jul 2008 16:03:56 -0600
Subject: [PATCH] Add disable_irq_nosync alias to disable_irq.
LTIBName: mcfv4e-disable-irq-nosync
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/ints.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
--- a/arch/m68k/coldfire/ints.c
+++ b/arch/m68k/coldfire/ints.c
@@ -317,6 +317,10 @@ void disable_irq(unsigned int irq)
}
EXPORT_SYMBOL(disable_irq);
+void disable_irq_nosync(unsigned int irq) __attribute__((alias("disable_irq")));
+EXPORT_SYMBOL(disable_irq_nosync);
+
+
unsigned long probe_irq_on(void)
{
return 0;

View File

@ -1,32 +0,0 @@
From 39929365081d5aa7c311ee8325c7f1a0ffb88a76 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Mon, 7 Jul 2008 23:37:30 -0600
Subject: [PATCH] Enable uboot bootargs.
LTIBName: mcfv4e-uboot-bootargs
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 5 -----
1 files changed, 0 insertions(+), 5 deletions(-)
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -196,7 +196,6 @@ asmlinkage void __init cf_early_init(voi
m68k_memory[m68k_num_memory].addr = CONFIG_SDRAM_BASE;
m68k_memory[m68k_num_memory++].size = CONFIG_SDRAM_SIZE;
-#if 0
if (!uboot_commandline(m68k_command_line)) {
#if defined(CONFIG_BOOTPARAM)
strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE-1);
@@ -204,10 +203,6 @@ asmlinkage void __init cf_early_init(voi
strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
#endif
}
-#endif
-/* JKM -- temporary! */
-strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
-/* JKM -- temporary! */
#if defined(CONFIG_BLK_DEV_INITRD)
/* add initrd image */

View File

@ -1,56 +0,0 @@
From 09895934aaddf4f08345798068b41344068c7b56 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 8 Jul 2008 00:59:38 -0600
Subject: [PATCH] Fix exception handling to properly get vector.
LTIBName: mcfv4e-except-vector-fix
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/traps.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
--- a/arch/m68k/coldfire/traps.c
+++ b/arch/m68k/coldfire/traps.c
@@ -7,6 +7,7 @@
* 68040 fixes by Martin Apel
* 68060 fixes by Roman Hodek
* 68060 fixes by Jesper Skov
+ * Coldfire fixes by Kurt Mahan
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -288,13 +289,13 @@ void show_stack(struct task_struct *task
void bad_super_trap(struct frame *fp)
{
console_verbose();
- if (fp->ptregs.vector < 4*sizeof(vec_names)/sizeof(vec_names[0]))
+ if (fp->ptregs.vector < sizeof(vec_names)/sizeof(vec_names[0]))
printk(KERN_WARNING "*** %s *** FORMAT=%X\n",
- vec_names[(fp->ptregs.vector) >> 2],
+ vec_names[fp->ptregs.vector],
fp->ptregs.format);
else
printk(KERN_WARNING "*** Exception %d *** FORMAT=%X\n",
- (fp->ptregs.vector) >> 2,
+ fp->ptregs.vector,
fp->ptregs.format);
printk(KERN_WARNING "Current process id is %d\n", current->pid);
die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
@@ -306,7 +307,7 @@ asmlinkage void trap_c(struct frame *fp)
siginfo_t info;
if (fp->ptregs.sr & PS_S) {
- if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
+ if (fp->ptregs.vector == VEC_TRACE) {
/* traced a trapping instruction */
current->ptrace |= PT_DTRACE;
} else
@@ -315,7 +316,7 @@ asmlinkage void trap_c(struct frame *fp)
}
/* send the appropriate signal to the user program */
- switch ((fp->ptregs.vector) >> 2) {
+ switch (fp->ptregs.vector) {
case VEC_ADDRERR:
info.si_code = BUS_ADRALN;
sig = SIGBUS;

View File

@ -1,265 +0,0 @@
From 3c6c80a04d6ca99c4f9fbb5e4f279bd644b2df48 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 8 Jul 2008 14:10:46 -0600
Subject: [PATCH] Add Coldfire Watchdog support.
LTIBName: mcfv4e-watchdog
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
drivers/watchdog/Kconfig | 9 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/mcf_wdt.c | 220 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 230 insertions(+), 0 deletions(-)
create mode 100644 drivers/watchdog/mcf_wdt.c
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -672,6 +672,15 @@ config TXX9_WDT
# PARISC Architecture
+# ColdFire Architecture
+
+config COLDFIRE_WATCHDOG
+ tristate "ColdFire watchdog support"
+ depends on WATCHDOG
+ help
+ To compile this driver as a module, choose M here: the
+ module will be called softdog.
+
# POWERPC Architecture
config MPC5200_WDT
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc
# M32R Architecture
# M68K Architecture
+obj-$(CONFIG_COLDFIRE_WATCHDOG) += mcf_wdt.o
# M68KNOMMU Architecture
--- /dev/null
+++ b/drivers/watchdog/mcf_wdt.c
@@ -0,0 +1,220 @@
+/*
+ * drivers/watchdog/mcf_wdt.c
+ *
+ * Watchdog driver for ColdFire processors
+ *
+ * Adapted from the IXP4xx watchdog driver.
+ * The original version carries these notices:
+ *
+ * Author: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * Copyright 2004 (c) MontaVista, Software, Inc.
+ * Based on sa1100 driver, Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/init.h>
+#include <linux/bitops.h>
+
+#include <asm-m68k/uaccess.h>
+#include <asm-m68k/coldfire.h>
+#include <asm-m68k/m5485gpt.h>
+
+static int nowayout;
+static unsigned int heartbeat = 30; /* (secs) Default is 0.5 minute */
+static unsigned long wdt_status;
+
+#define WDT_IN_USE 0
+#define WDT_OK_TO_CLOSE 1
+
+static unsigned long wdt_tick_rate;
+
+static void
+wdt_enable(void)
+{
+ MCF_GPT_GMS0 = 0;
+ MCF_GPT_GCIR0 = MCF_GPT_GCIR_PRE(heartbeat*wdt_tick_rate) |
+ MCF_GPT_GCIR_CNT(0xffff);
+ MCF_GPT_GMS0 = MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS_WDEN |
+ MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS_GPIO;
+}
+
+static void
+wdt_disable(void)
+{
+ MCF_GPT_GMS0 = 0;
+}
+
+static void
+wdt_keepalive(void)
+{
+ MCF_GPT_GMS0 = MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS0;
+}
+
+static int
+mcf_wdt_open(struct inode *inode, struct file *file)
+{
+ if (test_and_set_bit(WDT_IN_USE, &wdt_status))
+ return -EBUSY;
+
+ clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
+
+ wdt_enable();
+
+ return nonseekable_open(inode, file);
+}
+
+static ssize_t
+mcf_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
+{
+ if (len) {
+ if (!nowayout) {
+ size_t i;
+
+ clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
+
+ for (i = 0; i != len; i++) {
+ char c;
+
+ if (get_user(c, data + i))
+ return -EFAULT;
+ if (c == 'V')
+ set_bit(WDT_OK_TO_CLOSE, &wdt_status);
+ }
+ }
+ wdt_keepalive();
+ }
+
+ return len;
+}
+
+
+static struct watchdog_info ident = {
+ .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
+ WDIOF_KEEPALIVEPING,
+ .identity = "Coldfire Watchdog",
+};
+
+static int
+mcf_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ int ret = -ENOIOCTLCMD;
+ int time;
+
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ ret = copy_to_user((struct watchdog_info *)arg, &ident,
+ sizeof(ident)) ? -EFAULT : 0;
+ break;
+
+ case WDIOC_GETSTATUS:
+ ret = put_user(0, (int *)arg);
+ break;
+
+ case WDIOC_GETBOOTSTATUS:
+ ret = put_user(0, (int *)arg);
+ break;
+
+ case WDIOC_SETTIMEOUT:
+ ret = get_user(time, (int *)arg);
+ if (ret)
+ break;
+
+ if (time <= 0 || time > 30) {
+ ret = -EINVAL;
+ break;
+ }
+
+ heartbeat = time;
+ wdt_enable();
+ /* Fall through */
+
+ case WDIOC_GETTIMEOUT:
+ ret = put_user(heartbeat, (int *)arg);
+ break;
+
+ case WDIOC_KEEPALIVE:
+ wdt_keepalive();
+ ret = 0;
+ break;
+ }
+
+ return ret;
+}
+
+static int
+mcf_wdt_release(struct inode *inode, struct file *file)
+{
+ if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) {
+ wdt_disable();
+ } else {
+ printk(KERN_CRIT "WATCHDOG: Device closed unexpectdly - "
+ "timer will not stop\n");
+ }
+
+ clear_bit(WDT_IN_USE, &wdt_status);
+ clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
+
+ return 0;
+}
+
+
+static struct file_operations mcf_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = mcf_wdt_write,
+ .ioctl = mcf_wdt_ioctl,
+ .open = mcf_wdt_open,
+ .release = mcf_wdt_release,
+};
+
+static struct miscdevice mcf_wdt_miscdev = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &mcf_wdt_fops,
+};
+
+static int __init mcf_wdt_init(void)
+{
+ wdt_tick_rate = MCF_BUSCLK/0xffff;
+#ifdef CONFIG_WATCHDOG_NOWAYOUT
+ nowayout = 1;
+#else
+ nowayout = 0;
+#endif
+ printk("ColdFire watchdog driver is loaded.\n");
+
+ return misc_register(&mcf_wdt_miscdev);
+}
+
+static void __exit mcf_wdt_exit(void)
+{
+ misc_deregister(&mcf_wdt_miscdev);
+}
+
+module_init(mcf_wdt_init);
+module_exit(mcf_wdt_exit);
+
+MODULE_AUTHOR("Deepak Saxena");
+MODULE_DESCRIPTION("ColdFire Watchdog");
+
+module_param(heartbeat, int, 0);
+MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds (default 60s)");
+
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+

View File

@ -1,237 +0,0 @@
From 5f645d0668b469c4738fe1e9d3994287a519d0f3 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 8 Jul 2008 15:57:47 -0600
Subject: [PATCH] Add Coldfire IRDA support in serial driver.
LTIBName: mcfv4e-irda
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: Huan, Wang <b18965@freescale.com>
---
drivers/serial/Kconfig | 6 ++
drivers/serial/mcfserial.c | 110 ++++++++++++++++++++++++++++++++++++++++++--
net/irda/irlap.c | 2 +-
3 files changed, 113 insertions(+), 5 deletions(-)
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -979,6 +979,12 @@ config SERIAL_COLDFIRE
This driver supports the built-in serial ports of the Motorola ColdFire
family of CPUs.
+config SERIAL_COLDFIRE_IRDA
+ bool "ColdFire IRDA support"
+ depends on SERIAL_COLDFIRE
+ help
+ This driver supports IRDA on the Motorola ColdFire.
+
config SERIAL_MCF
bool "Coldfire serial support (new style driver)"
depends on COLDFIRE
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -109,6 +109,10 @@ static struct tty_driver *mcfrs_serial_d
#define IRQBASE 73
#endif
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+#define SERIAL_IRDA_LINE (2)
+#endif
+
/*
* Configuration table, UARTs to look for at startup.
*/
@@ -393,6 +397,9 @@ static inline void receive_chars(struct
static inline void transmit_chars(struct mcf_serial *info)
{
volatile unsigned char *uartp;
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ int i;
+#endif
uartp = info->addr;
@@ -404,13 +411,36 @@ static inline void transmit_chars(struct
}
if ((info->xmit_cnt <= 0) || info->tty->stopped) {
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ if (info->line == SERIAL_IRDA_LINE) {
+ /* Enable receiver for IRDA */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX;
+ /* reset RX */
+ uartp[MCFUART_UCR] = MCFUART_UCR_TXENABLE | MCFUART_UCR_RXENABLE;
+ }
+#endif
info->imr &= ~MCFUART_UIR_TXREADY;
uartp[MCFUART_UIMR] = info->imr;
return;
}
while (uartp[MCFUART_USR] & MCFUART_USR_TXREADY) {
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ if (info->line == SERIAL_IRDA_LINE) {
+ while (!(uartp[MCFUART_USR] & MCFUART_USR_TXEMPTY));
+ i = 0;
+ /* delay for settle */
+#if defined(CONFIG_M548X)
+ udelay(1);
+#elif defined(CONFIG_M547X)
+ udelay(2);
+#else
+ while (i++ < 25000) udelay(1);
+#endif
+ }
+#endif
uartp[MCFUART_UTB] = info->xmit_buf[info->xmit_tail++];
+
info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1);
info->stats.tx++;
if (--info->xmit_cnt <= 0)
@@ -567,6 +597,28 @@ static int startup(struct mcf_serial * i
*/
mcfrs_change_speed(info);
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ if (info->line == SERIAL_IRDA_LINE) {
+ /* Put PSC in IrDA mode */
+ MCF_PSC_SICR(info->line) = MCF_PSC_SICR_SIM_SIR;
+
+ /* Set pulse width to 1.6 uS */
+ MCF_PSC_IRSDR(info->line) = (uint8_t)
+ (16 * (CONFIG_MCFCLK / 10000000));
+ MCF_PSC_IRCR1(info->line) = MCF_PSC_IRCR1_SPUL;
+ MCF_PSC_IRCR2(info->line) = 0;
+
+ /* Enable RTS to send */
+ MCF_PSC_OPSET(info->line) = MCF_PSC_OPSET_RTS;
+
+ /* Setup FIFO Alarms */
+ MCF_PSC_RFAR(info->line) = MCF_PSC_RFAR_ALARM(248);
+ MCF_PSC_TFAR(info->line) = MCF_PSC_TFAR_ALARM(248);
+
+ MCF_PSC_RFCR(info->line) = MCF_PSC_RFCR_FRMEN | MCF_PSC_RFCR_GR(4);
+ MCF_PSC_TFCR(info->line) = MCF_PSC_TFCR_FRMEN | MCF_PSC_RFCR_GR(4);
+ }
+#endif
/*
* Lastly enable the UART transmitter and receiver, and
* interrupt enables.
@@ -588,10 +640,20 @@ static void shutdown(struct mcf_serial *
{
volatile unsigned char *uartp;
unsigned long flags;
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ unsigned long delay_counter = 0;
+#endif
if (!(info->flags & ASYNC_INITIALIZED))
return;
-
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ uartp = (volatile unsigned char *) info->addr;
+ while (!(uartp[MCFUART_USR] & MCFUART_USR_TXEMPTY)) {
+ if(delay_counter++ > 25000)
+ break;
+ udelay(10);
+ }
+#endif
#ifdef SERIAL_DEBUG_OPEN
printk("Shutting down serial port %d (irq %d)....\n", info->line,
info->irq);
@@ -820,10 +882,19 @@ static int mcfrs_write(struct tty_struct
local_irq_disable();
uartp = info->addr;
+
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ if (info->line == SERIAL_IRDA_LINE) {
+ /* Disable IRDA receiver*/
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
+
+ uartp[MCFUART_UCR] = MCFUART_UCR_TXENABLE;
+ }
+#endif
info->imr |= MCFUART_UIR_TXREADY;
uartp[MCFUART_UIMR] = info->imr;
local_irq_restore(flags);
-
return total;
}
@@ -884,9 +955,21 @@ static void mcfrs_throttle(struct tty_st
if (serial_paranoia_check(info, tty->name, "mcfrs_throttle"))
return;
-
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ if (I_IXOFF(tty)) {
+ /* Force STOP_CHAR (xoff) out */
+ volatile unsigned char *uartp;
+ unsigned long flags;
+ uartp = (volatile unsigned char *) info->addr;
+ local_irq_save(flags);
+ info->imr |= MCFUART_UIR_TXREADY;
+ uartp[MCFUART_UIMR] = info->imr;
+ local_irq_restore(flags);
+ }
+#else
if (I_IXOFF(tty))
info->x_char = STOP_CHAR(tty);
+#endif
/* Turn off RTS line (do this atomic) */
}
@@ -907,8 +990,22 @@ static void mcfrs_unthrottle(struct tty_
if (I_IXOFF(tty)) {
if (info->x_char)
info->x_char = 0;
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ else {
+ /* Force START_CHAR (xon) out */
+ volatile unsigned char *uartp;
+ unsigned long flags;
+ info->x_char = START_CHAR(tty);
+ uartp = (volatile unsigned char *) info->addr;
+ local_irq_save(flags);
+ info->imr |= MCFUART_UIR_TXREADY;
+ uartp[MCFUART_UIMR] = info->imr;
+ local_irq_restore(flags);
+ }
+#else
else
info->x_char = START_CHAR(tty);
+#endif
}
/* Assert RTS line (do this atomic) */
@@ -1156,12 +1253,17 @@ static int mcfrs_ioctl(struct tty_struct
static void mcfrs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
{
struct mcf_serial *info = (struct mcf_serial *)tty->driver_data;
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ int i = 0; /* hush GCC */
+#endif
if (tty->termios->c_cflag == old_termios->c_cflag)
return;
+#ifdef CONFIG_SERIAL_COLDFIRE_IRDA
+ while (i++ < 35000) udelay(1);
+#endif
mcfrs_change_speed(info);
-
if ((old_termios->c_cflag & CRTSCTS) &&
!(tty->termios->c_cflag & CRTSCTS)) {
tty->hw_stopped = 0;
--- a/net/irda/irlap.c
+++ b/net/irda/irlap.c
@@ -627,7 +627,7 @@ void irlap_status_indication(struct irla
{
switch (quality_of_link) {
case STATUS_NO_ACTIVITY:
- IRDA_MESSAGE("IrLAP, no activity on link!\n");
+ /* IRDA_MESSAGE("IrLAP, no activity on link!\n"); */
break;
case STATUS_NOISY:
IRDA_MESSAGE("IrLAP, noisy link!\n");

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,60 +0,0 @@
From db94c8c3ec831b5fab828487ba05041bc048fccf Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Tue, 15 Jul 2008 17:48:11 -0600
Subject: [PATCH] Move VMALLOC region to a valid area.
LTIBName: mcfv4e-vmalloc-fix
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/mm/cf-mmu.c | 7 +------
include/asm-m68k/pgtable.h | 6 +++++-
2 files changed, 6 insertions(+), 7 deletions(-)
--- a/arch/m68k/mm/cf-mmu.c
+++ b/arch/m68k/mm/cf-mmu.c
@@ -35,7 +35,7 @@
#include <asm/coldfire.h>
#include <asm/tlbflush.h>
-#define KMAPAREA(x) ((x >= KMAP_START) && ( x < KMAP_END))
+#define KMAPAREA(x) ((x >= VMALLOC_START) && ( x < KMAP_END))
#undef DEBUG
@@ -62,11 +62,6 @@ void free_initmem(void)
unsigned long start = (unsigned long)&__init_begin;
unsigned long end = (unsigned long)&__init_end;
-/*
- * JKM -- revisit -- the latest round of vmlinux.lds changes has caused
- * a little grief with how init areas are handled. With the new toolchain
- * release I'll fix this.
- */
printk(KERN_INFO "free_initmem: __init_begin = 0x%lx __init_end = 0x%lx\n", start, end);
addr = (unsigned long)&__init_begin;
--- a/include/asm-m68k/pgtable.h
+++ b/include/asm-m68k/pgtable.h
@@ -73,7 +73,9 @@
#define KMAP_START 0x0DC00000
#define KMAP_END 0x0E000000
#elif defined(CONFIG_COLDFIRE)
-#define KMAP_START 0xd0000000
+#define VMALLOC_START 0xc0000000
+#define VMALLOC_END 0xcfffffff
+#define KMAP_START (VMALLOC_END + 1)
#define KMAP_END 0xe0000000
#else
#define KMAP_START 0xd0000000
@@ -88,9 +90,11 @@
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
+#if !defined(CONFIG_COLDFIRE)
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END KMAP_START
+#endif
#else
extern unsigned long vmalloc_end;
#define VMALLOC_START 0x0f800000

View File

@ -1,24 +0,0 @@
From 6cf498f4cf1930950d31aff5669bdba97d12364c Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 17 Jul 2008 15:02:23 -0600
Subject: [PATCH] Properly clear bits in DIPR.
Bugzilla 1351.
LTIBName: m547x-8x-dma-dipr
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/m547x_8x-dma.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/m68k/coldfire/m547x_8x-dma.c
+++ b/arch/m68k/coldfire/m547x_8x-dma.c
@@ -455,7 +455,7 @@ irqreturn_t dma_interrupt_handler(int ir
* pending interrupts with those that aren't masked.
*/
interrupts = MCF_DMA_DIPR;
- MCF_DMA_DIPR |= interrupts;
+ MCF_DMA_DIPR = interrupts;
for (i = 0; i < 16; ++i, interrupts >>= 1) {
if (interrupts & 0x1)

View File

@ -1,36 +0,0 @@
From b3a11478f28a24b719ff6426f52216c37c3331d7 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Thu, 17 Jul 2008 17:02:29 -0600
Subject: [PATCH] Enable watchdog to reboot the processor.
LTIBName: m547x-8x-reboot-wd
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
---
arch/m68k/coldfire/config.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
--- a/arch/m68k/coldfire/config.c
+++ b/arch/m68k/coldfire/config.c
@@ -50,6 +50,10 @@
#include <asm/mcf5445x_xbs.h>
#endif
+#ifdef CONFIG_M547X_8X
+#include <asm/m5485gpt.h>
+#endif
+
extern int get_irq_list(struct seq_file *p, void *v);
extern char _text, _end;
extern char _etext, _edata, __init_begin, __init_end;
@@ -379,6 +383,11 @@ void coldfire_reboot(void)
"moveb #0x80, %%d0\n\t"
"moveb %%d0, 0xfc0a0000\n\t"
: : : "%d0");
+#elif defined(CONFIG_M547X_8X)
+ /* disable interrupts and enable the watchdog */
+ printk(KERN_INFO "Rebooting\n");
+ asm("movew #0x2700, %sr\n");
+ MCF_GPT_GMS0 = MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4);
#endif
}

View File

@ -1,123 +0,0 @@
From b9607c9083b767eac26df1d39a030f3cba5d3ae3 Mon Sep 17 00:00:00 2001
From: Kurt Mahan <kmahan@freescale.com>
Date: Fri, 18 Jul 2008 12:40:04 -0600
Subject: [PATCH] Increase timeouts on I2C bus.
LTIBName: m547x-8x-i2c-timeout-fix
Signed-off-by: Shrek Wu <b16972@freescale.com>
---
drivers/i2c/busses/i2c-mcf548x.c | 40 +++++++++++++++++++++++++++++--------
1 files changed, 31 insertions(+), 9 deletions(-)
--- a/drivers/i2c/busses/i2c-mcf548x.c
+++ b/drivers/i2c/busses/i2c-mcf548x.c
@@ -43,8 +43,8 @@ static struct i2c_adapter i2c_mcf_board_
.id = I2C_HW_MPC107,
.algo_data = &i2c_mcf_board_data,
.class = I2C_CLASS_HWMON,
- .timeout = 1,
- .retries = 1
+ .timeout = 100,
+ .retries = 2
};
/*
* static void i2c_start()
@@ -105,7 +105,7 @@ wait_for_bb(
for (i = 0; i < adap->timeout; i++) {
if (!(MCF_I2SR & MCF_I2SR_IBB))
return 0;
- udelay(10);
+ udelay(100);
}
printk(KERN_ERR "%s: timeout", __FUNCTION__);
return -ETIMEDOUT;
@@ -124,7 +124,7 @@ wait_for_not_bb(
for (i = 0; i < adap->timeout; i++) {
if (MCF_I2SR & MCF_I2SR_IBB)
return 0;
- udelay(10);
+ udelay(100);
}
printk(KERN_ERR "%s: timeout", __FUNCTION__);
return -ETIMEDOUT;
@@ -146,7 +146,7 @@ wait_xfer_done(
MCF_I2SR &= ~MCF_I2SR_IIF;
return 0;
}
- udelay(1);
+ udelay(10);
}
printk(KERN_ERR "%s: timeout", __FUNCTION__);
return -ETIMEDOUT;
@@ -166,7 +166,7 @@ i2c_set_addr(
) {
unsigned short flags = msg->flags;
unsigned char addr;
-
+ MCF_I2CR |= MCF_I2CR_MTX;
if ((flags & I2C_M_TEN)) {
/* 10 bit address not supported yet */
return -EIO;
@@ -269,7 +269,7 @@ mcf_sendbytes(
i2c_stop(adap);
wait_for_bb(adap);
} else {
- i2c_repstart(adap);
+ /* i2c_repstart(adap);*/
}
return (i);
@@ -330,7 +330,7 @@ mcf_readbytes(
i2c_stop(adap);
wait_for_bb(adap);
} else {
- i2c_repstart(adap);
+ /* i2c_repstart(adap);*/
}
return (i+1);
@@ -380,6 +380,27 @@ mcf_xfer(
wait_for_bb(adap);
for (i = 0; ret >= 0 && i < num; i++) {
+ if (MCF_I2SR & MCF_I2SR_IBB) {
+ MCF_I2ICR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2CR = 0x0A;
+ timeout = MCF_I2DR;
+ MCF_I2SR = 0x00;
+ MCF_I2CR = 0x00;
+ MCF_I2ICR = 0x01;
+ }
+ /* setup SCL clock */
+ MCF_I2FDR = get_clock(adap);
+ /* set slave address */
+ MCF_I2AR = get_own(adap);
+ /* enable I2C module */
+ MCF_I2CR = MCF_I2CR_IEN;
+
+ MCF_I2CR |= MCF_I2CR_TXAK;
+
+ /* Check for bus busy */
+ wait_for_bb(adap);
+
pmsg = &msgs[i];
printk(KERN_DEBUG "i2c-algo-mcf: Doing %s %d bytes "
@@ -388,7 +409,7 @@ mcf_xfer(
pmsg->len, pmsg->addr, i + 1, num);
/* Send START */
- if (i == 0)
+ /*if (i == 0)*/
i2c_start(adap);
/* Wait for Bus Busy */
@@ -440,6 +461,7 @@ mcf_xfer(
"%d bytes.\n", ret);
}
}
+ MCF_I2CR = 0;
}
/* Disable I2C module */

View File

@ -1,49 +0,0 @@
Bugzilla 1647. This patch resets PCI which fixes the USB problem on mcf5475.
Set PCI registers MCF_PCIGSCR and MCF_PCITCR to their reset defaults.
This fixes the USB problem and enables other PCI cards, such as PCI
network to function properly.
Original work of Matt Waddel
Signed-off-by: Ross Wille
--- a/arch/m68k/coldfire/mcf548x-pci.c
+++ b/arch/m68k/coldfire/mcf548x-pci.c
@@ -1,5 +1,23 @@
/*
* ColdFire 547x/548x PCI Host Controller functions
+ *
+ * Copyright (c) 2005-2008 Freescale Semiconductor, Inc.
+ *
+ * This code is based on the 2.6.10 version of pci.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/kernel.h>
#include <linux/types.h>
@@ -815,6 +833,13 @@ struct pci_bus_info *__init init_coldfir
return NULL;
}
+ /* Must Reset!!! If bootloader has PCI enabled, it will cause
+ * problem in linux when it tries to configure/find resources
+ * for the pci devices. Both registers need to be reset.
+ */
+ MCF_PCIGSCR = 0x1;
+ MCF_PCITCR = 0x00000000;
+
/* Set up the arbiter */
MCF_PCIARB_PACR = 0 /*MCF_PCIARB_PACR_PKMD*/
| MCF_PCIARB_PACR_INTMPRI

View File

@ -1,27 +0,0 @@
Re-enable rx fifo buffer checks.
LTIBName: linux-2.6.25-m547x-8x-fec-rxfifo-check
Acked-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: Shrek Wu <b16972@freescale.com>
--- a/drivers/net/fec/fec.c
+++ b/drivers/net/fec/fec.c
@@ -941,9 +941,9 @@ void fec_interrupt_fec_rx_handler(struct
{
struct fec_priv *fp = netdev_priv(dev);
struct sk_buff *skb;
+ int i;
fp->fecpriv_rxflag = 1;
-/*
// Some buffers can be missed
if(!(fp->fecpriv_rxdesc[fp->fecpriv_current_rx].statCtrl & MCD_FEC_END_FRAME))
{
@@ -961,7 +961,7 @@ void fec_interrupt_fec_rx_handler(struct
return;
}
}
-*/
+
for (; fp->fecpriv_rxdesc[fp->fecpriv_current_rx].statCtrl & MCD_FEC_END_FRAME; fp->fecpriv_current_rx = (fp->fecpriv_current_rx + 1) & FEC_RX_INDEX_MASK) {
if( (fp->fecpriv_rxdesc[fp->fecpriv_current_rx].length <= FEC_MAXBUF_SIZE) &&
(fp->fecpriv_rxdesc[fp->fecpriv_current_rx].length > 4)) { /* --tym-- */

View File

@ -1,21 +0,0 @@
--- a/include/asm-m68k/cf_pgtable.h
+++ b/include/asm-m68k/cf_pgtable.h
@@ -176,7 +176,7 @@ extern inline pte_t pte_modify(pte_t pte
#define pmd_set(pmdp, ptep) do {} while (0)
-extern inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
+static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
{
pgd_val(*pgdp) = virt_to_phys(pmdp);
}
--- a/arch/m68k/mm/cf-mmu.c
+++ b/arch/m68k/mm/cf-mmu.c
@@ -21,6 +21,7 @@
#include <linux/blkdev.h>
#endif
#include <linux/bootmem.h>
+#include <linux/highmem.h>
#include <asm/setup.h>
#include <asm/uaccess.h>