1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-25 03:13:20 +02:00

[ar71xx] fix handling of invalid arguments passed by some bootloaders (thanks to Jeff Hansen and to Jonas)

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14382 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2009-02-03 07:26:31 +00:00
parent 45853310d3
commit 0c5fc41bd6
4 changed files with 24 additions and 8 deletions

View File

@ -59,6 +59,9 @@
#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
#define AR91XX_WMAC_SIZE 0x30000
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x8000000
#define AR71XX_CPU_IRQ_BASE 0
#define AR71XX_MISC_IRQ_BASE 8
#define AR71XX_MISC_IRQ_COUNT 8

View File

@ -73,18 +73,31 @@ static struct board_rec boards[] __initdata = {
}
};
static inline int is_valid_ram_addr(void *addr)
{
if (((u32) addr > KSEG0) &&
((u32) addr < (KSEG0 + AR71XX_MEM_SIZE_MAX)))
return 1;
if (((u32) addr > KSEG1) &&
((u32) addr < (KSEG1 + AR71XX_MEM_SIZE_MAX)))
return 1;
return 0;
}
static __init char *ar71xx_prom_getargv(const char *name)
{
int len = strlen(name);
int i;
if (!ar71xx_prom_argv)
if (!is_valid_ram_addr(ar71xx_prom_argv))
return NULL;
for (i = 0; i < ar71xx_prom_argc; i++) {
char *argv = ar71xx_prom_argv[i];
if (!argv)
if (!is_valid_ram_addr(argv))
continue;
if (strncmp(name, argv, len) == 0 && (argv)[len] == '=')
@ -99,10 +112,10 @@ static __init char *ar71xx_prom_getenv(const char *envname)
int len = strlen(envname);
char **env;
if (!ar71xx_prom_envp)
if (!is_valid_ram_addr(ar71xx_prom_envp))
return NULL;
for (env = ar71xx_prom_envp; *env != NULL; env++)
for (env = ar71xx_prom_envp; is_valid_ram_addr(*env); env++)
if (strncmp(envname, *env, len) == 0 && (*env)[len] == '=')
return *env + len + 1;

View File

@ -1,7 +1,7 @@
/*
* Atheros AR71xx SoC specific setup
*
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
@ -33,9 +33,6 @@
#define AR71XX_BASE_FREQ 40000000
#define AR91XX_BASE_FREQ 5000000
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x8000000
unsigned long ar71xx_mach_type;
u32 ar71xx_cpu_freq;

View File

@ -59,6 +59,9 @@
#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
#define AR91XX_WMAC_SIZE 0x30000
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x8000000
#define AR71XX_CPU_IRQ_BASE 0
#define AR71XX_MISC_IRQ_BASE 8
#define AR71XX_MISC_IRQ_COUNT 8