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ar71xx: ag71xx: start aneg on switch PHYs after reset

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30925 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-03-13 17:29:37 +00:00
parent 9d0c4ce009
commit 0fced5df74
1 changed files with 10 additions and 0 deletions
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10
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
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@ -596,6 +596,16 @@ static int ar7240sw_reset(struct ar7240sw *as)
ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
/* setup PHYs */
for (i = 0; i < AR7240_NUM_PHYS; i++) {
ar7240sw_phy_write(mii, i, MII_ADVERTISE,
ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
ADVERTISE_PAUSE_ASYM);
ar7240sw_phy_write(mii, i, MII_BMCR,
BMCR_RESET | BMCR_ANENABLE);
}
msleep(1000);
ar7240sw_setup(as);
return ret;
}