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xburst: remove support for old kernels

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31904 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-05-27 15:01:35 +00:00
parent 287550be20
commit 1ee6958324
54 changed files with 0 additions and 24727 deletions
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411
target/linux/xburst/config-2.6.37
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@ -1,411 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARPD is not set
# CONFIG_AUTO_IRQ_AFFINITY is not set
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
# CONFIG_BACKLIGHT_GENERIC is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_BATTERY_BQ20Z75 is not set
# CONFIG_BATTERY_JZ4740 is not set
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
# CONFIG_BKL is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BMP085 is not set
# CONFIG_BRIDGE is not set
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CHARGER_GPIO=y
CONFIG_CONSOLE_TRANSLATIONS=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2E is not set
# CONFIG_CPU_LOONGSON2F is not set
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
CONFIG_DEFAULT_AS=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_EXT4_FS=y
CONFIG_FAT_FS=y
# CONFIG_FB_JZ4740 is not set
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FONTS=y
# CONFIG_FONT_10x18 is not set
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_8x16 is not set
# CONFIG_FONT_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_SUN12x22 is not set
CONFIG_FONT_SUN8x16=y
CONFIG_FORCE_MAX_ZONEORDER=12
# CONFIG_FRAMEBUFFER_CONSOLE is not set
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FREEZER=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
# CONFIG_GENERIC_PENDING_IRQ is not set
CONFIG_GPIOLIB=y
# CONFIG_GPIO_SX150X is not set
# CONFIG_HAMRADIO is not set
# CONFIG_HARDLOCKUP_DETECTOR is not set
# CONFIG_HARDIRQS_SW_RESEND is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PWM=y
# CONFIG_HAVE_SPARSE_IRQ is not set
# CONFIG_HIBERNATION is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_I2C_JZ47XX is not set
# CONFIG_INLINE_READ_UNLOCK is not set
# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
# CONFIG_INLINE_SPIN_UNLOCK is not set
# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
# CONFIG_INLINE_WRITE_UNLOCK is not set
# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
CONFIG_INOTIFY_USER=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT_KEYBOARD=y
# CONFIG_INPUT_PWM_BEEPER is not set
CONFIG_INPUT=y
CONFIG_IRQ_CPU=y
# CONFIG_IRQ_PER_CPU is not set
CONFIG_JBD=y
CONFIG_JBD2=y
# CONFIG_JZ4740_ADC is not set
# CONFIG_JZ4740_ID800WT is not set
# CONFIG_JZ4740_N516 is not set
# CONFIG_JZ4740_N526 is not set
# CONFIG_JZ4740_QI_LB60 is not set
CONFIG_KALLSYMS=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_LCD_CLASS_DEVICE is not set
# CONFIG_LCD_GPM940B0 is not set
# CONFIG_LCD_ILI9320 is not set
# CONFIG_LCD_L4F00242T03 is not set
# CONFIG_LCD_LMS283GF05 is not set
# CONFIG_LCD_LTV350QV is not set
# CONFIG_LCD_PLATFORM is not set
# CONFIG_LCD_TDO24M is not set
# CONFIG_LCD_VGG2432A4 is not set
# CONFIG_LEDS_PWM is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=2
CONFIG_LOCK_KERNEL=y
# CONFIG_LOGO is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_OPENWRT_CLUT224 is not set
# CONFIG_LOONGSON_MC146818 is not set
CONFIG_LOONGSON_UART_BASE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
CONFIG_MACH_JZ4740=y
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIPS_ALCHEMY is not set
# CONFIG_MFD_JZ4740_ADC is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_STMPE is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MIKROTIK_RB532 is not set
# CONFIG_MINI_FO is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
# CONFIG_MMC_AT91 is not set
# CONFIG_MMC_ATMELMCI is not set
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_BLOCK=y
CONFIG_MMC_JZ4740=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_MMC=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_NAND_JZ4740=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
# CONFIG_MTD_SM_COMMON is not set
CONFIG_MTD_UBI_BEB_RESERVE=1
# CONFIG_MTD_UBI_DEBUG is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MTD_UBI=y
# CONFIG_N516_LPC is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETWORK_FILESYSTEMS is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_SCHED is not set
# CONFIG_NEW_LEDS is not set
CONFIG_NLS_ASCII=y
CONFIG_NLS_CODEPAGE_1250=y
CONFIG_NLS_CODEPAGE_1251=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=y
CONFIG_NLS_CODEPAGE_775=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_CODEPAGE_852=y
CONFIG_NLS_CODEPAGE_855=y
CONFIG_NLS_CODEPAGE_857=y
CONFIG_NLS_CODEPAGE_860=y
CONFIG_NLS_CODEPAGE_861=y
CONFIG_NLS_CODEPAGE_862=y
CONFIG_NLS_CODEPAGE_863=y
CONFIG_NLS_CODEPAGE_864=y
CONFIG_NLS_CODEPAGE_865=y
CONFIG_NLS_CODEPAGE_866=y
CONFIG_NLS_CODEPAGE_869=y
CONFIG_NLS_CODEPAGE_874=y
CONFIG_NLS_CODEPAGE_932=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_949=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_ISO8859_13=y
CONFIG_NLS_ISO8859_14=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_ISO8859_3=y
CONFIG_NLS_ISO8859_4=y
CONFIG_NLS_ISO8859_5=y
CONFIG_NLS_ISO8859_6=y
CONFIG_NLS_ISO8859_7=y
CONFIG_NLS_ISO8859_8=y
CONFIG_NLS_ISO8859_9=y
CONFIG_NLS_KOI8_R=y
CONFIG_NLS_KOI8_U=y
CONFIG_NLS_UTF8=y
CONFIG_NLS=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
# CONFIG_PACKET_MMAP is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PCI is not set
# CONFIG_PDA_POWER is not set
CONFIG_PERF_USE_VMALLOC=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PM_DEBUG is not set
CONFIG_PM_OPS=y
# CONFIG_PM_RUNTIME is not set
CONFIG_PM_SLEEP=y
CONFIG_PM=y
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_POWERTV is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_PREEMPT=y
CONFIG_PRINTK_TIME=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
CONFIG_RTC_DRV_JZ4740=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
CONFIG_SCSI_MOD=y
# CONFIG_SENSORS_BH1780 is not set
# CONFIG_SENSORS_EMC2103 is not set
# CONFIG_SENSORS_JC42 is not set
# CONFIG_SENSORS_JZ4740 is not set
# CONFIG_SENSORS_SMM665 is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_MAX3107 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SND_JZ4740_SOC_N516 is not set
# CONFIG_SND_JZ4740_SOC_N526 is not set
# CONFIG_SND_JZ4740_SOC_QI_LB60 is not set
# CONFIG_SND_SOC_ALL_CODECS is not set
# CONFIG_SND_SOC_JZ4740 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SQUASHFS is not set
# CONFIG_STAGING is not set
CONFIG_SUSPEND_FREEZER=y
CONFIG_SUSPEND_NVS=y
CONFIG_SUSPEND=y
# CONFIG_SYN_COOKIES is not set
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TEST_POWER is not set
# CONFIG_TINY_PREEMPT_RCU is not set
CONFIG_TRAD_SIGNALS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
# CONFIG_UBIFS_FS_DEBUG is not set
CONFIG_UBIFS_FS_LZO=y
# CONFIG_UBIFS_FS_XATTR is not set
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_UBIFS_FS=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_CDC_COMPOSITE is not set
# CONFIG_USB_ETH_EEM is not set
CONFIG_USB_ETH_RNDIS=y
CONFIG_USB_ETH=y
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_FUNCTIONFS is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_GADGET_AMD5536UDC is not set
# CONFIG_USB_GADGET_AT91 is not set
# CONFIG_USB_GADGET_ATMEL_USBA is not set
# CONFIG_USB_GADGET_CI13XXX is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_GADGET_FSL_QE is not set
# CONFIG_USB_GADGET_FSL_USB2 is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_IMX is not set
CONFIG_USB_GADGET_JZ4740=y
# CONFIG_USB_GADGET_LANGWELL is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_M66592 is not set
# CONFIG_USB_GADGET_MUSB_HDRC is not set
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_PXA25X is not set
# CONFIG_USB_GADGET_PXA27X is not set
# CONFIG_USB_GADGET_R8A66597 is not set
# CONFIG_USB_GADGET_S3C2410 is not set
# CONFIG_USB_GADGET_S3C_HSOTG is not set
CONFIG_USB_GADGET_SELECTED=y
CONFIG_USB_GADGET_VBUS_DRAW=2
CONFIG_USB_GADGET=y
# CONFIG_USB_G_DBGP is not set
# CONFIG_USB_G_HID is not set
# CONFIG_USB_G_PRINTER is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_G_WEBCAM is not set
CONFIG_USB_JZ4740=y
# CONFIG_USB_MIDI_GADGET is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USB_ZERO is not set
CONFIG_VFAT_FS=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_VLAN_8021Q is not set
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_VT=y
# CONFIG_WATCHDOG is not set
# CONFIG_WLAN_80211 is not set
CONFIG_ZONE_DMA_FLAG=0

305
target/linux/xburst/config-3.2
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@ -1,305 +0,0 @@
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARPD is not set
# CONFIG_ATH79 is not set
# CONFIG_ATMEL_PWM is not set
# CONFIG_BATTERY_BQ20Z75 is not set
CONFIG_BATTERY_JZ4740=y
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BRIDGE is not set
CONFIG_CHARGER_GPIO=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRC16=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_XZ=y
CONFIG_DEVMEM=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_EXT4_FS=y
CONFIG_FAT_FS=y
CONFIG_FB=y
CONFIG_FB_JZ4740=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_IMAGEBLIT=y
# CONFIG_FB_TMIO is not set
# CONFIG_FB_WMT_GE_ROPS is not set
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FONTS=y
# CONFIG_FONT_10x18 is not set
CONFIG_FONT_6x11=y
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_8x16 is not set
# CONFIG_FONT_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_SUN8x16 is not set
CONFIG_FORCE_MAX_ZONEORDER=12
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FREEZER=y
CONFIG_FS_MBCACHE=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GPIOLIB=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PWM=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_INLINE_READ_UNLOCK is not set
# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
# CONFIG_INLINE_SPIN_UNLOCK is not set
# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
# CONFIG_INLINE_WRITE_UNLOCK is not set
# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
CONFIG_INPUT=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT_KEYBOARD=y
CONFIG_INPUT_MOUSE=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_PWM_BEEPER is not set
CONFIG_INPUT_UINPUT=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_JBD2=y
CONFIG_JZ4740_QI_LB60=y
CONFIG_KALLSYMS=y
CONFIG_KEXEC=y
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_LANTIQ is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=2
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_JZ4740=y
CONFIG_MFD_CORE=y
CONFIG_MFD_JZ4740_ADC=y
CONFIG_MIPS=y
CONFIG_MIPS_CPUFREQ=y
CONFIG_MIPS_FPU_EMU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
CONFIG_MIPS_MT_DISABLED=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_JZ4740=y
CONFIG_MMC_UNSAFE_RESUME=y
# CONFIG_MOUSE_BCM5974 is not set
CONFIG_MOUSE_PS2=y
# CONFIG_MOUSE_PS2_ALPS is not set
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
# CONFIG_MOUSE_PS2_SYNAPTICS is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
# CONFIG_MOUSE_PS2_TRACKPOINT is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_JZ4740=y
# CONFIG_MTD_SM_COMMON is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_RESERVE=1
# CONFIG_MTD_UBI_DEBUG is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_NETWORK_FILESYSTEMS is not set
# CONFIG_NET_SCHED is not set
# CONFIG_NEW_LEDS is not set
CONFIG_NLS=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_CODEPAGE_1250=y
CONFIG_NLS_CODEPAGE_1251=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=y
CONFIG_NLS_CODEPAGE_775=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_CODEPAGE_852=y
CONFIG_NLS_CODEPAGE_855=y
CONFIG_NLS_CODEPAGE_857=y
CONFIG_NLS_CODEPAGE_860=y
CONFIG_NLS_CODEPAGE_861=y
CONFIG_NLS_CODEPAGE_862=y
CONFIG_NLS_CODEPAGE_863=y
CONFIG_NLS_CODEPAGE_864=y
CONFIG_NLS_CODEPAGE_865=y
CONFIG_NLS_CODEPAGE_866=y
CONFIG_NLS_CODEPAGE_869=y
CONFIG_NLS_CODEPAGE_874=y
CONFIG_NLS_CODEPAGE_932=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_949=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_13=y
CONFIG_NLS_ISO8859_14=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_ISO8859_3=y
CONFIG_NLS_ISO8859_4=y
CONFIG_NLS_ISO8859_5=y
CONFIG_NLS_ISO8859_6=y
CONFIG_NLS_ISO8859_7=y
CONFIG_NLS_ISO8859_8=y
CONFIG_NLS_ISO8859_9=y
CONFIG_NLS_KOI8_R=y
CONFIG_NLS_KOI8_U=y
CONFIG_NLS_UTF8=y
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PDA_POWER is not set
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PM=y
CONFIG_PM_CLK=y
# CONFIG_PM_DEBUG is not set
CONFIG_PM_SLEEP=y
CONFIG_POWER_SUPPLY=y
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_RCU_BOOST is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_DRV_JZ4740=y
# CONFIG_SCSI_DMA is not set
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SND=y
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_JACK=y
CONFIG_SND_JZ4740_SOC=y
CONFIG_SND_JZ4740_SOC_I2S=y
CONFIG_SND_JZ4740_SOC_QI_LB60=y
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
CONFIG_SND_PCM=y
# CONFIG_SND_RAWMIDI_SEQ is not set
# CONFIG_SND_SBAWE_SEQ is not set
CONFIG_SND_SOC=y
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
CONFIG_SND_SOC_JZ4740_CODEC=y
CONFIG_SND_TIMER=y
CONFIG_SOUND=y
# CONFIG_SOUND_OSS_CORE is not set
# CONFIG_SQUASHFS is not set
# CONFIG_STAGING is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_SYN_COOKIES is not set
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TINY_PREEMPT_RCU=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
# CONFIG_UBIFS_FS_DEBUG is not set
CONFIG_UBIFS_FS_LZO=y
# CONFIG_UBIFS_FS_XATTR is not set
CONFIG_UBIFS_FS_XZ=y
CONFIG_UBIFS_FS_ZLIB=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_XHCI is not set
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_CDC_COMPOSITE is not set
CONFIG_USB_COMMON=y
CONFIG_USB_ETH=y
# CONFIG_USB_ETH_EEM is not set
# CONFIG_USB_ETH_RNDIS is not set
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_FUNCTIONFS is not set
CONFIG_USB_FUSB300=y
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_DUALSPEED=y
CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
CONFIG_USB_GADGET_VBUS_DRAW=2
# CONFIG_USB_G_ACM_MS is not set
# CONFIG_USB_G_DBGP is not set
# CONFIG_USB_G_HID is not set
# CONFIG_USB_G_NCM is not set
# CONFIG_USB_G_PRINTER is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_JZ4740 is not set
# CONFIG_USB_M66592 is not set
# CONFIG_USB_MIDI_GADGET is not set
# CONFIG_USB_NET2272 is not set
# CONFIG_USB_R8A66597 is not set
CONFIG_USB_SUPPORT=y
# CONFIG_USB_ZERO is not set
CONFIG_VFAT_FS=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_VLAN_8021Q is not set
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_WATCHDOG is not set
CONFIG_XZ_DEC=y
CONFIG_ZONE_DMA_FLAG=0

35
target/linux/xburst/id800wt/config-2.6.36
View File

@ -1,35 +0,0 @@
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_BACKLIGHT_ADP8860 is not set
CONFIG_BACKLIGHT_PWM=y
CONFIG_BLK_DEV_SD=y
CONFIG_FB_JZ4740=y
# CONFIG_FB_TMIO is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_GPIO_SYSFS=y
CONFIG_INPUT_PWM_BEEPER=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_JZ4740_ID800WT=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_MATRIX=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_ILI8960=y
# CONFIG_LCD_S6E63M0 is not set
CONFIG_LOGO=y
CONFIG_MFD_CORE=y
CONFIG_MFD_JZ4740_ADC=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
CONFIG_TOUCHSCREEN_JZ4740=y
CONFIG_USB=y
# CONFIG_USB_ETH_RNDIS is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y

35
target/linux/xburst/id800wt/config-2.6.37
View File

@ -1,35 +0,0 @@
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_BACKLIGHT_ADP8860 is not set
CONFIG_BACKLIGHT_PWM=y
CONFIG_BLK_DEV_SD=y
CONFIG_FB_JZ4740=y
# CONFIG_FB_TMIO is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_GPIO_SYSFS=y
CONFIG_INPUT_PWM_BEEPER=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_JZ4740_ID800WT=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_MATRIX=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_ILI8960=y
# CONFIG_LCD_S6E63M0 is not set
CONFIG_LOGO=y
CONFIG_MFD_CORE=y
CONFIG_MFD_JZ4740_ADC=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
CONFIG_TOUCHSCREEN_JZ4740=y
CONFIG_USB=y
# CONFIG_USB_ETH_RNDIS is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y

14
target/linux/xburst/n516/config-2.6.36
View File

@ -1,14 +0,0 @@
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_JZ4740=y
CONFIG_FB_METRONOME=m
CONFIG_FB_SYS_FOPS=m
CONFIG_HWMON=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_JZ47XX=y
CONFIG_JZ4740_N516=y
CONFIG_LEDS_GPIO=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_NEW_LEDS=y
CONFIG_SENSORS_LM75=y

13
target/linux/xburst/n516/config-2.6.37
View File

@ -1,13 +0,0 @@
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_JZ4740=y
CONFIG_FB_METRONOME=m
CONFIG_FB_SYS_FOPS=m
CONFIG_HWMON=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_JZ4740_N516=y
CONFIG_LEDS_GPIO=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_NEW_LEDS=y
CONFIG_SENSORS_LM75=y

9
target/linux/xburst/n526/config-2.6.36
View File

@ -1,9 +0,0 @@
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_JZ47XX=y
CONFIG_JZ4740_N526=y
CONFIG_N526_LPC=y

8
target/linux/xburst/n526/config-2.6.37
View File

@ -1,8 +0,0 @@
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_JZ4740_N526=y
CONFIG_N526_LPC=y

334
target/linux/xburst/patches-2.6.37/001-xburst-cache-quirks.patch
View File

@ -1,334 +0,0 @@
From 765782d71760915300cba7ee0259a7c770c56d71 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 17:34:29 +0200
Subject: [PATCH 01/23] JZ4740 cache quirks
---
arch/mips/include/asm/r4kcache.h | 231 ++++++++++++++++++++++++++++++++++++++
1 files changed, 231 insertions(+), 0 deletions(-)
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -17,6 +17,58 @@
#include <asm/cpu-features.h>
#include <asm/mipsmtregs.h>
+#ifdef CONFIG_JZRISC
+
+#define K0_TO_K1() \
+do { \
+ unsigned long __k0_addr; \
+ \
+ __asm__ __volatile__( \
+ "la %0, 1f\n\t" \
+ "or %0, %0, %1\n\t" \
+ "jr %0\n\t" \
+ "nop\n\t" \
+ "1: nop\n" \
+ : "=&r"(__k0_addr) \
+ : "r" (0x20000000) ); \
+} while(0)
+
+#define K1_TO_K0() \
+do { \
+ unsigned long __k0_addr; \
+ __asm__ __volatile__( \
+ "nop;nop;nop;nop;nop;nop;nop\n\t" \
+ "la %0, 1f\n\t" \
+ "jr %0\n\t" \
+ "nop\n\t" \
+ "1: nop\n" \
+ : "=&r" (__k0_addr)); \
+} while (0)
+
+#define INVALIDATE_BTB() \
+do { \
+ unsigned long tmp; \
+ __asm__ __volatile__( \
+ ".set mips32\n\t" \
+ "mfc0 %0, $16, 7\n\t" \
+ "nop\n\t" \
+ "ori %0, 2\n\t" \
+ "mtc0 %0, $16, 7\n\t" \
+ "nop\n\t" \
+ : "=&r" (tmp)); \
+} while (0)
+
+#define SYNC_WB() __asm__ __volatile__ ("sync")
+
+#else /* CONFIG_JZRISC */
+
+#define K0_TO_K1() do { } while (0)
+#define K1_TO_K0() do { } while (0)
+#define INVALIDATE_BTB() do { } while (0)
+#define SYNC_WB() do { } while (0)
+
+#endif /* CONFIG_JZRISC */
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -144,6 +196,7 @@ static inline void flush_icache_line_ind
{
__iflush_prologue
cache_op(Index_Invalidate_I, addr);
+ INVALIDATE_BTB();
__iflush_epilogue
}
@@ -151,6 +204,7 @@ static inline void flush_dcache_line_ind
{
__dflush_prologue
cache_op(Index_Writeback_Inv_D, addr);
+ SYNC_WB();
__dflush_epilogue
}
@@ -163,6 +217,7 @@ static inline void flush_icache_line(uns
{
__iflush_prologue
cache_op(Hit_Invalidate_I, addr);
+ INVALIDATE_BTB();
__iflush_epilogue
}
@@ -170,6 +225,7 @@ static inline void flush_dcache_line(uns
{
__dflush_prologue
cache_op(Hit_Writeback_Inv_D, addr);
+ SYNC_WB();
__dflush_epilogue
}
@@ -177,6 +233,7 @@ static inline void invalidate_dcache_lin
{
__dflush_prologue
cache_op(Hit_Invalidate_D, addr);
+ SYNC_WB();
__dflush_epilogue
}
@@ -209,6 +266,7 @@ static inline void flush_scache_line(uns
static inline void protected_flush_icache_line(unsigned long addr)
{
protected_cache_op(Hit_Invalidate_I, addr);
+ INVALIDATE_BTB();
}
/*
@@ -220,6 +278,7 @@ static inline void protected_flush_icach
static inline void protected_writeback_dcache_line(unsigned long addr)
{
protected_cache_op(Hit_Writeback_Inv_D, addr);
+ SYNC_WB();
}
static inline void protected_writeback_scache_line(unsigned long addr)
@@ -396,8 +455,10 @@ static inline void blast_##pfx##cache##l
__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16)
__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
+#ifndef CONFIG_JZRISC
__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32)
__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
+#endif
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64)
__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
@@ -405,12 +466,122 @@ __BUILD_BLAST_CACHE(s, scache, Index_Wri
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16)
+#ifndef CONFIG_JZRISC
__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
+#endif
__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16)
__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32)
__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64)
__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128)
+#ifdef CONFIG_JZRISC
+
+static inline void blast_dcache32(void)
+{
+ unsigned long start = INDEX_BASE;
+ unsigned long end = start + current_cpu_data.dcache.waysize;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400)
+ cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
+
+ SYNC_WB();
+}
+
+static inline void blast_dcache32_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = page + PAGE_SIZE;
+
+ do {
+ cache32_unroll32(start,Hit_Writeback_Inv_D);
+ start += 0x400;
+ } while (start < end);
+
+ SYNC_WB();
+}
+
+static inline void blast_dcache32_page_indexed(unsigned long page)
+{
+ unsigned long indexmask = current_cpu_data.dcache.waysize - 1;
+ unsigned long start = INDEX_BASE + (page & indexmask);
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400)
+ cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
+
+ SYNC_WB();
+}
+
+static inline void blast_icache32(void)
+{
+ unsigned long start = INDEX_BASE;
+ unsigned long end = start + current_cpu_data.icache.waysize;
+ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
+ unsigned long ws_end = current_cpu_data.icache.ways <<
+ current_cpu_data.icache.waybit;
+ unsigned long ws, addr;
+
+ K0_TO_K1();
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
+
+ INVALIDATE_BTB();
+
+ K1_TO_K0();
+}
+
+static inline void blast_icache32_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = page + PAGE_SIZE;
+
+ K0_TO_K1();
+
+ do {
+ cache32_unroll32(start,Hit_Invalidate_I);
+ start += 0x400;
+ } while (start < end);
+
+ INVALIDATE_BTB();
+
+ K1_TO_K0();
+}
+
+static inline void blast_icache32_page_indexed(unsigned long page)
+{
+ unsigned long indexmask = current_cpu_data.icache.waysize - 1;
+ unsigned long start = INDEX_BASE + (page & indexmask);
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
+ unsigned long ws_end = current_cpu_data.icache.ways <<
+ current_cpu_data.icache.waybit;
+ unsigned long ws, addr;
+
+ K0_TO_K1();
+
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
+
+ INVALIDATE_BTB();
+
+ K1_TO_K0();
+}
+
+#endif /* CONFIG_JZRISC */
+
/* build blast_xxx_range, protected_blast_xxx_range */
#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
@@ -432,13 +603,73 @@ static inline void prot##blast_##pfx##ca
__##pfx##flush_epilogue \
}
+#ifndef CONFIG_JZRISC
__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_)
+#endif
__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_)
+#ifndef CONFIG_JZRISC
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_)
__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
+#endif
__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
/* blast_inv_dcache_range */
__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, )
+#ifdef CONFIG_JZRISC
+
+static inline void protected_blast_dcache_range(unsigned long start,
+ unsigned long end)
+{
+ unsigned long lsize = cpu_dcache_line_size();
+ unsigned long addr = start & ~(lsize - 1);
+ unsigned long aend = (end - 1) & ~(lsize - 1);
+
+ while (1) {
+ protected_cache_op(Hit_Writeback_Inv_D, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+ SYNC_WB();
+}
+
+static inline void protected_blast_icache_range(unsigned long start,
+ unsigned long end)
+{
+ unsigned long lsize = cpu_icache_line_size();
+ unsigned long addr = start & ~(lsize - 1);
+ unsigned long aend = (end - 1) & ~(lsize - 1);
+
+ K0_TO_K1();
+
+ while (1) {
+ protected_cache_op(Hit_Invalidate_I, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+ INVALIDATE_BTB();
+
+ K1_TO_K0();
+}
+
+static inline void blast_dcache_range(unsigned long start,
+ unsigned long end)
+{
+ unsigned long lsize = cpu_dcache_line_size();
+ unsigned long addr = start & ~(lsize - 1);
+ unsigned long aend = (end - 1) & ~(lsize - 1);
+
+ while (1) {
+ cache_op(Hit_Writeback_Inv_D, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+ SYNC_WB();
+}
+
+#endif /* CONFIG_JZRISC */
+
#endif /* _ASM_R4KCACHE_H */

663
target/linux/xburst/patches-2.6.37/006-add-n516-board-support.patch
View File

@ -1,663 +0,0 @@
From fc2b1daf842a1b98472699fdddc8c12ce344bbd7 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 17:25:01 +0200
Subject: [PATCH 06/23] Add n516 board support
---
arch/mips/include/asm/mach-jz4740/board-n516.h | 39 +++
arch/mips/jz4740/Kconfig | 4 +
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/board-n516-display.c | 394 ++++++++++++++++++++++++
arch/mips/jz4740/board-n516.c | 182 +++++++++++
5 files changed, 620 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/include/asm/mach-jz4740/board-n516.h
create mode 100644 arch/mips/jz4740/board-n516-display.c
create mode 100644 arch/mips/jz4740/board-n516.c
--- /dev/null
+++ b/arch/mips/include/asm/mach-jz4740/board-n516.h
@@ -0,0 +1,39 @@
+/*
+ * linux/include/asm-mips/mach-jz4740/board-n516.h
+ *
+ * JZ4730-based N516 board definition.
+ *
+ * Copyright (C) 2009, Yauhen Kharuzhy <jekhor@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __ASM_JZ4740_N516_H__
+#define __ASM_JZ4740_N516_H__
+
+#include <asm/mach-jz4740/gpio.h>
+
+/*
+ * GPIO
+ */
+#define GPIO_SD_VCC_EN_N JZ_GPIO_PORTD(17)
+#define GPIO_SD_CD_N JZ_GPIO_PORTD(7)
+#define GPIO_SD_WP JZ_GPIO_PORTD(15)
+#define GPIO_USB_DETECT JZ_GPIO_PORTD(19)
+#define GPIO_CHARG_STAT_N JZ_GPIO_PORTD(16)
+#define GPIO_LED_ENABLE JZ_GPIO_PORTD(28)
+#define GPIO_LPC_INT JZ_GPIO_PORTD(14)
+#define GPIO_HPHONE_DETECT JZ_GPIO_PORTD(20)
+#define GPIO_SPEAKER_ENABLE JZ_GPIO_PORTD(21)
+
+/* Display */
+#define GPIO_DISPLAY_RST_L JZ_GPIO_PORTB(18)
+#define GPIO_DISPLAY_RDY JZ_GPIO_PORTB(17)
+#define GPIO_DISPLAY_STBY JZ_GPIO_PORTC(22)
+#define GPIO_DISPLAY_ERR JZ_GPIO_PORTC(23)
+#define GPIO_DISPLAY_OFF_N JZ_GPIO_PORTD(1)
+
+#endif /* __ASM_JZ4740_N516_H__ */
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -6,6 +6,10 @@ choice
config JZ4740_QI_LB60
bool "Qi Hardware Ben NanoNote"
+config JZ4740_N516
+ bool "Hanvon n516 eBook reader"
+ select SOC_JZ4740
+
endchoice
config HAVE_PWM
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DEBUG_FS) += clock-debugfs.
# board specific support
obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
+obj-$(CONFIG_JZ4740_N516) += board-n516.o board-n516-display.o
# PM support
--- /dev/null
+++ b/arch/mips/jz4740/board-n516-display.c
@@ -0,0 +1,394 @@
+/*
+ * board-n516-display.c -- Platform device for N516 display
+ *
+ * Copyright (C) 2009, Yauhen Kharuzhy <jekhor@gmail.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-jz4740/jz4740_fb.h>
+
+#include <asm/mach-jz4740/platform.h>
+#include <asm/mach-jz4740/board-n516.h>
+
+#include <video/metronomefb.h>
+#include <linux/console.h>
+
+static struct fb_videomode n516_fb_modes[] = {
+ [0] = {
+ .name = "Metronome 800x600",
+ .refresh = 50,
+ .xres = 400,
+ .yres = 624,
+ .hsync_len = 31,
+ .vsync_len = 23,
+ .right_margin = 31,
+ .left_margin = 5,
+ .upper_margin = 1,
+ .lower_margin = 2,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ },
+};
+
+static struct jz4740_fb_platform_data n516_fb_pdata = {
+ .num_modes = ARRAY_SIZE(n516_fb_modes),
+ .modes = n516_fb_modes,
+ .bpp = 16,
+ .lcd_type = JZ_LCD_TYPE_GENERIC_16_BIT,
+};
+
+struct n516_board_info {
+ uint8_t *metromem;
+ size_t wfm_size;
+ struct fb_info *host_fbinfo; /* the host LCD controller's fbi */
+ unsigned int fw;
+ unsigned int fh;
+};
+
+static struct platform_device *n516_device;
+static struct n516_board_info n516_board_info;
+
+static int metronome_gpios[] = {
+ GPIO_DISPLAY_STBY,
+ GPIO_DISPLAY_RST_L,
+ GPIO_DISPLAY_RDY,
+ GPIO_DISPLAY_ERR,
+/* GPIO_DISPLAY_OFF_N,*/
+};
+
+static const char *metronome_gpio_names[] = {
+ "Metronome STDBY",
+ "Metronome RST",
+ "Metronome RDY",
+ "Metronome ERR",
+/* "Metronone OFF",*/
+};
+
+static int n516_enable_hostfb(bool enable)
+{
+ int ret;
+ int blank = enable ? FB_BLANK_UNBLANK : FB_BLANK_POWERDOWN;
+
+ acquire_console_sem();
+ ret = fb_blank(n516_board_info.host_fbinfo, blank);
+ release_console_sem();
+
+ return ret;
+}
+
+static int n516_init_metronome_gpios(struct metronomefb_par *par)
+{
+ int i;
+ int ret;
+
+ for (i = 0; i < ARRAY_SIZE(metronome_gpios); ++i) {
+ ret = gpio_request(metronome_gpios[i], metronome_gpio_names[i]);
+ if (ret)
+ goto err;
+ }
+
+ gpio_direction_output(GPIO_DISPLAY_OFF_N, 0);
+ gpio_direction_output(GPIO_DISPLAY_RST_L, 0);
+ gpio_direction_output(GPIO_DISPLAY_STBY, 0);
+ gpio_direction_input(GPIO_DISPLAY_RDY);
+ gpio_direction_input(GPIO_DISPLAY_ERR);
+
+ return 0;
+err:
+ for (--i; i >= 0; --i)
+ gpio_free(metronome_gpios[i]);
+
+ return ret;
+}
+
+static int n516_share_video_mem(struct fb_info *info)
+{
+ int ret;
+
+ dev_dbg(&n516_device->dev, "ENTER %s\n", __func__);
+ dev_dbg(&n516_device->dev, "%s, info->var.xres = %u, info->var.yres = %u\n", __func__, info->var.xres, info->var.yres);
+ /* rough check if this is our desired fb and not something else */
+ if ((info->var.xres != n516_fb_pdata.modes[0].xres)
+ || (info->var.yres != n516_fb_pdata.modes[0].yres))
+ return 0;
+
+ /* we've now been notified that we have our new fb */
+ n516_board_info.metromem = info->screen_base;
+ n516_board_info.host_fbinfo = info;
+
+ n516_enable_hostfb(false);
+ /* try to refcount host drv since we are the consumer after this */
+ if (!try_module_get(info->fbops->owner))
+ return -ENODEV;
+
+ /* this _add binds metronomefb to n516. metronomefb refcounts n516 */
+ ret = platform_device_add(n516_device);
+
+ if (ret) {
+ platform_device_put(n516_device);
+ return ret;
+ }
+
+ /* request our platform independent driver */
+ request_module("metronomefb");
+
+ return 0;
+}
+
+static int n516_unshare_video_mem(struct fb_info *info)
+{
+ dev_dbg(&n516_device->dev, "ENTER %s\n", __func__);
+
+ if (info != n516_board_info.host_fbinfo)
+ return 0;
+
+ module_put(n516_board_info.host_fbinfo->fbops->owner);
+ return 0;
+}
+
+static int n516_fb_notifier_callback(struct notifier_block *self,
+ unsigned long event, void *data)
+{
+ struct fb_event *evdata = data;
+ struct fb_info *info = evdata->info;
+
+ dev_dbg(&n516_device->dev, "ENTER %s\n", __func__);
+
+ if (event == FB_EVENT_FB_REGISTERED)
+ return n516_share_video_mem(info);
+ else if (event == FB_EVENT_FB_UNREGISTERED)
+ return n516_unshare_video_mem(info);
+
+ return 0;
+}
+
+static struct notifier_block n516_fb_notif = {
+ .notifier_call = n516_fb_notifier_callback,
+};
+
+/* this gets called as part of our init. these steps must be done now so
+ * that we can use set_pxa_fb_info */
+static void __init n516_presetup_fb(void)
+{
+ int padding_size;
+ int totalsize;
+
+ /* the frame buffer is divided as follows:
+ command | CRC | padding
+ 16kb waveform data | CRC | padding
+ image data | CRC
+ */
+
+ n516_board_info.fw = 800;
+ n516_board_info.fh = 624;
+
+ /* waveform must be 16k + 2 for checksum */
+ n516_board_info.wfm_size = roundup(16*1024 + 2, n516_board_info.fw);
+
+ padding_size = PAGE_SIZE + (4 * n516_board_info.fw);
+
+ /* total is 1 cmd , 1 wfm, padding and image */
+ totalsize = n516_board_info.fw + n516_board_info.wfm_size;
+ totalsize += padding_size + (n516_board_info.fw*n516_board_info.fh);
+
+ /* save this off because we're manipulating fw after this and
+ * we'll need it when we're ready to setup the framebuffer */
+
+ /* the reason we do this adjustment is because we want to acquire
+ * more framebuffer memory without imposing custom awareness on the
+ * underlying driver */
+ n516_fb_pdata.modes[0].yres = DIV_ROUND_UP(totalsize, n516_board_info.fw);
+
+ jz4740_framebuffer_device.dev.platform_data = &n516_fb_pdata;
+ platform_device_register(&jz4740_framebuffer_device);
+}
+
+/* this gets called by metronomefb as part of its init, in our case, we
+ * have already completed initial framebuffer init in presetup_fb so we
+ * can just setup the fb access pointers */
+static int n516_setup_fb(struct metronomefb_par *par)
+{
+ /* metromem was set up by the notifier in share_video_mem so now
+ * we can use its value to calculate the other entries */
+ par->metromem_cmd = (struct metromem_cmd *) n516_board_info.metromem;
+ par->metromem_wfm = n516_board_info.metromem + n516_board_info.fw;
+ par->metromem_img = par->metromem_wfm + n516_board_info.wfm_size;
+ par->metromem_img_csum = (u16 *) (par->metromem_img + (n516_board_info.fw * n516_board_info.fh));
+ par->metromem_dma = n516_board_info.host_fbinfo->fix.smem_start;
+
+ return 0;
+}
+
+static int n516_get_panel_type(void)
+{
+ return 5;
+}
+
+static irqreturn_t n516_handle_irq(int irq, void *dev_id)
+{
+ struct metronomefb_par *par = dev_id;
+
+ dev_dbg(&par->pdev->dev, "Metronome IRQ! RDY=%d\n", gpio_get_value(GPIO_DISPLAY_RDY));
+ wake_up_all(&par->waitq);
+
+ return IRQ_HANDLED;
+}
+
+static void n516_power_ctl(struct metronomefb_par *par, int cmd)
+{
+ switch (cmd) {
+ case METRONOME_POWER_OFF:
+ gpio_set_value(GPIO_DISPLAY_OFF_N, 1);
+ n516_enable_hostfb(false);
+ break;
+ case METRONOME_POWER_ON:
+ gpio_set_value(GPIO_DISPLAY_OFF_N, 0);
+ n516_enable_hostfb(true);
+ break;
+ }
+}
+
+static int n516_get_rdy(struct metronomefb_par *par)
+{
+ return gpio_get_value(GPIO_DISPLAY_RDY);
+}
+
+static int n516_get_err(struct metronomefb_par *par)
+{
+ return gpio_get_value(GPIO_DISPLAY_ERR);
+}
+
+static int n516_setup_irq(struct fb_info *info)
+{
+ int ret;
+
+ dev_dbg(&n516_device->dev, "ENTER %s\n", __func__);
+
+ ret = request_irq(gpio_to_irq(GPIO_DISPLAY_RDY), n516_handle_irq,
+ IRQF_TRIGGER_RISING,
+ "n516", info->par);
+ if (ret)
+ dev_err(&n516_device->dev, "request_irq failed: %d\n", ret);
+
+ return ret;
+}
+
+static void n516_set_rst(struct metronomefb_par *par, int state)
+{
+ dev_dbg(&n516_device->dev, "ENTER %s, RDY=%d\n", __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ if (state)
+ gpio_set_value(GPIO_DISPLAY_RST_L, 1);
+ else
+ gpio_set_value(GPIO_DISPLAY_RST_L, 0);
+}
+
+static void n516_set_stdby(struct metronomefb_par *par, int state)
+{
+ dev_dbg(&n516_device->dev, "ENTER %s, RDY=%d\n", __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ if (state)
+ gpio_set_value(GPIO_DISPLAY_STBY, 1);
+ else
+ gpio_set_value(GPIO_DISPLAY_STBY, 0);
+}
+
+static int n516_wait_event(struct metronomefb_par *par)
+{
+ unsigned long timeout = jiffies + HZ / 20;
+
+ dev_dbg(&n516_device->dev, "ENTER1 %s, RDY=%d\n",
+ __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ while (n516_get_rdy(par) && time_before(jiffies, timeout))
+ schedule();
+
+ dev_dbg(&n516_device->dev, "ENTER2 %s, RDY=%d\n",
+ __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ return wait_event_timeout(par->waitq,
+ n516_get_rdy(par), HZ * 2) ? 0 : -EIO;
+}
+
+static int n516_wait_event_intr(struct metronomefb_par *par)
+{
+ unsigned long timeout = jiffies + HZ/20;
+
+ dev_dbg(&n516_device->dev, "ENTER1 %s, RDY=%d\n",
+ __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ while (n516_get_rdy(par) && time_before(jiffies, timeout))
+ schedule();
+
+ dev_dbg(&n516_device->dev, "ENTER2 %s, RDY=%d\n",
+ __func__, gpio_get_value(GPIO_DISPLAY_RDY));
+ return wait_event_interruptible_timeout(par->waitq,
+ n516_get_rdy(par), HZ * 2) ? 0 : -EIO;
+}
+
+static void n516_cleanup(struct metronomefb_par *par)
+{
+ int i;
+
+ free_irq(gpio_to_irq(GPIO_DISPLAY_RDY), par);
+ for (i = 0; i < ARRAY_SIZE(metronome_gpios); ++i)
+ gpio_free(metronome_gpios[i]);
+}
+
+static struct metronome_board n516_board __initdata = {
+ .owner = THIS_MODULE,
+ .power_ctl = n516_power_ctl,
+ .setup_irq = n516_setup_irq,
+ .setup_io = n516_init_metronome_gpios,
+ .setup_fb = n516_setup_fb,
+ .set_rst = n516_set_rst,
+ .get_err = n516_get_err,
+ .get_rdy = n516_get_rdy,
+ .set_stdby = n516_set_stdby,
+ .met_wait_event = n516_wait_event,
+ .met_wait_event_intr = n516_wait_event_intr,
+ .get_panel_type = n516_get_panel_type,
+ .cleanup = n516_cleanup,
+};
+
+static int __init n516_init(void)
+{
+ int ret;
+
+ /* Keep the metronome off, until its driver is loaded */
+ ret = gpio_request(GPIO_DISPLAY_OFF_N, "Display off");
+ if (ret)
+ return ret;
+
+ gpio_direction_output(GPIO_DISPLAY_OFF_N, 1);
+
+ /* before anything else, we request notification for any fb
+ * creation events */
+ fb_register_client(&n516_fb_notif);
+
+ n516_device = platform_device_alloc("metronomefb", -1);
+ if (!n516_device)
+ return -ENOMEM;
+
+ /* the n516_board that will be seen by metronomefb is a copy */
+ platform_device_add_data(n516_device, &n516_board,
+ sizeof(n516_board));
+
+ n516_presetup_fb();
+
+ return 0;
+}
+module_init(n516_init);
+
+MODULE_DESCRIPTION("board driver for n516 display");
+MODULE_AUTHOR("Yauhen Kharuzhy");
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/arch/mips/jz4740/board-n516.c
@@ -0,0 +1,182 @@
+/*
+ * linux/arch/mips/jz4740/board-516.c
+ *
+ * JZ4740 n516 board setup routines.
+ *
+ * Copyright (c) 2009, Yauhen Kharuzhy <jekhor@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/leds.h>
+
+#include <linux/power_supply.h>
+#include <linux/power/gpio-charger.h>
+
+#include <linux/i2c.h>
+
+#include <asm/mach-jz4740/jz4740_mmc.h>
+#include <asm/mach-jz4740/jz4740_nand.h>
+
+#include <asm/mach-jz4740/board-n516.h>
+#include <asm/mach-jz4740/platform.h>
+
+#include "clock.h"
+
+static long n516_panic_blink(int state)
+{
+ gpio_set_value(GPIO_LED_ENABLE, state ? 1 : 0);
+ return 0;
+}
+
+static void __init board_gpio_setup(void)
+{
+/* jz_gpio_enable_pullup(JZ_GPIO_PORTD(23));
+ jz_gpio_enable_pullup(JZ_GPIO_PORTD(24));*/
+}
+
+static const struct i2c_board_info n516_i2c_board_info[] = {
+ {
+ .type = "LPC524",
+ .addr = 0x54,
+ },
+ {
+ .type = "lm75a",
+ .addr = 0x48,
+ }
+};
+
+static struct jz4740_mmc_platform_data n516_mmc_pdata = {
+ .gpio_card_detect = GPIO_SD_CD_N,
+ .card_detect_active_low = 1,
+ .gpio_read_only = -1,
+ .gpio_power = GPIO_SD_VCC_EN_N,
+ .power_active_low = 1,
+};
+
+static struct gpio_led n516_leds[] = {
+ {
+ .name = "n516:blue:power",
+ .gpio = GPIO_LED_ENABLE,
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ .default_trigger = "nand-disk",
+ }
+};
+
+static struct gpio_led_platform_data n516_leds_pdata = {
+ .leds = n516_leds,
+ .num_leds = ARRAY_SIZE(n516_leds),
+};
+
+static struct platform_device n516_leds_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &n516_leds_pdata,
+ },
+};
+
+static struct mtd_partition n516_partitions[] = {
+ { .name = "NAND BOOT partition",
+ .offset = 0 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND KERNEL partition",
+ .offset = 4 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND ROOTFS partition",
+ .offset = 8 * 0x100000,
+ .size = 504 * 0x100000,
+ },
+};
+
+static struct nand_ecclayout n516_ecclayout = {
+ .eccbytes = 36,
+ .eccpos = {
+ 6, 7, 8, 9, 10, 11, 12, 13, 14,
+ 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32,
+ 33, 34, 35, 36, 37, 38, 39, 40, 41,
+ },
+ .oobfree = {
+ {
+ .offset = 2,
+ .length = 4
+ },
+ {
+ .offset = 42,
+ .length = 22,
+ }
+ }
+};
+
+static struct jz_nand_platform_data n516_nand_pdata = {
+ .ecc_layout = &n516_ecclayout,
+ .partitions = n516_partitions,
+ .num_partitions = ARRAY_SIZE(n516_partitions),
+ .busy_gpio = 94,
+};
+
+static char *n516_batteries[] = {
+ "n516_battery",
+};
+
+static struct gpio_charger_platform_data n516_charger_pdata = {
+ .name = "usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .gpio = GPIO_USB_DETECT,
+ .gpio_active_low = 1,
+ .batteries = n516_batteries,
+ .num_batteries = ARRAY_SIZE(n516_batteries),
+};
+
+static struct platform_device n516_charger_device = {
+ .name = "gpio-charger",
+ .dev = {
+ .platform_data = &n516_charger_pdata,
+ },
+};
+
+static struct platform_device *n516_devices[] __initdata = {
+ &jz4740_nand_device,
+ &n516_leds_device,
+ &jz4740_mmc_device,
+ &jz4740_i2s_device,
+ &jz4740_codec_device,
+ &jz4740_rtc_device,
+ &jz4740_udc_device,
+ &jz4740_i2c_device,
+ &n516_charger_device,
+};
+
+struct jz4740_clock_board_data jz4740_clock_bdata = {
+ .ext_rate = 12000000,
+ .rtc_rate = 32768,
+};
+
+static int n516_setup_platform(void)
+{
+ jz4740_serial_device_register();
+ board_gpio_setup();
+
+ panic_blink = n516_panic_blink;
+ i2c_register_board_info(0, n516_i2c_board_info, ARRAY_SIZE(n516_i2c_board_info));
+ jz4740_mmc_device.dev.platform_data = &n516_mmc_pdata;
+ jz4740_nand_device.dev.platform_data = &n516_nand_pdata;
+
+ return platform_add_devices(n516_devices, ARRAY_SIZE(n516_devices));
+}
+arch_initcall(n516_setup_platform);

358
target/linux/xburst/patches-2.6.37/007-add-n526-board-support.patch
View File

@ -1,358 +0,0 @@
From 5739f1348052000ed12a7745f7bafd352fff832a Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 17:25:23 +0200
Subject: [PATCH 07/23] Add n526 board support
---
arch/mips/jz4740/Kconfig | 4 +
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/board-n526.c | 318 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 323 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/jz4740/board-n526.c
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -10,6 +10,10 @@ config JZ4740_N516
bool "Hanvon n516 eBook reader"
select SOC_JZ4740
+config JZ4740_N526
+ bool "Hanvon n526 eBook reader"
+ select SOC_JZ4740
+
endchoice
config HAVE_PWM
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DEBUG_FS) += clock-debugfs.
obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
obj-$(CONFIG_JZ4740_N516) += board-n516.o board-n516-display.o
+obj-$(CONFIG_JZ4740_N526) += board-n526.o
# PM support
--- /dev/null
+++ b/arch/mips/jz4740/board-n526.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
+ * N526 eBook reader support
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <video/broadsheetfb.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+#include <linux/leds.h>
+
+#include <linux/i2c.h>
+
+#include "clock.h"
+
+#include <asm/mach-jz4740/jz4740_mmc.h>
+#include <asm/mach-jz4740/jz4740_nand.h>
+#include <asm/mach-jz4740/jz4740_fb.h>
+
+#include <asm/mach-jz4740/platform.h>
+
+/* NAND */
+static struct nand_ecclayout n526_ecclayout = {
+ .eccbytes = 36,
+ .eccpos = {
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 36, 37,
+ 38, 39, 40, 41},
+ .oobfree = {
+ {
+ .offset = 2,
+ .length = 4,
+ },
+ {
+ .offset = 42,
+ .length = 22,
+ },
+ }
+};
+
+static struct mtd_partition n526_partitions[] = {
+ { .name = "NAND BOOT partition",
+ .offset = 0 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND KERNEL partition",
+ .offset = 4 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND ROOTFS partition",
+ .offset = 16 * 0x100000,
+ .size = 498 * 0x100000,
+ },
+};
+
+static struct jz_nand_platform_data n526_nand_pdata = {
+ .ecc_layout = &n526_ecclayout,
+ .partitions = n526_partitions,
+ .num_partitions = ARRAY_SIZE(n526_partitions),
+ .busy_gpio = JZ_GPIO_PORTC(30),
+};
+
+static struct jz4740_mmc_platform_data n526_mmc_pdata = {
+ .gpio_card_detect = JZ_GPIO_PORTD(7),
+ .card_detect_active_low = 1,
+ .gpio_read_only = -1,
+ .gpio_power = JZ_GPIO_PORTD(17),
+ .power_active_low = 1,
+};
+
+static struct gpio_led n526_leds[] = {
+ {
+ .name = "n526:blue:power",
+ .gpio = JZ_GPIO_PORTD(28),
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ }
+};
+
+static struct gpio_led_platform_data n526_leds_pdata = {
+ .leds = n526_leds,
+ .num_leds = ARRAY_SIZE(n526_leds),
+};
+
+static struct platform_device n526_leds_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &n526_leds_pdata,
+ },
+};
+
+static void __init board_gpio_setup(void)
+{
+ /* We only need to enable/disable pullup here for pins used in generic
+ * drivers. Everything else is done by the drivers themselfs. */
+ jz_gpio_disable_pullup(JZ_GPIO_PORTD(17));
+ jz_gpio_enable_pullup(JZ_GPIO_PORTD(7));
+ jz_gpio_disable_pullup(JZ_GPIO_PORTC(19));
+ jz_gpio_disable_pullup(JZ_GPIO_PORTC(20));
+ jz_gpio_disable_pullup(JZ_GPIO_PORTC(21));
+ jz_gpio_disable_pullup(JZ_GPIO_PORTC(23));
+}
+
+
+static const int n526_eink_ctrl_gpios[] = {
+ 0,
+ JZ_GPIO_PORTC(23),
+ JZ_GPIO_PORTC(19),
+ JZ_GPIO_PORTC(20),
+};
+
+static void n526_eink_set_ctl(struct broadsheetfb_par * par, unsigned char ctrl, u8
+value)
+{
+ gpio_set_value(n526_eink_ctrl_gpios[ctrl], value);
+}
+
+
+static int n526_eink_wait(struct broadsheetfb_par *par)
+{
+ wait_event(par->waitq, gpio_get_value(JZ_GPIO_PORTB(17)));
+
+ return 0;
+}
+
+static u16 n526_eink_get_hdb(struct broadsheetfb_par *par)
+{
+ u16 value = 0;
+ jz_gpio_port_direction_input(JZ_GPIO_PORTC(0), 0xffff);
+ gpio_set_value(JZ_GPIO_PORTC(21), 0);
+ mdelay(100);
+
+ value = jz_gpio_port_get_value(JZ_GPIO_PORTC(0), 0xffff);
+
+ gpio_set_value(JZ_GPIO_PORTC(21), 1);
+ jz_gpio_port_direction_output(JZ_GPIO_PORTC(0), 0xffff);
+ return value;
+}
+
+static void n526_eink_set_hdb(struct broadsheetfb_par *par, u16 value)
+{
+ jz_gpio_port_set_value(JZ_GPIO_PORTC(0), value, 0xffff);
+}
+
+static int n526_eink_init(struct broadsheetfb_par *par)
+{
+ int i;
+
+ gpio_request(JZ_GPIO_PORTD(1), "display reset");
+ gpio_direction_output(JZ_GPIO_PORTD(1), 1);
+ mdelay(10);
+ gpio_set_value(JZ_GPIO_PORTD(1), 0);
+
+ gpio_request(JZ_GPIO_PORTB(18), "eink enable");
+ gpio_direction_output(JZ_GPIO_PORTB(18), 0);
+
+ gpio_request(JZ_GPIO_PORTB(29), "foobar");
+ gpio_direction_output(JZ_GPIO_PORTB(29), 1);
+
+ for(i = 1; i < ARRAY_SIZE(n526_eink_ctrl_gpios); ++i) {
+ gpio_request(n526_eink_ctrl_gpios[i], "eink display ctrl");
+ gpio_direction_output(n526_eink_ctrl_gpios[i], 0);
+ }
+
+ gpio_request(JZ_GPIO_PORTC(22), "foobar");
+ gpio_direction_input(JZ_GPIO_PORTC(22));
+ gpio_request(JZ_GPIO_PORTC(21), "eink nRD");
+ gpio_direction_output(JZ_GPIO_PORTC(21), 1);
+
+ for(i = 0; i < 16; ++i) {
+ gpio_request(JZ_GPIO_PORTC(i), "eink display data");
+ }
+ jz_gpio_port_direction_output(JZ_GPIO_PORTC(0), 0xffff);
+
+ gpio_set_value(JZ_GPIO_PORTB(18), 1);
+
+ return 0;
+}
+
+static irqreturn_t n526_eink_busy_irq(int irq, void *devid)
+{
+ struct broadsheetfb_par *par = devid;
+ wake_up(&par->waitq);
+
+ return IRQ_HANDLED;
+}
+
+static int n526_eink_setup_irq(struct fb_info *info)
+{
+ int ret;
+ struct broadsheetfb_par *par = info->par;
+
+ gpio_request(JZ_GPIO_PORTB(17), "eink busy");
+ gpio_direction_input(JZ_GPIO_PORTB(17));
+
+ ret = request_irq(gpio_to_irq(JZ_GPIO_PORTB(17)), n526_eink_busy_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING,
+ "eink busyline", par);
+ if (ret)
+ printk("n526 display: Failed to request busyline irq: %d\n", ret);
+ return 0;
+}
+
+static void n526_eink_cleanup(struct broadsheetfb_par *par)
+{
+}
+
+static struct broadsheet_board broadsheet_pdata = {
+ .owner = THIS_MODULE,
+ .init = n526_eink_init,
+ .wait_for_rdy = n526_eink_wait,
+ .set_ctl = n526_eink_set_ctl,
+ .set_hdb = n526_eink_set_hdb,
+ .get_hdb = n526_eink_get_hdb,
+ .cleanup = n526_eink_cleanup,
+ .setup_irq = n526_eink_setup_irq,
+};
+
+static struct platform_device n526_broadsheet_device = {
+ .name = "broadsheetfb",
+ .id = -1,
+ .dev = {
+ .platform_data = &broadsheet_pdata,
+ },
+};
+
+/* Buttons */
+static struct gpio_keys_button n526_gpio_keys_buttons[] = {
+ [0] = {
+ .code = KEY_ENTER,
+ .gpio = 0,
+ .active_low = 1,
+ .desc = "Power",
+ },
+};
+
+static struct gpio_keys_platform_data n526_gpio_keys_data = {
+ .nbuttons = ARRAY_SIZE(n526_gpio_keys_buttons),
+ .buttons = n526_gpio_keys_buttons,
+};
+
+static struct platform_device n526_gpio_keys_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .dev = {
+ .platform_data = &n526_gpio_keys_data,
+ }
+};
+
+static struct i2c_board_info n526_i2c_board_info = {
+ .type = "n526-lpc",
+ .addr = 0x54,
+};
+
+static struct platform_device *n526_platform_devices[] __initdata = {
+ &jz4740_usb_ohci_device,
+ &jz4740_udc_device,
+ &jz4740_mmc_device,
+ &jz4740_nand_device,
+ &jz4740_i2s_device,
+ &jz4740_codec_device,
+ &jz4740_pcm_device,
+ &jz4740_rtc_device,
+ &jz4740_i2c_device,
+ &n526_leds_device,
+ &n526_broadsheet_device,
+ &n526_gpio_keys_device,
+};
+
+static int __init n526_init_platform_devices(void)
+{
+ jz4740_nand_device.dev.platform_data = &n526_nand_pdata;
+ jz4740_mmc_device.dev.platform_data = &n526_mmc_pdata;
+
+ jz4740_serial_device_register();
+
+ n526_i2c_board_info.irq = gpio_to_irq(JZ_GPIO_PORTD(14)),
+ i2c_register_board_info(0, &n526_i2c_board_info, 1);
+
+ return platform_add_devices(n526_platform_devices,
+ ARRAY_SIZE(n526_platform_devices));
+
+}
+
+struct jz4740_clock_board_data jz4740_clock_bdata = {
+ .ext_rate = 12000000,
+ .rtc_rate = 32768,
+};
+
+static int __init n526_board_setup(void)
+{
+ board_gpio_setup();
+
+ if (n526_init_platform_devices())
+ panic("Failed to initalize platform devices\n");
+
+ return 0;
+}
+arch_initcall(n526_board_setup);

196
target/linux/xburst/patches-2.6.37/008-add-id800wt-board-support.patch
View File

@ -1,196 +0,0 @@
From ac67a626a852d6e720c2cc474b5e8824ad5b0875 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 5 Sep 2010 20:34:08 +0200
Subject: [PATCH 12/23] MIPS: JZ4740: Add id800wt board
---
arch/mips/jz4740/Kconfig | 4 +
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/board-id800wt.c | 158 ++++++++++++++++++++++++++++++++++++++
3 files changed, 163 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/jz4740/board-id800wt.c
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -14,6 +14,10 @@ config JZ4740_N526
bool "Hanvon n526 eBook reader"
select SOC_JZ4740
+config JZ4740_ID800WT
+ bool "Sungale id800wt picture frame"
+ select SOC_JZ4740
+
endchoice
config HAVE_PWM
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_DEBUG_FS) += clock-debugfs.
obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
obj-$(CONFIG_JZ4740_N516) += board-n516.o board-n516-display.o
obj-$(CONFIG_JZ4740_N526) += board-n526.o
+obj-$(CONFIG_JZ4740_ID800WT) += board-id800wt.o
# PM support
--- /dev/null
+++ b/arch/mips/jz4740/board-id800wt.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or later
+ * as published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-jz4740/platform.h>
+
+#include <linux/input.h>
+#include <linux/power_supply.h>
+#include <linux/pwm_backlight.h>
+
+#include "clock.h"
+
+#include <asm/mach-jz4740/jz4740_fb.h>
+#include <asm/mach-jz4740/jz4740_nand.h>
+
+/* NAND */
+static struct nand_ecclayout id800wt_ecclayout = {
+ .oobfree = {
+ {
+ .offset = 2,
+ .length = 4,
+ },
+ {
+ .offset = 42,
+ .length = 22,
+ },
+ }
+};
+
+static struct mtd_partition id800wt_partitions[] = {
+ { .name = "NAND BOOT partition",
+ .offset = 0 * 0x100000,
+ .size = 2 * 0x100000,
+ },
+ { .name = "NAND KERNEL partition",
+ .offset = 2 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND ROOTFS partition",
+ .offset = 6 * 0x100000,
+ .size = 498 * 0x100000,
+ },
+};
+
+static struct jz_nand_platform_data id800wt_nand_pdata = {
+ .ecc_layout = &id800wt_ecclayout,
+ .partitions = id800wt_partitions,
+ .num_partitions = ARRAY_SIZE(id800wt_partitions),
+ .busy_gpio = JZ_GPIO_PORTC(30),
+};
+
+/* Display */
+static struct fb_videomode id800wt_video_modes[] = {
+ {
+ .name = "800x600",
+ .xres = 800,
+ .yres = 600,
+ .refresh = 40,
+ .left_margin = 0,
+ .right_margin = 255,
+ .upper_margin = 0,
+ .lower_margin = 35,
+ .hsync_len = 1,
+ .vsync_len = 1,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
+};
+
+static struct jz4740_fb_platform_data id800wt_fb_pdata = {
+ .width = 60,
+ .height = 45,
+ .num_modes = ARRAY_SIZE(id800wt_video_modes),
+ .modes = id800wt_video_modes,
+ .bpp = 16,
+ .lcd_type = JZ_LCD_TYPE_SPECIAL_TFT_1,
+ .pixclk_falling_edge = 1,
+ .special_tft_config = {
+ .spl = JZ4740_FB_SPECIAL_TFT_CONFIG(1051, 1053),
+ .cls = JZ4740_FB_SPECIAL_TFT_CONFIG(631, 744),
+ .ps = JZ4740_FB_SPECIAL_TFT_CONFIG(0, 45),
+ .rev = JZ4740_FB_SPECIAL_TFT_CONFIG(0, 0),
+ },
+};
+
+/* Backlight */
+static int id800wt_backlight_invert(struct device *dev, int brightness)
+{
+ return 255 - brightness;
+}
+
+static struct platform_pwm_backlight_data id800wt_backlight_data = {
+ .pwm_id = 7,
+ .max_brightness = 255,
+ .dft_brightness = 255,
+ .pwm_period_ns = 8000000,
+ .notify = id800wt_backlight_invert,
+};
+
+static struct platform_device id800wt_backlight_device = {
+ .name = "pwm-backlight",
+ .id = -1,
+ .dev = {
+ .platform_data = &id800wt_backlight_data,
+ .parent = &jz4740_framebuffer_device.dev,
+ },
+};
+
+static struct platform_device *jz_platform_devices[] __initdata = {
+ &jz4740_usb_ohci_device,
+ &jz4740_udc_device,
+ &jz4740_nand_device,
+ &jz4740_framebuffer_device,
+ &jz4740_i2s_device,
+ &jz4740_codec_device,
+ &jz4740_pcm_device,
+ &jz4740_rtc_device,
+ &jz4740_adc_device,
+ &id800wt_backlight_device,
+};
+
+static int __init id800wt_init_platform_devices(void)
+{
+ jz4740_framebuffer_device.dev.platform_data = &id800wt_fb_pdata;
+ jz4740_nand_device.dev.platform_data = &id800wt_nand_pdata;
+
+ jz4740_serial_device_register();
+
+ jz_gpio_enable_pullup(JZ_GPIO_LCD_PS);
+ jz_gpio_enable_pullup(JZ_GPIO_LCD_REV);
+
+ return platform_add_devices(jz_platform_devices,
+ ARRAY_SIZE(jz_platform_devices));
+}
+
+struct jz4740_clock_board_data jz4740_clock_bdata = {
+ .ext_rate = 12000000,
+ .rtc_rate = 32768,
+};
+
+static int __init id800wt_board_setup(void)
+{
+ printk("Sungale pictureframe id800wt setup\n");
+
+ if (id800wt_init_platform_devices())
+ panic("Failed to initalize platform devices\n");
+
+ return 0;
+}
+arch_initcall(id800wt_board_setup);

342
target/linux/xburst/patches-2.6.37/010-n516-sound.patch
View File

@ -1,342 +0,0 @@
From f5d9169627e0b0d7111011c9b10f1ff533c8dc85 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 1 Aug 2010 21:34:54 +0200
Subject: [PATCH 08/23] Add N516 sound SoC board driver
---
sound/soc/jz4740/Kconfig | 8 ++
sound/soc/jz4740/Makefile | 2 +
sound/soc/jz4740/n516.c | 303 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 313 insertions(+), 0 deletions(-)
create mode 100644 sound/soc/jz4740/n516.c
--- a/sound/soc/jz4740/Kconfig
+++ b/sound/soc/jz4740/Kconfig
@@ -21,3 +21,11 @@ config SND_JZ4740_SOC_QI_LB60
help
Say Y if you want to add support for ASoC audio on the Qi LB60 board
a.k.a Qi Ben NanoNote.
+
+config SND_JZ4740_SOC_N516
+ tristate "SoC Audio support for Hanvon N516 eBook reader"
+ depends on SND_JZ4740_SOC && JZ4740_N516
+ select SND_JZ4740_SOC_I2S
+ select SND_SOC_JZCODEC
+ help
+ Say Y if you want to enable support for SoC audio on the Hanvon N516.
--- a/sound/soc/jz4740/Makefile
+++ b/sound/soc/jz4740/Makefile
@@ -9,5 +9,7 @@ obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-
# Jz4740 Machine Support
snd-soc-qi-lb60-objs := qi_lb60.o
+snd-soc-n516-objs := n516.o
obj-$(CONFIG_SND_JZ4740_SOC_QI_LB60) += snd-soc-qi-lb60.o
+obj-$(CONFIG_SND_JZ4740_SOC_N516) += snd-soc-n516.o
--- /dev/null
+++ b/sound/soc/jz4740/n516.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2009, Yauhen Kharuzhy <jekhor@gmail.com>
+ * OpenInkpot project
+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/jack.h>
+#include <linux/gpio.h>
+#include <linux/workqueue.h>
+
+#include "../codecs/jzcodec.h"
+#include "jz4740-pcm.h"
+#include "jz4740-i2s.h"
+
+#include <asm/mach-jz4740/board-n516.h>
+
+enum {
+ N516_SPEAKER_AUTO = 0,
+ N516_SPEAKER_OFF = 1,
+ N516_SPEAKER_ON = 2,
+};
+
+static int n516_speaker_mode;
+static struct snd_soc_codec *n516_codec;
+static struct work_struct n516_headphone_work;
+
+static void n516_ext_control(void)
+{
+ if (!n516_codec)
+ return;
+
+ switch (n516_speaker_mode) {
+ case N516_SPEAKER_ON:
+ snd_soc_dapm_enable_pin(n516_codec, "Speaker");
+ break;
+ case N516_SPEAKER_OFF:
+ snd_soc_dapm_disable_pin(n516_codec, "Speaker");
+ break;
+ case N516_SPEAKER_AUTO:
+ if (snd_soc_dapm_get_pin_status(n516_codec, "Headphone"))
+ snd_soc_dapm_disable_pin(n516_codec, "Speaker");
+ else
+ snd_soc_dapm_enable_pin(n516_codec, "Speaker");
+ break;
+ default:
+ break;
+ }
+
+ /* signal a DAPM event */
+ snd_soc_dapm_sync(n516_codec);
+}
+
+static int n516_speaker_event(struct snd_soc_dapm_widget *widget,
+ struct snd_kcontrol *ctrl, int event)
+{
+ int on = !SND_SOC_DAPM_EVENT_OFF(event);
+
+ gpio_set_value(GPIO_SPEAKER_ENABLE, on);
+
+ return 0;
+}
+
+static void n516_headphone_event_work(struct work_struct *work)
+{
+ n516_ext_control();
+}
+
+static int n516_headphone_event(struct snd_soc_dapm_widget *widget,
+ struct snd_kcontrol *ctrl, int event)
+{
+ /* We can't call soc_dapm_sync from a event handler */
+ if (event & (SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD))
+ schedule_work(&n516_headphone_work);
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget n516_widgets[] = {
+ SND_SOC_DAPM_SPK("Speaker", n516_speaker_event),
+ SND_SOC_DAPM_HP("Headphone", n516_headphone_event),
+ SND_SOC_DAPM_MIC("Mic", NULL),
+};
+
+static const struct snd_soc_dapm_route n516_routes[] = {
+ {"Mic", NULL, "MIC"},
+ {"Speaker", NULL, "LOUT"},
+ {"Speaker", NULL, "ROUT"},
+ {"Headphone", NULL, "LOUT"},
+ {"Headphone", NULL, "ROUT"},
+};
+
+static const char *n516_speaker_modes[] = {"Auto", "Off", "On"};
+static const struct soc_enum n516_speaker_mode_enum =
+ SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(n516_speaker_modes), n516_speaker_modes);
+
+static int n516_get_speaker_mode(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] = n516_speaker_mode;
+ return 0;
+}
+
+static int n516_set_speaker_mode(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ if (n516_speaker_mode == ucontrol->value.integer.value[0])
+ return 0;
+
+ n516_speaker_mode = ucontrol->value.integer.value[0];
+ n516_ext_control();
+ return 1;
+}
+
+static const struct snd_kcontrol_new n516_controls[] = {
+ SOC_ENUM_EXT("Speaker Function", n516_speaker_mode_enum,
+ n516_get_speaker_mode, n516_set_speaker_mode),
+};
+
+#define N516_DAIFMT (SND_SOC_DAIFMT_I2S | \
+ SND_SOC_DAIFMT_NB_NF | \
+ SND_SOC_DAIFMT_CBM_CFM)
+
+static int n516_codec_init(struct snd_soc_codec *codec)
+{
+ int ret;
+ struct snd_soc_dai *cpu_dai = codec->socdev->card->dai_link->cpu_dai;
+ struct snd_soc_dai *codec_dai = codec->socdev->card->dai_link->codec_dai;
+
+ n516_codec = codec;
+
+ snd_soc_dapm_nc_pin(codec, "LIN");
+ snd_soc_dapm_nc_pin(codec, "RIN");
+
+ ret = snd_soc_dai_set_fmt(codec_dai, N516_DAIFMT);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set codec dai format: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_dai_set_fmt(cpu_dai, N516_DAIFMT);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_dai_set_sysclk(codec_dai, JZCODEC_SYSCLK, 111,
+ SND_SOC_CLOCK_IN);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set codec dai sysclk: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_add_controls(codec, n516_controls,
+ ARRAY_SIZE(n516_controls));
+ if (ret) {
+ dev_err(codec->dev, "Failed to add controls: %d\n", ret);
+ return ret;
+ }
+
+
+ ret = snd_soc_dapm_new_controls(codec, n516_widgets,
+ ARRAY_SIZE(n516_widgets));
+ if (ret) {
+ dev_err(codec->dev, "Failed to add dapm controls: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_dapm_add_routes(codec, n516_routes, ARRAY_SIZE(n516_routes));
+ if (ret) {
+ dev_err(codec->dev, "Failed to add dapm routes: %d\n", ret);
+ return ret;
+ }
+
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link n516_dai = {
+ .name = "jz-codec",
+ .stream_name = "JZCODEC",
+ .cpu_dai = &jz4740_i2s_dai,
+ .codec_dai = &jz_codec_dai,
+ .init = n516_codec_init,
+};
+
+static struct snd_soc_card n516_card = {
+ .name = "N516",
+ .dai_link = &n516_dai,
+ .num_links = 1,
+ .platform = &jz4740_soc_platform,
+};
+
+static struct snd_soc_device n516_snd_devdata = {
+ .card = &n516_card,
+ .codec_dev = &soc_codec_dev_jzcodec,
+};
+
+static struct platform_device *n516_snd_device;
+
+static struct snd_soc_jack n516_hp_jack;
+
+static struct snd_soc_jack_pin n516_hp_pin = {
+ .pin = "Headphone",
+ .mask = SND_JACK_HEADPHONE,
+};
+
+static struct snd_soc_jack_gpio n516_hp_gpio = {
+ .gpio = GPIO_HPHONE_DETECT,
+ .name = "Headphone detect",
+ .report = SND_JACK_HEADPHONE,
+ .debounce_time = 100,
+};
+
+static int __init n516_add_headphone_jack(void)
+{
+ int ret;
+
+ ret = snd_soc_jack_new(&n516_card, "Headphone jack",
+ SND_JACK_HEADPHONE, &n516_hp_jack);
+ if (ret)
+ return ret;
+
+ ret = snd_soc_jack_add_pins(&n516_hp_jack, 1, &n516_hp_pin);
+ if (ret)
+ return ret;
+
+ ret = snd_soc_jack_add_gpios(&n516_hp_jack, 1, &n516_hp_gpio);
+
+ return ret;
+}
+
+static int __init n516_init(void)
+{
+ int ret;
+
+ n516_snd_device = platform_device_alloc("soc-audio", -1);
+
+ if (!n516_snd_device)
+ return -ENOMEM;
+
+ ret = gpio_request(GPIO_SPEAKER_ENABLE, "Speaker enable");
+ if (ret) {
+ pr_err("n516 snd: Failed to request SPEAKER_ENABLE GPIO(%d): %d\n",
+ GPIO_SPEAKER_ENABLE, ret);
+ goto err_device_put;
+ }
+
+ gpio_direction_output(GPIO_SPEAKER_ENABLE, 0);
+ INIT_WORK(&n516_headphone_work, n516_headphone_event_work);
+
+ platform_set_drvdata(n516_snd_device, &n516_snd_devdata);
+ n516_snd_devdata.dev = &n516_snd_device->dev;
+ ret = platform_device_add(n516_snd_device);
+ if (ret) {
+ pr_err("n516 snd: Failed to add snd soc device: %d\n", ret);
+ goto err_unset_pdata;
+ }
+
+ ret = n516_add_headphone_jack();
+ /* We can live without it, so just print a warning */
+ if (ret)
+ pr_warning("n516 snd: Failed to initalise headphone jack: %d\n", ret);
+
+ return 0;
+
+err_unset_pdata:
+ platform_set_drvdata(n516_snd_device, NULL);
+/*err_gpio_free_speaker:*/
+ gpio_free(GPIO_SPEAKER_ENABLE);
+err_device_put:
+ platform_device_put(n516_snd_device);
+
+ return ret;
+}
+module_init(n516_init);
+
+static void __exit n516_exit(void)
+{
+ snd_soc_jack_free_gpios(&n516_hp_jack, 1, &n516_hp_gpio);
+ gpio_free(GPIO_SPEAKER_ENABLE);
+ platform_device_unregister(n516_snd_device);
+}
+module_exit(n516_exit);
+
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("ALSA SoC N516 Audio support");
+MODULE_LICENSE("GPL v2");

209
target/linux/xburst/patches-2.6.37/011-n526-sound.patch
View File

@ -1,209 +0,0 @@
From ad2a34ac6d06aa5362e648bba89d8796e94b4e7d Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:38:41 +0200
Subject: [PATCH 09/23] Add N526 sound SoC board driver
---
sound/soc/jz4740/Kconfig | 8 ++
sound/soc/jz4740/Makefile | 2 +
sound/soc/jz4740/n526.c | 169 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 179 insertions(+), 0 deletions(-)
create mode 100644 sound/soc/jz4740/n526.c
--- a/sound/soc/jz4740/Kconfig
+++ b/sound/soc/jz4740/Kconfig
@@ -29,3 +29,11 @@ config SND_JZ4740_SOC_N516
select SND_SOC_JZCODEC
help
Say Y if you want to enable support for SoC audio on the Hanvon N516.
+
+config SND_JZ4740_SOC_N526
+ tristate "SoC Audio support for Hanvon N526 eBook reader"
+ depends on SND_JZ4740_SOC && JZ4740_N526
+ select SND_JZ4740_SOC_I2S
+ select SND_SOC_JZCODEC
+ help
+ Say Y if you want to enable support for SoC audio on the Hanvon N526.
--- a/sound/soc/jz4740/Makefile
+++ b/sound/soc/jz4740/Makefile
@@ -10,6 +10,8 @@ obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-
# Jz4740 Machine Support
snd-soc-qi-lb60-objs := qi_lb60.o
snd-soc-n516-objs := n516.o
+snd-soc-n526-objs := n526.o
obj-$(CONFIG_SND_JZ4740_SOC_QI_LB60) += snd-soc-qi-lb60.o
obj-$(CONFIG_SND_JZ4740_SOC_N516) += snd-soc-n516.o
+obj-$(CONFIG_SND_JZ4740_SOC_N526) += snd-soc-n526.o
--- /dev/null
+++ b/sound/soc/jz4740/n526.c
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <linux/gpio.h>
+
+#include "../codecs/jzcodec.h"
+#include "jz4740-pcm.h"
+#include "jz4740-i2s.h"
+
+#define N526_AMP_EN_GPIO JZ_GPIO_PORTD(4)
+
+static int n526_spk_event(struct snd_soc_dapm_widget *widget,
+ struct snd_kcontrol *ctrl, int event)
+{
+ gpio_set_value(N526_AMP_EN_GPIO, !SND_SOC_DAPM_EVENT_OFF(event));
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget n526_widgets[] = {
+ SND_SOC_DAPM_SPK("Speaker", n526_spk_event),
+ SND_SOC_DAPM_HP("Headphone", NULL),
+ SND_SOC_DAPM_MIC("Mic", NULL),
+};
+
+static const struct snd_soc_dapm_route n526_routes[] = {
+ {"Mic", NULL, "MIC"},
+ {"Speaker", NULL, "LOUT"},
+ {"Speaker", NULL, "ROUT"},
+ {"Headphone", NULL, "LOUT"},
+ {"Headphone", NULL, "ROUT"},
+};
+
+static const struct snd_kcontrol_new n526_controls[] = {
+ SOC_DAPM_PIN_SWITCH("Speaker"),
+};
+
+#define N526_DAIFMT (SND_SOC_DAIFMT_I2S | \
+ SND_SOC_DAIFMT_NB_NF | \
+ SND_SOC_DAIFMT_CBM_CFM)
+
+static int n526_codec_init(struct snd_soc_codec *codec)
+{
+ int ret;
+ struct snd_soc_dai *cpu_dai = codec->socdev->card->dai_link->cpu_dai;
+ struct snd_soc_dai *codec_dai = codec->socdev->card->dai_link->codec_dai;
+
+ snd_soc_dapm_nc_pin(codec, "LIN");
+ snd_soc_dapm_nc_pin(codec, "RIN");
+
+ ret = snd_soc_dai_set_fmt(codec_dai, N526_DAIFMT);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set codec dai format: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_dai_set_fmt(cpu_dai, N526_DAIFMT);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_dai_set_sysclk(codec_dai, JZCODEC_SYSCLK, 111,
+ SND_SOC_CLOCK_IN);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set codec dai sysclk: %d\n", ret);
+ return ret;
+ }
+
+ snd_soc_dapm_new_controls(codec, n526_widgets, ARRAY_SIZE(n526_widgets));
+
+ snd_soc_add_controls(codec, n526_controls,
+ ARRAY_SIZE(n526_controls));
+
+ snd_soc_dapm_add_routes(codec, n526_routes, ARRAY_SIZE(n526_routes));
+
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link n526_dai = {
+ .name = "jz-codec",
+ .stream_name = "JZCODEC",
+ .cpu_dai = &jz4740_i2s_dai,
+ .codec_dai = &jz_codec_dai,
+ .init = n526_codec_init,
+};
+
+static struct snd_soc_card n526 = {
+ .name = "N526",
+ .dai_link = &n526_dai,
+ .num_links = 1,
+ .platform = &jz4740_soc_platform,
+};
+
+static struct snd_soc_device n526_snd_devdata = {
+ .card = &n526,
+ .codec_dev = &soc_codec_dev_jzcodec,
+};
+
+static struct platform_device *n526_snd_device;
+
+static int __init n526_init(void)
+{
+ int ret;
+
+ n526_snd_device = platform_device_alloc("soc-audio", -1);
+
+ if (!n526_snd_device)
+ return -ENOMEM;
+
+ ret = gpio_request(N526_AMP_EN_GPIO, "AMP");
+ if (ret) {
+ pr_err("n526 snd: Failed to request AMP GPIO(%d): %d\n",
+ N526_AMP_EN_GPIO, ret);
+ goto err_device_put;
+ }
+
+ gpio_direction_output(JZ_GPIO_PORTD(4), 0);
+
+ platform_set_drvdata(n526_snd_device, &n526_snd_devdata);
+ n526_snd_devdata.dev = &n526_snd_device->dev;
+ ret = platform_device_add(n526_snd_device);
+ if (ret) {
+ pr_err("n526 snd: Failed to add snd soc device: %d\n", ret);
+ goto err_unset_pdata;
+ }
+
+ return 0;
+
+err_unset_pdata:
+ platform_set_drvdata(n526_snd_device, NULL);
+ gpio_free(N526_AMP_EN_GPIO);
+err_device_put:
+ platform_device_put(n526_snd_device);
+
+ return ret;
+}
+module_init(n526_init);
+
+static void __exit n526_exit(void)
+{
+ gpio_free(N526_AMP_EN_GPIO);
+ platform_device_unregister(n526_snd_device);
+}
+module_exit(n526_exit);
+
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("ALSA SoC N526 audio support");
+MODULE_LICENSE("GPL v2");

57
target/linux/xburst/patches-2.6.37/020-qi_lb60-add-gpio-charger.patch
View File

@ -1,57 +0,0 @@
From d6d333bf7512547ca5dab6763e989181bd705d0d Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 17 Jul 2010 11:16:29 +0000
Subject: [PATCH 05/23] MIPS: JZ4740: qi_lb60: Add gpio-charger device
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
arch/mips/jz4740/board-qi_lb60.c | 24 ++++++++++++++++++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -23,6 +23,7 @@
#include <linux/spi/spi_gpio.h>
#include <linux/power_supply.h>
#include <linux/power/jz4740-battery.h>
+#include <linux/power/gpio-charger.h>
#include <asm/mach-jz4740/jz4740_fb.h>
#include <asm/mach-jz4740/jz4740_mmc.h>
@@ -396,6 +397,28 @@ static struct platform_device qi_lb60_pw
},
};
+/* charger */
+static char *qi_lb60_batteries[] = {
+ "battery",
+};
+
+static struct gpio_charger_platform_data qi_lb60_charger_pdata = {
+ .name = "usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .gpio = JZ_GPIO_PORTD(28),
+ .gpio_active_low = 1,
+ .batteries = qi_lb60_batteries,
+ .num_batteries = ARRAY_SIZE(qi_lb60_batteries),
+};
+
+static struct platform_device qi_lb60_charger_device = {
+ .name = "gpio-charger",
+ .dev = {
+ .platform_data = &qi_lb60_charger_pdata,
+ },
+};
+
+
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_udc_device,
&jz4740_mmc_device,
@@ -410,6 +433,7 @@ static struct platform_device *jz_platfo
&jz4740_adc_device,
&qi_lb60_gpio_keys,
&qi_lb60_pwm_beeper,
+ &qi_lb60_charger_device,
};
static void __init board_gpio_setup(void)

20
target/linux/xburst/patches-2.6.37/021-qi_lb60-Don-t-use-3-wire-spi-mode-for-the-display-f.patch
View File

@ -1,20 +0,0 @@
From 9871577ee1ba0f90ae748799ccfbeeac77200977 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Wed, 13 Oct 2010 01:17:24 +0200
Subject: [PATCH 17/23] qi_lb60: Don't use 3-wire spi mode for the display for now
The spi_gpio driver does not support 3-wire mode.
---
arch/mips/jz4740/board-qi_lb60.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -310,7 +310,6 @@ static struct spi_board_info qi_lb60_spi
.chip_select = 0,
.bus_num = 1,
.max_speed_hz = 30 * 1000,
- .mode = SPI_3WIRE,
},
};

472
target/linux/xburst/patches-2.6.37/050-i2c.patch
View File

@ -1,472 +0,0 @@
From 5af1734d9fc79c2d08853c703d1edfef2a4cae16 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 5 Sep 2010 03:19:10 +0200
Subject: [PATCH 10/23] i2c: Add i2c driver for JZ47XX SoCs
This patch adds a driver for the i2c controller found in Ingenic JZ47XX based
SoCs.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-jz47xx.c | 424 +++++++++++++++++++++++++++++++++++++++
3 files changed, 435 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-jz47xx.c
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -431,6 +431,16 @@ config I2C_IXP2000
This driver is deprecated and will be dropped soon. Use i2c-gpio
instead.
+config I2C_JZ47XX
+ tristate "JZ4740 I2C Interface"
+ depends on ARCH_JZ4740
+ help
+ Say Y here if you want support for the I2C controller found on Ingenic
+ JZ47XX based SoCs.
+
+ This driver can also be built as a module. If so, the module will be
+ called i2c-jz47xx.
+
config I2C_MPC
tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
depends on PPC32
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_I2C_IMX) += i2c-imx.o
obj-$(CONFIG_I2C_INTEL_MID) += i2c-intel-mid.o
obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
+obj-$(CONFIG_I2C_JZ47XX) += i2c-jz47xx.o
obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
--- /dev/null
+++ b/drivers/i2c/busses/i2c-jz47xx.c
@@ -0,0 +1,424 @@
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+
+#include <linux/gpio.h>
+#include <linux/delay.h>
+
+#define JZ47XX_REG_I2C_DATA 0x00
+#define JZ47XX_REG_I2C_CTRL 0x04
+#define JZ47XX_REG_I2C_STATUS 0x08
+#define JZ47XX_REG_I2C_CLOCK 0x0C
+
+#define JZ47XX_I2C_STATUS_FIFO_FULL BIT(4)
+#define JZ47XX_I2C_STATUS_BUSY BIT(3)
+#define JZ47XX_I2C_STATUS_TEND BIT(2)
+#define JZ47XX_I2C_STATUS_DATA_VALID BIT(1)
+#define JZ47XX_I2C_STATUS_NACK BIT(0)
+
+#define JZ47XX_I2C_CTRL_IRQ_ENABLE BIT(4)
+#define JZ47XX_I2C_CTRL_START BIT(3)
+#define JZ47XX_I2C_CTRL_STOP BIT(2)
+#define JZ47XX_I2C_CTRL_NACK BIT(1)
+#define JZ47XX_I2C_CTRL_ENABLE BIT(0)
+
+struct jz47xx_i2c {
+ struct resource *mem;
+ void __iomem *base;
+ int irq;
+ struct clk *clk;
+
+ struct i2c_adapter adapter;
+
+ wait_queue_head_t wait_queue;
+};
+
+static inline struct jz47xx_i2c *adapter_to_jz47xx_i2c(struct i2c_adapter *adap)
+{
+ return container_of(adap, struct jz47xx_i2c, adapter);
+}
+
+static inline void jz47xx_i2c_set_ctrl(struct jz47xx_i2c *jz47xx_i2c,
+ uint8_t mask, uint8_t value)
+{
+ uint8_t ctrl;
+ ctrl = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_CTRL);
+ ctrl &= ~mask;
+ ctrl |= value;
+ printk("ctrl: %x\n", ctrl);
+ writeb(ctrl, jz47xx_i2c->base + JZ47XX_REG_I2C_CTRL);
+}
+
+static irqreturn_t jz47xx_i2c_irq_handler(int irq, void *devid)
+{
+ struct jz47xx_i2c *jz47xx_i2c = devid;
+
+ printk("IRQ\n");
+
+ wake_up(&jz47xx_i2c->wait_queue);
+
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_IRQ_ENABLE, 0);
+
+ return IRQ_HANDLED;
+}
+
+static inline void jz47xx_i2c_set_data_valid(struct jz47xx_i2c *jz47xx_i2c,
+ bool valid)
+{
+ uint8_t val;
+ val = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
+ if (valid)
+ val |= JZ47XX_I2C_STATUS_DATA_VALID;
+ else
+ val &= ~JZ47XX_I2C_STATUS_DATA_VALID;
+ writeb(val, jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
+}
+
+static int jz47xx_i2c_test_event(struct jz47xx_i2c *jz47xx_i2c, uint8_t mask, uint8_t value)
+{
+ uint8_t status;
+
+ mask |= JZ47XX_I2C_STATUS_NACK;
+ value |= JZ47XX_I2C_STATUS_NACK;
+
+ status = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
+ printk("status: %x %x %x %x\n", status, mask, value, (status & mask) ^
+ value);
+ if (((status & mask) ^ value) == mask) {
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_IRQ_ENABLE,
+ JZ47XX_I2C_CTRL_IRQ_ENABLE);
+ return 0;
+ }
+ return 1;
+}
+
+static int jz47xx_i2c_wait_event_or_nack(struct jz47xx_i2c *jz47xx_i2c, uint8_t
+mask, uint8_t value)
+{
+ int ret;
+
+ ret = wait_event_interruptible_timeout(jz47xx_i2c->wait_queue,
+ jz47xx_i2c_test_event(jz47xx_i2c, mask, value), 30 * HZ);
+
+/* while (!jz47xx_i2c_test_event(jz47xx_i2c, mask, value));
+
+ ret = 1;*/
+
+ printk("wait event or nack: %d %x\n", ret, readb(jz47xx_i2c->base +
+ JZ47XX_REG_I2C_STATUS));
+
+ if (ret == 0)
+ ret = -ETIMEDOUT;
+ else if(ret > 0) {
+ if (readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS) & JZ47XX_I2C_STATUS_NACK)
+ ret = -EIO;
+ else
+ ret = 0;
+ }
+
+ return ret;
+}
+
+static int jz47xx_i2c_wait_event(struct jz47xx_i2c *jz47xx_i2c, uint8_t event)
+{
+ int ret;
+
+ ret = wait_event_interruptible_timeout(jz47xx_i2c->wait_queue,
+ jz47xx_i2c_test_event(jz47xx_i2c, event, event), 30 * HZ);
+
+ if (ret == 0)
+ ret = -ETIMEDOUT;
+ else if(ret > 0)
+ ret = 0;
+
+ return ret;
+}
+
+
+static int jz47xx_i2c_write_msg(struct jz47xx_i2c *jz47xx_i2c,
+ struct i2c_msg *msg)
+{
+ int ret;
+ int i;
+
+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
+ for (i = 0; i < msg->len; ++i) {
+ writeb(msg->buf[i], jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
+ jz47xx_i2c_set_data_valid(jz47xx_i2c, true);
+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
+ JZ47XX_I2C_STATUS_DATA_VALID, 0);
+ if (ret)
+ break;
+ }
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_STOP,
+ JZ47XX_I2C_CTRL_STOP);
+
+ if (!ret)
+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c, JZ47XX_I2C_STATUS_TEND,
+ JZ47XX_I2C_STATUS_TEND);
+
+ return ret;
+}
+
+static int jz47xx_i2c_read_msg(struct jz47xx_i2c *jz47xx_i2c,
+ struct i2c_msg *msg)
+{
+ int i;
+ int ret;
+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
+
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
+ msg->len == 1 ? JZ47XX_I2C_CTRL_NACK : 0);
+
+ for (i = 0; i < msg->len; ++i) {
+ ret = jz47xx_i2c_wait_event(jz47xx_i2c, JZ47XX_I2C_STATUS_DATA_VALID);
+ if (ret) {
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
+ JZ47XX_I2C_CTRL_NACK);
+ break;
+ }
+
+ if (i == msg->len - 2) {
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
+ JZ47XX_I2C_CTRL_NACK);
+ }
+
+ msg->buf[i] = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
+ printk("read: %x\n", msg->buf[i]);
+ jz47xx_i2c_set_data_valid(jz47xx_i2c, false);
+ }
+
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_STOP,
+ JZ47XX_I2C_CTRL_STOP);
+
+ return ret;
+}
+
+static int jz47xx_i2c_xfer_msg(struct jz47xx_i2c *jz47xx_i2c,
+ struct i2c_msg *msg)
+{
+ uint8_t addr;
+ int ret;
+
+ addr = msg->addr << 1;
+ if (msg->flags & I2C_M_RD)
+ addr |= 1;
+
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_START,
+ JZ47XX_I2C_CTRL_START);
+ writeb(addr, jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
+ jz47xx_i2c_set_data_valid(jz47xx_i2c, true);
+
+ if (msg->flags & I2C_M_RD) {
+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
+ JZ47XX_I2C_STATUS_TEND, JZ47XX_I2C_STATUS_TEND);
+ if (!ret)
+ ret = jz47xx_i2c_read_msg(jz47xx_i2c, msg);
+ } else {
+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
+ JZ47XX_I2C_STATUS_DATA_VALID, 0);
+ if (!ret)
+ ret = jz47xx_i2c_write_msg(jz47xx_i2c, msg);
+ }
+
+ return ret;
+}
+
+static int jz47xx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int
+num)
+{
+ struct jz47xx_i2c *jz47xx_i2c = adapter_to_jz47xx_i2c(adap);
+ int ret = 0;
+ int i;
+ int mask = JZ47XX_I2C_CTRL_ENABLE;
+
+ printk("xfer: %d %x\n", num, readb(jz47xx_i2c->base +
+ JZ47XX_REG_I2C_STATUS));
+
+ clk_enable(jz47xx_i2c->clk);
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, mask, mask);
+
+ for (i = 0; i < num; ++i) {
+ ret = jz47xx_i2c_xfer_msg(jz47xx_i2c, &msgs[i]);
+ if (ret)
+ break;
+ }
+
+ jz47xx_i2c_set_ctrl(jz47xx_i2c, mask, 0);
+ clk_disable(jz47xx_i2c->clk);
+
+ printk("xfer ret: %d\n", ret);
+
+ return ret;
+}
+
+static u32 jz47xx_i2c_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm jz47xx_i2c_algorithm = {
+ .master_xfer = jz47xx_i2c_xfer,
+ .functionality = jz47xx_i2c_functionality,
+};
+
+const static struct jz_gpio_bulk_request jz47xx_i2c_pins[] = {
+ JZ_GPIO_BULK_PIN(I2C_SDA),
+ JZ_GPIO_BULK_PIN(I2C_SCK),
+};
+
+static int __devinit jz47xx_i2c_probe(struct platform_device *pdev)
+{
+ struct jz47xx_i2c *jz47xx_i2c;
+ struct resource *mem;
+ void __iomem *base;
+ struct clk *clk;
+ int irq;
+ int ret;
+
+ irq = platform_get_irq(pdev, 0);
+ if (!irq) {
+ dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
+ return irq;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem) {
+ dev_err(&pdev->dev, "Failed to get iomem region\n");
+ return -ENXIO;
+ }
+
+ mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
+ if (!mem) {
+ dev_err(&pdev->dev, "Failed to request iomem region\n");
+ return -EBUSY;
+ }
+
+ base = ioremap(mem->start, resource_size(mem));
+ if (!base) {
+ dev_err(&pdev->dev, "Failed to ioremap iomem\n");
+ ret = -EBUSY;
+ goto err_release_mem_region;
+ }
+
+ clk = clk_get(&pdev->dev, "i2c");
+ if (IS_ERR(clk)) {
+ ret = PTR_ERR(clk);
+ goto err_iounmap;
+ }
+
+ jz47xx_i2c = kzalloc(sizeof(*jz47xx_i2c), GFP_KERNEL);
+ if (!jz47xx_i2c) {
+ ret = -ENOMEM;
+ goto err_clk_put;
+ }
+
+ jz47xx_i2c->adapter.owner = THIS_MODULE;
+ jz47xx_i2c->adapter.algo = &jz47xx_i2c_algorithm;
+ jz47xx_i2c->adapter.dev.parent = &pdev->dev;
+ jz47xx_i2c->adapter.nr = pdev->id < 0 ?: 0;
+ strcpy(jz47xx_i2c->adapter.name, pdev->name);
+
+ jz47xx_i2c->mem = mem;
+ jz47xx_i2c->base = base;
+ jz47xx_i2c->clk = clk;
+ jz47xx_i2c->irq = irq;
+
+ init_waitqueue_head(&jz47xx_i2c->wait_queue);
+
+ ret = request_irq(irq, jz47xx_i2c_irq_handler, 0, pdev->name, jz47xx_i2c);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
+ goto err_free;
+ }
+
+ ret = jz_gpio_bulk_request(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request i2c pins: %d\n", ret);
+ goto err_free_irq;
+ }
+
+ writew(0x10, jz47xx_i2c->base + JZ47XX_REG_I2C_CLOCK);
+
+ ret = i2c_add_numbered_adapter(&jz47xx_i2c->adapter);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to add i2c adapter: %d\n", ret);
+ goto err_free_gpios;
+ }
+
+ platform_set_drvdata(pdev, jz47xx_i2c);
+
+ printk("JZ4740 I2C\n");
+
+ return 0;
+
+err_free_gpios:
+ jz_gpio_bulk_free(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
+err_free_irq:
+ free_irq(irq, jz47xx_i2c);
+err_free:
+ kfree(jz47xx_i2c);
+err_clk_put:
+ clk_put(clk);
+err_iounmap:
+ iounmap(base);
+err_release_mem_region:
+ release_mem_region(mem->start, resource_size(mem));
+ return ret;
+}
+
+static int __devexit jz47xx_i2c_remove(struct platform_device *pdev)
+{
+ struct jz47xx_i2c *jz47xx_i2c = platform_get_drvdata(pdev);
+
+ platform_set_drvdata(pdev, NULL);
+ i2c_del_adapter(&jz47xx_i2c->adapter);
+
+ jz_gpio_bulk_free(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
+
+ free_irq(jz47xx_i2c->irq, jz47xx_i2c);
+ clk_put(jz47xx_i2c->clk);
+
+ iounmap(jz47xx_i2c->base);
+ release_mem_region(jz47xx_i2c->mem->start, resource_size(jz47xx_i2c->mem));
+
+ kfree(jz47xx_i2c);
+
+ return 0;
+}
+
+static struct platform_driver jz47xx_i2c_driver = {
+ .probe = jz47xx_i2c_probe,
+ .remove = jz47xx_i2c_remove,
+ .driver = {
+ .name = "jz47xx-i2c",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init jz47xx_i2c_init(void)
+{
+ return platform_driver_register(&jz47xx_i2c_driver);
+}
+module_init(jz47xx_i2c_init);
+
+static void jz47xx_i2c_exit(void)
+{
+ platform_driver_unregister(&jz47xx_i2c_driver);
+}
+module_exit(jz47xx_i2c_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("I2C adapter driver for JZ47XX SoCs");
+MODULE_ALIAS("platform:jz47xx-i2c");
+

24
target/linux/xburst/patches-2.6.37/051-fix-i2c-driver-name.patch
View File

@ -1,24 +0,0 @@
From 1a340ab0d36718e3cd522134c7c5746040c3c93e Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 5 Sep 2010 03:21:51 +0200
Subject: [PATCH 11/23] MIPS: JZ4740: Fix i2c driver name.
The i2c driver is generic to all JZ47XX based SoCs not only the JZ4740. Reflect
this in the driver name.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
arch/mips/jz4740/platform.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -142,7 +142,7 @@ static struct resource jz4740_i2c_resour
};
struct platform_device jz4740_i2c_device = {
- .name = "jz4740-i2c",
+ .name = "jz47xx-i2c",
.id = 0,
.num_resources = ARRAY_SIZE(jz4740_i2c_resources),
.resource = jz4740_i2c_resources,

90
target/linux/xburst/patches-2.6.37/060-adc-touchscreen.patch
View File

@ -1,90 +0,0 @@
From 424b737e5a1858dafc8138fd59d154f0493b21d0 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 5 Sep 2010 20:36:59 +0200
Subject: [PATCH 13/23] MFD: jz4740-adc: Add support for the touchscreen part of the adc unit
---
drivers/mfd/jz4740-adc.c | 39 ++++++++++++++++++++++++++++++++++++---
include/linux/jz4740-adc.h | 2 +-
2 files changed, 37 insertions(+), 4 deletions(-)
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -46,9 +46,9 @@
enum {
JZ_ADC_IRQ_ADCIN = 0,
JZ_ADC_IRQ_BATTERY,
- JZ_ADC_IRQ_TOUCH,
- JZ_ADC_IRQ_PENUP,
- JZ_ADC_IRQ_PENDOWN,
+ JZ_ADC_IRQ_TS_DATA_READY,
+ JZ_ADC_IRQ_TS_PENUP,
+ JZ_ADC_IRQ_TS_PENDOWN,
};
struct jz4740_adc {
@@ -101,6 +101,7 @@ static void jz4740_adc_irq_ack(unsigned
struct jz4740_adc *adc = get_irq_chip_data(irq);
irq -= adc->irq_base;
+
writeb(BIT(irq), adc->base + JZ_REG_ADC_STATUS);
}
@@ -227,6 +228,27 @@ static struct resource jz4740_battery_re
},
};
+static struct resource jz4740_ts_resources[] = {
+ {
+ .start = JZ_ADC_IRQ_TS_DATA_READY,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = JZ_ADC_IRQ_TS_PENUP,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = JZ_ADC_IRQ_TS_PENDOWN,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = JZ_REG_ADC_TOUCHSCREEN_BASE,
+ .end = JZ_REG_ADC_TOUCHSCREEN_BASE + 0xb,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+
const struct mfd_cell jz4740_adc_cells[] = {
{
.id = 0,
@@ -248,6 +270,17 @@ const struct mfd_cell jz4740_adc_cells[]
.data_size = sizeof(struct mfd_cell),
.enable = jz4740_adc_cell_enable,
+ .disable = jz4740_adc_cell_disable,
+ },
+ {
+ .id = 2,
+ .name = "jz4740-ts",
+ .num_resources = ARRAY_SIZE(jz4740_ts_resources),
+ .resources = jz4740_ts_resources,
+ .platform_data = (void *)&jz4740_adc_cells[2],
+ .data_size = sizeof(struct mfd_cell),
+
+ .enable = jz4740_adc_cell_enable,
.disable = jz4740_adc_cell_disable,
},
};
--- a/include/linux/jz4740-adc.h
+++ b/include/linux/jz4740-adc.h
@@ -25,7 +25,7 @@ int jz4740_adc_set_config(struct device
#define JZ_ADC_CONFIG_BAT_MB BIT(4)
#define JZ_ADC_CONFIG_DNUM(dnum) ((dnum) << 16)
-#define JZ_ADC_CONFIG_XYZ_OFFSET(dnum) ((xyz) << 13)
+#define JZ_ADC_CONFIG_XYZ_OFFSET(xyz) ((xyz) << 13)
#define JZ_ADC_CONFIG_SAMPLE_NUM(x) ((x) << 10)
#define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5)

379
target/linux/xburst/patches-2.6.37/061-touchscreen.patch
View File

@ -1,379 +0,0 @@
From d231cea1dca0c1b04d11cbf996077cf59612e3c4 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 5 Sep 2010 20:45:08 +0200
Subject: [PATCH 14/23] input: Add touchscreen driver for the JZ4740 SoC
This patch adds a touchscreen driver for the Ingenic JZ4740 SoC.
The touchscreen controller is part of the ADC unit and thus this driver is a mfd
cell from the jz4740-adc driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
drivers/input/touchscreen/Kconfig | 12 ++
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/jz4740-ts.c | 330 +++++++++++++++++++++++++++++++++
3 files changed, 343 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/touchscreen/jz4740-ts.c
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -681,4 +681,16 @@ config TOUCHSCREEN_STMPE
To compile this driver as a module, choose M here: the
module will be called stmpe-ts.
+config TOUCHSCREEN_JZ4740
+ tristate "JZ4740 touchscreen support"
+ depends on MFD_JZ4740_ADC
+ help
+ Say Y here if you want support for the touchscreen controller found on
+ Ingenic JZ4740 SoCs.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called jz4740-ts.
+
endif
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_TOUCHSCREEN_FUJITSU) += fuj
obj-$(CONFIG_TOUCHSCREEN_INEXIO) += inexio.o
obj-$(CONFIG_TOUCHSCREEN_INTEL_MID) += intel-mid-touch.o
obj-$(CONFIG_TOUCHSCREEN_LPC32XX) += lpc32xx_ts.o
+obj-$(CONFIG_TOUCHSCREEN_JZ4740) += jz4740-ts.o
obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o
obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o
obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o
--- /dev/null
+++ b/drivers/input/touchscreen/jz4740-ts.c
@@ -0,0 +1,330 @@
+/*
+ * Touchscreen driver for Ingenic JZ SoCs.
+ *
+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include <linux/delay.h>
+#include <linux/mfd/core.h>
+#include <linux/input.h>
+#include <linux/bitops.h>
+#include <linux/jz4740-adc.h>
+
+struct jz4740_ts {
+ struct platform_device *pdev;
+
+ struct resource *mem;
+ void __iomem *base;
+
+ int irq_penup;
+ int irq_pendown;
+ int irq_data_ready;
+
+ struct mfd_cell *cell;
+ struct input_dev *input;
+
+ bool is_open;
+};
+
+static irqreturn_t jz4740_ts_data_ready_irq_handler(int irq, void *devid)
+{
+ struct jz4740_ts *jz4740_ts = devid;
+ uint32_t data;
+ unsigned long x, y, z1, z2, pressure;
+
+ data = readl(jz4740_ts->base + 0x08);
+ x = data & 0xfff;
+ y = (data >> 16) & 0xfff;
+
+ data = readl(jz4740_ts->base + 0x08);
+ z1 = data & 0xfff;
+ z2 = (data >> 16) & 0xfff;
+ if (z1 == 0) {
+ pressure = 4095UL;
+ } else if (z1 > z2) {
+ pressure = 0;
+ } else {
+ if (data & 0x8000)
+ pressure = (((480UL * x * z2) / z1) - 480UL * x) / 4096UL;
+ else
+ pressure = (((272UL * y * z2) / z1) - 272UL * y) / 4096UL;
+ if (pressure >= 4096UL)
+ pressure = 4095UL;
+ pressure = 4095UL - pressure;
+ }
+
+ input_report_abs(jz4740_ts->input, ABS_X, y);
+ input_report_abs(jz4740_ts->input, ABS_Y, 4095 - x);
+ input_report_abs(jz4740_ts->input, ABS_PRESSURE, pressure);
+ input_report_key(jz4740_ts->input, BTN_TOUCH, 1);
+ input_sync(jz4740_ts->input);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t jz4740_ts_pen_irq_handler(int irq, void *devid)
+{
+ struct jz4740_ts *jz4740_ts = devid;
+ int is_pressed;
+
+ if (irq == jz4740_ts->irq_penup) {
+ enable_irq(jz4740_ts->irq_pendown);
+ is_pressed = 0;
+ } else {
+ enable_irq(jz4740_ts->irq_penup);
+ is_pressed = 1;
+ }
+ disable_irq_nosync(irq);
+
+ printk("pen irq: %d\n", irq);
+ input_report_key(jz4740_ts->input, BTN_TOUCH, is_pressed);
+ if (is_pressed == 0)
+ input_report_abs(jz4740_ts->input, ABS_PRESSURE, 0);
+ input_sync(jz4740_ts->input);
+
+ return IRQ_HANDLED;
+}
+
+static int jz4740_ts_open(struct input_dev *input)
+{
+ struct jz4740_ts *jz4740_ts = input_get_drvdata(input);
+
+ jz4740_ts->is_open = true;
+ jz4740_ts->cell->enable(jz4740_ts->pdev);
+
+ return 0;
+}
+
+static void jz4740_ts_close(struct input_dev *input)
+{
+ struct jz4740_ts *jz4740_ts = input_get_drvdata(input);
+
+ jz4740_ts->cell->disable(jz4740_ts->pdev);
+ jz4740_ts->is_open = false;
+}
+
+static int __devinit jz4740_ts_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct jz4740_ts *jz4740_ts;
+ struct input_dev *input;
+
+ jz4740_ts = kzalloc(sizeof(*jz4740_ts), GFP_KERNEL);
+ if (!jz4740_ts) {
+ dev_err(&pdev->dev, "Failed to allocate driver structure\n");
+ return -ENOMEM;
+ }
+
+ jz4740_ts->pdev = pdev;
+ jz4740_ts->cell = pdev->dev.platform_data;
+
+ jz4740_ts->irq_data_ready = platform_get_irq(pdev, 0);
+ if (jz4740_ts->irq_data_ready < 0) {
+ ret = jz4740_ts->irq_data_ready;
+ dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
+ goto err_free;
+ }
+
+ jz4740_ts->irq_penup = platform_get_irq(pdev, 1);
+ if (jz4740_ts->irq_penup < 0) {
+ ret = jz4740_ts->irq_penup;
+ dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
+ goto err_free;
+ }
+
+ jz4740_ts->irq_pendown = platform_get_irq(pdev, 2);
+ if (jz4740_ts->irq_pendown < 0) {
+ ret = jz4740_ts->irq_pendown;
+ dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
+ goto err_free;
+ }
+
+ jz4740_ts->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!jz4740_ts->mem) {
+ ret = -ENOENT;
+ dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
+ goto err_free;
+ }
+
+ jz4740_ts->mem = request_mem_region(jz4740_ts->mem->start,
+ resource_size(jz4740_ts->mem), pdev->name);
+ if (!jz4740_ts->mem) {
+ ret = -EBUSY;
+ dev_err(&pdev->dev, "Failed to request mmio memory region\n");
+ goto err_free;
+ }
+
+ jz4740_ts->base = ioremap_nocache(jz4740_ts->mem->start,
+ resource_size(jz4740_ts->mem));
+ if (!jz4740_ts->base) {
+ ret = -EBUSY;
+ dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
+ goto err_release_mem_region;
+ }
+
+ input = input_allocate_device();
+ if (!input) {
+ dev_err(&pdev->dev, "Failed to allocate input device\n");
+ ret = -ENOMEM;
+ goto err_iounmap;
+ }
+
+ input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+ __set_bit(BTN_TOUCH, input->keybit);
+
+ input_set_abs_params(input, ABS_X, 150, 3920, 0, 0);
+ input_set_abs_params(input, ABS_Y, 270, 3700, 0, 0);
+ input_set_abs_params(input, ABS_PRESSURE, 0, 4096, 0, 0);
+
+ input->name = pdev->name;
+ input->phys = "jz4740";
+ input->id.bustype = BUS_HOST;
+ input->dev.parent = &pdev->dev;
+
+ input->open = jz4740_ts_open;
+ input->close = jz4740_ts_close;
+
+ input_set_drvdata(input, jz4740_ts);
+
+ ret = input_register_device(input);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to register input device: %d\n", ret);
+ input_free_device(input);
+ goto err_iounmap;
+ }
+ jz4740_ts->input = input;
+
+ ret = request_irq(jz4740_ts->irq_data_ready, jz4740_ts_data_ready_irq_handler, 0, pdev->name,
+ jz4740_ts);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request irq %d\n", ret);
+ goto err_input_unregister_device;
+ }
+ ret = request_irq(jz4740_ts->irq_penup, jz4740_ts_pen_irq_handler, 0, pdev->name,
+ jz4740_ts);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request irq %d\n", ret);
+ goto err_free_irq_data_ready;
+ }
+ disable_irq(jz4740_ts->irq_penup);
+ ret = request_irq(jz4740_ts->irq_pendown, jz4740_ts_pen_irq_handler, 0, pdev->name,
+ jz4740_ts);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request irq %d\n", ret);
+ goto err_free_irq_penup;
+ }
+ platform_set_drvdata(pdev, jz4740_ts);
+
+ jz4740_adc_set_config(pdev->dev.parent,
+ JZ_ADC_CONFIG_EX_IN | JZ_ADC_CONFIG_XYZ_OFFSET(2) | JZ_ADC_CONFIG_DNUM(7),
+ JZ_ADC_CONFIG_EX_IN | JZ_ADC_CONFIG_XYZ_MASK | JZ_ADC_CONFIG_DNUM_MASK);
+
+
+ writel(0x15e, jz4740_ts->base);
+ writel(0x32, jz4740_ts->base + 0x04);
+
+ return 0;
+
+err_free_irq_penup:
+ free_irq(jz4740_ts->irq_penup, jz4740_ts);
+err_free_irq_data_ready:
+ free_irq(jz4740_ts->irq_data_ready, jz4740_ts);
+err_input_unregister_device:
+ input_unregister_device(jz4740_ts->input);
+err_iounmap:
+ platform_set_drvdata(pdev, NULL);
+ iounmap(jz4740_ts->base);
+err_release_mem_region:
+ release_mem_region(jz4740_ts->mem->start, resource_size(jz4740_ts->mem));
+err_free:
+ kfree(jz4740_ts);
+ return ret;
+}
+
+static int __devexit jz4740_ts_remove(struct platform_device *pdev)
+{
+ struct jz4740_ts *jz4740_ts = platform_get_drvdata(pdev);
+
+
+ free_irq(jz4740_ts->irq_pendown, jz4740_ts);
+ free_irq(jz4740_ts->irq_penup, jz4740_ts);
+ free_irq(jz4740_ts->irq_data_ready, jz4740_ts);
+
+ input_unregister_device(jz4740_ts->input);
+
+ iounmap(jz4740_ts->base);
+ release_mem_region(jz4740_ts->mem->start, resource_size(jz4740_ts->mem));
+
+ kfree(jz4740_ts);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int jz4740_ts_suspend(struct device *dev)
+{
+ struct jz4740_ts *jz4740_ts = dev_get_drvdata(dev);
+
+ if (jz4740_ts->is_open);
+ jz4740_ts->cell->disable(jz4740_ts->pdev);
+
+ return 0;
+}
+
+static int jz4740_ts_resume(struct device *dev)
+{
+ struct jz4740_ts *jz4740_ts = dev_get_drvdata(dev);
+
+ if (jz4740_ts->is_open);
+ jz4740_ts->cell->enable(jz4740_ts->pdev);
+
+ return 0;
+}
+
+static const struct dev_pm_ops jz4740_ts_pm_ops = {
+ .suspend = jz4740_ts_suspend,
+ .resume = jz4740_ts_resume,
+};
+
+#define JZ4740_TS_PM_OPS (&jz4740_ts_pm_ops)
+#else
+#define JZ4740_TS_PM_OPS NULL
+#endif
+
+static struct platform_driver jz4740_ts_driver = {
+ .probe = jz4740_ts_probe,
+ .remove = __devexit_p(jz4740_ts_remove),
+ .driver = {
+ .name = "jz4740-ts",
+ .owner = THIS_MODULE,
+ .pm = JZ4740_TS_PM_OPS,
+ },
+};
+
+static int __init jz4740_ts_init(void)
+{
+ return platform_driver_register(&jz4740_ts_driver);
+}
+module_init(jz4740_ts_init);
+
+static void __exit jz4740_ts_exit(void)
+{
+ platform_driver_unregister(&jz4740_ts_driver);
+}
+module_exit(jz4740_ts_exit);
+
+MODULE_ALIAS("platform:jz4740-ts");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("JZ4740 SoC battery driver");

304
target/linux/xburst/patches-2.6.37/100-lcm.patch
View File

@ -1,304 +0,0 @@
From 85061058491114869860964b73e2ae0aacce446e Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 1 Aug 2010 21:19:40 +0200
Subject: [PATCH 03/23] Add ili8960 lcd driver
---
drivers/video/backlight/Kconfig | 7 +
drivers/video/backlight/Makefile | 1 +
drivers/video/backlight/ili8960.c | 263 +++++++++++++++++++++++++++++++++++++
3 files changed, 271 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/backlight/ili8960.c
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -59,6 +59,13 @@ config LCD_LTV350QV
The LTV350QV panel is present on all ATSTK1000 boards.
+config LCD_ILI8960
+ tristate "Ilitek ili8960 LCD driver"
+ depends on LCD_CLASS_DEVICE && SPI
+ default n
+ help
+ Driver for the Ilitek ili8960 LCD controller chip.
+
config LCD_ILI9320
tristate
help
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_LCD_HP700) += jornada72
obj-$(CONFIG_LCD_L4F00242T03) += l4f00242t03.o
obj-$(CONFIG_LCD_LMS283GF05) += lms283gf05.o
obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
+obj-$(CONFIG_LCD_ILI8960) += ili8960.o
obj-$(CONFIG_LCD_ILI9320) += ili9320.o
obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o
obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o
--- /dev/null
+++ b/drivers/video/backlight/ili8960.c
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Driver for Ilitek ili8960 LCD
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/lcd.h>
+#include <linux/backlight.h>
+#include <linux/delay.h>
+
+struct ili8960 {
+ struct spi_device *spi;
+ struct lcd_device *lcd;
+ struct backlight_device *bl;
+ bool enabled;
+ unsigned int brightness;
+};
+
+#define ILI8960_REG_BRIGHTNESS 0x03
+#define ILI8960_REG_POWER 0x05
+#define ILI8960_REG_CONTRAST 0x0d
+
+static int ili8960_write_reg(struct spi_device *spi, uint8_t reg,
+ uint8_t data)
+{
+ uint8_t buf[2];
+ buf[0] = ((reg & 0x40) << 1) | (reg & 0x3f);
+ buf[1] = data;
+
+ return spi_write(spi, buf, sizeof(buf));
+}
+
+static int ili8960_programm_power(struct spi_device *spi, bool enabled)
+{
+ int ret;
+
+ if (enabled)
+ mdelay(20);
+
+ ret = ili8960_write_reg(spi, ILI8960_REG_POWER, enabled ? 0xc7 : 0xc6);
+
+ if (!enabled)
+ mdelay(20);
+
+ return ret;
+}
+
+static int ili8960_set_power(struct lcd_device *lcd, int power)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+
+ switch (power) {
+ case FB_BLANK_UNBLANK:
+ ili8960->enabled = true;
+ break;
+ default:
+ ili8960->enabled = false;
+ break;
+ }
+
+ return ili8960_programm_power(ili8960->spi, ili8960->enabled);
+}
+
+static int ili8960_get_power(struct lcd_device *lcd)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+ return ili8960->enabled ? FB_BLANK_UNBLANK : FB_BLANK_POWERDOWN;
+}
+
+static int ili8960_set_contrast(struct lcd_device *lcd, int contrast)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+
+ return ili8960_write_reg(ili8960->spi, ILI8960_REG_CONTRAST, contrast);
+}
+
+static int ili8960_set_mode(struct lcd_device *lcd, struct fb_videomode *mode)
+{
+ if (mode->xres != 320 && mode->yres != 240)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int ili8960_set_brightness(struct ili8960 *ili8960, int brightness)
+{
+ int ret;
+
+ ret = ili8960_write_reg(ili8960->spi, ILI8960_REG_BRIGHTNESS, brightness);
+
+ if (ret == 0)
+ ili8960->brightness = brightness;
+
+ return ret;
+}
+
+static ssize_t ili8960_show_brightness(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct lcd_device *ld = to_lcd_device(dev);
+ struct ili8960 *ili8960 = lcd_get_data(ld);
+
+ return sprintf(buf, "%u\n", ili8960->brightness);
+}
+
+static ssize_t ili8960_store_brightness(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct lcd_device *ld = to_lcd_device(dev);
+ struct ili8960 *ili8960 = lcd_get_data(ld);
+ unsigned long brightness;
+ int ret;
+
+ ret = strict_strtoul(buf, 0, &brightness);
+ if (ret)
+ return ret;
+
+ if (brightness > 255)
+ return -EINVAL;
+
+ ili8960_set_brightness(ili8960, brightness);
+
+ return count;
+}
+
+
+static DEVICE_ATTR(brightness, 0644, ili8960_show_brightness,
+ ili8960_store_brightness);
+
+static struct lcd_ops ili8960_lcd_ops = {
+ .set_power = ili8960_set_power,
+ .get_power = ili8960_get_power,
+ .set_contrast = ili8960_set_contrast,
+ .set_mode = ili8960_set_mode,
+};
+
+static int __devinit ili8960_probe(struct spi_device *spi)
+{
+ int ret;
+ struct ili8960 *ili8960;
+
+ ili8960 = kmalloc(sizeof(*ili8960), GFP_KERNEL);
+ if (!ili8960)
+ return -ENOMEM;
+
+ spi->bits_per_word = 8;
+ spi->mode = SPI_MODE_3;
+
+ ret = spi_setup(spi);
+ if (ret) {
+ dev_err(&spi->dev, "Failed to setup spi\n");
+ goto err_free_ili8960;
+ }
+
+ ili8960->spi = spi;
+
+ ili8960->lcd = lcd_device_register("ili8960-lcd", &spi->dev, ili8960,
+ &ili8960_lcd_ops);
+
+ if (IS_ERR(ili8960->lcd)) {
+ ret = PTR_ERR(ili8960->lcd);
+ dev_err(&spi->dev, "Failed to register lcd device: %d\n", ret);
+ goto err_free_ili8960;
+ }
+
+ ili8960->lcd->props.max_contrast = 255;
+
+ ret = device_create_file(&ili8960->lcd->dev, &dev_attr_brightness);
+ if (ret)
+ goto err_unregister_lcd;
+
+ ili8960_programm_power(ili8960->spi, true);
+ ili8960->enabled = true;
+
+ spi_set_drvdata(spi, ili8960);
+
+ ili8960_write_reg(spi, 0x13, 0x01);
+
+ return 0;
+err_unregister_lcd:
+ lcd_device_unregister(ili8960->lcd);
+err_free_ili8960:
+ kfree(ili8960);
+ return ret;
+}
+
+static int __devexit ili8960_remove(struct spi_device *spi)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ device_remove_file(&ili8960->lcd->dev, &dev_attr_brightness);
+ lcd_device_unregister(ili8960->lcd);
+
+ spi_set_drvdata(spi, NULL);
+ kfree(ili8960);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int ili8960_suspend(struct spi_device *spi, pm_message_t state)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ if (ili8960->enabled)
+ ili8960_programm_power(ili8960->spi, false);
+
+ return 0;
+}
+
+static int ili8960_resume(struct spi_device *spi)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ if (ili8960->enabled)
+ ili8960_programm_power(ili8960->spi, true);
+
+ return 0;
+}
+
+#else
+#define ili8960_suspend NULL
+#define ili8960_resume NULL
+#endif
+
+static struct spi_driver ili8960_driver = {
+ .driver = {
+ .name = "ili8960",
+ .owner = THIS_MODULE,
+ },
+ .probe = ili8960_probe,
+ .remove = __devexit_p(ili8960_remove),
+ .suspend = ili8960_suspend,
+ .resume = ili8960_resume,
+};
+
+static int __init ili8960_init(void)
+{
+ return spi_register_driver(&ili8960_driver);
+}
+module_init(ili8960_init);
+
+static void __exit ili8960_exit(void)
+{
+ spi_unregister_driver(&ili8960_driver);
+}
+module_exit(ili8960_exit)
+
+MODULE_AUTHOR("Lars-Peter Clausen");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("LCD driver for Ilitek ili8960");
+MODULE_ALIAS("spi:ili8960");

254
target/linux/xburst/patches-2.6.37/102-gpio-charger.patch
View File

@ -1,254 +0,0 @@
From 27681cf969174af00e63d572f257e2155bb914be Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:29:31 +0200
Subject: [PATCH 04/23] Add gpio chager driver
---
drivers/power/Kconfig | 7 ++
drivers/power/Makefile | 1 +
drivers/power/gpio-charger.c | 185 ++++++++++++++++++++++++++++++++++++
include/linux/power/gpio-charger.h | 28 ++++++
4 files changed, 221 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/gpio-charger.c
create mode 100644 include/linux/power/gpio-charger.h
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -185,4 +185,11 @@ config CHARGER_TWL4030
help
Say Y here to enable support for TWL4030 Battery Charge Interface.
+config CHARGER_GPIO
+ tristate "GPIO charger"
+ depends on GPIOLIB
+ help
+ Say Y to include support for chargers indicating their status through
+ a GPIO pin.
+
endif # POWER_SUPPLY
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -32,3 +32,4 @@ obj-$(CONFIG_BATTERY_JZ4740) += jz4740-b
obj-$(CONFIG_BATTERY_INTEL_MID) += intel_mid_battery.o
obj-$(CONFIG_CHARGER_ISP1704) += isp1704_charger.o
obj-$(CONFIG_CHARGER_TWL4030) += twl4030_charger.o
+obj-$(CONFIG_CHARGER_GPIO) += gpio-charger.o
--- /dev/null
+++ b/drivers/power/gpio-charger.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Driver for chargers indicating their status through a GPIO pin
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#include <linux/power/gpio-charger.h>
+
+struct gpio_charger {
+ const struct gpio_charger_platform_data *pdata;
+
+ int irq;
+
+ struct power_supply charger;
+};
+
+static irqreturn_t gpio_charger_irq(int irq, void *devid)
+{
+ struct power_supply *charger = devid;
+ power_supply_changed(charger);
+
+ return IRQ_HANDLED;
+}
+
+static inline struct gpio_charger *psy_to_gpio_charger(struct power_supply *psy)
+{
+ return container_of(psy, struct gpio_charger, charger);
+}
+
+static int gpio_charger_get_property(struct power_supply *psy,
+ enum power_supply_property psp, union power_supply_propval *val)
+{
+ struct gpio_charger *gpio_charger = psy_to_gpio_charger(psy);
+ const struct gpio_charger_platform_data *pdata = gpio_charger->pdata;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_ONLINE:
+ val->intval = gpio_get_value(pdata->gpio);
+ val->intval ^= pdata->gpio_active_low;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static enum power_supply_property gpio_charger_properties[] = {
+ POWER_SUPPLY_PROP_ONLINE,
+};
+
+static int __devinit gpio_charger_probe(struct platform_device *pdev)
+{
+ const struct gpio_charger_platform_data *pdata = pdev->dev.platform_data;
+ struct gpio_charger *gpio_charger;
+ struct power_supply *charger;
+ int ret;
+
+ if (!pdata) {
+ dev_err(&pdev->dev, "No platform data");
+ return -EINVAL;
+ }
+
+ gpio_charger = kzalloc(sizeof(*gpio_charger), GFP_KERNEL);
+
+ charger = &gpio_charger->charger;
+
+ charger->name = pdata->name;
+ charger->type = pdata->type;
+ charger->properties = gpio_charger_properties;
+ charger->num_properties = ARRAY_SIZE(gpio_charger_properties);
+ charger->get_property = gpio_charger_get_property;
+ charger->supplied_to = pdata->batteries;
+ charger->num_supplicants = pdata->num_batteries;
+
+ if (gpio_is_valid(pdata->gpio)) {
+ ret = gpio_request(pdata->gpio, dev_name(&pdev->dev));
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request gpio pin: %d\n", ret);
+ goto err;
+ }
+ ret = gpio_direction_input(pdata->gpio);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to set gpio to input: %d\n", ret);
+ goto err_gpio_free;
+ }
+
+ gpio_charger->irq = gpio_to_irq(pdata->gpio);
+ if (gpio_charger->irq >= 0) {
+ ret = request_irq(gpio_charger->irq, gpio_charger_irq,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ dev_name(&pdev->dev), charger);
+ if (ret) {
+ dev_warn(&pdev->dev, "Failed to request online gpio irq: %d\n", ret);
+ gpio_charger->irq = -1;
+ }
+ }
+ }
+
+ gpio_charger->pdata = pdata;
+
+ ret = power_supply_register(&pdev->dev, charger);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Failed to register power supply: %d\n", ret);
+ goto err_gpio_free;
+ }
+
+ platform_set_drvdata(pdev, gpio_charger);
+
+ return 0;
+
+err_gpio_free:
+ if (gpio_is_valid(pdata->gpio)) {
+ if (gpio_charger->irq >= 0)
+ free_irq(gpio_charger->irq, charger);
+ gpio_free(pdata->gpio);
+ }
+err:
+ return ret;
+}
+
+static int __devexit gpio_charger_remove(struct platform_device *pdev)
+{
+ struct gpio_charger *gpio_charger = platform_get_drvdata(pdev);
+ const struct gpio_charger_platform_data *pdata = gpio_charger->pdata;
+
+ power_supply_unregister(&gpio_charger->charger);
+
+ if (gpio_is_valid(pdata->gpio)) {
+ if (gpio_charger->irq >= 0)
+ free_irq(gpio_charger->irq, &gpio_charger->charger);
+ gpio_free(pdata->gpio);
+ }
+
+ platform_set_drvdata(pdev, NULL);
+ kfree(gpio_charger);
+
+ return 0;
+}
+
+static struct platform_driver gpio_charger_driver = {
+ .probe = gpio_charger_probe,
+ .remove = __devexit_p(gpio_charger_remove),
+ .driver = {
+ .name = "gpio-charger",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init gpio_charger_init(void)
+{
+ return platform_driver_register(&gpio_charger_driver);
+}
+module_init(gpio_charger_init);
+
+static void __exit gpio_charger_exit(void)
+{
+ platform_driver_unregister(&gpio_charger_driver);
+}
+module_exit(gpio_charger_exit);
+
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
+MODULE_DESCRIPTION("Driver for chargers indicating their status through a gpio");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-charger");
--- /dev/null
+++ b/include/linux/power/gpio-charger.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __LINUX_POWER_GPIO_CHARGER_H__
+#define __LINUX_POWER_GPIO_CHARGER_H__
+
+struct gpio_charger_platform_data {
+ const char *name;
+ enum power_supply_type type;
+ int gpio;
+ int gpio_active_low;
+
+ char **batteries;
+ size_t num_batteries;
+};
+
+#endif

2563
target/linux/xburst/patches-2.6.37/200-udc.patch
View File

File diff suppressed because it is too large Load Diff

14
target/linux/xburst/patches-2.6.37/300-battery-fixes.patch
View File

@ -1,14 +0,0 @@
--- a/drivers/power/jz4740-battery.c
+++ b/drivers/power/jz4740-battery.c
@@ -246,6 +246,11 @@ static int __devinit jz_battery_probe(st
struct jz_battery *jz_battery;
struct power_supply *battery;
+ if (!pdata) {
+ dev_err(&pdev->dev, "No platform_data supplied\n");
+ return -ENXIO;
+ }
+
jz_battery = kzalloc(sizeof(*jz_battery), GFP_KERNEL);
if (!jz_battery) {
dev_err(&pdev->dev, "Failed to allocate driver structure\n");

90
target/linux/xburst/patches-2.6.37/302-nand-fixes.patch
View File

@ -1,90 +0,0 @@
From 3ac9f7e0bc48b3c9ab6529410a2b8f3f9eac5bc5 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Wed, 10 Nov 2010 11:29:36 +0100
Subject: [PATCH 20/23] MTD: NAND: jz4740: Make 'struct platform_driver jz_nand_driver' static
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
drivers/mtd/nand/jz4740_nand.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -251,58 +251,6 @@ static int jz_nand_correct_ecc_rs(struct
return 0;
}
-
-/* Copy paste of nand_read_page_hwecc_oob_first except for different eccpos
- * handling. The ecc area is for 4k chips 72 bytes long and thus does not fit
- * into the eccpos array. */
-static int jz_nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
- struct nand_chip *chip, uint8_t *buf, int page)
-{
- int i, eccsize = chip->ecc.size;
- int eccbytes = chip->ecc.bytes;
- int eccsteps = chip->ecc.steps;
- uint8_t *p = buf;
- unsigned int ecc_offset = chip->page_shift;
-
- /* Read the OOB area first */
- chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
-
- for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
- int stat;
-
- chip->ecc.hwctl(mtd, NAND_ECC_READ);
- chip->read_buf(mtd, p, eccsize);
-
- stat = chip->ecc.correct(mtd, p, &chip->oob_poi[i], NULL);
- if (stat < 0)
- mtd->ecc_stats.failed++;
- else
- mtd->ecc_stats.corrected += stat;
- }
- return 0;
-}
-
-/* Copy-and-paste of nand_write_page_hwecc with different eccpos handling. */
-static void jz_nand_write_page_hwecc(struct mtd_info *mtd,
- struct nand_chip *chip, const uint8_t *buf)
-{
- int i, eccsize = chip->ecc.size;
- int eccbytes = chip->ecc.bytes;
- int eccsteps = chip->ecc.steps;
- const uint8_t *p = buf;
- unsigned int ecc_offset = chip->page_shift;
-
- for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
- chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
- chip->write_buf(mtd, p, eccsize);
- chip->ecc.calculate(mtd, p, &chip->oob_poi[i]);
- }
-
- chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
-}
-
#ifdef CONFIG_MTD_CMDLINE_PARTS
static const char *part_probes[] = {"cmdline", NULL};
#endif
@@ -393,9 +341,6 @@ static int __devinit jz_nand_probe(struc
chip->ecc.size = 512;
chip->ecc.bytes = 9;
- chip->ecc.read_page = jz_nand_read_page_hwecc_oob_first;
- chip->ecc.write_page = jz_nand_write_page_hwecc;
-
if (pdata)
chip->ecc.layout = pdata->ecc_layout;
@@ -489,7 +434,7 @@ static int __devexit jz_nand_remove(stru
return 0;
}
-struct platform_driver jz_nand_driver = {
+static struct platform_driver jz_nand_driver = {
.probe = jz_nand_probe,
.remove = __devexit_p(jz_nand_remove),
.driver = {

51
target/linux/xburst/patches-2.6.37/303-qi_lb60-set-nand-ecc-offsets.patch
View File

@ -1,51 +0,0 @@
From 6bbab54ef3cbfc340a3d3ffdcb0aa47bb4c29de9 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Thu, 11 Nov 2010 19:05:40 +0100
Subject: [PATCH 22/23] MIPS: JZ4740: Set nand ecc offsets for the qi_lb60 board
Now that the mtd core supports more then 64 ecc bytes we can use it instead of
some a custom hack in the jz4740 nand driver.
This patches sets the ecc pos fields of the ecc_layout of the qi_lb60 board.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
---
arch/mips/jz4740/board-qi_lb60.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -50,14 +50,14 @@ static bool is_avt2;
/* NAND */
static struct nand_ecclayout qi_lb60_ecclayout_1gb = {
-/* .eccbytes = 36,
+ .eccbytes = 36,
.eccpos = {
6, 7, 8, 9, 10, 11, 12, 13,
14, 15, 16, 17, 18, 19, 20, 21,
22, 23, 24, 25, 26, 27, 28, 29,
30, 31, 32, 33, 34, 35, 36, 37,
38, 39, 40, 41
- },*/
+ },
.oobfree = {
{ .offset = 2, .length = 4 },
{ .offset = 42, .length = 22 }
@@ -86,7 +86,7 @@ static struct mtd_partition qi_lb60_part
};
static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
-/* .eccbytes = 72,
+ .eccbytes = 72,
.eccpos = {
12, 13, 14, 15, 16, 17, 18, 19,
20, 21, 22, 23, 24, 25, 26, 27,
@@ -97,7 +97,7 @@ static struct nand_ecclayout qi_lb60_ecc
60, 61, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 74, 75,
76, 77, 78, 79, 80, 81, 82, 83
- },*/
+ },
.oobfree = {
{ .offset = 2, .length = 10 },
{ .offset = 84, .length = 44 },

37
target/linux/xburst/patches-2.6.37/420-fb-notifier-pre-post.patch
View File

@ -1,37 +0,0 @@
From d8f08d2d1753371525c9d823411a578728b3f7d5 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:23:28 +0200
Subject: [PATCH 16/23] Framebuffer notifier: Call notifier callbacks prior to blanking the screen
---
drivers/video/fbmem.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -990,12 +990,12 @@ fb_set_var(struct fb_info *info, struct
int
fb_blank(struct fb_info *info, int blank)
{
- int ret = -EINVAL;
+ int ret = 0;
if (blank > FB_BLANK_POWERDOWN)
blank = FB_BLANK_POWERDOWN;
- if (info->fbops->fb_blank)
+ if (info->fbops->fb_blank && blank == FB_BLANK_UNBLANK)
ret = info->fbops->fb_blank(blank, info);
if (!ret) {
@@ -1006,6 +1006,10 @@ fb_blank(struct fb_info *info, int blank
fb_notifier_call_chain(FB_EVENT_BLANK, &event);
}
+ if (info->fbops->fb_blank && blank != FB_BLANK_UNBLANK)
+ ret = info->fbops->fb_blank(blank, info);
+
+
return ret;
}

1213
target/linux/xburst/patches-2.6.37/440-metronome.patch
View File

File diff suppressed because it is too large Load Diff

604
target/linux/xburst/patches-2.6.37/500-modifier-keys.patch
View File

@ -1,604 +0,0 @@
From 04b3a56dce20d33d4c990fa65520449db5db6f1f Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:22:25 +0200
Subject: [PATCH 2/5] Modify keymap for ben nanonote
---
drivers/tty/vt/defkeymap.c_shipped | 308 +++++++++++++++++++++++++++---------
drivers/tty/vt/defkeymap.map | 74 ++++++---
2 files changed, 286 insertions(+), 96 deletions(-)
--- a/drivers/tty/vt/defkeymap.c_shipped
+++ b/drivers/tty/vt/defkeymap.c_shipped
@@ -9,10 +9,10 @@ u_short plain_map[NR_KEYS] = {
0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036,
0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf07f, 0xf009,
0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
- 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf702, 0xfb61, 0xfb73,
+ 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf706, 0xfb61, 0xfb73,
0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf03b,
0xf027, 0xf060, 0xf700, 0xf05c, 0xfb7a, 0xfb78, 0xfb63, 0xfb76,
- 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf700, 0xf30c,
+ 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf701, 0xf30c,
0xf703, 0xf020, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf209, 0xf307,
0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
@@ -22,54 +22,102 @@ u_short plain_map[NR_KEYS] = {
0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short shift_map[NR_KEYS] = {
+static u_short shift_map[NR_KEYS] = {
0xf200, 0xf01b, 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e,
0xf026, 0xf02a, 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf07f, 0xf009,
0xfb51, 0xfb57, 0xfb45, 0xfb52, 0xfb54, 0xfb59, 0xfb55, 0xfb49,
- 0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf201, 0xf702, 0xfb41, 0xfb53,
+ 0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf201, 0xf706, 0xfb41, 0xfb53,
0xfb44, 0xfb46, 0xfb47, 0xfb48, 0xfb4a, 0xfb4b, 0xfb4c, 0xf03a,
0xf022, 0xf07e, 0xf700, 0xf07c, 0xfb5a, 0xfb58, 0xfb43, 0xfb56,
- 0xfb42, 0xfb4e, 0xfb4d, 0xf03c, 0xf03e, 0xf03f, 0xf700, 0xf30c,
+ 0xfb42, 0xfb4e, 0xfb4d, 0xf03b, 0xf03a, 0xf03f, 0xf701, 0xf30c,
0xf703, 0xf020, 0xf207, 0xf10a, 0xf10b, 0xf10c, 0xf10d, 0xf10e,
0xf10f, 0xf110, 0xf111, 0xf112, 0xf113, 0xf213, 0xf203, 0xf307,
0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf03e, 0xf10a,
0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
+ 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
0xf20b, 0xf601, 0xf602, 0xf117, 0xf600, 0xf20a, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short altgr_map[NR_KEYS] = {
+static u_short altgr_map[NR_KEYS] = {
0xf200, 0xf200, 0xf200, 0xf040, 0xf200, 0xf024, 0xf200, 0xf200,
- 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf05c, 0xf200, 0xf200, 0xf200,
- 0xfb71, 0xfb77, 0xf918, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
- 0xfb6f, 0xfb70, 0xf200, 0xf07e, 0xf201, 0xf702, 0xf914, 0xfb73,
- 0xf917, 0xf919, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf200,
- 0xf200, 0xf200, 0xf700, 0xf200, 0xfb7a, 0xfb78, 0xf916, 0xfb76,
- 0xf915, 0xfb6e, 0xfb6d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
- 0xf703, 0xf200, 0xf207, 0xf50c, 0xf50d, 0xf50e, 0xf50f, 0xf510,
- 0xf511, 0xf512, 0xf513, 0xf514, 0xf515, 0xf208, 0xf202, 0xf911,
+ 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf05c, 0xf07e, 0xf008, 0xf200,
+ 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e, 0xf026, 0xf02a,
+ 0xf028, 0xf029, 0xf200, 0xf07e, 0xf201, 0xf706, 0xf0b0, 0xf0a8,
+ 0xf0a4, 0xf02d, 0xf05f, 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf200,
+ 0xf200, 0xf200, 0xf700, 0xf200, 0xf039, 0xf030, 0xf916, 0xfb76,
+ 0xf915, 0xf03c, 0xf03e, 0xf027, 0xf022, 0xf200, 0xf701, 0xf30c,
+ 0xf703, 0xf200, 0xf207, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035,
+ 0xf036, 0xf037, 0xf038, 0xf514, 0xf515, 0xf208, 0xf202, 0xf911,
0xf912, 0xf913, 0xf30b, 0xf90e, 0xf90f, 0xf910, 0xf30a, 0xf90b,
0xf90c, 0xf90d, 0xf90a, 0xf310, 0xf206, 0xf200, 0xf07c, 0xf516,
0xf517, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
+ 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short ctrl_map[NR_KEYS] = {
+static u_short ctrl_map[NR_KEYS] = {
0xf200, 0xf200, 0xf200, 0xf000, 0xf01b, 0xf01c, 0xf01d, 0xf01e,
- 0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf008, 0xf200,
+ 0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf200,
0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
- 0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf201, 0xf702, 0xf001, 0xf013,
+ 0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf201, 0xf706, 0xf001, 0xf013,
0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
0xf007, 0xf000, 0xf700, 0xf01c, 0xf01a, 0xf018, 0xf003, 0xf016,
- 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf20e, 0xf07f, 0xf700, 0xf30c,
+ 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf20e, 0xf07f, 0xf701, 0xf30c,
0xf703, 0xf000, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf204, 0xf307,
0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
@@ -79,35 +127,67 @@ u_short ctrl_map[NR_KEYS] = {
0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short shift_ctrl_map[NR_KEYS] = {
+static u_short shift_ctrl_map[NR_KEYS] = {
0xf200, 0xf200, 0xf200, 0xf000, 0xf200, 0xf200, 0xf200, 0xf200,
0xf200, 0xf200, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf200,
0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
- 0xf00f, 0xf010, 0xf200, 0xf200, 0xf201, 0xf702, 0xf001, 0xf013,
+ 0xf00f, 0xf010, 0xf200, 0xf200, 0xf201, 0xf706, 0xf001, 0xf013,
0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
0xf200, 0xf200, 0xf700, 0xf200, 0xf01a, 0xf018, 0xf003, 0xf016,
- 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
+ 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200, 0xf701, 0xf30c,
0xf703, 0xf200, 0xf207, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf208, 0xf200, 0xf307,
0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf200,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
+ 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short alt_map[NR_KEYS] = {
+static u_short alt_map[NR_KEYS] = {
0xf200, 0xf81b, 0xf831, 0xf832, 0xf833, 0xf834, 0xf835, 0xf836,
0xf837, 0xf838, 0xf839, 0xf830, 0xf82d, 0xf83d, 0xf87f, 0xf809,
0xf871, 0xf877, 0xf865, 0xf872, 0xf874, 0xf879, 0xf875, 0xf869,
- 0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf80d, 0xf702, 0xf861, 0xf873,
+ 0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf80d, 0xf706, 0xf861, 0xf873,
0xf864, 0xf866, 0xf867, 0xf868, 0xf86a, 0xf86b, 0xf86c, 0xf83b,
0xf827, 0xf860, 0xf700, 0xf85c, 0xf87a, 0xf878, 0xf863, 0xf876,
- 0xf862, 0xf86e, 0xf86d, 0xf82c, 0xf82e, 0xf82f, 0xf700, 0xf30c,
+ 0xf862, 0xf86e, 0xf86d, 0xf200, 0xf200, 0xf82f, 0xf701, 0xf30c,
0xf703, 0xf820, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504,
0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf209, 0xf907,
0xf908, 0xf909, 0xf30b, 0xf904, 0xf905, 0xf906, 0xf30a, 0xf901,
@@ -117,35 +197,115 @@ u_short alt_map[NR_KEYS] = {
0xf118, 0xf210, 0xf211, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
-u_short ctrl_alt_map[NR_KEYS] = {
+static u_short ctrl_alt_map[NR_KEYS] = {
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815, 0xf809,
- 0xf80f, 0xf810, 0xf200, 0xf200, 0xf201, 0xf702, 0xf801, 0xf813,
+ 0xf80f, 0xf810, 0xf200, 0xf200, 0xf201, 0xf706, 0xf801, 0xf813,
0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c, 0xf200,
0xf200, 0xf200, 0xf700, 0xf200, 0xf81a, 0xf818, 0xf803, 0xf816,
- 0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
+ 0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf200, 0xf701, 0xf30c,
0xf703, 0xf200, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504,
0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf200, 0xf307,
0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
0xf302, 0xf303, 0xf300, 0xf20c, 0xf206, 0xf200, 0xf200, 0xf50a,
0xf50b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
+ 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf20c,
0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+};
+
+static u_short ctl_map[NR_KEYS] = {
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf033, 0xf200, 0xf200,
+ 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xf037, 0xf038,
+ 0xf039, 0xfb70, 0xf200, 0xf200, 0xf201, 0xf706, 0xfb61, 0xfb73,
+ 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xf034, 0xf035, 0xf036, 0xf200,
+ 0xf200, 0xf200, 0xf700, 0xf200, 0xfb7a, 0xfb78, 0xfb63, 0xfb76,
+ 0xfb62, 0xf031, 0xf032, 0xf200, 0xf200, 0xf030, 0xf701, 0xf30c,
+ 0xf703, 0xf200, 0xf207, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf208, 0xf200, 0xf307,
+ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
+ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
+ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
+ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
+ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
};
ushort *key_maps[MAX_NR_KEYMAPS] = {
- plain_map, shift_map, altgr_map, NULL,
- ctrl_map, shift_ctrl_map, NULL, NULL,
- alt_map, NULL, NULL, NULL,
- ctrl_alt_map, NULL
+ plain_map, shift_map, altgr_map, 0,
+ ctrl_map, shift_ctrl_map, 0, 0,
+ alt_map, 0, 0, 0,
+ ctrl_alt_map, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ ctl_map, 0
};
-unsigned int keymap_count = 7;
+unsigned int keymap_count = 8;
/*
* Philosophy: most people do not define more strings, but they who do
@@ -216,47 +376,47 @@ char *func_table[MAX_NR_FUNC] = {
func_buf + 135,
func_buf + 140,
func_buf + 145,
- NULL,
- NULL,
+ 0,
+ 0,
func_buf + 149,
- NULL,
+ 0,
};
-struct kbdiacruc accent_table[MAX_DIACR] = {
- {'`', 'A', 0300}, {'`', 'a', 0340},
- {'\'', 'A', 0301}, {'\'', 'a', 0341},
- {'^', 'A', 0302}, {'^', 'a', 0342},
- {'~', 'A', 0303}, {'~', 'a', 0343},
- {'"', 'A', 0304}, {'"', 'a', 0344},
- {'O', 'A', 0305}, {'o', 'a', 0345},
- {'0', 'A', 0305}, {'0', 'a', 0345},
- {'A', 'A', 0305}, {'a', 'a', 0345},
- {'A', 'E', 0306}, {'a', 'e', 0346},
- {',', 'C', 0307}, {',', 'c', 0347},
- {'`', 'E', 0310}, {'`', 'e', 0350},
- {'\'', 'E', 0311}, {'\'', 'e', 0351},
- {'^', 'E', 0312}, {'^', 'e', 0352},
- {'"', 'E', 0313}, {'"', 'e', 0353},
- {'`', 'I', 0314}, {'`', 'i', 0354},
- {'\'', 'I', 0315}, {'\'', 'i', 0355},
- {'^', 'I', 0316}, {'^', 'i', 0356},
- {'"', 'I', 0317}, {'"', 'i', 0357},
- {'-', 'D', 0320}, {'-', 'd', 0360},
- {'~', 'N', 0321}, {'~', 'n', 0361},
- {'`', 'O', 0322}, {'`', 'o', 0362},
- {'\'', 'O', 0323}, {'\'', 'o', 0363},
- {'^', 'O', 0324}, {'^', 'o', 0364},
- {'~', 'O', 0325}, {'~', 'o', 0365},
- {'"', 'O', 0326}, {'"', 'o', 0366},
- {'/', 'O', 0330}, {'/', 'o', 0370},
- {'`', 'U', 0331}, {'`', 'u', 0371},
- {'\'', 'U', 0332}, {'\'', 'u', 0372},
- {'^', 'U', 0333}, {'^', 'u', 0373},
- {'"', 'U', 0334}, {'"', 'u', 0374},
- {'\'', 'Y', 0335}, {'\'', 'y', 0375},
- {'T', 'H', 0336}, {'t', 'h', 0376},
- {'s', 's', 0337}, {'"', 'y', 0377},
- {'s', 'z', 0337}, {'i', 'j', 0377},
+struct kbdiacr accent_table[MAX_DIACR] = {
+ {'`', 'A', '\300'}, {'`', 'a', '\340'},
+ {'\'', 'A', '\301'}, {'\'', 'a', '\341'},
+ {'^', 'A', '\302'}, {'^', 'a', '\342'},
+ {'~', 'A', '\303'}, {'~', 'a', '\343'},
+ {'"', 'A', '\304'}, {'"', 'a', '\344'},
+ {'O', 'A', '\305'}, {'o', 'a', '\345'},
+ {'0', 'A', '\305'}, {'0', 'a', '\345'},
+ {'A', 'A', '\305'}, {'a', 'a', '\345'},
+ {'A', 'E', '\306'}, {'a', 'e', '\346'},
+ {',', 'C', '\307'}, {',', 'c', '\347'},
+ {'`', 'E', '\310'}, {'`', 'e', '\350'},
+ {'\'', 'E', '\311'}, {'\'', 'e', '\351'},
+ {'^', 'E', '\312'}, {'^', 'e', '\352'},
+ {'"', 'E', '\313'}, {'"', 'e', '\353'},
+ {'`', 'I', '\314'}, {'`', 'i', '\354'},
+ {'\'', 'I', '\315'}, {'\'', 'i', '\355'},
+ {'^', 'I', '\316'}, {'^', 'i', '\356'},
+ {'"', 'I', '\317'}, {'"', 'i', '\357'},
+ {'-', 'D', '\320'}, {'-', 'd', '\360'},
+ {'~', 'N', '\321'}, {'~', 'n', '\361'},
+ {'`', 'O', '\322'}, {'`', 'o', '\362'},
+ {'\'', 'O', '\323'}, {'\'', 'o', '\363'},
+ {'^', 'O', '\324'}, {'^', 'o', '\364'},
+ {'~', 'O', '\325'}, {'~', 'o', '\365'},
+ {'"', 'O', '\326'}, {'"', 'o', '\366'},
+ {'/', 'O', '\330'}, {'/', 'o', '\370'},
+ {'`', 'U', '\331'}, {'`', 'u', '\371'},
+ {'\'', 'U', '\332'}, {'\'', 'u', '\372'},
+ {'^', 'U', '\333'}, {'^', 'u', '\373'},
+ {'"', 'U', '\334'}, {'"', 'u', '\374'},
+ {'\'', 'Y', '\335'}, {'\'', 'y', '\375'},
+ {'T', 'H', '\336'}, {'t', 'h', '\376'},
+ {'s', 's', '\337'}, {'"', 'y', '\377'},
+ {'s', 'z', '\337'}, {'i', 'j', '\377'},
};
unsigned int accent_table_size = 68;
--- a/drivers/tty/vt/defkeymap.map
+++ b/drivers/tty/vt/defkeymap.map
@@ -1,5 +1,5 @@
# Default kernel keymap. This uses 7 modifier combinations.
-keymaps 0-2,4-5,8,12
+keymaps 0-2,4-5,8,12,64
# Change the above line into
# keymaps 0-2,4-6,8,12
# in case you want the entries
@@ -45,24 +45,38 @@ keycode 12 = minus underscor
control keycode 12 = Control_underscore
shift control keycode 12 = Control_underscore
alt keycode 12 = Meta_minus
-keycode 13 = equal plus
+keycode 13 = equal plus
alt keycode 13 = Meta_equal
+ altgr keycode 13 = asciitilde
+ ctrll keycode 13 = three
keycode 14 = Delete Delete
- control keycode 14 = BackSpace
+ altgr keycode 14 = BackSpace
alt keycode 14 = Meta_Delete
keycode 15 = Tab Tab
alt keycode 15 = Meta_Tab
keycode 16 = q
+ altgr keycode 16 = exclam
keycode 17 = w
+ altgr keycode 17 = at
keycode 18 = e
- altgr keycode 18 = Hex_E
+ altgr keycode 18 = numbersign
keycode 19 = r
+ altgr keycode 19 = dollar
keycode 20 = t
+ altgr keycode 20 = percent
keycode 21 = y
+ altgr keycode 21 = asciicircum
keycode 22 = u
+ altgr keycode 22 = ampersand
+ ctrll keycode 22 = seven
keycode 23 = i
+ altgr keycode 23 = asterisk
+ ctrll keycode 23 = eight
keycode 24 = o
+ altgr keycode 24 = parenleft
+ ctrll keycode 24 = nine
keycode 25 = p
+ altgr keycode 25 = parenright
keycode 26 = bracketleft braceleft
control keycode 26 = Escape
alt keycode 26 = Meta_bracketleft
@@ -71,19 +85,28 @@ keycode 27 = bracketright bracerigh
alt keycode 27 = Meta_bracketright
keycode 28 = Return
alt keycode 28 = Meta_Control_m
-keycode 29 = Control
+keycode 29 = CtrlL
keycode 30 = a
- altgr keycode 30 = Hex_A
+ altgr keycode 30 = U+00B0
keycode 31 = s
+ altgr keycode 31 = U+00A8
keycode 32 = d
- altgr keycode 32 = Hex_D
+ altgr keycode 32 = U+20AC
keycode 33 = f
- altgr keycode 33 = Hex_F
+ altgr keycode 33 = minus
keycode 34 = g
+ altgr keycode 34 = underscore
keycode 35 = h
+ altgr keycode 35 = braceleft
keycode 36 = j
+ altgr keycode 36 = bracketleft
+ ctrll keycode 36 = four
keycode 37 = k
+ altgr keycode 37 = bracketright
+ ctrll keycode 37 = five
keycode 38 = l
+ altgr keycode 38 = braceright
+ ctrll keycode 38 = six
keycode 39 = semicolon colon
alt keycode 39 = Meta_semicolon
keycode 40 = apostrophe quotedbl
@@ -97,58 +120,65 @@ keycode 43 = backslash bar
control keycode 43 = Control_backslash
alt keycode 43 = Meta_backslash
keycode 44 = z
+ altgr keycode 44 = nine
keycode 45 = x
+ altgr keycode 45 = zero
keycode 46 = c
altgr keycode 46 = Hex_C
keycode 47 = v
keycode 48 = b
altgr keycode 48 = Hex_B
keycode 49 = n
+ altgr keycode 49 = less
+ ctrll keycode 49 = one
keycode 50 = m
-keycode 51 = comma less
- alt keycode 51 = Meta_comma
-keycode 52 = period greater
+ altgr keycode 50 = greater
+ ctrll keycode 50 = two
+keycode 51 = comma semicolon
+ altgr keycode 51 = apostrophe
+keycode 52 = period colon
control keycode 52 = Compose
- alt keycode 52 = Meta_period
+ altgr keycode 52 = quotedbl
keycode 53 = slash question
control keycode 53 = Delete
alt keycode 53 = Meta_slash
-keycode 54 = Shift
+ ctrll keycode 53 = zero
+keycode 54 = AltGr
keycode 55 = KP_Multiply
keycode 56 = Alt
keycode 57 = space space
control keycode 57 = nul
alt keycode 57 = Meta_space
keycode 58 = Caps_Lock
-keycode 59 = F1 F11 Console_13
+keycode 59 = F1 F11 one
control keycode 59 = F1
alt keycode 59 = Console_1
control alt keycode 59 = Console_1
-keycode 60 = F2 F12 Console_14
+keycode 60 = F2 F12 two
control keycode 60 = F2
alt keycode 60 = Console_2
control alt keycode 60 = Console_2
-keycode 61 = F3 F13 Console_15
+keycode 61 = F3 F13 three
control keycode 61 = F3
alt keycode 61 = Console_3
control alt keycode 61 = Console_3
-keycode 62 = F4 F14 Console_16
+keycode 62 = F4 F14 four
control keycode 62 = F4
alt keycode 62 = Console_4
control alt keycode 62 = Console_4
-keycode 63 = F5 F15 Console_17
+keycode 63 = F5 F15 five
control keycode 63 = F5
alt keycode 63 = Console_5
control alt keycode 63 = Console_5
-keycode 64 = F6 F16 Console_18
+keycode 64 = F6 F16 six
control keycode 64 = F6
alt keycode 64 = Console_6
control alt keycode 64 = Console_6
-keycode 65 = F7 F17 Console_19
+keycode 65 = F7 F17 seven
control keycode 65 = F7
alt keycode 65 = Console_7
control alt keycode 65 = Console_7
-keycode 66 = F8 F18 Console_20
+keycode 66 = F8 F18 eight
control keycode 66 = F8
alt keycode 66 = Console_8
control alt keycode 66 = Console_8
@@ -220,7 +250,7 @@ keycode 93 =
keycode 94 =
keycode 95 =
keycode 96 = KP_Enter
-keycode 97 = Control
+keycode 97 = Control
keycode 98 = KP_Divide
keycode 99 = Control_backslash
control keycode 99 = Control_backslash

510
target/linux/xburst/patches-2.6.37/800-n516-lpc.patch
View File

@ -1,510 +0,0 @@
From 9d67bbbef07b0568d0541f79e3cd664d71d2d96c Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Wed, 12 May 2010 14:22:36 +0200
Subject: [PATCH 4/5] Add n516 lpc driver
---
drivers/misc/Kconfig | 8 +
drivers/misc/Makefile | 1 +
drivers/misc/n516-lpc.c | 471 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 480 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/n516-lpc.c
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -452,6 +452,14 @@ config PCH_PHUB
To compile this driver as a module, choose M here: the module will
be called pch_phub.
+config N516_LPC
+ tristate "N516 keys & power controller"
+ depends on I2C
+ depends on INPUT
+ depends on POWER_SUPPLY
+ help
+ N516 keyboard & power controller driver
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -42,3 +42,4 @@ obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd
obj-$(CONFIG_PCH_PHUB) += pch_phub.o
obj-y += ti-st/
obj-$(CONFIG_AB8500_PWM) += ab8500-pwm.o
+obj-$(CONFIG_N516_LPC) += n516-lpc.o
--- /dev/null
+++ b/drivers/misc/n516-lpc.c
@@ -0,0 +1,471 @@
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/sysctl.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/power_supply.h>
+#include <linux/suspend.h>
+
+#include <linux/i2c.h>
+
+#include <asm/mach-jz4740/irq.h>
+#include <asm/mach-jz4740/gpio.h>
+#include <asm/mach-jz4740/board-n516.h>
+
+static int batt_level=0;
+module_param(batt_level, int, 0);
+
+struct n516_lpc_chip {
+ struct i2c_client *i2c_client;
+ struct input_dev *input;
+ unsigned int battery_level;
+ unsigned int suspending:1, can_sleep:1;
+};
+
+static struct n516_lpc_chip *the_lpc;
+
+struct i2c_device_id n516_lpc_i2c_ids[] = {
+ {"LPC524", 0},
+ {},
+};
+
+MODULE_DEVICE_TABLE(i2c, n516_lpc_i2c_ids);
+
+static const unsigned short normal_i2c[] = I2C_ADDRS(0x54);
+
+static const unsigned int n516_lpc_keymap[] = {
+ [0x01] = KEY_4,
+ [0x02] = KEY_3,
+ [0x03] = KEY_2,
+ [0x04] = KEY_1,
+ [0x05] = KEY_0,
+ [0x07] = KEY_9,
+ [0x08] = KEY_8,
+ [0x09] = KEY_7,
+ [0x0a] = KEY_6,
+ [0x0b] = KEY_5,
+ [0x0d] = KEY_PLAYPAUSE,
+ [0x0e] = KEY_MENU,
+ [0x0f] = KEY_SEARCH,
+ [0x10] = KEY_DIRECTION,
+ [0x11] = KEY_SPACE,
+ [0x13] = KEY_ENTER,
+ [0x14] = KEY_UP,
+ [0x15] = KEY_DOWN,
+ [0x16] = KEY_RIGHT,
+ [0x17] = KEY_LEFT,
+ [0x19] = KEY_PAGEDOWN,
+ [0x1a] = KEY_PAGEUP,
+ [0x1c] = KEY_POWER,
+ [0x1d] = KEY_ESC,
+ [0x1e] = KEY_SLEEP,
+ [0x1f] = KEY_WAKEUP,
+};
+
+static const unsigned int batt_charge[] = {0, 7, 20, 45, 65, 80, 100};
+#define MAX_BAT_LEVEL 6
+
+static inline int n516_bat_charging(void)
+{
+ return !gpio_get_value(GPIO_CHARG_STAT_N);
+}
+
+static int n516_bat_get_status(struct power_supply *b)
+{
+ if (power_supply_am_i_supplied(b)) {
+ if (n516_bat_charging())
+ return POWER_SUPPLY_STATUS_CHARGING;
+ else
+ return POWER_SUPPLY_STATUS_FULL;
+ } else {
+ return POWER_SUPPLY_STATUS_DISCHARGING;
+ }
+}
+
+static int n516_bat_get_charge(struct power_supply *b)
+{
+ return batt_charge[the_lpc->battery_level];
+}
+
+static int n516_bat_get_property(struct power_supply *b,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ switch (psp) {
+ case POWER_SUPPLY_PROP_STATUS:
+ val->intval = n516_bat_get_status(b);
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+ val->intval = 100;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN:
+ val->intval = 0;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_NOW:
+ val->intval = n516_bat_get_charge(b);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static void n516_bat_power_changed(struct power_supply *p)
+{
+ if (power_supply_am_i_supplied(p) && !n516_bat_charging())
+ the_lpc->battery_level = MAX_BAT_LEVEL;
+
+ power_supply_changed(p);
+}
+
+static enum power_supply_property n516_bat_properties[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN,
+ POWER_SUPPLY_PROP_CHARGE_NOW,
+};
+
+static struct power_supply n516_battery = {
+ .name = "n516-battery",
+ .get_property = n516_bat_get_property,
+ .properties = n516_bat_properties,
+ .num_properties = ARRAY_SIZE(n516_bat_properties),
+ .external_power_changed = n516_bat_power_changed,
+};
+
+static irqreturn_t n516_bat_charge_irq(int irq, void *dev)
+{
+ struct power_supply *psy = dev;
+
+ dev_dbg(psy->dev, "Battery charging IRQ\n");
+
+ if (power_supply_am_i_supplied(psy) && !n516_bat_charging())
+ the_lpc->battery_level = MAX_BAT_LEVEL;
+
+ power_supply_changed(psy);
+
+ return IRQ_HANDLED;
+}
+
+static int n516_lpc_send_message(struct n516_lpc_chip *chip, unsigned char val)
+{
+ struct i2c_client *client = chip->i2c_client;
+ struct i2c_msg msg = {client->addr, client->flags, 1, &val};
+ int ret = 0;
+
+ ret = i2c_transfer(client->adapter, &msg, 1);
+ return ret > 0 ? 0 : ret;
+}
+
+static void n516_key_event(struct n516_lpc_chip *chip, unsigned char keycode)
+{
+ struct i2c_client *client = chip->i2c_client;
+ bool long_press = false;
+
+ if (keycode & 0x40) {
+ keycode &= ~0x40;
+ long_press = true;
+ }
+
+ dev_dbg(&client->dev, "keycode: 0x%02x, long_press: 0x%02x\n", keycode, (unsigned int)long_press);
+
+ if (keycode >= ARRAY_SIZE(n516_lpc_keymap) || n516_lpc_keymap[keycode] == 0)
+ return;
+
+ if (long_press)
+ input_report_key(chip->input, KEY_LEFTALT, 1);
+
+ input_report_key(chip->input, n516_lpc_keymap[keycode], 1);
+ input_sync(chip->input);
+ input_report_key(chip->input, n516_lpc_keymap[keycode], 0);
+
+ if (long_press)
+ input_report_key(chip->input, KEY_LEFTALT, 0);
+ input_sync(chip->input);
+}
+
+static void n516_battery_event(struct n516_lpc_chip *chip, unsigned char battery_level)
+{
+ if (battery_level != chip->battery_level) {
+ chip->battery_level = battery_level;
+ power_supply_changed(&n516_battery);
+ }
+}
+
+static irqreturn_t n516_lpc_irq_thread(int irq, void *devid)
+{
+ struct n516_lpc_chip *chip = (struct n516_lpc_chip*)devid;
+ int ret;
+ unsigned char raw_msg;
+ struct i2c_client *client = chip->i2c_client;
+ struct i2c_msg msg = {client->addr, client->flags | I2C_M_RD, 1, &raw_msg};
+
+ if (client->dev.power.status >= DPM_OFF)
+ return IRQ_HANDLED;
+
+ ret = i2c_transfer(client->adapter, &msg, 1);
+ if (ret != 1) {
+ dev_dbg(&client->dev, "I2C error: %d\n", ret);
+ return IRQ_HANDLED;
+ }
+
+ dev_dbg(&client->dev, "msg: 0x%02x\n", raw_msg);
+
+ /* Ack wakeup event */
+ if ((raw_msg & ~0x40) < ARRAY_SIZE(n516_lpc_keymap))
+ n516_key_event(chip, raw_msg);
+ else if ((raw_msg >= 0x81) && (raw_msg <= 0x87))
+ n516_battery_event(chip, raw_msg - 0x81);
+ else if (raw_msg == 0x7e)
+ n516_lpc_send_message(chip, 0x00);
+ else
+ dev_warn(&client->dev, "Unknown message: %x\n", raw_msg);
+
+ if (chip->suspending)
+ chip->can_sleep = 0;
+
+ return IRQ_HANDLED;
+}
+
+static void n516_lpc_power_off(void)
+{
+ struct i2c_client *client = the_lpc->i2c_client;
+ unsigned char val = 0x01;
+ struct i2c_msg msg = {client->addr, client->flags, 1, &val};
+
+ printk("Issue LPC POWEROFF command...\n");
+ while (1)
+ i2c_transfer(client->adapter, &msg, 1);
+}
+
+static int n516_lpc_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+ return 0;
+}
+
+static int n516_lpc_suspend_notifier(struct notifier_block *nb,
+ unsigned long event,
+ void *dummy)
+{
+ switch(event) {
+ case PM_SUSPEND_PREPARE:
+ the_lpc->suspending = 1;
+ the_lpc->can_sleep = 1;
+ break;
+ case PM_POST_SUSPEND:
+ the_lpc->suspending = 0;
+ the_lpc->can_sleep = 1;
+ break;
+ default:
+ return NOTIFY_DONE;
+ }
+ return NOTIFY_OK;
+}
+
+static struct notifier_block n516_lpc_notif_block = {
+ .notifier_call = n516_lpc_suspend_notifier,
+};
+
+static int __devinit n516_lpc_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct n516_lpc_chip *chip;
+ struct input_dev *input;
+ int ret = 0;
+ int i;
+
+ chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ the_lpc = chip;
+ chip->i2c_client = client;
+ if ((batt_level > 0) && (batt_level < ARRAY_SIZE(batt_charge)))
+ chip->battery_level = batt_level;
+ else
+ chip->battery_level = 1;
+
+ i2c_set_clientdata(client, chip);
+
+ ret = gpio_request(GPIO_LPC_INT, "LPC interrupt request");
+ if (ret) {
+ dev_err(&client->dev, "Unable to reguest LPC INT GPIO\n");
+ goto err_gpio_req_lpcint;
+ }
+
+ ret = gpio_request(GPIO_CHARG_STAT_N, "LPC charging status");
+ if (ret) {
+ dev_err(&client->dev, "Unable to reguest CHARG STAT GPIO\n");
+ goto err_gpio_req_chargstat;
+ }
+
+ /* Enter normal mode */
+ n516_lpc_send_message(chip, 0x2);
+
+ input = input_allocate_device();
+ if (!input) {
+ dev_err(&client->dev, "Unable to allocate input device\n");
+ ret = -ENOMEM;
+ goto err_input_alloc;
+ }
+
+ chip->input = input;
+
+ __set_bit(EV_KEY, input->evbit);
+
+ for (i = 0; i < ARRAY_SIZE(n516_lpc_keymap); i++)
+ __set_bit(n516_lpc_keymap[i], input->keybit);
+
+ __set_bit(KEY_LEFTALT, input->keybit);
+
+ input->name = "n516-keys";
+ input->phys = "n516-keys/input0";
+ input->dev.parent = &client->dev;
+ input->id.bustype = BUS_I2C;
+ input->id.vendor = 0x0001;
+ input->id.product = 0x0001;
+ input->id.version = 0x0100;
+
+ ret = input_register_device(input);
+ if (ret < 0) {
+ dev_err(&client->dev, "Unable to register input device\n");
+ goto err_input_register;
+ }
+
+ ret = power_supply_register(NULL, &n516_battery);
+ if (ret) {
+ dev_err(&client->dev, "Unable to register N516 battery\n");
+ goto err_bat_reg;
+ }
+
+ ret = request_threaded_irq(gpio_to_irq(GPIO_LPC_INT), NULL,
+ n516_lpc_irq_thread,
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ "lpc", chip);
+ if (ret) {
+ dev_err(&client->dev, "request_irq failed: %d\n", ret);
+ goto err_request_lpc_irq;
+ }
+
+ ret = request_irq(gpio_to_irq(GPIO_CHARG_STAT_N), n516_bat_charge_irq,
+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ "battery charging", &n516_battery);
+ if (ret) {
+ dev_err(&client->dev, "Unable to claim battery charging IRQ\n");
+ goto err_request_chrg_irq;
+ }
+
+ pm_power_off = n516_lpc_power_off;
+ ret = register_pm_notifier(&n516_lpc_notif_block);
+ if (ret) {
+ dev_err(&client->dev, "Unable to register PM notify block\n");
+ goto err_reg_pm_notifier;
+ }
+
+ device_init_wakeup(&client->dev, 1);
+
+ return 0;
+
+ unregister_pm_notifier(&n516_lpc_notif_block);
+err_reg_pm_notifier:
+ free_irq(gpio_to_irq(GPIO_CHARG_STAT_N), &n516_battery);
+err_request_chrg_irq:
+ free_irq(gpio_to_irq(GPIO_LPC_INT), chip);
+err_request_lpc_irq:
+ power_supply_unregister(&n516_battery);
+err_bat_reg:
+ input_unregister_device(input);
+err_input_register:
+ input_free_device(input);
+err_input_alloc:
+ gpio_free(GPIO_CHARG_STAT_N);
+err_gpio_req_chargstat:
+ gpio_free(GPIO_LPC_INT);
+err_gpio_req_lpcint:
+ i2c_set_clientdata(client, NULL);
+ kfree(chip);
+
+ return ret;
+}
+
+static int __devexit n516_lpc_remove(struct i2c_client *client)
+{
+ struct n516_lpc_chip *chip = i2c_get_clientdata(client);
+
+ unregister_pm_notifier(&n516_lpc_notif_block);
+ pm_power_off = NULL;
+ free_irq(gpio_to_irq(GPIO_CHARG_STAT_N), &n516_battery);
+ free_irq(gpio_to_irq(GPIO_LPC_INT), chip);
+ power_supply_unregister(&n516_battery);
+ input_unregister_device(chip->input);
+ gpio_free(GPIO_CHARG_STAT_N);
+ gpio_free(GPIO_LPC_INT);
+ i2c_set_clientdata(client, NULL);
+ kfree(chip);
+
+ return 0;
+}
+
+#if CONFIG_PM
+static int n516_lpc_suspend(struct i2c_client *client, pm_message_t msg)
+{
+ if (!the_lpc->can_sleep)
+ return -EBUSY;
+
+ if (device_may_wakeup(&client->dev))
+ enable_irq_wake(gpio_to_irq(GPIO_LPC_INT));
+
+ return 0;
+}
+
+static int n516_lpc_resume(struct i2c_client *client)
+{
+ if (device_may_wakeup(&client->dev))
+ disable_irq_wake(gpio_to_irq(GPIO_LPC_INT));
+
+ return 0;
+}
+#else
+#define n516_lpc_suspend NULL
+#define n516_lpc_resume NULL
+#endif
+
+
+static struct i2c_driver n516_lpc_driver = {
+ .class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "n516-keys",
+ .owner = THIS_MODULE,
+ },
+ .probe = n516_lpc_probe,
+ .remove = __devexit_p(n516_lpc_remove),
+ .detect = n516_lpc_detect,
+ .id_table = n516_lpc_i2c_ids,
+ .address_list = normal_i2c,
+ .suspend = n516_lpc_suspend,
+ .resume = n516_lpc_resume,
+};
+
+static int __init n516_lpc_init(void)
+{
+ return i2c_add_driver(&n516_lpc_driver);
+}
+module_init(n516_lpc_init);
+
+static void __exit n516_lpc_exit(void)
+{
+ i2c_del_driver(&n516_lpc_driver);
+}
+module_exit(n516_lpc_exit);
+
+MODULE_AUTHOR("Yauhen Kharuzhy");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Keys and power controller driver for N516");
+MODULE_ALIAS("platform:n516-keys");

278
target/linux/xburst/patches-2.6.37/801-n526-lpc.patch
View File

@ -1,278 +0,0 @@
From 3959d6b8837faf00c7902c5537de2a2eba3c1b7e Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Wed, 12 May 2010 14:23:43 +0200
Subject: [PATCH 5/5] Add n526 lpc driver
---
drivers/misc/Kconfig | 9 ++
drivers/misc/Makefile | 1 +
drivers/misc/n526-lpc.c | 238 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 248 insertions(+), 0 deletions(-)
create mode 100644 drivers/misc/n526-lpc.c
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -460,6 +460,15 @@ config N516_LPC
help
N516 keyboard & power controller driver
+config N526_LPC
+ tristate "N526 LPC934 coprocessor"
+ depends on JZ4740_N526
+ help
+ If you say yes here you get support for the N526s NXP LPC934 coprocessor.
+ It is used as a keyboard controllor and for power management.
+
+ If you have a N526 you probably want to say Y here.
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -43,3 +43,4 @@ obj-$(CONFIG_PCH_PHUB) += pch_phub.o
obj-y += ti-st/
obj-$(CONFIG_AB8500_PWM) += ab8500-pwm.o
obj-$(CONFIG_N516_LPC) += n516-lpc.o
+obj-$(CONFIG_N526_LPC) += n526-lpc.o
--- /dev/null
+++ b/drivers/misc/n526-lpc.c
@@ -0,0 +1,238 @@
+/*
+ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+
+#include <linux/workqueue.h>
+
+#include <asm/mach-jz4740/irq.h>
+#include <asm/mach-jz4740/gpio.h>
+
+struct n526_lpc {
+ struct i2c_client *client;
+ struct input_dev *input;
+
+ struct work_struct work;
+};
+
+static const unsigned int n526_lpc_keymap[] = {
+ [0x01] = KEY_PAGEUP,
+ [0x02] = KEY_PAGEDOWN,
+ [0x03] = KEY_VOLUMEUP,
+ [0x04] = KEY_VOLUMEDOWN,
+ [0x06] = KEY_1,
+ [0x07] = KEY_Q,
+ [0x08] = KEY_A,
+ [0x09] = KEY_Z,
+ [0x0a] = KEY_LEFTSHIFT,
+ [0x0b] = KEY_2,
+ [0x0c] = KEY_W,
+ [0x0d] = KEY_S,
+ [0x0e] = KEY_X,
+ [0x0f] = KEY_REFRESH,
+ [0x10] = KEY_3,
+ [0x11] = KEY_E,
+ [0x12] = KEY_D,
+ [0x13] = KEY_C,
+ [0x14] = KEY_DOCUMENTS,
+ [0x15] = KEY_4,
+ [0x16] = KEY_R,
+ [0x17] = KEY_F,
+ [0x18] = KEY_V,
+ [0x19] = KEY_MUTE,
+ [0x1a] = KEY_5,
+ [0x1b] = KEY_T,
+ [0x1c] = KEY_G,
+ [0x1d] = KEY_B,
+ [0x1e] = KEY_DELETE,
+ [0x1f] = KEY_6,
+ [0x20] = KEY_Y,
+ [0x21] = KEY_H,
+ [0x22] = KEY_N,
+ [0x23] = KEY_SPACE,
+ [0x24] = KEY_7,
+ [0x25] = KEY_U,
+ [0x26] = KEY_J,
+ [0x27] = KEY_M,
+/* [0x28] = KEY_SYM, */
+ [0x29] = KEY_8,
+ [0x2a] = KEY_I,
+ [0x2b] = KEY_K,
+ [0x2c] = KEY_MENU,
+ [0x2d] = KEY_LEFT,
+ [0x2e] = KEY_9,
+ [0x2f] = KEY_O,
+ [0x30] = KEY_L,
+ [0x31] = KEY_UP,
+ [0x32] = KEY_DOWN,
+ [0x33] = KEY_0,
+ [0x34] = KEY_P,
+ [0x35] = KEY_BACKSPACE,
+ [0x36] = KEY_ENTER,
+ [0x37] = KEY_RIGHT,
+};
+
+static void n526_lpc_irq_work(struct work_struct *work)
+{
+ int ret;
+ struct n526_lpc *n526_lpc = container_of(work, struct n526_lpc, work);
+ struct i2c_client *client = n526_lpc->client;
+ unsigned char raw_msg;
+ struct i2c_msg msg = {client->addr, client->flags | I2C_M_RD, 1, &raw_msg};
+ unsigned char keycode;
+
+
+ ret = i2c_transfer(client->adapter, &msg, 1);
+
+ if (ret != 1) {
+ dev_err(&client->dev, "Failed to read lpc status\n");
+ }
+
+ keycode = raw_msg & 0x7f;
+
+ if (keycode < ARRAY_SIZE(n526_lpc_keymap)) {
+ input_report_key(n526_lpc->input, n526_lpc_keymap[keycode],
+ !(raw_msg & 0x80));
+ input_sync(n526_lpc->input);
+ }
+}
+
+static irqreturn_t n526_lpc_irq(int irq, void *dev_id)
+{
+ struct n526_lpc *n526_lpc = dev_id;
+
+ schedule_work(&n526_lpc->work);
+ return IRQ_HANDLED;
+}
+
+static int __devinit n526_lpc_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int ret;
+ size_t i;
+ struct n526_lpc *n526_lpc;
+ struct input_dev *input;
+
+ n526_lpc = kmalloc(sizeof(*n526_lpc), GFP_KERNEL);
+
+ if (!n526_lpc) {
+ dev_err(&client->dev, "Failed to allocate device structure\n");
+ return -ENOMEM;
+ }
+
+ input = input_allocate_device();
+ if (!input) {
+ dev_err(&client->dev, "Failed to allocate input device\n");
+ ret = -ENOMEM;
+ goto err_free;
+ }
+
+ input->name = "n526-keys";
+ input->phys = "n526-keys/input0";
+ input->dev.parent = &client->dev;
+ input->id.bustype = BUS_I2C;
+ input->id.vendor = 0x0001;
+ input->id.product = 0x0001;
+ input->id.version = 0x0001;
+
+ __set_bit(EV_KEY, input->evbit);
+
+ for (i = 0; i < ARRAY_SIZE(n526_lpc_keymap); ++i) {
+ if (n526_lpc_keymap[i] != 0)
+ __set_bit(n526_lpc_keymap[i], input->keybit);
+ }
+
+ ret = input_register_device(input);
+
+ if (ret) {
+ dev_err(&client->dev, "Failed to register input device: %d\n", ret);
+ goto err_free_input;
+ }
+
+ n526_lpc->client = client;
+ n526_lpc->input = input;
+ INIT_WORK(&n526_lpc->work, n526_lpc_irq_work);
+
+ ret = request_irq(client->irq, n526_lpc_irq, IRQF_TRIGGER_FALLING,
+ "n526-lpc", n526_lpc);
+ if (ret) {
+ dev_err(&client->dev, "Failed to request irq: %d\n", ret);
+ goto err_unregister_input;
+ }
+
+ i2c_set_clientdata(client, n526_lpc);
+
+ return 0;
+
+err_unregister_input:
+ input_unregister_device(input);
+err_free_input:
+ input_free_device(input);
+err_free:
+ kfree(n526_lpc);
+
+ return ret;
+}
+
+static int n526_lpc_remove(struct i2c_client *client)
+{
+ struct n526_lpc *n526_lpc = i2c_get_clientdata(client);
+
+ free_irq(client->irq, n526_lpc);
+
+ i2c_set_clientdata(client, NULL);
+ input_unregister_device(n526_lpc->input);
+ input_free_device(n526_lpc->input);
+ kfree(n526_lpc);
+
+ return 0;
+}
+
+static const struct i2c_device_id n526_lpc_id[] = {
+ { "n526-lpc", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, n526_lpc_id);
+
+static struct i2c_driver n526_lpc_driver = {
+ .driver = {
+ .name = "n526-lpc",
+ .owner = THIS_MODULE,
+ },
+ .probe = n526_lpc_probe,
+ .remove = n526_lpc_remove,
+ .id_table = n526_lpc_id,
+};
+
+static int __init n526_lpc_init(void)
+{
+ return i2c_add_driver(&n526_lpc_driver);
+}
+module_init(n526_lpc_init);
+
+static void __exit n526_lpc_exit(void)
+{
+ i2c_del_driver(&n526_lpc_driver);
+}
+module_exit(n526_lpc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Lars-Peter Clausen");
+MODULE_DESCRIPTION("n526 keypad driver");
+MODULE_ALIAS("i2c:n526-keys");

9730
target/linux/xburst/patches-2.6.37/900-add-openwrt-logo.patch
View File

File diff suppressed because it is too large Load Diff

21
target/linux/xburst/patches-3.2/0001-ubi-Read-only-the-vid-header-instead-of-the-whole-pa.patch
View File

@ -1,21 +0,0 @@
From 73aab29ddc44a3e1a7156473ad5bc9cd80704274 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Tue, 15 Mar 2011 12:49:15 +0100
Subject: [PATCH 01/21] ubi: Read only the vid header instead of the whole
page
---
drivers/mtd/ubi/io.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -1031,7 +1031,7 @@ int ubi_io_read_vid_hdr(struct ubi_devic
p = (char *)vid_hdr - ubi->vid_hdr_shift;
read_err = ubi_io_read(ubi, p, pnum, ubi->vid_hdr_aloffset,
- ubi->vid_hdr_alsize);
+ UBI_VID_HDR_SIZE + ubi->vid_hdr_shift);
if (read_err && read_err != UBI_IO_BITFLIPS && !mtd_is_eccerr(read_err))
return read_err;

2371
target/linux/xburst/patches-3.2/0002-Add-jz4740-udc-driver.patch
View File

File diff suppressed because it is too large Load Diff

40
target/linux/xburst/patches-3.2/0003-NAND-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch
View File

@ -1,40 +0,0 @@
From b971c50dc50c07f981a1619f977e7509db9c4eac Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 26 Feb 2011 15:30:07 +0100
Subject: [PATCH 03/21] NAND: Optimize NAND_ECC_HW_OOB_FIRST read
Avoid sending unnecessary READ commands to the chip.
---
drivers/mtd/nand/nand_base.c | 14 ++++++++++----
1 files changed, 10 insertions(+), 4 deletions(-)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1294,9 +1294,15 @@ static int nand_read_page_hwecc_oob_firs
uint8_t *ecc_calc = chip->buffers->ecccalc;
/* Read the OOB area first */
- chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+ if (mtd->writesize > 512) {
+ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
+ } else {
+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+ }
for (i = 0; i < chip->ecc.total; i++)
ecc_code[i] = chip->oob_poi[eccpos[i]];
@@ -1465,7 +1471,7 @@ static int nand_do_read_ops(struct mtd_i
if (realpage != chip->pagebuf || oob) {
bufpoi = aligned ? buf : chip->buffers->databuf;
- if (likely(sndcmd)) {
+ if (likely(sndcmd) && chip->ecc.mode != NAND_ECC_HW_OOB_FIRST) {
chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
sndcmd = 0;
}

144
target/linux/xburst/patches-3.2/0004-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch
View File

@ -1,144 +0,0 @@
From 297d8a7bdfb755778d4189ca2861dd2a6125e972 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Tue, 15 Mar 2011 12:33:41 +0100
Subject: [PATCH 04/21] NAND: Add support for subpage reads for
NAND_ECC_HW_OOB_FIRST
---
drivers/mtd/nand/nand_base.c | 78 ++++++++++++++++++++++++++++++++++++++++--
include/linux/mtd/nand.h | 8 ++--
2 files changed, 79 insertions(+), 7 deletions(-)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1143,7 +1143,7 @@ static int nand_read_page_swecc(struct m
* @bufpoi: buffer to store read data
*/
static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
- uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
+ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
{
int start_step, end_step, num_steps;
uint32_t *eccpos = chip->ecc.layout->eccpos;
@@ -1324,6 +1324,75 @@ static int nand_read_page_hwecc_oob_firs
}
/**
+ * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @data_offs: offset of requested data within the page
+ * @readlen: data length
+ * @bufpoi: buffer to store read data
+ * @page: page number to read
+ *
+ * Hardware ECC for large page chips, require OOB to be read first.
+ * For this ECC mode, the write_page method is re-used from ECC_HW.
+ * These methods read/write ECC from the OOB area, unlike the
+ * ECC_HW_SYNDROME support with multiple ECC steps, follows the
+ * "infix ECC" scheme and reads/writes ECC from the data area, by
+ * overwriting the NAND manufacturer bad block markings.
+ */
+static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip,
+ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
+{
+ int start_step, end_step, num_steps;
+ uint32_t *eccpos = chip->ecc.layout->eccpos;
+ uint8_t *p;
+ int data_col_addr;
+ int eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ uint8_t *ecc_code = chip->buffers->ecccode;
+ uint8_t *ecc_calc = chip->buffers->ecccalc;
+ int i;
+
+ /* Column address wihin the page aligned to ECC size */
+ start_step = data_offs / chip->ecc.size;
+ end_step = (data_offs + readlen - 1) / chip->ecc.size;
+ num_steps = end_step - start_step + 1;
+
+ data_col_addr = start_step * chip->ecc.size;
+
+ /* Read the OOB area first */
+ if (mtd->writesize > 512) {
+ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
+ } else {
+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
+ }
+
+ for (i = 0; i < chip->ecc.total; i++)
+ ecc_code[i] = chip->oob_poi[eccpos[i]];
+
+ p = bufpoi + data_col_addr;
+
+ for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {
+ int stat;
+
+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
+ chip->read_buf(mtd, p, eccsize);
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
+
+ stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
+ if (stat < 0)
+ mtd->ecc_stats.failed++;
+ else
+ mtd->ecc_stats.corrected += stat;
+ }
+
+ return 0;
+}
+
+/**
* nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
* @mtd: mtd info structure
* @chip: nand chip info structure
@@ -1482,7 +1551,7 @@ static int nand_do_read_ops(struct mtd_i
bufpoi, page);
else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
ret = chip->ecc.read_subpage(mtd, chip,
- col, bytes, bufpoi);
+ col, bytes, bufpoi, page);
else
ret = chip->ecc.read_page(mtd, chip, bufpoi,
page);
@@ -3292,8 +3361,11 @@ int nand_scan_tail(struct mtd_info *mtd)
"hardware ECC not possible\n");
BUG();
}
- if (!chip->ecc.read_page)
+ if (!chip->ecc.read_page) {
chip->ecc.read_page = nand_read_page_hwecc_oob_first;
+ if (!chip->ecc.read_subpage)
+ chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first;
+ }
case NAND_ECC_HW:
/* Use standard hwecc read page function? */
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -211,9 +211,9 @@ typedef enum {
#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
-/* Large page NAND with SOFT_ECC should support subpage reads */
-#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
- && (chip->page_shift > 9))
+/* Large page NAND with read_subpage set should support subpage reads */
+#define NAND_SUBPAGE_READ(chip) (((chip)->ecc.read_subpage) \
+ && ((chip)->page_shift > 9))
/* Mask to zero out the chip options, which come from the id table */
#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
@@ -367,7 +367,7 @@ struct nand_ecc_ctrl {
int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
uint8_t *buf, int page);
int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
- uint32_t offs, uint32_t len, uint8_t *buf);
+ uint32_t offs, uint32_t len, uint8_t *buf, int page);
void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf);
int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,

53
target/linux/xburst/patches-3.2/0005-NAND-Optimize-reading-the-eec-data-for-the-JZ4740.patch
View File

@ -1,53 +0,0 @@
From 4f28237a750afd1112b6f1266d36f8b718efe89c Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu@sharism.cc>
Date: Tue, 6 Mar 2012 11:19:26 +0800
Subject: [PATCH 05/21] NAND-Optimize-reading-the-eec-data-for-the-JZ4740
---
drivers/mtd/nand/nand_base.c | 14 ++++----------
1 files changed, 4 insertions(+), 10 deletions(-)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1295,8 +1295,8 @@ static int nand_read_page_hwecc_oob_firs
/* Read the OOB area first */
if (mtd->writesize > 512) {
- chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize + eccpos[0], page);
+ chip->read_buf(mtd, ecc_code, chip->ecc.total);
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
} else {
chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
@@ -1304,9 +1304,6 @@ static int nand_read_page_hwecc_oob_firs
chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
}
- for (i = 0; i < chip->ecc.total; i++)
- ecc_code[i] = chip->oob_poi[eccpos[i]];
-
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
int stat;
@@ -1361,8 +1358,8 @@ static int nand_read_subpage_hwecc_oob_f
/* Read the OOB area first */
if (mtd->writesize > 512) {
- chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize + eccpos[0], page);
+ chip->read_buf(mtd, ecc_code, chip->ecc.total);
chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
} else {
chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
@@ -1370,9 +1367,6 @@ static int nand_read_subpage_hwecc_oob_f
chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
}
- for (i = 0; i < chip->ecc.total; i++)
- ecc_code[i] = chip->oob_poi[eccpos[i]];
-
p = bufpoi + data_col_addr;
for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {

417
target/linux/xburst/patches-3.2/0006-MTD-NAND-JZ4740-Multi-bank-support-with-autodetectio.patch
View File

@ -1,417 +0,0 @@
From d5814bdb661d3dac61422f8f69e459be884c9a9d Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Tue, 2 Aug 2011 10:49:28 +0200
Subject: [PATCH 06/21] MTD: NAND: JZ4740: Multi-bank support with
autodetection
The platform data can now specify which external memory banks to probe
for NAND chips, and in which order. Banks that contain a NAND are used
and the other banks are freed.
Squashed version of development done in jz-2.6.38 branch.
Original patch by Lars-Peter Clausen with some bug fixes from me.
Thanks to Paul Cercueil for the initial autodetection patch.
---
arch/mips/include/asm/mach-jz4740/jz4740_nand.h | 4 +
arch/mips/jz4740/platform.c | 20 ++-
drivers/mtd/nand/jz4740_nand.c | 228 +++++++++++++++++++----
3 files changed, 215 insertions(+), 37 deletions(-)
--- a/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
@@ -19,6 +19,8 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#define JZ_NAND_NUM_BANKS 4
+
struct jz_nand_platform_data {
int num_partitions;
struct mtd_partition *partitions;
@@ -27,6 +29,8 @@ struct jz_nand_platform_data {
unsigned int busy_gpio;
+ unsigned char banks[JZ_NAND_NUM_BANKS];
+
void (*ident_callback)(struct platform_device *, struct nand_chip *,
struct mtd_partition **, int *num_partitions);
};
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -157,11 +157,29 @@ static struct resource jz4740_nand_resou
.flags = IORESOURCE_MEM,
},
{
- .name = "bank",
+ .name = "bank1",
.start = 0x18000000,
.end = 0x180C0000 - 1,
.flags = IORESOURCE_MEM,
},
+ {
+ .name = "bank2",
+ .start = 0x14000000,
+ .end = 0x140C0000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "bank3",
+ .start = 0x0C000000,
+ .end = 0x0C0C0000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "bank4",
+ .start = 0x08000000,
+ .end = 0x080C0000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
};
struct platform_device jz4740_nand_device = {
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -52,9 +52,10 @@
#define JZ_NAND_CTRL_ENABLE_CHIP(x) BIT((x) << 1)
#define JZ_NAND_CTRL_ASSERT_CHIP(x) BIT(((x) << 1) + 1)
+#define JZ_NAND_CTRL_ASSERT_CHIP_MASK 0xaa
-#define JZ_NAND_MEM_ADDR_OFFSET 0x10000
#define JZ_NAND_MEM_CMD_OFFSET 0x08000
+#define JZ_NAND_MEM_ADDR_OFFSET 0x10000
struct jz_nand {
struct mtd_info mtd;
@@ -62,8 +63,11 @@ struct jz_nand {
void __iomem *base;
struct resource *mem;
- void __iomem *bank_base;
- struct resource *bank_mem;
+ unsigned char banks[JZ_NAND_NUM_BANKS];
+ void __iomem *bank_base[JZ_NAND_NUM_BANKS];
+ struct resource *bank_mem[JZ_NAND_NUM_BANKS];
+
+ int selected_bank;
struct jz_nand_platform_data *pdata;
bool is_reading;
@@ -74,26 +78,50 @@ static inline struct jz_nand *mtd_to_jz_
return container_of(mtd, struct jz_nand, mtd);
}
+static void jz_nand_select_chip(struct mtd_info *mtd, int chipnr)
+{
+ struct jz_nand *nand = mtd_to_jz_nand(mtd);
+ struct nand_chip *chip = mtd->priv;
+ uint32_t ctrl;
+ int banknr;
+
+ ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
+ ctrl &= ~JZ_NAND_CTRL_ASSERT_CHIP_MASK;
+
+ if (chipnr == -1) {
+ banknr = -1;
+ } else {
+ banknr = nand->banks[chipnr] - 1;
+ chip->IO_ADDR_R = nand->bank_base[banknr];
+ chip->IO_ADDR_W = nand->bank_base[banknr];
+ }
+ writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
+
+ nand->selected_bank = banknr;
+}
+
static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)
{
struct jz_nand *nand = mtd_to_jz_nand(mtd);
struct nand_chip *chip = mtd->priv;
uint32_t reg;
+ void __iomem *bank_base = nand->bank_base[nand->selected_bank];
+
+ BUG_ON(nand->selected_bank < 0);
if (ctrl & NAND_CTRL_CHANGE) {
BUG_ON((ctrl & NAND_ALE) && (ctrl & NAND_CLE));
if (ctrl & NAND_ALE)
- chip->IO_ADDR_W = nand->bank_base + JZ_NAND_MEM_ADDR_OFFSET;
+ bank_base += JZ_NAND_MEM_ADDR_OFFSET;
else if (ctrl & NAND_CLE)
- chip->IO_ADDR_W = nand->bank_base + JZ_NAND_MEM_CMD_OFFSET;
- else
- chip->IO_ADDR_W = nand->bank_base;
+ bank_base += JZ_NAND_MEM_CMD_OFFSET;
+ chip->IO_ADDR_W = bank_base;
reg = readl(nand->base + JZ_REG_NAND_CTRL);
if (ctrl & NAND_NCE)
- reg |= JZ_NAND_CTRL_ASSERT_CHIP(0);
+ reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
else
- reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(0);
+ reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
writel(reg, nand->base + JZ_REG_NAND_CTRL);
}
if (dat != NAND_CMD_NONE)
@@ -252,7 +280,7 @@ static int jz_nand_correct_ecc_rs(struct
}
static int jz_nand_ioremap_resource(struct platform_device *pdev,
- const char *name, struct resource **res, void __iomem **base)
+ const char *name, struct resource **res, void *__iomem *base)
{
int ret;
@@ -288,6 +316,90 @@ err:
return ret;
}
+static inline void jz_nand_iounmap_resource(struct resource *res, void __iomem *base)
+{
+ iounmap(base);
+ release_mem_region(res->start, resource_size(res));
+}
+
+static int __devinit jz_nand_detect_bank(struct platform_device *pdev, struct jz_nand *nand, unsigned char bank, size_t chipnr, uint8_t *nand_maf_id, uint8_t *nand_dev_id) {
+ int ret;
+ int gpio;
+ char gpio_name[9];
+ char res_name[6];
+ uint32_t ctrl;
+ struct mtd_info *mtd = &nand->mtd;
+ struct nand_chip *chip = &nand->chip;
+
+ /* Request GPIO port. */
+ gpio = JZ_GPIO_MEM_CS0 + bank - 1;
+ sprintf(gpio_name, "NAND CS%d", bank);
+ ret = gpio_request(gpio, gpio_name);
+ if (ret) {
+ dev_warn(&pdev->dev,
+ "Failed to request %s gpio %d: %d\n",
+ gpio_name, gpio, ret);
+ goto notfound_gpio;
+ }
+
+ /* Request I/O resource. */
+ sprintf(res_name, "bank%d", bank);
+ ret = jz_nand_ioremap_resource(pdev, res_name,
+ &nand->bank_mem[bank - 1],
+ &nand->bank_base[bank - 1]);
+ if (ret)
+ goto notfound_resource;
+
+ /* Enable chip in bank. */
+ jz_gpio_set_function(gpio, JZ_GPIO_FUNC_MEM_CS0);
+ ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
+ ctrl |= JZ_NAND_CTRL_ENABLE_CHIP(bank - 1);
+ writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
+
+ if (chipnr == 0) {
+ /* Detect first chip. */
+ ret = nand_scan_ident(mtd, 1, NULL);
+ if (ret)
+ goto notfound_id;
+
+ /* Retrieve the IDs from the first chip. */
+ chip->select_chip(mtd, 0);
+ chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+ chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+ *nand_maf_id = chip->read_byte(mtd);
+ *nand_dev_id = chip->read_byte(mtd);
+ } else {
+ /* Detect additional chip. */
+ chip->select_chip(mtd, chipnr);
+ chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+ chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+ if (*nand_maf_id != chip->read_byte(mtd)
+ || *nand_dev_id != chip->read_byte(mtd)) {
+ ret = -ENODEV;
+ goto notfound_id;
+ }
+
+ /* Update size of the MTD. */
+ chip->numchips++;
+ mtd->size += chip->chipsize;
+ }
+
+ dev_info(&pdev->dev, "Found chip %i on bank %i\n", chipnr, bank);
+ return 0;
+
+notfound_id:
+ dev_info(&pdev->dev, "No chip found on bank %i\n", bank);
+ ctrl &= ~(JZ_NAND_CTRL_ENABLE_CHIP(bank - 1));
+ writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
+ jz_gpio_set_function(gpio, JZ_GPIO_FUNC_NONE);
+ jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
+ nand->bank_base[bank - 1]);
+notfound_resource:
+ gpio_free(gpio);
+notfound_gpio:
+ return ret;
+}
+
static int __devinit jz_nand_probe(struct platform_device *pdev)
{
int ret;
@@ -295,6 +407,8 @@ static int __devinit jz_nand_probe(struc
struct nand_chip *chip;
struct mtd_info *mtd;
struct jz_nand_platform_data *pdata = pdev->dev.platform_data;
+ size_t chipnr, bank_idx;
+ uint8_t nand_maf_id = 0, nand_dev_id = 0;
nand = kzalloc(sizeof(*nand), GFP_KERNEL);
if (!nand) {
@@ -305,10 +419,6 @@ static int __devinit jz_nand_probe(struc
ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);
if (ret)
goto err_free;
- ret = jz_nand_ioremap_resource(pdev, "bank", &nand->bank_mem,
- &nand->bank_base);
- if (ret)
- goto err_iounmap_mmio;
if (pdata && gpio_is_valid(pdata->busy_gpio)) {
ret = gpio_request(pdata->busy_gpio, "NAND busy pin");
@@ -316,7 +426,7 @@ static int __devinit jz_nand_probe(struc
dev_err(&pdev->dev,
"Failed to request busy gpio %d: %d\n",
pdata->busy_gpio, ret);
- goto err_iounmap_mem;
+ goto err_iounmap_mmio;
}
}
@@ -338,22 +448,51 @@ static int __devinit jz_nand_probe(struc
chip->chip_delay = 50;
chip->cmd_ctrl = jz_nand_cmd_ctrl;
+ chip->select_chip = jz_nand_select_chip;
if (pdata && gpio_is_valid(pdata->busy_gpio))
chip->dev_ready = jz_nand_dev_ready;
- chip->IO_ADDR_R = nand->bank_base;
- chip->IO_ADDR_W = nand->bank_base;
-
nand->pdata = pdata;
platform_set_drvdata(pdev, nand);
- writel(JZ_NAND_CTRL_ENABLE_CHIP(0), nand->base + JZ_REG_NAND_CTRL);
-
- ret = nand_scan_ident(mtd, 1, NULL);
- if (ret) {
- dev_err(&pdev->dev, "Failed to scan nand\n");
- goto err_gpio_free;
+ /* We are going to autodetect NAND chips in the banks specified in the
+ * platform data. Although nand_scan_ident() can detect multiple chips,
+ * it requires those chips to be numbered consecuitively, which is not
+ * always the case for external memory banks. And a fixed chip-to-bank
+ * mapping is not practical either, since for example Dingoo units
+ * produced at different times have NAND chips in different banks.
+ */
+ chipnr = 0;
+ for (bank_idx = 0; bank_idx < JZ_NAND_NUM_BANKS; bank_idx++) {
+ unsigned char bank;
+
+ /* If there is no platform data, look for NAND in bank 1,
+ * which is the most likely bank since it is the only one
+ * that can be booted from.
+ */
+ bank = pdata ? pdata->banks[bank_idx] : bank_idx ^ 1;
+ if (bank == 0)
+ break;
+ if (bank > JZ_NAND_NUM_BANKS) {
+ dev_warn(&pdev->dev,
+ "Skipping non-existing bank: %d\n", bank);
+ continue;
+ }
+ /* The detection routine will directly or indirectly call
+ * jz_nand_select_chip(), so nand->banks has to contain the
+ * bank we're checking.
+ */
+ nand->banks[chipnr] = bank;
+ if (jz_nand_detect_bank(pdev, nand, bank, chipnr,
+ &nand_maf_id, &nand_dev_id) == 0)
+ chipnr++;
+ else
+ nand->banks[chipnr] = 0;
+ }
+ if (chipnr == 0) {
+ dev_err(&pdev->dev, "No NAND chips found\n");
+ goto err_gpio_busy;
}
if (pdata && pdata->ident_callback) {
@@ -363,8 +502,8 @@ static int __devinit jz_nand_probe(struc
ret = nand_scan_tail(mtd);
if (ret) {
- dev_err(&pdev->dev, "Failed to scan nand\n");
- goto err_gpio_free;
+ dev_err(&pdev->dev, "Failed to scan NAND\n");
+ goto err_unclaim_banks;
}
ret = mtd_device_parse_register(mtd, NULL, 0,
@@ -381,14 +520,21 @@ static int __devinit jz_nand_probe(struc
return 0;
err_nand_release:
- nand_release(&nand->mtd);
-err_gpio_free:
+ nand_release(mtd);
+err_unclaim_banks:
+ while (chipnr--) {
+ unsigned char bank = nand->banks[chipnr];
+ gpio_free(JZ_GPIO_MEM_CS0 + bank - 1);
+ jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
+ nand->bank_base[bank - 1]);
+ }
+ writel(0, nand->base + JZ_REG_NAND_CTRL);
+err_gpio_busy:
+ if (pdata && gpio_is_valid(pdata->busy_gpio))
+ gpio_free(pdata->busy_gpio);
platform_set_drvdata(pdev, NULL);
- gpio_free(pdata->busy_gpio);
-err_iounmap_mem:
- iounmap(nand->bank_base);
err_iounmap_mmio:
- iounmap(nand->base);
+ jz_nand_iounmap_resource(nand->mem, nand->base);
err_free:
kfree(nand);
return ret;
@@ -397,16 +543,26 @@ err_free:
static int __devexit jz_nand_remove(struct platform_device *pdev)
{
struct jz_nand *nand = platform_get_drvdata(pdev);
+ struct jz_nand_platform_data *pdata = pdev->dev.platform_data;
+ size_t i;
nand_release(&nand->mtd);
/* Deassert and disable all chips */
writel(0, nand->base + JZ_REG_NAND_CTRL);
- iounmap(nand->bank_base);
- release_mem_region(nand->bank_mem->start, resource_size(nand->bank_mem));
- iounmap(nand->base);
- release_mem_region(nand->mem->start, resource_size(nand->mem));
+ for (i = 0; i < JZ_NAND_NUM_BANKS; ++i) {
+ unsigned char bank = nand->banks[i];
+ if (bank != 0) {
+ jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
+ nand->bank_base[bank - 1]);
+ gpio_free(JZ_GPIO_MEM_CS0 + bank - 1);
+ }
+ }
+ if (pdata && gpio_is_valid(pdata->busy_gpio))
+ gpio_free(pdata->busy_gpio);
+
+ jz_nand_iounmap_resource(nand->mem, nand->base);
platform_set_drvdata(pdev, NULL);
kfree(nand);

304
target/linux/xburst/patches-3.2/0007-Add-ili8960-lcd-driver.patch
View File

@ -1,304 +0,0 @@
From 2248fb9c47fe7e72c735d6c16aba27bf92e1673a Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sun, 1 Aug 2010 21:19:40 +0200
Subject: [PATCH 07/21] Add ili8960 lcd driver
---
drivers/video/backlight/Kconfig | 7 +
drivers/video/backlight/Makefile | 1 +
drivers/video/backlight/ili8960.c | 263 +++++++++++++++++++++++++++++++++++++
3 files changed, 271 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/backlight/ili8960.c
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -59,6 +59,13 @@ config LCD_LTV350QV
The LTV350QV panel is present on all ATSTK1000 boards.
+config LCD_ILI8960
+ tristate "Ilitek ili8960 LCD driver"
+ depends on LCD_CLASS_DEVICE && SPI
+ default n
+ help
+ Driver for the Ilitek ili8960 LCD controller chip.
+
config LCD_ILI9320
tristate
help
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_LCD_HP700) += jornada72
obj-$(CONFIG_LCD_L4F00242T03) += l4f00242t03.o
obj-$(CONFIG_LCD_LMS283GF05) += lms283gf05.o
obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
+obj-$(CONFIG_LCD_ILI8960) += ili8960.o
obj-$(CONFIG_LCD_ILI9320) += ili9320.o
obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o
obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o
--- /dev/null
+++ b/drivers/video/backlight/ili8960.c
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Driver for Ilitek ili8960 LCD
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/lcd.h>
+#include <linux/backlight.h>
+#include <linux/delay.h>
+
+struct ili8960 {
+ struct spi_device *spi;
+ struct lcd_device *lcd;
+ struct backlight_device *bl;
+ bool enabled;
+ unsigned int brightness;
+};
+
+#define ILI8960_REG_BRIGHTNESS 0x03
+#define ILI8960_REG_POWER 0x05
+#define ILI8960_REG_CONTRAST 0x0d
+
+static int ili8960_write_reg(struct spi_device *spi, uint8_t reg,
+ uint8_t data)
+{
+ uint8_t buf[2];
+ buf[0] = ((reg & 0x40) << 1) | (reg & 0x3f);
+ buf[1] = data;
+
+ return spi_write(spi, buf, sizeof(buf));
+}
+
+static int ili8960_programm_power(struct spi_device *spi, bool enabled)
+{
+ int ret;
+
+ if (enabled)
+ mdelay(20);
+
+ ret = ili8960_write_reg(spi, ILI8960_REG_POWER, enabled ? 0xc7 : 0xc6);
+
+ if (!enabled)
+ mdelay(20);
+
+ return ret;
+}
+
+static int ili8960_set_power(struct lcd_device *lcd, int power)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+
+ switch (power) {
+ case FB_BLANK_UNBLANK:
+ ili8960->enabled = true;
+ break;
+ default:
+ ili8960->enabled = false;
+ break;
+ }
+
+ return ili8960_programm_power(ili8960->spi, ili8960->enabled);
+}
+
+static int ili8960_get_power(struct lcd_device *lcd)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+ return ili8960->enabled ? FB_BLANK_UNBLANK : FB_BLANK_POWERDOWN;
+}
+
+static int ili8960_set_contrast(struct lcd_device *lcd, int contrast)
+{
+ struct ili8960 *ili8960 = lcd_get_data(lcd);
+
+ return ili8960_write_reg(ili8960->spi, ILI8960_REG_CONTRAST, contrast);
+}
+
+static int ili8960_set_mode(struct lcd_device *lcd, struct fb_videomode *mode)
+{
+ if (mode->xres != 320 && mode->yres != 240)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int ili8960_set_brightness(struct ili8960 *ili8960, int brightness)
+{
+ int ret;
+
+ ret = ili8960_write_reg(ili8960->spi, ILI8960_REG_BRIGHTNESS, brightness);
+
+ if (ret == 0)
+ ili8960->brightness = brightness;
+
+ return ret;
+}
+
+static ssize_t ili8960_show_brightness(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct lcd_device *ld = to_lcd_device(dev);
+ struct ili8960 *ili8960 = lcd_get_data(ld);
+
+ return sprintf(buf, "%u\n", ili8960->brightness);
+}
+
+static ssize_t ili8960_store_brightness(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct lcd_device *ld = to_lcd_device(dev);
+ struct ili8960 *ili8960 = lcd_get_data(ld);
+ unsigned long brightness;
+ int ret;
+
+ ret = strict_strtoul(buf, 0, &brightness);
+ if (ret)
+ return ret;
+
+ if (brightness > 255)
+ return -EINVAL;
+
+ ili8960_set_brightness(ili8960, brightness);
+
+ return count;
+}
+
+
+static DEVICE_ATTR(brightness, 0644, ili8960_show_brightness,
+ ili8960_store_brightness);
+
+static struct lcd_ops ili8960_lcd_ops = {
+ .set_power = ili8960_set_power,
+ .get_power = ili8960_get_power,
+ .set_contrast = ili8960_set_contrast,
+ .set_mode = ili8960_set_mode,
+};
+
+static int __devinit ili8960_probe(struct spi_device *spi)
+{
+ int ret;
+ struct ili8960 *ili8960;
+
+ ili8960 = kmalloc(sizeof(*ili8960), GFP_KERNEL);
+ if (!ili8960)
+ return -ENOMEM;
+
+ spi->bits_per_word = 8;
+ spi->mode = SPI_MODE_3;
+
+ ret = spi_setup(spi);
+ if (ret) {
+ dev_err(&spi->dev, "Failed to setup spi\n");
+ goto err_free_ili8960;
+ }
+
+ ili8960->spi = spi;
+
+ ili8960->lcd = lcd_device_register("ili8960-lcd", &spi->dev, ili8960,
+ &ili8960_lcd_ops);
+
+ if (IS_ERR(ili8960->lcd)) {
+ ret = PTR_ERR(ili8960->lcd);
+ dev_err(&spi->dev, "Failed to register lcd device: %d\n", ret);
+ goto err_free_ili8960;
+ }
+
+ ili8960->lcd->props.max_contrast = 255;
+
+ ret = device_create_file(&ili8960->lcd->dev, &dev_attr_brightness);
+ if (ret)
+ goto err_unregister_lcd;
+
+ ili8960_programm_power(ili8960->spi, true);
+ ili8960->enabled = true;
+
+ spi_set_drvdata(spi, ili8960);
+
+ ili8960_write_reg(spi, 0x13, 0x01);
+
+ return 0;
+err_unregister_lcd:
+ lcd_device_unregister(ili8960->lcd);
+err_free_ili8960:
+ kfree(ili8960);
+ return ret;
+}
+
+static int __devexit ili8960_remove(struct spi_device *spi)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ device_remove_file(&ili8960->lcd->dev, &dev_attr_brightness);
+ lcd_device_unregister(ili8960->lcd);
+
+ spi_set_drvdata(spi, NULL);
+ kfree(ili8960);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int ili8960_suspend(struct spi_device *spi, pm_message_t state)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ if (ili8960->enabled)
+ ili8960_programm_power(ili8960->spi, false);
+
+ return 0;
+}
+
+static int ili8960_resume(struct spi_device *spi)
+{
+ struct ili8960 *ili8960 = spi_get_drvdata(spi);
+
+ if (ili8960->enabled)
+ ili8960_programm_power(ili8960->spi, true);
+
+ return 0;
+}
+
+#else
+#define ili8960_suspend NULL
+#define ili8960_resume NULL
+#endif
+
+static struct spi_driver ili8960_driver = {
+ .driver = {
+ .name = "ili8960",
+ .owner = THIS_MODULE,
+ },
+ .probe = ili8960_probe,
+ .remove = __devexit_p(ili8960_remove),
+ .suspend = ili8960_suspend,
+ .resume = ili8960_resume,
+};
+
+static int __init ili8960_init(void)
+{
+ return spi_register_driver(&ili8960_driver);
+}
+module_init(ili8960_init);
+
+static void __exit ili8960_exit(void)
+{
+ spi_unregister_driver(&ili8960_driver);
+}
+module_exit(ili8960_exit)
+
+MODULE_AUTHOR("Lars-Peter Clausen");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("LCD driver for Ilitek ili8960");
+MODULE_ALIAS("spi:ili8960");

21
target/linux/xburst/patches-3.2/0008-qi_lb60-Don-t-use-3-wire-spi-mode-for-the-display-fo.patch
View File

@ -1,21 +0,0 @@
From e5f25e25ed6c0478cbba7a32891b911e3183dad4 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Wed, 13 Oct 2010 01:17:24 +0200
Subject: [PATCH 08/21] qi_lb60: Don't use 3-wire spi mode for the display for
now
The spi_gpio driver does not support 3-wire mode.
---
arch/mips/jz4740/board-qi_lb60.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -310,7 +310,6 @@ static struct spi_board_info qi_lb60_spi
.chip_select = 0,
.bus_num = 1,
.max_speed_hz = 30 * 1000,
- .mode = SPI_3WIRE,
},
};

124
target/linux/xburst/patches-3.2/0009-dev-mem-Add-kernel-config-option-to-omit-this-device.patch
View File

@ -1,124 +0,0 @@
From 4003b9a2c05f4d0d37535c3dffbf4a7b47d5c36c Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Wed, 8 Sep 2010 02:31:19 +0200
Subject: [PATCH 09/21] /dev/mem: Add kernel config option to omit this
device.
Omitting this device prevents software from accessing the hardware directly, which can cause trouble if the kernel accesses the same hardware.
It also saves some space on embedded systems.
---
arch/x86/Kconfig.debug | 1 +
drivers/char/Kconfig | 10 ++++++++++
drivers/char/mem.c | 17 +++++++++++++++++
3 files changed, 28 insertions(+), 0 deletions(-)
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
config STRICT_DEVMEM
bool "Filter access to /dev/mem"
+ depends on DEVMEM
---help---
If this option is disabled, you allow userspace (root) access to all
of memory, including kernel and userspace memory. Accidental
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -6,6 +6,16 @@ menu "Character devices"
source "drivers/tty/Kconfig"
+config DEVMEM
+ bool "/dev/mem virtual device support"
+ default y
+ help
+ Say Y here if you want to support the /dev/mem device.
+ Some X server drivers access the video hardware using this device.
+ Accessing hardware directly from user space can be useful in some
+ cases, but it is not without risks.
+ When in doubt, say "N".
+
config DEVKMEM
bool "/dev/kmem virtual device support"
default y
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -87,6 +87,8 @@ void __weak unxlate_dev_mem_ptr(unsigned
{
}
+#ifdef CONFIG_DEVMEM
+
/*
* This funcion reads the *physical* memory. The f_pos points directly to the
* memory location.
@@ -210,6 +212,10 @@ static ssize_t write_mem(struct file *fi
return written;
}
+#endif
+
+#if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM)
+
int __weak phys_mem_access_prot_allowed(struct file *file,
unsigned long pfn, unsigned long size, pgprot_t *vma_prot)
{
@@ -331,6 +337,8 @@ static int mmap_mem(struct file *file, s
return 0;
}
+#endif
+
#ifdef CONFIG_DEVKMEM
static int mmap_kmem(struct file *file, struct vm_area_struct *vma)
{
@@ -694,6 +702,7 @@ static loff_t null_lseek(struct file *fi
return file->f_pos = 0;
}
+#if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) || defined(CONFIG_DEVPORT)
/*
* The memory devices use the full 32/64 bits of the offset, and so we cannot
* check against negative addresses: they are ok. The return value is weird,
@@ -726,11 +735,15 @@ static loff_t memory_lseek(struct file *
mutex_unlock(&file->f_path.dentry->d_inode->i_mutex);
return ret;
}
+#endif
+#if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) || \
+ defined(CONFIG_DEVPORT) || defined(CONFIG_CRASH_DUMP)
static int open_port(struct inode * inode, struct file * filp)
{
return capable(CAP_SYS_RAWIO) ? 0 : -EPERM;
}
+#endif
#define zero_lseek null_lseek
#define full_lseek null_lseek
@@ -740,6 +753,7 @@ static int open_port(struct inode * inod
#define open_kmem open_mem
#define open_oldmem open_mem
+#ifdef CONFIG_DEVMEM
static const struct file_operations mem_fops = {
.llseek = memory_lseek,
.read = read_mem,
@@ -748,6 +762,7 @@ static const struct file_operations mem_
.open = open_mem,
.get_unmapped_area = get_unmapped_area_mem,
};
+#endif
#ifdef CONFIG_DEVKMEM
static const struct file_operations kmem_fops = {
@@ -851,7 +866,9 @@ static const struct memdev {
const struct file_operations *fops;
struct backing_dev_info *dev_info;
} devlist[] = {
+#ifdef CONFIG_DEVMEM
[1] = { "mem", 0, &mem_fops, &directly_mappable_cdev_bdi },
+#endif
#ifdef CONFIG_DEVKMEM
[2] = { "kmem", 0, &kmem_fops, &directly_mappable_cdev_bdi },
#endif

301
target/linux/xburst/patches-3.2/0010-cpufreq_stats-Support-runtime-changes-to-frequency-t.patch
View File

@ -1,301 +0,0 @@
From ca40c7542f0cd0e0dfa074bd4ccefc04b8561427 Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Tue, 2 Aug 2011 10:26:09 +0200
Subject: [PATCH 10/21] cpufreq_stats: Support runtime changes to frequency
table.
---
drivers/cpufreq/cpufreq_stats.c | 161 ++++++++++++++++++++-------------------
1 files changed, 83 insertions(+), 78 deletions(-)
--- a/drivers/cpufreq/cpufreq_stats.c
+++ b/drivers/cpufreq/cpufreq_stats.c
@@ -21,6 +21,7 @@
#include <linux/kobject.h>
#include <linux/spinlock.h>
#include <linux/notifier.h>
+#include <linux/string.h>
#include <asm/cputime.h>
static spinlock_t cpufreq_stats_lock;
@@ -37,7 +38,7 @@ struct cpufreq_stats {
unsigned long long last_time;
unsigned int max_state;
unsigned int state_num;
- unsigned int last_index;
+ int last_index;
cputime64_t *time_in_state;
unsigned int *freq_table;
#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
@@ -60,7 +61,7 @@ static int cpufreq_stats_update(unsigned
cur_time = get_jiffies_64();
spin_lock(&cpufreq_stats_lock);
stat = per_cpu(cpufreq_stats_table, cpu);
- if (stat->time_in_state)
+ if (stat->time_in_state && stat->last_index != -1)
stat->time_in_state[stat->last_index] =
cputime64_add(stat->time_in_state[stat->last_index],
cputime_sub(cur_time, stat->last_time));
@@ -83,7 +84,7 @@ static ssize_t show_time_in_state(struct
ssize_t len = 0;
int i;
struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, policy->cpu);
- if (!stat)
+ if (!stat || !stat->time_in_state)
return 0;
cpufreq_stats_update(stat->cpu);
for (i = 0; i < stat->state_num; i++) {
@@ -101,7 +102,7 @@ static ssize_t show_trans_table(struct c
int i, j;
struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, policy->cpu);
- if (!stat)
+ if (!stat || !stat->trans_table)
return 0;
cpufreq_stats_update(stat->cpu);
len += snprintf(buf + len, PAGE_SIZE - len, " From : To\n");
@@ -160,63 +161,35 @@ static struct attribute_group stats_attr
static int freq_table_get_index(struct cpufreq_stats *stat, unsigned int freq)
{
int index;
- for (index = 0; index < stat->max_state; index++)
- if (stat->freq_table[index] == freq)
- return index;
+ if (stat->freq_table)
+ for (index = 0; index < stat->max_state; index++)
+ if (stat->freq_table[index] == freq)
+ return index;
return -1;
}
-/* should be called late in the CPU removal sequence so that the stats
- * memory is still available in case someone tries to use it.
- */
static void cpufreq_stats_free_table(unsigned int cpu)
{
struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, cpu);
+ struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+ if (policy && policy->cpu == cpu)
+ sysfs_remove_group(&policy->kobj, &stats_attr_group);
if (stat) {
kfree(stat->time_in_state);
kfree(stat);
}
per_cpu(cpufreq_stats_table, cpu) = NULL;
-}
-
-/* must be called early in the CPU removal sequence (before
- * cpufreq_remove_dev) so that policy is still valid.
- */
-static void cpufreq_stats_free_sysfs(unsigned int cpu)
-{
- struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
- if (policy && policy->cpu == cpu)
- sysfs_remove_group(&policy->kobj, &stats_attr_group);
if (policy)
cpufreq_cpu_put(policy);
}
-static int cpufreq_stats_create_table(struct cpufreq_policy *policy,
+static int cpufreq_stats_update_table(struct cpufreq_policy *policy,
struct cpufreq_frequency_table *table)
{
- unsigned int i, j, count = 0, ret = 0;
- struct cpufreq_stats *stat;
- struct cpufreq_policy *data;
+ unsigned int i, j, count = 0;
unsigned int alloc_size;
unsigned int cpu = policy->cpu;
- if (per_cpu(cpufreq_stats_table, cpu))
- return -EBUSY;
- stat = kzalloc(sizeof(struct cpufreq_stats), GFP_KERNEL);
- if ((stat) == NULL)
- return -ENOMEM;
-
- data = cpufreq_cpu_get(cpu);
- if (data == NULL) {
- ret = -EINVAL;
- goto error_get_fail;
- }
-
- ret = sysfs_create_group(&data->kobj, &stats_attr_group);
- if (ret)
- goto error_out;
-
- stat->cpu = cpu;
- per_cpu(cpufreq_stats_table, cpu) = stat;
+ struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, cpu);
for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
unsigned int freq = table[i].frequency;
@@ -225,40 +198,73 @@ static int cpufreq_stats_create_table(st
count++;
}
+ if (stat->max_state != count) {
+ stat->max_state = count;
+ kfree(stat->time_in_state);
+ stat->time_in_state = NULL;
+ }
alloc_size = count * sizeof(int) + count * sizeof(cputime64_t);
-
#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
alloc_size += count * count * sizeof(int);
#endif
- stat->max_state = count;
- stat->time_in_state = kzalloc(alloc_size, GFP_KERNEL);
- if (!stat->time_in_state) {
- ret = -ENOMEM;
- goto error_out;
- }
- stat->freq_table = (unsigned int *)(stat->time_in_state + count);
-
+ if (stat->time_in_state) {
+ memset(stat->time_in_state, 0, alloc_size);
+ } else {
+ stat->time_in_state = kzalloc(alloc_size, GFP_KERNEL);
+ if (!stat->time_in_state)
+ return -ENOMEM;
+ stat->freq_table = (unsigned int *)(
+ stat->time_in_state + count);
#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
- stat->trans_table = stat->freq_table + count;
+ stat->trans_table = stat->freq_table + count;
#endif
+ }
+
j = 0;
- for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
- unsigned int freq = table[i].frequency;
- if (freq == CPUFREQ_ENTRY_INVALID)
- continue;
- if (freq_table_get_index(stat, freq) == -1)
- stat->freq_table[j++] = freq;
+ if (stat->freq_table) {
+ for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) {
+ unsigned int freq = table[i].frequency;
+ if (freq == CPUFREQ_ENTRY_INVALID)
+ continue;
+ if (freq_table_get_index(stat, freq) == -1)
+ stat->freq_table[j++] = freq;
+ }
}
stat->state_num = j;
spin_lock(&cpufreq_stats_lock);
stat->last_time = get_jiffies_64();
stat->last_index = freq_table_get_index(stat, policy->cur);
spin_unlock(&cpufreq_stats_lock);
+ return 0;
+}
+
+static int cpufreq_stats_create_table(struct cpufreq_policy *policy,
+ struct cpufreq_frequency_table *table)
+{
+ unsigned int ret = 0;
+ struct cpufreq_stats *stat;
+ struct cpufreq_policy *data;
+ unsigned int cpu = policy->cpu;
+
+ stat = kzalloc(sizeof(struct cpufreq_stats), GFP_KERNEL);
+ if ((stat) == NULL)
+ return -ENOMEM;
+
+ data = cpufreq_cpu_get(cpu);
+ if (data == NULL) {
+ ret = -EINVAL;
+ goto error_out;
+ }
+ ret = sysfs_create_group(&data->kobj, &stats_attr_group);
cpufreq_cpu_put(data);
+ if (ret)
+ goto error_out;
+
+ stat->cpu = cpu;
+ per_cpu(cpufreq_stats_table, cpu) = stat;
+
return 0;
error_out:
- cpufreq_cpu_put(data);
-error_get_fail:
kfree(stat);
per_cpu(cpufreq_stats_table, cpu) = NULL;
return ret;
@@ -276,10 +282,12 @@ static int cpufreq_stat_notifier_policy(
table = cpufreq_frequency_get_table(cpu);
if (!table)
return 0;
- ret = cpufreq_stats_create_table(policy, table);
- if (ret)
- return ret;
- return 0;
+ if (!per_cpu(cpufreq_stats_table, cpu)) {
+ ret = cpufreq_stats_create_table(policy, table);
+ if (ret)
+ return ret;
+ }
+ return cpufreq_stats_update_table(policy, table);
}
static int cpufreq_stat_notifier_trans(struct notifier_block *nb,
@@ -299,21 +307,23 @@ static int cpufreq_stat_notifier_trans(s
old_index = stat->last_index;
new_index = freq_table_get_index(stat, freq->new);
- /* We can't do stat->time_in_state[-1]= .. */
- if (old_index == -1 || new_index == -1)
- return 0;
-
cpufreq_stats_update(freq->cpu);
-
if (old_index == new_index)
return 0;
+ if (new_index == -1)
+ return 0;
+
spin_lock(&cpufreq_stats_lock);
stat->last_index = new_index;
+ if (old_index != -1) {
#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
- stat->trans_table[old_index * stat->max_state + new_index]++;
+ if (stat->trans_table)
+ stat->trans_table[old_index * stat->max_state +
+ new_index]++;
#endif
- stat->total_trans++;
+ stat->total_trans++;
+ }
spin_unlock(&cpufreq_stats_lock);
return 0;
}
@@ -329,9 +339,6 @@ static int __cpuinit cpufreq_stat_cpu_ca
case CPU_ONLINE_FROZEN:
cpufreq_update_policy(cpu);
break;
- case CPU_DOWN_PREPARE:
- cpufreq_stats_free_sysfs(cpu);
- break;
case CPU_DEAD:
case CPU_DEAD_FROZEN:
cpufreq_stats_free_table(cpu);
@@ -340,10 +347,9 @@ static int __cpuinit cpufreq_stat_cpu_ca
return NOTIFY_OK;
}
-/* priority=1 so this will get called before cpufreq_remove_dev */
-static struct notifier_block cpufreq_stat_cpu_notifier __refdata = {
+static struct notifier_block cpufreq_stat_cpu_notifier __refdata =
+{
.notifier_call = cpufreq_stat_cpu_callback,
- .priority = 1,
};
static struct notifier_block notifier_policy_block = {
@@ -390,7 +396,6 @@ static void __exit cpufreq_stats_exit(vo
unregister_hotcpu_notifier(&cpufreq_stat_cpu_notifier);
for_each_online_cpu(cpu) {
cpufreq_stats_free_table(cpu);
- cpufreq_stats_free_sysfs(cpu);
}
}

351
target/linux/xburst/patches-3.2/0011-MIPS-JZ4740-Added-setting-of-PLL-rate-and-main-divid.patch
View File

@ -1,351 +0,0 @@
From 27ff621cd9a5347efda4be502abbef13a99146ce Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Sun, 29 Aug 2010 08:11:00 +0200
Subject: [PATCH 11/21] MIPS: JZ4740: Added setting of PLL rate and main
dividers.
This functionality makes a cpufreq driver possible.
Squashed version of the development done in the jz-2.6.39 branch.
---
arch/mips/jz4740/clock.c | 230 ++++++++++++++++++++++++++++++++++++++++++++--
arch/mips/jz4740/clock.h | 4 +
2 files changed, 224 insertions(+), 10 deletions(-)
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -1,5 +1,8 @@
/*
+ * Copyright (c) 2006-2007, Ingenic Semiconductor Inc.
* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Copyright (c) 2010, Ulrich Hecht <ulrich.hecht@gmail.com>
+ * Copyright (c) 2010, Maarten ter Huurne <maarten@treewalker.org>
* JZ4740 SoC clock support
*
* This program is free software; you can redistribute it and/or modify it
@@ -41,16 +44,20 @@
#define JZ_CLOCK_CTRL_I2S_SRC_PLL BIT(31)
#define JZ_CLOCK_CTRL_KO_ENABLE BIT(30)
#define JZ_CLOCK_CTRL_UDC_SRC_PLL BIT(29)
-#define JZ_CLOCK_CTRL_UDIV_MASK 0x1f800000
#define JZ_CLOCK_CTRL_CHANGE_ENABLE BIT(22)
#define JZ_CLOCK_CTRL_PLL_HALF BIT(21)
-#define JZ_CLOCK_CTRL_LDIV_MASK 0x001f0000
#define JZ_CLOCK_CTRL_UDIV_OFFSET 23
#define JZ_CLOCK_CTRL_LDIV_OFFSET 16
#define JZ_CLOCK_CTRL_MDIV_OFFSET 12
#define JZ_CLOCK_CTRL_PDIV_OFFSET 8
#define JZ_CLOCK_CTRL_HDIV_OFFSET 4
#define JZ_CLOCK_CTRL_CDIV_OFFSET 0
+#define JZ_CLOCK_CTRL_UDIV_MASK (0x3f << JZ_CLOCK_CTRL_UDIV_OFFSET)
+#define JZ_CLOCK_CTRL_LDIV_MASK (0x1f << JZ_CLOCK_CTRL_LDIV_OFFSET)
+#define JZ_CLOCK_CTRL_MDIV_MASK (0x0f << JZ_CLOCK_CTRL_MDIV_OFFSET)
+#define JZ_CLOCK_CTRL_PDIV_MASK (0x0f << JZ_CLOCK_CTRL_PDIV_OFFSET)
+#define JZ_CLOCK_CTRL_HDIV_MASK (0x0f << JZ_CLOCK_CTRL_HDIV_OFFSET)
+#define JZ_CLOCK_CTRL_CDIV_MASK (0x0f << JZ_CLOCK_CTRL_CDIV_OFFSET)
#define JZ_CLOCK_GATE_UART0 BIT(0)
#define JZ_CLOCK_GATE_TCU BIT(1)
@@ -90,6 +97,7 @@
#define JZ_CLOCK_PLL_M_OFFSET 23
#define JZ_CLOCK_PLL_N_OFFSET 18
#define JZ_CLOCK_PLL_OD_OFFSET 16
+#define JZ_CLOCK_PLL_STABILIZE_OFFSET 0
#define JZ_CLOCK_LOW_POWER_MODE_DOZE BIT(2)
#define JZ_CLOCK_LOW_POWER_MODE_SLEEP BIT(0)
@@ -97,10 +105,15 @@
#define JZ_CLOCK_SLEEP_CTRL_SUSPEND_UHC BIT(7)
#define JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC BIT(6)
+#define JZ_REG_EMC_RTCNT 0x88
+#define JZ_REG_EMC_RTCOR 0x8C
+
static void __iomem *jz_clock_base;
static spinlock_t jz_clock_lock;
static LIST_HEAD(jz_clocks);
+static void __iomem *jz_emc_base;
+
struct main_clk {
struct clk clk;
uint32_t div_offset;
@@ -204,25 +217,88 @@ static int jz_clk_ko_is_enabled(struct c
return !!(jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_KO_ENABLE);
}
+static struct static_clk jz_clk_ext;
+
+static unsigned long jz_clk_pll_calc_rate(
+ unsigned int in_div, unsigned int feedback, unsigned int out_div)
+{
+ return ((jz_clk_ext.rate / in_div) * feedback) / out_div;
+}
+
+static void jz_clk_pll_calc_dividers(unsigned long rate,
+ unsigned int *in_div, unsigned int *feedback, unsigned int *out_div)
+{
+ unsigned int target;
+
+ /* The frequency after the input divider must be between 1 and 15 MHz.
+ The highest divider yields the best resolution. */
+ *in_div = jz_clk_ext.rate / 1000000;
+ if (*in_div >= 34)
+ *in_div = 33;
+
+ /* The frequency before the output divider must be between 100 and
+ 500 MHz. The lowest target rate is more energy efficient. */
+ if (rate < 25000000) {
+ *out_div = 4;
+ target = 25000000 * 4;
+ } else if (rate <= 50000000) {
+ *out_div = 4;
+ target = rate * 4;
+ } else if (rate <= 100000000) {
+ *out_div = 2;
+ target = rate * 2;
+ } else if (rate <= 500000000) {
+ *out_div = 1;
+ target = rate;
+ } else {
+ *out_div = 1;
+ target = 500000000;
+ }
+
+ /* Compute the feedback divider.
+ Since the divided input is at least 1 MHz and the target frequency
+ at most 500 MHz, the feedback will be at most 500 and will therefore
+ always fit in the 9-bit register.
+ Similarly, the divided input is at most 15 MHz and the target
+ frequency at least 100 MHz, so the feedback will be at least 6
+ where the minimum supported value is 2. */
+ *feedback = ((target / 1000) * *in_div) / (jz_clk_ext.rate / 1000);
+}
+
+static unsigned long jz_clk_pll_round_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int in_div, feedback, out_div;
+ /* The PLL frequency must be a multiple of 24 MHz, since the LCD pixel
+ * clock must be exactly 12 MHz for the TV-out to work.
+ * TODO: A multiple of 12 MHz for the PLL would work if the PLL would
+ * not be divided by 2 before being passed to the set of derived
+ * clocks that includes the LCD pixel clock.
+ * TODO: Systemwide decisions like this should be made by the board
+ * support code, so add some kind of hook for that.
+ */
+ unsigned long rate24 = (rate / 24000000) * 24000000;
+
+ jz_clk_pll_calc_dividers(rate24, &in_div, &feedback, &out_div);
+ return jz_clk_pll_calc_rate(in_div, feedback, out_div);
+}
+
static const int pllno[] = {1, 2, 2, 4};
static unsigned long jz_clk_pll_get_rate(struct clk *clk)
{
uint32_t val;
- int m;
- int n;
- int od;
+ unsigned int in_div, feedback, out_div;
val = jz_clk_reg_read(JZ_REG_CLOCK_PLL);
if (val & JZ_CLOCK_PLL_BYPASS)
return clk_get_rate(clk->parent);
- m = ((val >> 23) & 0x1ff) + 2;
- n = ((val >> 18) & 0x1f) + 2;
- od = (val >> 16) & 0x3;
+ feedback = ((val >> 23) & 0x1ff) + 2;
+ in_div = ((val >> 18) & 0x1f) + 2;
+ out_div = pllno[(val >> 16) & 0x3];
- return ((clk_get_rate(clk->parent) / n) * m) / pllno[od];
+ return jz_clk_pll_calc_rate(in_div, feedback, out_div);
}
static unsigned long jz_clk_pll_half_get_rate(struct clk *clk)
@@ -235,7 +311,77 @@ static unsigned long jz_clk_pll_half_get
return jz_clk_pll_get_rate(clk->parent) >> 1;
}
-static const int jz_clk_main_divs[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
+#define SDRAM_TREF 15625 /* Refresh period: 4096 refresh cycles/64ms */
+
+static void sdram_set_pll(unsigned int pllin)
+{
+ unsigned int ns, sdramclock;
+
+ ns = 1000000000 / pllin;
+ sdramclock = (SDRAM_TREF / ns) / 64 + 1;
+ if (sdramclock > 0xff) sdramclock = 0xff;
+ /* Set refresh registers */
+ writew(sdramclock, jz_emc_base + JZ_REG_EMC_RTCOR);
+ writew(sdramclock, jz_emc_base + JZ_REG_EMC_RTCNT);
+}
+
+static int jz_clk_pll_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int ctrl, plcr1;
+ unsigned int feedback, in_div, out_div, pllout, pllout2;
+
+ jz_clk_pll_calc_dividers(rate, &in_div, &feedback, &out_div);
+
+ ctrl = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
+ pllout = jz_clk_pll_calc_rate(in_div, feedback, out_div);
+ pllout2 = (ctrl & JZ_CLOCK_CTRL_PLL_HALF) ? pllout : (pllout / 2);
+
+ /* Init UHC clock */
+ writel(pllout2 / 48000000 - 1, jz_clock_base + JZ_REG_CLOCK_UHC);
+
+ plcr1 = ((feedback - 2) << JZ_CLOCK_PLL_M_OFFSET) |
+ ((in_div - 2) << JZ_CLOCK_PLL_N_OFFSET) |
+ ((out_div - 1) << JZ_CLOCK_PLL_OD_OFFSET) |
+ (0x20 << JZ_CLOCK_PLL_STABILIZE_OFFSET) |
+ JZ_CLOCK_PLL_ENABLED;
+
+ sdram_set_pll(pllout);
+
+ /* LCD pixclock */
+ writel(pllout2 / 12000000 - 1, jz_clock_base + JZ_REG_CLOCK_LCD);
+
+ /* configure PLL */
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".align 5\n"
+ "sw %1,0(%0)\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ ".set reorder\n\t"
+ :
+ : "r" (jz_clock_base + JZ_REG_CLOCK_PLL), "r" (plcr1));
+
+ /* MtH: For some reason the MSC will have problems if this flag is not
+ restored, even though the MSC is supposedly the only divider
+ that is not affected by this flag. */
+ jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_CHANGE_ENABLE);
+
+ return 0;
+}
+
+static const unsigned int jz_clk_main_divs[] = {
+ 1, 2, 3, 4, 6, 8, 12, 16, 24, 32
+};
+static const unsigned int jz_clk_main_divs_inv[] = {
+ -1, 0, 1, 2, 3, -1, 4, -1, 5, -1, -1, -1, 6, -1, -1, -1,
+ 7, -1, -1, -1, -1, -1, -1, -1, 8, -1, -1, -1, -1, -1, -1, -1,
+ 9
+};
static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate)
{
@@ -290,6 +436,64 @@ static int jz_clk_main_set_rate(struct c
return 0;
}
+static struct main_clk jz_clk_cpu;
+
+int clk_main_set_dividers(bool immediate, unsigned int cdiv, unsigned int hdiv,
+ unsigned int mdiv, unsigned int pdiv)
+{
+ unsigned int cdiv_enc, hdiv_enc, mdiv_enc, pdiv_enc;
+ unsigned int ctrl;
+ unsigned int tmp, wait;
+
+ if (cdiv >= ARRAY_SIZE(jz_clk_main_divs_inv) ||
+ hdiv >= ARRAY_SIZE(jz_clk_main_divs_inv) ||
+ mdiv >= ARRAY_SIZE(jz_clk_main_divs_inv) ||
+ pdiv >= ARRAY_SIZE(jz_clk_main_divs_inv))
+ return -EINVAL;
+ cdiv_enc = jz_clk_main_divs_inv[cdiv];
+ hdiv_enc = jz_clk_main_divs_inv[hdiv];
+ mdiv_enc = jz_clk_main_divs_inv[mdiv];
+ pdiv_enc = jz_clk_main_divs_inv[pdiv];
+ if (cdiv_enc == (unsigned int)-1 ||
+ hdiv_enc == (unsigned int)-1 ||
+ mdiv_enc == (unsigned int)-1 ||
+ pdiv_enc == (unsigned int)-1)
+ return -EINVAL;
+
+ ctrl = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
+ ctrl &= ~(JZ_CLOCK_CTRL_CHANGE_ENABLE |
+ JZ_CLOCK_CTRL_CDIV_MASK | JZ_CLOCK_CTRL_HDIV_MASK |
+ JZ_CLOCK_CTRL_MDIV_MASK | JZ_CLOCK_CTRL_PDIV_MASK);
+ if (immediate) ctrl |= JZ_CLOCK_CTRL_CHANGE_ENABLE;
+ ctrl |= (cdiv_enc << JZ_CLOCK_CTRL_CDIV_OFFSET) |
+ (hdiv_enc << JZ_CLOCK_CTRL_HDIV_OFFSET) |
+ (mdiv_enc << JZ_CLOCK_CTRL_MDIV_OFFSET) |
+ (pdiv_enc << JZ_CLOCK_CTRL_PDIV_OFFSET);
+
+ /* set dividers */
+ /* delay loops lifted from the old Ingenic cpufreq driver */
+ wait = ((clk_get_rate(&jz_clk_cpu.clk) / 1000000) * 500) / 1000;
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".align 5\n"
+ "sw %2,0(%1)\n\t"
+ "li %0,0\n\t"
+ "1:\n\t"
+ "bne %0,%3,1b\n\t"
+ "addi %0, 1\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ ".set reorder\n\t"
+ : "=r" (tmp)
+ : "r" (jz_clock_base + JZ_REG_CLOCK_CTRL), "r" (ctrl),
+ "r" (wait));
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(clk_main_set_dividers);
+
static struct clk_ops jz_clk_static_ops = {
.get_rate = jz_clk_static_get_rate,
.enable = jz_clk_enable_gating,
@@ -307,6 +511,8 @@ static struct static_clk jz_clk_ext = {
static struct clk_ops jz_clk_pll_ops = {
.get_rate = jz_clk_pll_get_rate,
+ .set_rate = jz_clk_pll_set_rate,
+ .round_rate = jz_clk_pll_round_rate,
};
static struct clk jz_clk_pll = {
@@ -897,6 +1103,10 @@ static int jz4740_clock_init(void)
if (!jz_clock_base)
return -EBUSY;
+ jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
+ if (!jz_emc_base)
+ return -EBUSY;
+
spin_lock_init(&jz_clock_lock);
jz_clk_ext.rate = jz4740_clock_bdata.ext_rate;
--- a/arch/mips/jz4740/clock.h
+++ b/arch/mips/jz4740/clock.h
@@ -17,6 +17,7 @@
#define __MIPS_JZ4740_CLOCK_H__
#include <linux/list.h>
+#include <linux/types.h>
struct jz4740_clock_board_data {
unsigned long ext_rate;
@@ -63,6 +64,9 @@ struct clk {
int clk_is_enabled(struct clk *clk);
+int clk_main_set_dividers(bool immediate, unsigned int cdiv, unsigned int hdiv,
+ unsigned int mdiv, unsigned int pdiv);
+
#ifdef CONFIG_DEBUG_FS
void jz4740_clock_debugfs_init(void);
void jz4740_clock_debugfs_add_clk(struct clk *clk);

298
target/linux/xburst/patches-3.2/0012-MIPS-JZ4740-Add-cpufreq-support.patch
View File

@ -1,298 +0,0 @@
From d0f0d5739a31c12d349980ed05a670fa1e84696d Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Wed, 16 Mar 2011 03:16:04 +0100
Subject: [PATCH 12/21] MIPS: JZ4740: Add cpufreq support.
This is a squashed version of Uli's driver that was further developed in the opendingux-kernel repository.
---
arch/mips/Kconfig | 1 +
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/cpufreq.c | 226 ++++++++++++++++++++++++++++++++++++++
arch/mips/kernel/cpufreq/Kconfig | 13 ++-
4 files changed, 240 insertions(+), 1 deletions(-)
create mode 100644 arch/mips/jz4740/cpufreq.c
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -209,6 +209,7 @@ config MACH_JZ4740
select HAVE_PWM
select HAVE_CLK
select GENERIC_IRQ_CHIP
+ select CPU_SUPPORTS_CPUFREQ
config LANTIQ
bool "Lantiq based platforms"
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -16,5 +16,6 @@ obj-$(CONFIG_JZ4740_QI_LB60) += board-qi
# PM support
obj-$(CONFIG_PM) += pm.o
+obj-$(CONFIG_CPU_FREQ_JZ) += cpufreq.o
ccflags-y := -Werror -Wall
--- /dev/null
+++ b/arch/mips/jz4740/cpufreq.c
@@ -0,0 +1,226 @@
+/*
+ * linux/arch/mips/jz4740/cpufreq.c
+ *
+ * cpufreq driver for JZ4740
+ *
+ * Copyright (c) 2010 Ulrich Hecht <ulrich.hecht@gmail.com>
+ * Copyright (c) 2010 Maarten ter Huurne <maarten@treewalker.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+
+#include <linux/cpufreq.h>
+
+#include <linux/clk.h>
+#include <asm/mach-jz4740/base.h>
+
+#include "clock.h"
+
+#define DEBUG_CPUFREQ
+
+#ifdef DEBUG_CPUFREQ
+#define dprintk(X...) printk(KERN_INFO X)
+#else
+#define dprintk(X...) do { } while(0)
+#endif
+
+#define HCLK_MIN 30000
+/* TODO: The maximum MCLK most likely depends on the SDRAM chips used,
+ so it is board-specific. */
+#define MCLK_MAX 140000
+
+/* Same as jz_clk_main_divs, but with 24 and 32 removed because the hardware
+ spec states those dividers must not be used for CCLK or HCLK. */
+static const unsigned int jz4740_freq_cpu_divs[] = {1, 2, 3, 4, 6, 8, 12, 16};
+
+struct jz4740_freq_percpu_info {
+ unsigned int pll_rate;
+ struct cpufreq_frequency_table table[
+ ARRAY_SIZE(jz4740_freq_cpu_divs) + 1];
+};
+
+static struct clk *pll;
+static struct clk *cclk;
+
+static struct jz4740_freq_percpu_info jz4740_freq_info;
+
+static struct cpufreq_driver cpufreq_jz4740_driver;
+
+static void jz4740_freq_fill_table(struct cpufreq_policy *policy,
+ unsigned int pll_rate)
+{
+ struct cpufreq_frequency_table *table = &jz4740_freq_info.table[0];
+ int i;
+
+#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
+ /* for showing /sys/devices/system/cpu/cpuX/cpufreq/stats/ */
+ static bool init = false;
+ if (init)
+ cpufreq_frequency_table_put_attr(policy->cpu);
+ else
+ init = true;
+#endif
+
+ jz4740_freq_info.pll_rate = pll_rate;
+
+ for (i = 0; i < ARRAY_SIZE(jz4740_freq_cpu_divs); i++) {
+ unsigned int freq = pll_rate / jz4740_freq_cpu_divs[i];
+ if (freq < HCLK_MIN) break;
+ table[i].index = i;
+ table[i].frequency = freq;
+ }
+ table[i].index = i;
+ table[i].frequency = CPUFREQ_TABLE_END;
+
+ policy->min = table[i - 1].frequency;
+ policy->max = table[0].frequency;
+
+#ifdef CONFIG_CPU_FREQ_STAT_DETAILS
+ cpufreq_frequency_table_get_attr(table, policy->cpu);
+#endif
+}
+
+static unsigned int jz4740_freq_get(unsigned int cpu)
+{
+ return clk_get_rate(cclk) / 1000;
+}
+
+static int jz4740_freq_verify(struct cpufreq_policy *policy)
+{
+ unsigned int new_pll;
+
+ cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+ policy->cpuinfo.max_freq);
+
+ new_pll = clk_round_rate(pll, policy->max * 1000) / 1000;
+ if (jz4740_freq_info.pll_rate != new_pll)
+ jz4740_freq_fill_table(policy, new_pll);
+
+ return 0;
+}
+
+static int jz4740_freq_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
+{
+ struct cpufreq_frequency_table *table = &jz4740_freq_info.table[0];
+ struct cpufreq_freqs freqs;
+ unsigned int new_index = 0;
+ unsigned int old_pll = clk_get_rate(pll) / 1000;
+ unsigned int new_pll = jz4740_freq_info.pll_rate;
+ int ret = 0;
+
+ if (cpufreq_frequency_table_target(policy, table,
+ target_freq, relation, &new_index))
+ return -EINVAL;
+ freqs = (struct cpufreq_freqs) {
+ .old = jz4740_freq_get(policy->cpu),
+ .new = table[new_index].frequency,
+ .cpu = policy->cpu,
+ .flags = cpufreq_jz4740_driver.flags,
+ };
+ if (freqs.new != freqs.old || new_pll != old_pll) {
+ unsigned int cdiv, hdiv, mdiv, pdiv;
+ cdiv = jz4740_freq_cpu_divs[new_index];
+ hdiv = (cdiv == 3 || cdiv == 6) ? cdiv * 2 : cdiv * 3;
+ while (new_pll < HCLK_MIN * hdiv)
+ hdiv -= cdiv;
+ mdiv = hdiv;
+ if (new_pll > MCLK_MAX * mdiv) {
+ /* 4,4 performs better than 3,6 */
+ if (new_pll > MCLK_MAX * 4)
+ mdiv *= 2;
+ else
+ hdiv = mdiv = cdiv * 4;
+ }
+ pdiv = mdiv;
+ dprintk(KERN_INFO "%s: cclk %p, setting from %d to %d, "
+ "dividers %d, %d, %d, %d\n",
+ __FUNCTION__, cclk, freqs.old, freqs.new,
+ cdiv, hdiv, mdiv, pdiv);
+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+ ret = clk_main_set_dividers(new_pll == old_pll,
+ cdiv, hdiv, mdiv, pdiv);
+ if (ret) {
+ dprintk(KERN_INFO "failed to set dividers\n");
+ } else if (new_pll != old_pll) {
+ dprintk(KERN_INFO "%s: pll %p, setting from %d to %d\n",
+ __FUNCTION__, pll, old_pll, new_pll);
+ ret = clk_set_rate(pll, new_pll * 1000);
+ }
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+ }
+
+ return ret;
+}
+
+static int jz4740_cpufreq_driver_init(struct cpufreq_policy *policy)
+{
+ int ret;
+
+ dprintk(KERN_INFO "Jz4740 cpufreq driver\n");
+
+ if (policy->cpu != 0)
+ return -EINVAL;
+
+ pll = clk_get(NULL, "pll");
+ if (IS_ERR(pll)) {
+ ret = PTR_ERR(pll);
+ goto err_exit;
+ }
+
+ cclk = clk_get(NULL, "cclk");
+ if (IS_ERR(cclk)) {
+ ret = PTR_ERR(cclk);
+ goto err_clk_put_pll;
+ }
+
+ policy->cpuinfo.min_freq = HCLK_MIN;
+ policy->cpuinfo.max_freq = 500000;
+ policy->cpuinfo.transition_latency = 100000; /* in nanoseconds */
+ policy->cur = jz4740_freq_get(policy->cpu);
+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+ /* min and max are set by jz4740_freq_fill_table() */
+
+ jz4740_freq_fill_table(policy, clk_get_rate(pll) / 1000 /* in kHz */);
+
+ return 0;
+
+err_clk_put_pll:
+ clk_put(pll);
+err_exit:
+ return ret;
+}
+
+static struct cpufreq_driver cpufreq_jz4740_driver = {
+ .init = jz4740_cpufreq_driver_init,
+ .verify = jz4740_freq_verify,
+ .target = jz4740_freq_target,
+ .get = jz4740_freq_get,
+ .name = "jz4740",
+};
+
+static int __init jz4740_cpufreq_init(void)
+{
+ return cpufreq_register_driver(&cpufreq_jz4740_driver);
+}
+
+static void __exit jz4740_cpufreq_exit(void)
+{
+ cpufreq_unregister_driver(&cpufreq_jz4740_driver);
+}
+
+module_init(jz4740_cpufreq_init);
+module_exit(jz4740_cpufreq_exit);
+
+MODULE_AUTHOR("Ulrich Hecht <ulrich.hecht@gmail.com>, "
+ "Maarten ter Huurne <maarten@treewalker.org>");
+MODULE_DESCRIPTION("cpufreq driver for Jz4740");
+MODULE_LICENSE("GPL");
--- a/arch/mips/kernel/cpufreq/Kconfig
+++ b/arch/mips/kernel/cpufreq/Kconfig
@@ -8,7 +8,7 @@ config MIPS_EXTERNAL_TIMER
config MIPS_CPUFREQ
bool
default y
- depends on CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
+ depends on CPU_SUPPORTS_CPUFREQ
if MIPS_CPUFREQ
@@ -24,6 +24,7 @@ config LOONGSON2_CPUFREQ
tristate "Loongson2 CPUFreq Driver"
select CPU_FREQ_TABLE
depends on MIPS_CPUFREQ
+ depends on MIPS_EXTERNAL_TIMER
help
This option adds a CPUFreq driver for loongson processors which
support software configurable cpu frequency.
@@ -34,6 +35,16 @@ config LOONGSON2_CPUFREQ
If in doubt, say N.
+config CPU_FREQ_JZ
+ tristate "CPUfreq driver for JZ CPUs"
+ select CPU_FREQ_TABLE
+ depends on MACH_JZ4740
+ default n
+ help
+ This enables the CPUfreq driver for JZ CPUs.
+
+ If in doubt, say N.
+
endif # CPU_FREQ
endmenu

129
target/linux/xburst/patches-3.2/0013-MMC-JZ4740-Added-support-for-CPU-frequency-changing.patch
View File

@ -1,129 +0,0 @@
From b95144c1b702f98c7902c75beb83f323701eb7c5 Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Sun, 19 Jun 2011 10:57:18 +0200
Subject: [PATCH 13/21] MMC: JZ4740: Added support for CPU frequency changing.
The MSC device clock is stopped before the frequency change.
After the change a new divider is computed and the clock is restarted.
Also the frequency change is postponed if an I/O operation is in progress.
---
drivers/mmc/host/jz4740_mmc.c | 69 +++++++++++++++++++++++++++++++++++++++-
1 files changed, 67 insertions(+), 2 deletions(-)
--- a/drivers/mmc/host/jz4740_mmc.c
+++ b/drivers/mmc/host/jz4740_mmc.c
@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/scatterlist.h>
#include <linux/clk.h>
+#include <linux/cpufreq.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
@@ -685,6 +686,60 @@ static void jz4740_mmc_enable_sdio_irq(s
jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_SDIO, enable);
}
+#ifdef CONFIG_CPU_FREQ
+
+static struct jz4740_mmc_host *cpufreq_host;
+
+static int jz4740_mmc_cpufreq_transition(struct notifier_block *nb,
+ unsigned long val, void *data)
+{
+ /* TODO: We only have to take action when the PLL freq changes:
+ the main dividers have no influence on the MSC device clock. */
+
+ if (val == CPUFREQ_PRECHANGE) {
+ mmc_claim_host(cpufreq_host->mmc);
+ clk_disable(cpufreq_host->clk);
+ } else if (val == CPUFREQ_POSTCHANGE) {
+ struct mmc_ios *ios = &cpufreq_host->mmc->ios;
+ if (ios->clock)
+ jz4740_mmc_set_clock_rate(cpufreq_host, ios->clock);
+ if (ios->power_mode != MMC_POWER_OFF)
+ clk_enable(cpufreq_host->clk);
+ mmc_release_host(cpufreq_host->mmc);
+ }
+ return 0;
+}
+
+static struct notifier_block jz4740_mmc_cpufreq_nb = {
+ .notifier_call = jz4740_mmc_cpufreq_transition,
+};
+
+static inline int jz4740_mmc_cpufreq_register(struct jz4740_mmc_host *host)
+{
+ cpufreq_host = host;
+ return cpufreq_register_notifier(&jz4740_mmc_cpufreq_nb,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+static inline void jz4740_mmc_cpufreq_unregister(void)
+{
+ cpufreq_unregister_notifier(&jz4740_mmc_cpufreq_nb,
+ CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+#else
+
+static inline int jz4740_mmc_cpufreq_register(struct jz4740_mmc_host *host)
+{
+ return 0;
+}
+
+static inline void jz4740_mmc_cpufreq_unregister(void)
+{
+}
+
+#endif
+
static const struct mmc_host_ops jz4740_mmc_ops = {
.request = jz4740_mmc_request,
.set_ios = jz4740_mmc_set_ios,
@@ -834,11 +889,18 @@ static int __devinit jz4740_mmc_probe(st
goto err_free_host;
}
+ ret = jz4740_mmc_cpufreq_register(host);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Failed to register cpufreq transition notifier\n");
+ goto err_clk_put;
+ }
+
host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!host->mem) {
ret = -ENOENT;
dev_err(&pdev->dev, "Failed to get base platform memory\n");
- goto err_clk_put;
+ goto err_cpufreq_unreg;
}
host->mem = request_mem_region(host->mem->start,
@@ -846,7 +908,7 @@ static int __devinit jz4740_mmc_probe(st
if (!host->mem) {
ret = -EBUSY;
dev_err(&pdev->dev, "Failed to request base memory region\n");
- goto err_clk_put;
+ goto err_cpufreq_unreg;
}
host->base = ioremap_nocache(host->mem->start, resource_size(host->mem));
@@ -929,6 +991,8 @@ err_iounmap:
iounmap(host->base);
err_release_mem_region:
release_mem_region(host->mem->start, resource_size(host->mem));
+err_cpufreq_unreg:
+ jz4740_mmc_cpufreq_unregister();
err_clk_put:
clk_put(host->clk);
err_free_host:
@@ -958,6 +1022,7 @@ static int __devexit jz4740_mmc_remove(s
iounmap(host->base);
release_mem_region(host->mem->start, resource_size(host->mem));
+ jz4740_mmc_cpufreq_unregister();
clk_put(host->clk);
platform_set_drvdata(pdev, NULL);

91
target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch
View File

@ -1,91 +0,0 @@
From 2dcb0ca66d0bffc23d5f001fad81fb1a7a2c371b Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Tue, 28 Jun 2011 22:28:59 +0200
Subject: [PATCH 14/21] MIPS: JZ4740: reset: Initialize hibernate wakeup
counters.
In hibernation mode only the wakeup logic and the RTC are left running,
so this is what users perceive as power down.
If the counters are not initialized, the corresponding pin (typically
connected to the power button) has to be asserted for two seconds
before the device wakes up. Most users expect a shorter wakeup time.
I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for
the Dingoo A320 kernel.
---
arch/mips/jz4740/reset.c | 46 ++++++++++++++++++++++++++++++++++++++++------
1 files changed, 40 insertions(+), 6 deletions(-)
--- a/arch/mips/jz4740/reset.c
+++ b/arch/mips/jz4740/reset.c
@@ -21,6 +21,9 @@
#include <asm/mach-jz4740/base.h>
#include <asm/mach-jz4740/timer.h>
+#include "reset.h"
+#include "clock.h"
+
static void jz4740_halt(void)
{
while (1) {
@@ -53,21 +56,52 @@ static void jz4740_restart(char *command
jz4740_halt();
}
-#define JZ_REG_RTC_CTRL 0x00
-#define JZ_REG_RTC_HIBERNATE 0x20
-
-#define JZ_RTC_CTRL_WRDY BIT(7)
+#define JZ_REG_RTC_CTRL 0x00
+#define JZ_REG_RTC_HIBERNATE 0x20
+#define JZ_REG_RTC_WAKEUP_FILTER 0x24
+#define JZ_REG_RTC_RESET_COUNTER 0x28
+
+#define JZ_RTC_CTRL_WRDY BIT(7)
+#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0
+#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0
-static void jz4740_power_off(void)
+static inline void jz4740_rtc_wait_ready(void __iomem *rtc_base)
{
- void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x24);
uint32_t ctrl;
-
do {
ctrl = readl(rtc_base + JZ_REG_RTC_CTRL);
} while (!(ctrl & JZ_RTC_CTRL_WRDY));
+}
+static void jz4740_power_off(void)
+{
+ void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);
+ unsigned long long wakeup_filter_ticks;
+ unsigned long long reset_counter_ticks;
+
+ /* Set minimum wakeup pin assertion time: 100 ms.
+ Range is 0 to 2 sec if RTC is clocked at 32 kHz. */
+ wakeup_filter_ticks = (100 * jz4740_clock_bdata.rtc_rate) / 1000;
+ if (wakeup_filter_ticks < JZ_RTC_WAKEUP_FILTER_MASK)
+ wakeup_filter_ticks &= JZ_RTC_WAKEUP_FILTER_MASK;
+ else
+ wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
+ jz4740_rtc_wait_ready(rtc_base);
+ writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER);
+
+ /* Set reset pin low-level assertion time after wakeup: 60 ms.
+ Range is 0 to 125 ms if RTC is clocked at 32 kHz. */
+ reset_counter_ticks = (60 * jz4740_clock_bdata.rtc_rate) / 1000;
+ if (reset_counter_ticks < JZ_RTC_RESET_COUNTER_MASK)
+ reset_counter_ticks &= JZ_RTC_RESET_COUNTER_MASK;
+ else
+ reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK;
+ jz4740_rtc_wait_ready(rtc_base);
+ writel(reset_counter_ticks, rtc_base + JZ_REG_RTC_RESET_COUNTER);
+
+ jz4740_rtc_wait_ready(rtc_base);
writel(1, rtc_base + JZ_REG_RTC_HIBERNATE);
+
jz4740_halt();
}

31
target/linux/xburst/patches-3.2/0015-ASoC-JZ4740-Replaced-comma-operators-with-semicolons.patch
View File

@ -1,31 +0,0 @@
From 515f8006c03e1065bf98c9148a9ea787e2d120d3 Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Wed, 10 Aug 2011 00:20:16 +0200
Subject: [PATCH 15/21] ASoC: JZ4740: Replaced comma operators with
semicolons.
They were harmless but also unnecessary, probably a leftover from earlier code.
---
sound/soc/jz4740/jz4740-i2s.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -346,7 +346,7 @@ static void jz4740_i2c_init_pcm_config(s
/* Playback */
dma_config = &i2s->pcm_config_playback.dma_config;
- dma_config->src_width = JZ4740_DMA_WIDTH_32BIT,
+ dma_config->src_width = JZ4740_DMA_WIDTH_32BIT;
dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
dma_config->request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT;
dma_config->flags = JZ4740_DMA_SRC_AUTOINC;
@@ -355,7 +355,7 @@ static void jz4740_i2c_init_pcm_config(s
/* Capture */
dma_config = &i2s->pcm_config_capture.dma_config;
- dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT,
+ dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT;
dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
dma_config->request_type = JZ4740_DMA_TYPE_AIC_RECEIVE;
dma_config->flags = JZ4740_DMA_DST_AUTOINC;

89
target/linux/xburst/patches-3.2/0016-ASoC-JZ4740-Support-buffer-size-that-is-not-a-multip.patch
View File

@ -1,89 +0,0 @@
From 8a5087fe59e31efb8641e704058328997c3c8ff1 Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Wed, 10 Aug 2011 00:25:11 +0200
Subject: [PATCH 16/21] ASoC: JZ4740: Support buffer size that is not a
multiple of period size.
This fixes glitches triggered by libao, which sets time-based intervals
instead of byte-based intervals like SDL does.
Thanks to Paul Cercueil for figuring out that the buffer size was causing
the glitches and to Lars Clausen for helping me write the fix.
---
sound/soc/jz4740/jz4740-pcm.c | 21 ++++++++++++++++++---
1 files changed, 18 insertions(+), 3 deletions(-)
--- a/sound/soc/jz4740/jz4740-pcm.c
+++ b/sound/soc/jz4740/jz4740-pcm.c
@@ -31,6 +31,7 @@
struct jz4740_runtime_data {
unsigned long dma_period;
+ unsigned long dma_period_left;
dma_addr_t dma_start;
dma_addr_t dma_pos;
dma_addr_t dma_end;
@@ -67,10 +68,13 @@ static void jz4740_pcm_start_transfer(st
if (prtd->dma_pos == prtd->dma_end)
prtd->dma_pos = prtd->dma_start;
- if (prtd->dma_pos + prtd->dma_period > prtd->dma_end)
+ if (prtd->dma_period_left == 0)
+ prtd->dma_period_left = prtd->dma_period;
+
+ if (prtd->dma_pos + prtd->dma_period_left > prtd->dma_end)
count = prtd->dma_end - prtd->dma_pos;
else
- count = prtd->dma_period;
+ count = prtd->dma_period_left;
jz4740_dma_disable(prtd->dma);
@@ -85,6 +89,7 @@ static void jz4740_pcm_start_transfer(st
jz4740_dma_set_transfer_count(prtd->dma, count);
prtd->dma_pos += count;
+ prtd->dma_period_left -= count;
jz4740_dma_enable(prtd->dma);
}
@@ -96,7 +101,8 @@ static void jz4740_pcm_dma_transfer_done
struct snd_pcm_runtime *runtime = substream->runtime;
struct jz4740_runtime_data *prtd = runtime->private_data;
- snd_pcm_period_elapsed(substream);
+ if (prtd->dma_period_left == 0)
+ snd_pcm_period_elapsed(substream);
jz4740_pcm_start_transfer(prtd, substream);
}
@@ -133,6 +139,7 @@ static int jz4740_pcm_hw_params(struct s
runtime->dma_bytes = params_buffer_bytes(params);
prtd->dma_period = params_period_bytes(params);
+ prtd->dma_period_left = 0;
prtd->dma_start = runtime->dma_addr;
prtd->dma_pos = prtd->dma_start;
prtd->dma_end = prtd->dma_start + runtime->dma_bytes;
@@ -160,6 +167,7 @@ static int jz4740_pcm_prepare(struct snd
if (!prtd->dma)
return -EBUSY;
+ prtd->dma_period_left = 0;
prtd->dma_pos = prtd->dma_start;
return 0;
@@ -219,6 +227,13 @@ static int jz4740_pcm_open(struct snd_pc
if (prtd == NULL)
return -ENOMEM;
+ /* Force period and buffer size to be a multiple of the DMA transfer
+ * size, which is 16 bytes. */
+ snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 16);
+ snd_pcm_hw_constraint_step(runtime, 0,
+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 16);
+
snd_soc_set_runtime_hwparams(substream, &jz4740_pcm_hardware);
runtime->private_data = prtd;

21
target/linux/xburst/patches-3.2/0017-MIPS-JZ4740-qi_lb60-Look-for-NAND-chip-in-bank-1.patch
View File

@ -1,21 +0,0 @@
From cdb15b56aa9517a8cdbd14724088227514622a1b Mon Sep 17 00:00:00 2001
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Wed, 11 Jan 2012 22:36:03 +0100
Subject: [PATCH 17/21] MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.
All NanoNotes have their NAND in bank 1.
Specifying the bank is required since commit e7ca5a665877a030.
---
arch/mips/jz4740/board-qi_lb60.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -140,6 +140,7 @@ static void qi_lb60_nand_ident(struct pl
static struct jz_nand_platform_data qi_lb60_nand_pdata = {
.ident_callback = qi_lb60_nand_ident,
.busy_gpio = 94,
+ .banks = { 1 },
};
/* Keyboard*/

121
target/linux/xburst/patches-3.2/0018-ASoC-jz4740-Convert-qi_lb60-to-use-snd_soc_register_.patch
View File

@ -1,121 +0,0 @@
From 94f2b91d2a42854a8869d54a758bc88757d7f6d9 Mon Sep 17 00:00:00 2001
From: Axel Lin <axel.lin@gmail.com>
Date: Fri, 6 Jan 2012 11:30:10 +0800
Subject: [PATCH 18/21] ASoC: jz4740: Convert qi_lb60 to use
snd_soc_register_card()
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
---
arch/mips/jz4740/board-qi_lb60.c | 6 ++++
sound/soc/jz4740/qi_lb60.c | 56 +++++++++++++++++--------------------
2 files changed, 32 insertions(+), 30 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -418,6 +418,11 @@ static struct platform_device qi_lb60_ch
},
};
+/* audio */
+static struct platform_device qi_lb60_audio_device = {
+ .name = "qi-lb60-audio",
+ .id = -1,
+};
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_udc_device,
@@ -434,6 +439,7 @@ static struct platform_device *jz_platfo
&qi_lb60_gpio_keys,
&qi_lb60_pwm_beeper,
&qi_lb60_charger_device,
+ &qi_lb60_audio_device,
};
static void __init board_gpio_setup(void)
--- a/sound/soc/jz4740/qi_lb60.c
+++ b/sound/soc/jz4740/qi_lb60.c
@@ -90,56 +90,52 @@ static struct snd_soc_card qi_lb60 = {
.num_dapm_routes = ARRAY_SIZE(qi_lb60_routes),
};
-static struct platform_device *qi_lb60_snd_device;
-
static const struct gpio qi_lb60_gpios[] = {
{ QI_LB60_SND_GPIO, GPIOF_OUT_INIT_LOW, "SND" },
{ QI_LB60_AMP_GPIO, GPIOF_OUT_INIT_LOW, "AMP" },
};
-static int __init qi_lb60_init(void)
+static int __devinit qi_lb60_probe(struct platform_device *pdev)
{
+ struct snd_soc_card *card = &qi_lb60;
int ret;
- qi_lb60_snd_device = platform_device_alloc("soc-audio", -1);
-
- if (!qi_lb60_snd_device)
- return -ENOMEM;
-
ret = gpio_request_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
- if (ret) {
- pr_err("qi_lb60 snd: Failed to request gpios: %d\n", ret);
- goto err_device_put;
- }
+ if (ret)
+ return ret;
- platform_set_drvdata(qi_lb60_snd_device, &qi_lb60);
+ card->dev = &pdev->dev;
- ret = platform_device_add(qi_lb60_snd_device);
+ ret = snd_soc_register_card(card);
if (ret) {
- pr_err("qi_lb60 snd: Failed to add snd soc device: %d\n", ret);
- goto err_unset_pdata;
+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
+ ret);
+ gpio_free_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
}
-
- return 0;
-
-err_unset_pdata:
- platform_set_drvdata(qi_lb60_snd_device, NULL);
-/*err_gpio_free_array:*/
- gpio_free_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
-err_device_put:
- platform_device_put(qi_lb60_snd_device);
-
return ret;
}
-module_init(qi_lb60_init);
-static void __exit qi_lb60_exit(void)
+static int __devexit qi_lb60_remove(struct platform_device *pdev)
{
- platform_device_unregister(qi_lb60_snd_device);
+ struct snd_soc_card *card = platform_get_drvdata(pdev);
+
+ snd_soc_unregister_card(card);
gpio_free_array(qi_lb60_gpios, ARRAY_SIZE(qi_lb60_gpios));
+ return 0;
}
-module_exit(qi_lb60_exit);
+
+static struct platform_driver qi_lb60_driver = {
+ .driver = {
+ .name = "qi-lb60-audio",
+ .owner = THIS_MODULE,
+ },
+ .probe = qi_lb60_probe,
+ .remove = __devexit_p(qi_lb60_remove),
+};
+
+module_platform_driver(qi_lb60_driver);
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_DESCRIPTION("ALSA SoC QI LB60 Audio support");
MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:qi-lb60-audio");

38
target/linux/xburst/patches-3.2/0019-Framebuffer-notifier-Call-notifier-callbacks-prior-t.patch
View File

@ -1,38 +0,0 @@
From 159c4d81899db05a57bc4a0d55083e484c3d8a43 Mon Sep 17 00:00:00 2001
From: Lars-Peter Clausen <lars@metafoo.de>
Date: Sat, 24 Apr 2010 12:23:28 +0200
Subject: [PATCH 19/21] Framebuffer notifier: Call notifier callbacks prior to
blanking the screen
---
drivers/video/fbmem.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -1032,12 +1032,12 @@ fb_set_var(struct fb_info *info, struct
int
fb_blank(struct fb_info *info, int blank)
{
- int ret = -EINVAL;
+ int ret = 0;
if (blank > FB_BLANK_POWERDOWN)
blank = FB_BLANK_POWERDOWN;
- if (info->fbops->fb_blank)
+ if (info->fbops->fb_blank && blank == FB_BLANK_UNBLANK)
ret = info->fbops->fb_blank(blank, info);
if (!ret) {
@@ -1048,6 +1048,10 @@ fb_blank(struct fb_info *info, int blank
fb_notifier_call_chain(FB_EVENT_BLANK, &event);
}
+ if (info->fbops->fb_blank && blank != FB_BLANK_UNBLANK)
+ ret = info->fbops->fb_blank(blank, info);
+
+
return ret;
}

26
target/linux/xburst/patches-3.2/0020-qi_lb60-NAND-add-data-partition.patch
View File

@ -1,26 +0,0 @@
From 1d7ef3445db5aebf48c90b20e18630633623c750 Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu@macbook.(none)>
Date: Fri, 19 Aug 2011 15:46:52 +0800
Subject: [PATCH 20/21] qi_lb60: NAND: add data partition
---
arch/mips/jz4740/board-qi_lb60.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -118,8 +118,13 @@ static struct mtd_partition qi_lb60_part
{
.name = "NAND ROOTFS partition",
.offset = 8 * 0x100000,
- .size = (504 + 512 + 1024) * 0x100000,
+ .size = 512 * 0x100000,
},
+ {
+ .name = "NAND DATA partition",
+ .offset = 520 * 0x100000,
+ .size = 1528 * 0x100000,
+ },
};
static void qi_lb60_nand_ident(struct platform_device *pdev,

20
target/linux/xburst/patches-3.2/0021-rtc-jz4740-fix-hwclock-give-time-out.patch
View File

@ -1,20 +0,0 @@
From a37ca6eb8cb52d620feff3323a3be4da24f5bee8 Mon Sep 17 00:00:00 2001
From: Xiangfu <xiangfu@openmobilefree.net>
Date: Fri, 16 Mar 2012 17:48:45 +0800
Subject: [PATCH 21/21] rtc: jz4740 fix hwclock give time out
---
drivers/rtc/rtc-jz4740.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -280,6 +280,8 @@ static int __devinit jz4740_rtc_probe(st
}
}
+ jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_1HZ_IRQ, 1);
+
return 0;
err_free_irq:

94
target/linux/xburst/qi_lb60/config-3.2
View File

@ -1,94 +0,0 @@
CONFIG_DEVMEM=y
CONFIG_FB_JZ4740=y
# CONFIG_FB_TMIO is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_INPUT_PWM_BEEPER=y
CONFIG_JZ4740_QI_LB60=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_MATRIX=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
# CONFIG_LOGO_OPENWRT_CLUT224 is not set
CONFIG_LOGO_NANONOTE_CLUT224=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_HWDEP=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
# CONFIG_SND_RAWMIDI_SEQ is not set
CONFIG_SND_SOC=y
CONFIG_SND_JZ4740_SOC=y
CONFIG_SND_JZ4740_SOC_QI_LB60=y
CONFIG_SND_JZ4740_SOC_I2S=y
CONFIG_SND_SOC_I2C_AND_SPI=y
CONFIG_SND_SOC_JZCODEC=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
# CONFIG_SND_VIRMIDI is not set
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
# CONFIG_SND_SEQUENCER_OSS is not set
# CONFIG_IEEE802154 is not set
# CONFIG_IEEE802154_6LOWPAN is not set
# CONFIG_MAC802154 is not set
# CONFIG_MAC802154_DEBUG is not set
# CONFIG_IEEE802154_DRIVER_DEBUG is not set
# CONFIG_IEEE802154_DRIVER is not set
# CONFIG_IEEE802154_SERIAL is not set
# CONFIG_SPI_ATUSB is not set
# CONFIG_SPI_ATBEN is not set
# CONFIG_IEEE802154_AT86RF230 is not set
# CONFIG_IEEE802154_FAKEHARD is not set
# CONFIG_IEEE802154_FAKELB is not set
# CONFIG_IEEE802154_CC2420 is not set
# CONFIG_IEEE802154_ADF7242 is not set
# CONFIG_SENSORS_JZ4740 is not set
CONFIG_LCD_CLASS_DEVICE=y
# CONFIG_LCD_L4F00242T03 is not set
# CONFIG_LCD_LMS283GF05 is not set
# CONFIG_LCD_LTV350QV is not set
CONFIG_LCD_ILI8960=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
# CONFIG_BACKLIGHT_GENERIC is not set
# CONFIG_BACKLIGHT_PWM is not set
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
# CONFIG_LCD_TDO24M is not set
# CONFIG_LCD_VGG2432A4 is not set
# CONFIG_LCD_PLATFORM is not set
# CONFIG_USB_RENESAS_USBHS is not set
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
# CONFIG_USB_GADGET_DEBUG_FS is not set
CONFIG_USB_GADGET_VBUS_DRAW=2
CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
# CONFIG_USB_FUSB300 is not set
CONFIG_USB_JZ4740=y
# CONFIG_USB_R8A66597 is not set
# CONFIG_USB_M66592 is not set
# CONFIG_USB_NET2272 is not set
CONFIG_USB_GADGET_DUALSPEED=y
# CONFIG_USB_ZERO is not set
# CONFIG_USB_AUDIO is not set
CONFIG_USB_ETH=y
# CONFIG_USB_ETH_EEM is not set
# CONFIG_USB_ETH_RNDIS is not set