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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-27 21:44:04 +02:00

brcm47xx: refresh patches

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21543 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
hauke 2010-05-23 13:17:56 +00:00
parent f7999a72e6
commit 219280afea
14 changed files with 48 additions and 48 deletions

View File

@ -29,7 +29,7 @@
depends on USB
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1141,8 +1141,16 @@ MODULE_LICENSE ("GPL");
@@ -1142,8 +1142,16 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_atmel_driver
#endif

View File

@ -5,7 +5,7 @@ This prevents the options from being delete with make kernel_oldconfig.
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -140,6 +140,8 @@ config SSB_DRIVER_MIPS
@@ -141,6 +141,8 @@ config SSB_DRIVER_MIPS
config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS

View File

@ -181,7 +181,7 @@
if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) {
/* All of this garbage is because when using non-tagged
* IRQ status the mailbox/status_block protocol the chip
@@ -9800,6 +9856,11 @@ static int tg3_test_nvram(struct tg3 *tp
@@ -9801,6 +9857,11 @@ static int tg3_test_nvram(struct tg3 *tp
if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
return 0;
@ -193,7 +193,7 @@
if (tg3_nvram_read(tp, 0, &magic) != 0)
return -EIO;
@@ -10594,7 +10655,7 @@ static int tg3_ioctl(struct net_device *
@@ -10595,7 +10656,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -202,7 +202,7 @@
spin_unlock_bh(&tp->lock);
data->val_out = mii_regval;
@@ -10610,7 +10671,7 @@ static int tg3_ioctl(struct net_device *
@@ -10611,7 +10672,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -211,7 +211,7 @@
spin_unlock_bh(&tp->lock);
return err;
@@ -11255,6 +11316,12 @@ static void __devinit tg3_get_5717_nvram
@@ -11256,6 +11317,12 @@ static void __devinit tg3_get_5717_nvram
/* Chips other than 5700/5701 use the NVRAM for fetching info. */
static void __devinit tg3_nvram_init(struct tg3 *tp)
{
@ -224,7 +224,7 @@
tw32_f(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD <<
@@ -11515,6 +11582,9 @@ static int tg3_nvram_write_block(struct
@@ -11516,6 +11583,9 @@ static int tg3_nvram_write_block(struct
{
int ret;
@ -234,7 +234,7 @@
if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
~GRC_LCLCTRL_GPIO_OUTPUT1);
@@ -12800,6 +12870,11 @@ static int __devinit tg3_get_invariants(
@@ -12801,6 +12871,11 @@ static int __devinit tg3_get_invariants(
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
@ -246,7 +246,7 @@
/* Get eeprom hw config before calling tg3_set_power_state().
* In particular, the TG3_FLG2_IS_NIC flag must be
* determined before calling tg3_set_power_state() so that
@@ -13189,6 +13264,10 @@ static int __devinit tg3_get_device_addr
@@ -13190,6 +13265,10 @@ static int __devinit tg3_get_device_addr
}
if (!is_valid_ether_addr(&dev->dev_addr[0])) {
@ -257,7 +257,7 @@
#ifdef CONFIG_SPARC
if (!tg3_get_default_macaddr_sparc(tp))
return 0;
@@ -13681,6 +13760,7 @@ static char * __devinit tg3_phy_string(s
@@ -13682,6 +13761,7 @@ static char * __devinit tg3_phy_string(s
case PHY_ID_BCM5704: return "5704";
case PHY_ID_BCM5705: return "5705";
case PHY_ID_BCM5750: return "5750";
@ -265,7 +265,7 @@
case PHY_ID_BCM5752: return "5752";
case PHY_ID_BCM5714: return "5714";
case PHY_ID_BCM5780: return "5780";
@@ -13892,6 +13972,13 @@ static int __devinit tg3_init_one(struct
@@ -13893,6 +13973,13 @@ static int __devinit tg3_init_one(struct
tp->msg_enable = tg3_debug;
else
tp->msg_enable = TG3_DEF_MSG_ENABLE;

View File

@ -29,7 +29,7 @@
depends on USB
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1158,8 +1158,16 @@ MODULE_LICENSE ("GPL");
@@ -1159,8 +1159,16 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_atmel_driver
#endif

View File

@ -5,7 +5,7 @@ This prevents the options from being delete with make kernel_oldconfig.
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -140,6 +140,8 @@ config SSB_DRIVER_MIPS
@@ -141,6 +141,8 @@ config SSB_DRIVER_MIPS
config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS

View File

@ -8,7 +8,7 @@
#include <asm/io.h>
extern void build_clear_page(void);
@@ -78,13 +79,16 @@ static inline void clear_user_page(void
@@ -78,13 +79,16 @@ static inline void clear_user_page(void
flush_data_cache_page((unsigned long)addr);
}

View File

@ -8,7 +8,7 @@
#include <net/checksum.h>
#include <net/ip.h>
@@ -466,8 +467,9 @@ static void _tw32_flush(struct tg3 *tp,
@@ -466,8 +467,9 @@ static void _tw32_flush(struct tg3 *tp,
static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val)
{
tp->write32_mbox(tp, off, val);
@ -61,7 +61,7 @@
{
u32 frame_val;
unsigned int loops;
@@ -842,7 +849,7 @@ static int tg3_writephy(struct tg3 *tp,
@@ -842,7 +849,7 @@ static int tg3_writephy(struct tg3 *tp,
udelay(80);
}
@ -70,7 +70,7 @@
MI_COM_PHY_ADDR_MASK);
frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
MI_COM_REG_ADDR_MASK);
@@ -875,6 +882,11 @@ static int tg3_writephy(struct tg3 *tp,
@@ -875,6 +882,11 @@ static int tg3_writephy(struct tg3 *tp,
return ret;
}
@ -147,7 +147,7 @@
tw32(GRC_MODE, tp->grc_mode);
if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
@@ -7089,9 +7127,12 @@ static int tg3_halt_cpu(struct tg3 *tp,
@@ -7089,9 +7127,12 @@ static int tg3_halt_cpu(struct tg3 *tp,
return -ENODEV;
}
@ -175,7 +175,7 @@
fw_data = (void *)tp->fw->data;
/* Firmware blob starts with version numbers, followed by
@@ -7213,6 +7259,11 @@ static int tg3_load_tso_firmware(struct
@@ -7213,6 +7259,11 @@ static int tg3_load_tso_firmware(struct
unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
int err, i;
@ -199,7 +199,7 @@
if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) {
/* All of this garbage is because when using non-tagged
* IRQ status the mailbox/status_block protocol the chip
@@ -10214,6 +10270,11 @@ static int tg3_test_nvram(struct tg3 *tp
@@ -10215,6 +10271,11 @@ static int tg3_test_nvram(struct tg3 *tp
if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
return 0;
@ -211,7 +211,7 @@
if (tg3_nvram_read(tp, 0, &magic) != 0)
return -EIO;
@@ -11014,7 +11075,7 @@ static int tg3_ioctl(struct net_device *
@@ -11015,7 +11076,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -220,7 +220,7 @@
spin_unlock_bh(&tp->lock);
data->val_out = mii_regval;
@@ -11030,7 +11091,7 @@ static int tg3_ioctl(struct net_device *
@@ -11031,7 +11092,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -229,7 +229,7 @@
spin_unlock_bh(&tp->lock);
return err;
@@ -11675,6 +11736,12 @@ static void __devinit tg3_get_5717_nvram
@@ -11676,6 +11737,12 @@ static void __devinit tg3_get_5717_nvram
/* Chips other than 5700/5701 use the NVRAM for fetching info. */
static void __devinit tg3_nvram_init(struct tg3 *tp)
{
@ -242,7 +242,7 @@
tw32_f(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD <<
@@ -11936,6 +12003,9 @@ static int tg3_nvram_write_block(struct
@@ -11937,6 +12004,9 @@ static int tg3_nvram_write_block(struct
{
int ret;
@ -252,7 +252,7 @@
if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
~GRC_LCLCTRL_GPIO_OUTPUT1);
@@ -13246,6 +13316,11 @@ static int __devinit tg3_get_invariants(
@@ -13247,6 +13317,11 @@ static int __devinit tg3_get_invariants(
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
@ -264,7 +264,7 @@
/* Get eeprom hw config before calling tg3_set_power_state().
* In particular, the TG3_FLG2_IS_NIC flag must be
* determined before calling tg3_set_power_state() so that
@@ -13637,6 +13712,10 @@ static int __devinit tg3_get_device_addr
@@ -13638,6 +13713,10 @@ static int __devinit tg3_get_device_addr
}
if (!is_valid_ether_addr(&dev->dev_addr[0])) {
@ -275,7 +275,7 @@
#ifdef CONFIG_SPARC
if (!tg3_get_default_macaddr_sparc(tp))
return 0;
@@ -14139,6 +14218,7 @@ static char * __devinit tg3_phy_string(s
@@ -14140,6 +14219,7 @@ static char * __devinit tg3_phy_string(s
case PHY_ID_BCM5704: return "5704";
case PHY_ID_BCM5705: return "5705";
case PHY_ID_BCM5750: return "5750";
@ -283,7 +283,7 @@
case PHY_ID_BCM5752: return "5752";
case PHY_ID_BCM5714: return "5714";
case PHY_ID_BCM5780: return "5780";
@@ -14351,6 +14431,13 @@ static int __devinit tg3_init_one(struct
@@ -14352,6 +14432,13 @@ static int __devinit tg3_init_one(struct
tp->msg_enable = tg3_debug;
else
tp->msg_enable = TG3_DEF_MSG_ENABLE;

View File

@ -28,7 +28,7 @@
dev_printk(KERN_INFO, &socket->dev->dev,
"ISA IRQ mask 0x%04x, PCI irq %d\n",
socket->socket.irq_mask, socket->cb_irq);
@@ -1243,6 +1250,15 @@ static int __devinit yenta_probe(struct
@@ -1243,6 +1250,15 @@ static int __devinit yenta_probe(struct
dev_printk(KERN_INFO, &dev->dev,
"Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));

View File

@ -8,7 +8,7 @@
select PCI_GT64XXX_PCI0
select MIPS_MSC
select SWAP_IO_SPACE
@@ -1560,13 +1559,6 @@ config IP22_CPU_SCACHE
@@ -1589,13 +1588,6 @@ config IP22_CPU_SCACHE
bool
select BOARD_SCACHE

View File

@ -345,7 +345,7 @@
}
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -801,6 +801,9 @@ static void __cpuinit build_r4000_tlb_re
@@ -868,6 +868,9 @@ static void __cpuinit build_r4000_tlb_re
/* No need for uasm_i_nop */
}
@ -355,7 +355,7 @@
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
@@ -1260,6 +1263,9 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -1318,6 +1321,9 @@ build_r4000_tlbchange_handler_head(u32 *
struct uasm_reloc **r, unsigned int pte,
unsigned int ptr)
{

View File

@ -29,7 +29,7 @@
depends on USB
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1158,8 +1158,16 @@ MODULE_LICENSE ("GPL");
@@ -1159,8 +1159,16 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_atmel_driver
#endif

View File

@ -5,7 +5,7 @@ This prevents the options from being delete with make kernel_oldconfig.
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -140,6 +140,8 @@ config SSB_DRIVER_MIPS
@@ -141,6 +141,8 @@ config SSB_DRIVER_MIPS
config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS

View File

@ -199,7 +199,7 @@
if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) {
/* All of this garbage is because when using non-tagged
* IRQ status the mailbox/status_block protocol the chip
@@ -10278,6 +10334,11 @@ static int tg3_test_nvram(struct tg3 *tp
@@ -10279,6 +10335,11 @@ static int tg3_test_nvram(struct tg3 *tp
if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
return 0;
@ -211,7 +211,7 @@
if (tg3_nvram_read(tp, 0, &magic) != 0)
return -EIO;
@@ -11097,7 +11158,7 @@ static int tg3_ioctl(struct net_device *
@@ -11098,7 +11159,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -220,7 +220,7 @@
spin_unlock_bh(&tp->lock);
data->val_out = mii_regval;
@@ -11113,7 +11174,7 @@ static int tg3_ioctl(struct net_device *
@@ -11114,7 +11175,7 @@ static int tg3_ioctl(struct net_device *
return -EAGAIN;
spin_lock_bh(&tp->lock);
@ -229,7 +229,7 @@
spin_unlock_bh(&tp->lock);
return err;
@@ -11758,6 +11819,12 @@ static void __devinit tg3_get_5717_nvram
@@ -11759,6 +11820,12 @@ static void __devinit tg3_get_5717_nvram
/* Chips other than 5700/5701 use the NVRAM for fetching info. */
static void __devinit tg3_nvram_init(struct tg3 *tp)
{
@ -242,7 +242,7 @@
tw32_f(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD <<
@@ -12019,6 +12086,9 @@ static int tg3_nvram_write_block(struct
@@ -12020,6 +12087,9 @@ static int tg3_nvram_write_block(struct
{
int ret;
@ -252,7 +252,7 @@
if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
~GRC_LCLCTRL_GPIO_OUTPUT1);
@@ -13359,6 +13429,11 @@ static int __devinit tg3_get_invariants(
@@ -13360,6 +13430,11 @@ static int __devinit tg3_get_invariants(
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
@ -264,7 +264,7 @@
/* Get eeprom hw config before calling tg3_set_power_state().
* In particular, the TG3_FLG2_IS_NIC flag must be
* determined before calling tg3_set_power_state() so that
@@ -13752,6 +13827,10 @@ static int __devinit tg3_get_device_addr
@@ -13753,6 +13828,10 @@ static int __devinit tg3_get_device_addr
}
if (!is_valid_ether_addr(&dev->dev_addr[0])) {
@ -275,7 +275,7 @@
#ifdef CONFIG_SPARC
if (!tg3_get_default_macaddr_sparc(tp))
return 0;
@@ -14271,6 +14350,7 @@ static char * __devinit tg3_phy_string(s
@@ -14272,6 +14351,7 @@ static char * __devinit tg3_phy_string(s
case TG3_PHY_ID_BCM5704: return "5704";
case TG3_PHY_ID_BCM5705: return "5705";
case TG3_PHY_ID_BCM5750: return "5750";
@ -283,7 +283,7 @@
case TG3_PHY_ID_BCM5752: return "5752";
case TG3_PHY_ID_BCM5714: return "5714";
case TG3_PHY_ID_BCM5780: return "5780";
@@ -14480,6 +14560,13 @@ static int __devinit tg3_init_one(struct
@@ -14481,6 +14561,13 @@ static int __devinit tg3_init_one(struct
tp->msg_enable = tg3_debug;
else
tp->msg_enable = TG3_DEF_MSG_ENABLE;

View File

@ -31,7 +31,7 @@
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -640,6 +640,9 @@ build_get_pgde32(u32 **p, unsigned int t
@@ -707,6 +707,9 @@ build_get_pgde32(u32 **p, unsigned int t
#endif
uasm_i_addu(p, ptr, tmp, ptr);
#else
@ -41,7 +41,7 @@
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -801,12 +804,12 @@ static void __cpuinit build_r4000_tlb_re
@@ -868,12 +871,12 @@ static void __cpuinit build_r4000_tlb_re
/* No need for uasm_i_nop */
}
@ -57,7 +57,7 @@
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -818,6 +821,9 @@ static void __cpuinit build_r4000_tlb_re
@@ -885,6 +888,9 @@ static void __cpuinit build_r4000_tlb_re
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
@ -67,7 +67,7 @@
uasm_i_eret(&p); /* return from trap */
#ifdef CONFIG_HUGETLB_PAGE
@@ -1263,12 +1269,12 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -1321,12 +1327,12 @@ build_r4000_tlbchange_handler_head(u32 *
struct uasm_reloc **r, unsigned int pte,
unsigned int ptr)
{
@ -83,7 +83,7 @@
build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
#endif
@@ -1305,6 +1311,9 @@ build_r4000_tlbchange_handler_tail(u32 *
@@ -1363,6 +1369,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_update_entries(p, tmp, ptr);
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);