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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-25 03:32:25 +02:00

[brcm63xx] more bcm63xx definition fixes, thanks AndyI

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17227 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian 2009-08-11 18:50:07 +00:00
parent 568f8e5113
commit 21b6860b2b
5 changed files with 12 additions and 10 deletions

View File

@ -149,6 +149,7 @@ static void usbs_set(struct clk *clk, int enable)
switch(bcm63xx_get_cpu_id()) {
case BCM6338_CPU_ID: mask = CKCTL_6338_USBS_EN; break;
case BCM6345_CPU_ID: mask = CKCTL_6345_USBS_EN; break;
case BCM6348_CPU_ID: mask = CKCTL_6348_USBS_EN; break;
default:
return;

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@ -115,6 +115,7 @@ static const int bcm96345_irqs[] = {
[IRQ_TIMER] = BCM_6345_TIMER_IRQ,
[IRQ_UART0] = BCM_6345_UART0_IRQ,
[IRQ_DSL] = BCM_6345_DSL_IRQ,
[IRQ_UDC0] = BCM_6345_UDC0_IRQ,
[IRQ_ENET0] = BCM_6345_ENET0_IRQ,
[IRQ_ENET_PHY] = BCM_6345_ENET_PHY_IRQ,
[IRQ_ENET0_RXDMA] = BCM_6345_ENET0_RXDMA_IRQ,

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@ -47,7 +47,7 @@ static struct platform_device bcm63xx_udc_device = {
int __init bcm63xx_udc_register(void)
{
if (!BCMCPU_IS_6338() && !BCMCPU_IS_6348())
if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
return 0;
udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);

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@ -129,10 +129,10 @@ enum bcm63xx_regs_set {
#define BCM_6338_UART0_BASE (0xfffe0300)
#define BCM_6338_GPIO_BASE (0xfffe0400)
#define BCM_6338_SPI_BASE (0xfffe0c00)
#define BCM_6338_UDC0_BASE (0xdeadbeef)
#define BCM_6338_UDC0_BASE (0xfffe3000)
#define BCM_6338_USBDMA_BASE (0xfffe2400)
#define BCM_6338_OHCI0_BASE (0xdeadbeef)
#define BCM_6338_OHCI_PRIV_BASE (0xfffe3000)
#define BCM_6338_OHCI_PRIV_BASE (0xdeadbeef)
#define BCM_6338_USBH_PRIV_BASE (0xdeadbeef)
#define BCM_6338_MPI_BASE (0xfffe3160)
#define BCM_6338_PCMCIA_BASE (0xdeadbeef)
@ -159,14 +159,14 @@ enum bcm63xx_regs_set {
#define BCM_6345_UART0_BASE (0xfffe0300)
#define BCM_6345_GPIO_BASE (0xfffe0400)
#define BCM_6345_SPI_BASE (0xdeadbeef)
#define BCM_6345_UDC0_BASE (0xdeadbeef)
#define BCM_6345_USBDMA_BASE (0xfffe2800)
#define BCM_6345_UDC0_BASE (0xfffe2100)
#define BCM_6345_USBDMA_BASE (0xfffe2b00)
#define BCM_6345_ENET0_BASE (0xfffe1800)
#define BCM_6345_ENETDMA_BASE (0xfffe2800)
#define BCM_6345_PCMCIA_BASE (0xfffe2028)
#define BCM_6345_MPI_BASE (0xdeadbeef)
#define BCM_6345_OHCI0_BASE (0xfffe2100)
#define BCM_6345_OHCI_PRIV_BASE (0xfffe2200)
#define BCM_6345_OHCI0_BASE (0xdeadbeef)
#define BCM_6345_OHCI_PRIV_BASE (0xdeadbeef)
#define BCM_6345_USBH_PRIV_BASE (0xdeadbeef)
#define BCM_6345_SDRAM_REGS_BASE (0xfffe2300)
#define BCM_6345_DSL_BASE (0xdeadbeef)
@ -598,7 +598,7 @@ enum bcm63xx_irq {
#define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
#define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
#define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4)
#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5)
#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5)
#define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
#define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
#define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)

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@ -35,10 +35,10 @@
#define CKCTL_6345_UART_EN (1 << 3)
#define CKCTL_6345_ADSLPHY_EN (1 << 4)
#define CKCTL_6345_ENET_EN (1 << 7)
#define CKCTL_6345_USBH_EN (1 << 8)
#define CKCTL_6345_USBS_EN (1 << 8)
#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_ENET_EN | \
CKCTL_6345_USBH_EN | \
CKCTL_6345_USBS_EN | \
CKCTL_6345_ADSLPHY_EN)
#define CKCTL_6348_ADSLPHY_EN (1 << 0)