mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-25 03:13:20 +02:00
fixes mdio, adds runtime board configuration for ifxmips
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11609 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
adde7768a2
commit
2cccfb6609
@ -34,17 +34,31 @@
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#include <asm/ifxmips/ifxmips.h>
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#include <asm/ifxmips/ifxmips_mii0.h>
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#define MAX_BOARD_NAME_LEN 32
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#define MAX_IFXMIPS_DEVS 9
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#define BOARD_DANUBE "Danube"
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#define BOARD_DANUBE_CHIPID 0x10129083
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#define SYSTEM_DANUBE "Danube"
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#define SYSTEM_DANUBE_CHIPID1 0x10129083
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#define SYSTEM_DANUBE_CHIPID2 0x3012B083
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#define BOARD_TWINPASS "Twinpass"
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#define BOARD_TWINPASS_CHIPID 0x3012D083
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#define SYSTEM_TWINPASS "Twinpass"
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#define SYSTEM_TWINPASS_CHIPID 0x3012D083
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extern int ifxmips_pci_external_clock;
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static unsigned int chiprev;
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static struct platform_device *ifxmips_devs[MAX_IFXMIPS_DEVS];
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static int cmdline_mac = 0;
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char board_name[MAX_BOARD_NAME_LEN + 1] = { 0 };
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struct ifxmips_board {
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char name[32];
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unsigned int system_type;
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struct platform_device *devs[MAX_IFXMIPS_DEVS];
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struct resource reset_resource;
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struct resource gpiodev_resource;
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int pci_external_clock;
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int num_devs;
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};
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spinlock_t ebu_lock = SPIN_LOCK_UNLOCKED;
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EXPORT_SYMBOL_GPL(ebu_lock);
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@ -52,42 +66,35 @@ EXPORT_SYMBOL_GPL(ebu_lock);
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static struct ifxmips_mac ifxmips_mii_mac;
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static struct platform_device
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ifxmips_led[] =
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ifxmips_led =
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{
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{
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.id = 0,
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.name = "ifxmips_led",
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},
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.id = 0,
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.name = "ifxmips_led",
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};
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static struct platform_device
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ifxmips_gpio[] =
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ifxmips_gpio =
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{
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{
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.id = 0,
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.name = "ifxmips_gpio",
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},
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.id = 0,
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.name = "ifxmips_gpio",
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.num_resources = 1,
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};
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static struct platform_device
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ifxmips_mii[] =
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ifxmips_mii =
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{
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{
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.id = 0,
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.name = "ifxmips_mii0",
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.dev = {
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.platform_data = &ifxmips_mii_mac,
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}
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},
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.id = 0,
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.name = "ifxmips_mii0",
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.dev = {
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.platform_data = &ifxmips_mii_mac,
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}
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};
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static struct platform_device
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ifxmips_wdt[] =
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ifxmips_wdt =
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{
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{
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.id = 0,
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.name = "ifxmips_wdt",
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},
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.id = 0,
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.name = "ifxmips_wdt",
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};
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static struct resource
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@ -98,39 +105,20 @@ ifxmips_mtd_resource = {
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};
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static struct platform_device
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ifxmips_mtd[] =
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ifxmips_mtd =
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{
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{
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.id = 0,
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.name = "ifxmips_mtd",
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.num_resources = 1,
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.resource = &ifxmips_mtd_resource,
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},
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};
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#ifdef CONFIG_GPIO_DEVICE
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static struct resource
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ifxmips_gpio_dev_resources[] = {
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{
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.name = "gpio",
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.flags = 0,
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.start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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.end = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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},
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.id = 0,
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.name = "ifxmips_mtd",
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.num_resources = 1,
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.resource = &ifxmips_mtd_resource,
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};
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static struct platform_device
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ifxmips_gpio_dev[] = {
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{
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.name = "GPIODEV",
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.id = -1,
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.num_resources = ARRAY_SIZE(ifxmips_gpio_dev_resources),
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.resource = ifxmips_gpio_dev_resources,
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}
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ifxmips_gpio_dev = {
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.name = "GPIODEV",
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.id = -1,
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.num_resources = 1,
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};
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#endif
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const char*
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get_system_type(void)
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@ -138,17 +126,36 @@ get_system_type(void)
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chiprev = ifxmips_r32(IFXMIPS_MPS_CHIPID);
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switch(chiprev)
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{
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case BOARD_DANUBE_CHIPID:
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return BOARD_DANUBE;
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case SYSTEM_DANUBE_CHIPID1:
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case SYSTEM_DANUBE_CHIPID2:
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return SYSTEM_DANUBE;
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case BOARD_TWINPASS_CHIPID:
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return BOARD_TWINPASS;
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case SYSTEM_TWINPASS_CHIPID:
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return SYSTEM_TWINPASS;
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}
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return BOARD_SYSTEM_TYPE;
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}
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#define IS_HEX(x) (((x >='0' && x <= '9') || (x >='a' && x <= 'f') || (x >='A' && x <= 'F'))?(1):(0))
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static int __init
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ifxmips_set_board_type(char *str)
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{
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str = strchr(str, '=');
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if(!str)
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goto out;
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str++;
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if(strlen(str) > MAX_BOARD_NAME_LEN)
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goto out;
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strncpy(board_name, str, MAX_BOARD_NAME_LEN);
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printk("bootloader told us, that this is a %s board\n", board_name);
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out:
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return 1;
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}
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__setup("ifxmips_board", ifxmips_set_board_type);
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#define IS_HEX(x) \
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(((x >='0' && x <= '9') || (x >='a' && x <= 'f') || (x >='A' && x <= 'F'))?(1):(0))
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static int __init
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ifxmips_set_mii0_mac(char *str)
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{
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@ -174,23 +181,122 @@ out:
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}
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__setup("mii0_mac", ifxmips_set_mii0_mac);
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static struct ifxmips_board boards[] =
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{
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{
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.name = "EASY50712",
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.system_type = SYSTEM_DANUBE_CHIPID1,
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.devs =
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{
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&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
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&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev,
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},
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.reset_resource =
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{
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.name = "reset",
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.start = 1,
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.end = 15,
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},
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.gpiodev_resource =
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{
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.name = "gpio",
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.start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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.end = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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},
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.num_devs = 6,
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}, {
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.name = "EASY4010",
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.system_type = SYSTEM_TWINPASS_CHIPID,
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.devs =
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{
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&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
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&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev,
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},
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.reset_resource =
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{
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.name = "reset",
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.start = 1,
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.end = 15,
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},
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.gpiodev_resource =
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{
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.name = "gpio",
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.start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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.end = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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},
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.num_devs = 6,
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}, {
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.name = "ARV4519",
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.system_type = SYSTEM_DANUBE_CHIPID2,
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.devs =
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{
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&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
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&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev,
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},
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.reset_resource =
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{
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.name = "reset",
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.start = 1,
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.end = 12,
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},
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.gpiodev_resource =
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{
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.name = "gpio",
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.start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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.end = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
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(1 << 4) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12),
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},
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.pci_external_clock = 1,
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.num_devs = 6,
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},
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};
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struct ifxmips_board* ifxmips_find_board(void)
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{
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int i;
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if(!*board_name)
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return 0;
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for(i = 0; i < ARRAY_SIZE(boards); i++)
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if((boards[i].system_type == chiprev) && (!strcmp(boards[i].name, board_name)))
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return &boards[i];
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return 0;
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}
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int __init
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ifxmips_init_devices(void)
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{
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int dev = 0;
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struct ifxmips_board *board = ifxmips_find_board();
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chiprev = ifxmips_r32(IFXMIPS_MPS_CHIPID);
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if(!cmdline_mac)
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random_ether_addr(ifxmips_mii_mac.mac);
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ifxmips_devs[dev++] = ifxmips_led;
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ifxmips_devs[dev++] = ifxmips_gpio;
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ifxmips_devs[dev++] = ifxmips_mii;
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ifxmips_devs[dev++] = ifxmips_mtd;
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ifxmips_devs[dev++] = ifxmips_wdt;
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#ifdef CONFIG_GPIO_DEVICE
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ifxmips_devs[dev++] = ifxmips_gpio_dev;
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#endif
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return platform_add_devices(ifxmips_devs, dev);
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if(!board)
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{
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switch(chiprev)
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{
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case SYSTEM_DANUBE_CHIPID1:
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case SYSTEM_DANUBE_CHIPID2:
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board = &boards[0];
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break;
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case SYSTEM_TWINPASS_CHIPID:
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board = &boards[1];
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break;
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}
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}
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ifxmips_gpio.resource = &board->reset_resource;
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ifxmips_gpio_dev.resource = &board->gpiodev_resource;
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if(board->pci_external_clock)
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ifxmips_pci_external_clock = 1;
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printk("using board definition %s\n", board->name);
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return platform_add_devices(board->devs, board->num_devs);
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}
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arch_initcall(ifxmips_init_devices);
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@ -45,9 +45,9 @@
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#define PINS_PER_PORT 16
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#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN
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#define IFXMIPS_RST_PIN 15
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#define IFXMIPS_RST_PORT 1
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unsigned int rst_port = 1;
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unsigned int rst_pin = 15;
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static struct timer_list rst_button_timer;
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extern struct sock *uevent_sock;
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@ -306,7 +306,7 @@ reset_button_poll(unsigned long unused)
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rst_button_timer.expires = jiffies + (HZ / 4);
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add_timer(&rst_button_timer);
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if (pressed != ifxmips_port_get_input(IFXMIPS_RST_PORT, IFXMIPS_RST_PIN))
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if (pressed != ifxmips_port_get_input(rst_port, rst_pin))
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{
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if(pressed)
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pressed = 0;
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@ -333,10 +333,12 @@ ifxmips_gpio_probe(struct platform_device *dev)
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int retval = 0;
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#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN
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ifxmips_port_set_open_drain(IFXMIPS_RST_PORT, IFXMIPS_RST_PIN);
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ifxmips_port_clear_altsel0(IFXMIPS_RST_PORT, IFXMIPS_RST_PIN);
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ifxmips_port_clear_altsel1(IFXMIPS_RST_PORT, IFXMIPS_RST_PIN);
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ifxmips_port_set_dir_in(IFXMIPS_RST_PORT, IFXMIPS_RST_PIN);
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rst_port = dev->resource[0].start;
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rst_pin = dev->resource[0].end;
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ifxmips_port_set_open_drain(rst_port, rst_pin);
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ifxmips_port_clear_altsel0(rst_port, rst_pin);
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ifxmips_port_clear_altsel1(rst_port, rst_pin);
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ifxmips_port_set_dir_in(rst_port, rst_pin);
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seen = jiffies;
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init_timer(&rst_button_timer);
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rst_button_timer.function = reset_button_poll;
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@ -50,7 +50,7 @@ static struct pci_controller ifxmips_pci_controller =
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};
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u32 ifxmips_pci_mapped_cfg;
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u32 ifxmips_pci_external_clock = 0;
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int ifxmips_pci_external_clock = 0;
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static int __init
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ifxmips_pci_set_external_clk(char *str)
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@ -54,6 +54,7 @@ ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
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while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
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ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
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}
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EXPORT_SYMBOL(ifxmips_write_mdio);
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unsigned short
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ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
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@ -67,6 +68,7 @@ ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
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val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
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return val;
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}
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EXPORT_SYMBOL(ifxmips_read_mdio);
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int
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ifxmips_ifxmips_mii_open(struct net_device *dev)
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@ -346,6 +348,7 @@ ifxmips_mii_probe(struct platform_device *dev)
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ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
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memcpy(mac_addr, mac->mac, 6);
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strcpy(ifxmips_mii0_dev->name, "eth%d");
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ifxmips_mii_chip_init(REV_MII_MODE);
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result = register_netdev(ifxmips_mii0_dev);
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if (result)
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{
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@ -353,7 +356,6 @@ ifxmips_mii_probe(struct platform_device *dev)
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goto out;
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}
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ifxmips_mii_chip_init(REV_MII_MODE);
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printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
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out:
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@ -182,7 +182,8 @@
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#define REV_MII_MODE 2
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/* mdio access */
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#define IFXMIPS_PPE32_MDIO_ACC ((u32*)(IFXMIPS_PPE32_MEM_MAP + 0x1804))
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#define IFXMIPS_PPE32_MDIO_CFG ((u32*)(IFXMIPS_PPE32_BASE_ADDR + 0x11800))
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#define IFXMIPS_PPE32_MDIO_ACC ((u32*)(IFXMIPS_PPE32_BASE_ADDR + 0x11804))
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#define MDIO_ACC_REQUEST 0x80000000
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#define MDIO_ACC_READ 0x40000000
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