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ppc40x: move perwe fixup into a separate function
Cc: backfire@openwrt.org git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20929 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -1,6 +1,6 @@
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-magicbox.c
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@@ -0,0 +1,90 @@
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@@ -0,0 +1,96 @@
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+/*
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+ * Old U-boot compatibility for Magicbox boards
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+ *
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@ -26,16 +26,22 @@
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+
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+static bd_t bd;
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+
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+static void fixup_cf_card(void)
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+static void fixup_perwe(void)
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+{
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+#define DCRN_CPC0_PCI_BASE 0xf9
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+#define CF_CS0_BASE 0xff100000
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+#define CF_CS1_BASE 0xff200000
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+
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+ /* Turn on PerWE instead of PCIsomething */
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+ /* Turn on PerWE instead of PCIINT */
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+ mtdcr(DCRN_CPC0_PCI_BASE,
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+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
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+
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+#undef DCRN_CPC0_PCI_BASE
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+}
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+
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+static void fixup_cf_card(void)
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+{
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+#define CF_CS0_BASE 0xff100000
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+#define CF_CS1_BASE 0xff200000
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+
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+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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@ -48,7 +54,6 @@
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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+#undef DCRN_CPC0_PCI_BASE
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+#undef CF_CS0_BASE
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+#undef CF_CS1_BASE
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+}
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@ -76,6 +81,7 @@
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+ devp = finddevice("/plb/ebc/cf_card@ff100000");
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+ del_node(devp);
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+ } else {
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+ fixup_perwe();
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+ fixup_cf_card();
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+ }
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+
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@ -1,6 +1,6 @@
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-openrb.c
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@@ -0,0 +1,71 @@
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@@ -0,0 +1,77 @@
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+/*
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+ * Old U-boot compatibility for OpenRB boards
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+ *
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@ -26,16 +26,22 @@
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+
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+static bd_t bd;
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+
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+static void fixup_cf_card(void)
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+static void fixup_perwe(void)
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+{
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+#define DCRN_CPC0_PCI_BASE 0xf9
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+#define CF_CS0_BASE 0xff100000
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+#define CF_CS1_BASE 0xff200000
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+
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+ /* Turn on PerWE instead of PCIsomething */
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+ /* Turn on PerWE instead of PCIINT */
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+ mtdcr(DCRN_CPC0_PCI_BASE,
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+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
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+
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+#undef DCRN_CPC0_PCI_BASE
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+}
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+
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+static void fixup_cf_card(void)
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+{
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+#define CF_CS0_BASE 0xff100000
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+#define CF_CS1_BASE 0xff200000
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+
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+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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@ -48,7 +54,6 @@
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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+#undef DCRN_CPC0_PCI_BASE
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+#undef CF_CS0_BASE
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+#undef CF_CS1_BASE
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+}
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@ -58,6 +63,7 @@
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+ ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
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+ ibm4xx_sdram_fixup_memsize();
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+
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+ fixup_perwe();
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+ fixup_cf_card();
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+
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+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
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