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ath9k: merge fixes for 5ghz fast clock handling
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21097 3c298f89-4303-0410-b956-a3cf2f4a3e73
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37c210f055
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630f1e6be7
@ -1,24 +1,49 @@
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--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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@@ -852,7 +852,8 @@ static int ar5008_hw_process_ini(struct
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@@ -852,7 +852,7 @@ static int ar5008_hw_process_ini(struct
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REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);
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- if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
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+ if (AR_SREV_9280_20(ah) &&
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+ (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) {
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+ if (IS_CHAN_A_FAST_CLOCK(ah, chan)) {
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REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
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regWrites);
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}
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@@ -895,7 +896,7 @@ static void ar5008_hw_set_rfmode(struct
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@@ -894,8 +894,7 @@ static void ar5008_hw_set_rfmode(struct
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rfMode |= (IS_CHAN_5GHZ(chan)) ?
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AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;
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if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah))
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- if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah))
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- && IS_CHAN_A_5MHZ_SPACED(chan))
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+ && (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
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+ if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);
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REG_WRITE(ah, AR_PHY_MODE, rfMode);
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--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
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@@ -455,16 +455,12 @@ static u32 ar9002_hw_compute_pll_control
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pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL);
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if (chan && IS_CHAN_5GHZ(chan)) {
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- pll |= SM(0x28, AR_RTC_9160_PLL_DIV);
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-
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-
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- if (AR_SREV_9280_20(ah)) {
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- if (((chan->channel % 20) == 0)
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- || ((chan->channel % 10) == 0))
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- pll = 0x2850;
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- else
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- pll = 0x142c;
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- }
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+ if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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+ pll = 0x142c;
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+ else if (AR_SREV_9280_20(ah))
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+ pll = 0x2850;
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+ else
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+ pll |= SM(0x28, AR_RTC_9160_PLL_DIV);
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} else {
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pll |= SM(0x2c, AR_RTC_9160_PLL_DIV);
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}
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--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
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@@ -755,7 +755,8 @@ static bool ar9003_hw_init_cal(struct at
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@ -397,7 +422,7 @@
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* different modal values.
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*/
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- if (IS_CHAN_A_5MHZ_SPACED(chan))
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+ if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
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+ if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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REG_WRITE_ARRAY(&ah->iniModesAdditional,
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modesIndex, regWrites);
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@ -406,10 +431,33 @@
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? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
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- if (IS_CHAN_A_5MHZ_SPACED(chan))
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+ if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
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+ if (IS_CHAN_A_FAST_CLOCK(ah, chan))
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rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);
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REG_WRITE(ah, AR_PHY_MODE, rfMode);
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--- a/drivers/net/wireless/ath/ath9k/eeprom.h
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+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
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@@ -300,7 +300,8 @@ struct base_eep_header {
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u32 binBuildNumber;
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u8 deviceType;
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u8 pwdclkind;
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- u8 futureBase_1[2];
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+ u8 fastClk5g;
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+ u8 divChain;
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u8 rxGainType;
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u8 dacHiPwrMode_5G;
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u8 openLoopPwrCntl;
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--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
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+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
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@@ -274,6 +274,8 @@ static u32 ath9k_hw_def_get_eeprom(struc
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return pBase->txMask;
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case EEP_RX_MASK:
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return pBase->rxMask;
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+ case EEP_FSTCLK_5G:
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+ return pBase->fastClk5g;
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case EEP_RXGAIN_TYPE:
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return pBase->rxGainType;
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case EEP_TXGAIN_TYPE:
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -29,6 +29,7 @@
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@ -446,7 +494,17 @@
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* We need this for PCI devices only (Cardbus, PCI, miniPCI)
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* _and_ if on non-uniprocessor systems (Multiprocessor/HT).
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* This means we use it for all AR5416 devices, and the few
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@@ -2198,7 +2209,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw
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@@ -1233,8 +1244,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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(chan->channel != ah->curchan->channel) &&
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((chan->channelFlags & CHANNEL_ALL) ==
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(ah->curchan->channelFlags & CHANNEL_ALL)) &&
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- !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) ||
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- IS_CHAN_A_5MHZ_SPACED(ah->curchan))) {
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+ !AR_SREV_9280(ah)) {
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if (ath9k_hw_channel_change(ah, chan)) {
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ath9k_hw_loadnf(ah, ah->curchan);
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@@ -2198,7 +2208,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw
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}
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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@ -456,6 +514,18 @@
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pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;
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pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;
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pCap->rx_status_len = sizeof(struct ar9003_rxs);
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@@ -2206,6 +2217,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw
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pCap->txs_len = sizeof(struct ar9003_txs);
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} else {
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pCap->tx_desc_len = sizeof(struct ath_desc);
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+ if (AR_SREV_9280_20(ah) &&
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+ ((ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) <=
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+ AR5416_EEP_MINOR_VER_16) ||
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+ ah->eep_ops->get_eeprom(ah, EEP_FSTCLK_5G)))
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+ pCap->hw_caps |= ATH9K_HW_CAP_FASTCLOCK;
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}
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if (AR_SREV_9300_20_OR_LATER(ah))
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--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -198,6 +198,7 @@ enum ath9k_hw_caps {
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@ -474,3 +544,16 @@
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int spurmode;
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u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
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u8 max_txtrig_level;
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@@ -367,10 +369,9 @@ struct ath9k_channel {
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#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
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#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0)
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#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)
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-#define IS_CHAN_A_5MHZ_SPACED(_c) \
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+#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \
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((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \
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- (((_c)->channel % 20) != 0) && \
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- (((_c)->channel % 10) != 0))
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+ ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
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/* These macros check chanmode and not channelFlags */
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#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B)
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