mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-27 20:04:05 +02:00
disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors.
cleanup: * remove volative and use readl & writel accessors instead * use set_irq_chip & friends for irq setup * use kzalloc instead of kmalloc * secure VINT_VECTOR macro argument * remove unused vlynq_local_id function git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8750 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nico
parent
02d92d36c7
commit
642f601416
@ -46,34 +46,37 @@
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#define VLYNQ_CTRL_INT2CFG 0x00000080
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#define VLYNQ_CTRL_RESET 0x00000001
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#define VLYNQ_STATUS_RERROR 0x00000100
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#define VLYNQ_STATUS_LERROR 0x00000080
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#define VLYNQ_STATUS_LINK 0x00000001
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#define VLYNQ_STATUS_LERROR 0x00000080
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#define VLYNQ_STATUS_RERROR 0x00000100
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#define VINT_ENABLE 0x00000100
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#define VINT_TYPE_EDGE 0x00000080
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#define VINT_LEVEL_LOW 0x00000040
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#define VINT_VECTOR(x) (x & 0x1f)
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#define VINT_VECTOR(x) ((x) & 0x1f)
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#define VINT_OFFSET(irq) (8 * ((irq) % 4))
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#define VLYNQ_AUTONEGO_V2 0x00010000
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struct vlynq_regs {
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volatile u32 revision;
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volatile u32 control;
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volatile u32 status;
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volatile u32 int_prio;
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volatile u32 int_status;
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volatile u32 int_pending;
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volatile u32 int_ptr;
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volatile u32 tx_offset;
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volatile struct vlynq_mapping rx_mapping[4];
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volatile u32 chip;
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volatile u32 autonego;
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volatile u32 unused[6];
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volatile u32 int_device[8];
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u32 revision;
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u32 control;
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u32 status;
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u32 int_prio;
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u32 int_status;
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u32 int_pending;
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u32 int_ptr;
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u32 tx_offset;
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struct vlynq_mapping rx_mapping[4];
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u32 chip;
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u32 autonego;
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u32 unused[6];
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u32 int_device[8];
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} __attribute__ ((packed));
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#define vlynq_reg_read(reg) readl(&(reg))
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#define vlynq_reg_write(reg, val) writel(val, &(reg))
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#ifdef VLYNQ_DEBUG
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static void vlynq_dump_regs(struct vlynq_device *dev)
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{
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@ -99,51 +102,51 @@ static void vlynq_dump_mem(u32 *base, int count)
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int vlynq_linked(struct vlynq_device *dev)
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{
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int i;
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for (i = 0; i < 10; i++)
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if (dev->local->status & VLYNQ_STATUS_LINK) {
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printk("%s: linked\n", dev->dev.bus_id);
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if (vlynq_reg_read(dev->local->status) & VLYNQ_STATUS_LINK)
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return 1;
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} else {
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else
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mdelay(1);
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}
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return 0;
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}
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static void vlynq_irq_unmask(unsigned int irq)
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{
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volatile u32 val;
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struct vlynq_device *dev = irq_desc[irq].chip_data;
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u32 val;
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struct vlynq_device *dev = get_irq_chip_data(irq);
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int virq;
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BUG_ON(!dev);
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virq = irq - dev->irq_start;
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val = dev->remote->int_device[virq >> 2];
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val = vlynq_reg_read(dev->remote->int_device[virq >> 2]);
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val |= (VINT_ENABLE | virq) << VINT_OFFSET(virq);
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dev->remote->int_device[virq >> 2] = val;
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vlynq_reg_write(dev->remote->int_device[virq >> 2], val);
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}
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static void vlynq_irq_mask(unsigned int irq)
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{
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volatile u32 val;
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struct vlynq_device *dev = irq_desc[irq].chip_data;
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u32 val;
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struct vlynq_device *dev = get_irq_chip_data(irq);
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int virq;
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BUG_ON(!dev);
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virq = irq - dev->irq_start;
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val = dev->remote->int_device[virq >> 2];
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val = vlynq_reg_read(dev->remote->int_device[virq >> 2]);
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val &= ~(VINT_ENABLE << VINT_OFFSET(virq));
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dev->remote->int_device[virq >> 2] = val;
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vlynq_reg_write(dev->remote->int_device[virq >> 2], val);
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}
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static int vlynq_irq_type(unsigned int irq, unsigned int flow_type)
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{
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volatile u32 val;
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u32 val;
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struct vlynq_device *dev = irq_desc[irq].chip_data;
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int virq;
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BUG_ON(!dev);
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virq = irq - dev->irq_start;
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val = dev->remote->int_device[virq >> 2];
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val = vlynq_reg_read(dev->remote->int_device[virq >> 2]);
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switch (flow_type & IRQ_TYPE_SENSE_MASK) {
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_EDGE_FALLING:
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@ -162,7 +165,7 @@ static int vlynq_irq_type(unsigned int irq, unsigned int flow_type)
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default:
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return -EINVAL;
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}
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dev->remote->int_device[virq >> 2] = val;
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vlynq_reg_write(dev->remote->int_device[virq >> 2], val);
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return 0;
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}
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@ -172,18 +175,18 @@ static irqreturn_t vlynq_irq(int irq, void *dev_id)
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u32 status, ack;
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int virq = 0;
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status = dev->local->int_status;
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dev->local->int_status = status;
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status = vlynq_reg_read(dev->local->int_status);
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vlynq_reg_write(dev->local->int_status, status);
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if (status & (1 << dev->local_irq)) { /* Local vlynq IRQ. Ack */
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ack = dev->local->status;
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dev->local->status = ack;
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ack = vlynq_reg_read(dev->local->status);
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vlynq_reg_write(dev->local->status, ack);
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}
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if (status & (1 << dev->remote_irq)) { /* Remote vlynq IRQ. Ack */
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ack = dev->remote->status;
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dev->remote->status = ack;
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}
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ack = vlynq_reg_read(dev->remote->status);
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vlynq_reg_write(dev->remote->status, ack);
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}
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status &= ~((1 << dev->local_irq) | (1 << dev->remote_irq));
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while (status) {
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@ -197,7 +200,6 @@ static irqreturn_t vlynq_irq(int irq, void *dev_id)
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}
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static struct irq_chip vlynq_irq_chip = {
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.typename = "VLYNQ",
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.name = "vlynq",
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.unmask = vlynq_irq_unmask,
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.mask = vlynq_irq_mask,
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@ -218,23 +220,22 @@ static int vlynq_setup_irq(struct vlynq_device *dev)
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val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq);
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val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL |
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VLYNQ_CTRL_INT2CFG;
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dev->local->int_ptr = 0x14;
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dev->local->control |= val;
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val |= vlynq_reg_read(dev->local->control);
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vlynq_reg_write(dev->local->int_ptr, 0x14);
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vlynq_reg_write(dev->local->control, val);
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val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq);
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val |= VLYNQ_CTRL_INT_ENABLE;
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dev->remote->int_ptr = 0x14;
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dev->remote->control |= val;
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val |= vlynq_reg_read(dev->remote->control);
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vlynq_reg_write(dev->remote->int_ptr, 0x14);
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vlynq_reg_write(dev->remote->control, val);
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for (i = 0; i < PER_DEVICE_IRQS; i++) {
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if ((i == dev->local_irq) || (i == dev->remote_irq))
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continue;
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irq_desc[dev->irq_start + i].status = IRQ_DISABLED;
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irq_desc[dev->irq_start + i].action = 0;
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irq_desc[dev->irq_start + i].depth = 1;
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irq_desc[dev->irq_start + i].chip = &vlynq_irq_chip;
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irq_desc[dev->irq_start + i].chip_data = dev;
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dev->remote->int_device[i >> 2] = 0;
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set_irq_chip(dev->irq_start + i, &vlynq_irq_chip);
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set_irq_chip_data(dev->irq_start + i, dev);
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vlynq_reg_write(dev->remote->int_device[i >> 2], 0);
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}
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if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "vlynq", dev)) {
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@ -297,24 +298,28 @@ int vlynq_device_enable(struct vlynq_device *dev)
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if (result)
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return result;
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dev->local->control = 0;
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dev->remote->control = 0;
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dev->local->control = VLYNQ_CTRL_CLOCK_INT;
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vlynq_reg_write(dev->local->control, 0);
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vlynq_reg_write(dev->remote->control, 0);
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div = ar7_dsp_freq() / 62500000;
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if (div != 0 ) {
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if (ar7_dsp_freq() / div != 62500000) {
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printk(KERN_WARNING
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"VLYNQ: Adjusted requested frequency %d to %d\n",
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62500000, ar7_dsp_freq() / div);
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}
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printk("VLYNQ: Setting clock to %d (clock divider %u)\n",
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ar7_dsp_freq() / div, div);
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dev->local->control |= VLYNQ_CTRL_CLOCK_DIV((div - 1));
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}
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if (vlynq_linked(dev))
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/*
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if (vlynq_linked(dev)) {
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printk(KERN_INFO "%s: linked (using external clock)\n",
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dev->dev.bus_id);
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return vlynq_setup_irq(dev);
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}
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*/
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for (div = 1; div <= 8; div++) {
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mdelay(20);
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vlynq_reg_write(dev->local->control, VLYNQ_CTRL_CLOCK_INT |
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VLYNQ_CTRL_CLOCK_DIV(div - 1));
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vlynq_reg_write(dev->remote->control, 0);
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if (vlynq_linked(dev)) {
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printk(KERN_INFO "%s: linked (using internal clock, div: %d)\n",
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dev->dev.bus_id, div);
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return vlynq_setup_irq(dev);
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}
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}
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return -ENODEV;
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}
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@ -327,14 +332,9 @@ void vlynq_device_disable(struct vlynq_device *dev)
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ops->off(dev);
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}
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u32 vlynq_local_id(struct vlynq_device *dev)
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{
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return dev->local->chip;
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}
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u32 vlynq_remote_id(struct vlynq_device *dev)
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{
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return dev->remote->chip;
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return vlynq_reg_read(dev->remote->chip);
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}
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void vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset,
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@ -342,10 +342,10 @@ void vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset,
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{
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int i;
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dev->local->tx_offset = tx_offset;
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vlynq_reg_write(dev->local->tx_offset, tx_offset);
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for (i = 0; i < 4; i++) {
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dev->local->rx_mapping[i].offset = mapping[i].offset;
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dev->local->rx_mapping[i].size = mapping[i].size;
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vlynq_reg_write(dev->local->rx_mapping[i].offset, mapping[i].offset);
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vlynq_reg_write(dev->local->rx_mapping[i].size, mapping[i].size);
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}
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}
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@ -354,10 +354,10 @@ void vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset,
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{
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int i;
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dev->remote->tx_offset = tx_offset;
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vlynq_reg_write(dev->remote->tx_offset, tx_offset);
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for (i = 0; i < 4; i++) {
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dev->remote->rx_mapping[i].offset = mapping[i].offset;
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dev->remote->rx_mapping[i].size = mapping[i].size;
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vlynq_reg_write(dev->remote->rx_mapping[i].offset, mapping[i].offset);
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vlynq_reg_write(dev->remote->rx_mapping[i].size, mapping[i].size);
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}
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}
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@ -427,7 +427,7 @@ static int vlynq_probe(struct platform_device *pdev)
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if (!irq_res)
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return -ENODEV;
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dev = kmalloc(sizeof(struct vlynq_device), GFP_KERNEL);
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dev = kzalloc(sizeof(struct vlynq_device), GFP_KERNEL);
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if (!dev) {
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printk(KERN_ERR "vlynq: failed to allocate device structure\n");
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return -ENOMEM;
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@ -517,7 +517,7 @@ EXPORT_SYMBOL(vlynq_bus_type);
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#ifdef CONFIG_PCI
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extern void vlynq_pci_init(void);
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#endif
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int __init vlynq_init(void)
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static int __init vlynq_init(void)
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{
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int res = 0;
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@ -76,7 +76,6 @@ static inline int vlynq_register_driver(struct vlynq_driver *driver)
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extern void vlynq_unregister_driver(struct vlynq_driver *driver);
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extern int vlynq_device_enable(struct vlynq_device *dev);
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extern void vlynq_device_disable(struct vlynq_device *dev);
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extern u32 vlynq_local_id(struct vlynq_device *dev);
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extern u32 vlynq_remote_id(struct vlynq_device *dev);
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extern void vlynq_set_local_mapping(struct vlynq_device *dev,
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u32 tx_offset,
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