mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-24 00:30:16 +02:00
ifxmips: fold files/drivers/* into patches
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@18082 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic
parent
37e3d1ccdd
commit
678a7f27b6
@ -1,11 +1,13 @@
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CONFIG_32BIT=y
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# CONFIG_64BIT is not set
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CONFIG_ADM6996_PHY=y
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_BASE_SMALL=0
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# CONFIG_BCM47XX is not set
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# CONFIG_BINARY_PRINTF is not set
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@ -79,13 +81,10 @@ CONFIG_HZ=250
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CONFIG_HZ_250=y
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# CONFIG_I2C is not set
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CONFIG_IFXMIPS=y
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# CONFIG_IFXMIPS_EEPROM is not set
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CONFIG_IFXMIPS_GPIO_RST_BTN=y
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# CONFIG_IFXMIPS_MEI is not set
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CONFIG_IFXMIPS_MII0=y
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# CONFIG_IFXMIPS_PROM_ASC0 is not set
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CONFIG_IFXMIPS_PROM_ASC1=y
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# CONFIG_IFXMIPS_SSC is not set
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CONFIG_IFXMIPS_WDT=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQ_CPU=y
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@ -126,12 +125,12 @@ CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI=y
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CONFIG_PCI_DOMAINS=y
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# CONFIG_PCSPKR_PLATFORM is not set
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CONFIG_PHYLIB=y
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# CONFIG_PMC_MSP is not set
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_STB810 is not set
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# CONFIG_PROBE_INITRD_HEADER is not set
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# CONFIG_PROM_EMU is not set
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CONFIG_SCHED_OMIT_FRAME_POINTER=y
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# CONFIG_SCSI_DMA is not set
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# CONFIG_SERIAL_8250 is not set
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@ -150,6 +149,7 @@ CONFIG_SERIAL_IFXMIPS=y
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# CONFIG_SIBYTE_SWARM is not set
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# CONFIG_SLOW_WORK is not set
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CONFIG_SWAP_IO_SPACE=y
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CONFIG_SWCONFIG=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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@ -1,196 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2006 infineon
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* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/version.h>
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#include <linux/types.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/uaccess.h>
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#include <linux/unistd.h>
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#include <linux/errno.h>
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#include <linux/leds.h>
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#include <linux/delay.h>
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#include <ifxmips.h>
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#include <ifxmips_gpio.h>
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#include <ifxmips_pmu.h>
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#define DRVNAME "ifxmips_led"
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/* might need to be changed depending on shift register used on the pcb */
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#if 1
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#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING
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#else
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#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
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#endif
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#define IFXMIPS_LED_SPEED IFXMIPS_LED_8HZ
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#define IFXMIPS_LED_GPIO_PORT 0
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#define IFXMIPS_MAX_LED 24
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struct ifxmips_led {
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struct led_classdev cdev;
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u8 bit;
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};
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void ifxmips_led_set(unsigned int led)
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{
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led &= 0xffffff;
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
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}
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EXPORT_SYMBOL(ifxmips_led_set);
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void ifxmips_led_clear(unsigned int led)
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{
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led = ~(led & 0xffffff);
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
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}
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EXPORT_SYMBOL(ifxmips_led_clear);
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void ifxmips_led_blink_set(unsigned int led)
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{
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led &= 0xffffff;
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
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}
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EXPORT_SYMBOL(ifxmips_led_blink_set);
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void ifxmips_led_blink_clear(unsigned int led)
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{
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led = ~(led & 0xffffff);
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
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}
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EXPORT_SYMBOL(ifxmips_led_blink_clear);
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static void ifxmips_ledapi_set(struct led_classdev *led_cdev,
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enum led_brightness value)
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{
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struct ifxmips_led *led_dev =
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container_of(led_cdev, struct ifxmips_led, cdev);
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if (value)
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ifxmips_led_set(1 << led_dev->bit);
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else
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ifxmips_led_clear(1 << led_dev->bit);
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}
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void ifxmips_led_setup_gpio(void)
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{
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int i = 0;
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/* leds are controlled via a shift register
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we need to setup pins SH,D,ST (4,5,6) to make it work */
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for (i = 4; i < 7; i++) {
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ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
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ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
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ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
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ifxmips_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i);
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}
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}
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static int ifxmips_led_probe(struct platform_device *dev)
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{
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int i = 0;
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ifxmips_led_setup_gpio();
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ifxmips_w32(0, IFXMIPS_LED_AR);
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ifxmips_w32(0, IFXMIPS_LED_CPU0);
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ifxmips_w32(0, IFXMIPS_LED_CPU1);
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ifxmips_w32(LED_CON0_SWU, IFXMIPS_LED_CON0);
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ifxmips_w32(0, IFXMIPS_LED_CON1);
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/* setup the clock edge that the shift register is triggered on */
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & ~IFXMIPS_LED_EDGE_MASK,
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IFXMIPS_LED_CON0);
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_CLK_EDGE,
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IFXMIPS_LED_CON0);
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/* per default leds 15-0 are set */
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ifxmips_w32(IFXMIPS_LED_GROUP1 | IFXMIPS_LED_GROUP0, IFXMIPS_LED_CON1);
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/* leds are update periodically by the FPID */
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_UPD_MASK,
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IFXMIPS_LED_CON1);
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_UPD_SRC_FPI,
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IFXMIPS_LED_CON1);
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/* set led update speed */
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_MASK,
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IFXMIPS_LED_CON1);
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_SPEED,
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IFXMIPS_LED_CON1);
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/* adsl 0 and 1 leds are updated by the arc */
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ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC,
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IFXMIPS_LED_CON0);
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/* per default, the leds are turned on */
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ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
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for (i = 0; i < IFXMIPS_MAX_LED; i++) {
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struct ifxmips_led *tmp =
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kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
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tmp->cdev.brightness_set = ifxmips_ledapi_set;
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tmp->cdev.name = kmalloc(sizeof("ifxmips:led:00"), GFP_KERNEL);
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sprintf((char *)tmp->cdev.name, "ifxmips:led:%02d", i);
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tmp->cdev.default_trigger = NULL;
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tmp->bit = i;
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led_classdev_register(&dev->dev, &tmp->cdev);
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}
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return 0;
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}
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static int ifxmips_led_remove(struct platform_device *pdev)
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{
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return 0;
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}
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static struct platform_driver ifxmips_led_driver = {
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.probe = ifxmips_led_probe,
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.remove = ifxmips_led_remove,
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.driver = {
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.name = DRVNAME,
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.owner = THIS_MODULE,
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},
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};
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int __init ifxmips_led_init(void)
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{
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int ret = platform_driver_register(&ifxmips_led_driver);
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if (ret)
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printk(KERN_INFO
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"ifxmips_led: Error registering platfom driver!");
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return ret;
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}
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void __exit ifxmips_led_exit(void)
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{
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platform_driver_unregister(&ifxmips_led_driver);
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}
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module_init(ifxmips_led_init);
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module_exit(ifxmips_led_exit);
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@ -1,277 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Copyright (C) 2004 Liu Peng Infineon IFAP DC COM CPE
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* Copyright (C) 2008 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/cfi.h>
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#include <linux/magic.h>
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#include <linux/platform_device.h>
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#include <ifxmips.h>
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#include <ifxmips_prom.h>
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#include <ifxmips_ebu.h>
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#ifndef CONFIG_MTD_PARTITIONS
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#error Please enable CONFIG_MTD_PARTITIONS
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#endif
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static struct map_info ifxmips_map = {
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.name = "ifx-nor",
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.bankwidth = 2,
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.size = 0x400000,
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};
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static map_word ifxmips_read16(struct map_info *map, unsigned long adr)
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{
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unsigned long flags;
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map_word temp;
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spin_lock_irqsave(&ebu_lock, flags);
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adr ^= 2;
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temp.x[0] = *((__u16 *)(map->virt + adr));
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spin_unlock_irqrestore(&ebu_lock, flags);
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return temp;
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}
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static void ifxmips_write16(struct map_info *map, map_word d, unsigned long adr)
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{
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unsigned long flags;
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spin_lock_irqsave(&ebu_lock, flags);
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adr ^= 2;
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*((__u16 *)(map->virt + adr)) = d.x[0];
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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void ifxmips_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
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{
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unsigned char *p;
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unsigned char *to_8;
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unsigned long flags;
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spin_lock_irqsave(&ebu_lock, flags);
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from = (unsigned long)(from + map->virt);
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p = (unsigned char *) from;
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to_8 = (unsigned char *) to;
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while (len--)
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*to_8++ = *p++;
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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void ifxmips_copy_to(struct map_info *map,
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unsigned long to,
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const void *from,
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ssize_t len)
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{
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unsigned char *p = (unsigned char *)from;
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unsigned char *to_8;
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unsigned long flags;
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spin_lock_irqsave(&ebu_lock, flags);
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to += (unsigned long) map->virt;
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to_8 = (unsigned char *)to;
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while (len--)
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*p++ = *to_8++;
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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static struct mtd_partition ifxmips_partitions[] = {
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{
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.name = "uboot",
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.offset = 0x00000000,
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.size = 0x00020000,
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},
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{
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.name = "uboot_env",
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.offset = 0x00020000,
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.size = 0x00010000,
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},
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{
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.name = "kernel",
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.offset = 0x00030000,
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.size = 0x0,
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},
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{
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.name = "rootfs",
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.offset = 0x0,
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.size = 0x0,
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},
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{
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.name = "board_config",
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.offset = 0x0,
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.size = 0x0,
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},
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};
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static struct mtd_partition ifxmips_meta_partition = {
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.name = "linux",
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.offset = 0x00030000,
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.size = 0x0,
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};
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static const char *part_probe_types[] = { "cmdlinepart", NULL };
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int find_uImage_size(unsigned long start_offset)
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{
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unsigned long magic;
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unsigned long temp;
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ifxmips_copy_from(&ifxmips_map, &magic, start_offset, 4);
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if (le32_to_cpu(magic) != 0x56190527) {
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printk(KERN_INFO "ifxmips_mtd: invalid magic (0x%08X) of kernel at 0x%08lx \n", le32_to_cpu(magic), start_offset);
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return 0;
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}
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ifxmips_copy_from(&ifxmips_map, &temp, start_offset + 12, 4);
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printk(KERN_INFO "ifxmips_mtd: kernel size is %ld \n", temp + 0x40);
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return temp + 0x40;
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}
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int find_brn_block(unsigned long start_offset)
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{
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unsigned char temp[9];
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ifxmips_copy_from(&ifxmips_map, &temp, start_offset, 8);
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temp[8] = '\0';
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printk(KERN_INFO "data in brn block %s\n", temp);
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if (memcmp(temp, "BRN-BOOT", 8) == 0)
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return 1;
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else
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return 0;
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}
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int detect_squashfs_partition(unsigned long start_offset)
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{
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unsigned long temp;
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ifxmips_copy_from(&ifxmips_map, &temp, start_offset, 4);
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return le32_to_cpu(temp) == SQUASHFS_MAGIC;
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}
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static int ifxmips_mtd_probe(struct platform_device *dev)
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{
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struct mtd_info *ifxmips_mtd = NULL;
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struct mtd_partition *parts = NULL;
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unsigned long uimage_size;
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int err, i;
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int kernel_part = 2, rootfs_part = 3;
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int num_parts = ARRAY_SIZE(ifxmips_partitions);
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ifxmips_w32(0x1d7ff, IFXMIPS_EBU_BUSCON0);
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ifxmips_map.read = ifxmips_read16;
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ifxmips_map.write = ifxmips_write16;
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ifxmips_map.copy_from = ifxmips_copy_from;
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ifxmips_map.copy_to = ifxmips_copy_to;
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ifxmips_map.phys = dev->resource->start;
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ifxmips_map.size = dev->resource->end - ifxmips_map.phys + 1;
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ifxmips_map.virt = ioremap_nocache(ifxmips_map.phys, ifxmips_map.size);
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if (!ifxmips_map.virt) {
|
||||
printk(KERN_WARNING "ifxmips_mtd: failed to ioremap!\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
ifxmips_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &ifxmips_map);
|
||||
if (!ifxmips_mtd) {
|
||||
iounmap(ifxmips_map.virt);
|
||||
printk(KERN_WARNING "ifxmips_mtd: probing failed\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
ifxmips_mtd->owner = THIS_MODULE;
|
||||
|
||||
err = parse_mtd_partitions(ifxmips_mtd, part_probe_types, &parts, 0);
|
||||
if (err > 0) {
|
||||
printk(KERN_INFO "ifxmips_mtd: found %d partitions from cmdline\n", err);
|
||||
num_parts = err;
|
||||
kernel_part = 0;
|
||||
rootfs_part = 0;
|
||||
for (i = 0; i < num_parts; i++) {
|
||||
if (strcmp(parts[i].name, "kernel") == 0)
|
||||
kernel_part = i;
|
||||
if (strcmp(parts[i].name, "rootfs") == 0)
|
||||
rootfs_part = i;
|
||||
}
|
||||
} else {
|
||||
parts = &ifxmips_partitions[0];
|
||||
}
|
||||
|
||||
/* dynamic size detection only if rootfs-part follows kernel-part */
|
||||
if (kernel_part+1 == rootfs_part) {
|
||||
uimage_size = find_uImage_size(parts[kernel_part].offset);
|
||||
|
||||
if (detect_squashfs_partition(parts[kernel_part].offset + uimage_size)) {
|
||||
printk(KERN_INFO "ifxmips_mtd: found a squashfs following the uImage\n");
|
||||
} else {
|
||||
uimage_size &= ~0xffff;
|
||||
uimage_size += 0x10000;
|
||||
}
|
||||
|
||||
parts[kernel_part].size = uimage_size;
|
||||
parts[rootfs_part].offset = parts[kernel_part].offset + parts[kernel_part].size;
|
||||
parts[rootfs_part].size = ((ifxmips_mtd->size >> 20) * 1024 * 1024) - parts[rootfs_part].offset;
|
||||
|
||||
ifxmips_meta_partition.offset = parts[kernel_part].offset;
|
||||
ifxmips_meta_partition.size = parts[kernel_part].size + parts[rootfs_part].size;
|
||||
}
|
||||
|
||||
if (err <= 0) {
|
||||
if (ifxmips_has_brn_block()) {
|
||||
parts[3].size -= ifxmips_mtd->erasesize;
|
||||
parts[4].offset = ifxmips_mtd->size - ifxmips_mtd->erasesize;
|
||||
parts[4].size = ifxmips_mtd->erasesize;
|
||||
} else {
|
||||
num_parts--;
|
||||
}
|
||||
}
|
||||
|
||||
add_mtd_partitions(ifxmips_mtd, parts, num_parts);
|
||||
add_mtd_partitions(ifxmips_mtd, &ifxmips_meta_partition, 1);
|
||||
|
||||
printk(KERN_INFO "ifxmips_mtd: added %s flash with %dMB\n",
|
||||
ifxmips_map.name, ((int)ifxmips_mtd->size) >> 20);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver ifxmips_mtd_driver = {
|
||||
.probe = ifxmips_mtd_probe,
|
||||
.driver = {
|
||||
.name = "ifxmips_mtd",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
int __init init_ifxmips_mtd(void)
|
||||
{
|
||||
int ret = platform_driver_register(&ifxmips_mtd_driver);
|
||||
if (ret)
|
||||
printk(KERN_INFO "ifxmips_mtd: error registering platfom driver!");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit cleanup_ifxmips_mtd(void)
|
||||
{
|
||||
platform_driver_unregister(&ifxmips_mtd_driver);
|
||||
}
|
||||
|
||||
module_init(init_ifxmips_mtd);
|
||||
module_exit(cleanup_ifxmips_mtd);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
MODULE_DESCRIPTION("MTD map driver for IFXMIPS boards");
|
||||
@ -1,389 +0,0 @@
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
|
||||
*
|
||||
* Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
|
||||
* Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/in.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/ip.h>
|
||||
#include <linux/tcp.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <asm/checksum.h>
|
||||
|
||||
#include <ifxmips.h>
|
||||
#include <ifxmips_dma.h>
|
||||
#include <ifxmips_pmu.h>
|
||||
|
||||
struct ifxmips_mii_priv {
|
||||
struct net_device_stats stats;
|
||||
struct dma_device_info *dma_device;
|
||||
struct sk_buff *skb;
|
||||
};
|
||||
|
||||
static struct net_device *ifxmips_mii0_dev;
|
||||
static unsigned char mac_addr[MAX_ADDR_LEN];
|
||||
|
||||
void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
|
||||
{
|
||||
u32 val = MDIO_ACC_REQUEST |
|
||||
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||
((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
|
||||
phy_data;
|
||||
|
||||
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
;
|
||||
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
||||
}
|
||||
EXPORT_SYMBOL(ifxmips_write_mdio);
|
||||
|
||||
unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
|
||||
{
|
||||
u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
|
||||
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||
((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
|
||||
|
||||
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
;
|
||||
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
||||
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
;
|
||||
val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
|
||||
return val;
|
||||
}
|
||||
EXPORT_SYMBOL(ifxmips_read_mdio);
|
||||
|
||||
int ifxmips_ifxmips_mii_open(struct net_device *dev)
|
||||
{
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
struct dma_device_info *dma_dev = priv->dma_device;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
|
||||
if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||
(dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
|
||||
}
|
||||
netif_start_queue(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ifxmips_mii_release(struct net_device *dev)
|
||||
{
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
struct dma_device_info *dma_dev = priv->dma_device;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dma_dev->max_rx_chan_num; i++)
|
||||
dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
|
||||
netif_stop_queue(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
|
||||
{
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
unsigned char *buf = NULL;
|
||||
struct sk_buff *skb = NULL;
|
||||
int len = 0;
|
||||
|
||||
len = dma_device_read(dma_dev, &buf, (void **)&skb);
|
||||
|
||||
if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
|
||||
printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
|
||||
goto ifxmips_mii_hw_receive_err_exit;
|
||||
}
|
||||
|
||||
/* remove CRC */
|
||||
len -= 4;
|
||||
if (skb == NULL) {
|
||||
printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
|
||||
goto ifxmips_mii_hw_receive_err_exit;
|
||||
}
|
||||
|
||||
if (len > (skb->end - skb->tail)) {
|
||||
printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
|
||||
(len+4), skb->end, skb->tail);
|
||||
goto ifxmips_mii_hw_receive_err_exit;
|
||||
}
|
||||
|
||||
skb_put(skb, len);
|
||||
skb->dev = dev;
|
||||
skb->protocol = eth_type_trans(skb, dev);
|
||||
netif_rx(skb);
|
||||
|
||||
priv->stats.rx_packets++;
|
||||
priv->stats.rx_bytes += len;
|
||||
return 0;
|
||||
|
||||
ifxmips_mii_hw_receive_err_exit:
|
||||
if (len == 0) {
|
||||
if (skb)
|
||||
dev_kfree_skb_any(skb);
|
||||
priv->stats.rx_errors++;
|
||||
priv->stats.rx_dropped++;
|
||||
return -EIO;
|
||||
} else {
|
||||
return len;
|
||||
}
|
||||
}
|
||||
|
||||
int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
|
||||
{
|
||||
int ret = 0;
|
||||
struct ifxmips_mii_priv *priv = netdev_priv(dev);
|
||||
struct dma_device_info *dma_dev = priv->dma_device;
|
||||
ret = dma_device_write(dma_dev, buf, len, priv->skb);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
||||
{
|
||||
int len;
|
||||
char *data;
|
||||
struct ifxmips_mii_priv *priv = netdev_priv(dev);
|
||||
struct dma_device_info *dma_dev = priv->dma_device;
|
||||
|
||||
len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
|
||||
data = skb->data;
|
||||
priv->skb = skb;
|
||||
dev->trans_start = jiffies;
|
||||
/* TODO: we got more than 1 dma channel,
|
||||
so we should do something intelligent here to select one */
|
||||
dma_dev->current_tx_chan = 0;
|
||||
|
||||
wmb();
|
||||
|
||||
if (ifxmips_mii_hw_tx(data, len, dev) != len) {
|
||||
dev_kfree_skb_any(skb);
|
||||
priv->stats.tx_errors++;
|
||||
priv->stats.tx_dropped++;
|
||||
} else {
|
||||
priv->stats.tx_packets++;
|
||||
priv->stats.tx_bytes += len;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ifxmips_mii_tx_timeout(struct net_device *dev)
|
||||
{
|
||||
int i;
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
|
||||
priv->stats.tx_errors++;
|
||||
for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
|
||||
priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
|
||||
netif_wake_queue(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
int dma_intr_handler(struct dma_device_info *dma_dev, int status)
|
||||
{
|
||||
int i;
|
||||
|
||||
switch (status) {
|
||||
case RCV_INT:
|
||||
ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
|
||||
break;
|
||||
|
||||
case TX_BUF_FULL_INT:
|
||||
printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
|
||||
netif_stop_queue(ifxmips_mii0_dev);
|
||||
for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
|
||||
if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||
dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
|
||||
}
|
||||
break;
|
||||
|
||||
case TRANSMIT_CPT_INT:
|
||||
for (i = 0; i < dma_dev->max_tx_chan_num; i++)
|
||||
dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
|
||||
|
||||
netif_wake_queue(ifxmips_mii0_dev);
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
||||
{
|
||||
unsigned char *buffer = NULL;
|
||||
struct sk_buff *skb = NULL;
|
||||
|
||||
skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
|
||||
if (skb == NULL)
|
||||
return NULL;
|
||||
|
||||
buffer = (unsigned char *)(skb->data);
|
||||
skb_reserve(skb, 2);
|
||||
*(int *)opt = (int)skb;
|
||||
*byte_offset = 2;
|
||||
|
||||
return buffer;
|
||||
}
|
||||
|
||||
void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
|
||||
{
|
||||
struct sk_buff *skb = NULL;
|
||||
|
||||
if (opt == NULL) {
|
||||
kfree(dataptr);
|
||||
} else {
|
||||
skb = (struct sk_buff *)opt;
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
}
|
||||
|
||||
static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
|
||||
{
|
||||
return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats;
|
||||
}
|
||||
|
||||
static int ifxmips_mii_dev_init(struct net_device *dev)
|
||||
{
|
||||
int i;
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
ether_setup(dev);
|
||||
printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
|
||||
dev->open = ifxmips_ifxmips_mii_open;
|
||||
dev->stop = ifxmips_mii_release;
|
||||
dev->hard_start_xmit = ifxmips_mii_tx;
|
||||
dev->get_stats = ifxmips_get_stats;
|
||||
dev->tx_timeout = ifxmips_mii_tx_timeout;
|
||||
dev->watchdog_timeo = 10 * HZ;
|
||||
memset(priv, 0, sizeof(struct ifxmips_mii_priv));
|
||||
priv->dma_device = dma_device_reserve("PPE");
|
||||
if (!priv->dma_device) {
|
||||
BUG();
|
||||
return -ENODEV;
|
||||
}
|
||||
priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
|
||||
priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
|
||||
priv->dma_device->intr_handler = &dma_intr_handler;
|
||||
priv->dma_device->max_rx_chan_num = 4;
|
||||
|
||||
for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
|
||||
priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
|
||||
priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
||||
}
|
||||
|
||||
for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
|
||||
if (i == 0)
|
||||
priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
||||
else
|
||||
priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
|
||||
|
||||
dma_device_register(priv->dma_device);
|
||||
|
||||
printk(KERN_INFO "ifxmips_mii0: using mac=");
|
||||
for (i = 0; i < 6; i++) {
|
||||
dev->dev_addr[i] = mac_addr[i];
|
||||
printk("%02X%c", dev->dev_addr[i], (i == 5) ? ('\n') : (':'));
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ifxmips_mii_chip_init(int mode)
|
||||
{
|
||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
|
||||
|
||||
if (mode == REV_MII_MODE)
|
||||
ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
|
||||
else if (mode == MII_MODE)
|
||||
ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
|
||||
ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
|
||||
ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
|
||||
wmb();
|
||||
}
|
||||
|
||||
static int ifxmips_mii_probe(struct platform_device *dev)
|
||||
{
|
||||
int result = 0;
|
||||
unsigned char *mac = (unsigned char *)dev->dev.platform_data;
|
||||
ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
|
||||
ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
|
||||
memcpy(mac_addr, mac, 6);
|
||||
strcpy(ifxmips_mii0_dev->name, "eth%d");
|
||||
ifxmips_mii_chip_init(REV_MII_MODE);
|
||||
result = register_netdev(ifxmips_mii0_dev);
|
||||
if (result) {
|
||||
printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
|
||||
goto out;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
|
||||
|
||||
out:
|
||||
return result;
|
||||
}
|
||||
|
||||
static int ifxmips_mii_remove(struct platform_device *dev)
|
||||
{
|
||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(ifxmips_mii0_dev);
|
||||
|
||||
printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
|
||||
|
||||
dma_device_unregister(priv->dma_device);
|
||||
dma_device_release(priv->dma_device);
|
||||
kfree(priv->dma_device);
|
||||
unregister_netdev(ifxmips_mii0_dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver ifxmips_mii_driver = {
|
||||
.probe = ifxmips_mii_probe,
|
||||
.remove = ifxmips_mii_remove,
|
||||
.driver = {
|
||||
.name = "ifxmips_mii0",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
int __init ifxmips_mii_init(void)
|
||||
{
|
||||
int ret = platform_driver_register(&ifxmips_mii_driver);
|
||||
if (ret)
|
||||
printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit ifxmips_mii_cleanup(void)
|
||||
{
|
||||
platform_driver_unregister(&ifxmips_mii_driver);
|
||||
}
|
||||
|
||||
module_init(ifxmips_mii_init);
|
||||
module_exit(ifxmips_mii_cleanup);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
MODULE_DESCRIPTION("ethernet driver for IFXMIPS boards");
|
||||
|
||||
@ -1,561 +0,0 @@
|
||||
/*
|
||||
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Copyright (C) 2004 Infineon IFAP DC COM CPE
|
||||
* Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
|
||||
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/tty_flip.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/fcntl.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/circ_buf.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/sysrq.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
|
||||
#include <ifxmips.h>
|
||||
#include <ifxmips_irq.h>
|
||||
|
||||
#define PORT_IFXMIPSASC 111
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
|
||||
#define UART_DUMMY_UER_RX 1
|
||||
|
||||
static void ifxmipsasc_tx_chars(struct uart_port *port);
|
||||
extern void prom_printf(const char *fmt, ...);
|
||||
static struct uart_port ifxmipsasc_port[2];
|
||||
static struct uart_driver ifxmipsasc_reg;
|
||||
extern unsigned int ifxmips_get_fpi_hz(void);
|
||||
|
||||
static void ifxmipsasc_stop_tx(struct uart_port *port)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static void ifxmipsasc_start_tx(struct uart_port *port)
|
||||
{
|
||||
unsigned long flags;
|
||||
local_irq_save(flags);
|
||||
ifxmipsasc_tx_chars(port);
|
||||
local_irq_restore(flags);
|
||||
return;
|
||||
}
|
||||
|
||||
static void ifxmipsasc_stop_rx(struct uart_port *port)
|
||||
{
|
||||
ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
}
|
||||
|
||||
static void ifxmipsasc_enable_ms(struct uart_port *port)
|
||||
{
|
||||
}
|
||||
|
||||
#include <linux/version.h>
|
||||
|
||||
static void ifxmipsasc_rx_chars(struct uart_port *port)
|
||||
{
|
||||
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
|
||||
struct tty_struct *tty = port->info->port.tty;
|
||||
#else
|
||||
struct tty_struct *tty = port->info->tty;
|
||||
#endif
|
||||
unsigned int ch = 0, rsr = 0, fifocnt;
|
||||
|
||||
fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
|
||||
while (fifocnt--) {
|
||||
u8 flag = TTY_NORMAL;
|
||||
ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
|
||||
rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
|
||||
tty_flip_buffer_push(tty);
|
||||
port->icount.rx++;
|
||||
|
||||
/*
|
||||
* Note that the error handling code is
|
||||
* out of the main execution path
|
||||
*/
|
||||
if (rsr & ASCSTATE_ANY) {
|
||||
if (rsr & ASCSTATE_PE) {
|
||||
port->icount.parity++;
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
} else if (rsr & ASCSTATE_FE) {
|
||||
port->icount.frame++;
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
}
|
||||
if (rsr & ASCSTATE_ROE) {
|
||||
port->icount.overrun++;
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
}
|
||||
|
||||
rsr &= port->read_status_mask;
|
||||
|
||||
if (rsr & ASCSTATE_PE)
|
||||
flag = TTY_PARITY;
|
||||
else if (rsr & ASCSTATE_FE)
|
||||
flag = TTY_FRAME;
|
||||
}
|
||||
|
||||
if ((rsr & port->ignore_status_mask) == 0)
|
||||
tty_insert_flip_char(tty, ch, flag);
|
||||
|
||||
if (rsr & ASCSTATE_ROE)
|
||||
/*
|
||||
* Overrun is special, since it's reported
|
||||
* immediately, and doesn't affect the current
|
||||
* character
|
||||
*/
|
||||
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
}
|
||||
if (ch != 0)
|
||||
tty_flip_buffer_push(tty);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
static void ifxmipsasc_tx_chars(struct uart_port *port)
|
||||
{
|
||||
struct circ_buf *xmit = &port->info->xmit;
|
||||
if (uart_tx_stopped(port)) {
|
||||
ifxmipsasc_stop_tx(port);
|
||||
return;
|
||||
}
|
||||
|
||||
while (((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
|
||||
>> ASCFSTAT_TXFFLOFF) != TXFIFO_FULL) {
|
||||
if (port->x_char) {
|
||||
ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
|
||||
port->icount.tx++;
|
||||
port->x_char = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (uart_circ_empty(xmit))
|
||||
break;
|
||||
|
||||
ifxmips_w32(port->info->xmit.buf[port->info->xmit.tail], port->membase + IFXMIPS_ASC_TBUF);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
port->icount.tx++;
|
||||
}
|
||||
|
||||
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
uart_write_wakeup(port);
|
||||
}
|
||||
|
||||
static irqreturn_t ifxmipsasc_tx_int(int irq, void *_port)
|
||||
{
|
||||
struct uart_port *port = (struct uart_port *)_port;
|
||||
ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||
ifxmipsasc_start_tx(port);
|
||||
ifxmips_mask_and_ack_irq(irq);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static irqreturn_t ifxmipsasc_er_int(int irq, void *_port)
|
||||
{
|
||||
struct uart_port *port = (struct uart_port *)_port;
|
||||
/* clear any pending interrupts */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE |
|
||||
ASCWHBSTATE_CLRFE | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static irqreturn_t ifxmipsasc_rx_int(int irq, void *_port)
|
||||
{
|
||||
struct uart_port *port = (struct uart_port *)_port;
|
||||
ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||
ifxmipsasc_rx_chars((struct uart_port *)port);
|
||||
ifxmips_mask_and_ack_irq(irq);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static unsigned int ifxmipsasc_tx_empty(struct uart_port *port)
|
||||
{
|
||||
int status;
|
||||
status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
|
||||
return status ? 0 : TIOCSER_TEMT;
|
||||
}
|
||||
|
||||
static unsigned int ifxmipsasc_get_mctrl(struct uart_port *port)
|
||||
{
|
||||
return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
|
||||
}
|
||||
|
||||
static void ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
|
||||
{
|
||||
}
|
||||
|
||||
static void ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
|
||||
{
|
||||
}
|
||||
|
||||
static int ifxmipsasc_startup(struct uart_port *port)
|
||||
{
|
||||
unsigned long flags;
|
||||
int retval;
|
||||
|
||||
port->uartclk = ifxmips_get_fpi_hz();
|
||||
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
|
||||
ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
|
||||
ifxmips_w32(0, port->membase + IFXMIPS_ASC_PISEL);
|
||||
ifxmips_w32(((TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
ifxmips_w32(((RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
wmb();
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
|
||||
if (retval) {
|
||||
printk(KERN_ERR "failed to request ifxmipsasc_tx_int\n");
|
||||
return retval;
|
||||
}
|
||||
|
||||
retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
|
||||
if (retval) {
|
||||
printk(KERN_ERR "failed to request ifxmipsasc_rx_int\n");
|
||||
goto err1;
|
||||
}
|
||||
|
||||
retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
|
||||
if (retval) {
|
||||
printk(KERN_ERR "failed to request ifxmipsasc_er_int\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
ifxmips_w32(ASC_IRNREN_RX_BUF | ASC_IRNREN_TX_BUF | ASC_IRNREN_ERR | ASC_IRNREN_TX, port->membase + IFXMIPS_ASC_IRNREN);
|
||||
|
||||
local_irq_restore(flags);
|
||||
return 0;
|
||||
|
||||
err2:
|
||||
free_irq(port->irq + 2, port);
|
||||
err1:
|
||||
free_irq(port->irq, port);
|
||||
local_irq_restore(flags);
|
||||
return retval;
|
||||
}
|
||||
|
||||
static void ifxmipsasc_shutdown(struct uart_port *port)
|
||||
{
|
||||
free_irq(port->irq, port);
|
||||
free_irq(port->irq + 2, port);
|
||||
free_irq(port->irq + 3, port);
|
||||
|
||||
ifxmips_w32(0, port->membase + IFXMIPS_ASC_CON);
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) & ~ASCRXFCON_RXFEN, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) & ~ASCTXFCON_TXFEN, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
}
|
||||
|
||||
static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
|
||||
{
|
||||
unsigned int cflag;
|
||||
unsigned int iflag;
|
||||
unsigned int quot;
|
||||
unsigned int baud;
|
||||
unsigned int con = 0;
|
||||
unsigned long flags;
|
||||
|
||||
cflag = new->c_cflag;
|
||||
iflag = new->c_iflag;
|
||||
|
||||
switch (cflag & CSIZE) {
|
||||
case CS7:
|
||||
con = ASCCON_M_7ASYNC;
|
||||
break;
|
||||
|
||||
case CS5:
|
||||
case CS6:
|
||||
default:
|
||||
con = ASCCON_M_8ASYNC;
|
||||
break;
|
||||
}
|
||||
|
||||
if (cflag & CSTOPB)
|
||||
con |= ASCCON_STP;
|
||||
|
||||
if (cflag & PARENB) {
|
||||
if (!(cflag & PARODD))
|
||||
con &= ~ASCCON_ODD;
|
||||
else
|
||||
con |= ASCCON_ODD;
|
||||
}
|
||||
|
||||
port->read_status_mask = ASCSTATE_ROE;
|
||||
if (iflag & INPCK)
|
||||
port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
||||
|
||||
port->ignore_status_mask = 0;
|
||||
if (iflag & IGNPAR)
|
||||
port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
||||
|
||||
if (iflag & IGNBRK) {
|
||||
/*
|
||||
* If we're ignoring parity and break indicators,
|
||||
* ignore overruns too (for real raw support).
|
||||
*/
|
||||
if (iflag & IGNPAR)
|
||||
port->ignore_status_mask |= ASCSTATE_ROE;
|
||||
}
|
||||
|
||||
if ((cflag & CREAD) == 0)
|
||||
port->ignore_status_mask |= UART_DUMMY_UER_RX;
|
||||
|
||||
/* set error signals - framing, parity and overrun, enable receiver */
|
||||
con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
/* set up CON */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | con, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
/* Set baud rate - take a divider of 2 into account */
|
||||
baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
quot = quot / 2 - 1;
|
||||
|
||||
/* disable the baudrate generator */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_R, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
/* make sure the fractional divider is off */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_FDE, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
/* set up to use divisor of 2 */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_BRS, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
/* now we can write the new baudrate into the register */
|
||||
ifxmips_w32(quot, port->membase + IFXMIPS_ASC_BG);
|
||||
|
||||
/* turn the baudrate generator back on */
|
||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_R, port->membase + IFXMIPS_ASC_CON);
|
||||
|
||||
/* enable rx */
|
||||
ifxmips_w32(ASCWHBSTATE_SETREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static const char *ifxmipsasc_type(struct uart_port *port)
|
||||
{
|
||||
if (port->type == PORT_IFXMIPSASC) {
|
||||
if (port->membase == (void *)IFXMIPS_ASC_BASE_ADDR)
|
||||
return "asc0";
|
||||
else
|
||||
return "asc1";
|
||||
} else {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static void ifxmipsasc_release_port(struct uart_port *port)
|
||||
{
|
||||
}
|
||||
|
||||
static int ifxmipsasc_request_port(struct uart_port *port)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ifxmipsasc_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
if (flags & UART_CONFIG_TYPE) {
|
||||
port->type = PORT_IFXMIPSASC;
|
||||
ifxmipsasc_request_port(port);
|
||||
}
|
||||
}
|
||||
|
||||
static int ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
{
|
||||
int ret = 0;
|
||||
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
|
||||
ret = -EINVAL;
|
||||
if (ser->irq < 0 || ser->irq >= NR_IRQS)
|
||||
ret = -EINVAL;
|
||||
if (ser->baud_base < 9600)
|
||||
ret = -EINVAL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct uart_ops ifxmipsasc_pops = {
|
||||
.tx_empty = ifxmipsasc_tx_empty,
|
||||
.set_mctrl = ifxmipsasc_set_mctrl,
|
||||
.get_mctrl = ifxmipsasc_get_mctrl,
|
||||
.stop_tx = ifxmipsasc_stop_tx,
|
||||
.start_tx = ifxmipsasc_start_tx,
|
||||
.stop_rx = ifxmipsasc_stop_rx,
|
||||
.enable_ms = ifxmipsasc_enable_ms,
|
||||
.break_ctl = ifxmipsasc_break_ctl,
|
||||
.startup = ifxmipsasc_startup,
|
||||
.shutdown = ifxmipsasc_shutdown,
|
||||
.set_termios = ifxmipsasc_set_termios,
|
||||
.type = ifxmipsasc_type,
|
||||
.release_port = ifxmipsasc_release_port,
|
||||
.request_port = ifxmipsasc_request_port,
|
||||
.config_port = ifxmipsasc_config_port,
|
||||
.verify_port = ifxmipsasc_verify_port,
|
||||
};
|
||||
|
||||
static struct uart_port ifxmipsasc_port[2] = {
|
||||
{
|
||||
.membase = (void *)IFXMIPS_ASC_BASE_ADDR,
|
||||
.mapbase = IFXMIPS_ASC_BASE_ADDR,
|
||||
.iotype = SERIAL_IO_MEM,
|
||||
.irq = IFXMIPSASC_TIR(0),
|
||||
.uartclk = 0,
|
||||
.fifosize = 16,
|
||||
.type = PORT_IFXMIPSASC,
|
||||
.ops = &ifxmipsasc_pops,
|
||||
.flags = ASYNC_BOOT_AUTOCONF,
|
||||
.line = 0
|
||||
}, {
|
||||
.membase = (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
|
||||
.mapbase = IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
|
||||
.iotype = SERIAL_IO_MEM,
|
||||
.irq = IFXMIPSASC_TIR(1),
|
||||
.uartclk = 0,
|
||||
.fifosize = 16,
|
||||
.type = PORT_IFXMIPSASC,
|
||||
.ops = &ifxmipsasc_pops,
|
||||
.flags = ASYNC_BOOT_AUTOCONF,
|
||||
.line = 1
|
||||
}
|
||||
};
|
||||
|
||||
static void ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
||||
{
|
||||
int port = co->index;
|
||||
int i, fifocnt;
|
||||
unsigned long flags;
|
||||
local_irq_save(flags);
|
||||
for (i = 0; i < count; i++) {
|
||||
do {
|
||||
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||
>> ASCFSTAT_TXFFLOFF;
|
||||
} while (fifocnt == TXFIFO_FULL);
|
||||
|
||||
if (s[i] == '\0')
|
||||
break;
|
||||
|
||||
if (s[i] == '\n') {
|
||||
ifxmips_w32('\r', (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
||||
do {
|
||||
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||
>> ASCFSTAT_TXFFLOFF;
|
||||
} while (fifocnt == TXFIFO_FULL);
|
||||
}
|
||||
ifxmips_w32(s[i], (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static int __init ifxmipsasc_console_setup(struct console *co, char *options)
|
||||
{
|
||||
int port = co->index;
|
||||
int baud = 115200;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
ifxmipsasc_port[port].uartclk = ifxmips_get_fpi_hz();
|
||||
ifxmipsasc_port[port].type = PORT_IFXMIPSASC;
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
return uart_set_options(&ifxmipsasc_port[port], co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct console ifxmipsasc_console[2] =
|
||||
{
|
||||
{
|
||||
.name = "ttyS",
|
||||
.write = ifxmipsasc_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = ifxmipsasc_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = 0,
|
||||
.data = &ifxmipsasc_reg,
|
||||
}, {
|
||||
.name = "ttyS",
|
||||
.write = ifxmipsasc_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = ifxmipsasc_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = 1,
|
||||
.data = &ifxmipsasc_reg,
|
||||
}
|
||||
};
|
||||
|
||||
static int __init ifxmipsasc_console_init(void)
|
||||
{
|
||||
register_console(&ifxmipsasc_console[0]);
|
||||
register_console(&ifxmipsasc_console[1]);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(ifxmipsasc_console_init);
|
||||
|
||||
static struct uart_driver ifxmipsasc_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = "serial",
|
||||
.dev_name = "ttyS",
|
||||
.major = TTY_MAJOR,
|
||||
.minor = 64,
|
||||
.nr = 2,
|
||||
.cons = &ifxmipsasc_console[1],
|
||||
};
|
||||
|
||||
int __init ifxmipsasc_init(void)
|
||||
{
|
||||
int ret;
|
||||
uart_register_driver(&ifxmipsasc_reg);
|
||||
ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
|
||||
ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __exit ifxmipsasc_exit(void)
|
||||
{
|
||||
uart_unregister_driver(&ifxmipsasc_reg);
|
||||
}
|
||||
|
||||
module_init(ifxmipsasc_init);
|
||||
module_exit(ifxmipsasc_exit);
|
||||
|
||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -1,195 +0,0 @@
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
* Based on EP93xx wdt driver
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/miscdevice.h>
|
||||
#include <linux/miscdevice.h>
|
||||
#include <linux/watchdog.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include <ifxmips.h>
|
||||
#include <ifxmips_cgu.h>
|
||||
|
||||
#define IFXMIPS_WDT_PW1 0x00BE0000
|
||||
#define IFXMIPS_WDT_PW2 0x00DC0000
|
||||
|
||||
#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
static int wdt_ok_to_close;
|
||||
#endif
|
||||
|
||||
static int wdt_timeout = 30;
|
||||
|
||||
int ifxmips_wdt_enable(unsigned int timeout)
|
||||
{
|
||||
u32 fpi;
|
||||
fpi = cgu_get_io_region_clock();
|
||||
ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
|
||||
ifxmips_w32(IFXMIPS_WDT_PW2 |
|
||||
(0x3 << 26) | /* PWL */
|
||||
(0x3 << 24) | /* CLKDIV */
|
||||
(0x1 << 31) | /* enable */
|
||||
((timeout * (fpi / 0x40000)) + 0x1000), /* reload */
|
||||
IFXMIPS_BIU_WDT_CR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ifxmips_wdt_disable(void)
|
||||
{
|
||||
#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
wdt_ok_to_close = 0;
|
||||
#endif
|
||||
ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
|
||||
ifxmips_w32(IFXMIPS_WDT_PW2, IFXMIPS_BIU_WDT_CR);
|
||||
}
|
||||
|
||||
static ssize_t ifxmips_wdt_write(struct file *file, const char __user *data,
|
||||
size_t len, loff_t *ppos)
|
||||
{
|
||||
size_t i;
|
||||
|
||||
if (!len)
|
||||
return 0;
|
||||
|
||||
#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
for (i = 0; i != len; i++) {
|
||||
char c;
|
||||
if (get_user(c, data + i))
|
||||
return -EFAULT;
|
||||
if (c == 'V')
|
||||
wdt_ok_to_close = 1;
|
||||
}
|
||||
#endif
|
||||
ifxmips_wdt_enable(wdt_timeout);
|
||||
return len;
|
||||
}
|
||||
|
||||
static struct watchdog_info ident = {
|
||||
.options = WDIOF_MAGICCLOSE,
|
||||
.identity = "ifxmips Watchdog",
|
||||
};
|
||||
|
||||
static int ifxmips_wdt_ioctl(struct inode *inode, struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
int ret = -ENOTTY;
|
||||
|
||||
switch (cmd) {
|
||||
case WDIOC_GETSUPPORT:
|
||||
ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
|
||||
sizeof(ident)) ? -EFAULT : 0;
|
||||
break;
|
||||
|
||||
case WDIOC_GETTIMEOUT:
|
||||
ret = put_user(wdt_timeout, (int __user *)arg);
|
||||
break;
|
||||
|
||||
case WDIOC_SETTIMEOUT:
|
||||
ret = get_user(wdt_timeout, (int __user *)arg);
|
||||
break;
|
||||
|
||||
case WDIOC_KEEPALIVE:
|
||||
ifxmips_wdt_enable(wdt_timeout);
|
||||
ret = 0;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ifxmips_wdt_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
ifxmips_wdt_enable(wdt_timeout);
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
static int ifxmips_wdt_release(struct inode *inode, struct file *file)
|
||||
{
|
||||
#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
if (wdt_ok_to_close)
|
||||
ifxmips_wdt_disable();
|
||||
else
|
||||
#endif
|
||||
printk(KERN_ERR "ifxmips_wdt: watchdog closed without warning,"
|
||||
" rebooting system\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct file_operations ifxmips_wdt_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.write = ifxmips_wdt_write,
|
||||
.ioctl = ifxmips_wdt_ioctl,
|
||||
.open = ifxmips_wdt_open,
|
||||
.release = ifxmips_wdt_release,
|
||||
};
|
||||
|
||||
static struct miscdevice ifxmips_wdt_miscdev = {
|
||||
.minor = WATCHDOG_MINOR,
|
||||
.name = "watchdog",
|
||||
.fops = &ifxmips_wdt_fops,
|
||||
};
|
||||
|
||||
static int ifxmips_wdt_probe(struct platform_device *dev)
|
||||
{
|
||||
int err;
|
||||
err = misc_register(&ifxmips_wdt_miscdev);
|
||||
if (err)
|
||||
printk(KERN_INFO "ifxmips_wdt: error creating device\n");
|
||||
else
|
||||
printk(KERN_INFO "ifxmips_wdt: loaded\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
static int ifxmips_wdt_remove(struct platform_device *dev)
|
||||
{
|
||||
ifxmips_wdt_disable();
|
||||
misc_deregister(&ifxmips_wdt_miscdev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static struct platform_driver ifxmips_wdt_driver = {
|
||||
.probe = ifxmips_wdt_probe,
|
||||
.remove = ifxmips_wdt_remove,
|
||||
.driver = {
|
||||
.name = "ifxmips_wdt",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init init_ifxmips_wdt(void)
|
||||
{
|
||||
int ret = platform_driver_register(&ifxmips_wdt_driver);
|
||||
if (ret)
|
||||
printk(KERN_INFO "ifxmips_wdt: error registering platfom driver!");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit exit_ifxmips_wdt(void)
|
||||
{
|
||||
platform_driver_unregister(&ifxmips_wdt_driver);
|
||||
}
|
||||
|
||||
module_init(init_ifxmips_wdt);
|
||||
module_exit(exit_ifxmips_wdt);
|
||||
|
||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
MODULE_DESCRIPTION("ifxmips Watchdog");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
||||
@ -1,7 +1,7 @@
|
||||
Index: linux-2.6.30.5/drivers/serial/Kconfig
|
||||
Index: linux-2.6.30.8/drivers/serial/Kconfig
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/serial/Kconfig 2009-08-16 23:19:38.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/serial/Kconfig 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/serial/Kconfig 2009-09-24 17:28:02.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/serial/Kconfig 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -1365,6 +1365,14 @@
|
||||
help
|
||||
Support for Console on the NWP serial ports.
|
||||
@ -17,12 +17,578 @@ Index: linux-2.6.30.5/drivers/serial/Kconfig
|
||||
config SERIAL_QE
|
||||
tristate "Freescale QUICC Engine serial port support"
|
||||
depends on QUICC_ENGINE
|
||||
Index: linux-2.6.30.5/drivers/serial/Makefile
|
||||
Index: linux-2.6.30.8/drivers/serial/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/serial/Makefile 2009-08-16 23:19:38.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/serial/Makefile 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/serial/Makefile 2009-09-24 17:28:02.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/serial/Makefile 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -77,3 +77,4 @@
|
||||
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
|
||||
obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
|
||||
obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
|
||||
+obj-$(CONFIG_SERIAL_IFXMIPS) += ifxmips_asc.o
|
||||
Index: linux-2.6.30.8/drivers/serial/ifxmips_asc.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ linux-2.6.30.8/drivers/serial/ifxmips_asc.c 2009-10-19 21:41:27.000000000 +0200
|
||||
@@ -0,0 +1,561 @@
|
||||
+/*
|
||||
+ * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
+ *
|
||||
+ * Copyright (C) 2004 Infineon IFAP DC COM CPE
|
||||
+ * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
|
||||
+ * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/signal.h>
|
||||
+#include <linux/sched.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/tty.h>
|
||||
+#include <linux/tty_flip.h>
|
||||
+#include <linux/major.h>
|
||||
+#include <linux/string.h>
|
||||
+#include <linux/fcntl.h>
|
||||
+#include <linux/ptrace.h>
|
||||
+#include <linux/ioport.h>
|
||||
+#include <linux/mm.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/circ_buf.h>
|
||||
+#include <linux/serial.h>
|
||||
+#include <linux/serial_core.h>
|
||||
+#include <linux/console.h>
|
||||
+#include <linux/sysrq.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/uaccess.h>
|
||||
+#include <linux/bitops.h>
|
||||
+
|
||||
+#include <asm/system.h>
|
||||
+
|
||||
+#include <ifxmips.h>
|
||||
+#include <ifxmips_irq.h>
|
||||
+
|
||||
+#define PORT_IFXMIPSASC 111
|
||||
+
|
||||
+#include <linux/serial_core.h>
|
||||
+
|
||||
+#define UART_DUMMY_UER_RX 1
|
||||
+
|
||||
+static void ifxmipsasc_tx_chars(struct uart_port *port);
|
||||
+extern void prom_printf(const char *fmt, ...);
|
||||
+static struct uart_port ifxmipsasc_port[2];
|
||||
+static struct uart_driver ifxmipsasc_reg;
|
||||
+extern unsigned int ifxmips_get_fpi_hz(void);
|
||||
+
|
||||
+static void ifxmipsasc_stop_tx(struct uart_port *port)
|
||||
+{
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_start_tx(struct uart_port *port)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+ local_irq_save(flags);
|
||||
+ ifxmipsasc_tx_chars(port);
|
||||
+ local_irq_restore(flags);
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_stop_rx(struct uart_port *port)
|
||||
+{
|
||||
+ ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_enable_ms(struct uart_port *port)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
+#include <linux/version.h>
|
||||
+
|
||||
+static void ifxmipsasc_rx_chars(struct uart_port *port)
|
||||
+{
|
||||
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
|
||||
+ struct tty_struct *tty = port->info->port.tty;
|
||||
+#else
|
||||
+ struct tty_struct *tty = port->info->tty;
|
||||
+#endif
|
||||
+ unsigned int ch = 0, rsr = 0, fifocnt;
|
||||
+
|
||||
+ fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
|
||||
+ while (fifocnt--) {
|
||||
+ u8 flag = TTY_NORMAL;
|
||||
+ ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
|
||||
+ rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
|
||||
+ tty_flip_buffer_push(tty);
|
||||
+ port->icount.rx++;
|
||||
+
|
||||
+ /*
|
||||
+ * Note that the error handling code is
|
||||
+ * out of the main execution path
|
||||
+ */
|
||||
+ if (rsr & ASCSTATE_ANY) {
|
||||
+ if (rsr & ASCSTATE_PE) {
|
||||
+ port->icount.parity++;
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+ } else if (rsr & ASCSTATE_FE) {
|
||||
+ port->icount.frame++;
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+ }
|
||||
+ if (rsr & ASCSTATE_ROE) {
|
||||
+ port->icount.overrun++;
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+ }
|
||||
+
|
||||
+ rsr &= port->read_status_mask;
|
||||
+
|
||||
+ if (rsr & ASCSTATE_PE)
|
||||
+ flag = TTY_PARITY;
|
||||
+ else if (rsr & ASCSTATE_FE)
|
||||
+ flag = TTY_FRAME;
|
||||
+ }
|
||||
+
|
||||
+ if ((rsr & port->ignore_status_mask) == 0)
|
||||
+ tty_insert_flip_char(tty, ch, flag);
|
||||
+
|
||||
+ if (rsr & ASCSTATE_ROE)
|
||||
+ /*
|
||||
+ * Overrun is special, since it's reported
|
||||
+ * immediately, and doesn't affect the current
|
||||
+ * character
|
||||
+ */
|
||||
+ tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
||||
+ }
|
||||
+ if (ch != 0)
|
||||
+ tty_flip_buffer_push(tty);
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static void ifxmipsasc_tx_chars(struct uart_port *port)
|
||||
+{
|
||||
+ struct circ_buf *xmit = &port->info->xmit;
|
||||
+ if (uart_tx_stopped(port)) {
|
||||
+ ifxmipsasc_stop_tx(port);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ while (((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
|
||||
+ >> ASCFSTAT_TXFFLOFF) != TXFIFO_FULL) {
|
||||
+ if (port->x_char) {
|
||||
+ ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
|
||||
+ port->icount.tx++;
|
||||
+ port->x_char = 0;
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ if (uart_circ_empty(xmit))
|
||||
+ break;
|
||||
+
|
||||
+ ifxmips_w32(port->info->xmit.buf[port->info->xmit.tail], port->membase + IFXMIPS_ASC_TBUF);
|
||||
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
+ port->icount.tx++;
|
||||
+ }
|
||||
+
|
||||
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
||||
+ uart_write_wakeup(port);
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t ifxmipsasc_tx_int(int irq, void *_port)
|
||||
+{
|
||||
+ struct uart_port *port = (struct uart_port *)_port;
|
||||
+ ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||
+ ifxmipsasc_start_tx(port);
|
||||
+ ifxmips_mask_and_ack_irq(irq);
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t ifxmipsasc_er_int(int irq, void *_port)
|
||||
+{
|
||||
+ struct uart_port *port = (struct uart_port *)_port;
|
||||
+ /* clear any pending interrupts */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE |
|
||||
+ ASCWHBSTATE_CLRFE | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t ifxmipsasc_rx_int(int irq, void *_port)
|
||||
+{
|
||||
+ struct uart_port *port = (struct uart_port *)_port;
|
||||
+ ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||
+ ifxmipsasc_rx_chars((struct uart_port *)port);
|
||||
+ ifxmips_mask_and_ack_irq(irq);
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static unsigned int ifxmipsasc_tx_empty(struct uart_port *port)
|
||||
+{
|
||||
+ int status;
|
||||
+ status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
|
||||
+ return status ? 0 : TIOCSER_TEMT;
|
||||
+}
|
||||
+
|
||||
+static unsigned int ifxmipsasc_get_mctrl(struct uart_port *port)
|
||||
+{
|
||||
+ return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
+static int ifxmipsasc_startup(struct uart_port *port)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+ int retval;
|
||||
+
|
||||
+ port->uartclk = ifxmips_get_fpi_hz();
|
||||
+
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
|
||||
+ ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
|
||||
+ ifxmips_w32(0, port->membase + IFXMIPS_ASC_PISEL);
|
||||
+ ifxmips_w32(((TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
+ ifxmips_w32(((RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
+ wmb();
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+
|
||||
+ retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
|
||||
+ if (retval) {
|
||||
+ printk(KERN_ERR "failed to request ifxmipsasc_tx_int\n");
|
||||
+ return retval;
|
||||
+ }
|
||||
+
|
||||
+ retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
|
||||
+ if (retval) {
|
||||
+ printk(KERN_ERR "failed to request ifxmipsasc_rx_int\n");
|
||||
+ goto err1;
|
||||
+ }
|
||||
+
|
||||
+ retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
|
||||
+ if (retval) {
|
||||
+ printk(KERN_ERR "failed to request ifxmipsasc_er_int\n");
|
||||
+ goto err2;
|
||||
+ }
|
||||
+
|
||||
+ ifxmips_w32(ASC_IRNREN_RX_BUF | ASC_IRNREN_TX_BUF | ASC_IRNREN_ERR | ASC_IRNREN_TX, port->membase + IFXMIPS_ASC_IRNREN);
|
||||
+
|
||||
+ local_irq_restore(flags);
|
||||
+ return 0;
|
||||
+
|
||||
+err2:
|
||||
+ free_irq(port->irq + 2, port);
|
||||
+err1:
|
||||
+ free_irq(port->irq, port);
|
||||
+ local_irq_restore(flags);
|
||||
+ return retval;
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_shutdown(struct uart_port *port)
|
||||
+{
|
||||
+ free_irq(port->irq, port);
|
||||
+ free_irq(port->irq + 2, port);
|
||||
+ free_irq(port->irq + 3, port);
|
||||
+
|
||||
+ ifxmips_w32(0, port->membase + IFXMIPS_ASC_CON);
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) | ASCRXFCON_RXFFLU, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_RXFCON) & ~ASCRXFCON_RXFEN, port->membase + IFXMIPS_ASC_RXFCON);
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) | ASCTXFCON_TXFFLU, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_TXFCON) & ~ASCTXFCON_TXFEN, port->membase + IFXMIPS_ASC_TXFCON);
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
|
||||
+{
|
||||
+ unsigned int cflag;
|
||||
+ unsigned int iflag;
|
||||
+ unsigned int quot;
|
||||
+ unsigned int baud;
|
||||
+ unsigned int con = 0;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ cflag = new->c_cflag;
|
||||
+ iflag = new->c_iflag;
|
||||
+
|
||||
+ switch (cflag & CSIZE) {
|
||||
+ case CS7:
|
||||
+ con = ASCCON_M_7ASYNC;
|
||||
+ break;
|
||||
+
|
||||
+ case CS5:
|
||||
+ case CS6:
|
||||
+ default:
|
||||
+ con = ASCCON_M_8ASYNC;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ if (cflag & CSTOPB)
|
||||
+ con |= ASCCON_STP;
|
||||
+
|
||||
+ if (cflag & PARENB) {
|
||||
+ if (!(cflag & PARODD))
|
||||
+ con &= ~ASCCON_ODD;
|
||||
+ else
|
||||
+ con |= ASCCON_ODD;
|
||||
+ }
|
||||
+
|
||||
+ port->read_status_mask = ASCSTATE_ROE;
|
||||
+ if (iflag & INPCK)
|
||||
+ port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
||||
+
|
||||
+ port->ignore_status_mask = 0;
|
||||
+ if (iflag & IGNPAR)
|
||||
+ port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
||||
+
|
||||
+ if (iflag & IGNBRK) {
|
||||
+ /*
|
||||
+ * If we're ignoring parity and break indicators,
|
||||
+ * ignore overruns too (for real raw support).
|
||||
+ */
|
||||
+ if (iflag & IGNPAR)
|
||||
+ port->ignore_status_mask |= ASCSTATE_ROE;
|
||||
+ }
|
||||
+
|
||||
+ if ((cflag & CREAD) == 0)
|
||||
+ port->ignore_status_mask |= UART_DUMMY_UER_RX;
|
||||
+
|
||||
+ /* set error signals - framing, parity and overrun, enable receiver */
|
||||
+ con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+
|
||||
+ /* set up CON */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | con, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ /* Set baud rate - take a divider of 2 into account */
|
||||
+ baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
|
||||
+ quot = uart_get_divisor(port, baud);
|
||||
+ quot = quot / 2 - 1;
|
||||
+
|
||||
+ /* disable the baudrate generator */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_R, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ /* make sure the fractional divider is off */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_FDE, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ /* set up to use divisor of 2 */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) & ~ASCCON_BRS, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ /* now we can write the new baudrate into the register */
|
||||
+ ifxmips_w32(quot, port->membase + IFXMIPS_ASC_BG);
|
||||
+
|
||||
+ /* turn the baudrate generator back on */
|
||||
+ ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CON) | ASCCON_R, port->membase + IFXMIPS_ASC_CON);
|
||||
+
|
||||
+ /* enable rx */
|
||||
+ ifxmips_w32(ASCWHBSTATE_SETREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||
+
|
||||
+ local_irq_restore(flags);
|
||||
+}
|
||||
+
|
||||
+static const char *ifxmipsasc_type(struct uart_port *port)
|
||||
+{
|
||||
+ if (port->type == PORT_IFXMIPSASC) {
|
||||
+ if (port->membase == (void *)IFXMIPS_ASC_BASE_ADDR)
|
||||
+ return "asc0";
|
||||
+ else
|
||||
+ return "asc1";
|
||||
+ } else {
|
||||
+ return NULL;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_release_port(struct uart_port *port)
|
||||
+{
|
||||
+}
|
||||
+
|
||||
+static int ifxmipsasc_request_port(struct uart_port *port)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void ifxmipsasc_config_port(struct uart_port *port, int flags)
|
||||
+{
|
||||
+ if (flags & UART_CONFIG_TYPE) {
|
||||
+ port->type = PORT_IFXMIPSASC;
|
||||
+ ifxmipsasc_request_port(port);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
+{
|
||||
+ int ret = 0;
|
||||
+ if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
|
||||
+ ret = -EINVAL;
|
||||
+ if (ser->irq < 0 || ser->irq >= NR_IRQS)
|
||||
+ ret = -EINVAL;
|
||||
+ if (ser->baud_base < 9600)
|
||||
+ ret = -EINVAL;
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static struct uart_ops ifxmipsasc_pops = {
|
||||
+ .tx_empty = ifxmipsasc_tx_empty,
|
||||
+ .set_mctrl = ifxmipsasc_set_mctrl,
|
||||
+ .get_mctrl = ifxmipsasc_get_mctrl,
|
||||
+ .stop_tx = ifxmipsasc_stop_tx,
|
||||
+ .start_tx = ifxmipsasc_start_tx,
|
||||
+ .stop_rx = ifxmipsasc_stop_rx,
|
||||
+ .enable_ms = ifxmipsasc_enable_ms,
|
||||
+ .break_ctl = ifxmipsasc_break_ctl,
|
||||
+ .startup = ifxmipsasc_startup,
|
||||
+ .shutdown = ifxmipsasc_shutdown,
|
||||
+ .set_termios = ifxmipsasc_set_termios,
|
||||
+ .type = ifxmipsasc_type,
|
||||
+ .release_port = ifxmipsasc_release_port,
|
||||
+ .request_port = ifxmipsasc_request_port,
|
||||
+ .config_port = ifxmipsasc_config_port,
|
||||
+ .verify_port = ifxmipsasc_verify_port,
|
||||
+};
|
||||
+
|
||||
+static struct uart_port ifxmipsasc_port[2] = {
|
||||
+ {
|
||||
+ .membase = (void *)IFXMIPS_ASC_BASE_ADDR,
|
||||
+ .mapbase = IFXMIPS_ASC_BASE_ADDR,
|
||||
+ .iotype = SERIAL_IO_MEM,
|
||||
+ .irq = IFXMIPSASC_TIR(0),
|
||||
+ .uartclk = 0,
|
||||
+ .fifosize = 16,
|
||||
+ .type = PORT_IFXMIPSASC,
|
||||
+ .ops = &ifxmipsasc_pops,
|
||||
+ .flags = ASYNC_BOOT_AUTOCONF,
|
||||
+ .line = 0
|
||||
+ }, {
|
||||
+ .membase = (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
|
||||
+ .mapbase = IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
|
||||
+ .iotype = SERIAL_IO_MEM,
|
||||
+ .irq = IFXMIPSASC_TIR(1),
|
||||
+ .uartclk = 0,
|
||||
+ .fifosize = 16,
|
||||
+ .type = PORT_IFXMIPSASC,
|
||||
+ .ops = &ifxmipsasc_pops,
|
||||
+ .flags = ASYNC_BOOT_AUTOCONF,
|
||||
+ .line = 1
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static void ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
||||
+{
|
||||
+ int port = co->index;
|
||||
+ int i, fifocnt;
|
||||
+ unsigned long flags;
|
||||
+ local_irq_save(flags);
|
||||
+ for (i = 0; i < count; i++) {
|
||||
+ do {
|
||||
+ fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||
+ >> ASCFSTAT_TXFFLOFF;
|
||||
+ } while (fifocnt == TXFIFO_FULL);
|
||||
+
|
||||
+ if (s[i] == '\0')
|
||||
+ break;
|
||||
+
|
||||
+ if (s[i] == '\n') {
|
||||
+ ifxmips_w32('\r', (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
||||
+ do {
|
||||
+ fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||
+ >> ASCFSTAT_TXFFLOFF;
|
||||
+ } while (fifocnt == TXFIFO_FULL);
|
||||
+ }
|
||||
+ ifxmips_w32(s[i], (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
||||
+ }
|
||||
+
|
||||
+ local_irq_restore(flags);
|
||||
+}
|
||||
+
|
||||
+static int __init ifxmipsasc_console_setup(struct console *co, char *options)
|
||||
+{
|
||||
+ int port = co->index;
|
||||
+ int baud = 115200;
|
||||
+ int bits = 8;
|
||||
+ int parity = 'n';
|
||||
+ int flow = 'n';
|
||||
+ ifxmipsasc_port[port].uartclk = ifxmips_get_fpi_hz();
|
||||
+ ifxmipsasc_port[port].type = PORT_IFXMIPSASC;
|
||||
+ if (options)
|
||||
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
+ return uart_set_options(&ifxmipsasc_port[port], co, baud, parity, bits, flow);
|
||||
+}
|
||||
+
|
||||
+static struct console ifxmipsasc_console[2] =
|
||||
+{
|
||||
+ {
|
||||
+ .name = "ttyS",
|
||||
+ .write = ifxmipsasc_console_write,
|
||||
+ .device = uart_console_device,
|
||||
+ .setup = ifxmipsasc_console_setup,
|
||||
+ .flags = CON_PRINTBUFFER,
|
||||
+ .index = 0,
|
||||
+ .data = &ifxmipsasc_reg,
|
||||
+ }, {
|
||||
+ .name = "ttyS",
|
||||
+ .write = ifxmipsasc_console_write,
|
||||
+ .device = uart_console_device,
|
||||
+ .setup = ifxmipsasc_console_setup,
|
||||
+ .flags = CON_PRINTBUFFER,
|
||||
+ .index = 1,
|
||||
+ .data = &ifxmipsasc_reg,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static int __init ifxmipsasc_console_init(void)
|
||||
+{
|
||||
+ register_console(&ifxmipsasc_console[0]);
|
||||
+ register_console(&ifxmipsasc_console[1]);
|
||||
+ return 0;
|
||||
+}
|
||||
+console_initcall(ifxmipsasc_console_init);
|
||||
+
|
||||
+static struct uart_driver ifxmipsasc_reg = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .driver_name = "serial",
|
||||
+ .dev_name = "ttyS",
|
||||
+ .major = TTY_MAJOR,
|
||||
+ .minor = 64,
|
||||
+ .nr = 2,
|
||||
+ .cons = &ifxmipsasc_console[1],
|
||||
+};
|
||||
+
|
||||
+int __init ifxmipsasc_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+ uart_register_driver(&ifxmipsasc_reg);
|
||||
+ ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
|
||||
+ ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void __exit ifxmipsasc_exit(void)
|
||||
+{
|
||||
+ uart_unregister_driver(&ifxmipsasc_reg);
|
||||
+}
|
||||
+
|
||||
+module_init(ifxmipsasc_init);
|
||||
+module_exit(ifxmipsasc_exit);
|
||||
+
|
||||
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
+MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
|
||||
+MODULE_LICENSE("GPL");
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Index: linux-2.6.30.5/drivers/net/Kconfig
|
||||
Index: linux-2.6.30.8/drivers/net/Kconfig
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/net/Kconfig 2009-09-02 18:22:49.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/net/Kconfig 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/net/Kconfig 2009-10-19 21:31:30.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/net/Kconfig 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -353,6 +353,12 @@
|
||||
|
||||
source "drivers/net/arm/Kconfig"
|
||||
@ -15,10 +15,10 @@ Index: linux-2.6.30.5/drivers/net/Kconfig
|
||||
config AX88796
|
||||
tristate "ASIX AX88796 NE2000 clone support"
|
||||
depends on ARM || MIPS || SUPERH
|
||||
Index: linux-2.6.30.5/drivers/net/Makefile
|
||||
Index: linux-2.6.30.8/drivers/net/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/net/Makefile 2009-09-02 18:22:49.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/net/Makefile 2009-09-02 18:30:37.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/net/Makefile 2009-10-19 21:31:30.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/net/Makefile 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -234,6 +234,7 @@
|
||||
obj-$(CONFIG_MLX4_CORE) += mlx4/
|
||||
obj-$(CONFIG_ENC28J60) += enc28j60.o
|
||||
@ -27,3 +27,397 @@ Index: linux-2.6.30.5/drivers/net/Makefile
|
||||
|
||||
obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
|
||||
|
||||
Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ linux-2.6.30.8/drivers/net/ifxmips_mii0.c 2009-10-19 21:41:10.000000000 +0200
|
||||
@@ -0,0 +1,389 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
|
||||
+ *
|
||||
+ * Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
|
||||
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/uaccess.h>
|
||||
+#include <linux/in.h>
|
||||
+#include <linux/netdevice.h>
|
||||
+#include <linux/etherdevice.h>
|
||||
+#include <linux/ip.h>
|
||||
+#include <linux/tcp.h>
|
||||
+#include <linux/skbuff.h>
|
||||
+#include <linux/mm.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/ethtool.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+#include <asm/checksum.h>
|
||||
+
|
||||
+#include <ifxmips.h>
|
||||
+#include <ifxmips_dma.h>
|
||||
+#include <ifxmips_pmu.h>
|
||||
+
|
||||
+struct ifxmips_mii_priv {
|
||||
+ struct net_device_stats stats;
|
||||
+ struct dma_device_info *dma_device;
|
||||
+ struct sk_buff *skb;
|
||||
+};
|
||||
+
|
||||
+static struct net_device *ifxmips_mii0_dev;
|
||||
+static unsigned char mac_addr[MAX_ADDR_LEN];
|
||||
+
|
||||
+void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
|
||||
+{
|
||||
+ u32 val = MDIO_ACC_REQUEST |
|
||||
+ ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||
+ ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
|
||||
+ phy_data;
|
||||
+
|
||||
+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
+ ;
|
||||
+ ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_write_mdio);
|
||||
+
|
||||
+unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
|
||||
+{
|
||||
+ u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
|
||||
+ ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||
+ ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
|
||||
+
|
||||
+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
+ ;
|
||||
+ ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
||||
+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
|
||||
+ ;
|
||||
+ val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
|
||||
+ return val;
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_read_mdio);
|
||||
+
|
||||
+int ifxmips_ifxmips_mii_open(struct net_device *dev)
|
||||
+{
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
+ struct dma_device_info *dma_dev = priv->dma_device;
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
|
||||
+ if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||
+ (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
|
||||
+ }
|
||||
+ netif_start_queue(dev);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int ifxmips_mii_release(struct net_device *dev)
|
||||
+{
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
+ struct dma_device_info *dma_dev = priv->dma_device;
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < dma_dev->max_rx_chan_num; i++)
|
||||
+ dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
|
||||
+ netif_stop_queue(dev);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
|
||||
+{
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
+ unsigned char *buf = NULL;
|
||||
+ struct sk_buff *skb = NULL;
|
||||
+ int len = 0;
|
||||
+
|
||||
+ len = dma_device_read(dma_dev, &buf, (void **)&skb);
|
||||
+
|
||||
+ if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
|
||||
+ printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
|
||||
+ goto ifxmips_mii_hw_receive_err_exit;
|
||||
+ }
|
||||
+
|
||||
+ /* remove CRC */
|
||||
+ len -= 4;
|
||||
+ if (skb == NULL) {
|
||||
+ printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
|
||||
+ goto ifxmips_mii_hw_receive_err_exit;
|
||||
+ }
|
||||
+
|
||||
+ if (len > (skb->end - skb->tail)) {
|
||||
+ printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
|
||||
+ (len+4), skb->end, skb->tail);
|
||||
+ goto ifxmips_mii_hw_receive_err_exit;
|
||||
+ }
|
||||
+
|
||||
+ skb_put(skb, len);
|
||||
+ skb->dev = dev;
|
||||
+ skb->protocol = eth_type_trans(skb, dev);
|
||||
+ netif_rx(skb);
|
||||
+
|
||||
+ priv->stats.rx_packets++;
|
||||
+ priv->stats.rx_bytes += len;
|
||||
+ return 0;
|
||||
+
|
||||
+ifxmips_mii_hw_receive_err_exit:
|
||||
+ if (len == 0) {
|
||||
+ if (skb)
|
||||
+ dev_kfree_skb_any(skb);
|
||||
+ priv->stats.rx_errors++;
|
||||
+ priv->stats.rx_dropped++;
|
||||
+ return -EIO;
|
||||
+ } else {
|
||||
+ return len;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
|
||||
+{
|
||||
+ int ret = 0;
|
||||
+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
|
||||
+ struct dma_device_info *dma_dev = priv->dma_device;
|
||||
+ ret = dma_device_write(dma_dev, buf, len, priv->skb);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
||||
+{
|
||||
+ int len;
|
||||
+ char *data;
|
||||
+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
|
||||
+ struct dma_device_info *dma_dev = priv->dma_device;
|
||||
+
|
||||
+ len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
|
||||
+ data = skb->data;
|
||||
+ priv->skb = skb;
|
||||
+ dev->trans_start = jiffies;
|
||||
+ /* TODO: we got more than 1 dma channel,
|
||||
+ so we should do something intelligent here to select one */
|
||||
+ dma_dev->current_tx_chan = 0;
|
||||
+
|
||||
+ wmb();
|
||||
+
|
||||
+ if (ifxmips_mii_hw_tx(data, len, dev) != len) {
|
||||
+ dev_kfree_skb_any(skb);
|
||||
+ priv->stats.tx_errors++;
|
||||
+ priv->stats.tx_dropped++;
|
||||
+ } else {
|
||||
+ priv->stats.tx_packets++;
|
||||
+ priv->stats.tx_bytes += len;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void ifxmips_mii_tx_timeout(struct net_device *dev)
|
||||
+{
|
||||
+ int i;
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
+
|
||||
+ priv->stats.tx_errors++;
|
||||
+ for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
|
||||
+ priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
|
||||
+ netif_wake_queue(dev);
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
+int dma_intr_handler(struct dma_device_info *dma_dev, int status)
|
||||
+{
|
||||
+ int i;
|
||||
+
|
||||
+ switch (status) {
|
||||
+ case RCV_INT:
|
||||
+ ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
|
||||
+ break;
|
||||
+
|
||||
+ case TX_BUF_FULL_INT:
|
||||
+ printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
|
||||
+ netif_stop_queue(ifxmips_mii0_dev);
|
||||
+ for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
|
||||
+ if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||
+ dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ case TRANSMIT_CPT_INT:
|
||||
+ for (i = 0; i < dma_dev->max_tx_chan_num; i++)
|
||||
+ dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
|
||||
+
|
||||
+ netif_wake_queue(ifxmips_mii0_dev);
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
||||
+{
|
||||
+ unsigned char *buffer = NULL;
|
||||
+ struct sk_buff *skb = NULL;
|
||||
+
|
||||
+ skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
|
||||
+ if (skb == NULL)
|
||||
+ return NULL;
|
||||
+
|
||||
+ buffer = (unsigned char *)(skb->data);
|
||||
+ skb_reserve(skb, 2);
|
||||
+ *(int *)opt = (int)skb;
|
||||
+ *byte_offset = 2;
|
||||
+
|
||||
+ return buffer;
|
||||
+}
|
||||
+
|
||||
+void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
|
||||
+{
|
||||
+ struct sk_buff *skb = NULL;
|
||||
+
|
||||
+ if (opt == NULL) {
|
||||
+ kfree(dataptr);
|
||||
+ } else {
|
||||
+ skb = (struct sk_buff *)opt;
|
||||
+ dev_kfree_skb_any(skb);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
|
||||
+{
|
||||
+ return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_mii_dev_init(struct net_device *dev)
|
||||
+{
|
||||
+ int i;
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
|
||||
+ ether_setup(dev);
|
||||
+ printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
|
||||
+ dev->open = ifxmips_ifxmips_mii_open;
|
||||
+ dev->stop = ifxmips_mii_release;
|
||||
+ dev->hard_start_xmit = ifxmips_mii_tx;
|
||||
+ dev->get_stats = ifxmips_get_stats;
|
||||
+ dev->tx_timeout = ifxmips_mii_tx_timeout;
|
||||
+ dev->watchdog_timeo = 10 * HZ;
|
||||
+ memset(priv, 0, sizeof(struct ifxmips_mii_priv));
|
||||
+ priv->dma_device = dma_device_reserve("PPE");
|
||||
+ if (!priv->dma_device) {
|
||||
+ BUG();
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+ priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
|
||||
+ priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
|
||||
+ priv->dma_device->intr_handler = &dma_intr_handler;
|
||||
+ priv->dma_device->max_rx_chan_num = 4;
|
||||
+
|
||||
+ for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
|
||||
+ priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
|
||||
+ priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
|
||||
+ if (i == 0)
|
||||
+ priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
||||
+ else
|
||||
+ priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
|
||||
+
|
||||
+ dma_device_register(priv->dma_device);
|
||||
+
|
||||
+ printk(KERN_INFO "ifxmips_mii0: using mac=");
|
||||
+ for (i = 0; i < 6; i++) {
|
||||
+ dev->dev_addr[i] = mac_addr[i];
|
||||
+ printk("%02X%c", dev->dev_addr[i], (i == 5) ? ('\n') : (':'));
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void ifxmips_mii_chip_init(int mode)
|
||||
+{
|
||||
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
||||
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
|
||||
+
|
||||
+ if (mode == REV_MII_MODE)
|
||||
+ ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
|
||||
+ else if (mode == MII_MODE)
|
||||
+ ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
|
||||
+ ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
|
||||
+ ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
|
||||
+ wmb();
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_mii_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ int result = 0;
|
||||
+ unsigned char *mac = (unsigned char *)dev->dev.platform_data;
|
||||
+ ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
|
||||
+ ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
|
||||
+ memcpy(mac_addr, mac, 6);
|
||||
+ strcpy(ifxmips_mii0_dev->name, "eth%d");
|
||||
+ ifxmips_mii_chip_init(REV_MII_MODE);
|
||||
+ result = register_netdev(ifxmips_mii0_dev);
|
||||
+ if (result) {
|
||||
+ printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
|
||||
+
|
||||
+out:
|
||||
+ return result;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_mii_remove(struct platform_device *dev)
|
||||
+{
|
||||
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(ifxmips_mii0_dev);
|
||||
+
|
||||
+ printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
|
||||
+
|
||||
+ dma_device_unregister(priv->dma_device);
|
||||
+ dma_device_release(priv->dma_device);
|
||||
+ kfree(priv->dma_device);
|
||||
+ unregister_netdev(ifxmips_mii0_dev);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver ifxmips_mii_driver = {
|
||||
+ .probe = ifxmips_mii_probe,
|
||||
+ .remove = ifxmips_mii_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ifxmips_mii0",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+int __init ifxmips_mii_init(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ifxmips_mii_driver);
|
||||
+ if (ret)
|
||||
+ printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void __exit ifxmips_mii_cleanup(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ifxmips_mii_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(ifxmips_mii_init);
|
||||
+module_exit(ifxmips_mii_cleanup);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
+MODULE_DESCRIPTION("ethernet driver for IFXMIPS boards");
|
||||
+
|
||||
|
||||
@ -1,9 +1,291 @@
|
||||
Index: linux-2.6.30.5/drivers/mtd/maps/Makefile
|
||||
Index: linux-2.6.30.8/drivers/mtd/maps/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/mtd/maps/Makefile 2009-08-16 23:19:38.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/mtd/maps/Makefile 2009-09-02 18:30:09.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/mtd/maps/Makefile 2009-09-24 17:28:02.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/mtd/maps/Makefile 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -62,3 +62,4 @@
|
||||
obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o
|
||||
obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
|
||||
obj-$(CONFIG_MTD_VMU) += vmu-flash.o
|
||||
+obj-$(CONFIG_MTD_IFXMIPS) += ifxmips.o
|
||||
Index: linux-2.6.30.8/drivers/mtd/maps/ifxmips.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ linux-2.6.30.8/drivers/mtd/maps/ifxmips.c 2009-10-19 21:40:44.000000000 +0200
|
||||
@@ -0,0 +1,277 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
+ *
|
||||
+ * Copyright (C) 2004 Liu Peng Infineon IFAP DC COM CPE
|
||||
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/mtd/mtd.h>
|
||||
+#include <linux/mtd/map.h>
|
||||
+#include <linux/mtd/partitions.h>
|
||||
+#include <linux/mtd/cfi.h>
|
||||
+#include <linux/magic.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#include <ifxmips.h>
|
||||
+#include <ifxmips_prom.h>
|
||||
+#include <ifxmips_ebu.h>
|
||||
+
|
||||
+#ifndef CONFIG_MTD_PARTITIONS
|
||||
+#error Please enable CONFIG_MTD_PARTITIONS
|
||||
+#endif
|
||||
+
|
||||
+static struct map_info ifxmips_map = {
|
||||
+ .name = "ifx-nor",
|
||||
+ .bankwidth = 2,
|
||||
+ .size = 0x400000,
|
||||
+};
|
||||
+
|
||||
+static map_word ifxmips_read16(struct map_info *map, unsigned long adr)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+ map_word temp;
|
||||
+ spin_lock_irqsave(&ebu_lock, flags);
|
||||
+ adr ^= 2;
|
||||
+ temp.x[0] = *((__u16 *)(map->virt + adr));
|
||||
+ spin_unlock_irqrestore(&ebu_lock, flags);
|
||||
+ return temp;
|
||||
+}
|
||||
+
|
||||
+static void ifxmips_write16(struct map_info *map, map_word d, unsigned long adr)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+ spin_lock_irqsave(&ebu_lock, flags);
|
||||
+ adr ^= 2;
|
||||
+ *((__u16 *)(map->virt + adr)) = d.x[0];
|
||||
+ spin_unlock_irqrestore(&ebu_lock, flags);
|
||||
+}
|
||||
+
|
||||
+void ifxmips_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
|
||||
+{
|
||||
+ unsigned char *p;
|
||||
+ unsigned char *to_8;
|
||||
+ unsigned long flags;
|
||||
+ spin_lock_irqsave(&ebu_lock, flags);
|
||||
+ from = (unsigned long)(from + map->virt);
|
||||
+ p = (unsigned char *) from;
|
||||
+ to_8 = (unsigned char *) to;
|
||||
+ while (len--)
|
||||
+ *to_8++ = *p++;
|
||||
+ spin_unlock_irqrestore(&ebu_lock, flags);
|
||||
+}
|
||||
+
|
||||
+void ifxmips_copy_to(struct map_info *map,
|
||||
+ unsigned long to,
|
||||
+ const void *from,
|
||||
+ ssize_t len)
|
||||
+{
|
||||
+ unsigned char *p = (unsigned char *)from;
|
||||
+ unsigned char *to_8;
|
||||
+ unsigned long flags;
|
||||
+ spin_lock_irqsave(&ebu_lock, flags);
|
||||
+ to += (unsigned long) map->virt;
|
||||
+ to_8 = (unsigned char *)to;
|
||||
+ while (len--)
|
||||
+ *p++ = *to_8++;
|
||||
+ spin_unlock_irqrestore(&ebu_lock, flags);
|
||||
+}
|
||||
+
|
||||
+static struct mtd_partition ifxmips_partitions[] = {
|
||||
+ {
|
||||
+ .name = "uboot",
|
||||
+ .offset = 0x00000000,
|
||||
+ .size = 0x00020000,
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "uboot_env",
|
||||
+ .offset = 0x00020000,
|
||||
+ .size = 0x00010000,
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "kernel",
|
||||
+ .offset = 0x00030000,
|
||||
+ .size = 0x0,
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "rootfs",
|
||||
+ .offset = 0x0,
|
||||
+ .size = 0x0,
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "board_config",
|
||||
+ .offset = 0x0,
|
||||
+ .size = 0x0,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct mtd_partition ifxmips_meta_partition = {
|
||||
+ .name = "linux",
|
||||
+ .offset = 0x00030000,
|
||||
+ .size = 0x0,
|
||||
+};
|
||||
+
|
||||
+static const char *part_probe_types[] = { "cmdlinepart", NULL };
|
||||
+
|
||||
+int find_uImage_size(unsigned long start_offset)
|
||||
+{
|
||||
+ unsigned long magic;
|
||||
+ unsigned long temp;
|
||||
+ ifxmips_copy_from(&ifxmips_map, &magic, start_offset, 4);
|
||||
+ if (le32_to_cpu(magic) != 0x56190527) {
|
||||
+ printk(KERN_INFO "ifxmips_mtd: invalid magic (0x%08X) of kernel at 0x%08lx \n", le32_to_cpu(magic), start_offset);
|
||||
+ return 0;
|
||||
+ }
|
||||
+ ifxmips_copy_from(&ifxmips_map, &temp, start_offset + 12, 4);
|
||||
+ printk(KERN_INFO "ifxmips_mtd: kernel size is %ld \n", temp + 0x40);
|
||||
+ return temp + 0x40;
|
||||
+}
|
||||
+
|
||||
+int find_brn_block(unsigned long start_offset)
|
||||
+{
|
||||
+ unsigned char temp[9];
|
||||
+ ifxmips_copy_from(&ifxmips_map, &temp, start_offset, 8);
|
||||
+ temp[8] = '\0';
|
||||
+ printk(KERN_INFO "data in brn block %s\n", temp);
|
||||
+ if (memcmp(temp, "BRN-BOOT", 8) == 0)
|
||||
+ return 1;
|
||||
+ else
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int detect_squashfs_partition(unsigned long start_offset)
|
||||
+{
|
||||
+ unsigned long temp;
|
||||
+ ifxmips_copy_from(&ifxmips_map, &temp, start_offset, 4);
|
||||
+ return le32_to_cpu(temp) == SQUASHFS_MAGIC;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_mtd_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ struct mtd_info *ifxmips_mtd = NULL;
|
||||
+ struct mtd_partition *parts = NULL;
|
||||
+ unsigned long uimage_size;
|
||||
+ int err, i;
|
||||
+ int kernel_part = 2, rootfs_part = 3;
|
||||
+ int num_parts = ARRAY_SIZE(ifxmips_partitions);
|
||||
+
|
||||
+ ifxmips_w32(0x1d7ff, IFXMIPS_EBU_BUSCON0);
|
||||
+
|
||||
+ ifxmips_map.read = ifxmips_read16;
|
||||
+ ifxmips_map.write = ifxmips_write16;
|
||||
+ ifxmips_map.copy_from = ifxmips_copy_from;
|
||||
+ ifxmips_map.copy_to = ifxmips_copy_to;
|
||||
+ ifxmips_map.phys = dev->resource->start;
|
||||
+ ifxmips_map.size = dev->resource->end - ifxmips_map.phys + 1;
|
||||
+ ifxmips_map.virt = ioremap_nocache(ifxmips_map.phys, ifxmips_map.size);
|
||||
+
|
||||
+ if (!ifxmips_map.virt) {
|
||||
+ printk(KERN_WARNING "ifxmips_mtd: failed to ioremap!\n");
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ ifxmips_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &ifxmips_map);
|
||||
+ if (!ifxmips_mtd) {
|
||||
+ iounmap(ifxmips_map.virt);
|
||||
+ printk(KERN_WARNING "ifxmips_mtd: probing failed\n");
|
||||
+ return -ENXIO;
|
||||
+ }
|
||||
+
|
||||
+ ifxmips_mtd->owner = THIS_MODULE;
|
||||
+
|
||||
+ err = parse_mtd_partitions(ifxmips_mtd, part_probe_types, &parts, 0);
|
||||
+ if (err > 0) {
|
||||
+ printk(KERN_INFO "ifxmips_mtd: found %d partitions from cmdline\n", err);
|
||||
+ num_parts = err;
|
||||
+ kernel_part = 0;
|
||||
+ rootfs_part = 0;
|
||||
+ for (i = 0; i < num_parts; i++) {
|
||||
+ if (strcmp(parts[i].name, "kernel") == 0)
|
||||
+ kernel_part = i;
|
||||
+ if (strcmp(parts[i].name, "rootfs") == 0)
|
||||
+ rootfs_part = i;
|
||||
+ }
|
||||
+ } else {
|
||||
+ parts = &ifxmips_partitions[0];
|
||||
+ }
|
||||
+
|
||||
+ /* dynamic size detection only if rootfs-part follows kernel-part */
|
||||
+ if (kernel_part+1 == rootfs_part) {
|
||||
+ uimage_size = find_uImage_size(parts[kernel_part].offset);
|
||||
+
|
||||
+ if (detect_squashfs_partition(parts[kernel_part].offset + uimage_size)) {
|
||||
+ printk(KERN_INFO "ifxmips_mtd: found a squashfs following the uImage\n");
|
||||
+ } else {
|
||||
+ uimage_size &= ~0xffff;
|
||||
+ uimage_size += 0x10000;
|
||||
+ }
|
||||
+
|
||||
+ parts[kernel_part].size = uimage_size;
|
||||
+ parts[rootfs_part].offset = parts[kernel_part].offset + parts[kernel_part].size;
|
||||
+ parts[rootfs_part].size = ((ifxmips_mtd->size >> 20) * 1024 * 1024) - parts[rootfs_part].offset;
|
||||
+
|
||||
+ ifxmips_meta_partition.offset = parts[kernel_part].offset;
|
||||
+ ifxmips_meta_partition.size = parts[kernel_part].size + parts[rootfs_part].size;
|
||||
+ }
|
||||
+
|
||||
+ if (err <= 0) {
|
||||
+ if (ifxmips_has_brn_block()) {
|
||||
+ parts[3].size -= ifxmips_mtd->erasesize;
|
||||
+ parts[4].offset = ifxmips_mtd->size - ifxmips_mtd->erasesize;
|
||||
+ parts[4].size = ifxmips_mtd->erasesize;
|
||||
+ } else {
|
||||
+ num_parts--;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ add_mtd_partitions(ifxmips_mtd, parts, num_parts);
|
||||
+ add_mtd_partitions(ifxmips_mtd, &ifxmips_meta_partition, 1);
|
||||
+
|
||||
+ printk(KERN_INFO "ifxmips_mtd: added %s flash with %dMB\n",
|
||||
+ ifxmips_map.name, ((int)ifxmips_mtd->size) >> 20);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver ifxmips_mtd_driver = {
|
||||
+ .probe = ifxmips_mtd_probe,
|
||||
+ .driver = {
|
||||
+ .name = "ifxmips_mtd",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+int __init init_ifxmips_mtd(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ifxmips_mtd_driver);
|
||||
+ if (ret)
|
||||
+ printk(KERN_INFO "ifxmips_mtd: error registering platfom driver!");
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void __exit cleanup_ifxmips_mtd(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ifxmips_mtd_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(init_ifxmips_mtd);
|
||||
+module_exit(cleanup_ifxmips_mtd);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
+MODULE_DESCRIPTION("MTD map driver for IFXMIPS boards");
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Index: linux-2.6.30.5/drivers/watchdog/Makefile
|
||||
Index: linux-2.6.30.8/drivers/watchdog/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/watchdog/Makefile 2009-08-16 23:19:38.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/watchdog/Makefile 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/watchdog/Makefile 2009-09-24 17:28:02.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/watchdog/Makefile 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -105,6 +105,7 @@
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
@ -10,10 +10,10 @@ Index: linux-2.6.30.5/drivers/watchdog/Makefile
|
||||
|
||||
# PARISC Architecture
|
||||
|
||||
Index: linux-2.6.30.5/drivers/watchdog/Kconfig
|
||||
Index: linux-2.6.30.8/drivers/watchdog/Kconfig
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/watchdog/Kconfig 2009-08-16 23:19:38.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/watchdog/Kconfig 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/watchdog/Kconfig 2009-09-24 17:28:02.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/watchdog/Kconfig 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -764,6 +764,12 @@
|
||||
help
|
||||
Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
|
||||
@ -27,3 +27,203 @@ Index: linux-2.6.30.5/drivers/watchdog/Kconfig
|
||||
# PARISC Architecture
|
||||
|
||||
# POWERPC Architecture
|
||||
Index: linux-2.6.30.8/drivers/watchdog/ifxmips_wdt.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ linux-2.6.30.8/drivers/watchdog/ifxmips_wdt.c 2009-10-19 21:40:17.000000000 +0200
|
||||
@@ -0,0 +1,195 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
+ *
|
||||
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
+ * Based on EP93xx wdt driver
|
||||
+ */
|
||||
+
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/fs.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/watchdog.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/uaccess.h>
|
||||
+
|
||||
+#include <ifxmips.h>
|
||||
+#include <ifxmips_cgu.h>
|
||||
+
|
||||
+#define IFXMIPS_WDT_PW1 0x00BE0000
|
||||
+#define IFXMIPS_WDT_PW2 0x00DC0000
|
||||
+
|
||||
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
+static int wdt_ok_to_close;
|
||||
+#endif
|
||||
+
|
||||
+static int wdt_timeout = 30;
|
||||
+
|
||||
+int ifxmips_wdt_enable(unsigned int timeout)
|
||||
+{
|
||||
+ u32 fpi;
|
||||
+ fpi = cgu_get_io_region_clock();
|
||||
+ ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
|
||||
+ ifxmips_w32(IFXMIPS_WDT_PW2 |
|
||||
+ (0x3 << 26) | /* PWL */
|
||||
+ (0x3 << 24) | /* CLKDIV */
|
||||
+ (0x1 << 31) | /* enable */
|
||||
+ ((timeout * (fpi / 0x40000)) + 0x1000), /* reload */
|
||||
+ IFXMIPS_BIU_WDT_CR);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+void ifxmips_wdt_disable(void)
|
||||
+{
|
||||
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
+ wdt_ok_to_close = 0;
|
||||
+#endif
|
||||
+ ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
|
||||
+ ifxmips_w32(IFXMIPS_WDT_PW2, IFXMIPS_BIU_WDT_CR);
|
||||
+}
|
||||
+
|
||||
+static ssize_t ifxmips_wdt_write(struct file *file, const char __user *data,
|
||||
+ size_t len, loff_t *ppos)
|
||||
+{
|
||||
+ size_t i;
|
||||
+
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
+ for (i = 0; i != len; i++) {
|
||||
+ char c;
|
||||
+ if (get_user(c, data + i))
|
||||
+ return -EFAULT;
|
||||
+ if (c == 'V')
|
||||
+ wdt_ok_to_close = 1;
|
||||
+ }
|
||||
+#endif
|
||||
+ ifxmips_wdt_enable(wdt_timeout);
|
||||
+ return len;
|
||||
+}
|
||||
+
|
||||
+static struct watchdog_info ident = {
|
||||
+ .options = WDIOF_MAGICCLOSE,
|
||||
+ .identity = "ifxmips Watchdog",
|
||||
+};
|
||||
+
|
||||
+static int ifxmips_wdt_ioctl(struct inode *inode, struct file *file,
|
||||
+ unsigned int cmd, unsigned long arg)
|
||||
+{
|
||||
+ int ret = -ENOTTY;
|
||||
+
|
||||
+ switch (cmd) {
|
||||
+ case WDIOC_GETSUPPORT:
|
||||
+ ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
|
||||
+ sizeof(ident)) ? -EFAULT : 0;
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_GETTIMEOUT:
|
||||
+ ret = put_user(wdt_timeout, (int __user *)arg);
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_SETTIMEOUT:
|
||||
+ ret = get_user(wdt_timeout, (int __user *)arg);
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_KEEPALIVE:
|
||||
+ ifxmips_wdt_enable(wdt_timeout);
|
||||
+ ret = 0;
|
||||
+ break;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_wdt_open(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ ifxmips_wdt_enable(wdt_timeout);
|
||||
+ return nonseekable_open(inode, file);
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_wdt_release(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+#ifndef CONFIG_WATCHDOG_NOWAYOUT
|
||||
+ if (wdt_ok_to_close)
|
||||
+ ifxmips_wdt_disable();
|
||||
+ else
|
||||
+#endif
|
||||
+ printk(KERN_ERR "ifxmips_wdt: watchdog closed without warning,"
|
||||
+ " rebooting system\n");
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct file_operations ifxmips_wdt_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .write = ifxmips_wdt_write,
|
||||
+ .ioctl = ifxmips_wdt_ioctl,
|
||||
+ .open = ifxmips_wdt_open,
|
||||
+ .release = ifxmips_wdt_release,
|
||||
+};
|
||||
+
|
||||
+static struct miscdevice ifxmips_wdt_miscdev = {
|
||||
+ .minor = WATCHDOG_MINOR,
|
||||
+ .name = "watchdog",
|
||||
+ .fops = &ifxmips_wdt_fops,
|
||||
+};
|
||||
+
|
||||
+static int ifxmips_wdt_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ int err;
|
||||
+ err = misc_register(&ifxmips_wdt_miscdev);
|
||||
+ if (err)
|
||||
+ printk(KERN_INFO "ifxmips_wdt: error creating device\n");
|
||||
+ else
|
||||
+ printk(KERN_INFO "ifxmips_wdt: loaded\n");
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_wdt_remove(struct platform_device *dev)
|
||||
+{
|
||||
+ ifxmips_wdt_disable();
|
||||
+ misc_deregister(&ifxmips_wdt_miscdev);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static struct platform_driver ifxmips_wdt_driver = {
|
||||
+ .probe = ifxmips_wdt_probe,
|
||||
+ .remove = ifxmips_wdt_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ifxmips_wdt",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int __init init_ifxmips_wdt(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ifxmips_wdt_driver);
|
||||
+ if (ret)
|
||||
+ printk(KERN_INFO "ifxmips_wdt: error registering platfom driver!");
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void __exit exit_ifxmips_wdt(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ifxmips_wdt_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(init_ifxmips_wdt);
|
||||
+module_exit(exit_ifxmips_wdt);
|
||||
+
|
||||
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
+MODULE_DESCRIPTION("ifxmips Watchdog");
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Index: linux-2.6.30.5/drivers/leds/Kconfig
|
||||
Index: linux-2.6.30.8/drivers/leds/Kconfig
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/leds/Kconfig 2009-09-02 18:22:49.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/leds/Kconfig 2009-09-02 18:29:51.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/leds/Kconfig 2009-10-19 21:31:31.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/leds/Kconfig 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -227,6 +227,12 @@
|
||||
This option enables support for BD2802GU RGB LED driver chips
|
||||
accessed via the I2C bus.
|
||||
@ -15,10 +15,10 @@ Index: linux-2.6.30.5/drivers/leds/Kconfig
|
||||
comment "LED Triggers"
|
||||
|
||||
config LEDS_TRIGGERS
|
||||
Index: linux-2.6.30.5/drivers/leds/Makefile
|
||||
Index: linux-2.6.30.8/drivers/leds/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.30.5.orig/drivers/leds/Makefile 2009-09-02 18:22:49.000000000 +0200
|
||||
+++ linux-2.6.30.5/drivers/leds/Makefile 2009-09-02 18:31:23.000000000 +0200
|
||||
--- linux-2.6.30.8.orig/drivers/leds/Makefile 2009-10-19 21:31:31.000000000 +0200
|
||||
+++ linux-2.6.30.8/drivers/leds/Makefile 2009-10-19 21:31:32.000000000 +0200
|
||||
@@ -27,6 +27,7 @@
|
||||
obj-$(CONFIG_LEDS_DA903X) += leds-da903x.o
|
||||
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
|
||||
@ -27,3 +27,204 @@ Index: linux-2.6.30.5/drivers/leds/Makefile
|
||||
|
||||
# LED SPI Drivers
|
||||
obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
|
||||
Index: linux-2.6.30.8/drivers/leds/leds-ifxmips.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ linux-2.6.30.8/drivers/leds/leds-ifxmips.c 2009-10-19 21:39:59.000000000 +0200
|
||||
@@ -0,0 +1,196 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
|
||||
+ *
|
||||
+ * Copyright (C) 2006 infineon
|
||||
+ * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/version.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/fs.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/uaccess.h>
|
||||
+#include <linux/unistd.h>
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/leds.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+#include <ifxmips.h>
|
||||
+#include <ifxmips_gpio.h>
|
||||
+#include <ifxmips_pmu.h>
|
||||
+
|
||||
+#define DRVNAME "ifxmips_led"
|
||||
+
|
||||
+/* might need to be changed depending on shift register used on the pcb */
|
||||
+#if 1
|
||||
+#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING
|
||||
+#else
|
||||
+#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
|
||||
+#endif
|
||||
+
|
||||
+#define IFXMIPS_LED_SPEED IFXMIPS_LED_8HZ
|
||||
+
|
||||
+#define IFXMIPS_LED_GPIO_PORT 0
|
||||
+
|
||||
+#define IFXMIPS_MAX_LED 24
|
||||
+
|
||||
+struct ifxmips_led {
|
||||
+ struct led_classdev cdev;
|
||||
+ u8 bit;
|
||||
+};
|
||||
+
|
||||
+void ifxmips_led_set(unsigned int led)
|
||||
+{
|
||||
+ led &= 0xffffff;
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_led_set);
|
||||
+
|
||||
+void ifxmips_led_clear(unsigned int led)
|
||||
+{
|
||||
+ led = ~(led & 0xffffff);
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_led_clear);
|
||||
+
|
||||
+void ifxmips_led_blink_set(unsigned int led)
|
||||
+{
|
||||
+ led &= 0xffffff;
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_led_blink_set);
|
||||
+
|
||||
+void ifxmips_led_blink_clear(unsigned int led)
|
||||
+{
|
||||
+ led = ~(led & 0xffffff);
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
|
||||
+}
|
||||
+EXPORT_SYMBOL(ifxmips_led_blink_clear);
|
||||
+
|
||||
+static void ifxmips_ledapi_set(struct led_classdev *led_cdev,
|
||||
+ enum led_brightness value)
|
||||
+{
|
||||
+ struct ifxmips_led *led_dev =
|
||||
+ container_of(led_cdev, struct ifxmips_led, cdev);
|
||||
+
|
||||
+ if (value)
|
||||
+ ifxmips_led_set(1 << led_dev->bit);
|
||||
+ else
|
||||
+ ifxmips_led_clear(1 << led_dev->bit);
|
||||
+}
|
||||
+
|
||||
+void ifxmips_led_setup_gpio(void)
|
||||
+{
|
||||
+ int i = 0;
|
||||
+
|
||||
+ /* leds are controlled via a shift register
|
||||
+ we need to setup pins SH,D,ST (4,5,6) to make it work */
|
||||
+ for (i = 4; i < 7; i++) {
|
||||
+ ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
|
||||
+ ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
|
||||
+ ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
|
||||
+ ifxmips_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_led_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ int i = 0;
|
||||
+
|
||||
+ ifxmips_led_setup_gpio();
|
||||
+
|
||||
+ ifxmips_w32(0, IFXMIPS_LED_AR);
|
||||
+ ifxmips_w32(0, IFXMIPS_LED_CPU0);
|
||||
+ ifxmips_w32(0, IFXMIPS_LED_CPU1);
|
||||
+ ifxmips_w32(LED_CON0_SWU, IFXMIPS_LED_CON0);
|
||||
+ ifxmips_w32(0, IFXMIPS_LED_CON1);
|
||||
+
|
||||
+ /* setup the clock edge that the shift register is triggered on */
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & ~IFXMIPS_LED_EDGE_MASK,
|
||||
+ IFXMIPS_LED_CON0);
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_CLK_EDGE,
|
||||
+ IFXMIPS_LED_CON0);
|
||||
+
|
||||
+ /* per default leds 15-0 are set */
|
||||
+ ifxmips_w32(IFXMIPS_LED_GROUP1 | IFXMIPS_LED_GROUP0, IFXMIPS_LED_CON1);
|
||||
+
|
||||
+ /* leds are update periodically by the FPID */
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_UPD_MASK,
|
||||
+ IFXMIPS_LED_CON1);
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_UPD_SRC_FPI,
|
||||
+ IFXMIPS_LED_CON1);
|
||||
+
|
||||
+ /* set led update speed */
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_MASK,
|
||||
+ IFXMIPS_LED_CON1);
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_SPEED,
|
||||
+ IFXMIPS_LED_CON1);
|
||||
+
|
||||
+ /* adsl 0 and 1 leds are updated by the arc */
|
||||
+ ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC,
|
||||
+ IFXMIPS_LED_CON0);
|
||||
+
|
||||
+ /* per default, the leds are turned on */
|
||||
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
|
||||
+
|
||||
+ for (i = 0; i < IFXMIPS_MAX_LED; i++) {
|
||||
+ struct ifxmips_led *tmp =
|
||||
+ kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
|
||||
+ tmp->cdev.brightness_set = ifxmips_ledapi_set;
|
||||
+ tmp->cdev.name = kmalloc(sizeof("ifxmips:led:00"), GFP_KERNEL);
|
||||
+ sprintf((char *)tmp->cdev.name, "ifxmips:led:%02d", i);
|
||||
+ tmp->cdev.default_trigger = NULL;
|
||||
+ tmp->bit = i;
|
||||
+ led_classdev_register(&dev->dev, &tmp->cdev);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ifxmips_led_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver ifxmips_led_driver = {
|
||||
+ .probe = ifxmips_led_probe,
|
||||
+ .remove = ifxmips_led_remove,
|
||||
+ .driver = {
|
||||
+ .name = DRVNAME,
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+int __init ifxmips_led_init(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ifxmips_led_driver);
|
||||
+ if (ret)
|
||||
+ printk(KERN_INFO
|
||||
+ "ifxmips_led: Error registering platfom driver!");
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+void __exit ifxmips_led_exit(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ifxmips_led_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(ifxmips_led_init);
|
||||
+module_exit(ifxmips_led_exit);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user