kernel: add a recent upstream commit (post-3.3) to the ssb update patch, required for the next mac80211 update

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30345 3c298f89-4303-0410-b956-a3cf2f4a3e73
2024-12-24 07:01:44 +02:00 · 2012-02-07 11:28:06 +00:00 · 2012-02-07 11:28:06 +00:00 · 6c242e52a8
commit 6c242e52a8
parent 68eac67f55
11 changed files with 1329 additions and 153 deletions
--- a/target/linux/generic/patches-2.6.30/941-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.30/941-ssb_update.patch
@ -225,7 +225,7 @@
  * Copyright 2007, Broadcom Corporation
  *
  * Licensed under the GNU/GPL. See COPYING for details.
-@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct
+@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct 
 	chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value);
 }
 
@ -289,7 +289,7 @@
 	u32 pmucap;
 
 	if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
-@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon 
 	ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
 		    cc->pmu.rev, pmucap);
 
@ -1720,7 +1720,7 @@
 
 static inline u8 ssb_crc8(u8 crc, u8 data)
 {
-@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus
+@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus 
 	int i;
 
 	for (i = 0; i < bus->sprom_size; i++)
@ -1800,7 +1800,7 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -464,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -464,22 +515,32 @@ static void sprom_extract_r45(struct ssb
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
@ -1809,7 +1809,17 @@
 	/* TODO - get remaining rev 4 stuff needed */
 }
 
-@@ -474,12 +527,14 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
 
 	/* extract the MAC address */
 	for (i = 0; i < 3; i++) {
@ -1825,7 +1835,7 @@
 	SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
 	     SSB_SPROM8_ANTAVAIL_A_SHIFT);
 	SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-@@ -490,12 +545,55 @@ static void sprom_extract_r8(struct ssb_
+@@ -490,12 +551,55 @@ static void sprom_extract_r8(struct ssb_
 	SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
 	SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
 	     SSB_SPROM8_ITSSI_A_SHIFT);
@ -1881,10 +1891,42 @@
 
 	/* Extract the antenna gain values. */
 	SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
-@@ -509,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+@@ -509,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -1913,7 +1955,7 @@
 	/* TODO - get remaining rev 8 stuff needed */
 }
 
-@@ -521,36 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -521,36 +682,34 @@ static int sprom_extract(struct ssb_bus 
 	ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
 	memset(out->et1mac, 0xFF, 6);
@ -1971,7 +2013,7 @@
 	}
 
 	if (out->boardflags_lo == 0xFFFF)
-@@ -564,13 +685,34 @@ static int sprom_extract(struct ssb_bus
+@@ -564,13 +723,34 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -2009,7 +2051,7 @@
 	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
 	sprom_do_read(bus, buf);
 	err = sprom_check_crc(buf, bus->sprom_size);
-@@ -580,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -580,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
 		buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
 			      GFP_KERNEL);
 		if (!buf)
@ -2039,7 +2081,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -602,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -602,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
 
 out_free:
 	kfree(buf);
@ -2451,7 +2493,7 @@
 	}
 	bus->mmio = NULL;
 	bus->mapped_device = NULL;
-@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct
+@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct 
 		SSB_BUG_ON(1); /* Can't reach this code. */
 #endif
 		break;
@ -3391,7 +3433,20 @@
 #define PCI_DEVICE_ID_TIGON3_5752M	0x1601
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,26 +25,62 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,26 +31,64 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -3458,10 +3513,12 @@
 +	u16 boardflags2_lo;	/* Board flags (bits 32-47) */
 +	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
 +	/* TODO store board flags in a single u64 */
+
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
 
 	/* Antenna gain values for up to 4 antennas
 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
-@@ -58,14 +94,23 @@ struct ssb_sprom {
+@@ -58,14 +102,23 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -3487,7 +3544,7 @@
 };
 
 
-@@ -137,7 +182,7 @@ struct ssb_device {
+@@ -137,7 +190,7 @@ struct ssb_device {
 	 * is an optimization. */
 	const struct ssb_bus_ops *ops;
 
@ -3496,7 +3553,7 @@
 
 	struct ssb_bus *bus;
 	struct ssb_device_id id;
-@@ -195,10 +240,9 @@ struct ssb_driver {
+@@ -195,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -3510,7 +3567,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -208,6 +252,7 @@ enum ssb_bustype {
+@@ -208,6 +260,7 @@ enum ssb_bustype {
 	SSB_BUSTYPE_SSB,	/* This SSB bus is the system bus */
 	SSB_BUSTYPE_PCI,	/* SSB is connected to PCI bus */
 	SSB_BUSTYPE_PCMCIA,	/* SSB is connected to PCMCIA bus */
@ -3518,7 +3575,7 @@
 };
 
 /* board_vendor */
-@@ -238,20 +283,33 @@ struct ssb_bus {
+@@ -238,20 +291,33 @@ struct ssb_bus {
 
 	const struct ssb_bus_ops *ops;
 
@ -3560,7 +3617,7 @@
 
 #ifdef CONFIG_SSB_SPROM
 	/* Mutex to protect the SPROM writing. */
-@@ -260,7 +318,8 @@ struct ssb_bus {
+@@ -260,7 +326,8 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -3570,7 +3627,7 @@
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
 
-@@ -306,6 +365,11 @@ struct ssb_bus {
+@@ -306,6 +373,11 @@ struct ssb_bus {
 #endif /* DEBUG */
 };
 
@ -3582,7 +3639,7 @@
 /* The initialization-invariants. */
 struct ssb_init_invariants {
 	/* Versioning information about the PCB. */
-@@ -336,12 +400,23 @@ extern int ssb_bus_pcmciabus_register(st
+@@ -336,12 +408,23 @@ extern int ssb_bus_pcmciabus_register(st
 				      struct pcmcia_device *pcmcia_dev,
 				      unsigned long baseaddr);
 #endif /* CONFIG_SSB_PCMCIAHOST */
@ -3607,7 +3664,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -612,6 +687,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -612,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -3876,7 +3933,7 @@
 #define  SSB_SPROM3_CCKPO_1M		0x000F	/* 1M Rate PO */
 #define  SSB_SPROM3_CCKPO_2M		0x00F0	/* 2M Rate PO */
 #define  SSB_SPROM3_CCKPO_2M_SHIFT	4
-@@ -264,104 +267,257 @@
+@@ -264,104 +267,291 @@
 #define  SSB_SPROM3_OFDMGPO		0x107A	/* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
 
 /* SPROM Revision 4 */
@ -4117,6 +4174,39 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 +#define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 +#define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
@ -4143,6 +4233,7 @@
 +#define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
 +#define SSB_SPROM8_PA1HIB1		0x00DA
 +#define SSB_SPROM8_PA1HIB2		0x00DC
+
 +#define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
 +#define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
 +#define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
--- a/target/linux/generic/patches-2.6.31/941-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.31/941-ssb_update.patch
@ -225,7 +225,7 @@
  * Copyright 2007, Broadcom Corporation
  *
  * Licensed under the GNU/GPL. See COPYING for details.
-@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct
+@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct 
 	chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value);
 }
 
@ -289,7 +289,7 @@
 	u32 pmucap;
 
 	if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
-@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon 
 	ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
 		    cc->pmu.rev, pmucap);
 
@ -1577,7 +1577,7 @@
 
 static inline u8 ssb_crc8(u8 crc, u8 data)
 {
-@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus
+@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus 
 	int i;
 
 	for (i = 0; i < bus->sprom_size; i++)
@ -1657,7 +1657,7 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -464,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -464,22 +515,32 @@ static void sprom_extract_r45(struct ssb
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
@ -1666,7 +1666,17 @@
 	/* TODO - get remaining rev 4 stuff needed */
 }
 
-@@ -474,12 +527,14 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
 
 	/* extract the MAC address */
 	for (i = 0; i < 3; i++) {
@ -1682,7 +1692,7 @@
 	SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
 	     SSB_SPROM8_ANTAVAIL_A_SHIFT);
 	SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-@@ -490,12 +545,55 @@ static void sprom_extract_r8(struct ssb_
+@@ -490,12 +551,55 @@ static void sprom_extract_r8(struct ssb_
 	SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
 	SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
 	     SSB_SPROM8_ITSSI_A_SHIFT);
@ -1738,10 +1748,42 @@
 
 	/* Extract the antenna gain values. */
 	SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
-@@ -509,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+@@ -509,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -1770,7 +1812,7 @@
 	/* TODO - get remaining rev 8 stuff needed */
 }
 
-@@ -521,36 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -521,36 +682,34 @@ static int sprom_extract(struct ssb_bus 
 	ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
 	memset(out->et1mac, 0xFF, 6);
@ -1828,7 +1870,7 @@
 	}
 
 	if (out->boardflags_lo == 0xFFFF)
-@@ -564,13 +685,34 @@ static int sprom_extract(struct ssb_bus
+@@ -564,13 +723,34 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -1866,7 +1908,7 @@
 	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
 	sprom_do_read(bus, buf);
 	err = sprom_check_crc(buf, bus->sprom_size);
-@@ -580,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -580,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
 		buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
 			      GFP_KERNEL);
 		if (!buf)
@ -1896,7 +1938,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -602,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -602,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
 
 out_free:
 	kfree(buf);
@ -2292,7 +2334,7 @@
 	}
 	bus->mmio = NULL;
 	bus->mapped_device = NULL;
-@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct
+@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct 
 		SSB_BUG_ON(1); /* Can't reach this code. */
 #endif
 		break;
@ -3199,7 +3241,20 @@
 #define PCI_DEVICE_ID_TIGON3_5752M	0x1601
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,26 +25,62 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,26 +31,64 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -3266,10 +3321,12 @@
 +	u16 boardflags2_lo;	/* Board flags (bits 32-47) */
 +	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
 +	/* TODO store board flags in a single u64 */
+
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
 
 	/* Antenna gain values for up to 4 antennas
 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
-@@ -58,14 +94,23 @@ struct ssb_sprom {
+@@ -58,14 +102,23 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -3295,7 +3352,7 @@
 };
 
 
-@@ -137,7 +182,7 @@ struct ssb_device {
+@@ -137,7 +190,7 @@ struct ssb_device {
 	 * is an optimization. */
 	const struct ssb_bus_ops *ops;
 
@ -3304,7 +3361,7 @@
 
 	struct ssb_bus *bus;
 	struct ssb_device_id id;
-@@ -195,10 +240,9 @@ struct ssb_driver {
+@@ -195,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -3318,7 +3375,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -208,6 +252,7 @@ enum ssb_bustype {
+@@ -208,6 +260,7 @@ enum ssb_bustype {
 	SSB_BUSTYPE_SSB,	/* This SSB bus is the system bus */
 	SSB_BUSTYPE_PCI,	/* SSB is connected to PCI bus */
 	SSB_BUSTYPE_PCMCIA,	/* SSB is connected to PCMCIA bus */
@ -3326,7 +3383,7 @@
 };
 
 /* board_vendor */
-@@ -238,20 +283,33 @@ struct ssb_bus {
+@@ -238,20 +291,33 @@ struct ssb_bus {
 
 	const struct ssb_bus_ops *ops;
 
@ -3368,7 +3425,7 @@
 
 #ifdef CONFIG_SSB_SPROM
 	/* Mutex to protect the SPROM writing. */
-@@ -260,7 +318,8 @@ struct ssb_bus {
+@@ -260,7 +326,8 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -3378,7 +3435,7 @@
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
 
-@@ -306,6 +365,11 @@ struct ssb_bus {
+@@ -306,6 +373,11 @@ struct ssb_bus {
 #endif /* DEBUG */
 };
 
@ -3390,7 +3447,7 @@
 /* The initialization-invariants. */
 struct ssb_init_invariants {
 	/* Versioning information about the PCB. */
-@@ -336,12 +400,23 @@ extern int ssb_bus_pcmciabus_register(st
+@@ -336,12 +408,23 @@ extern int ssb_bus_pcmciabus_register(st
 				      struct pcmcia_device *pcmcia_dev,
 				      unsigned long baseaddr);
 #endif /* CONFIG_SSB_PCMCIAHOST */
@ -3415,7 +3472,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -612,6 +687,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -612,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -3684,7 +3741,7 @@
 #define  SSB_SPROM3_CCKPO_1M		0x000F	/* 1M Rate PO */
 #define  SSB_SPROM3_CCKPO_2M		0x00F0	/* 2M Rate PO */
 #define  SSB_SPROM3_CCKPO_2M_SHIFT	4
-@@ -264,104 +267,257 @@
+@@ -264,104 +267,291 @@
 #define  SSB_SPROM3_OFDMGPO		0x107A	/* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
 
 /* SPROM Revision 4 */
@ -3925,6 +3982,39 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 +#define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 +#define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
@ -3951,6 +4041,7 @@
 +#define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
 +#define SSB_SPROM8_PA1HIB1		0x00DA
 +#define SSB_SPROM8_PA1HIB2		0x00DC
+
 +#define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
 +#define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
 +#define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
--- a/target/linux/generic/patches-2.6.32/975-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.32/975-ssb_update.patch
@ -206,7 +206,7 @@
 	u32 pmucap;
 
 	if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
-@@ -509,15 +518,12 @@ void ssb_pmu_init(struct ssb_chipcommon
+@@ -509,15 +518,12 @@ void ssb_pmu_init(struct ssb_chipcommon 
 	ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
 		    cc->pmu.rev, pmucap);
 
@ -1381,7 +1381,7 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -470,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -470,13 +515,21 @@ static void sprom_extract_r45(struct ssb
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
@ -1390,10 +1390,56 @@
 	/* TODO - get remaining rev 4 stuff needed */
 }
 
-@@ -560,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -560,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -1422,7 +1468,7 @@
 	/* TODO - get remaining rev 8 stuff needed */
 }
 
-@@ -572,37 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -572,37 +682,34 @@ static int sprom_extract(struct ssb_bus 
 	ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
 	memset(out->et1mac, 0xFF, 6);
@ -1481,7 +1527,7 @@
 	}
 
 	if (out->boardflags_lo == 0xFFFF)
-@@ -616,15 +685,14 @@ static int sprom_extract(struct ssb_bus
+@@ -616,15 +723,14 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -1499,7 +1545,7 @@
 		/*
 		 * get SPROM offset: SSB_SPROM_BASE1 except for
 		 * chipcommon rev >= 31 or chip ID is 0x4312 and
-@@ -644,7 +712,7 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -644,7 +750,7 @@ static int ssb_pci_sprom_get(struct ssb_
 
 	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
 	if (!buf)
@ -1508,7 +1554,7 @@
 	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
 	sprom_do_read(bus, buf);
 	err = sprom_check_crc(buf, bus->sprom_size);
-@@ -654,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -654,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
 		buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
 			      GFP_KERNEL);
 		if (!buf)
@ -1538,7 +1584,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -676,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -676,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
 
 out_free:
 	kfree(buf);
@ -2115,7 +2161,20 @@
 #endif /* LINUX_SSB_PRIVATE_H_ */
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -2127,7 +2186,7 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -55,6 +57,10 @@ struct ssb_sprom {
+@@ -55,6 +63,10 @@ struct ssb_sprom {
 	u8 tri5gl;		/* 5.2GHz TX isolation */
 	u8 tri5g;		/* 5.3GHz TX isolation */
 	u8 tri5gh;		/* 5.8GHz TX isolation */
@ -2138,7 +2197,16 @@
 	u8 rxpo2g;		/* 2GHz RX power offset */
 	u8 rxpo5g;		/* 5GHz RX power offset */
 	u8 rssisav2g;		/* 2GHz RSSI params */
-@@ -88,6 +94,15 @@ struct ssb_sprom {
+@@ -76,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -88,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -2154,7 +2222,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -95,7 +110,7 @@ struct ssb_sprom {
+@@ -95,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -2163,7 +2231,7 @@
 };
 
 
-@@ -167,7 +182,7 @@ struct ssb_device {
+@@ -167,7 +190,7 @@ struct ssb_device {
 	 * is an optimization. */
 	const struct ssb_bus_ops *ops;
 
@ -2172,7 +2240,7 @@
 
 	struct ssb_bus *bus;
 	struct ssb_device_id id;
-@@ -225,10 +240,9 @@ struct ssb_driver {
+@@ -225,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -2186,7 +2254,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -269,7 +283,8 @@ struct ssb_bus {
+@@ -269,7 +291,8 @@ struct ssb_bus {
 
 	const struct ssb_bus_ops *ops;
 
@ -2196,7 +2264,7 @@
 	struct ssb_device *mapped_device;
 	union {
 		/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
-@@ -281,14 +296,17 @@ struct ssb_bus {
+@@ -281,14 +304,17 @@ struct ssb_bus {
 	 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 	spinlock_t bar_lock;
 
@ -2221,7 +2289,7 @@
 
 	/* See enum ssb_quirks */
 	unsigned int quirks;
-@@ -300,7 +318,7 @@ struct ssb_bus {
+@@ -300,7 +326,7 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -2230,7 +2298,7 @@
 	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
-@@ -396,7 +414,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -396,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
 
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
@ -2241,7 +2309,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -667,6 +687,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -667,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -2607,7 +2675,7 @@
 #define  SSB_SPROM8_RSSISMF5G		0x000F
 #define  SSB_SPROM8_RSSISMC5G		0x00F0
 #define  SSB_SPROM8_RSSISMC5G_SHIFT	4
-@@ -374,47 +420,104 @@
+@@ -374,47 +420,138 @@
 #define  SSB_SPROM8_RSSISAV5G_SHIFT	8
 #define  SSB_SPROM8_BXA5G		0x1800
 #define  SSB_SPROM8_BXA5G_SHIFT		11
@ -2644,6 +2712,39 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 +#define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
@ -2687,6 +2788,7 @@
 +#define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
 +#define SSB_SPROM8_PA1HIB1		0x00DA
 +#define SSB_SPROM8_PA1HIB2		0x00DC
+
 +#define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
 +#define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
 +#define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
--- a/target/linux/generic/patches-2.6.36/941-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.36/941-ssb_update.patch
@ -417,7 +417,7 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -471,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -471,13 +515,21 @@ static void sprom_extract_r45(struct ssb
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
@ -426,10 +426,56 @@
 	/* TODO - get remaining rev 4 stuff needed */
 }
 
-@@ -561,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -561,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -458,7 +504,7 @@
 	/* TODO - get remaining rev 8 stuff needed */
 }
 
-@@ -573,37 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -573,37 +682,34 @@ static int sprom_extract(struct ssb_bus 
 	ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
 	memset(out->et1mac, 0xFF, 6);
@ -517,7 +563,7 @@
 	}
 
 	if (out->boardflags_lo == 0xFFFF)
-@@ -617,15 +685,14 @@ static int sprom_extract(struct ssb_bus
+@@ -617,15 +723,14 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -535,7 +581,7 @@
 		/*
 		 * get SPROM offset: SSB_SPROM_BASE1 except for
 		 * chipcommon rev >= 31 or chip ID is 0x4312 and
-@@ -645,7 +712,7 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -645,7 +750,7 @@ static int ssb_pci_sprom_get(struct ssb_
 
 	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
 	if (!buf)
@ -544,7 +590,7 @@
 	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
 	sprom_do_read(bus, buf);
 	err = sprom_check_crc(buf, bus->sprom_size);
-@@ -655,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -655,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
 		buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
 			      GFP_KERNEL);
 		if (!buf)
@ -574,7 +620,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -677,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -677,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
 
 out_free:
 	kfree(buf);
@ -711,7 +757,20 @@
 		}
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -723,7 +782,7 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -55,6 +57,10 @@ struct ssb_sprom {
+@@ -55,6 +63,10 @@ struct ssb_sprom {
 	u8 tri5gl;		/* 5.2GHz TX isolation */
 	u8 tri5g;		/* 5.3GHz TX isolation */
 	u8 tri5gh;		/* 5.8GHz TX isolation */
@ -734,7 +793,16 @@
 	u8 rxpo2g;		/* 2GHz RX power offset */
 	u8 rxpo5g;		/* 5GHz RX power offset */
 	u8 rssisav2g;		/* 2GHz RSSI params */
-@@ -88,6 +94,15 @@ struct ssb_sprom {
+@@ -76,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -88,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -750,7 +818,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -95,7 +110,7 @@ struct ssb_sprom {
+@@ -95,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -759,7 +827,7 @@
 };
 
 
-@@ -225,10 +240,9 @@ struct ssb_driver {
+@@ -225,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -773,7 +841,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -304,7 +318,7 @@ struct ssb_bus {
+@@ -304,7 +326,7 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -782,7 +850,7 @@
 	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
-@@ -400,7 +414,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -400,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
 
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
@ -793,7 +861,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -514,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -514,6 +538,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -916,7 +984,7 @@
 #define SSB_SPROM5_IL0MAC		0x0052	/* 6 byte MAC address for a/b/g/n */
 #define SSB_SPROM5_GPIOA		0x0076	/* Gen. Purpose IO # 0 and 1 */
 #define  SSB_SPROM5_GPIOA_P0		0x00FF	/* Pin 0 */
-@@ -386,6 +432,23 @@
+@@ -386,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -937,10 +1005,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -416,6 +479,46 @@
+@@ -410,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
--- a/target/linux/generic/patches-2.6.37/020-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.37/020-ssb_update.patch
@ -417,7 +417,7 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -471,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -471,13 +515,21 @@ static void sprom_extract_r45(struct ssb
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
@ -426,10 +426,56 @@
 	/* TODO - get remaining rev 4 stuff needed */
 }
 
-@@ -561,6 +607,31 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -561,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -458,7 +504,7 @@
 	/* TODO - get remaining rev 8 stuff needed */
 }
 
-@@ -573,37 +644,34 @@ static int sprom_extract(struct ssb_bus
+@@ -573,37 +682,34 @@ static int sprom_extract(struct ssb_bus 
 	ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
 	memset(out->et1mac, 0xFF, 6);
@ -517,7 +563,7 @@
 	}
 
 	if (out->boardflags_lo == 0xFFFF)
-@@ -617,15 +685,14 @@ static int sprom_extract(struct ssb_bus
+@@ -617,15 +723,14 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -535,7 +581,7 @@
 		/*
 		 * get SPROM offset: SSB_SPROM_BASE1 except for
 		 * chipcommon rev >= 31 or chip ID is 0x4312 and
-@@ -645,7 +712,7 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -645,7 +750,7 @@ static int ssb_pci_sprom_get(struct ssb_
 
 	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
 	if (!buf)
@ -544,7 +590,7 @@
 	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
 	sprom_do_read(bus, buf);
 	err = sprom_check_crc(buf, bus->sprom_size);
-@@ -655,17 +722,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -655,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
 		buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
 			      GFP_KERNEL);
 		if (!buf)
@ -574,7 +620,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -677,19 +751,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -677,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
 
 out_free:
 	kfree(buf);
@ -711,7 +757,20 @@
 		}
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -723,7 +782,7 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -55,6 +57,10 @@ struct ssb_sprom {
+@@ -55,6 +63,10 @@ struct ssb_sprom {
 	u8 tri5gl;		/* 5.2GHz TX isolation */
 	u8 tri5g;		/* 5.3GHz TX isolation */
 	u8 tri5gh;		/* 5.8GHz TX isolation */
@ -734,7 +793,16 @@
 	u8 rxpo2g;		/* 2GHz RX power offset */
 	u8 rxpo5g;		/* 5GHz RX power offset */
 	u8 rssisav2g;		/* 2GHz RSSI params */
-@@ -88,6 +94,15 @@ struct ssb_sprom {
+@@ -76,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -88,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -750,7 +818,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -95,7 +110,7 @@ struct ssb_sprom {
+@@ -95,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -759,7 +827,7 @@
 };
 
 
-@@ -225,10 +240,9 @@ struct ssb_driver {
+@@ -225,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -773,7 +841,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -304,7 +318,7 @@ struct ssb_bus {
+@@ -304,7 +326,7 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -782,7 +850,7 @@
 	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
-@@ -400,7 +414,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -400,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
 
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
@ -793,7 +861,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -514,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -514,6 +538,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -888,7 +956,7 @@
 #define SSB_SPROM5_IL0MAC		0x0052	/* 6 byte MAC address for a/b/g/n */
 #define SSB_SPROM5_GPIOA		0x0076	/* Gen. Purpose IO # 0 and 1 */
 #define  SSB_SPROM5_GPIOA_P0		0x00FF	/* Pin 0 */
-@@ -387,6 +432,23 @@
+@@ -387,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -909,10 +977,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -417,6 +479,46 @@
+@@ -411,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
--- a/target/linux/generic/patches-2.6.38/020-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.38/020-ssb_update.patch
@ -326,10 +326,57 @@
 	}
 	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
 	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -603,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -519,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -603,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -356,7 +403,7 @@
 	sprom_extract_r458(out, in);
 
 	/* TODO - get remaining rev 8 stuff needed */
-@@ -641,7 +668,7 @@ static int sprom_extract(struct ssb_bus
+@@ -641,7 +706,7 @@ static int sprom_extract(struct ssb_bus 
 		break;
 	default:
 		ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
@ -365,7 +412,7 @@
 			   " v1\n", out->revision);
 		out->revision = 1;
 		sprom_extract_r123(out, in);
-@@ -658,7 +685,6 @@ static int sprom_extract(struct ssb_bus
+@@ -658,7 +723,6 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -373,7 +420,7 @@
 	int err;
 	u16 *buf;
 
-@@ -666,7 +692,7 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -666,7 +730,7 @@ static int ssb_pci_sprom_get(struct ssb_
 		ssb_printk(KERN_ERR PFX "No SPROM available!\n");
 		return -ENODEV;
 	}
@ -382,7 +429,7 @@
 		/*
 		 * get SPROM offset: SSB_SPROM_BASE1 except for
 		 * chipcommon rev >= 31 or chip ID is 0x4312 and
-@@ -703,10 +729,17 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -703,10 +767,17 @@ static int ssb_pci_sprom_get(struct ssb_
 		if (err) {
 			/* All CRC attempts failed.
 			 * Maybe there is no SPROM on the device?
@ -404,7 +451,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -724,12 +757,9 @@ out_free:
+@@ -724,12 +795,9 @@ out_free:
 static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
 				  struct ssb_boardinfo *bi)
 {
@ -460,7 +507,7 @@
 #define SSB_SPROM5_IL0MAC		0x0052	/* 6 byte MAC address for a/b/g/n */
 #define SSB_SPROM5_GPIOA		0x0076	/* Gen. Purpose IO # 0 and 1 */
 #define  SSB_SPROM5_GPIOA_P0		0x00FF	/* Pin 0 */
-@@ -427,6 +432,23 @@
+@@ -427,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -481,10 +528,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -457,6 +479,46 @@
+@@ -451,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
@ -1248,7 +1335,20 @@
 /* core.c */
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -1260,7 +1360,16 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -92,6 +94,15 @@ struct ssb_sprom {
+@@ -80,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -92,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -1276,7 +1385,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -99,7 +110,7 @@ struct ssb_sprom {
+@@ -99,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -1285,7 +1394,7 @@
 };
 
 
-@@ -229,10 +240,9 @@ struct ssb_driver {
+@@ -229,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -1299,7 +1408,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -308,7 +318,7 @@ struct ssb_bus {
+@@ -308,7 +326,7 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -1308,7 +1417,7 @@
 	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
-@@ -404,7 +414,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -404,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
 
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
@ -1319,7 +1428,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -518,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -518,6 +538,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
--- a/target/linux/generic/patches-2.6.39/020-ssb_update.patch
+++ b/target/linux/generic/patches-2.6.39/020-ssb_update.patch
@ -787,10 +787,57 @@
  * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
  * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
  * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
-@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -817,7 +864,7 @@
 	sprom_extract_r458(out, in);
 
 	/* TODO - get remaining rev 8 stuff needed */
-@@ -662,7 +685,6 @@ static int sprom_extract(struct ssb_bus
+@@ -662,7 +723,6 @@ static int sprom_extract(struct ssb_bus 
 static int ssb_pci_sprom_get(struct ssb_bus *bus,
 			     struct ssb_sprom *sprom)
 {
@ -825,7 +872,7 @@
 	int err;
 	u16 *buf;
 
-@@ -707,10 +729,17 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -707,10 +767,17 @@ static int ssb_pci_sprom_get(struct ssb_
 		if (err) {
 			/* All CRC attempts failed.
 			 * Maybe there is no SPROM on the device?
@ -847,7 +894,7 @@
 				err = 0;
 				goto out_free;
 			}
-@@ -728,12 +757,9 @@ out_free:
+@@ -728,12 +795,9 @@ out_free:
 static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
 				  struct ssb_boardinfo *bi)
 {
@ -1024,7 +1071,20 @@
 /* core.c */
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -1036,7 +1096,16 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -92,6 +94,15 @@ struct ssb_sprom {
+@@ -80,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -92,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -1052,7 +1121,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -99,7 +110,7 @@ struct ssb_sprom {
+@@ -99,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -1061,7 +1130,7 @@
 };
 
 
-@@ -229,10 +240,9 @@ struct ssb_driver {
+@@ -229,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -1075,7 +1144,7 @@
 extern void ssb_driver_unregister(struct ssb_driver *drv);
 
 
-@@ -308,7 +318,7 @@ struct ssb_bus {
+@@ -308,7 +326,7 @@ struct ssb_bus {
 
 	/* ID information about the Chip. */
 	u16 chip_id;
@ -1084,7 +1153,7 @@
 	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
-@@ -404,7 +414,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -404,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
 
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
@ -1095,7 +1164,7 @@
 
 /* Suspend a SSB bus.
  * Call this from the parent bus suspend routine. */
-@@ -518,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -518,6 +538,7 @@ extern int ssb_bus_may_powerdown(struct 
  * Otherwise static always-on powercontrol will be used. */
 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 
@ -1157,7 +1226,7 @@
 #define  SSB_TMSLOW_REJECT_23	0x00000004 /* Reject (Backplane rev 2.3) */
 #define  SSB_TMSLOW_CLOCK	0x00010000 /* Clock Enable */
 #define  SSB_TMSLOW_FGC		0x00020000 /* Force Gated Clocks On */
-@@ -432,6 +432,23 @@
+@@ -432,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -1178,10 +1247,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -462,6 +479,46 @@
+@@ -456,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
--- a/target/linux/generic/patches-3.0/020-ssb_update.patch
+++ b/target/linux/generic/patches-3.0/020-ssb_update.patch
@ -322,10 +322,57 @@
  * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
  * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
  * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
-@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -352,7 +399,7 @@
 	sprom_extract_r458(out, in);
 
 	/* TODO - get remaining rev 8 stuff needed */
-@@ -734,12 +757,9 @@ out_free:
+@@ -734,12 +795,9 @@ out_free:
 static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
 				  struct ssb_boardinfo *bi)
 {
@ -455,7 +502,20 @@
  * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,8 +25,10 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -467,7 +527,16 @@
 	u8 ant_available_a;	/* 2GHz antenna available bits (up to 4) */
 	u8 ant_available_bg;	/* 5GHz antenna available bits (up to 4) */
 	u16 pa0b0;
-@@ -92,6 +94,15 @@ struct ssb_sprom {
+@@ -80,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -92,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -483,7 +552,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -99,7 +110,7 @@ struct ssb_sprom {
+@@ -99,7 +118,7 @@ struct ssb_sprom {
 struct ssb_boardinfo {
 	u16 vendor;
 	u16 type;
@ -492,7 +561,7 @@
 };
 
 
-@@ -229,10 +240,9 @@ struct ssb_driver {
+@@ -229,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -519,7 +588,7 @@
  */
 --- a/include/linux/ssb/ssb_regs.h
 +++ b/include/linux/ssb/ssb_regs.h
-@@ -432,6 +432,23 @@
+@@ -432,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -540,10 +609,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -462,6 +479,46 @@
+@@ -456,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
--- a/target/linux/generic/patches-3.1/020-ssb_update.patch
+++ b/target/linux/generic/patches-3.1/020-ssb_update.patch
@ -58,10 +58,57 @@
 	}
 --- a/drivers/ssb/pci.c
 +++ b/drivers/ssb/pci.c
-@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -90,7 +137,20 @@
 	/* TODO - get remaining rev 8 stuff needed */
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -25,7 +25,7 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -25,7 +31,7 @@ struct ssb_sprom {
 	u8 et1phyaddr;		/* MII address for enet1 */
 	u8 et0mdcport;		/* MDIO for enet0 */
 	u8 et1mdcport;		/* MDIO for enet1 */
@ -99,7 +159,16 @@
 	u8 country_code;	/* Country Code */
 	u16 leddc_on_time;	/* LED Powersave Duty Cycle On Count */
 	u16 leddc_off_time;	/* LED Powersave Duty Cycle Off Count */
-@@ -94,6 +94,15 @@ struct ssb_sprom {
+@@ -82,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -94,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -115,7 +184,7 @@
 	/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 };
 
-@@ -231,10 +240,9 @@ struct ssb_driver {
+@@ -231,10 +248,9 @@ struct ssb_driver {
 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 
 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@ -131,7 +200,7 @@
 
 --- a/include/linux/ssb/ssb_regs.h
 +++ b/include/linux/ssb/ssb_regs.h
-@@ -432,6 +432,23 @@
+@@ -432,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -152,10 +221,50 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -462,6 +479,46 @@
+@@ -456,12 +506,53 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GLPO		0x014A	/* 5.2GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GHPO		0x014E	/* 5.8GHz OFDM power offset */
 
--- a/target/linux/generic/patches-3.2/020-ssb_update.patch
+++ b/target/linux/generic/patches-3.2/020-ssb_update.patch
@ -1,9 +1,56 @@
 --- a/drivers/ssb/pci.c
 +++ b/drivers/ssb/pci.c
-@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
 	       sizeof(out->antenna_gain.ghz5));
 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
 +	/* Extract FEM info */
 +	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
 +		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
@ -32,7 +79,29 @@
 	/* TODO - get remaining rev 8 stuff needed */
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -94,6 +94,15 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -82,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+@@ -94,6 +102,15 @@ struct ssb_sprom {
 		} ghz5;		/* 5GHz band */
 	} antenna_gain;
 
@ -50,7 +119,7 @@
 
 --- a/include/linux/ssb/ssb_regs.h
 +++ b/include/linux/ssb/ssb_regs.h
-@@ -432,6 +432,23 @@
+@@ -432,6 +432,56 @@
 #define  SSB_SPROM8_RXPO2G		0x00FF	/* 2GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G		0xFF00	/* 5GHz RX power offset */
 #define  SSB_SPROM8_RXPO5G_SHIFT	8
@ -71,13 +140,56 @@
 +#define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
 +#define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
 +#define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
-@@ -464,6 +481,46 @@
+@@ -456,6 +506,7 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
+@@ -502,6 +553,46 @@
+ #define SSB_BFL2_SPUR_WAR		0x0200	/* has a workaround for clock-harmonic spurs */
+ #define SSB_BFL2_GPLL_WAR		0x0400	/* altenative G-band PLL settings implemented */
 
- /* Values for boardflags_lo read from SPROM */
- #define SSB_BFL_BTCOEXIST		0x0001	/* implements Bluetooth coexistance */
+/* Values for boardflags_lo read from SPROM */
+#define SSB_BFL_BTCOEXIST		0x0001	/* implements Bluetooth coexistance */
 +#define SSB_BFL_PACTRL			0x0002	/* GPIO 9 controlling the PA */
 +#define SSB_BFL_AIRLINEMODE		0x0004	/* implements GPIO 13 radio disable indication */
 +#define SSB_BFL_RSSI			0x0008	/* software calculates nrssi slope. */
@ -116,8 +228,6 @@
 +#define SSB_BFL2_SPUR_WAR		0x0200	/* has a workaround for clock-harmonic spurs */
 +#define SSB_BFL2_GPLL_WAR		0x0400	/* altenative G-band PLL settings implemented */
 +
-+/* Values for boardflags_lo read from SPROM */
-+#define SSB_BFL_BTCOEXIST		0x0001	/* implements Bluetooth coexistance */
- #define SSB_BFL_PACTRL			0x0002	/* GPIO 9 controlling the PA */
- #define SSB_BFL_AIRLINEMODE		0x0004	/* implements GPIO 13 radio disable indication */
- #define SSB_BFL_RSSI			0x0008	/* software calculates nrssi slope. */
+ /* Values for SSB_SPROM1_BINF_CCODE */
+ enum {
+ 	SSB_SPROM1CCODE_WORLD = 0,
--- a/target/linux/generic/patches-3.3/020-ssb_update.patch
+++ b/target/linux/generic/patches-3.3/020-ssb_update.patch
@ -0,0 +1,130 @@
+--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ 	int i;
+-	u16 v;
+	u16 v, o;
+	u16 pwr_info_offset[] = {
+		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
+		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
+	};
+	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
+			ARRAY_SIZE(out->core_pwr_info));
+ 
+ 	/* extract the MAC address */
+ 	for (i = 0; i < 3; i++) {
+@@ -607,6 +613,38 @@ static void sprom_extract_r8(struct ssb_
+ 	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
+ 	       sizeof(out->antenna_gain.ghz5));
+ 
+	/* Extract cores power info info */
+	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+		o = pwr_info_offset[i];
+		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
+			SSB_SPROM8_2G_MAXP, 0);
+
+		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
+
+		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
+		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
+			SSB_SPROM8_5G_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GH_MAXP, 0);
+		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
+			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
+
+		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
+		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
+	}
+
+ 	/* Extract FEM info */
+ 	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
+ 		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
+--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+ 
+struct ssb_sprom_core_pwr_info {
+	u8 itssi_2g, itssi_5g;
+	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
+ struct ssb_sprom {
+ 	u8 revision;
+ 	u8 il0mac[6];		/* MAC address for 802.11b/g */
+@@ -82,6 +88,8 @@ struct ssb_sprom {
+ 	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
+ 	/* TODO store board flags in a single u64 */
+ 
+	struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
+ 	/* Antenna gain values for up to 4 antennas
+ 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ 	 * loss in the connectors is bigger than the gain. */
+--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
+@@ -449,6 +449,39 @@
+ #define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
+ #define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
+ #define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2	0x0100
+#define SSB_SROM8_PWR_INFO_CORE3	0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI		0x00
+#define  SSB_SPROM8_2G_MAXP		0x00FF
+#define  SSB_SPROM8_2G_ITSSI		0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
+#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1		0x04
+#define SSB_SROM8_2G_PA_2		0x06
+#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP		0x00FF
+#define  SSB_SPROM8_5G_ITSSI		0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
+#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP		0x00FF
+#define  SSB_SPROM8_5GL_MAXP		0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
+#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1		0x0E
+#define SSB_SROM8_5G_PA_2		0x10
+#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1		0x14
+#define SSB_SROM8_5GL_PA_2		0x16
+#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1		0x1A
+#define SSB_SROM8_5GH_PA_2		0x1C
+
+/* TODO: Make it deprecated */
+ #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
+ #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
+ #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
+@@ -473,6 +506,7 @@
+ #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1		0x00DA
+ #define SSB_SPROM8_PA1HIB2		0x00DC
+
+ #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */