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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00

lots of ifxmips cleanups

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11596 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic
2008-06-28 16:56:04 +00:00
parent f0579831aa
commit 6ddec82f97
13 changed files with 229 additions and 116 deletions

View File

@@ -2,24 +2,10 @@
menu "IFXMips built-in"
config IFXMIPS_ASC_UART
bool "IFXMips asc uart"
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
default y
config MTD_IFXMIPS
bool "IFXMips flash map"
default y
config IFXMIPS_WDT
bool "IFXMips watchdog"
default y
config IFXMIPS_LED
bool "IFXMips led"
default y
config IFXMIPS_SSC
bool "IFXMips ssc"
default y

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@@ -32,7 +32,7 @@
#include <asm/io.h>
#include <asm/ifxmips/ifxmips.h>
#define MAX_IFXMIPS_DEVS 7
#define MAX_IFXMIPS_DEVS 9
#define BOARD_DANUBE "Danube"
#define BOARD_DANUBE_CHIPID 0x10129083
@@ -79,6 +79,24 @@ ifxmips_wdt[] =
},
};
static struct platform_device
ifxmips_asc0[] =
{
{
.id = 0,
.name = "ifxmips_asc",
},
};
static struct platform_device
ifxmips_asc1[] =
{
{
.id = 1,
.name = "ifxmips_asc",
},
};
static struct physmap_flash_data
ifxmips_mtd_data = {
.width = 2,
@@ -155,6 +173,8 @@ ifxmips_init_devices(void)
ifxmips_devs[dev++] = ifxmips_mii;
ifxmips_devs[dev++] = ifxmips_mtd;
ifxmips_devs[dev++] = ifxmips_wdt;
//ifxmips_devs[dev++] = ifxmips_asc0;
ifxmips_devs[dev++] = ifxmips_asc1;
#ifdef CONFIG_GPIO_DEVICE
ifxmips_devs[dev++] = ifxmips_gpio_dev;
#endif

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@@ -413,3 +413,19 @@ cgu_get_clockout(int clkout)
}
return 0;
}
void cgu_setup_pci_clk(int external_clock)
{
//set clock to 33Mhz
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR);
// internal or external clock
if(external_clock)
{
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~ (1 << 16), IFXMIPS_CGU_IFCCR);
ifxmips_w32((1 << 30), IFXMIPS_CGU_PCICR);
} else {
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16), IFXMIPS_CGU_IFCCR);
ifxmips_w32((1 << 31) | (1 << 30), IFXMIPS_CGU_PCICR);
}
}

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@@ -125,8 +125,7 @@ prom_init(void)
memsize -= prom_cp1_size;
prom_cp1_base = (unsigned int*)(0xA0000000 + (memsize * 1024 * 1024));
prom_printf(KERN_INFO "Using %dMB Ram and reserving %dMB for cp1\n",
memsize, prom_cp1_size);
prom_printf("Using %dMB Ram and reserving %dMB for cp1\n", memsize, prom_cp1_size);
memsize *= 1024 * 1024;
if(!*arcs_cmdline)

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@@ -6,6 +6,7 @@
#include <linux/mm.h>
#include <asm/ifxmips/ifxmips.h>
#include <asm/ifxmips/ifxmips_irq.h>
#include <asm/ifxmips/ifxmips_cgu.h>
#include <asm/addrspace.h>
#include <linux/vmalloc.h>
@@ -17,26 +18,30 @@
extern int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
extern int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
struct pci_ops ifxmips_pci_ops = {
struct pci_ops ifxmips_pci_ops =
{
.read = ifxmips_pci_read_config_dword,
.write = ifxmips_pci_write_config_dword
};
static struct resource pci_io_resource = {
static struct resource pci_io_resource =
{
.name = "io pci IO space",
.start = IFXMIPS_PCI_IO_BASE,
.end = IFXMIPS_PCI_IO_BASE + IFXMIPS_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource pci_mem_resource = {
static struct resource pci_mem_resource =
{
.name = "ext pci memory space",
.start = IFXMIPS_PCI_MEM_BASE,
.end = IFXMIPS_PCI_MEM_BASE + IFXMIPS_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
static struct pci_controller ifxmips_pci_controller = {
static struct pci_controller ifxmips_pci_controller =
{
.pci_ops = &ifxmips_pci_ops,
.mem_resource = &pci_mem_resource,
.mem_offset = 0x00000000UL,
@@ -45,12 +50,25 @@ static struct pci_controller ifxmips_pci_controller = {
};
u32 ifxmips_pci_mapped_cfg;
u32 ifxmips_pci_external_clock = 0;
int pcibios_plat_dev_init(struct pci_dev *dev){
static int __init
ifxmips_pci_set_external_clk(char *str)
{
printk("cgu: setting up external pci clock\n");
ifxmips_pci_external_clock = 1;
return 1;
}
__setup("pci_external_clk", ifxmips_pci_set_external_clk);
int
pcibios_plat_dev_init(struct pci_dev *dev)
{
u8 pin;
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
switch(pin) {
switch(pin)
{
case 0:
break;
case 1:
@@ -69,12 +87,13 @@ int pcibios_plat_dev_init(struct pci_dev *dev){
return 0;
}
static void __init ifxmips_pci_startup (void){
static void __init
ifxmips_pci_startup(void)
{
u32 temp_buffer;
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16), IFXMIPS_CGU_IFCCR);
ifxmips_w32((1 << 31) | (1 << 30), IFXMIPS_CGU_PCICR);
cgu_setup_pci_clk(ifxmips_pci_external_clock);
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OUT) | (1 << 5), IFXMIPS_GPIO_P1_OUT);
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OD) | (1 << 5), IFXMIPS_GPIO_P1_OD);
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_DIR) | (1 << 5), IFXMIPS_GPIO_P1_DIR);
@@ -138,8 +157,10 @@ static void __init ifxmips_pci_startup (void){
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OUT) | (1 << 5), IFXMIPS_GPIO_P1_OUT);
}
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
switch (slot) {
int __init
pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
switch(slot)
{
case 13:
/* IDSEL = AD29 --> USB Host Controller */
return (INT_NUM_IM1_IRL0 + 17);
@@ -152,11 +173,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
}
}
int pcibios_init(void){
int
pcibios_init(void)
{
extern int pci_probe_only;
pci_probe_only = 0;
printk ("PCI: Probing PCI hardware on host bus 0.\n");
printk("PCI: Probing PCI hardware on host bus 0.\n");
ifxmips_pci_startup ();
// IFXMIPS_PCI_REG32(PCI_CR_CLK_CTRL_REG) &= (~8);
ifxmips_pci_mapped_cfg = (u32)ioremap_nocache(0x17000000, 0x800 * 16);