Merge branch 'xburst' of git@projects.qi-hardware.com:openwrt-xburst into xburst

Config.in

@@ -43,6 +43,9 @@ menu "Target Images"
 
 		config TARGET_INITRAMFS_COMPRESSION_LZMA
 			bool "LZMA"
+
+		config TARGET_INITRAMFS_COMPRESSION_LZO
+			bool "LZO"
 	endchoice
 
 	config TARGET_ROOTFS_JFFS2
@@ -336,6 +339,7 @@ source "toolchain/Config.in"
 
 source "target/imagebuilder/Config.in"
 source "target/sdk/Config.in"
+source "target/toolchain/Config.in"
 
 source "tmp/.config-package.in"
 

include/host-build.mk

@@ -36,6 +36,7 @@ define Host/Prepare
 endef
 
 HOST_CONFIGURE_VARS = \
+	CFLAGS="$(HOST_CFLAGS)" \
 	CPPFLAGS="$(HOST_CFLAGS)" \
 	LDFLAGS="$(HOST_LDFLAGS)" \
 	SHELL="$(BASH)"

include/image.mk

@@ -23,7 +23,7 @@ JFFS2OPTS     :=  --pad --big-endian --squash
 SQUASHFS_OPTS :=  -be
 endif
 
-ifneq ($(CONFIG_LINUX_2_6_21)$(CONFIG_LINUX_2_6_25)$(CONFIG_LINUX_2_6_28),)
+ifneq ($(CONFIG_LINUX_2_4)$(CONFIG_LINUX_2_6_21)$(CONFIG_LINUX_2_6_25)$(CONFIG_LINUX_2_6_28),)
 USE_SQUASHFS3 := y
 endif
 
@@ -31,7 +31,7 @@ ifneq ($(USE_SQUASHFS3),)
 MKSQUASHFS_CMD := $(STAGING_DIR_HOST)/bin/mksquashfs-lzma
 else
 MKSQUASHFS_CMD := $(STAGING_DIR_HOST)/bin/mksquashfs4
-SQUASHFS_OPTS  := -lzma -processors 1
+SQUASHFS_OPTS  := -comp lzma -processors 1
 endif
 
 JFFS2_BLOCKSIZE ?= 64k 128k
@@ -40,13 +40,17 @@ define add_jffs2_mark
 	echo -ne '\xde\xad\xc0\xde' >> $(1)
 endef
 
-# pad to 64k and add jffs2 end-of-filesystem mark
-# do this twice to make sure that this works with 128k blocksize as well
+# pad to 4k, 8k, 64k, 128k and add jffs2 end-of-filesystem mark
 define prepare_generic_squashfs
-	dd if=$(1) of=$(KDIR)/tmpfile.1 bs=64k conv=sync
+	dd if=$(1) of=$(KDIR)/tmpfile.0 bs=4k conv=sync
+	$(call add_jffs2_mark,$(KDIR)/tmpfile.0)
+	dd if=$(KDIR)/tmpfile.0 of=$(KDIR)/tmpfile.1 bs=4k conv=sync
 	$(call add_jffs2_mark,$(KDIR)/tmpfile.1)
-	dd of=$(1) if=$(KDIR)/tmpfile.1 bs=64k conv=sync
+	dd if=$(KDIR)/tmpfile.1 of=$(KDIR)/tmpfile.2 bs=64k conv=sync
+	$(call add_jffs2_mark,$(KDIR)/tmpfile.2)
+	dd if=$(KDIR)/tmpfile.2 of=$(1) bs=64k conv=sync
 	$(call add_jffs2_mark,$(1))
+	rm -f $(KDIR)/tmpfile.*
 endef
 
 ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)

include/kernel-build.mk

@@ -104,7 +104,8 @@ define BuildKernel
 	$(LINUX_CONFCMD) > $(LINUX_DIR)/.config
 	touch $(LINUX_CONFIG)
 	$(_SINGLE)$(MAKE) -C $(LINUX_DIR) $(KERNEL_MAKEOPTS) $$@
-	$(SCRIPT_DIR)/kconfig.pl '>' $(GENERIC_LINUX_CONFIG) $(LINUX_DIR)/.config > $(if $(LINUX_SUBCONFIG),$(LINUX_SUBCONFIG),$(LINUX_CONFIG))
+	$(SCRIPT_DIR)/kconfig.pl '>' $(if $(LINUX_SUBCONFIG),'+' $(GENERIC_LINUX_CONFIG) $(LINUX_CONFIG),$(GENERIC_LINUX_CONFIG)) \
+		$(LINUX_DIR)/.config > $(if $(LINUX_SUBCONFIG),$(LINUX_SUBCONFIG),$(LINUX_CONFIG))
 	$(Kernel/Configure)
 
   install: $(LINUX_DIR)/.image

include/kernel-defaults.mk

@@ -67,7 +67,8 @@ ifeq ($(KERNEL),2.6)
   ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
     define Kernel/SetInitramfs
 		mv $(LINUX_DIR)/.config $(LINUX_DIR)/.config.old
-		grep -v -e INITRAMFS -e CONFIG_RD_ $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
+		grep -v -e INITRAMFS -e CONFIG_RD_ -e CONFIG_BLK_DEV_INITRD $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
+		echo 'CONFIG_BLK_DEV_INITRD=y' >> $(LINUX_DIR)/.config
 		echo 'CONFIG_INITRAMFS_SOURCE="$(strip $(TARGET_DIR) $(INITRAMFS_EXTRA_FILES))"' >> $(LINUX_DIR)/.config
 		echo 'CONFIG_INITRAMFS_ROOT_UID=$(shell id -u)' >> $(LINUX_DIR)/.config
 		echo 'CONFIG_INITRAMFS_ROOT_GID=$(shell id -g)' >> $(LINUX_DIR)/.config
@@ -75,6 +76,7 @@ ifeq ($(KERNEL),2.6)
 		echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),CONFIG_INITRAMFS_COMPRESSION_GZIP=y\nCONFIG_RD_GZIP=y,# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set\n# CONFIG_RD_GZIP is not set)" >> $(LINUX_DIR)/.config
 		echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_BZIP2),CONFIG_INITRAMFS_COMPRESSION_BZIP2=y\nCONFIG_RD_BZIP2=y,# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set\n# CONFIG_RD_BZIP2 is not set)" >> $(LINUX_DIR)/.config
 		echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZMA),CONFIG_INITRAMFS_COMPRESSION_LZMA=y\nCONFIG_RD_LZMA=y,# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set\n# CONFIG_RD_LZMA is not set)" >> $(LINUX_DIR)/.config
+		echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),CONFIG_INITRAMFS_COMPRESSION_LZO=y\nCONFIG_RD_LZO=y,# CONFIG_INITRAMFS_COMPRESSION_LZO is not set\n# CONFIG_RD_LZO is not set)" >> $(LINUX_DIR)/.config
     endef
   else
     define Kernel/SetInitramfs
@@ -104,7 +106,7 @@ define Kernel/Configure/Default
 	$(SED) 's,.*CONFIG_AEABI.*,$(if $(CONFIG_EABI_SUPPORT),CONFIG_AEABI=y,# CONFIG_AEABI is not set),' $(LINUX_DIR)/.config.target
 	$(if $(CONFIG_EABI_SUPPORT),echo '# CONFIG_OABI_COMPAT is not set' >> $(LINUX_DIR)/.config.target)
 	$(SCRIPT_DIR)/metadata.pl kconfig $(TMP_DIR)/.packageinfo $(TOPDIR)/.config > $(LINUX_DIR)/.config.override
-	$(SCRIPT_DIR)/kconfig.pl 'm+' $(LINUX_DIR)/.config.target $(LINUX_DIR)/.config.override > $(LINUX_DIR)/.config
+	$(SCRIPT_DIR)/kconfig.pl 'm+' '+' $(LINUX_DIR)/.config.target /dev/null $(LINUX_DIR)/.config.override > $(LINUX_DIR)/.config
 	$(call Kernel/SetInitramfs)
 	$(call Kernel/Configure/$(KERNEL))
 	rm -rf $(KERNEL_BUILD_DIR)/modules

include/kernel-version.mk

@@ -16,17 +16,14 @@ endif
 ifeq ($(LINUX_VERSION),2.6.25.20)
   LINUX_KERNEL_MD5SUM:=0da698edccf03e2235abc2830a495114
 endif
-ifeq ($(LINUX_VERSION),2.6.27.35)
-  LINUX_KERNEL_MD5SUM:=a4fa9eb5ee4876522e8015ca7da3ae40
-endif
 ifeq ($(LINUX_VERSION),2.6.28.10)
   LINUX_KERNEL_MD5SUM:=c4efb2c494d749cb5de274f8ae41c3fa
 endif
 ifeq ($(LINUX_VERSION),2.6.30.9)
   LINUX_KERNEL_MD5SUM:=5a4cd5543a9d7c1a819700b21be31ef1
 endif
-ifeq ($(LINUX_VERSION),2.6.31.5)
-  LINUX_KERNEL_MD5SUM:=926bff46d24e2f303e4ee92234e394d8
+ifeq ($(LINUX_VERSION),2.6.31.6)
+  LINUX_KERNEL_MD5SUM:=485472df88af84becdcf47f45de3ba46
 endif
 
 # disable the md5sum check for unknown kernel versions

include/kernel.mk

@@ -102,7 +102,7 @@ define KernelPackage
   $(eval $(call KernelPackage/Defaults))
   $(eval $(call KernelPackage/$(1)))
   $(eval $(call KernelPackage/$(1)/$(KERNEL)))
-  $(eval $(call KernelPackage/$(1)/$(BOARD)-$(KERNEL)))
+  $(eval $(call KernelPackage/$(1)/$(BOARD)))
 
   define Package/kmod-$(1)
     TITLE:=$(TITLE)
@@ -113,7 +113,7 @@ define KernelPackage
     VERSION:=$(LINUX_VERSION)$(if $(PKG_VERSION),+$(PKG_VERSION))-$(if $(PKG_RELEASE),$(PKG_RELEASE),$(LINUX_RELEASE))
     $(call KernelPackage/$(1))
     $(call KernelPackage/$(1)/$(KERNEL))
-    $(call KernelPackage/$(1)/$(BOARD)-$(KERNEL))
+    $(call KernelPackage/$(1)/$(BOARD))
   endef
 
   ifdef KernelPackage/$(1)/description

include/package-defaults.mk

@@ -37,6 +37,7 @@ define Package/Default
   KCONFIG:=
   BUILDONLY:=
   URL:=
+  VARIANT:=
 endef
 
 Build/Patch:=$(Build/Patch/Default)

include/package-dumpinfo.mk

@@ -32,7 +32,8 @@ $(if $(MENU),Menu: $(MENU)
 )Version: $(VERSION)
 Depends: $(DEPENDS)
 Provides: $(PROVIDES)
-$(if $(PKG_BUILD_DEPENDS),Build-Depends: $(PKG_BUILD_DEPENDS)
+$(if $(VARIANT),Build-Variant: $(VARIANT)
+)$(if $(PKG_BUILD_DEPENDS),Build-Depends: $(PKG_BUILD_DEPENDS)
 )$(if $(HOST_BUILD_DEPENDS),Build-Depends/host: $(HOST_BUILD_DEPENDS)
 )$(if $(BUILD_TYPES),Build-Types: $(BUILD_TYPES)
 )Section: $(SECTION)

include/package-ipkg.mk

@@ -36,6 +36,7 @@ ifeq ($(DUMP),)
     IDIR_$(1):=$(PKG_BUILD_DIR)/ipkg-$(PKGARCH)/$(1)
     INFO_$(1):=$(IPKG_STATE_DIR)/info/$(1).list
 
+    ifeq ($(if $(VARIANT),$(BUILD_VARIANT)),$(VARIANT))
     ifdef Package/$(1)/install
       ifneq ($(CONFIG_PACKAGE_$(1))$(SDK)$(DEVELOPER),)
         compile: $$(IPKG_$(1)) $(STAGING_DIR_ROOT)/stamp/.$(1)_installed
@@ -49,6 +50,7 @@ ifeq ($(DUMP),)
 		@echo "WARNING: skipping $(1) -- package not selected"
       endif
     endif
+    endif
 
     IDEPEND_$(1):=$$(call filter_deps,$$(DEPENDS))
   

include/package.mk

@@ -17,7 +17,7 @@ include $(INCLUDE_DIR)/unpack.mk
 include $(INCLUDE_DIR)/depends.mk
 
 STAMP_PREPARED=$(PKG_BUILD_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell $(call find_md5,${CURDIR} $(PKG_FILE_DEPENDS),)))
-STAMP_CONFIGURED:=$(PKG_BUILD_DIR)/.configured$(if $(QUILT)$(DUMP),,_$(call confvar,$(PKG_CONFIG_DEPENDS)))
+STAMP_CONFIGURED:=$(PKG_BUILD_DIR)/.configured$(if $(DUMP),,_$(call confvar,$(PKG_CONFIG_DEPENDS)))
 STAMP_BUILT:=$(PKG_BUILD_DIR)/.built
 STAMP_INSTALLED:=$(STAGING_DIR)/stamp/.$(PKG_NAME)_installed
 

include/subdir.mk

@@ -35,7 +35,9 @@ define subdir
       )
       $(call warn_eval,$(1)/$(bd),t,T,$(1)/$(bd)/$(target): $(if $(QUILT),,$($(1)/$(bd)/$(target)) $(call $(1)//$(target),$(1)/$(bd))))
 	  	$(if $(BUILD_LOG),@mkdir -p $(BUILD_LOG_DIR)/$(1)/$(bd))
-		+$(if $(BUILD_LOG),set -o pipefail;) $$(SUBMAKE) -C $(1)/$(bd) $(target) $(if $(BUILD_LOG),SILENT= 2>&1 | tee $(BUILD_LOG_DIR)/$(1)/$(bd)/$(target).txt) $(if $(findstring $(bd),$($(1)/builddirs-ignore-$(target))), || $(call MESSAGE,   ERROR: $(1)/$(bd) failed to build.))
+        $(foreach variant,$(if $(BUILD_VARIANT),$(BUILD_VARIANT),$(if $($(1)/$(bd)/variants),$($(1)/$(bd)/variants),__default)),
+			+$(if $(BUILD_LOG),set -o pipefail;) $$(SUBMAKE) -C $(1)/$(bd) $(target) BUILD_VARIANT="$(filter-out __default,$(variant))" $(if $(BUILD_LOG),SILENT= 2>&1 | tee $(BUILD_LOG_DIR)/$(1)/$(bd)/$(target).txt) $(if $(findstring $(bd),$($(1)/builddirs-ignore-$(target))), || $(call MESSAGE,   ERROR: $(1)/$(bd) failed to build$(if $(filter-out __default,$(variant)), (build variant: $(variant))).))
+        )
         $$(if $(call debug,$(1)/$(bd),v),,.SILENT: $(1)/$(bd)/$(target))
 
       # legacy targets

include/target.mk

@@ -115,7 +115,7 @@ GENERIC_FILES_DIR := $(foreach dir,$(wildcard $(GENERIC_PLATFORM_DIR)/files $(GE
 
 GENERIC_LINUX_CONFIG?=$(firstword $(wildcard $(GENERIC_PLATFORM_DIR)/config-$(KERNEL_PATCHVER) $(GENERIC_PLATFORM_DIR)/config-default))
 LINUX_CONFIG?=$(firstword $(wildcard $(foreach subdir,$(PLATFORM_DIR) $(PLATFORM_SUBDIR),$(subdir)/config-$(KERNEL_PATCHVER) $(subdir)/config-default)) $(PLATFORM_DIR)/config-$(KERNEL_PATCHVER))
-LINUX_SUBCONFIG?=$(firstword $(wildcard $(PLATFORM_SUBDIR)/config-$(KERNEL_PATCHVER) $(PLATFORM_SUBDIR)/config-default))
+LINUX_SUBCONFIG?=$(if $(SHARED_LINUX_CONFIG),,$(firstword $(wildcard $(PLATFORM_SUBDIR)/config-$(KERNEL_PATCHVER) $(PLATFORM_SUBDIR)/config-default)))
 ifeq ($(LINUX_CONFIG),$(LINUX_SUBCONFIG))
   LINUX_SUBCONFIG:=
 endif

include/toolchain-build.mk

@@ -7,6 +7,7 @@
 
 override CONFIG_AUTOREBUILD=
 
+REAL_STAGING_DIR_HOST:=$(STAGING_DIR_HOST)
 STAGING_DIR_HOST:=$(TOOLCHAIN_DIR)
 BUILD_DIR_HOST:=$(BUILD_DIR_TOOLCHAIN)
 

package/base-files/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=base-files
-PKG_RELEASE:=33
+PKG_RELEASE:=34
 
 PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/
 
@@ -156,7 +156,9 @@ define Package/libc/Default
   SECTION:=libs
   CATEGORY:=Base system
   VERSION:=$(LIBC_VERSION)-$(PKG_RELEASE)
+ifneq ($(TARGET_avr32)$(TARGET_coldfire),)
   DEPENDS:=+libgcc
+endif
   URL:=$(LIBC_URL)
 endef
 

package/base-files/files/etc/init.d/boot

@@ -59,6 +59,7 @@ start() {
 	touch /var/log/lastlog
 	touch /tmp/resolv.conf.auto
 	ln -sf /tmp/resolv.conf.auto /tmp/resolv.conf
+	grep -q debugfs /proc/filesystems && mount -t debugfs debugfs /sys/kernel/debug
 	[ "$FAILSAFE" = "true" ] && touch /tmp/.failsafe
 
 	killall -q hotplug2

package/base-files/files/sbin/sysupgrade

@@ -51,7 +51,8 @@ EOF
 
 add_uci_conffiles() {
 	local file="$1"
-	find /etc/config /etc/passwd /etc/group /etc/dropbear /etc/firewall.user /etc/rc.local > "$file"
+	find /etc/config /etc/passwd /etc/group /etc/dropbear \
+		/etc/firewall.user /etc/rc.local -type f > "$file"
 	return 0
 }
 

package/busybox/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=busybox
 PKG_VERSION:=1.14.4
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=http://www.busybox.net/downloads \

package/busybox/patches/001-init_avoid_loop_opening_tty.patch

@@ -6,7 +6,7 @@
  			 */
 -			if (a->pid == 0)
 +			if (a->pid == 0) {
-+				if (a->terminal && access(a->terminal, R_OK | W_OK))
++				if (a->terminal[0] && access(a->terminal, R_OK | W_OK))
 +					continue;
  				a->pid = run(a);
 +			}

package/busybox/patches/500-ping6_crash.patch

@@ -0,0 +1,12 @@
+Index: busybox-1.15.2/networking/ping.c
+===================================================================
+--- busybox-1.15.2.orig/networking/ping.c	2009-11-24 22:57:29.000000000 +0100
++++ busybox-1.15.2/networking/ping.c	2009-11-24 22:58:58.000000000 +0100
+@@ -769,6 +769,7 @@
+ int ping6_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
+ int ping6_main(int argc UNUSED_PARAM, char **argv)
+ {
++	argv[-1] = argv[0];
+ 	argv[0] = (char*)"-6";
+ 	return ping_main(0 /* argc+1 - but it's unused anyway */,
+ 			argv - 1);

package/compcache/Config.in

@@ -0,0 +1,30 @@
+# compcache configuration
+
+config COMPCACHE_ENABLE
+	bool "enabled on boot"
+	default n
+	depends on PACKAGE_kmod-compcache
+	help
+	  Enables compressed ram swap devices.
+
+config COMPCACHE_RAM_REPORTED
+	string "swap space reported to kernel in kb"
+	depends on PACKAGE_kmod-compcache
+	default "2048"
+	help
+	  This is the amount of memory that will be reported 
+	  to the kernel as swap. The real ram in use will differ, 
+	  because of lzo compression.
+	  Example:
+	    16 MB = 2048 KB 
+	    32 MB = 4098 KB
+
+config COMPCACHE_BACKUP_DEV
+	string "Backup device for compcache"
+	depends on PACKAGE_kmod-compcache
+	default ""
+	help
+	  Compcache will use this as a backup device for swap.
+	  Example:
+	         /dev/sda5
+

package/compcache/Makefile

@@ -1,21 +1,19 @@
 #
-# Copyright (C) 2006 OpenWrt.org
+# Copyright (C) 2009 OpenWrt.org
 #
 # This is free software, licensed under the GNU General Public License v2.
 # See /LICENSE for more information.
 #
-# $Id: Makefile 6562 2009-01-21 11:19:24 ghd $
+# $Id: Makefile 6562 2009-10-05 08:30:14 ghd $
 
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=compcache
-PKG_VERSION:=0.5
+PKG_VERSION:=0.5.4
 PKG_RELEASE:=$(PKG_VERSION)-1
 PKG_SOURCE_URL:=http://compcache.googlecode.com/files/
-PKG_MD5SUM:=eea73324e9e69178866f6c0fbc852f1f
-
-#PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
+PKG_MD5SUM:=e83535925a014ac34e1eaeb4f7a2f49a
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 
@@ -26,18 +24,18 @@ define KernelPackage/compcache
   DEPENDS:=@LINUX_2_6 @BUSYBOX_CONFIG_SWAPONOFF
   TITLE:=Driver for compressed ram swap device
   VERSION:=$(LINUX_VERSION)-$(BOARD)-$(LINUX_RELEASE)+$(PKG_RELEASE)
-  FILES:=$(PKG_BUILD_DIR)/compcache.$(LINUX_KMOD_SUFFIX) \
-         $(PKG_BUILD_DIR)/sub-projects/compression/lzo-kmod/lzo1x.$(LINUX_KMOD_SUFFIX) \
-	 $(PKG_BUILD_DIR)/sub-projects/allocators/xvmalloc-kmod/xvmalloc.$(LINUX_KMOD_SUFFIX)
-#  AUTOLOAD:=$(call AutoLoad,10,xvmalloc lzo1x compcache+compcache_size_kbytes=2048)
+  FILES:=$(PKG_BUILD_DIR)/ramzswap.$(LINUX_KMOD_SUFFIX) \
+	  $(PKG_BUILD_DIR)/sub-projects/compression/lzo-kmod/lzo1x.$(LINUX_KMOD_SUFFIX) \
+	  $(PKG_BUILD_DIR)/sub-projects/allocators/xvmalloc-kmod/xvmalloc.$(LINUX_KMOD_SUFFIX)
 endef
 
-BUILDFLAGS:=-DCONFIG_BLK_DEV_COMPCACHE_DEBUG=0 \
-	    -DCONFIG_BLK_DEV_COMPCACHE_STATS=1 \
-	    -DCONFIG_XV_DEBUG=0 \
-	    -DCONFIG_XV_STATS=1 \
-	    -g -Wall
+XVM = sub-projects/allocators/xvmalloc-kmod
+LZO = sub-projects/compression/lzo-kmod
 
+BUILDFLAGS:=-DCONFIG_BLK_DEV_RAMZSWAP_STATS \
+	    -I$(PKG_BUILD_DIR)/$(XVM) \
+	    -I$(PKG_BUILD_DIR)/$(LZO) \
+	    -g -Wall
 
 define Build/Compile
 	$(MAKE) -C "$(LINUX_DIR)" \
@@ -52,8 +50,16 @@ endef
 define KernelPackage/compcache/install
 	$(INSTALL_DIR) $(1)/etc/config
 	$(INSTALL_DATA) ./files/compcache.config $(1)/etc/config/compcache
+	$(SED) 's,%ENABLED%,$(if $(CONFIG_COMPCACHE_ENABLE),1,0),g' \
+	      -e 's,%RAM_REPORTED%,$(call qstrip,$(CONFIG_COMPCACHE_RAM_REPORTED)),g' \
+	      -e 's,%BACKUP_DEV%,$(call qstrip,$(CONFIG_COMPCACHE_BACKUP_DEV)),g' \
+	      $(1)/etc/config/compcache
 	$(INSTALL_DIR) $(1)/etc/init.d
 	$(INSTALL_BIN) ./files/compcache.init $(1)/etc/init.d/compcache
 endef
 
+define KernelPackage/compcache/config
+	source "$(SOURCE)/Config.in"
+endef
+
 $(eval $(call KernelPackage,compcache))

package/compcache/files/compcache.config

@@ -1,3 +1,4 @@
 config compcache
-	option 'enabled'	'0'
-	option 'size_kbytes'	'2048'
+	option 'enabled'	'%ENABLED%'
+	option 'size_kbytes'	'%RAM_REPORTED%'
+	option 'backup_dev'	'%BACKUP_DEV%'

package/compcache/files/compcache.init

@@ -1,18 +1,28 @@
 #!/bin/sh /etc/rc.common
 # Copyright (C) 2008 OpenWrt.org
-START=19
+START=14
 
 load_modules() {
 	local section="$1"
 	config_get "size_kbytes" "$section" "size_kbytes"
+	config_get "backup_dev" "$section" "backup_dev"
+	#CC_PARAM_STR="memlimit_kb=$1 backing_dev=$BACKING_DEV"
 	config_get_bool "enabled" "$section" "enabled" '1'
 	if [ "$enabled" -gt 0 ]; then
-		if [ "`lsmod | grep 'compcache'`" != "" ]; then
-			echo "compcache allready loaded"
+		if [ "`cat /proc/swaps | grep 'ramzswap0'`" != "" ]; then
+			echo "compcache already loaded"
 		else
-			insmod xvmalloc
-			insmod lzo1x
-			insmod compcache compcache_size_kbytes=$size_kbytes
+			if [ "$backup_dev" != "" ]; then
+				params_set="memlimit_kb=$size_kbytes backing_swap=$backup_dev"
+			else
+				params_set="disksize_kb=$size_kbytes"
+			fi
+			if [ "`lsmod | grep 'ramzswap'`" == "" ]; then
+				insmod xvmalloc
+				insmod lzo1x
+				insmod ramzswap $params_set
+				swapon /dev/ramzswap0
+			fi
 		fi
 	fi
 }
@@ -22,9 +32,9 @@ remove_modules() {
 	config_get_bool "enabled" "$section" "enabled" '1'
 	if [ "$enabled" -gt 0 ]; then
 		[ "`cat /proc/swaps | grep 'ramzswap0'`" != "" ] && swapoff /dev/ramzswap0
-		[ "`lsmod | grep 'compcache'`" != "" ] && rmmod compcache > /dev/null
-		[ "`lsmod | grep 'lzo1x'`" != "" ] && rmmod lzo1x > /dev/null
-		[ "`lsmod | grep 'xvmalloc'`" != "" ] && rmmod xvmalloc > /dev/null
+		[ "`lsmod | grep 'ramzswap'`" != "" ] && rmmod ramzswap &> /dev/null
+		[ "`lsmod | grep 'lzo1x'`" != "" ] && rmmod lzo1x &> /dev/null
+		[ "`lsmod | grep 'xvmalloc'`" != "" ] && rmmod xvmalloc &> /dev/null
 	fi
 }
 

package/compcache/patches/000-provide_lzo_kmod.patch

@@ -0,0 +1,662 @@
+diff -uNr compcache-0.5.4-old/Makefile compcache-0.5.4/Makefile
+--- compcache-0.5.4-old/Makefile	2009-10-17 08:49:42.000000000 +0200
++++ compcache-0.5.4/Makefile	2009-10-17 09:39:34.000000000 +0200
+@@ -1,19 +1,26 @@
+ KERNEL_BUILD_PATH ?= "/lib/modules/$(shell uname -r)/build"
+ 
+ XVM = sub-projects/allocators/xvmalloc-kmod
+-EXTRA_CFLAGS	:=	-DCONFIG_BLK_DEV_RAMZSWAP_STATS	\
+-			-I$(PWD)/$(XVM)			\
++LZO = sub-projects/compression/lzo-kmod
++
++EXTRA_CFLAGS	+=	-DCONFIG_BLK_DEV_RAMZSWAP_STATS \
++			-I$(PWD)/$(XVM) \
++			-I$(PWD)/$(LZO) \
+ 			-g -Wall
+ 
+ obj-m	+=	$(XVM)/xvmalloc.o \
++		$(LZO)/lzo1x.o \
+ 		ramzswap.o
+ 
+ all:
+ 	make -C $(KERNEL_BUILD_PATH) M=$(PWD)/$(XVM) modules
++	make -C $(KERNEL_BUILD_PATH) M=$(PWD)/$(LZO) modules
+ 	make -C $(KERNEL_BUILD_PATH) M=$(PWD) modules
+ 	@ln -sf $(XVM)/xvmalloc.ko
++	@ln -sf $(LZO)/xvmalloc.ko
+ 
+ clean:
+ 	make -C $(KERNEL_BUILD_PATH) M=$(PWD) clean
+ 	make -C $(KERNEL_BUILD_PATH) M=$(PWD)/$(XVM) clean
++	make -C $(KERNEL_BUILD_PATH) M=$(PWD)/$(LZO) clean
+ 	@rm -rf *.ko
+diff -uNr compcache-0.5.4-old/ramzswap.c compcache-0.5.4/ramzswap.c
+--- compcache-0.5.4-old/ramzswap.c	2009-10-17 08:50:06.000000000 +0200
++++ compcache-0.5.4/ramzswap.c	2009-10-17 09:35:59.000000000 +0200
+@@ -20,7 +20,6 @@
+ #include <linux/device.h>
+ #include <linux/genhd.h>
+ #include <linux/highmem.h>
+-#include <linux/lzo.h>
+ #include <linux/mutex.h>
+ #include <linux/proc_fs.h>
+ #include <linux/string.h>
+diff -uNr compcache-0.5.4-old/ramzswap.h compcache-0.5.4/ramzswap.h
+--- compcache-0.5.4-old/ramzswap.h	2009-10-17 08:50:06.000000000 +0200
++++ compcache-0.5.4/ramzswap.h	2009-10-17 09:40:45.000000000 +0200
+@@ -16,6 +16,7 @@
+ #define _RAMZSWAP_H_
+ 
+ #include "xvmalloc.h"
++#include "lzo.h"
+ 
+ /*
+  * Stored at beginning of each compressed object.
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x.c compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x.c
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x.c	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x.c	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,7 @@
++#include <linux/module.h>
++
++#include "lzo1x_compress.c"
++#include "lzo1x_decompress.c"
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("LZO1X Lib");
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x_compress.c compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x_compress.c
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x_compress.c	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x_compress.c	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,227 @@
++/*
++ *  LZO1X Compressor from MiniLZO
++ *
++ *  Copyright (C) 1996-2005 Markus F.X.J. Oberhumer <markus@oberhumer.com>
++ *
++ *  The full LZO package can be found at:
++ *  http://www.oberhumer.com/opensource/lzo/
++ *
++ *  Changed for kernel use by:
++ *  Nitin Gupta <nitingupta910@gmail.com>
++ *  Richard Purdie <rpurdie@openedhand.com>
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <asm/unaligned.h>
++
++#include "lzodefs.h"
++#include "lzo.h"
++
++static noinline size_t
++_lzo1x_1_do_compress(const unsigned char *in, size_t in_len,
++		unsigned char *out, size_t *out_len, void *wrkmem)
++{
++	const unsigned char * const in_end = in + in_len;
++	const unsigned char * const ip_end = in + in_len - M2_MAX_LEN - 5;
++	const unsigned char ** const dict = wrkmem;
++	const unsigned char *ip = in, *ii = ip;
++	const unsigned char *end, *m, *m_pos;
++	size_t m_off, m_len, dindex;
++	unsigned char *op = out;
++
++	ip += 4;
++
++	for (;;) {
++		dindex = ((size_t)(0x21 * DX3(ip, 5, 5, 6)) >> 5) & D_MASK;
++		m_pos = dict[dindex];
++
++		if (m_pos < in)
++			goto literal;
++
++		if (ip == m_pos || ((size_t)(ip - m_pos) > M4_MAX_OFFSET))
++			goto literal;
++
++		m_off = ip - m_pos;
++		if (m_off <= M2_MAX_OFFSET || m_pos[3] == ip[3])
++			goto try_match;
++
++		dindex = (dindex & (D_MASK & 0x7ff)) ^ (D_HIGH | 0x1f);
++		m_pos = dict[dindex];
++
++		if (m_pos < in)
++			goto literal;
++
++		if (ip == m_pos || ((size_t)(ip - m_pos) > M4_MAX_OFFSET))
++			goto literal;
++
++		m_off = ip - m_pos;
++		if (m_off <= M2_MAX_OFFSET || m_pos[3] == ip[3])
++			goto try_match;
++
++		goto literal;
++
++try_match:
++		if (get_unaligned((const unsigned short *)m_pos)
++				== get_unaligned((const unsigned short *)ip)) {
++			if (likely(m_pos[2] == ip[2]))
++					goto match;
++		}
++
++literal:
++		dict[dindex] = ip;
++		++ip;
++		if (unlikely(ip >= ip_end))
++			break;
++		continue;
++
++match:
++		dict[dindex] = ip;
++		if (ip != ii) {
++			size_t t = ip - ii;
++
++			if (t <= 3) {
++				op[-2] |= t;
++			} else if (t <= 18) {
++				*op++ = (t - 3);
++			} else {
++				size_t tt = t - 18;
++
++				*op++ = 0;
++				while (tt > 255) {
++					tt -= 255;
++					*op++ = 0;
++				}
++				*op++ = tt;
++			}
++			do {
++				*op++ = *ii++;
++			} while (--t > 0);
++		}
++
++		ip += 3;
++		if (m_pos[3] != *ip++ || m_pos[4] != *ip++
++				|| m_pos[5] != *ip++ || m_pos[6] != *ip++
++				|| m_pos[7] != *ip++ || m_pos[8] != *ip++) {
++			--ip;
++			m_len = ip - ii;
++
++			if (m_off <= M2_MAX_OFFSET) {
++				m_off -= 1;
++				*op++ = (((m_len - 1) << 5)
++						| ((m_off & 7) << 2));
++				*op++ = (m_off >> 3);
++			} else if (m_off <= M3_MAX_OFFSET) {
++				m_off -= 1;
++				*op++ = (M3_MARKER | (m_len - 2));
++				goto m3_m4_offset;
++			} else {
++				m_off -= 0x4000;
++
++				*op++ = (M4_MARKER | ((m_off & 0x4000) >> 11)
++						| (m_len - 2));
++				goto m3_m4_offset;
++			}
++		} else {
++			end = in_end;
++			m = m_pos + M2_MAX_LEN + 1;
++
++			while (ip < end && *m == *ip) {
++				m++;
++				ip++;
++			}
++			m_len = ip - ii;
++
++			if (m_off <= M3_MAX_OFFSET) {
++				m_off -= 1;
++				if (m_len <= 33) {
++					*op++ = (M3_MARKER | (m_len - 2));
++				} else {
++					m_len -= 33;
++					*op++ = M3_MARKER | 0;
++					goto m3_m4_len;
++				}
++			} else {
++				m_off -= 0x4000;
++				if (m_len <= M4_MAX_LEN) {
++					*op++ = (M4_MARKER
++						| ((m_off & 0x4000) >> 11)
++						| (m_len - 2));
++				} else {
++					m_len -= M4_MAX_LEN;
++					*op++ = (M4_MARKER
++						| ((m_off & 0x4000) >> 11));
++m3_m4_len:
++					while (m_len > 255) {
++						m_len -= 255;
++						*op++ = 0;
++					}
++
++					*op++ = (m_len);
++				}
++			}
++m3_m4_offset:
++			*op++ = ((m_off & 63) << 2);
++			*op++ = (m_off >> 6);
++		}
++
++		ii = ip;
++		if (unlikely(ip >= ip_end))
++			break;
++	}
++
++	*out_len = op - out;
++	return in_end - ii;
++}
++
++int lzo1x_1_compress(const unsigned char *in, size_t in_len, unsigned char *out,
++			size_t *out_len, void *wrkmem)
++{
++	const unsigned char *ii;
++	unsigned char *op = out;
++	size_t t;
++
++	if (unlikely(in_len <= M2_MAX_LEN + 5)) {
++		t = in_len;
++	} else {
++		t = _lzo1x_1_do_compress(in, in_len, op, out_len, wrkmem);
++		op += *out_len;
++	}
++
++	if (t > 0) {
++		ii = in + in_len - t;
++
++		if (op == out && t <= 238) {
++			*op++ = (17 + t);
++		} else if (t <= 3) {
++			op[-2] |= t;
++		} else if (t <= 18) {
++			*op++ = (t - 3);
++		} else {
++			size_t tt = t - 18;
++
++			*op++ = 0;
++			while (tt > 255) {
++				tt -= 255;
++				*op++ = 0;
++			}
++
++			*op++ = tt;
++		}
++		do {
++			*op++ = *ii++;
++		} while (--t > 0);
++	}
++
++	*op++ = M4_MARKER | 1;
++	*op++ = 0;
++	*op++ = 0;
++
++	*out_len = op - out;
++	return LZO_E_OK;
++}
++EXPORT_SYMBOL_GPL(lzo1x_1_compress);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("LZO1X-1 Compressor");
++
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x_decompress.c compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x_decompress.c
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,255 @@
++/*
++ *  LZO1X Decompressor from MiniLZO
++ *
++ *  Copyright (C) 1996-2005 Markus F.X.J. Oberhumer <markus@oberhumer.com>
++ *
++ *  The full LZO package can be found at:
++ *  http://www.oberhumer.com/opensource/lzo/
++ *
++ *  Changed for kernel use by:
++ *  Nitin Gupta <nitingupta910@gmail.com>
++ *  Richard Purdie <rpurdie@openedhand.com>
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <asm/byteorder.h>
++#include <asm/unaligned.h>
++
++#include "lzodefs.h"
++#include "lzo.h"
++
++#define HAVE_IP(x, ip_end, ip) ((size_t)(ip_end - ip) < (x))
++#define HAVE_OP(x, op_end, op) ((size_t)(op_end - op) < (x))
++#define HAVE_LB(m_pos, out, op) (m_pos < out || m_pos >= op)
++
++#define COPY4(dst, src)	\
++		put_unaligned(get_unaligned((const u32 *)(src)), (u32 *)(dst))
++
++int lzo1x_decompress_safe(const unsigned char *in, size_t in_len,
++			unsigned char *out, size_t *out_len)
++{
++	const unsigned char * const ip_end = in + in_len;
++	unsigned char * const op_end = out + *out_len;
++	const unsigned char *ip = in, *m_pos;
++	unsigned char *op = out;
++	size_t t;
++
++	*out_len = 0;
++
++	if (*ip > 17) {
++		t = *ip++ - 17;
++		if (t < 4)
++			goto match_next;
++		if (HAVE_OP(t, op_end, op))
++			goto output_overrun;
++		if (HAVE_IP(t + 1, ip_end, ip))
++			goto input_overrun;
++		do {
++			*op++ = *ip++;
++		} while (--t > 0);
++		goto first_literal_run;
++	}
++
++	while ((ip < ip_end)) {
++		t = *ip++;
++		if (t >= 16)
++			goto match;
++		if (t == 0) {
++			if (HAVE_IP(1, ip_end, ip))
++				goto input_overrun;
++			while (*ip == 0) {
++				t += 255;
++				ip++;
++				if (HAVE_IP(1, ip_end, ip))
++					goto input_overrun;
++			}
++			t += 15 + *ip++;
++		}
++		if (HAVE_OP(t + 3, op_end, op))
++			goto output_overrun;
++		if (HAVE_IP(t + 4, ip_end, ip))
++			goto input_overrun;
++
++		COPY4(op, ip);
++		op += 4;
++		ip += 4;
++		if (--t > 0) {
++			if (t >= 4) {
++				do {
++					COPY4(op, ip);
++					op += 4;
++					ip += 4;
++					t -= 4;
++				} while (t >= 4);
++				if (t > 0) {
++					do {
++						*op++ = *ip++;
++					} while (--t > 0);
++				}
++			} else {
++				do {
++					*op++ = *ip++;
++				} while (--t > 0);
++			}
++		}
++
++first_literal_run:
++		t = *ip++;
++		if (t >= 16)
++			goto match;
++		m_pos = op - (1 + M2_MAX_OFFSET);
++		m_pos -= t >> 2;
++		m_pos -= *ip++ << 2;
++
++		if (HAVE_LB(m_pos, out, op))
++			goto lookbehind_overrun;
++
++		if (HAVE_OP(3, op_end, op))
++			goto output_overrun;
++		*op++ = *m_pos++;
++		*op++ = *m_pos++;
++		*op++ = *m_pos;
++
++		goto match_done;
++
++		do {
++match:
++			if (t >= 64) {
++				m_pos = op - 1;
++				m_pos -= (t >> 2) & 7;
++				m_pos -= *ip++ << 3;
++				t = (t >> 5) - 1;
++				if (HAVE_LB(m_pos, out, op))
++					goto lookbehind_overrun;
++				if (HAVE_OP(t + 3 - 1, op_end, op))
++					goto output_overrun;
++				goto copy_match;
++			} else if (t >= 32) {
++				t &= 31;
++				if (t == 0) {
++					if (HAVE_IP(1, ip_end, ip))
++						goto input_overrun;
++					while (*ip == 0) {
++						t += 255;
++						ip++;
++						if (HAVE_IP(1, ip_end, ip))
++							goto input_overrun;
++					}
++					t += 31 + *ip++;
++				}
++				m_pos = op - 1;
++				m_pos -= le16_to_cpu(get_unaligned(
++					(const unsigned short *)ip)) >> 2;
++				ip += 2;
++			} else if (t >= 16) {
++				m_pos = op;
++				m_pos -= (t & 8) << 11;
++
++				t &= 7;
++				if (t == 0) {
++					if (HAVE_IP(1, ip_end, ip))
++						goto input_overrun;
++					while (*ip == 0) {
++						t += 255;
++						ip++;
++						if (HAVE_IP(1, ip_end, ip))
++							goto input_overrun;
++					}
++					t += 7 + *ip++;
++				}
++				m_pos -= le16_to_cpu(get_unaligned(
++					(const unsigned short *)ip)) >> 2;
++				ip += 2;
++				if (m_pos == op)
++					goto eof_found;
++				m_pos -= 0x4000;
++			} else {
++				m_pos = op - 1;
++				m_pos -= t >> 2;
++				m_pos -= *ip++ << 2;
++
++				if (HAVE_LB(m_pos, out, op))
++					goto lookbehind_overrun;
++				if (HAVE_OP(2, op_end, op))
++					goto output_overrun;
++
++				*op++ = *m_pos++;
++				*op++ = *m_pos;
++				goto match_done;
++			}
++
++			if (HAVE_LB(m_pos, out, op))
++				goto lookbehind_overrun;
++			if (HAVE_OP(t + 3 - 1, op_end, op))
++				goto output_overrun;
++
++			if (t >= 2 * 4 - (3 - 1) && (op - m_pos) >= 4) {
++				COPY4(op, m_pos);
++				op += 4;
++				m_pos += 4;
++				t -= 4 - (3 - 1);
++				do {
++					COPY4(op, m_pos);
++					op += 4;
++					m_pos += 4;
++					t -= 4;
++				} while (t >= 4);
++				if (t > 0)
++					do {
++						*op++ = *m_pos++;
++					} while (--t > 0);
++			} else {
++copy_match:
++				*op++ = *m_pos++;
++				*op++ = *m_pos++;
++				do {
++					*op++ = *m_pos++;
++				} while (--t > 0);
++			}
++match_done:
++			t = ip[-2] & 3;
++			if (t == 0)
++				break;
++match_next:
++			if (HAVE_OP(t, op_end, op))
++				goto output_overrun;
++			if (HAVE_IP(t + 1, ip_end, ip))
++				goto input_overrun;
++
++			*op++ = *ip++;
++			if (t > 1) {
++				*op++ = *ip++;
++				if (t > 2)
++					*op++ = *ip++;
++			}
++
++			t = *ip++;
++		} while (ip < ip_end);
++	}
++
++	*out_len = op - out;
++	return LZO_E_EOF_NOT_FOUND;
++
++eof_found:
++	*out_len = op - out;
++	return (ip == ip_end ? LZO_E_OK :
++		(ip < ip_end ? LZO_E_INPUT_NOT_CONSUMED : LZO_E_INPUT_OVERRUN));
++input_overrun:
++	*out_len = op - out;
++	return LZO_E_INPUT_OVERRUN;
++
++output_overrun:
++	*out_len = op - out;
++	return LZO_E_OUTPUT_OVERRUN;
++
++lookbehind_overrun:
++	*out_len = op - out;
++	return LZO_E_LOOKBEHIND_OVERRUN;
++}
++
++EXPORT_SYMBOL_GPL(lzo1x_decompress_safe);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("LZO1X Decompressor");
++
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzodefs.h compcache-0.5.4/sub-projects/compression/lzo-kmod/lzodefs.h
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzodefs.h	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/lzodefs.h	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,43 @@
++/*
++ *  lzodefs.h -- architecture, OS and compiler specific defines
++ *
++ *  Copyright (C) 1996-2005 Markus F.X.J. Oberhumer <markus@oberhumer.com>
++ *
++ *  The full LZO package can be found at:
++ *  http://www.oberhumer.com/opensource/lzo/
++ *
++ *  Changed for kernel use by:
++ *  Nitin Gupta <nitingupta910@gmail.com>
++ *  Richard Purdie <rpurdie@openedhand.com>
++ */
++
++#define LZO_VERSION		0x2020
++#define LZO_VERSION_STRING	"2.02"
++#define LZO_VERSION_DATE	"Oct 17 2005"
++
++#define M1_MAX_OFFSET	0x0400
++#define M2_MAX_OFFSET	0x0800
++#define M3_MAX_OFFSET	0x4000
++#define M4_MAX_OFFSET	0xbfff
++
++#define M1_MIN_LEN	2
++#define M1_MAX_LEN	2
++#define M2_MIN_LEN	3
++#define M2_MAX_LEN	8
++#define M3_MIN_LEN	3
++#define M3_MAX_LEN	33
++#define M4_MIN_LEN	3
++#define M4_MAX_LEN	9
++
++#define M1_MARKER	0
++#define M2_MARKER	64
++#define M3_MARKER	32
++#define M4_MARKER	16
++
++#define D_BITS		14
++#define D_MASK		((1u << D_BITS) - 1)
++#define D_HIGH		((D_MASK >> 1) + 1)
++
++#define DX2(p, s1, s2)	(((((size_t)((p)[2]) << (s2)) ^ (p)[1]) \
++							<< (s1)) ^ (p)[0])
++#define DX3(p, s1, s2, s3)	((DX2((p)+1, s2, s3) << (s1)) ^ (p)[0])
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo.h compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo.h
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/lzo.h	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/lzo.h	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,44 @@
++#ifndef __LZO_H__
++#define __LZO_H__
++/*
++ *  LZO Public Kernel Interface
++ *  A mini subset of the LZO real-time data compression library
++ *
++ *  Copyright (C) 1996-2005 Markus F.X.J. Oberhumer <markus@oberhumer.com>
++ *
++ *  The full LZO package can be found at:
++ *  http://www.oberhumer.com/opensource/lzo/
++ *
++ *  Changed for kernel use by:
++ *  Nitin Gupta <nitingupta910@gmail.com>
++ *  Richard Purdie <rpurdie@openedhand.com>
++ */
++
++#define LZO1X_MEM_COMPRESS	(16384 * sizeof(unsigned char *))
++#define LZO1X_1_MEM_COMPRESS	LZO1X_MEM_COMPRESS
++
++#define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3)
++
++/* This requires 'workmem' of size LZO1X_1_MEM_COMPRESS */
++int lzo1x_1_compress(const unsigned char *src, size_t src_len,
++			unsigned char *dst, size_t *dst_len, void *wrkmem);
++
++/* safe decompression with overrun testing */
++int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
++			unsigned char *dst, size_t *dst_len);
++
++/*
++ * Return values (< 0 = Error)
++ */
++#define LZO_E_OK			0
++#define LZO_E_ERROR			(-1)
++#define LZO_E_OUT_OF_MEMORY		(-2)
++#define LZO_E_NOT_COMPRESSIBLE		(-3)
++#define LZO_E_INPUT_OVERRUN		(-4)
++#define LZO_E_OUTPUT_OVERRUN		(-5)
++#define LZO_E_LOOKBEHIND_OVERRUN	(-6)
++#define LZO_E_EOF_NOT_FOUND		(-7)
++#define LZO_E_INPUT_NOT_CONSUMED	(-8)
++#define LZO_E_NOT_YET_IMPLEMENTED	(-9)
++
++#endif
+diff -uNr compcache-0.5.4-old/sub-projects/compression/lzo-kmod/Makefile compcache-0.5.4/sub-projects/compression/lzo-kmod/Makefile
+--- compcache-0.5.4-old/sub-projects/compression/lzo-kmod/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ compcache-0.5.4/sub-projects/compression/lzo-kmod/Makefile	2009-10-17 09:35:59.000000000 +0200
+@@ -0,0 +1,8 @@
++obj-m += lzo1x_compress.o lzo1x_decompress.o
++
++all:
++	make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
++
++clean:
++	make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
++

package/compcache/patches/001-lzo-speed.patch

@@ -1,6 +1,6 @@
-diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_compress.c compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_compress.c
---- compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_compress.c	2008-08-13 06:33:34.000000000 +0200
-+++ compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_compress.c	2009-01-21 08:00:35.000000000 +0100
+diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_compress.c
+--- compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c	2009-04-20 06:28:30.000000000 +0200
++++ compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_compress.c	2009-04-20 06:29:21.000000000 +0200
 @@ -62,8 +62,12 @@
  		goto literal;
  
@@ -55,9 +55,9 @@ diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_compress.c compc
  MODULE_LICENSE("GPL");
  MODULE_DESCRIPTION("LZO1X-1 Compressor");
 -
-diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c
---- compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	2008-08-13 06:33:42.000000000 +0200
-+++ compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	2009-01-21 07:49:41.000000000 +0100
+diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress.c compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_decompress.c
+--- compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	2009-04-20 06:28:30.000000000 +0200
++++ compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_decompress.c	2009-04-20 06:29:21.000000000 +0200
 @@ -45,10 +45,7 @@
  			goto output_overrun;
  		if (HAVE_IP(t + 1, ip_end, ip))
@@ -70,7 +70,7 @@ diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c com
  	}
  
  	while ((ip < ip_end)) {
-@@ -71,23 +68,20 @@
+@@ -71,30 +68,27 @@
  		if (HAVE_IP(t + 4, ip_end, ip))
  			goto input_overrun;
  
@@ -108,6 +108,14 @@ diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c com
  				do {
  					*op++ = *ip++;
  				} while (--t > 0);
+ 			}
+ 		}
+ 
+-first_literal_run:
++//first_literal_run:
+ 		t = *ip++;
+ 		if (t >= 16)
+ 			goto match;
 @@ -139,8 +133,7 @@
  					t += 31 + *ip++;
  				}
@@ -173,13 +181,3 @@ diff -uNr compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x_decompress.c com
  			} else {
  copy_match:
  				*op++ = *m_pos++;
-@@ -247,9 +251,7 @@
- 	*out_len = op - out;
- 	return LZO_E_LOOKBEHIND_OVERRUN;
- }
--
- EXPORT_SYMBOL_GPL(lzo1x_decompress_safe);
- 
- MODULE_LICENSE("GPL");
- MODULE_DESCRIPTION("LZO1X Decompressor");
--

package/compcache/patches/002-compact_lzo-codec.patch

@@ -1,30 +0,0 @@
---- compcache-0.5/Makefile.bak	2008-12-10 07:25:44.000000000 +0100
-+++ compcache-0.5/Makefile	2009-01-21 08:25:38.000000000 +0100
-@@ -4,15 +4,13 @@
- 			-DCONFIG_XV_STATS \
- 			-g -Wall
- 
--obj-m	+=	sub-projects/compression/lzo-kmod/lzo1x_decompress.o \
--		sub-projects/compression/lzo-kmod/lzo1x_compress.o \
-+obj-m	+=	sub-projects/compression/lzo-kmod/lzo1x.o \
- 		sub-projects/allocators/xvmalloc-kmod/xvmalloc.o \
- 		compcache.o
- 
- all:
- 	make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
--	@ln -sf sub-projects/compression/lzo-kmod/lzo1x_decompress.ko
--	@ln -sf sub-projects/compression/lzo-kmod/lzo1x_compress.ko
-+	@ln -sf sub-projects/compression/lzo-kmod/lzo1x.ko
- 	@ln -sf sub-projects/allocators/xvmalloc-kmod/xvmalloc.ko
- 
- clean:
---- compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x.c~	1970-01-01 01:00:00.000000000 +0100
-+++ compcache-0.5/sub-projects/compression/lzo-kmod/lzo1x.c	2008-05-06 09:38:12.000000000 +0200
-@@ -0,0 +1,7 @@
-+#include <linux/module.h>
-+
-+#include "lzo1x_compress.c"
-+#include "lzo1x_decompress.c"
-+
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("LZO1X Lib");

package/compcache/patches/100-use_register_width.patch

@@ -0,0 +1,24 @@
+diff -uNr compcache-0.5.2/compcache.c compcache/compcache.c
+--- compcache-0.5.2/compcache.c	2009-03-10 13:03:56.000000000 +0100
++++ compcache/ramzswap.c	2009-04-01 17:38:20.000000000 +0200
+@@ -68,15 +68,15 @@
+ static int page_zero_filled(void *ptr)
+ {
+ 	u32 pos;
+-	u64 *page;
+-
+-	page = (u64 *)ptr;
+-
++#if defined(CONFIG_64BIT)
++	u64 *page = (u64 *)ptr;
++#else
++	u32 *page = (u32 *)ptr;
++#endif
+ 	for (pos = 0; pos != PAGE_SIZE / sizeof(*page); pos++) {
+ 		if (page[pos])
+ 			return 0;
+ 	}
+-
+ 	return 1;
+ }
+ 

package/compcache/patches/200-av_compress_ratio.patch

@@ -0,0 +1,39 @@
+diff -uNr compcache-0.5.4-old/ramzswap.c compcache-0.5.4/ramzswap.c
+--- compcache-0.5.4-old/ramzswap.c	2009-10-18 09:14:53.000000000 +0200
++++ compcache-0.5.4/ramzswap.c	2009-10-18 09:12:08.000000000 +0200
+@@ -126,7 +126,9 @@
+ {
+ 	int len;
+ 	size_t succ_writes, mem_used;
+-	unsigned int good_compress_perc = 0, no_compress_perc = 0;
++	unsigned int good_compress_perc = 0, 
++		     av_compression_perc = 0,
++		     no_compress_perc = 0;
+ 
+ 	mem_used = xv_get_total_size_bytes(rzs.mem_pool)
+ 			+ (stats.pages_expand << PAGE_SHIFT);
+@@ -154,6 +156,8 @@
+ 	if (succ_writes && stats.pages_stored) {
+ 		good_compress_perc = stats.good_compress * 100
+ 					/ stats.pages_stored;
++		av_compression_perc = stats.compr_size * 100
++					/ (stats.good_compress << PAGE_SHIFT);
+ 		no_compress_perc = stats.pages_expand * 100
+ 					/ stats.pages_stored;
+ 	}
+@@ -168,6 +172,7 @@
+ 		"NotifyFree:	%8llu\n"
+ 		"ZeroPages:	%8u\n"
+ 		"GoodCompress:	%8u %%\n"
++		"AvCompression:	%8u %%\n"
+ 		"NoCompress:	%8u %%\n"
+ 		"PagesStored:	%8u\n"
+ 		"PagesUsed:	%8zu\n"
+@@ -182,6 +187,7 @@
+ 		stats.notify_free,
+ 		stats.pages_zero,
+ 		good_compress_perc,
++		av_compression_perc,
+ 		no_compress_perc,
+ 		stats.pages_stored,
+ 		mem_used >> PAGE_SHIFT,

package/crda/Makefile

@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=crda
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 PKG_VERSION:=1.1.0
 PKG_SOURCE_URL:=http://wireless.kernel.org/download/crda
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
@@ -17,10 +17,10 @@ PKG_MD5SUM:=6004584d2e39e899f7642b141dd72028
 PKG_BUILD_DEPENDS:=mac80211
 
 PKG_REGULATORY_NAME:=regulatory
-PKG_REGULATORY_VERSION:=2009.04.17
+PKG_REGULATORY_VERSION:=2009.11.25
 PKG_REGULATORY_SOURCE_URL:=http://wireless.kernel.org/download/wireless-regdb/regulatory.bins
 PKG_REGULATORY_SOURCE:=$(PKG_REGULATORY_VERSION)-$(PKG_REGULATORY_NAME).bin
-PKG_REGULATORY_MD5SUM:=2d7d99b79062b8f2edfbd72222fdfe08
+PKG_REGULATORY_MD5SUM:=873b5c55a26c8ba7674e083f51cb10aa
 
 include $(INCLUDE_DIR)/package.mk
 

package/dnsmasq/Makefile

@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=dnsmasq
-PKG_VERSION:=2.50
-PKG_RELEASE:=2
+PKG_VERSION:=2.51
+PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq
-PKG_MD5SUM:=f7b1e17c590e493039537434c57c9de7
+PKG_MD5SUM:=97465261a6de5258a3c3edfe51ca16a4
 
 include $(INCLUDE_DIR)/package.mk
 

package/dnsmasq/files/dnsmasq.init

@@ -49,6 +49,10 @@ append_notinterface() {
 	append args "-I $1"
 }
 
+append_addnhosts() {
+	append args "-H $1"
+}
+
 dnsmasq() {
 	local cfg="$1"
 	append_bool "$cfg" authoritative "-K"
@@ -72,13 +76,13 @@ dnsmasq() {
 	append_parm "$cfg" port "-p"
 	append_parm "$cfg" ednspacket_max "-P"
 	append_parm "$cfg" dhcpleasemax "-X"
-	append_parm "$cfg" "addnhosts" "-H"
 	append_parm "$cfg" "queryport" "-Q"
 	append_parm "$cfg" "domain" "-s"
 	append_parm "$cfg" "local" "-S"
 	config_list_foreach "$cfg" "server" append_server
 	config_list_foreach "$cfg" "interface" append_interface
 	config_list_foreach "$cfg" "notinterface" append_notinterface
+	config_list_foreach "$cfg" "addnhosts" append_addnhosts
 	append_parm "$cfg" "leasefile" "-l"
 	append_parm "$cfg" "resolvfile" "-r"
 	append_parm "$cfg" "tftp_root" "--tftp-root"

package/dnsmasq/patches/101-ipv6.patch

@@ -1,6 +1,8 @@
---- a/src/config.h
-+++ b/src/config.h
-@@ -257,8 +257,9 @@ NOTES:
+Index: dnsmasq-2.51/src/config.h
+===================================================================
+--- dnsmasq-2.51.orig/src/config.h
++++ dnsmasq-2.51/src/config.h
+@@ -270,8 +270,9 @@ NOTES:
  /* We assume that systems which don't have IPv6
     headers don't have ntop and pton either */
  

package/dnsmasq/patches/103-ipv6_fix.patch

@@ -1,5 +1,7 @@
---- a/src/netlink.c
-+++ b/src/netlink.c
+Index: dnsmasq-2.51/src/netlink.c
+===================================================================
+--- dnsmasq-2.51.orig/src/netlink.c
++++ dnsmasq-2.51/src/netlink.c
 @@ -129,6 +129,7 @@ int iface_enumerate(void *parm, int (*ip
    ssize_t len;
    static unsigned int seq = 0;
@@ -31,9 +33,11 @@
  	      }
  #endif
  	  }
---- a/src/network.c
-+++ b/src/network.c
-@@ -296,7 +296,7 @@ static int create_ipv6_listener(struct l
+Index: dnsmasq-2.51/src/network.c
+===================================================================
+--- dnsmasq-2.51.orig/src/network.c
++++ dnsmasq-2.51/src/network.c
+@@ -302,7 +302,7 @@ static int create_ipv6_listener(struct l
        bind(tcpfd, (struct sockaddr *)&addr, sa_len(&addr)) == -1 ||
        listen(tcpfd, 5) == -1 ||
        bind(fd, (struct sockaddr *)&addr, sa_len(&addr)) == -1) 

package/e2fsprogs/Makefile

@@ -8,8 +8,8 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=e2fsprogs
-PKG_VERSION:=1.41.9
-PKG_MD5SUM:=52f60a9e19a02f142f5546f1b5681927
+PKG_VERSION:=1.40.11
+PKG_MD5SUM:=004cea70d724fdc7f1a952dffe4c9db8
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
@@ -107,6 +107,8 @@ $(call Package/e2fsprogs)
   DEPENDS:=libuuid libblkid
 endef
 
+TARGET_CFLAGS += $(FPIC)
+
 CONFIGURE_ARGS += \
 	--enable-shared \
 	--enable-static \

package/hostapd/Makefile

@@ -8,14 +8,15 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_VERSION:=0.6.9
+PKG_VERSION:=20091129
 PKG_RELEASE:=1
+PKG_REV:=be8eb8ab3ee42aa66930aea827bdcb05a2172276
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://hostap.epitest.fi/releases/
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
+PKG_SOURCE_URL:=git://w1.fi/srv/git/hostap.git
 PKG_SOURCE_SUBDIR:=hostapd-$(PKG_VERSION)
 PKG_SOURCE_VERSION:=$(PKG_REV)
-PKG_MD5SUM:=83630d11fa66ade9091f1b304fccd74c
+PKG_SOURCE_PROTO:=git
 
 PKG_BUILD_DEPENDS:= \
 	PACKAGE_kmod-madwifi:madwifi \
@@ -29,6 +30,8 @@ PKG_CONFIG_DEPENDS:= \
 	CONFIG_PACKAGE_hostapd-mini \
 	CONFIG_PACKAGE_kmod-hostap
 
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
+
 include $(INCLUDE_DIR)/package.mk
 
 DRIVER_MAKEOPTS= \
@@ -48,13 +51,9 @@ endef
 define Package/hostapd
 $(call Package/hostapd/Default)
   TITLE+= (full)
-  DEPENDS+= +PACKAGE_hostapd:libopenssl
+  VARIANT:=full
 endef
 
-#define Package/hostapd/conffiles
-#/etc/hostapd.conf
-#endef
-
 define Package/hostapd/description
  This package contains a full featured IEEE 802.1x/WPA/EAP/RADIUS
  Authenticator.
@@ -63,15 +62,11 @@ endef
 define Package/hostapd-mini
 $(call Package/hostapd/Default)
   TITLE+= (WPA-PSK only)
+  VARIANT:=mini
 endef
 
-#define Package/hostapd-mini/conffiles
-#/etc/hostapd.conf
-#endef
-
 define Package/hostapd-mini/description
- This package contains a minimal IEEE 802.1x/WPA/EAP/RADIUS Authenticator
- (WPA-PSK only).
+ This package contains a minimal IEEE 802.1x/WPA Authenticator (WPA-PSK only).
 endef
 
 define Package/hostapd-utils
@@ -85,14 +80,20 @@ define Package/hostapd-utils/description
  IEEE 802.1x/WPA/EAP/RADIUS Authenticator.
 endef
 
-define Build/ConfigureTarget
-	rm -rf $(PKG_BUILD_DIR)/hostapd.$(1)
-	mkdir -p $(PKG_BUILD_DIR)/hostapd.$(1)
-	$(CP) \
-		$(PKG_BUILD_DIR)/hostapd \
-		$(PKG_BUILD_DIR)/src \
-		$(PKG_BUILD_DIR)/hostapd.$(1)/
-	$(CP) ./files/$(1).config $(PKG_BUILD_DIR)/hostapd.$(1)/hostapd/.config
+ifneq ($(wildcard $(PKG_BUILD_DIR)/.config_*),$(subst .configured_,.config_,$(STAMP_CONFIGURED)))
+  $(warning $(wildcard $(PKG_BUILD_DIR)/.config_*) != $(subst .configured_,.config_,$(STAMP_CONFIGURED)))
+  define Build/Configure/rebuild
+	rm -f $(PKG_BUILD_DIR)/hostapd/hostapd
+	rm -f $(PKG_BUILD_DIR)/hostapd/*.o
+	rm -f $(PKG_BUILD_DIR)/src/drivers/drivers.o
+	rm -f $(PKG_BUILD_DIR)/.config_*
+	touch $(subst .configured_,.config_,$(STAMP_CONFIGURED))
+  endef
+endif
+
+define Build/Configure
+	$(Build/Configure/rebuild)
+	$(CP) ./files/$(BUILD_VARIANT).config $(PKG_BUILD_DIR)/hostapd/.config
 endef
 
 TARGET_CPPFLAGS := \
@@ -104,66 +105,34 @@ TARGET_CPPFLAGS := \
 	-DCONFIG_LIBNL20 \
 	-D_GNU_SOURCE
 
-define Build/CompileTarget
-	CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS)" \
-	$(MAKE) -C $(PKG_BUILD_DIR)/hostapd.$(1)/hostapd \
-		$(TARGET_CONFIGURE_OPTS) \
-		$(DRIVER_MAKEOPTS) \
-		LIBS="$(TARGET_LDFLAGS) \
-			$(if $(CONFIG_PACKAGE_kmod-mac80211),-lm -lnl-tiny) \
-			$(if $(findstring default,$(1)),-lssl -lcrypto)" \
-		hostapd hostapd_cli
-	$(CP) $(PKG_BUILD_DIR)/hostapd.$(1)/hostapd/hostapd_cli $(PKG_BUILD_DIR)/
-endef
-
-define Package/InstallTemplate
-	$(INSTALL_DIR) $$(1)/lib/wifi
-	$(INSTALL_DATA) ./files/hostapd.sh $$(1)/lib/wifi/hostapd.sh
-	$(INSTALL_DIR) $$(1)/usr/sbin
-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd.$(2)/hostapd/hostapd $$(1)/usr/sbin/
-# config is managed through uci
-#	$(INSTALL_DIR) $$(1)/etc
-#	$(INSTALL_CONF) $(PKG_BUILD_DIR)/hostapd.$(2)/hostapd/hostapd.conf $$(1)/etc/hostapd.conf
-endef
-
-define Package/Template
- ifneq ($(CONFIG_PACKAGE_$(1)),)
-  define Build/Configure/$(2)
-	$(call Build/ConfigureTarget,$(2))
-  endef
-  define Build/Compile/$(2)
-	$(call Build/CompileTarget,$(2))
-  endef
-  define Package/$(1)/install
-	$(call Package/InstallTemplate,$(1),$(2))
-  endef
- endif
-endef
-
-define Build/Configure
-	rm -f $(PKG_BUILD_DIR)/.configured*
-	$(call Build/Configure/default)
-	$(call Build/Configure/mini)
-endef
+ifdef CONFIG_PACKAGE_kmod-mac80211
+  TARGET_LDFLAGS += -lm -lnl-tiny
+endif
 
 define Build/Compile
-	$(call Build/Compile/default)
-	$(call Build/Compile/mini)
+	CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS)" \
+	$(MAKE) -C $(PKG_BUILD_DIR)/hostapd \
+		$(TARGET_CONFIGURE_OPTS) \
+		$(DRIVER_MAKEOPTS) \
+		LIBS="$(TARGET_LDFLAGS)" \
+		hostapd hostapd_cli
 endef
 
-define Build/Clean
-	rm -rf $(PKG_BUILD_DIR)_default
-	rm -rf $(PKG_BUILD_DIR)_mini
+define Package/hostapd/install
+	$(INSTALL_DIR) $(1)/etc/hotplug.d/net
+	$(INSTALL_DATA) ./files/hostapd.hotplug $(1)/etc/hotplug.d/net/
+	$(INSTALL_DIR) $(1)/lib/wifi
+	$(INSTALL_DATA) ./files/hostapd.sh $(1)/lib/wifi/hostapd.sh
+	$(INSTALL_DIR) $(1)/usr/sbin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd $(1)/usr/sbin/
 endef
+Package/hostapd-mini/install = $(Package/hostapd/install)
 
 define Package/hostapd-utils/install
 	$(INSTALL_DIR) $(1)/usr/sbin
-	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd_cli $(1)/usr/sbin/
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/hostapd/hostapd_cli $(1)/usr/sbin/
 endef
 
-$(eval $(call Package/Template,hostapd,default))
-$(eval $(call Package/Template,hostapd-mini,mini))
-
 $(eval $(call BuildPackage,hostapd))
 $(eval $(call BuildPackage,hostapd-mini))
 $(eval $(call BuildPackage,hostapd-utils))

package/hostapd/files/full.config

@@ -142,3 +142,17 @@ CONFIG_IEEE80211N=y
 # This can be used to reduce the size of the hostapd considerably if debugging
 # code is not needed.
 #CONFIG_NO_STDOUT_DEBUG=y
+
+# Remove support for RADIUS accounting
+#CONFIG_NO_ACCOUNTING=y
+
+# Remove support for RADIUS
+#CONFIG_NO_RADIUS=y
+
+# Remove support for VLANs
+#CONFIG_NO_VLAN=y
+
+CONFIG_TLS=internal
+CONFIG_INTERNAL_LIBTOMMATH=y
+CONFIG_INTERNAL_AES=y
+NEED_AES_DEC=y

package/hostapd/files/hostapd.hotplug

@@ -0,0 +1,12 @@
+if [ "$ACTION" = "add" -o "$ACTION" = "register" ]; then
+	case "$INTERFACE" in
+		wlan*.sta*)
+			local BASEIF="${INTERFACE%%\.*}"
+
+			include /lib/network
+			scan_interfaces
+			local CONFIG="$(find_config "$BASEIF")" 
+			[ -n "$CONFIG" ] && setup_interface "$INTERFACE" "$CONFIG"
+		;;
+	esac
+fi

package/hostapd/files/hostapd.sh

@@ -77,7 +77,9 @@ hostapd_setup_vif() {
 	config_get channel "$device" channel
 	config_get hwmode "$device" hwmode
 	config_get wpa_group_rekey "$vif" wpa_group_rekey
-	config_get ieee80211d "$vif" ieee80211d 
+	config_get ieee80211d "$vif" ieee80211d
+	config_get_bool wds "$vif" wds 0
+	[ "$wds" -gt 0 -a "$driver" = "nl80211" ] && wds="wds_sta=1" || wds=""
 	case "$hwmode" in
 		bg) hwmode=g;;
 	esac
@@ -89,6 +91,9 @@ hostapd_setup_vif() {
 		[ -n "$hwmode_11n" ] && {
 			hwmode="$hwmode_11n"
 			config_get ht_capab "$device" ht_capab
+			[ -n "$ht_capab" -a -n "${ht_capab%%\[*}" ] && {
+				ht_capab=`echo "[$ht_capab]" | sed -e 's, ,][,g'`
+			}
 		}
 	}
 	cat > /var/run/hostapd-$ifname.conf <<EOF
@@ -106,6 +111,7 @@ ${hwmode_11n:+ieee80211n=1}
 ${ht_capab:+ht_capab=$ht_capab}
 ${wpa_group_rekey:+wpa_group_rekey=$wpa_group_rekey}
 ${ieee80211d:+ieee80211d=$ieee80211d}
+$wds
 $hostapd_cfg
 EOF
 	case "$driver" in
@@ -113,27 +119,27 @@ EOF
 		;;
 		*) 
 			cat >> /var/run/hostapd-$ifname.conf <<EOF
-wme_enabled=1
-wme_ac_bk_cwmin=4
-wme_ac_bk_cwmax=10
-wme_ac_bk_aifs=7
-wme_ac_bk_txop_limit=0
-wme_ac_bk_acm=0
-wme_ac_be_aifs=3
-wme_ac_be_cwmin=4
-wme_ac_be_cwmax=10
-wme_ac_be_txop_limit=0
-wme_ac_be_acm=0
-wme_ac_vi_aifs=2
-wme_ac_vi_cwmin=3
-wme_ac_vi_cwmax=4
-wme_ac_vi_txop_limit=94
-wme_ac_vi_acm=0
-wme_ac_vo_aifs=2
-wme_ac_vo_cwmin=2
-wme_ac_vo_cwmax=3
-wme_ac_vo_txop_limit=47
-wme_ac_vo_acm=0
+wmm_enabled=1
+wmm_ac_bk_cwmin=4
+wmm_ac_bk_cwmax=10
+wmm_ac_bk_aifs=7
+wmm_ac_bk_txop_limit=0
+wmm_ac_bk_acm=0
+wmm_ac_be_aifs=3
+wmm_ac_be_cwmin=4
+wmm_ac_be_cwmax=10
+wmm_ac_be_txop_limit=0
+wmm_ac_be_acm=0
+wmm_ac_vi_aifs=2
+wmm_ac_vi_cwmin=3
+wmm_ac_vi_cwmax=4
+wmm_ac_vi_txop_limit=94
+wmm_ac_vi_acm=0
+wmm_ac_vo_aifs=2
+wmm_ac_vo_cwmin=2
+wmm_ac_vo_cwmax=3
+wmm_ac_vo_txop_limit=47
+wmm_ac_vo_acm=0
 tx_queue_data3_aifs=7
 tx_queue_data3_cwmin=15
 tx_queue_data3_cwmax=1023

package/hostapd/files/mini.config

@@ -40,7 +40,7 @@ CONFIG_DRIVER_NL80211=y
 #CONFIG_DRIVER_NONE=y
 
 # IEEE 802.11F/IAPP
-CONFIG_IAPP=y
+# CONFIG_IAPP=y
 
 # WPA2/IEEE 802.11i RSN pre-authentication
 CONFIG_RSN_PREAUTH=y
@@ -142,3 +142,14 @@ CONFIG_IEEE80211N=y
 # This can be used to reduce the size of the hostapd considerably if debugging
 # code is not needed.
 #CONFIG_NO_STDOUT_DEBUG=y
+
+# Remove support for RADIUS accounting
+CONFIG_NO_ACCOUNTING=y
+
+# Remove support for RADIUS
+CONFIG_NO_RADIUS=y
+
+# Remove support for VLANs
+#CONFIG_NO_VLAN=y
+
+CONFIG_TLS=internal

package/hostapd/patches/100-madwifi_fix.patch

@@ -1,6 +1,6 @@
---- a/hostapd/driver_madwifi.c
-+++ b/hostapd/driver_madwifi.c
-@@ -312,6 +312,7 @@ madwifi_set_iface_flags(void *priv, int 
+--- a/src/drivers/driver_madwifi.c
++++ b/src/drivers/driver_madwifi.c
+@@ -323,6 +323,7 @@ madwifi_set_iface_flags(void *priv, int 
  {
  	struct madwifi_driver_data *drv = priv;
  	struct ifreq ifr;
@@ -8,7 +8,7 @@
  
  	wpa_printf(MSG_DEBUG, "%s: dev_up=%d", __func__, dev_up);
  
-@@ -326,10 +327,14 @@ madwifi_set_iface_flags(void *priv, int 
+@@ -337,10 +338,14 @@ madwifi_set_iface_flags(void *priv, int 
  		return -1;
  	}
  

package/hostapd/patches/110-countrycode.patch

@@ -1,6 +1,6 @@
 --- a/hostapd/hostapd.c
 +++ b/hostapd/hostapd.c
-@@ -1546,10 +1546,8 @@ static int setup_interface(struct hostap
+@@ -1339,10 +1339,8 @@ static int setup_interface(struct hostap
  	if (hapd->iconf->country[0] && hapd->iconf->country[1]) {
  		os_memcpy(country, hapd->iconf->country, 3);
  		country[3] = '\0';
@@ -11,4 +11,4 @@
 -		}
  	}
  
- 	if (hapd->iconf->ieee80211d &&
+ 	if (hapd->iconf->bridge_packets != INTERNAL_BRIDGE_DO_NOT_CONTROL &&

package/hostapd/patches/120-wds_ap.patch

@@ -0,0 +1,248 @@
+--- a/hostapd/config.c
++++ b/hostapd/config.c
+@@ -1526,6 +1526,8 @@ struct hostapd_config * hostapd_config_r
+ 					   line, pos);
+ 				errors++;
+ 			}
++		} else if (os_strcmp(buf, "wds_sta") == 0) {
++			bss->wds_sta = atoi(pos);
+ 		} else if (os_strcmp(buf, "ap_max_inactivity") == 0) {
+ 			bss->ap_max_inactivity = atoi(pos);
+ 		} else if (os_strcmp(buf, "country_code") == 0) {
+--- a/hostapd/config.h
++++ b/hostapd/config.h
+@@ -195,6 +195,7 @@ struct hostapd_bss_config {
+ 	int num_accept_mac;
+ 	struct mac_acl_entry *deny_mac;
+ 	int num_deny_mac;
++	int wds_sta;
+ 
+ 	int auth_algs; /* bitfield of allowed IEEE 802.11 authentication
+ 			* algorithms, WPA_AUTH_ALG_{OPEN,SHARED,LEAP} */
+--- a/src/drivers/driver.h
++++ b/src/drivers/driver.h
+@@ -1127,6 +1127,7 @@ struct wpa_driver_ops {
+ 			 const char *ifname, const u8 *addr);
+ 	int (*set_sta_vlan)(void *priv, const u8 *addr, const char *ifname,
+ 			    int vlan_id);
++	int (*set_wds_sta)(void *priv, const u8 *addr, int aid, int val);
+ 	/**
+ 	 * commit - Optional commit changes handler
+ 	 * @priv: driver private data
+--- a/src/drivers/driver_nl80211.c
++++ b/src/drivers/driver_nl80211.c
+@@ -2675,7 +2675,7 @@ static void nl80211_remove_iface(struct 
+ static int nl80211_create_iface_once(struct wpa_driver_nl80211_data *drv,
+ 				     const char *ifname,
+ 				     enum nl80211_iftype iftype,
+-				     const u8 *addr)
++				     const u8 *addr, int wds)
+ {
+ 	struct nl_msg *msg, *flags = NULL;
+ 	int ifidx;
+@@ -2706,6 +2706,8 @@ static int nl80211_create_iface_once(str
+ 
+ 		if (err)
+ 			goto nla_put_failure;
++	} else if (wds) {
++		NLA_PUT_U8(msg, NL80211_ATTR_4ADDR, wds);
+ 	}
+ 
+ 	ret = send_and_recv_msgs(drv, msg, NULL, NULL);
+@@ -2736,11 +2738,11 @@ static int nl80211_create_iface_once(str
+ }
+ static int nl80211_create_iface(struct wpa_driver_nl80211_data *drv,
+ 				const char *ifname, enum nl80211_iftype iftype,
+-				const u8 *addr)
++				const u8 *addr, int wds)
+ {
+ 	int ret;
+ 
+-	ret = nl80211_create_iface_once(drv, ifname, iftype, addr);
++	ret = nl80211_create_iface_once(drv, ifname, iftype, addr, wds);
+ 
+ 	/* if error occured and interface exists already */
+ 	if (ret == -ENFILE && if_nametoindex(ifname)) {
+@@ -2750,7 +2752,7 @@ static int nl80211_create_iface(struct w
+ 		nl80211_remove_iface(drv, if_nametoindex(ifname));
+ 
+ 		/* Try to create the interface again */
+-		ret = nl80211_create_iface_once(drv, ifname, iftype, addr);
++		ret = nl80211_create_iface_once(drv, ifname, iftype, addr, wds);
+ 	}
+ 
+ 	return ret;
+@@ -2975,7 +2977,7 @@ static struct sock_filter msock_filter_i
+ 
+ #if 0
+ 	/*
+-	 * drop non-data frames, WDS frames
++	 * drop non-data frames
+ 	 */
+ 	/* load the lower byte of the frame control field */
+ 	BPF_STMT(BPF_LD   | BPF_B | BPF_IND, 0),
+@@ -2983,13 +2985,13 @@ static struct sock_filter msock_filter_i
+ 	BPF_STMT(BPF_ALU  | BPF_AND | BPF_K, 0x0c),
+ 	/* drop non-data frames */
+ 	BPF_JUMP(BPF_JMP  | BPF_JEQ | BPF_K, 8, 0, FAIL),
++#endif
+ 	/* load the upper byte of the frame control field */
+-	BPF_STMT(BPF_LD   | BPF_B | BPF_IND, 0),
++	BPF_STMT(BPF_LD   | BPF_B | BPF_IND, 1),
+ 	/* mask off toDS/fromDS */
+ 	BPF_STMT(BPF_ALU  | BPF_AND | BPF_K, 0x03),
+-	/* drop WDS frames */
+-	BPF_JUMP(BPF_JMP  | BPF_JEQ | BPF_K, 3, FAIL, 0),
+-#endif
++	/* accept WDS frames */
++	BPF_JUMP(BPF_JMP  | BPF_JEQ | BPF_K, 3, PASS, 0),
+ 
+ 	/*
+ 	 * add header length to index
+@@ -3095,7 +3097,7 @@ nl80211_create_monitor_interface(struct 
+ 	buf[IFNAMSIZ - 1] = '\0';
+ 
+ 	drv->monitor_ifidx =
+-		nl80211_create_iface(drv, buf, NL80211_IFTYPE_MONITOR, NULL);
++		nl80211_create_iface(drv, buf, NL80211_IFTYPE_MONITOR, NULL, 0);
+ 
+ 	if (drv->monitor_ifidx < 0)
+ 		return -1;
+@@ -4064,7 +4066,7 @@ static int i802_bss_add(void *priv, cons
+ 	if (bss == NULL)
+ 		return -1;
+ 
+-	ifidx = nl80211_create_iface(priv, ifname, NL80211_IFTYPE_AP, bssid);
++	ifidx = nl80211_create_iface(priv, ifname, NL80211_IFTYPE_AP, bssid, 0);
+ 	if (ifidx < 0) {
+ 		os_free(bss);
+ 		return -1;
+@@ -4162,7 +4164,7 @@ static int i802_if_add(const char *iface
+ 		       enum hostapd_driver_if_type type, char *ifname,
+ 		       const u8 *addr)
+ {
+-	if (nl80211_create_iface(priv, ifname, i802_if_type(type), addr) < 0)
++	if (nl80211_create_iface(priv, ifname, i802_if_type(type), addr, 0) < 0)
+ 		return -1;
+ 	return 0;
+ }
+@@ -4208,6 +4210,22 @@ static int i802_set_sta_vlan(void *priv,
+ 	return -ENOBUFS;
+ }
+ 
++static int i802_set_wds_sta(void *priv, const u8 *addr, int aid, int val)
++{
++	struct wpa_driver_nl80211_data *drv = priv;
++	char name[16];
++
++	sprintf(name, "%s.sta%d", drv->ifname, aid);
++	if (val) {
++		if (nl80211_create_iface(priv, name, NL80211_IFTYPE_AP_VLAN, NULL, 1) < 0)
++			return -1;
++		hostapd_set_iface_flags(drv, name, 1);
++		return i802_set_sta_vlan(priv, addr, name, 0);
++	} else {
++		i802_set_sta_vlan(priv, addr, drv->ifname, 0);
++		return i802_if_remove(priv, HOSTAPD_IF_VLAN, name, NULL);
++	}
++}
+ 
+ static void handle_eapol(int sock, void *eloop_ctx, void *sock_ctx)
+ {
+@@ -4424,5 +4442,6 @@ const struct wpa_driver_ops wpa_driver_n
+ 	.if_update = i802_if_update,
+ 	.if_remove = i802_if_remove,
+ 	.set_sta_vlan = i802_set_sta_vlan,
++	.set_wds_sta = i802_set_wds_sta,
+ #endif /* HOSTAPD */
+ };
+--- a/hostapd/driver_i.h
++++ b/hostapd/driver_i.h
+@@ -446,6 +446,14 @@ hostapd_set_sta_vlan(const char *ifname,
+ }
+ 
+ static inline int
++hostapd_set_wds_sta(struct hostapd_data *hapd, const u8 *addr, int aid, int val)
++{
++	if (hapd->driver == NULL || hapd->driver->set_wds_sta == NULL)
++		return 0;
++	return hapd->driver->set_wds_sta(hapd->drv_priv, addr, aid, val);
++}
++
++static inline int
+ hostapd_driver_commit(struct hostapd_data *hapd)
+ {
+ 	if (hapd->driver == NULL || hapd->driver->commit == NULL)
+--- a/hostapd/drv_callbacks.c
++++ b/hostapd/drv_callbacks.c
+@@ -167,6 +167,7 @@ static const u8 * get_hdr_bssid(const st
+ 		if (len < 24)
+ 			return NULL;
+ 		switch (fc & (WLAN_FC_FROMDS | WLAN_FC_TODS)) {
++		case WLAN_FC_FROMDS|WLAN_FC_TODS:
+ 		case WLAN_FC_TODS:
+ 			return hdr->addr1;
+ 		case WLAN_FC_FROMDS:
+@@ -213,6 +214,7 @@ void hostapd_rx_from_unknown_sta(struct 
+ {
+ 	struct sta_info *sta;
+ 	const u8 *addr;
++	u16 fc = le_to_host16(hdr->frame_control);
+ 
+ 	hapd = get_hapd_bssid(hapd->iface, get_hdr_bssid(hdr, len));
+ 	if (hapd == NULL || hapd == HAPD_BROADCAST)
+@@ -231,6 +233,14 @@ void hostapd_rx_from_unknown_sta(struct 
+ 			hostapd_sta_deauth(
+ 				hapd, addr,
+ 				WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
++	} else {
++		if (!sta->wds_sta) {
++			if ((fc & (WLAN_FC_TODS | WLAN_FC_FROMDS)) ==
++			    (WLAN_FC_TODS | WLAN_FC_FROMDS)) {
++				sta->wds_sta = 1;
++				hostapd_set_wds_sta(hapd, addr, sta->aid, 1);
++			}
++		}
+ 	}
+ }
+ 
+--- a/hostapd/sta_info.c
++++ b/hostapd/sta_info.c
+@@ -120,6 +120,7 @@ void ap_free_sta(struct hostapd_data *ha
+ 
+ 	accounting_sta_stop(hapd, sta);
+ 
++	hostapd_set_wds_sta(hapd, sta->addr, sta->aid, 0);
+ 	if (!ap_sta_in_other_bss(hapd, sta, WLAN_STA_ASSOC) &&
+ 	    !(sta->flags & WLAN_STA_PREAUTH))
+ 		hostapd_sta_remove(hapd, sta->addr);
+--- a/hostapd/sta_info.h
++++ b/hostapd/sta_info.h
+@@ -78,6 +78,7 @@ struct sta_info {
+ 	struct hostapd_ssid *ssid_probe; /* SSID selection based on ProbeReq */
+ 
+ 	int vlan_id;
++	int wds_sta;
+ 
+ #ifdef CONFIG_IEEE80211N
+ 	struct ht_cap_ie ht_capabilities; /* IEEE 802.11n capabilities */
+--- a/src/common/nl80211_copy.h
++++ b/src/common/nl80211_copy.h
+@@ -584,6 +584,8 @@ enum nl80211_commands {
+  *	changed then the list changed and the dump should be repeated
+  *	completely from scratch.
+  *
++ * @NL80211_ATTR_4ADDR: Use 4-address frames on a virtual interface
++ *
+  * @NL80211_ATTR_MAX: highest attribute number currently defined
+  * @__NL80211_ATTR_AFTER_LAST: internal use
+  */
+@@ -714,6 +716,8 @@ enum nl80211_attrs {
+ 
+ 	NL80211_ATTR_PID,
+ 
++	NL80211_ATTR_4ADDR,
++
+ 	/* add attributes here, update the policy in nl80211.c */
+ 
+ 	__NL80211_ATTR_AFTER_LAST,

package/hostapd/patches/130-compile_fix.patch

@@ -0,0 +1,10 @@
+--- a/src/drivers/driver_nl80211.c
++++ b/src/drivers/driver_nl80211.c
+@@ -23,6 +23,7 @@
+ #include <netlink/genl/genl.h>
+ #include <netlink/genl/family.h>
+ #include <netlink/genl/ctrl.h>
++#include <linux/rtnetlink.h>
+ #include "nl80211_copy.h"
+ 
+ #include "common.h"

package/hostapd/patches/130-libnl_update.patch

@@ -1,18 +0,0 @@
---- a/hostapd/driver_nl80211.c
-+++ b/hostapd/driver_nl80211.c
-@@ -29,6 +29,7 @@
- #include "wireless_copy.h"
- #include <linux/filter.h>
- #include <net/if_arp.h>
-+#include <linux/rtnetlink.h>
- 
- #include "hostapd.h"
- #include "driver.h"
-@@ -45,6 +46,7 @@
- /* libnl 2.0 compatibility code */
- #define nl_handle_alloc_cb nl_socket_alloc_cb
- #define nl_handle_destroy nl_socket_free
-+#define nl_handle nl_sock
- #endif /* CONFIG_LIBNL20 */
- 
- enum ieee80211_msg_type {

package/ifxmips-atm/Makefile

@@ -1,49 +0,0 @@
-# Copyright (C) 2009 OpenWrt.org
-# All rights reserved.
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-# blogic@openwrt.org
-#
-
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/kernel.mk
-
-PKG_NAME:=ifxmips-atm
-PKG_RELEASE:=1
-
-include $(INCLUDE_DIR)/package.mk
-
-define KernelPackage/ifxmips-atm
-  SUBMENU:=Network Devices
-  DEPENDS:=@BROKEN @TARGET_ifxmips +kmod-atm
-  TITLE:=ifxmips atm driver
-  FILES:=$(PKG_BUILD_DIR)/ifx-atm.$(LINUX_KMOD_SUFFIX)
-  AUTOLOAD:=$(call AutoLoad,50,ifx-atm)
-endef
-
-define Kernel/Package/ifxmips-atm/description
-	This package provides the atm driver needed to make dsl work on ifxmips based boards
-endef
-
-define Build/Prepare
-	mkdir -p $(PKG_BUILD_DIR)
-	$(CP) ./src/* $(PKG_BUILD_DIR)/
-endef
-
-define Build/Compile
-	$(MAKE) -C "$(LINUX_DIR)" \
-	CROSS_COMPILE="$(TARGET_CROSS)" \
-	ARCH="$(LINUX_KARCH)" \
-	SUBDIRS="$(PKG_BUILD_DIR)" \
-	modules
-endef
-
-define KernelPackage/ifxmips-atm/install
-	$(INSTALL_DIR) $(1)/lib/modules/$(LINUX_VERSION) 
-	$(CP) $(PKG_BUILD_DIR)/ifx-atm.ko $(1)/lib/modules/$(LINUX_VERSION)
-endef
-
-$(eval $(call KernelPackage,ifxmips-atm))
-

package/ifxmips-atm/src/Makefile

@@ -1,4 +0,0 @@
-obj-m += ifx-atm.o
-ifx-atm-objs := skb.o irq.o proc.o core.o ppe.o
-
-EXTRA_CFLAGS += -DENABLE_RX_QOS=1

package/ifxmips-atm/src/common.h

@@ -1,896 +0,0 @@
-#include <linux/atmdev.h>
-#include <asm/ifxmips/ifxmips_irq.h>
-#include <linux/irq.h>
-#include <linux/sem.h>
-#include <linux/coda.h>
-
-#define RX_DMA_CH_CBR                   0
-#define RX_DMA_CH_VBR_RT                1
-#define RX_DMA_CH_VBR_NRT               2
-#define RX_DMA_CH_AVR                   3
-#define RX_DMA_CH_UBR                   4
-#define RX_DMA_CH_OAM                   5
-#define RX_DMA_CH_TOTAL                 6
-
-#define WRX_DMA_CHANNEL_INTERRUPT_MODE  0x00
-#define WRX_DMA_CHANNEL_POLLING_MODE    0x01
-//#define WRX_DMA_CHANNEL_COUNTER_MODE    0x02
-#define WRX_DMA_CHANNEL_COUNTER_MODE    WRX_DMA_CHANNEL_INTERRUPT_MODE
-#define WRX_DMA_BUF_LEN_PER_DESCRIPTOR  0x00
-#define WRX_DMA_BUF_LEN_PER_CHANNEL     0x01
-
-#define ATM_VBR_RT     6
-#define ATM_VBR_NRT    ATM_VBR
-#define ATM_UBR_PLUS   7
-
-#define SET_BITS(x, msb, lsb, value)    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
-
-#define GET_ATM_PRIV(dev)       ((Atm_Priv *)dev->priv)
-
-#define CDM_CFG                         PPE_REG_ADDR(0x0100)
-
-#define CDM_CFG_RAM1                    GET_BITS(*CDM_CFG, 3, 2)
-#define CDM_CFG_RAM0                    (*CDM_CFG & (1 << 1))
-
-#define CDM_CFG_RAM1_SET(value)         SET_BITS(0, 3, 2, value)
-#define CDM_CFG_RAM0_SET(value)         ((value) ? (1 << 1) : 0)
-
-/*
- *  EMA Registers
- */
-#define EMA_CMDCFG                      PPE_REG_ADDR(0x0A00)
-#define EMA_DATACFG                     PPE_REG_ADDR(0x0A01)
-#define EMA_CMDCNT                      PPE_REG_ADDR(0x0A02)
-#define EMA_DATACNT                     PPE_REG_ADDR(0x0A03)
-#define EMA_ISR                         PPE_REG_ADDR(0x0A04)
-#define EMA_IER                         PPE_REG_ADDR(0x0A05)
-#define EMA_CFG                         PPE_REG_ADDR(0x0A06)
-#define EMA_SUBID                       PPE_REG_ADDR(0x0A07)
-
-
-/*
- *  QSB RAM Access Register
- */
-#define QSB_RAMAC                       QSB_CONF_REG(0x000D)
-
-#define QSB_RAMAC_RW                    (*QSB_RAMAC & (1 << 31))
-#define QSB_RAMAC_TSEL                  GET_BITS(*QSB_RAMAC, 27, 24)
-#define QSB_RAMAC_LH                    (*QSB_RAMAC & (1 << 16))
-#define QSB_RAMAC_TESEL                 GET_BITS(*QSB_RAMAC, 9, 0)
-
-#define QSB_RAMAC_RW_SET(value)         ((value) ? (1 << 31) : 0)
-#define QSB_RAMAC_TSEL_SET(value)       SET_BITS(0, 27, 24, value)
-#define QSB_RAMAC_LH_SET(value)         ((value) ? (1 << 16) : 0)
-#define QSB_RAMAC_TESEL_SET(value)      SET_BITS(0, 9, 0, value)
-
-/*  QSB */
-#define QSB_RAMAC_RW_READ               0
-#define QSB_RAMAC_RW_WRITE              1
-
-#define QSB_RAMAC_TSEL_QPT              0x01
-#define QSB_RAMAC_TSEL_SCT              0x02
-#define QSB_RAMAC_TSEL_SPT              0x03
-#define QSB_RAMAC_TSEL_VBR              0x08
-
-#define QSB_RAMAC_LH_LOW                0
-#define QSB_RAMAC_LH_HIGH               1
-
-#define QSB_QPT_SET_MASK                0x0
-#define QSB_QVPT_SET_MASK               0x0
-#define QSB_SET_SCT_MASK                0x0
-#define QSB_SET_SPT_MASK                0x0
-#define QSB_SET_SPT_SBVALID_MASK        0x7FFFFFFF
-
-#define QSB_SPT_SBV_VALID               (1 << 31)
-#define QSB_SPT_PN_SET(value)           (((value) & 0x01) ? (1 << 16) : 0)
-#define QSB_SPT_INTRATE_SET(value)      SET_BITS(0, 13, 0, value)
-
-/*
- *  QSB Internal Cell Delay Variation Register
- */
-#define QSB_ICDV                        QSB_CONF_REG(0x0007)
-
-#define QSB_ICDV_TAU                    GET_BITS(*QSB_ICDV, 5, 0)
-
-#define QSB_ICDV_TAU_SET(value)         SET_BITS(0, 5, 0, value)
-
-/*
- *  QSB Scheduler Burst Limit Register
- */
-#define QSB_SBL                         QSB_CONF_REG(0x0009)
-
-#define QSB_SBL_SBL                     GET_BITS(*QSB_SBL, 3, 0)
-
-#define QSB_SBL_SBL_SET(value)          SET_BITS(0, 3, 0, value)
-
-/*
- *  QSB Configuration Register
- */
-#define QSB_CFG                         QSB_CONF_REG(0x000A)
-
-#define QSB_CFG_TSTEPC                  GET_BITS(*QSB_CFG, 1, 0)
-
-#define QSB_CFG_TSTEPC_SET(value)       SET_BITS(0, 1, 0, value)
-
-/*
- *  QSB RAM Transfer Table Register
- */
-#define QSB_RTM                         QSB_CONF_REG(0x000B)
-
-#define QSB_RTM_DM                      (*QSB_RTM)
-
-#define QSB_RTM_DM_SET(value)           ((value) & 0xFFFFFFFF)
-
-/*
- *  QSB RAM Transfer Data Register
- */
-#define QSB_RTD                         QSB_CONF_REG(0x000C)
-
-#define QSB_RTD_TTV                     (*QSB_RTD)
-
-#define QSB_RTD_TTV_SET(value)          ((value) & 0xFFFFFFFF)
-
-/*
- *  PP32 Debug Control Register
- */
-#define PP32_DBG_CTRL                   PP32_DEBUG_REG_ADDR(0x0000)
-
-#define DBG_CTRL_START_SET(value)       ((value) ? (1 << 0) : 0)
-#define DBG_CTRL_STOP_SET(value)        ((value) ? (1 << 1) : 0)
-#define DBG_CTRL_STEP_SET(value)        ((value) ? (1 << 2) : 0)
-
-#define SB_RAM0_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x8000) << 2)))
-#define UPDATE_VCC_STAT(conn, item, num)    do { ppe_dev.connection[conn].item += num; } while (0)
-/*
- *  EMA Settings
- */
-#define EMA_CMD_BUF_LEN      0x0040
-#define EMA_CMD_BASE_ADDR    (0x00001580 << 2)
-#define EMA_DATA_BUF_LEN     0x0100
-#define EMA_DATA_BASE_ADDR   (0x00001900 << 2)
-#define EMA_WRITE_BURST      0x2
-#define EMA_READ_BURST       0x2
-
-
-#define CELL_SIZE                       ATM_AAL0_SDU
-#define IDLE_CYCLE_NUMBER               30000
-
-#define MBOX_IGU1_ISR                   PPE_REG_ADDR(0x0206)
-#define MBOX_IGU3_ISRS                  PPE_REG_ADDR(0x0214)
-#define MBOX_IGU1_ISRC                  PPE_REG_ADDR(0x0205)
-#define MBOX_IGU3_ISR                   PPE_REG_ADDR(0x0216)
-#define MBOX_IGU3_ISRS_SET(n)           (1 << (n))
-#define MBOX_IGU3_ISR_ISR(n)            (*MBOX_IGU3_ISR & (1 << (n)))
-/*
- *  *  Mailbox IGU1 Registers
- *   */
-#define MBOX_IGU1_ISRS                  PPE_REG_ADDR(0x0204)
-#define MBOX_IGU1_IER                   PPE_REG_ADDR(0x0207)
-
-#define MBOX_IGU1_ISRS_SET(n)           (1 << (n))
-#define MBOX_IGU1_ISRC_CLEAR(n)         (1 << (n))
-#define MBOX_IGU1_ISR_ISR(n)            (*MBOX_IGU1_ISR & (1 << (n)))
-#define MBOX_IGU1_IER_EN(n)             (*MBOX_IGU1_IER & (1 << (n)))
-#define MBOX_IGU1_IER_EN_SET(n)         (1 << (n))
-
-/*
- *  *  Mailbox IGU3 Registers
- *   */
-#define MBOX_IGU3_ISRC                  PPE_REG_ADDR(0x0215)
-#define MBOX_IGU3_IER                   PPE_REG_ADDR(0x0217)
-
-#define MBOX_IGU3_ISRS_SET(n)           (1 << (n))
-#define MBOX_IGU3_ISRC_CLEAR(n)         (1 << (n))
-#define MBOX_IGU3_ISR_ISR(n)            (*MBOX_IGU3_ISR & (1 << (n)))
-#define MBOX_IGU3_IER_EN(n)             (*MBOX_IGU3_IER & (1 << (n)))
-#define MBOX_IGU3_IER_EN_SET(n)         (1 << (n))
-
-
-// RX Frame Definitions
-#define MAX_RX_PACKET_ALIGN_BYTES       3
-#define MAX_RX_PACKET_PADDING_BYTES     3
-#define RX_INBAND_TRAILER_LENGTH        8
-#define MAX_RX_FRAME_EXTRA_BYTES        (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES)
-
-// TX Frame Definitions
-#define MAX_TX_HEADER_ALIGN_BYTES       12
-#define MAX_TX_PACKET_ALIGN_BYTES       3
-#define MAX_TX_PACKET_PADDING_BYTES     3
-#define TX_INBAND_HEADER_LENGTH         8
-#define MAX_TX_FRAME_EXTRA_BYTES        (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES)
-
-
-// DWORD-Length of Memory Blocks
-#define PP32_DEBUG_REG_DWLEN            0x0030
-#define PPM_INT_REG_DWLEN               0x0010
-#define PP32_INTERNAL_RES_DWLEN         0x00C0
-#define PPE_CLOCK_CONTROL_DWLEN         0x0F00
-#define CDM_CODE_MEMORY_RAM0_DWLEN      0x1000
-#define CDM_CODE_MEMORY_RAM1_DWLEN      0x0800
-#define PPE_REG_DWLEN                   0x1000
-#define PP32_DATA_MEMORY_RAM1_DWLEN     0x0800
-#define PPM_INT_UNIT_DWLEN              0x0100
-#define PPM_TIMER0_DWLEN                0x0100
-#define PPM_TASK_IND_REG_DWLEN          0x0100
-#define PPS_BRK_DWLEN                   0x0100
-#define PPM_TIMER1_DWLEN                0x0100
-#define SB_RAM0_DWLEN                   0x0400
-#define SB_RAM1_DWLEN                   0x0800
-#define SB_RAM2_DWLEN                   0x0A00
-#define SB_RAM3_DWLEN                   0x0400
-#define QSB_CONF_REG_DWLEN              0x0100
-/*
- *  QSB Queue Scheduling and Shaping Definitions
- */
-#define QSB_WFQ_NONUBR_MAX              0x3f00
-#define QSB_WFQ_UBR_BYPASS              0x3fff
-#define QSB_TP_TS_MAX                   65472
-#define QSB_TAUS_MAX                    64512
-#define QSB_GCR_MIN                     18
-
-
-
-// OAM Definitions
-#define OAM_RX_QUEUE_NUMBER             1
-#define OAM_TX_QUEUE_NUMBER_PER_PORT    0
-#define OAM_RX_DMA_CHANNEL_NUMBER       OAM_RX_QUEUE_NUMBER
-#define OAM_HTU_ENTRY_NUMBER            3
-#define OAM_F4_SEG_HTU_ENTRY            0
-#define OAM_F4_TOT_HTU_ENTRY            1
-#define OAM_F5_HTU_ENTRY                2
-#define OAM_F4_CELL_ID                  0
-#define OAM_F5_CELL_ID                  15
-
-// ATM Port, QSB Queue, DMA RX/TX Channel Parameters
-#define ATM_PORT_NUMBER                 2
-#define MAX_QUEUE_NUMBER                16
-#define QSB_QUEUE_NUMBER_BASE           1
-#define MAX_QUEUE_NUMBER_PER_PORT       (MAX_QUEUE_NUMBER - QSB_QUEUE_NUMBER_BASE)
-#define MAX_CONNECTION_NUMBER           MAX_QUEUE_NUMBER
-#define MAX_RX_DMA_CHANNEL_NUMBER       8
-#define MAX_TX_DMA_CHANNEL_NUMBER       16
-#define DMA_ALIGNMENT                   4
-
-#define DEFAULT_RX_HUNT_BITTH           4
-
-/*
- *  FPI Configuration Bus Register and Memory Address Mapping
- */
-#define DANUBE_PPE                      (KSEG1 + 0x1E180000)
-#define PP32_DEBUG_REG_ADDR(x)          ((volatile u32*)(DANUBE_PPE + (((x) + 0x0000) << 2)))
-#define PPM_INT_REG_ADDR(x)             ((volatile u32*)(DANUBE_PPE + (((x) + 0x0030) << 2)))
-#define PP32_INTERNAL_RES_ADDR(x)       ((volatile u32*)(DANUBE_PPE + (((x) + 0x0040) << 2)))
-#define PPE_CLOCK_CONTROL_ADDR(x)       ((volatile u32*)(DANUBE_PPE + (((x) + 0x0100) << 2)))
-#define CDM_CODE_MEMORY_RAM0_ADDR(x)    ((volatile u32*)(DANUBE_PPE + (((x) + 0x1000) << 2)))
-#define CDM_CODE_MEMORY_RAM1_ADDR(x)    ((volatile u32*)(DANUBE_PPE + (((x) + 0x2000) << 2)))
-#define PPE_REG_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x4000) << 2)))
-#define PP32_DATA_MEMORY_RAM1_ADDR(x)   ((volatile u32*)(DANUBE_PPE + (((x) + 0x5000) << 2)))
-#define PPM_INT_UNIT_ADDR(x)            ((volatile u32*)(DANUBE_PPE + (((x) + 0x6000) << 2)))
-#define PPM_TIMER0_ADDR(x)              ((volatile u32*)(DANUBE_PPE + (((x) + 0x6100) << 2)))
-#define PPM_TASK_IND_REG_ADDR(x)        ((volatile u32*)(DANUBE_PPE + (((x) + 0x6200) << 2)))
-#define PPS_BRK_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x6300) << 2)))
-#define PPM_TIMER1_ADDR(x)              ((volatile u32*)(DANUBE_PPE + (((x) + 0x6400) << 2)))
-#define SB_RAM0_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x8000) << 2)))
-#define SB_RAM1_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x8400) << 2)))
-#define SB_RAM2_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x8C00) << 2)))
-#define SB_RAM3_ADDR(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0x9600) << 2)))
-#define QSB_CONF_REG(x)                 ((volatile u32*)(DANUBE_PPE + (((x) + 0xC000) << 2)))
-
-/*
- *  Host-PPE Communication Data Address Mapping
- */
-#define CFG_WRX_HTUTS                   PPM_INT_UNIT_ADDR(0x2400)   /*  WAN RX HTU Table Size, must be configured before enable PPE firmware.   */
-#define CFG_WRX_QNUM                    PPM_INT_UNIT_ADDR(0x2401)   /*  WAN RX Queue Number */
-#define CFG_WRX_DCHNUM                  PPM_INT_UNIT_ADDR(0x2402)   /*  WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware.   */
-#define CFG_WTX_DCHNUM                  PPM_INT_UNIT_ADDR(0x2403)   /*  WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware.  */
-#define CFG_WRDES_DELAY                 PPM_INT_UNIT_ADDR(0x2404)   /*  WAN Descriptor Write Delay, must be configured before enable PPE firmware.  */
-#define WRX_DMACH_ON                    PPM_INT_UNIT_ADDR(0x2405)   /*  WAN RX DMA Channel Enable, must be configured before enable PPE firmware.   */
-#define WTX_DMACH_ON                    PPM_INT_UNIT_ADDR(0x2406)   /*  WAN TX DMA Channel Enable, must be configured before enable PPE firmware.   */
-#define WRX_HUNT_BITTH                  PPM_INT_UNIT_ADDR(0x2407)   /*  WAN RX HUNT Threshold, must be between 2 to 8.  */
-#define WRX_QUEUE_CONFIG(i)             ((struct wrx_queue_config*)PPM_INT_UNIT_ADDR(0x2500 + (i) * 20))
-#define WRX_DMA_CHANNEL_CONFIG(i)       ((struct wrx_dma_channel_config*)PPM_INT_UNIT_ADDR(0x2640 + (i) * 7))
-#define WTX_PORT_CONFIG(i)              ((struct wtx_port_config*)PPM_INT_UNIT_ADDR(0x2440 + (i)))
-#define WTX_QUEUE_CONFIG(i)             ((struct wtx_queue_config*)PPM_INT_UNIT_ADDR(0x2710 + (i) * 27))
-#define WTX_DMA_CHANNEL_CONFIG(i)       ((struct wtx_dma_channel_config*)PPM_INT_UNIT_ADDR(0x2711 + (i) * 27))
-#define WAN_MIB_TABLE                   ((struct wan_mib_table*)PPM_INT_UNIT_ADDR(0x2410))
-#define HTU_ENTRY(i)                    ((struct htu_entry*)PPM_INT_UNIT_ADDR(0x2000 + (i)))
-#define HTU_MASK(i)                     ((struct htu_mask*)PPM_INT_UNIT_ADDR(0x2020 + (i)))
-#define HTU_RESULT(i)                   ((struct htu_result*)PPM_INT_UNIT_ADDR(0x2040 + (i)))
-
-// DREG Idle Counters
-#define DREG_AT_CELL0                   PPE_REG_ADDR(0x0D24)
-#define DREG_AT_CELL1                   PPE_REG_ADDR(0x0D25)
-#define DREG_AT_IDLE_CNT0               PPE_REG_ADDR(0x0D26)
-#define DREG_AT_IDLE_CNT1               PPE_REG_ADDR(0x0D27)
-#define DREG_AR_CELL0                   PPE_REG_ADDR(0x0D68)
-#define DREG_AR_CELL1                   PPE_REG_ADDR(0x0D69)
-#define DREG_AR_IDLE_CNT0               PPE_REG_ADDR(0x0D6A)
-#define DREG_AR_IDLE_CNT1               PPE_REG_ADDR(0x0D6B)
-#define DREG_AR_AIIDLE_CNT0             PPE_REG_ADDR(0x0D6C)
-#define DREG_AR_AIIDLE_CNT1             PPE_REG_ADDR(0x0D6D)
-#define DREG_AR_BE_CNT0                 PPE_REG_ADDR(0x0D6E)
-#define DREG_AR_BE_CNT1                 PPE_REG_ADDR(0x0D6F)
-
-
-/*
- *  64-bit Data Type
- */
-typedef struct {
-    unsigned int    h: 32;
-    unsigned int    l: 32;
-} ppe_u64_t;
-
-/*
- *  PPE ATM Cell Header
- */
-#if defined(__BIG_ENDIAN)
-    struct uni_cell_header {
-        unsigned int        gfc     :4;
-        unsigned int        vpi     :8;
-        unsigned int        vci     :16;
-        unsigned int        pti     :3;
-        unsigned int        clp     :1;
-    };
-#else
-    struct uni_cell_header {
-        unsigned int        clp     :1;
-        unsigned int        pti     :3;
-        unsigned int        vci     :16;
-        unsigned int        vpi     :8;
-        unsigned int        gfc     :4;
-    };
-#endif  //  defined(__BIG_ENDIAN)
-
-/*
- *  Inband Header and Trailer
- */
-#if defined(__BIG_ENDIAN)
-    struct rx_inband_trailer {
-        /*  0 - 3h  */
-        unsigned int        uu      :8;
-        unsigned int        cpi     :8;
-        unsigned int        stw_res1:4;
-        unsigned int        stw_clp :1;
-        unsigned int        stw_ec  :1;
-        unsigned int        stw_uu  :1;
-        unsigned int        stw_cpi :1;
-        unsigned int        stw_ovz :1;
-        unsigned int        stw_mfl :1;
-        unsigned int        stw_usz :1;
-        unsigned int        stw_crc :1;
-        unsigned int        stw_il  :1;
-        unsigned int        stw_ra  :1;
-        unsigned int        stw_res2:2;
-        /*  4 - 7h  */
-        unsigned int        gfc     :4;
-        unsigned int        vpi     :8;
-        unsigned int        vci     :16;
-        unsigned int        pti     :3;
-        unsigned int        clp     :1;
-    };
-
-    struct tx_inband_header {
-        /*  0 - 3h  */
-        unsigned int        gfc     :4;
-        unsigned int        vpi     :8;
-        unsigned int        vci     :16;
-        unsigned int        pti     :3;
-        unsigned int        clp     :1;
-        /*  4 - 7h  */
-        unsigned int        uu      :8;
-        unsigned int        cpi     :8;
-        unsigned int        pad     :8;
-        unsigned int        res1    :8;
-    };
-#else
-    struct rx_inband_trailer {
-        /*  0 - 3h  */
-        unsigned int        stw_res2:2;
-        unsigned int        stw_ra  :1;
-        unsigned int        stw_il  :1;
-        unsigned int        stw_crc :1;
-        unsigned int        stw_usz :1;
-        unsigned int        stw_mfl :1;
-        unsigned int        stw_ovz :1;
-        unsigned int        stw_cpi :1;
-        unsigned int        stw_uu  :1;
-        unsigned int        stw_ec  :1;
-        unsigned int        stw_clp :1;
-        unsigned int        stw_res1:4;
-        unsigned int        cpi     :8;
-        unsigned int        uu      :8;
-        /*  4 - 7h  */
-        unsigned int        clp     :1;
-        unsigned int        pti     :3;
-        unsigned int        vci     :16;
-        unsigned int        vpi     :8;
-        unsigned int        gfc     :4;
-    };
-
-    struct tx_inband_header {
-        /*  0 - 3h  */
-        unsigned int        clp     :1;
-        unsigned int        pti     :3;
-        unsigned int        vci     :16;
-        unsigned int        vpi     :8;
-        unsigned int        gfc     :4;
-        /*  4 - 7h  */
-        unsigned int        res1    :8;
-        unsigned int        pad     :8;
-        unsigned int        cpi     :8;
-        unsigned int        uu      :8;
-    };
-#endif  //  defined(__BIG_ENDIAN)
-
-struct wan_mib_table {
-    unsigned int                     res1;
-    unsigned int                     wrx_drophtu_cell;
-    unsigned int                     wrx_dropdes_pdu;
-    unsigned int                     wrx_correct_pdu;
-    unsigned int                     wrx_err_pdu;
-    unsigned int                     wrx_dropdes_cell;
-    unsigned int                     wrx_correct_cell;
-    unsigned int                     wrx_err_cell;
-    unsigned int                     wrx_total_byte;
-    unsigned int                     wtx_total_pdu;
-    unsigned int                     wtx_total_cell;
-    unsigned int                     wtx_total_byte;
-};
-
-/*
- *  Internal Structure of Device
- */
-struct port {
-    int                     connection_base;        /*  first connection ID (RX/TX queue ID)    */
-    unsigned int                     max_connections;        /*  maximum connection number               */
-    unsigned int                     connection_table;       /*  connection opened status, every bit     */
-    unsigned int                     tx_max_cell_rate;       /*  maximum cell rate                       */
-    unsigned int                     tx_current_cell_rate;   /*  currently used cell rate                */
-#if !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-    int                     rx_dma_channel_base;    /*  first RX DMA channel ID                 */
-    unsigned int                     rx_dma_channel_assigned;/*  totally RX DMA channels used            */
-#endif  //  !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-    int                     oam_tx_queue;           /*  first TX queue ID of OAM cell           */
-    struct atm_dev          *dev;
-
-};
-
-struct connection {
-    struct atm_vcc          *vcc;                   /*  opened VCC                              */
-    struct timespec         access_time;            /*  time when last F4/F5 user cell arrives  */
-    unsigned int                     aal5_vcc_crc_err;       /*  number of packets with CRC error        */
-    unsigned int                     aal5_vcc_oversize_sdu;  /*  number of packets with oversize error   */
-    int                     rx_dma_channel;         /*  RX DMA channel ID assigned              */
-    int                     port;                   /*  to which port the connection belongs    */
-    unsigned int                     rx_pdu;
-    unsigned int                     rx_err_pdu;
-    unsigned int                     rx_sw_drop_pdu;
-    unsigned int                     tx_pdu;
-    unsigned int                     tx_err_pdu;
-    unsigned int                     tx_hw_drop_pdu;
-    unsigned int                     tx_sw_drop_pdu;
-};
-
-struct ppe_dev {
-    struct connection       connection[MAX_CONNECTION_NUMBER];
-    struct port             port[ATM_PORT_NUMBER];
-
-    struct aal5 {
-        unsigned char              padding_byte;               /*  padding byte pattern of AAL5 packet     */
-        unsigned int             rx_max_packet_size;         /*  max AAL5 packet length                  */
-        unsigned int             rx_min_packet_size;         /*  min AAL5 packet length                  */
-        unsigned int             rx_buffer_size;             /*  max memory allocated for a AAL5 packet  */
-        unsigned int             tx_max_packet_size;         /*  max AAL5 packet length                  */
-        unsigned int             tx_min_packet_size;         /*  min AAL5 packet length                  */
-        unsigned int             tx_buffer_size;             /*  max memory allocated for a AAL5 packet  */
-        unsigned int    rx_drop_error_packet;       /*  1: drop error packet, 0: ignore errors  */
-    }                       aal5;
-
-    struct qsb {
-        unsigned int             tau;                        /*  cell delay variation due to concurrency */
-        unsigned int             tstepc;                     /*  shceduler burst length                  */
-        unsigned int             sbl;                        /*  time step                               */
-    }                       qsb;
-
-    struct dma {
-        unsigned int             rx_descriptor_number;       /*  number of RX descriptors                */
-        unsigned int             tx_descriptor_number;       /*  number of TX descriptors                */
-        unsigned int             rx_clp1_desc_threshold;     /*  threshold to drop cells with CLP1       */
-        unsigned int             write_descriptor_delay;     /*  delay on descriptor write path          */
-        unsigned int             rx_total_channel_used;      /*  total RX channel used                   */
-        void            *rx_descriptor_addr;        /*  base address of memory allocated for    */
-        struct rx_descriptor
-                        *rx_descriptor_base;        /*  base address of RX descriptors          */
-        int             rx_desc_read_pos[MAX_RX_DMA_CHANNEL_NUMBER];    /*  first RX descriptor */
-                                                                        /*  to be read          */
-//        struct sk_buff  **rx_skb_pointers;          /*  base address of RX sk_buff pointers     */
-
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-        long            rx_weight[MAX_RX_DMA_CHANNEL_NUMBER];           /*  RX schedule weight  */
-        long            rx_default_weight[MAX_RX_DMA_CHANNEL_NUMBER];   /*  default weight      */
-#endif
-
-        unsigned int             tx_total_channel_used;      /*  total TX channel used                   */
-        void            *tx_descriptor_addr;        /*  base address of memory allocated for    */
-                                                    /*  TX descriptors                          */
-        struct tx_descriptor
-                        *tx_descriptor_base;        /*  base address of TX descriptors          */
-        int             tx_desc_alloc_pos[MAX_TX_DMA_CHANNEL_NUMBER];   /*  first TX descriptor */
-                                                                        /*  could be allocated  */
-//        int             tx_desc_alloc_num[MAX_TX_DMA_CHANNEL_NUMBER];   /*  number of allocated */
-//                                                                        /*  TX descriptors      */
-        int             tx_desc_alloc_flag[MAX_TX_DMA_CHANNEL_NUMBER];  /*  at least one TX     */
-                                                                        /*  descriptor is alloc */
-//        int             tx_desc_send_pos[MAX_TX_DMA_CHANNEL_NUMBER];    /*  first TX descriptor */
-//                                                                        /*  to be send          */
-        int             tx_desc_release_pos[MAX_TX_DMA_CHANNEL_NUMBER]; /*  first TX descriptor */
-                                                                        /*  to be released      */
-        struct sk_buff  **tx_skb_pointers;          /*  base address of TX sk_buff pointers     */
-    }                       dma;
-
-    struct mib {
-        ppe_u64_t       wrx_total_byte;             /*  bit-64 extention of MIB table member    */
-        ppe_u64_t       wtx_total_byte;             /*  bit-64 extention of MIB talbe member    */
-
-        unsigned int             wrx_pdu;                    /*  successfully received AAL5 packet       */
-        unsigned int             wrx_drop_pdu;               /*  AAL5 packet dropped by driver on RX     */
-        unsigned int             wtx_err_pdu;                /*  error AAL5 packet                       */
-        unsigned int             wtx_drop_pdu;               /*  AAL5 packet dropped by driver on TX     */
-    }                       mib;
-    struct wan_mib_table    prev_mib;
-
-    int                     oam_rx_queue;           /*  RX queue ID of OAM cell                 */
-    int                     oam_rx_dma_channel;     /*  RX DMA channel ID of OAM cell           */
-    int                     max_connections;        /*  total connections available             */
-
-    struct semaphore        sem;                    /*  lock used by open/close function        */
-};
-
-/*
- *  Host-PPE Communication Data Structure
- */
-#if defined(__BIG_ENDIAN)
-    struct wrx_queue_config {
-        /*  0h  */
-        unsigned int    res2        :27;
-        unsigned int    dmach       :4;
-        unsigned int    errdp       :1;
-        /*  1h  */
-        unsigned int    oversize    :16;
-        unsigned int    undersize   :16;
-        /*  2h  */
-        unsigned int    res1        :16;
-        unsigned int    mfs         :16;
-        /*  3h  */
-        unsigned int    uumask      :8;
-        unsigned int    cpimask     :8;
-        unsigned int    uuexp       :8;
-        unsigned int    cpiexp      :8;
-    };
-
-    struct wtx_port_config {
-        unsigned int    res1        :27;
-        unsigned int    qid         :4;
-        unsigned int    qsben       :1;
-    };
-
-    struct wtx_queue_config {
-        unsigned int    res1        :25;
-        unsigned int    sbid        :1;
-        unsigned int    res2        :3;
-        unsigned int    type        :2;
-        unsigned int    qsben       :1;
-    };
-
-    struct wrx_dma_channel_config {
-        /*  0h  */
-        unsigned int    res1        :1;
-        unsigned int    mode        :2;
-        unsigned int    rlcfg       :1;
-        unsigned int    desba       :28;
-        /*  1h  */
-        unsigned int    chrl        :16;
-        unsigned int    clp1th      :16;
-        /*  2h  */
-        unsigned int    deslen      :16;
-        unsigned int    vlddes      :16;
-    };
-
-    struct wtx_dma_channel_config {
-        /*  0h  */
-        unsigned int    res2        :1;
-        unsigned int    mode        :2;
-        unsigned int    res3        :1;
-        unsigned int    desba       :28;
-        /*  1h  */
-        unsigned int    res1        :32;
-        /*  2h  */
-        unsigned int    deslen      :16;
-        unsigned int    vlddes      :16;
-    };
-
-    struct htu_entry {
-        unsigned int    res1        :2;
-        unsigned int    pid         :2;
-        unsigned int    vpi         :8;
-        unsigned int    vci         :16;
-        unsigned int    pti         :3;
-        unsigned int    vld         :1;
-    };
-
-    struct htu_mask {
-        unsigned int    set         :2;
-        unsigned int    pid_mask    :2;
-        unsigned int    vpi_mask    :8;
-        unsigned int    vci_mask    :16;
-        unsigned int    pti_mask    :3;
-        unsigned int    clear       :1;
-    };
-
-   struct htu_result {
-        unsigned int    res1        :12;
-        unsigned int    cellid      :4;
-        unsigned int    res2        :5;
-        unsigned int    type        :1;
-        unsigned int    ven         :1;
-        unsigned int    res3        :5;
-        unsigned int    qid         :4;
-    };
-
-    struct rx_descriptor {
-        /*  0 - 3h  */
-        unsigned int    own         :1;
-        unsigned int    c           :1;
-        unsigned int    sop         :1;
-        unsigned int    eop         :1;
-        unsigned int    res1        :3;
-        unsigned int    byteoff     :2;
-        unsigned int    res2        :2;
-        unsigned int    id          :4;
-        unsigned int    err         :1;
-        unsigned int    datalen     :16;
-        /*  4 - 7h  */
-        unsigned int    res3        :4;
-        unsigned int    dataptr     :28;
-    };
-
-    struct tx_descriptor {
-        /*  0 - 3h  */
-        unsigned int    own         :1;
-        unsigned int    c           :1;
-        unsigned int    sop         :1;
-        unsigned int    eop         :1;
-        unsigned int    byteoff     :5;
-        unsigned int    res1        :5;
-        unsigned int    iscell      :1;
-        unsigned int    clp         :1;
-        unsigned int    datalen     :16;
-        /*  4 - 7h  */
-        unsigned int    res2        :4;
-        unsigned int    dataptr     :28;
-    };
-#else
-    struct wrx_queue_config {
-        /*  0h  */
-        unsigned int    errdp       :1;
-        unsigned int    dmach       :4;
-        unsigned int    res2        :27;
-        /*  1h  */
-        unsigned int    undersize   :16;
-        unsigned int    oversize    :16;
-        /*  2h  */
-        unsigned int    mfs         :16;
-        unsigned int    res1        :16;
-        /*  3h  */
-        unsigned int    cpiexp      :8;
-        unsigned int    uuexp       :8;
-        unsigned int    cpimask     :8;
-        unsigned int    uumask      :8;
-    };
-
-    struct wtx_port_config {
-        unsigned int    qsben       :1;
-        unsigned int    qid         :4;
-        unsigned int    res1        :27;
-    };
-
-    struct wtx_queue_config {
-        unsigned int    qsben       :1;
-        unsigned int    type        :2;
-        unsigned int    res2        :3;
-        unsigned int    sbid        :1;
-        unsigned int    res1        :25;
-    };
-
-    struct wrx_dma_channel_config
-    {
-        /*  0h  */
-        unsigned int    desba       :28;
-        unsigned int    rlcfg       :1;
-        unsigned int    mode        :2;
-        unsigned int    res1        :1;
-        /*  1h  */
-        unsigned int    clp1th      :16;
-        unsigned int    chrl        :16;
-        /*  2h  */
-        unsigned int    vlddes      :16;
-        unsigned int    deslen      :16;
-    };
-
-    struct wtx_dma_channel_config {
-        /*  0h  */
-        unsigned int    desba       :28;
-        unsigned int    res3        :1;
-        unsigned int    mode        :2;
-        unsigned int    res2        :1;
-        /*  1h  */
-        unsigned int    res1        :32;
-        /*  2h  */
-        unsigned int    vlddes      :16;
-        unsigned int    deslen      :16;
-    };
-
-    struct rx_descriptor {
-        /*  4 - 7h  */
-        unsigned int    dataptr     :28;
-        unsigned int    res3        :4;
-        /*  0 - 3h  */
-        unsigned int    datalen     :16;
-        unsigned int    err         :1;
-        unsigned int    id          :4;
-        unsigned int    res2        :2;
-        unsigned int    byteoff     :2;
-        unsigned int    res1        :3;
-        unsigned int    eop         :1;
-        unsigned int    sop         :1;
-        unsigned int    c           :1;
-        unsigned int    own         :1;
-    };
-
-    struct tx_descriptor {
-        /*  4 - 7h  */
-        unsigned int    dataptr     :28;
-        unsigned int    res2        :4;
-        /*  0 - 3h  */
-        unsigned int    datalen     :16;
-        unsigned int    clp         :1;
-        unsigned int    iscell      :1;
-        unsigned int    res1        :5;
-        unsigned int    byteoff     :5;
-        unsigned int    eop         :1;
-        unsigned int    sop         :1;
-        unsigned int    c           :1;
-        unsigned int    own         :1;
-    };
-#endif  //  defined(__BIG_ENDIAN)
-
-/*
- *  QSB Queue Parameter Table Entry and Queue VBR Parameter Table Entry
- */
-#if defined(__BIG_ENDIAN)
-    union qsb_queue_parameter_table {
-        struct {
-            unsigned int    res1    :1;
-            unsigned int    vbr     :1;
-            unsigned int    wfqf    :14;
-            unsigned int    tp      :16;
-        }               bit;
-        unsigned int             dword;
-    };
-
-    union qsb_queue_vbr_parameter_table {
-        struct {
-            unsigned int    taus    :16;
-            unsigned int    ts      :16;
-        }               bit;
-        unsigned int             dword;
-    };
-#else
-    union qsb_queue_parameter_table {
-        struct {
-            unsigned int    tp      :16;
-            unsigned int    wfqf    :14;
-            unsigned int    vbr     :1;
-            unsigned int    res1    :1;
-        }               bit;
-        unsigned int             dword;
-    };
-
-    union qsb_queue_vbr_parameter_table {
-        struct {
-            unsigned int    ts      :16;
-            unsigned int    taus    :16;
-        }               bit;
-        unsigned int             dword;
-    };
-#endif  //  defined(__BIG_ENDIAN)
-
-
-typedef enum
-{
-    IAD_ATM_CBR     = 6,						/* IAD_ATM_PRI_HIGH,							*/
-    IAD_ATM_VBR_RT  = 4,						/* IAD_ATM_PRI_MED_HIGH,	VBR, Real-Time 		*/
-    IAD_ATM_VBR_NRT = 2,						/* IAD_ATM_PRI_MED_LOW,     VBR, Non-Real-Time 	*/
-    IAD_ATM_UBR     = 0,						/* IAD_ATM_PRI_LOW		  						*/
-} iad_atmServiceCategory;
-
-typedef	unsigned int iad_atmDiffServCategory;
-
-typedef struct 
-{
-   int cellRate;
-   int round;   /* IAD_ATM_RATE_CEILING, IAD_ATM_RATE_FLOOR */
-} iad_atmCellRateDesc;
-
-typedef struct 
-{
-    unsigned int               phyID;          /* IAD_ATM_PHY0, IAD_ATM_PHY1 */
-    unsigned int               txQHnd;         /* Tx HW Q */
-    union _pri
-    {
-        int                     priority;       /* TS Q:    4 priorities: IAD_ATM_PRI_HIGH, IAD_ATM_PRI_MED_HIGH, IAD_ATM_PRI_MED_LOW, IAD_ATM_PRI_LOW
-                                                  non-TS Q: 8 priorities: IAD_ATM_PRI_LEVEL_7, IAD_ATM_PRI_LEVEL_6,..., IAD_ATM_PRI_LEVEL_0 */
-        iad_atmServiceCategory  qosClass;       /* IAD_ATM_CBR, IAD_ATM_VBR_RT, IAD_ATM_VBR_NRT, IAD_ATM_UBR */
-        iad_atmDiffServCategory diffServClass;  /* IP_QOS */
-    } srvCat; /* service category */
-    iad_atmCellRateDesc         pcr;            /* Peak Cell Rate */
-    iad_atmCellRateDesc         scr;            /* Sustained Cell Rate. */
-    iad_atmCellRateDesc         mcr;            /* Minimum Cell Rate, not used */
-    int                         mbs;            /* maximum bursting size in cells */
-    int                         isPrioritize;   /* TRUE: This flow is of the higher priority than the flows of the same QOS category.(Use MCR to boost priority) */
-} iad_atmTrfPar; /* Tx Traffic Parameters */
-
-typedef struct
-{
-    unsigned int    txGrpId;
-    unsigned int    flowId;
-    iad_atmTrfPar   trfPar;
-} Atm_Ictl_Flow_Set;
-
-typedef struct
-{
-    unsigned int    txGrpId;
-    unsigned int    vpi;
-    unsigned int    vci;
-
-    unsigned int    encaps;
-    unsigned int    proto;
-
-} Atm_Ictl_Open_Vcc;
-
-typedef struct
-{
-    struct atm_vcc			vcc;
-	unsigned int 			valid;
-	unsigned int 			on;
-    unsigned int			vccIndex; /* 0~7 */
-	unsigned int 			itf;
-    struct net_device_stats	stats; 
-} Atm_Priv;
-
-
-extern struct ppe_dev ppe_dev;
-
-
-int pp32_start(void);
-void pp32_stop(void);
-void init_rx_tables(void);
-void init_tx_tables(void);
-struct sk_buff* alloc_skb_rx(void);
-struct sk_buff* alloc_skb_tx(unsigned int);
-void resize_skb_rx(struct sk_buff *, unsigned int, int);
-struct sk_buff* atm_alloc_tx(struct atm_vcc *, unsigned int);
-void atm_free_tx_skb_vcc(struct sk_buff *);
-int alloc_tx_connection(int);
-int ppe_open(struct atm_vcc *vcc);
-void ppe_close(struct atm_vcc *vcc);
-int ppe_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg);
-int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb);
-int ppe_send_oam(struct atm_vcc *vcc, void *cell, int flags);
-int ppe_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags);
-irqreturn_t mailbox_irq_handler(int, void *);
-int find_vcc(struct atm_vcc *vcc);
-int find_vpi(unsigned int vpi);
-int find_vpivci(unsigned int vpi, unsigned int vci);
-void mailbox_signal(unsigned int channel, int is_tx);
-

package/ifxmips-atm/src/core.c

@@ -1,800 +0,0 @@
-#include <asm/mach-ifxmips/cgu.h>
-#include <linux/module.h>
-#include <linux/atmdev.h>
-#include <linux/irq.h>
-
-#include "common.h"
-#include "proc.h"
-
-// our main struct
-struct ppe_dev ppe_dev;
-
-static int port_max_connection[2] = {7, 7};     /*  Maximum number of connections for ports (0-14)  */
-static int port_cell_rate_up[2] = {3200, 3200}; /*  Maximum TX cell rate for ports                  */
-static int qsb_tau = 1;
-static int qsb_srvm = 0x0f;
-static int qsb_tstep = 4;
-static int write_descriptor_delay = 0x20;
-static int aal5_fill_pattern = 0x007E;
-static int aal5r_max_packet_size = 0x0700;
-static int aal5r_min_packet_size = 0x0000;
-static int aal5s_max_packet_size = 0x0700;
-static int aal5s_min_packet_size = 0x0000;
-static int aal5r_drop_error_packet = 1;
-static int dma_rx_descriptor_length = 48;
-static int dma_tx_descriptor_length = 64;
-static int dma_rx_clp1_descriptor_threshold = 38;
-
-//module_param(port_max_connection, "2-2i");
-//module_param(port_cell_rate_up, "2-2i");
-module_param(qsb_tau, int, 0);
-module_param(qsb_srvm, int, 0);
-module_param(qsb_tstep, int, 0);
-module_param(write_descriptor_delay, int, 0);
-module_param(aal5_fill_pattern, int, 0);
-module_param(aal5r_max_packet_size, int, 0);
-module_param(aal5r_min_packet_size, int, 0);
-module_param(aal5s_max_packet_size, int, 0);
-module_param(aal5s_min_packet_size, int, 0);
-module_param(aal5r_drop_error_packet, int, 0);
-module_param(dma_rx_descriptor_length, int, 0);
-module_param(dma_tx_descriptor_length, int, 0);
-module_param(dma_rx_clp1_descriptor_threshold, int, 0);
-
-MODULE_PARM_DESC(port_cell_rate_up, "ATM port upstream rate in cells/s");
-MODULE_PARM_DESC(port_max_connection, "Maximum atm connection for port (0-1)");
-MODULE_PARM_DESC(qsb_tau, "Cell delay variation. Value must be > 0");
-MODULE_PARM_DESC(qsb_srvm, "Maximum burst size");
-MODULE_PARM_DESC(qsb_tstep, "n*32 cycles per sbs cycles n=1,2,4");
-MODULE_PARM_DESC(write_descriptor_delay, "PPE core clock cycles between descriptor write and effectiveness in external RAM");
-MODULE_PARM_DESC(a5_fill_pattern, "Filling pattern (PAD) for AAL5 frames");
-MODULE_PARM_DESC(aal5r_max_packet_size, "Max packet size in byte for downstream AAL5 frames");
-MODULE_PARM_DESC(aal5r_min_packet_size, "Min packet size in byte for downstream AAL5 frames");
-MODULE_PARM_DESC(aal5s_max_packet_size, "Max packet size in byte for upstream AAL5 frames");
-MODULE_PARM_DESC(aal5s_min_packet_size, "Min packet size in byte for upstream AAL5 frames");
-MODULE_PARM_DESC(aal5r_drop_error_packet, "Non-zero value to drop error packet for downstream");
-MODULE_PARM_DESC(dma_rx_descriptor_length, "Number of descriptor assigned to DMA RX channel (>16)");
-MODULE_PARM_DESC(dma_tx_descriptor_length, "Number of descriptor assigned to DMA TX channel (>16)");
-MODULE_PARM_DESC(dma_rx_clp1_descriptor_threshold, "Descriptor threshold for cells with cell loss priority 1");
-
-void init_rx_tables(void)
-{
-    int i, j;
-    struct wrx_queue_config wrx_queue_config = {0};
-    struct wrx_dma_channel_config wrx_dma_channel_config = {0};
-    struct htu_entry htu_entry = {0};
-    struct htu_result htu_result = {0};
-
-    struct htu_mask htu_mask = {    set:        0x03,
-                                    pid_mask:   0x00,
-                                    vpi_mask:   0x00,
-                                    vci_mask:   0x00,
-                                    pti_mask:   0x00,
-                                    clear:      0x00};
-
-    /*
-     *  General Registers
-     */
-    *CFG_WRX_HTUTS  = ppe_dev.max_connections + OAM_HTU_ENTRY_NUMBER;
-    *CFG_WRX_QNUM   = ppe_dev.max_connections + OAM_RX_QUEUE_NUMBER + QSB_QUEUE_NUMBER_BASE;
-    *CFG_WRX_DCHNUM = ppe_dev.dma.rx_total_channel_used;
-    *WRX_DMACH_ON   = (1 << ppe_dev.dma.rx_total_channel_used) - 1;
-    *WRX_HUNT_BITTH = DEFAULT_RX_HUNT_BITTH;
-
-    /*
-     *  WRX Queue Configuration Table
-     */
-    wrx_queue_config.uumask    = 0;
-    wrx_queue_config.cpimask   = 0;
-    wrx_queue_config.uuexp     = 0;
-    wrx_queue_config.cpiexp    = 0;
-    wrx_queue_config.mfs       = ppe_dev.aal5.rx_max_packet_size;   // rx_buffer_size
-    wrx_queue_config.oversize  = ppe_dev.aal5.rx_max_packet_size;
-    wrx_queue_config.undersize = ppe_dev.aal5.rx_min_packet_size;
-    wrx_queue_config.errdp     = ppe_dev.aal5.rx_drop_error_packet;
-    for ( i = 0; i < QSB_QUEUE_NUMBER_BASE; i++ )
-        *WRX_QUEUE_CONFIG(i) = wrx_queue_config;
-    for ( j = 0; j < ppe_dev.max_connections; j++ )
-    {
-#if !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-        /*  If RX QoS is disabled, the DMA channel must be fixed.   */
-        wrx_queue_config.dmach = ppe_dev.connection[i].rx_dma_channel;
-#endif  //  !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-        *WRX_QUEUE_CONFIG(i++) = wrx_queue_config;
-    }
-    /*  OAM RX Queue    */
-    for ( j = 0; j < OAM_RX_DMA_CHANNEL_NUMBER; j++ )
-    {
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-        wrx_queue_config.dmach = RX_DMA_CH_OAM;
-#else
-        wrx_queue_config.dmach = ppe_dev.oam_rx_dma_channel + j;
-#endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-        *WRX_QUEUE_CONFIG(i++) = wrx_queue_config;
-    }
-
-    wrx_dma_channel_config.deslen = ppe_dev.dma.rx_descriptor_number;
-    wrx_dma_channel_config.chrl   = 0;
-    wrx_dma_channel_config.clp1th = ppe_dev.dma.rx_clp1_desc_threshold;
-    wrx_dma_channel_config.mode   = WRX_DMA_CHANNEL_COUNTER_MODE;
-    wrx_dma_channel_config.rlcfg  = WRX_DMA_BUF_LEN_PER_DESCRIPTOR;
-    for ( i = 0; i < ppe_dev.dma.rx_total_channel_used; i++ )
-    {
-        wrx_dma_channel_config.desba = (((u32)ppe_dev.dma.rx_descriptor_base >> 2) & 0x0FFFFFFF) + ppe_dev.dma.rx_descriptor_number * i * (sizeof(struct rx_descriptor) >> 2);
-        *WRX_DMA_CHANNEL_CONFIG(i) = wrx_dma_channel_config;
-    }
-
-    /*
-     *  HTU Tables
-     */
-    for ( i = 0; i < ppe_dev.max_connections; i++ )
-    {
-        htu_result.qid = (unsigned int)i;
-
-        *HTU_ENTRY(i + OAM_HTU_ENTRY_NUMBER)  = htu_entry;
-        *HTU_MASK(i + OAM_HTU_ENTRY_NUMBER)   = htu_mask;
-        *HTU_RESULT(i + OAM_HTU_ENTRY_NUMBER) = htu_result;
-    }
-    /*  OAM HTU Entry   */
-    htu_entry.vci     = 0x03;
-    htu_mask.pid_mask = 0x03;
-    htu_mask.vpi_mask = 0xFF;
-    htu_mask.vci_mask = 0x0000;
-    htu_mask.pti_mask = 0x07;
-    htu_result.cellid = ppe_dev.oam_rx_queue;
-    htu_result.type   = 1;
-    htu_result.ven    = 1;
-    htu_result.qid    = ppe_dev.oam_rx_queue;
-    *HTU_RESULT(OAM_F4_SEG_HTU_ENTRY) = htu_result;
-    *HTU_MASK(OAM_F4_SEG_HTU_ENTRY)   = htu_mask;
-    *HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)  = htu_entry;
-    htu_entry.vci     = 0x04;
-    htu_result.cellid = ppe_dev.oam_rx_queue;
-    htu_result.type   = 1;
-    htu_result.ven    = 1;
-    htu_result.qid    = ppe_dev.oam_rx_queue;
-    *HTU_RESULT(OAM_F4_TOT_HTU_ENTRY) = htu_result;
-    *HTU_MASK(OAM_F4_TOT_HTU_ENTRY)   = htu_mask;
-    *HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)  = htu_entry;
-    htu_entry.vci     = 0x00;
-    htu_entry.pti     = 0x04;
-    htu_mask.vci_mask = 0xFFFF;
-    htu_mask.pti_mask = 0x01;
-    htu_result.cellid = ppe_dev.oam_rx_queue;
-    htu_result.type   = 1;
-    htu_result.ven    = 1;
-    htu_result.qid    = ppe_dev.oam_rx_queue;
-    *HTU_RESULT(OAM_F5_HTU_ENTRY) = htu_result;
-    *HTU_MASK(OAM_F5_HTU_ENTRY)   = htu_mask;
-    *HTU_ENTRY(OAM_F5_HTU_ENTRY)  = htu_entry;
-}
-
-void init_tx_tables(void)
-{
-    int i, j;
-    struct wtx_queue_config wtx_queue_config = {0};
-    struct wtx_dma_channel_config wtx_dma_channel_config = {0};
-
-    struct wtx_port_config wtx_port_config = {  res1:   0,
-                                                qid:    0,
-                                                qsben:  1};
-
-    /*
-     *  General Registers
-     */
-    *CFG_WTX_DCHNUM     = ppe_dev.dma.tx_total_channel_used + QSB_QUEUE_NUMBER_BASE;
-    *WTX_DMACH_ON       = ((1 << (ppe_dev.dma.tx_total_channel_used + QSB_QUEUE_NUMBER_BASE)) - 1) ^ ((1 << QSB_QUEUE_NUMBER_BASE) - 1);
-    *CFG_WRDES_DELAY    = ppe_dev.dma.write_descriptor_delay;
-
-    /*
-     *  WTX Port Configuration Table
-     */
-#if !defined(DISABLE_QSB) || !DISABLE_QSB
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        *WTX_PORT_CONFIG(i) = wtx_port_config;
-#else
-    wtx_port_config.qsben = 0;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-    {
-        wtx_port_config.qid = ppe_dev.port[i].connection_base;
-        *WTX_PORT_CONFIG(i) = wtx_port_config;
-
-printk("port %d: qid = %d, qsb disabled\n", i, wtx_port_config.qid);
-    }
-#endif
-
-    /*
-     *  WTX Queue Configuration Table
-     */
-    wtx_queue_config.res1  = 0;
-    wtx_queue_config.res2  = 0;
-//    wtx_queue_config.type  = 0x03;
-    wtx_queue_config.type  = 0x0;
-#if !defined(DISABLE_QSB) || !DISABLE_QSB
-    wtx_queue_config.qsben = 1;
-#else
-    wtx_queue_config.qsben = 0;
-#endif
-    wtx_queue_config.sbid  = 0;
-    for ( i = 0; i < QSB_QUEUE_NUMBER_BASE; i++ )
-        *WTX_QUEUE_CONFIG(i) = wtx_queue_config;
-    for ( j = 0; j < ppe_dev.max_connections; j++ )
-    {
-        wtx_queue_config.sbid = ppe_dev.connection[i].port & 0x01;  /*  assign QSB to TX queue  */
-        *WTX_QUEUE_CONFIG(i) = wtx_queue_config;
-        i++;
-    }
-    /*  OAM TX Queue    */
-//    wtx_queue_config.type = 0x01;
-    wtx_queue_config.type  = 0x00;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-    {
-        wtx_queue_config.sbid = i & 0x01;
-        for ( j = 0; j < OAM_TX_QUEUE_NUMBER_PER_PORT; j++ )
-            *WTX_QUEUE_CONFIG(ppe_dev.port[i].oam_tx_queue + j) = wtx_queue_config;
-    }
-
-    wtx_dma_channel_config.mode   = WRX_DMA_CHANNEL_COUNTER_MODE;
-    wtx_dma_channel_config.deslen = 0;
-    wtx_dma_channel_config.desba = 0;
-    for ( i = 0; i < QSB_QUEUE_NUMBER_BASE; i++ )
-        *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config;
-    /*  normal connection and OAM channel   */
-    wtx_dma_channel_config.deslen = ppe_dev.dma.tx_descriptor_number;
-    for ( j = 0; j < ppe_dev.dma.tx_total_channel_used; j++ )
-    {
-        wtx_dma_channel_config.desba = (((u32)ppe_dev.dma.tx_descriptor_base >> 2) & 0x0FFFFFFF) + ppe_dev.dma.tx_descriptor_number * j * (sizeof(struct tx_descriptor) >> 2);
-        *WTX_DMA_CHANNEL_CONFIG(i++) = wtx_dma_channel_config;
-    }
-}
-
-static inline void qsb_global_set(void)
-{
-    int i, j;
-    u32 qsb_clk = cgu_get_fpi_bus_clock(2);
-   u32 tmp1, tmp2, tmp3;
-    union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
-    union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
-    int qsb_qid;
-
-    *QSB_ICDV = QSB_ICDV_TAU_SET(ppe_dev.qsb.tau);
-    *QSB_SBL  = QSB_SBL_SBL_SET(ppe_dev.qsb.sbl);
-    *QSB_CFG  = QSB_CFG_TSTEPC_SET(ppe_dev.qsb.tstepc >> 1);
-
-    /*
-     *  set SCT and SPT per port
-     */
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( ppe_dev.port[i].max_connections != 0 && ppe_dev.port[i].tx_max_cell_rate != 0 )
-        {
-            tmp1 = ((qsb_clk * ppe_dev.qsb.tstepc) >> 1) / ppe_dev.port[i].tx_max_cell_rate;
-            tmp2 = tmp1 >> 6;                   /*  integer value of Tsb    */
-            tmp3 = (tmp1 & ((1 << 6) - 1)) + 1; /*  fractional part of Tsb  */
-            /*  carry over to integer part (?)  */
-            if ( tmp3 == (1 << 6) )
-            {
-                tmp3 = 0;
-                tmp2++;
-            }
-            if ( tmp2 == 0 )
-                tmp2 = tmp3 = 1;
-            /*  1. set mask                                 */
-            /*  2. write value to data transfer register    */
-            /*  3. start the tranfer                        */
-            /*  SCT (FracRate)  */
-            *QSB_RTM   = QSB_RTM_DM_SET(QSB_SET_SCT_MASK);
-            *QSB_RTD   = QSB_RTD_TTV_SET(tmp3);
-            *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SCT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01);
-            /*  SPT (SBV + PN + IntRage)    */
-            *QSB_RTM   = QSB_RTM_DM_SET(QSB_SET_SPT_MASK);
-            *QSB_RTD   = QSB_RTD_TTV_SET(QSB_SPT_SBV_VALID | QSB_SPT_PN_SET(i & 0x01) | QSB_SPT_INTRATE_SET(tmp2));
-            *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01);
-        }
-
-	/*
-	*  set OAM TX queue
-	*/
-	for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-		if ( ppe_dev.port[i].max_connections != 0 )
-		{
-			tmp1 = ((qsb_clk * ppe_dev.qsb.tstepc) >> 1) / ppe_dev.port[i].tx_max_cell_rate;
-			tmp2 = tmp1 >> 6;                   /*  integer value of Tsb    */
-			tmp3 = (tmp1 & ((1 << 6) - 1)) + 1; /*  fractional part of Tsb  */
-			/*  carry over to integer part (?)  */
-			if ( tmp3 == (1 << 6) )
-			{
-				tmp3 = 0;
-				tmp2++;
-			}
-			if ( tmp2 == 0 )
-				tmp2 = tmp3 = 1;
-				/*  1. set mask                                 */
-				/*  2. write value to data transfer register    */
-				/*  3. start the tranfer                        */
-				/*  SCT (FracRate)  */
-				*QSB_RTM   = QSB_RTM_DM_SET(QSB_SET_SCT_MASK);
-				*QSB_RTD   = QSB_RTD_TTV_SET(tmp3);
-				*QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SCT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01);
-
-				/*  SPT (SBV + PN + IntRage)    */
-				*QSB_RTM   = QSB_RTM_DM_SET(QSB_SET_SPT_MASK);
-				*QSB_RTD   = QSB_RTD_TTV_SET(QSB_SPT_SBV_VALID | QSB_SPT_PN_SET(i & 0x01) | QSB_SPT_INTRATE_SET(tmp2));
-				*QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01);
-		}
-
-		/*
-		*      *  set OAM TX queue
-		*           */
-		for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-			if ( ppe_dev.port[i].max_connections != 0 )
-				for ( j = 0; j < OAM_TX_QUEUE_NUMBER_PER_PORT; j++ )
-				{
-					qsb_qid = ppe_dev.port[i].oam_tx_queue + j;
-
-					/*  disable PCR limiter */
-					qsb_queue_parameter_table.bit.tp = 0;
-					/*  set WFQ as real time queue  */
-					qsb_queue_parameter_table.bit.wfqf = 0;
-					/*  disable leaky bucket shaper */
-					qsb_queue_vbr_parameter_table.bit.taus = 0;
-					qsb_queue_vbr_parameter_table.bit.ts = 0;
-
-					/*  Queue Parameter Table (QPT) */
-					*QSB_RTM   = QSB_RTM_DM_SET(QSB_QPT_SET_MASK);
-					*QSB_RTD   = QSB_RTD_TTV_SET(qsb_queue_parameter_table.dword);
-					*QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_QPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid);
-					/*  Queue VBR Paramter Table (QVPT) */
-					*QSB_RTM   = QSB_RTM_DM_SET(QSB_QVPT_SET_MASK);
-					*QSB_RTD   = QSB_RTD_TTV_SET(qsb_queue_vbr_parameter_table.dword);
-					*QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_VBR) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid);
-				}
-}
-
-static inline void clear_ppe_dev(void)
-{
-	int i;
-
-	for (i = 0; i < ppe_dev.dma.tx_total_channel_used; i++ )
-	{
-		int conn = i + QSB_QUEUE_NUMBER_BASE;
-		int desc_base;
-		struct sk_buff *skb;
-
-		while(ppe_dev.dma.tx_desc_release_pos[conn] != ppe_dev.dma.tx_desc_alloc_pos[conn])
-		{
-			desc_base = ppe_dev.dma.tx_descriptor_number * (conn - QSB_QUEUE_NUMBER_BASE) + ppe_dev.dma.tx_desc_release_pos[conn];
-			if(!ppe_dev.dma.tx_descriptor_base[desc_base].own)
-			{
-				skb = ppe_dev.dma.tx_skb_pointers[desc_base];
-				atm_free_tx_skb_vcc(skb);
-
-				//  pretend PP32 hold owner bit, so that won't be released more than once, so allocation process don't check this bit
-				ppe_dev.dma.tx_descriptor_base[desc_base].own = 1;
-			}
-			if (++ppe_dev.dma.tx_desc_release_pos[conn] == ppe_dev.dma.tx_descriptor_number)
-				ppe_dev.dma.tx_desc_release_pos[conn] = 0;
-		}
-	}
-
-	for (i = ppe_dev.dma.rx_total_channel_used * ppe_dev.dma.rx_descriptor_number - 1; i >= 0; i--)
-		dev_kfree_skb_any(*(struct sk_buff **)(((ppe_dev.dma.rx_descriptor_base[i].dataptr << 2) | KSEG0) - 4));
-
-	kfree(ppe_dev.dma.tx_skb_pointers);
-	kfree(ppe_dev.dma.tx_descriptor_addr);
-	kfree(ppe_dev.dma.rx_descriptor_addr);
-}
-
-static inline int init_ppe_dev(void)
-{
-    int i, j;
-    int rx_desc, tx_desc;
-    int conn;
-    int oam_tx_queue;
-#if !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-    int rx_dma_channel_base;
-    int rx_dma_channel_assigned;
-#endif  //  !defined(ENABLE_RX_QOS) || !ENABLE_RX_QOS
-
-    struct rx_descriptor rx_descriptor = {  own:    1,
-                                            c:      0,
-                                            sop:    1,
-                                            eop:    1,
-                                            res1:   0,
-                                            byteoff:0,
-                                            res2:   0,
-                                            id:     0,
-                                            err:    0,
-                                            datalen:0,
-                                            res3:   0,
-                                            dataptr:0};
-
-    struct tx_descriptor tx_descriptor = {  own:    1,  //  pretend it's hold by PP32
-                                            c:      0,
-                                            sop:    1,
-                                            eop:    1,
-                                            byteoff:0,
-                                            res1:   0,
-                                            iscell: 0,
-                                            clp:    0,
-                                            datalen:0,
-                                            res2:   0,
-                                            dataptr:0};
-
-    memset(&ppe_dev, 0, sizeof(ppe_dev));
-
-    /*
-     *  Setup AAL5 members, buffer size must be larger than max packet size plus overhead.
-     */
-    ppe_dev.aal5.padding_byte         = (u8)aal5_fill_pattern;
-    ppe_dev.aal5.rx_max_packet_size   = (u32)aal5r_max_packet_size;
-    ppe_dev.aal5.rx_min_packet_size   = (u32)aal5r_min_packet_size;
-    ppe_dev.aal5.rx_buffer_size       = ((u32)(aal5r_max_packet_size > CELL_SIZE ? aal5r_max_packet_size + MAX_RX_FRAME_EXTRA_BYTES : CELL_SIZE + MAX_RX_FRAME_EXTRA_BYTES) + DMA_ALIGNMENT - 1) & ~(DMA_ALIGNMENT - 1);
-    ppe_dev.aal5.tx_max_packet_size   = (u32)aal5s_max_packet_size;
-    ppe_dev.aal5.tx_min_packet_size   = (u32)aal5s_min_packet_size;
-    ppe_dev.aal5.tx_buffer_size       = ((u32)(aal5s_max_packet_size > CELL_SIZE ? aal5s_max_packet_size + MAX_TX_FRAME_EXTRA_BYTES : CELL_SIZE + MAX_TX_FRAME_EXTRA_BYTES) + DMA_ALIGNMENT - 1) & ~(DMA_ALIGNMENT - 1);
-    ppe_dev.aal5.rx_drop_error_packet = aal5r_drop_error_packet ? 1 : 0;
-
-    /*
-     *  Setup QSB members, please refer to Amazon spec 15.4 to get the value calculation formula.
-     */
-    ppe_dev.qsb.tau     = (u32)qsb_tau;
-    ppe_dev.qsb.tstepc  = (u32)qsb_tstep;
-    ppe_dev.qsb.sbl     = (u32)qsb_srvm;
-
-    /*
-     *  Setup port, connection, other members.
-     */
-    conn = 0;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-    {
-        /*  first connection ID of port */
-        ppe_dev.port[i].connection_base  = conn + QSB_QUEUE_NUMBER_BASE;
-        /*  max number of connections of port   */
-        ppe_dev.port[i].max_connections  = (u32)port_max_connection[i];
-        /*  max cell rate the port has  */
-        ppe_dev.port[i].tx_max_cell_rate = (u32)port_cell_rate_up[i];
-
-        /*  link connection ID to port ID   */
-        for ( j = port_max_connection[i] - 1; j >= 0; j-- )
-            ppe_dev.connection[conn++ + QSB_QUEUE_NUMBER_BASE].port = i;
-    }
-    /*  total connection numbers of all ports   */
-    ppe_dev.max_connections = conn;
-    /*  OAM RX queue ID, which is the first available connection ID after */
-    /*  connections assigned to ports.                                    */
-    ppe_dev.oam_rx_queue = conn + QSB_QUEUE_NUMBER_BASE;
-
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    oam_tx_queue = conn;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( port_max_connection[i] != 0 )
-        {
-            ppe_dev.port[i].oam_tx_queue = oam_tx_queue + QSB_QUEUE_NUMBER_BASE;
-
-            for ( j = 0; j < OAM_TX_QUEUE_NUMBER_PER_PORT; j++ )
-                /*  Since connection ID is one to one mapped to RX/TX queue ID, the connection  */
-                /*  structure must be reserved for OAM RX/TX queues, and member "port" is set   */
-                /*  according to port to which OAM TX queue is connected.                       */
-                ppe_dev.connection[oam_tx_queue++ + QSB_QUEUE_NUMBER_BASE].port = i;
-        }
-    /*  DMA RX channel assigned to OAM RX queue */
-    ppe_dev.oam_rx_dma_channel = RX_DMA_CH_OAM;
-    /*  DMA RX channel will be assigned dynamically when VCC is open.   */
-#else   //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    rx_dma_channel_base = 0;
-    oam_tx_queue = conn;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( port_max_connection[i] != 0 )
-        {
-            /*  Calculate the number of DMA RX channels could be assigned to port.  */
-            rx_dma_channel_assigned = i == ATM_PORT_NUMBER - 1
-                                      ? (MAX_RX_DMA_CHANNEL_NUMBER - OAM_RX_DMA_CHANNEL_NUMBER) - rx_dma_channel_base
-                                      : (ppe_dev.port[i].max_connections * (MAX_RX_DMA_CHANNEL_NUMBER - OAM_RX_DMA_CHANNEL_NUMBER) + ppe_dev.max_connections / 2) / ppe_dev.max_connections;
-            /*  Amend the number, which could be zero.  */
-            if ( rx_dma_channel_assigned == 0 )
-                rx_dma_channel_assigned = 1;
-            /*  Calculate the first DMA RX channel ID could be assigned to port.    */
-            if ( rx_dma_channel_base + rx_dma_channel_assigned > MAX_RX_DMA_CHANNEL_NUMBER - OAM_RX_DMA_CHANNEL_NUMBER )
-                rx_dma_channel_base = MAX_RX_DMA_CHANNEL_NUMBER - OAM_RX_DMA_CHANNEL_NUMBER - rx_dma_channel_assigned;
-
-            /*  first DMA RX channel ID */
-            ppe_dev.port[i].rx_dma_channel_base     = rx_dma_channel_base;
-            /*  number of DMA RX channels assigned to this port */
-            ppe_dev.port[i].rx_dma_channel_assigned = rx_dma_channel_assigned;
-            /*  OAM TX queue ID, which must be assigned after connections assigned to ports */
-            ppe_dev.port[i].oam_tx_queue            = oam_tx_queue + QSB_QUEUE_NUMBER_BASE;
-
-            rx_dma_channel_base += rx_dma_channel_assigned;
-
-            for ( j = 0; j < OAM_TX_QUEUE_NUMBER_PER_PORT; j++ )
-                /*  Since connection ID is one to one mapped to RX/TX queue ID, the connection  */
-                /*  structure must be reserved for OAM RX/TX queues, and member "port" is set   */
-                /*  according to port to which OAM TX queue is connected.                       */
-                ppe_dev.connection[oam_tx_queue++ + QSB_QUEUE_NUMBER_BASE].port = i;
-        }
-    /*  DMA RX channel assigned to OAM RX queue */
-    ppe_dev.oam_rx_dma_channel = rx_dma_channel_base;
-
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-       for ( j = 0; j < port_max_connection[i]; j++ )
-            /*  Assign DMA RX channel to RX queues. One channel could be assigned to more than one queue.   */
-            ppe_dev.connection[ppe_dev.port[i].connection_base + j].rx_dma_channel = ppe_dev.port[i].rx_dma_channel_base + j % ppe_dev.port[i].rx_dma_channel_assigned;
-#endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-
-    /*  initialize semaphore used by open and close */
-    sema_init(&ppe_dev.sem, 1);
-    /*  descriptor number of RX DMA channel */
-    ppe_dev.dma.rx_descriptor_number         = dma_rx_descriptor_length;
-    /*  descriptor number of TX DMA channel */
-    ppe_dev.dma.tx_descriptor_number         = dma_tx_descriptor_length;
-    /*  If used descriptors are more than this value, cell with CLP1 is dropped.    */
-    ppe_dev.dma.rx_clp1_desc_threshold = dma_rx_clp1_descriptor_threshold;
-
-    /*  delay on descriptor write path  */
-    ppe_dev.dma.write_descriptor_delay       = write_descriptor_delay;
-
-    /*  total DMA RX channel used   */
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    ppe_dev.dma.rx_total_channel_used = RX_DMA_CH_TOTAL;
-#else
-    ppe_dev.dma.rx_total_channel_used = rx_dma_channel_base + OAM_RX_DMA_CHANNEL_NUMBER;
-#endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    /*  total DMA TX channel used (exclude channel reserved by QSB) */
-    ppe_dev.dma.tx_total_channel_used = oam_tx_queue;
-
-    /*  allocate memory for RX descriptors  */
-    ppe_dev.dma.rx_descriptor_addr = kmalloc(ppe_dev.dma.rx_total_channel_used * ppe_dev.dma.rx_descriptor_number * sizeof(struct rx_descriptor) + 4, GFP_KERNEL | GFP_DMA);
-    if ( !ppe_dev.dma.rx_descriptor_addr )
-        goto RX_DESCRIPTOR_BASE_ALLOCATE_FAIL;
-    /*  do alignment (DWORD)    */
-    ppe_dev.dma.rx_descriptor_base = (struct rx_descriptor *)(((u32)ppe_dev.dma.rx_descriptor_addr + 0x03) & ~0x03);
-    ppe_dev.dma.rx_descriptor_base = (struct rx_descriptor *)((u32)ppe_dev.dma.rx_descriptor_base | KSEG1);    //  no cache
-
-    /*  allocate memory for TX descriptors  */
-    ppe_dev.dma.tx_descriptor_addr = kmalloc(ppe_dev.dma.tx_total_channel_used * ppe_dev.dma.tx_descriptor_number * sizeof(struct tx_descriptor) + 4, GFP_KERNEL | GFP_DMA);
-    if ( !ppe_dev.dma.tx_descriptor_addr )
-        goto TX_DESCRIPTOR_BASE_ALLOCATE_FAIL;
-    /*  do alignment (DWORD)    */
-    ppe_dev.dma.tx_descriptor_base = (struct tx_descriptor *)(((u32)ppe_dev.dma.tx_descriptor_addr + 0x03) & ~0x03);
-    ppe_dev.dma.tx_descriptor_base = (struct tx_descriptor *)((u32)ppe_dev.dma.tx_descriptor_base | KSEG1);    //  no cache
-    /*  allocate pointers to TX sk_buff */
-    ppe_dev.dma.tx_skb_pointers = kmalloc(ppe_dev.dma.tx_total_channel_used * ppe_dev.dma.tx_descriptor_number * sizeof(struct sk_buff *), GFP_KERNEL);
-    if ( !ppe_dev.dma.tx_skb_pointers )
-        goto TX_SKB_POINTER_ALLOCATE_FAIL;
-    memset(ppe_dev.dma.tx_skb_pointers, 0, ppe_dev.dma.tx_total_channel_used * ppe_dev.dma.tx_descriptor_number * sizeof(struct sk_buff *));
-
-    /*  Allocate RX sk_buff and fill up RX descriptors. */
-    rx_descriptor.datalen = ppe_dev.aal5.rx_buffer_size;
-    for ( rx_desc = ppe_dev.dma.rx_total_channel_used * ppe_dev.dma.rx_descriptor_number - 1; rx_desc >= 0; rx_desc-- )
-    {
-        struct sk_buff *skb;
-        skb = alloc_skb_rx();
-        if ( skb == NULL )
-            panic("sk buffer is used up\n");
-        rx_descriptor.dataptr = (u32)skb->data >> 2;
-        ppe_dev.dma.rx_descriptor_base[rx_desc] = rx_descriptor;
-
-    }
-
-    /*  Fill up TX descriptors. */
-    tx_descriptor.datalen = ppe_dev.aal5.tx_buffer_size;
-    for ( tx_desc = ppe_dev.dma.tx_total_channel_used * ppe_dev.dma.tx_descriptor_number - 1; tx_desc >= 0; tx_desc-- )
-        ppe_dev.dma.tx_descriptor_base[tx_desc] = tx_descriptor;
-
-    return 0;
-
-TX_SKB_POINTER_ALLOCATE_FAIL:
-    kfree(ppe_dev.dma.tx_descriptor_addr);
-TX_DESCRIPTOR_BASE_ALLOCATE_FAIL:
-    kfree(ppe_dev.dma.rx_descriptor_addr);
-RX_DESCRIPTOR_BASE_ALLOCATE_FAIL:
-    return -ENOMEM;
-}
-
-
-static inline void clear_share_buffer(void)
-{
-    volatile u32 *p = SB_RAM0_ADDR(0);
-    unsigned int i;
-
-    /*  write all zeros only    */
-    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
-        *p++ = 0;
-}
-
-
-static inline void check_parameters(void)
-{
-    int i;
-    int enabled_port_number;
-    int unassigned_queue_number;
-    int assigned_queue_number;
-
-    enabled_port_number = 0;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( port_max_connection[i] < 1 )
-            port_max_connection[i] = 0;
-        else
-            enabled_port_number++;
-    /*  If the max connection number of a port is not 0, the port is enabled  */
-    /*  and at lease two connection ID must be reserved for this port. One of */
-    /*  them is used as OAM TX path.                                          */
-    unassigned_queue_number = MAX_QUEUE_NUMBER - QSB_QUEUE_NUMBER_BASE;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( port_max_connection[i] > 0 )
-        {
-            enabled_port_number--;
-            assigned_queue_number = unassigned_queue_number - enabled_port_number * (1 + OAM_TX_QUEUE_NUMBER_PER_PORT) - OAM_TX_QUEUE_NUMBER_PER_PORT;
-            if ( assigned_queue_number > MAX_QUEUE_NUMBER_PER_PORT - OAM_TX_QUEUE_NUMBER_PER_PORT )
-                assigned_queue_number = MAX_QUEUE_NUMBER_PER_PORT - OAM_TX_QUEUE_NUMBER_PER_PORT;
-            if ( port_max_connection[i] > assigned_queue_number )
-            {
-                port_max_connection[i] = assigned_queue_number;
-                unassigned_queue_number -= assigned_queue_number;
-            }
-            else
-                unassigned_queue_number -= port_max_connection[i];
-        }
-
-    /*  Please refer to Amazon spec 15.4 for setting these values.  */
-    if ( qsb_tau < 1 )
-        qsb_tau = 1;
-    if ( qsb_tstep < 1 )
-        qsb_tstep = 1;
-    else if ( qsb_tstep > 4 )
-        qsb_tstep = 4;
-    else if ( qsb_tstep == 3 )
-        qsb_tstep = 2;
-
-    /*  There is a delay between PPE write descriptor and descriptor is       */
-    /*  really stored in memory. Host also has this delay when writing        */
-    /*  descriptor. So PPE will use this value to determine if the write      */
-    /*  operation makes effect.                                               */
-    if ( write_descriptor_delay < 0 )
-        write_descriptor_delay = 0;
-
-    if ( aal5_fill_pattern < 0 )
-        aal5_fill_pattern = 0;
-    else
-        aal5_fill_pattern &= 0xFF;
-
-    /*  Because of the limitation of length field in descriptors, the packet  */
-    /*  size could not be larger than 64K minus overhead size.                */
-    if ( aal5r_max_packet_size < 0 )
-        aal5r_max_packet_size = 0;
-    else if ( aal5r_max_packet_size >= 65536 - MAX_RX_FRAME_EXTRA_BYTES )
-        aal5r_max_packet_size = 65536 - MAX_RX_FRAME_EXTRA_BYTES;
-    if ( aal5r_min_packet_size < 0 )
-        aal5r_min_packet_size = 0;
-    else if ( aal5r_min_packet_size > aal5r_max_packet_size )
-        aal5r_min_packet_size = aal5r_max_packet_size;
-    if ( aal5s_max_packet_size < 0 )
-        aal5s_max_packet_size = 0;
-    else if ( aal5s_max_packet_size >= 65536 - MAX_TX_FRAME_EXTRA_BYTES )
-        aal5s_max_packet_size = 65536 - MAX_TX_FRAME_EXTRA_BYTES;
-    if ( aal5s_min_packet_size < 0 )
-        aal5s_min_packet_size = 0;
-    else if ( aal5s_min_packet_size > aal5s_max_packet_size )
-        aal5s_min_packet_size = aal5s_max_packet_size;
-
-    if ( dma_rx_descriptor_length < 2 )
-        dma_rx_descriptor_length = 2;
-    if ( dma_tx_descriptor_length < 2 )
-        dma_tx_descriptor_length = 2;
-    if ( dma_rx_clp1_descriptor_threshold < 0 )
-        dma_rx_clp1_descriptor_threshold = 0;
-    else if ( dma_rx_clp1_descriptor_threshold > dma_rx_descriptor_length )
-        dma_rx_clp1_descriptor_threshold = dma_rx_descriptor_length;
-}
-
-static struct atmdev_ops ppe_atm_ops = {
-    owner:      THIS_MODULE,
-    open:       ppe_open,
-    close:      ppe_close,
-    ioctl:      ppe_ioctl,
-    send:       ppe_send,
-    send_oam:   ppe_send_oam,
-    change_qos: ppe_change_qos,
-};
-
-int __init danube_ppe_init(void)
-{
-    int ret;
-    int port_num;
-
-    check_parameters();
-
-    ret = init_ppe_dev();
-    if ( ret )
-        goto INIT_PPE_DEV_FAIL;
-
-    clear_share_buffer();
-    init_rx_tables();
-    init_tx_tables();
-printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
-
-    for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ )
-        if ( ppe_dev.port[port_num].max_connections != 0 )
-        {
-            printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
-			ppe_dev.port[port_num].dev = atm_dev_register("danube_atm", &ppe_atm_ops, -1, 0UL);
-            if ( !ppe_dev.port[port_num].dev )
-            {
-                printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
-				ret = -EIO;
-                goto ATM_DEV_REGISTER_FAIL;
-            }
-            else
-            {
-                printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
-				ppe_dev.port[port_num].dev->ci_range.vpi_bits = 8;
-                ppe_dev.port[port_num].dev->ci_range.vci_bits = 16;
-                ppe_dev.port[port_num].dev->link_rate = ppe_dev.port[port_num].tx_max_cell_rate;
-                ppe_dev.port[port_num].dev->dev_data = (void*)port_num;
-            }
-        }
-    /*  register interrupt handler  */
-    ret = request_irq(IFXMIPS_PPE_MBOX_INT, mailbox_irq_handler, IRQF_DISABLED, "ppe_mailbox_isr", NULL);
-    if ( ret )
-    {
-        if ( ret == -EBUSY )
-            printk("ppe: IRQ may be occupied by ETH2 driver, please reconfig to disable it.\n");
-        goto REQUEST_IRQ_IFXMIPS_PPE_MBOX_INT_FAIL;
-    }
-    disable_irq(IFXMIPS_PPE_MBOX_INT);
-
-  #if defined(CONFIG_PCI) && defined(USE_FIX_FOR_PCI_PPE) && USE_FIX_FOR_PCI_PPE
-    ret = request_irq(PPE_MAILBOX_IGU0_INT, pci_fix_irq_handler, SA_INTERRUPT, "ppe_pci_fix_isr", NULL);
-    if ( ret )
-        printk("failed in registering mailbox 0 interrupt (pci fix)\n");
-  #endif  //  defined(CONFIG_PCI) && defined(USE_FIX_FOR_PCI_PPE) && USE_FIX_FOR_PCI_PPE
-
-    ret = pp32_start();
-    if ( ret )
-        goto PP32_START_FAIL;
-
-    qsb_global_set();
-	HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 1;
-    HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 1;
-    HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 1;
-
-    /*  create proc file    */
-    proc_file_create();
-
-    printk("ppe: ATM init succeeded (firmware version 1.1.0.2.1.13\n");
-    return 0;
-
-PP32_START_FAIL:
-
-    free_irq(IFXMIPS_PPE_MBOX_INT, NULL);
-REQUEST_IRQ_IFXMIPS_PPE_MBOX_INT_FAIL:
-ATM_DEV_REGISTER_FAIL:
-    clear_ppe_dev();
-INIT_PPE_DEV_FAIL:
-    printk("ppe: ATM init failed\n");
-    return ret;
-}
-
-void __exit danube_ppe_exit(void)
-{
-    int port_num;
-	register int l;
-	proc_file_delete();
-    HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 0;
-    HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 0;
-    HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 0;
-    /*  idle for a while to finish running HTU search   */
-    for (l = 0; l < IDLE_CYCLE_NUMBER; l++ );
-    pp32_stop();
-    free_irq(IFXMIPS_PPE_MBOX_INT, NULL);
-    for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ )
-        if ( ppe_dev.port[port_num].max_connections != 0 )
-            atm_dev_deregister(ppe_dev.port[port_num].dev);
-    clear_ppe_dev();
-}
-
-module_init(danube_ppe_init);
-module_exit(danube_ppe_exit);
-
-MODULE_LICENSE("GPL");
-

package/ifxmips-atm/src/irq.c

@@ -1,506 +0,0 @@
-#include <linux/atmdev.h>
-#include <linux/irq.h>
-
-#include "common.h"
-
-void mailbox_signal(unsigned int channel, int is_tx)
-{
-    if(is_tx)
-    {
-        while(MBOX_IGU3_ISR_ISR(channel + 16));
-        *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(channel + 16);
-    } else  {
-        while(MBOX_IGU3_ISR_ISR(channel));
-        *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(channel);
-    }
-}
-
-static int mailbox_rx_irq_handler(unsigned int channel, unsigned int *len)
-{
-    int conn;
-    int skb_base;
-    register struct rx_descriptor reg_desc;
-    struct rx_descriptor *desc;
-    struct sk_buff *skb;
-    struct atm_vcc *vcc;
-    struct rx_inband_trailer *trailer;
-
-    /*  get sk_buff pointer and descriptor  */
-    skb_base = ppe_dev.dma.rx_descriptor_number * channel + ppe_dev.dma.rx_desc_read_pos[channel];
-    desc = &ppe_dev.dma.rx_descriptor_base[skb_base];
-    reg_desc = *desc;
-    if ( reg_desc.own || !reg_desc.c )
-        return -EAGAIN;
-
-    if ( ++ppe_dev.dma.rx_desc_read_pos[channel] == ppe_dev.dma.rx_descriptor_number )
-        ppe_dev.dma.rx_desc_read_pos[channel] = 0;
-
-    skb = *(struct sk_buff **)((((u32)reg_desc.dataptr << 2) | KSEG0) - 4);
-    if ( (u32)skb <= 0x80000000 )
-    {
-        int key = 0;
-        printk("skb problem: skb = %08X, system is panic!\n", (u32)skb);
-        for ( ; !key; );
-    }
-
-    conn = reg_desc.id;
-
-    if ( conn == ppe_dev.oam_rx_queue )
-    {
-        /*  OAM */
-        struct uni_cell_header *header = (struct uni_cell_header *)skb->data;
-
-        if ( header->pti == ATM_PTI_SEGF5 || header->pti == ATM_PTI_E2EF5 )
-            conn = find_vpivci(header->vpi, header->vci);
-        else if ( header->vci == 0x03 || header->vci == 0x04 )
-            conn = find_vpi(header->vpi);
-        else
-            conn = -1;
-
-        if ( conn >= 0 && ppe_dev.connection[conn].vcc != NULL )
-        {
-            vcc = ppe_dev.connection[conn].vcc;
-            ppe_dev.connection[conn].access_time = xtime;
-            if ( vcc->push_oam != NULL )
-                vcc->push_oam(vcc, skb->data);
-        }
-
-        /*  don't need resize   */
-    }
-    else
-    {
-        if ( len )
-            *len = 0;
-
-        if ( ppe_dev.connection[conn].vcc != NULL )
-        {
-            vcc = ppe_dev.connection[conn].vcc;
-
-            if ( !reg_desc.err )
-                if ( vcc->qos.aal == ATM_AAL5 )
-                {
-                    /*  AAL5 packet */
-                    resize_skb_rx(skb, reg_desc.datalen + reg_desc.byteoff, 0);
-                    skb_reserve(skb, reg_desc.byteoff);
-                    skb_put(skb, reg_desc.datalen);
-
-                    if ( (u32)ATM_SKB(skb) <= 0x80000000 )
-                    {
-                        int key = 0;
-                        printk("ATM_SKB(skb) problem: ATM_SKB(skb) = %08X, system is panic!\n", (u32)ATM_SKB(skb));
-                        for ( ; !key; );
-                    }
-                    ATM_SKB(skb)->vcc = vcc;
-                    ppe_dev.connection[conn].access_time = xtime;
-                    if ( atm_charge(vcc, skb->truesize) )
-                    {
-                        struct sk_buff *new_skb;
-
-                        new_skb = alloc_skb_rx();
-                        if ( new_skb )
-                        {
-
-                            UPDATE_VCC_STAT(conn, rx_pdu, 1);
-
-                            ppe_dev.mib.wrx_pdu++;
-                            if ( vcc->stats )
-                                atomic_inc(&vcc->stats->rx);
-                            vcc->push(vcc, skb);
-                            {
-                                struct k_atm_aal_stats stats = *vcc->stats;
-                                int flag = 0;
-
-                                vcc->push(vcc, skb);
-                                if ( vcc->stats->rx.counter != stats.rx.counter )
-                                {
-                                    printk("vcc->stats->rx (diff) = %d", vcc->stats->rx.counter - stats.rx.counter);
-                                    flag++;
-                                }
-                                if ( vcc->stats->rx_err.counter != stats.rx_err.counter )
-                                {
-                                    printk("vcc->stats->rx_err (diff) = %d", vcc->stats->rx_err.counter - stats.rx_err.counter);
-                                    flag++;
-                                }
-                                if ( vcc->stats->rx_drop.counter != stats.rx_drop.counter )
-                                {
-                                    printk("vcc->stats->rx_drop (diff) = %d", vcc->stats->rx_drop.counter - stats.rx_drop.counter);
-                                    flag++;
-                                }
-                                if ( vcc->stats->tx.counter != stats.tx.counter )
-                                {
-                                    printk("vcc->stats->tx (diff) = %d", vcc->stats->tx.counter - stats.tx.counter);
-                                    flag++;
-                                }
-                                if ( vcc->stats->tx_err.counter != stats.tx_err.counter )
-                                {
-                                    printk("vcc->stats->tx_err (diff) = %d", vcc->stats->tx_err.counter - stats.tx_err.counter);
-                                    flag++;
-                                }
-                                if ( !flag )
-                                    printk("vcc->stats not changed");
-                            }
-                            reg_desc.dataptr = (u32)new_skb->data >> 2;
-
-                            if ( len )
-                                *len = reg_desc.datalen;
-                        }
-                        else
-                        {
-                            /*  no sk buffer    */
-                            UPDATE_VCC_STAT(conn, rx_sw_drop_pdu, 1);
-
-                            ppe_dev.mib.wrx_drop_pdu++;
-                            if ( vcc->stats )
-                                atomic_inc(&vcc->stats->rx_drop);
-
-                            resize_skb_rx(skb, ppe_dev.aal5.rx_buffer_size, 0);
-                        }
-                    }
-                    else
-                    {
-                        /*  no enough space */
-                        UPDATE_VCC_STAT(conn, rx_sw_drop_pdu, 1);
-
-                        ppe_dev.mib.wrx_drop_pdu++;
-                        if ( vcc->stats )
-                            atomic_inc(&vcc->stats->rx_drop);
-
-                        resize_skb_rx(skb, ppe_dev.aal5.rx_buffer_size, 0);
-                    }
-                }
-                else
-                {
-                    /*  AAL0 cell   */
-                    resize_skb_rx(skb, CELL_SIZE, 1);
-                    skb_put(skb, CELL_SIZE);
-
-                    ATM_SKB(skb)->vcc = vcc;
-                    ppe_dev.connection[conn].access_time = xtime;
-                    if ( atm_charge(vcc, skb->truesize) )
-                    {
-                        struct sk_buff *new_skb;
-
-                        new_skb = alloc_skb_rx();
-                        if ( new_skb )
-                        {
-                            if ( vcc->stats )
-                                atomic_inc(&vcc->stats->rx);
-                            vcc->push(vcc, skb);
-                            reg_desc.dataptr = (u32)new_skb->data >> 2;
-
-                            if ( len )
-                                *len = CELL_SIZE;
-                        }
-                        else
-                        {
-                            if ( vcc->stats )
-                                atomic_inc(&vcc->stats->rx_drop);
-                            resize_skb_rx(skb, ppe_dev.aal5.rx_buffer_size, 0);
-                        }
-                    }
-                    else
-                    {
-                        if ( vcc->stats )
-                            atomic_inc(&vcc->stats->rx_drop);
-                        resize_skb_rx(skb, ppe_dev.aal5.rx_buffer_size, 0);
-                    }
-                }
-            else
-            {
-printk("reg_desc.err\n");
-
-                /*  drop packet/cell    */
-                if ( vcc->qos.aal == ATM_AAL5 )
-                {
-                    UPDATE_VCC_STAT(conn, rx_err_pdu, 1);
-
-                    trailer = (struct rx_inband_trailer *)((u32)skb->data + ((reg_desc.byteoff + reg_desc.datalen + DMA_ALIGNMENT - 1) & ~ (DMA_ALIGNMENT - 1)));
-                    if ( trailer->stw_crc )
-                        ppe_dev.connection[conn].aal5_vcc_crc_err++;
-                    if ( trailer->stw_ovz )
-                        ppe_dev.connection[conn].aal5_vcc_oversize_sdu++;
-                }
-                if ( vcc->stats )
-                    atomic_inc(&vcc->stats->rx_err);
-                /*  don't need resize   */
-            }
-        }
-        else
-        {
-printk("ppe_dev.connection[%d].vcc == NULL\n", conn);
-
-            ppe_dev.mib.wrx_drop_pdu++;
-
-            /*  don't need resize   */
-        }
-    }
-
-    reg_desc.byteoff = 0;
-    reg_desc.datalen = ppe_dev.aal5.rx_buffer_size;
-    reg_desc.own = 1;
-    reg_desc.c   = 0;
-
-    /*  write discriptor to memory  */
-    *desc = reg_desc;
-
-printk("leave mailbox_rx_irq_handler");
-
-    return 0;
-}
-
-static inline void mailbox_tx_irq_handler(unsigned int conn)
-{
-	if ( ppe_dev.dma.tx_desc_alloc_flag[conn] )
-    {
-        int desc_base;
-        int *release_pos;
-        struct sk_buff *skb;
-
-        release_pos = &ppe_dev.dma.tx_desc_release_pos[conn];
-        desc_base = ppe_dev.dma.tx_descriptor_number * (conn - QSB_QUEUE_NUMBER_BASE) + *release_pos;
-        while ( !ppe_dev.dma.tx_descriptor_base[desc_base].own )
-        {
-            skb = ppe_dev.dma.tx_skb_pointers[desc_base];
-
-            ppe_dev.dma.tx_descriptor_base[desc_base].own = 1;  //  pretend PP32 hold owner bit, so that won't be released more than once, so allocation process don't check this bit
-
-            if ( ++*release_pos == ppe_dev.dma.tx_descriptor_number )
-                *release_pos = 0;
-
-            if ( *release_pos == ppe_dev.dma.tx_desc_alloc_pos[conn] )
-            {
-                ppe_dev.dma.tx_desc_alloc_flag[conn] = 0;
-
-		atm_free_tx_skb_vcc(skb);
-                break;
-            }
-
-            if ( *release_pos == 0 )
-                desc_base = ppe_dev.dma.tx_descriptor_number * (conn - QSB_QUEUE_NUMBER_BASE);
-            else
-                desc_base++;
-
-	    atm_free_tx_skb_vcc(skb);
-        }
-    }
-}
-
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-static inline int check_desc_valid(unsigned int channel)
-{
-    int skb_base;
-    struct rx_descriptor *desc;
-
-    skb_base = ppe_dev.dma.rx_descriptor_number * channel + ppe_dev.dma.rx_desc_read_pos[channel];
-    desc = &ppe_dev.dma.rx_descriptor_base[skb_base];
-    return !desc->own && desc->c ? 1 : 0;
-}
-#endif
-
-irqreturn_t mailbox_irq_handler(int irq, void *dev_id)
-{
-    int channel_mask;   /*  DMA channel accordant IRQ bit mask  */
-    int channel;
-    unsigned int rx_irq_number[MAX_RX_DMA_CHANNEL_NUMBER] = {0};
-    unsigned int total_rx_irq_number = 0;
-
-printk("mailbox_irq_handler");
-
-    if ( !*MBOX_IGU1_ISR )
-        return IRQ_RETVAL(1);
-
-    channel_mask = 1;
-    channel = 0;
-    while ( channel < ppe_dev.dma.rx_total_channel_used )
-    {
-        if ( (*MBOX_IGU1_ISR & channel_mask) )
-        {
-            /*  RX  */
-            /*  clear IRQ   */
-            *MBOX_IGU1_ISRC = channel_mask;
-printk("  RX: *MBOX_IGU1_ISR = 0x%08X\n", *MBOX_IGU1_ISR);
-            /*  wait for mailbox cleared    */
-            while ( (*MBOX_IGU3_ISR & channel_mask) );
-
-            /*  shadow the number of valid descriptor   */
-            rx_irq_number[channel] = WRX_DMA_CHANNEL_CONFIG(channel)->vlddes;
-
-            total_rx_irq_number += rx_irq_number[channel];
-
-printk("total_rx_irq_number = %d", total_rx_irq_number);
-printk("vlddes = %d, rx_irq_number[%d] = %d, total_rx_irq_number = %d\n", WRX_DMA_CHANNEL_CONFIG(channel)->vlddes, channel, rx_irq_number[channel], total_rx_irq_number);
-        }
-
-        channel_mask <<= 1;
-        channel++;
-    }
-
-    channel_mask = 1 << (16 + QSB_QUEUE_NUMBER_BASE);
-    channel = QSB_QUEUE_NUMBER_BASE;
-    while ( channel - QSB_QUEUE_NUMBER_BASE < ppe_dev.dma.tx_total_channel_used )
-    {
-        if ( (*MBOX_IGU1_ISR & channel_mask) )
-        {
-//            if ( channel != 1 )
-//            {
-printk("TX irq error\n");
-//                while ( 1 )
-//                {
-//                }
-//            }
-            /*  TX  */
-            /*  clear IRQ   */
-            *MBOX_IGU1_ISRC = channel_mask;
-printk("  TX: *MBOX_IGU1_ISR = 0x%08X\n", *MBOX_IGU1_ISR);
-            mailbox_tx_irq_handler(channel);
-        }
-
-        channel_mask <<= 1;
-        channel++;
-    }
-
-  #if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    channel = 0;
-    while ( total_rx_irq_number )
-    {
-        switch ( channel )
-        {
-        case RX_DMA_CH_CBR:
-        case RX_DMA_CH_OAM:
-            /*  handle it as soon as possible   */
-            while ( rx_irq_number[channel] != 0 && mailbox_rx_irq_handler(channel, NULL) == 0 )
-            {
-                rx_irq_number[channel]--;
-                total_rx_irq_number--;
-printk("RX_DMA_CH_CBR, total_rx_irq_number = %d", total_rx_irq_number);
-printk("RX_DMA_CH_CBR, total_rx_irq_number = %d, rx_irq_number[%d] = %d\n", total_rx_irq_number, channel, rx_irq_number[channel]);
-                /*  signal firmware that descriptor is updated */
-                mailbox_signal(channel, 0);
-            }
-//            if ( rx_irq_number[channel] != 0 )
-printk("RX_DMA_CH_CBR, rx_irq_number[channel] = %d", rx_irq_number[channel]);
-            break;
-        case RX_DMA_CH_VBR_RT:
-            /*  WFQ */
-            if ( rx_irq_number[RX_DMA_CH_VBR_RT] != 0
-                && (rx_irq_number[RX_DMA_CH_VBR_NRT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_NRT) || ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] < ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT])
-                && (rx_irq_number[RX_DMA_CH_AVR] == 0 || !check_desc_valid(RX_DMA_CH_AVR) || ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] < ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT])
-            )
-            {
-                unsigned int len;
-
-                if ( mailbox_rx_irq_handler(RX_DMA_CH_VBR_RT, &len) == 0 )
-                {
-                    rx_irq_number[RX_DMA_CH_VBR_RT]--;
-                    total_rx_irq_number--;
-printk("RX_DMA_CH_VBR_RT, total_rx_irq_number = %d", total_rx_irq_number);
-printk("RX_DMA_CH_VBR_RT, total_rx_irq_number = %d, rx_irq_number[%d] = %d\n", total_rx_irq_number, channel, rx_irq_number[channel]);
-                    /*  signal firmware that descriptor is updated */
-                    mailbox_signal(channel, 0);
-
-                    len = (len + CELL_SIZE - 1) / CELL_SIZE;
-                    if ( ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] <= len )
-                        ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_RT] + ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] - len;
-                }
-            }
-//            if ( rx_irq_number[channel] != 0 )
-//            {
-printk("RX_DMA_CH_VBR_RT, rx_irq_number[channel] = %d, total_rx_irq_number = %d", rx_irq_number[channel], total_rx_irq_number);
-//                rx_irq_number[channel] = 0;
-//                total_rx_irq_number = 0;
-//            }
-            break;
-        case RX_DMA_CH_VBR_NRT:
-            /*  WFQ */
-            if ( rx_irq_number[RX_DMA_CH_VBR_NRT] != 0
-                && (rx_irq_number[RX_DMA_CH_VBR_RT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_RT) || ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] < ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT])
-                && (rx_irq_number[RX_DMA_CH_AVR] == 0 || !check_desc_valid(RX_DMA_CH_AVR) || ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] < ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT])
-            )
-            {
-                unsigned int len;
-
-                if ( mailbox_rx_irq_handler(RX_DMA_CH_VBR_NRT, &len) == 0 )
-                {
-                    rx_irq_number[RX_DMA_CH_VBR_NRT]--;
-                    total_rx_irq_number--;
-printk("RX_DMA_CH_VBR_NRT, total_rx_irq_number = %d", total_rx_irq_number);
-printk("RX_DMA_CH_VBR_NRT, total_rx_irq_number = %d, rx_irq_number[%d] = %d\n", total_rx_irq_number, channel, rx_irq_number[channel]);
-                    /*  signal firmware that descriptor is updated */
-                    mailbox_signal(channel, 0);
-
-                    len = (len + CELL_SIZE - 1) / CELL_SIZE;
-                    if ( ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] <= len )
-                        ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_NRT] + ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] - len;
-                }
-            }
-//            if ( rx_irq_number[channel] != 0 )
-printk("RX_DMA_CH_VBR_NRT, rx_irq_number[channel] = %d", rx_irq_number[channel]);
-            break;
-        case RX_DMA_CH_AVR:
-            /*  WFQ */
-            if ( rx_irq_number[RX_DMA_CH_AVR] != 0
-                && (rx_irq_number[RX_DMA_CH_VBR_RT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_RT) || ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] < ppe_dev.dma.rx_weight[RX_DMA_CH_AVR])
-                && (rx_irq_number[RX_DMA_CH_VBR_NRT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_NRT) || ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] < ppe_dev.dma.rx_weight[RX_DMA_CH_AVR])
-            )
-            {
-                unsigned int len;
-
-                if ( mailbox_rx_irq_handler(RX_DMA_CH_AVR, &len) == 0 )
-                {
-                    rx_irq_number[RX_DMA_CH_AVR]--;
-                    total_rx_irq_number--;
-printk("RX_DMA_CH_AVR, total_rx_irq_number = %d", total_rx_irq_number);
-printk("RX_DMA_CH_AVR, total_rx_irq_number = %d, rx_irq_number[%d] = %d\n", total_rx_irq_number, channel, rx_irq_number[channel]);
-                    /*  signal firmware that descriptor is updated */
-                    mailbox_signal(channel, 0);
-
-                    len = (len + CELL_SIZE - 1) / CELL_SIZE;
-                    if ( ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] <= len )
-                        ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_AVR] + ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] - len;
-                }
-            }
-//            if ( rx_irq_number[channel] != 0 )
-printk("RX_DMA_CH_AVR, rx_irq_number[channel] = %d", rx_irq_number[channel]);
-            break;
-        case RX_DMA_CH_UBR:
-        default:
-            /*  Handle it when all others are handled or others are not available to handle.    */
-            if ( rx_irq_number[channel] != 0
-                && (rx_irq_number[RX_DMA_CH_VBR_RT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_RT))
-                && (rx_irq_number[RX_DMA_CH_VBR_NRT] == 0 || !check_desc_valid(RX_DMA_CH_VBR_NRT))
-                && (rx_irq_number[RX_DMA_CH_AVR] == 0 || !check_desc_valid(RX_DMA_CH_AVR)) )
-                if ( mailbox_rx_irq_handler(channel, NULL) == 0 )
-                {
-                    rx_irq_number[channel]--;
-                    total_rx_irq_number--;
-printk("RX_DMA_CH_UBR, total_rx_irq_number = %d, rx_irq_number[%d] = %d", total_rx_irq_number, channel, rx_irq_number[channel]);
-printk("RX_DMA_CH_UBR, total_rx_irq_number = %d, rx_irq_number[%d] = %d\n", total_rx_irq_number, channel, rx_irq_number[channel]);
-                    /*  signal firmware that descriptor is updated */
-                    mailbox_signal(channel, 0);
-                }
-printk("RX_DMA_CH_UBR, rx_irq_number[channel] = %d", rx_irq_number[channel]);
-        }
-
-        if ( ++channel == ppe_dev.dma.rx_total_channel_used )
-            channel = 0;
-    }
-  #else
-    channel = 0;
-    while ( total_rx_irq_number )
-    {
-        while ( rx_irq_number[channel] != 0 && mailbox_rx_irq_handler(channel, NULL) == 0 )
-        {
-            rx_irq_number[channel]--;
-            total_rx_irq_number--;
-            /*  signal firmware that descriptor is updated */
-            mailbox_signal(channel, 0);
-        }
-
-        if ( ++channel == ppe_dev.dma.rx_total_channel_used )
-            channel = 0;
-    }
-  #endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-	return IRQ_RETVAL(1);
-}
-
-

package/ifxmips-atm/src/ppe.c

@@ -1,838 +0,0 @@
-#include <asm/mach-ifxmips/cgu.h>
-#include "common.h"
-
-#include "ifx_ppe_fw.h"
-static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int connection)
-{
-
-    u32 qsb_clk = cgu_get_fpi_bus_clock(2);         /*  FPI configuration 2 (slow FPI bus) */
-	union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
-    union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
-    u32 tmp;
-
-    /*
-     *  Peak Cell Rate (PCR) Limiter
-     */
-    if ( qos->txtp.max_pcr == 0 )
-        qsb_queue_parameter_table.bit.tp = 0;   /*  disable PCR limiter */
-    else
-    {
-        /*  peak cell rate would be slightly lower than requested [maximum_rate / pcr = (qsb_clock / 8) * (time_step / 4) / pcr] */
-        tmp = ((qsb_clk * ppe_dev.qsb.tstepc) >> 5) / qos->txtp.max_pcr + 1;
-        /*  check if overflow takes place   */
-        qsb_queue_parameter_table.bit.tp = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
-    }
-    /*
-     *  Weighted Fair Queueing Factor (WFQF)
-     */
-    switch ( qos->txtp.traffic_class )
-    {
-    case ATM_CBR:
-    case ATM_VBR_RT:
-        /*  real time queue gets weighted fair queueing bypass  */
-        qsb_queue_parameter_table.bit.wfqf = 0;
-        break;
-    case ATM_VBR_NRT:
-    case ATM_UBR_PLUS:
-        /*  WFQF calculation here is based on virtual cell rates, to reduce granularity for high rates  */
-        /*  WFQF is maximum cell rate / garenteed cell rate                                             */
-        /*  wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX / requested_minimum_peak_cell_rate        */
-        if ( qos->txtp.min_pcr == 0 )
-            qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX;
-        else
-        {
-            tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX / qos->txtp.min_pcr;
-            if ( tmp == 0 )
-                qsb_queue_parameter_table.bit.wfqf = 1;
-            else if ( tmp > QSB_WFQ_NONUBR_MAX )
-                qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX;
-            else
-                qsb_queue_parameter_table.bit.wfqf = tmp;
-        }
-        break;
-    default:
-    case ATM_UBR:
-        qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_UBR_BYPASS;
-    }
-    /*
-     *  Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1
-     */
-    if ( qos->txtp.traffic_class == ATM_VBR_RT || qos->txtp.traffic_class == ATM_VBR_NRT )
-    {
-        if ( qos->txtp.scr == 0 )
-        {
-            /*  disable shaper  */
-            qsb_queue_vbr_parameter_table.bit.taus = 0;
-            qsb_queue_vbr_parameter_table.bit.ts = 0;
-        }
-        else
-        {
-            /*  Cell Loss Priority  (CLP)   */
-            if ( (vcc->atm_options & ATM_ATMOPT_CLP) )
-                /*  CLP1    */
-                qsb_queue_parameter_table.bit.vbr = 1;
-            else
-                /*  CLP0    */
-                qsb_queue_parameter_table.bit.vbr = 0;
-            /*  Rate Shaper Parameter (TS) and Burst Tolerance Parameter for SCR (tauS) */
-            tmp = ((qsb_clk * ppe_dev.qsb.tstepc) >> 5) / qos->txtp.scr + 1;
-            qsb_queue_vbr_parameter_table.bit.ts = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
-            tmp = (qos->txtp.mbs - 1) * (qsb_queue_vbr_parameter_table.bit.ts - qsb_queue_parameter_table.bit.tp) / 64;
-            if ( tmp == 0 )
-                qsb_queue_vbr_parameter_table.bit.taus = 1;
-            else if ( tmp > QSB_TAUS_MAX )
-                qsb_queue_vbr_parameter_table.bit.taus = QSB_TAUS_MAX;
-            else
-                qsb_queue_vbr_parameter_table.bit.taus = tmp;
-        }
-    }
-    else
-    {
-        qsb_queue_vbr_parameter_table.bit.taus = 0;
-        qsb_queue_vbr_parameter_table.bit.ts = 0;
-    }
-
-    /*  Queue Parameter Table (QPT) */
-    *QSB_RTM   = QSB_RTM_DM_SET(QSB_QPT_SET_MASK);
-    *QSB_RTD   = QSB_RTD_TTV_SET(qsb_queue_parameter_table.dword);
-    *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_QPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(connection);
-    /*  Queue VBR Paramter Table (QVPT) */
-    *QSB_RTM   = QSB_RTM_DM_SET(QSB_QVPT_SET_MASK);
-    *QSB_RTD   = QSB_RTD_TTV_SET(qsb_queue_vbr_parameter_table.dword);
-    *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_VBR) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(connection);
-
-}
-
-
-static inline void u64_add_u32(ppe_u64_t opt1, u32 opt2,ppe_u64_t *ret)
-{
-    ret->l = opt1.l + opt2;
-    if ( ret->l < opt1.l || ret->l < opt2 )
-        ret->h++;
-}
-
-int find_vcc(struct atm_vcc *vcc)
-{
-	int i;
-	struct connection *connection = ppe_dev.connection;
-	int max_connections = ppe_dev.port[(int)vcc->dev->dev_data].max_connections;
-	u32 occupation_table = ppe_dev.port[(int)vcc->dev->dev_data].connection_table;
-	int base = ppe_dev.port[(int)vcc->dev->dev_data].connection_base;
-	for ( i = 0; i < max_connections; i++, base++ )
-		if ( (occupation_table & (1 << i))
-			&& connection[base].vcc == vcc )
-			return base;
-	return -1;
-}
-
-int find_vpi(unsigned int vpi)
-{
-    int i, j;
-    struct connection *connection = ppe_dev.connection;
-    struct port *port;
-    int base;
-
-    port = ppe_dev.port;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++, port++ )
-    {
-        base = port->connection_base;
-        for ( j = 0; j < port->max_connections; j++, base++ )
-            if ( (port->connection_table & (1 << j))
-                && connection[base].vcc != NULL
-                && vpi == connection[base].vcc->vpi )
-                return base;
-    }
-    return -1;
-}
-
-int find_vpivci(unsigned int vpi, unsigned int vci)
-{
-    int i, j;
-    struct connection *connection = ppe_dev.connection;
-    struct port *port;
-    int base;
-
-    port = ppe_dev.port;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++, port++ )
-    {
-        base = port->connection_base;
-        for ( j = 0; j < port->max_connections; j++, base++ )
-            if ( (port->connection_table & (1 << j))
-                && connection[base].vcc != NULL
-                && vpi == connection[base].vcc->vpi
-                && vci == connection[base].vcc->vci )
-                return base;
-    }
-    return -1;
-}
-
-
-static inline void clear_htu_entry(unsigned int connection)
-{
-    HTU_ENTRY(connection - QSB_QUEUE_NUMBER_BASE + OAM_HTU_ENTRY_NUMBER)->vld = 0;
-}
-
-static inline void set_htu_entry(unsigned int vpi, unsigned int vci, unsigned int connection, int aal5)
-{
-    struct htu_entry htu_entry = {  res1:       0x00,
-                                    pid:        ppe_dev.connection[connection].port & 0x01,
-                                    vpi:        vpi,
-                                    vci:        vci,
-                                    pti:        0x00,
-                                    vld:        0x01};
-
-    struct htu_mask htu_mask = {    set:        0x03,
-                                    pid_mask:   0x02,
-                                    vpi_mask:   0x00,
-                                    vci_mask:   0x0000,
-                                    pti_mask:   0x03,   //  0xx, user data
-                                    clear:      0x00};
-
-    struct htu_result htu_result = {res1:       0x00,
-                                    cellid:     connection,
-                                    res2:       0x00,
-                                    type:       aal5 ? 0x00 : 0x01,
-                                    ven:        0x01,
-                                    res3:       0x00,
-                                    qid:        connection};
-
-    *HTU_RESULT(connection - QSB_QUEUE_NUMBER_BASE + OAM_HTU_ENTRY_NUMBER) = htu_result;
-    *HTU_MASK(connection - QSB_QUEUE_NUMBER_BASE + OAM_HTU_ENTRY_NUMBER)   = htu_mask;
-    *HTU_ENTRY(connection - QSB_QUEUE_NUMBER_BASE + OAM_HTU_ENTRY_NUMBER)  = htu_entry;
-}
-
-int alloc_tx_connection(int connection)
-{
-    unsigned long sys_flag;
-    int desc_base;
-
-    if ( ppe_dev.dma.tx_desc_alloc_pos[connection] == ppe_dev.dma.tx_desc_release_pos[connection] && ppe_dev.dma.tx_desc_alloc_flag[connection] )
-        return -1;
-
-    /*  amend descriptor pointer and allocation number  */
-    local_irq_save(sys_flag);
-    desc_base = ppe_dev.dma.tx_descriptor_number * (connection - QSB_QUEUE_NUMBER_BASE) + ppe_dev.dma.tx_desc_alloc_pos[connection];
-    if ( ++ppe_dev.dma.tx_desc_alloc_pos[connection] == ppe_dev.dma.tx_descriptor_number )
-        ppe_dev.dma.tx_desc_alloc_pos[connection] = 0;
-    ppe_dev.dma.tx_desc_alloc_flag[connection] = 1;
-    local_irq_restore(sys_flag);
-
-    return desc_base;
-}
-
-
-int ppe_open(struct atm_vcc *vcc)
-{
-    int ret;
-    struct port *port = &ppe_dev.port[(int)vcc->dev->dev_data];
-    int conn;
-    int f_enable_irq = 0;
-    int i;
-printk("%s:%s[%d] removed 2 args from signature\n", __FILE__, __func__, __LINE__);
-
-printk("ppe_open");
-
-    if ( vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0 )
-        return -EPROTONOSUPPORT;
-
-    down(&ppe_dev.sem);
-
-    /*  check bandwidth */
-    if ( (vcc->qos.txtp.traffic_class == ATM_CBR && vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate))
-      || (vcc->qos.txtp.traffic_class == ATM_VBR_RT && vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate))
-      || (vcc->qos.txtp.traffic_class == ATM_VBR_NRT && vcc->qos.txtp.pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate))
-      || (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS && vcc->qos.txtp.min_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) )
-    {
-        ret = -EINVAL;
-        goto PPE_OPEN_EXIT;
-    }
-
-    printk("alloc vpi = %d, vci = %d\n", vcc->vpi, vcc->vci);
-
-    /*  check existing vpi,vci  */
-    conn = find_vpivci(vcc->vpi, vcc->vci);
-    if ( conn >= 0 )
-    {
-        ret = -EADDRINUSE;
-        goto PPE_OPEN_EXIT;
-    }
-
-    /*  check whether it need to enable irq */
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( ppe_dev.port[i].max_connections != 0 && ppe_dev.port[i].connection_table != 0 )
-            break;
-    if ( i == ATM_PORT_NUMBER )
-        f_enable_irq = 1;
-
-    /*  allocate connection */
-    for ( i = 0, conn = port->connection_base; i < port->max_connections; i++, conn++ )
-        if ( !(port->connection_table & (1 << i)) )
-        {
-            port->connection_table |= 1 << i;
-            ppe_dev.connection[conn].vcc = vcc;
-            break;
-        }
-    if ( i == port->max_connections )
-    {
-        ret = -EINVAL;
-        goto PPE_OPEN_EXIT;
-    }
-
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    /*  assign DMA channel and setup weight value for RX QoS    */
-    switch ( vcc->qos.rxtp.traffic_class )
-    {
-    case ATM_CBR:
-        ppe_dev.connection[conn].rx_dma_channel = RX_DMA_CH_CBR;
-        break;
-    case ATM_VBR_RT:
-        ppe_dev.connection[conn].rx_dma_channel = RX_DMA_CH_VBR_RT;
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_RT] += vcc->qos.rxtp.max_pcr;
-        ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] += vcc->qos.rxtp.max_pcr;
-        break;
-    case ATM_VBR_NRT:
-        ppe_dev.connection[conn].rx_dma_channel = RX_DMA_CH_VBR_NRT;
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_NRT] += vcc->qos.rxtp.pcr;
-        ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] += vcc->qos.rxtp.pcr;
-        break;
-    case ATM_ABR:
-        ppe_dev.connection[conn].rx_dma_channel = RX_DMA_CH_AVR;
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_AVR] += vcc->qos.rxtp.min_pcr;
-        ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] += vcc->qos.rxtp.min_pcr;
-        break;
-    case ATM_UBR_PLUS:
-    default:
-        ppe_dev.connection[conn].rx_dma_channel = RX_DMA_CH_UBR;
-        break;
-    }
-
-    /*  update RX queue configuration table */
-    WRX_QUEUE_CONFIG(conn)->dmach = ppe_dev.connection[conn].rx_dma_channel;
-
-    printk("ppe_open: QID %d, DMA %d\n", conn, WRX_QUEUE_CONFIG(conn)->dmach);
-
-    printk("conn = %d, dmach = %d", conn, WRX_QUEUE_CONFIG(conn)->dmach);
-#endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-
-    /*  reserve bandwidth   */
-    switch ( vcc->qos.txtp.traffic_class )
-    {
-    case ATM_CBR:
-    case ATM_VBR_RT:
-        port->tx_current_cell_rate += vcc->qos.txtp.max_pcr;
-        break;
-    case ATM_VBR_NRT:
-        port->tx_current_cell_rate += vcc->qos.txtp.pcr;
-        break;
-    case ATM_UBR_PLUS:
-        port->tx_current_cell_rate += vcc->qos.txtp.min_pcr;
-        break;
-    }
-
-    /*  set qsb */
-    set_qsb(vcc, &vcc->qos, conn);
-
-    /*  update atm_vcc structure    */
-    vcc->itf = (int)vcc->dev->dev_data;
-
-    set_bit(ATM_VF_READY, &vcc->flags);
-
-    /*  enable irq  */
-    printk("ppe_open: enable_irq\n");
-    if ( f_enable_irq )
-        enable_irq(IFXMIPS_PPE_MBOX_INT);
-
-    /*  enable mailbox  */
-    *MBOX_IGU1_ISRC =  (1 << conn) | (1 << (conn + 16));
-    *MBOX_IGU1_IER  |= (1 << conn) | (1 << (conn + 16));
-    *MBOX_IGU3_ISRC =  (1 << conn) | (1 << (conn + 16));
-    *MBOX_IGU3_IER  |= (1 << conn) | (1 << (conn + 16));
-
-    /*  set htu entry   */
-    set_htu_entry(vcc->vpi, vcc->vci, conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0);
-
-    ret = 0;
-
-    printk("ppe_open(%d.%d): conn = %d, ppe_dev.dma = %08X\n", vcc->vpi, vcc->vci, conn, (u32)&ppe_dev.dma.rx_descriptor_number);
-
-
-PPE_OPEN_EXIT:
-    up(&ppe_dev.sem);
-
-    printk("open ATM itf = %d, vpi = %d, vci = %d, ret = %d", (int)vcc->dev->dev_data, (int)vcc->vpi, vcc->vci, ret);
-    return ret;
-}
-
-void ppe_close(struct atm_vcc *vcc)
-{
-    int conn;
-    struct port *port;
-    struct connection *connection;
-    int i;
-
-    if ( vcc == NULL )
-        return;
-
-    down(&ppe_dev.sem);
-
-    /*  get connection id   */
-    conn = find_vcc(vcc);
-    if ( conn < 0 )
-    {
-        printk("can't find vcc\n");
-        goto PPE_CLOSE_EXIT;
-    }
-    if(!((Atm_Priv *)vcc)->on)
-		goto PPE_CLOSE_EXIT;
-	connection = &ppe_dev.connection[conn];
-    port = &ppe_dev.port[connection->port];
-
-    /*  clear htu   */
-    clear_htu_entry(conn);
-
-    /*  release connection  */
-    port->connection_table &= ~(1 << (conn - port->connection_base));
-    connection->vcc = NULL;
-    connection->access_time.tv_sec = 0;
-    connection->access_time.tv_nsec = 0;
-    connection->aal5_vcc_crc_err = 0;
-    connection->aal5_vcc_oversize_sdu = 0;
-
-    /*  disable irq */
-    for ( i = 0; i < ATM_PORT_NUMBER; i++ )
-        if ( ppe_dev.port[i].max_connections != 0 && ppe_dev.port[i].connection_table != 0 )
-            break;
-    if ( i == ATM_PORT_NUMBER )
-        disable_irq(IFXMIPS_PPE_MBOX_INT);
-
-    *MBOX_IGU1_ISRC =  (1 << conn) | (1 << (conn + 16));
-
-#if defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-    /*  remove weight value from RX DMA channel */
-    switch ( vcc->qos.rxtp.traffic_class )
-    {
-    case ATM_VBR_RT:
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_RT] -= vcc->qos.rxtp.max_pcr;
-        if ( ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] > ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_RT] )
-            ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_RT] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_RT];
-        break;
-    case ATM_VBR_NRT:
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_NRT] -= vcc->qos.rxtp.pcr;
-        if ( ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] > ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_NRT] )
-            ppe_dev.dma.rx_weight[RX_DMA_CH_VBR_NRT] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_VBR_NRT];
-        break;
-    case ATM_ABR:
-        ppe_dev.dma.rx_default_weight[RX_DMA_CH_AVR] -= vcc->qos.rxtp.min_pcr;
-        if ( ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] > ppe_dev.dma.rx_default_weight[RX_DMA_CH_AVR] )
-            ppe_dev.dma.rx_weight[RX_DMA_CH_AVR] = ppe_dev.dma.rx_default_weight[RX_DMA_CH_AVR];
-        break;
-    case ATM_CBR:
-    case ATM_UBR_PLUS:
-    default:
-        break;
-    }
-#endif  //  defined(ENABLE_RX_QOS) && ENABLE_RX_QOS
-
-    /*  release bandwidth   */
-    switch ( vcc->qos.txtp.traffic_class )
-    {
-    case ATM_CBR:
-    case ATM_VBR_RT:
-        port->tx_current_cell_rate -= vcc->qos.txtp.max_pcr;
-        break;
-    case ATM_VBR_NRT:
-        port->tx_current_cell_rate -= vcc->qos.txtp.pcr;
-        break;
-    case ATM_UBR_PLUS:
-        port->tx_current_cell_rate -= vcc->qos.txtp.min_pcr;
-        break;
-    }
-
-    /*  idle for a while to let parallel operation finish   */
-    for ( i = 0; i < IDLE_CYCLE_NUMBER; i++ );
-	((Atm_Priv *)vcc)->on = 0;
-
-PPE_CLOSE_EXIT:
-    up(&ppe_dev.sem);
-}
-
-int ppe_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg)
-{
-	return -ENOTTY;
-}
-
-int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
-{
-    int ret;
-    int conn;
-    int desc_base;
-    register struct tx_descriptor reg_desc;
-    struct tx_descriptor *desc;
-
-
-printk("ppe_send");
-printk("ppe_send\n");
-printk("skb->users = %d\n", skb->users.counter);
-
-    if ( vcc == NULL || skb == NULL )
-        return -EINVAL;
-
-//    down(&ppe_dev.sem);
-
-    ATM_SKB(skb)->vcc = vcc;
-    conn = find_vcc(vcc);
-//    if ( conn != 1 )
-printk("ppe_send: conn = %d\n", conn);
-    if ( conn < 0 )
-    {
-        ret = -EINVAL;
-        goto FIND_VCC_FAIL;
-    }
-
-printk("find_vcc");
-
-    if ( vcc->qos.aal == ATM_AAL5 )
-    {
-        int byteoff;
-        int datalen;
-        struct tx_inband_header *header;
-
-    /*  allocate descriptor */
-	    desc_base = alloc_tx_connection(conn);
-	    if ( desc_base < 0 )
-	    {
-	        ret = -EIO;
-	        //goto ALLOC_TX_CONNECTION_FAIL;
-	    }
-	    desc = &ppe_dev.dma.tx_descriptor_base[desc_base];
-
-    /*  load descriptor from memory */
-	    reg_desc = *desc;
-
-        datalen = skb->len;
-        byteoff = (u32)skb->data & (DMA_ALIGNMENT - 1);
-        if ( skb_headroom(skb) < byteoff + TX_INBAND_HEADER_LENGTH )
-        {
-            struct sk_buff *new_skb;
-
-printk("skb_headroom(skb) < byteoff + TX_INBAND_HEADER_LENGTH");
-printk("skb_headroom(skb 0x%08X, skb->data 0x%08X) (%d) < byteoff (%d) + TX_INBAND_HEADER_LENGTH (%d)\n", (u32)skb, (u32)skb->data, skb_headroom(skb), byteoff, TX_INBAND_HEADER_LENGTH);
-
-            new_skb = alloc_skb_tx(datalen);
-            if ( new_skb == NULL )
-            {
-                printk("alloc_skb_tx: fail\n");
-                ret = -ENOMEM;
-                goto ALLOC_SKB_TX_FAIL;
-            }
-            ATM_SKB(new_skb)->vcc = NULL;
-            skb_put(new_skb, datalen);
-            memcpy(new_skb->data, skb->data, datalen);
-            atm_free_tx_skb_vcc(skb);
-            skb = new_skb;
-            byteoff = (u32)skb->data & (DMA_ALIGNMENT - 1);
-        }
-        else
-        {
-printk("skb_headroom(skb) >= byteoff + TX_INBAND_HEADER_LENGTH");
-        }
-printk("before skb_push, skb->data = 0x%08X", (u32)skb->data);
-        skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH);
-printk("after skb_push, skb->data = 0x%08X", (u32)skb->data);
-
-        header = (struct tx_inband_header *)(u32)skb->data;
-printk("header = 0x%08X", (u32)header);
-
-        /*  setup inband trailer    */
-        header->uu   = 0;
-        header->cpi  = 0;
-        header->pad  = ppe_dev.aal5.padding_byte;
-        header->res1 = 0;
-
-        /*  setup cell header   */
-        header->clp  = (vcc->atm_options & ATM_ATMOPT_CLP) ? 1 : 0;
-        header->pti  = ATM_PTI_US0;
-        header->vci  = vcc->vci;
-        header->vpi  = vcc->vpi;
-        header->gfc  = 0;
-
-        /*  setup descriptor    */
-        reg_desc.dataptr = (u32)skb->data >> 2;
-        reg_desc.datalen = datalen;
-        reg_desc.byteoff = byteoff;
-        reg_desc.iscell  = 0;
-
-printk("setup header, datalen = %d, byteoff = %d", reg_desc.datalen, reg_desc.byteoff);
-
-        UPDATE_VCC_STAT(conn, tx_pdu, 1);
-
-        if ( vcc->stats )
-            atomic_inc(&vcc->stats->tx);
-    }
-    else
-    {
-    /*  allocate descriptor */
-	    desc_base = alloc_tx_connection(conn);
-	    if ( desc_base < 0 )
-    {
-	        ret = -EIO;
-	        goto ALLOC_TX_CONNECTION_FAIL;
-    }
-	    desc = &ppe_dev.dma.tx_descriptor_base[desc_base];
-
-    /*  load descriptor from memory */
-	    reg_desc = *desc;
-
-        /*  if data pointer is not aligned, allocate new sk_buff    */
-        if ( ((u32)skb->data & (DMA_ALIGNMENT - 1)) )
-        {
-            struct sk_buff *new_skb;
-
-            printk("skb->data not aligned\n");
-
-            new_skb = alloc_skb_tx(skb->len);
-            if ( new_skb == NULL )
-            {
-                ret = -ENOMEM;
-                goto ALLOC_SKB_TX_FAIL;
-            }
-            ATM_SKB(new_skb)->vcc = NULL;
-            skb_put(new_skb, skb->len);
-            memcpy(new_skb->data, skb->data, skb->len);
-            atm_free_tx_skb_vcc(skb);
-            skb = new_skb;
-        }
-
-        reg_desc.dataptr = (u32)skb->data >> 2;
-        reg_desc.datalen = skb->len;
-        reg_desc.byteoff = 0;
-        reg_desc.iscell  = 1;
-
-        if ( vcc->stats )
-            atomic_inc(&vcc->stats->tx);
-    }
-
-    reg_desc.own = 1;
-    reg_desc.c = 1;
-
-printk("update descriptor send pointer, desc = 0x%08X", (u32)desc);
-
-    ppe_dev.dma.tx_skb_pointers[desc_base] = skb;
-    *desc = reg_desc;
-    dma_cache_wback((unsigned long)skb->data, skb->len);
-
-    mailbox_signal(conn, 1);
-
-printk("ppe_send: success");
-//    up(&ppe_dev.sem);
-
-    return 0;
-
-FIND_VCC_FAIL:
-    printk("FIND_VCC_FAIL\n");
-
-//    up(&ppe_dev.sem);
-    ppe_dev.mib.wtx_err_pdu++;
-    atm_free_tx_skb_vcc(skb);
-
-    return ret;
-
-ALLOC_SKB_TX_FAIL:
-    printk("ALLOC_SKB_TX_FAIL\n");
-
-//    up(&ppe_dev.sem);
-    if ( vcc->qos.aal == ATM_AAL5 )
-    {
-        UPDATE_VCC_STAT(conn, tx_err_pdu, 1);
-        ppe_dev.mib.wtx_err_pdu++;
-    }
-    if ( vcc->stats )
-        atomic_inc(&vcc->stats->tx_err);
-    atm_free_tx_skb_vcc(skb);
-
-    return ret;
-
-ALLOC_TX_CONNECTION_FAIL:
-    printk("ALLOC_TX_CONNECTION_FAIL\n");
-
-//    up(&ppe_dev.sem);
-    if ( vcc->qos.aal == ATM_AAL5 )
-    {
-        UPDATE_VCC_STAT(conn, tx_sw_drop_pdu, 1);
-        ppe_dev.mib.wtx_drop_pdu++;
-    }
-    if ( vcc->stats )
-        atomic_inc(&vcc->stats->tx_err);
-    atm_free_tx_skb_vcc(skb);
-
-    return ret;
-}
-
-int ppe_send_oam(struct atm_vcc *vcc, void *cell, int flags)
-{
-    int conn;
-    struct uni_cell_header *uni_cell_header = (struct uni_cell_header *)cell;
-    int desc_base;
-    struct sk_buff *skb;
-    register struct tx_descriptor reg_desc;
-    struct tx_descriptor *desc;
-
-printk("ppe_send_oam");
-
-    if ( ((uni_cell_header->pti == ATM_PTI_SEGF5 || uni_cell_header->pti == ATM_PTI_E2EF5)
-        && find_vpivci(uni_cell_header->vpi, uni_cell_header->vci) < 0)
-        || ((uni_cell_header->vci == 0x03 || uni_cell_header->vci == 0x04)
-        && find_vpi(uni_cell_header->vpi) < 0) )
-        return -EINVAL;
-
-#if OAM_TX_QUEUE_NUMBER_PER_PORT != 0
-    /*  get queue ID of OAM TX queue, and the TX DMA channel ID is the same as queue ID */
-    conn = ppe_dev.port[(int)vcc->dev->dev_data].oam_tx_queue;
-#else
-    /*  find queue ID   */
-    conn = find_vcc(vcc);
-    if ( conn < 0 )
-    {
-        printk("OAM not find queue\n");
-//        up(&ppe_dev.sem);
-        return -EINVAL;
-    }
-#endif  //  OAM_TX_QUEUE_NUMBER_PER_PORT != 0
-
-    /*  allocate descriptor */
-    desc_base = alloc_tx_connection(conn);
-    if ( desc_base < 0 )
-    {
-        printk("OAM not alloc tx connection\n");
-//        up(&ppe_dev.sem);
-        return -EIO;
-    }
-
-    desc = &ppe_dev.dma.tx_descriptor_base[desc_base];
-
-    /*  load descriptor from memory */
-    reg_desc = *(struct tx_descriptor *)desc;
-
-    /*  allocate sk_buff    */
-    skb = alloc_skb_tx(CELL_SIZE);
-    if ( skb == NULL )
-    {
-//        up(&ppe_dev.sem);
-        return -ENOMEM;
-    }
-#if OAM_TX_QUEUE_NUMBER_PER_PORT != 0
-    ATM_SKB(skb)->vcc = NULL;
-#else
-    ATM_SKB(skb)->vcc = vcc;
-#endif  //  OAM_TX_QUEUE_NUMBER_PER_PORT != 0
-
-    /*  copy data   */
-    skb_put(skb, CELL_SIZE);
-    memcpy(skb->data, cell, CELL_SIZE);
-
-    /*  setup descriptor    */
-    reg_desc.dataptr = (u32)skb->data >> 2;
-    reg_desc.datalen = CELL_SIZE;
-    reg_desc.byteoff = 0;
-    reg_desc.iscell  = 1;
-    reg_desc.own = 1;
-    reg_desc.c = 1;
-
-    /*  update descriptor send pointer  */
-    ppe_dev.dma.tx_skb_pointers[desc_base] = skb;
-
-    /*  write discriptor to memory and write back cache */
-    *(struct tx_descriptor *)desc = reg_desc;
-    dma_cache_wback((unsigned long)skb->data, skb->len);
-
-    /*  signal PPE  */
-    mailbox_signal(conn, 1);
-
-    return 0;
-}
-
-int ppe_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
-{
-    int conn;
-	printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
-
-    if(vcc == NULL || qos == NULL )
-        return -EINVAL;
-    conn = find_vcc(vcc);
-    if ( conn < 0 )
-        return -EINVAL;
-    set_qsb(vcc, qos, conn);
-
-	return 0;
-}
-
-static inline void init_chip(void)
-{
-    /*  enable PPE module in PMU    */
-    *(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
-
-    *EMA_CMDCFG  = (EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2);
-    *EMA_DATACFG = (EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2);
-    *EMA_IER     = 0x000000FF;
-	*EMA_CFG     = EMA_READ_BURST | (EMA_WRITE_BURST << 2);
-
-    /*  enable mailbox  */
-    *MBOX_IGU1_ISRC = 0xFFFFFFFF;
-    *MBOX_IGU1_IER  = 0x00000000;
-    *MBOX_IGU3_ISRC = 0xFFFFFFFF;
-    *MBOX_IGU3_IER  = 0x00000000;
-}
-
-int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
-{
-    u32 reg_old_value;
-    volatile u32 *dest;
-
-    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
-        || data_src == 0 || ((unsigned long)data_src & 0x03) )
-        return -EINVAL;
-
-    /*  save the old value of CDM_CFG and set PPE code memory to FPI bus access mode    */
-    reg_old_value = *CDM_CFG;
-    if ( code_dword_len <= 4096 )
-        *CDM_CFG = CDM_CFG_RAM1_SET(0x00) | CDM_CFG_RAM0_SET(0x00);
-    else
-        *CDM_CFG = CDM_CFG_RAM1_SET(0x01) | CDM_CFG_RAM0_SET(0x00);
-
-    /*  copy code   */
-    dest = CDM_CODE_MEMORY_RAM0_ADDR(0);
-    while ( code_dword_len-- > 0 )
-        *dest++ = *code_src++;
-
-    /*  copy data   */
-    dest = PP32_DATA_MEMORY_RAM1_ADDR(0);
-    while ( data_dword_len-- > 0 )
-        *dest++ = *data_src++;
-
-    return 0;
-}
-
-int pp32_start(void)
-{
-    int ret;
-    register int i;
-	init_chip();
-    /*  download firmware   */
-    ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
-    if ( ret )
-        return ret;
-
-    /*  run PP32    */
-    *PP32_DBG_CTRL = DBG_CTRL_START_SET(1);
-
-    /*  idle for a while to let PP32 init itself    */
-    for ( i = 0; i < IDLE_CYCLE_NUMBER; i++ );
-
-    return 0;
-}
-
-void pp32_stop(void)
-{
-    /*  halt PP32   */
-    *PP32_DBG_CTRL = DBG_CTRL_STOP_SET(1);
-}

package/ifxmips-atm/src/proc.c

@@ -1,98 +0,0 @@
-#include <linux/atm.h>
-#include <linux/proc_fs.h>
-
-#include "proc.h"
-#include "common.h"
-
-struct proc_dir_entry *ppe_proc_dir;
-
-int proc_read_idle_counter(char *page, char **start, off_t off, int count, int *eof, void *data)
-{
-    int len = 0;
-
-    len += sprintf(page + off,       "Channel 0\n");
-    len += sprintf(page + off + len, "  TX\n");
-    len += sprintf(page + off + len,
-		"    DREG_AT_CELL0       = %d\n", *DREG_AT_CELL0 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AT_IDLE_CNT0   = %d\n", *DREG_AT_IDLE_CNT0 & 0xFFFF);
-    len += sprintf(page + off + len, "  RX\n");
-    len += sprintf(page + off + len,
-		"    DREG_AR_CELL0       = %d\n", *DREG_AR_CELL0 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_IDLE_CNT0   = %d\n", *DREG_AR_IDLE_CNT0 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_AIIDLE_CNT0 = %d\n", *DREG_AR_AIIDLE_CNT0 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_BE_CNT0     = %d\n", *DREG_AR_BE_CNT0 & 0xFFFF);
-    len += sprintf(page + off + len, "Channel 1\n");
-    len += sprintf(page + off + len, "  TX\n");
-    len += sprintf(page + off + len,
-		"    DREG_AT_CELL1       = %d\n", *DREG_AT_CELL1 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AT_IDLE_CNT1   = %d\n", *DREG_AT_IDLE_CNT1 & 0xFFFF);
-    len += sprintf(page + off + len, "  RX\n");
-    len += sprintf(page + off + len,
-		"    DREG_AR_CELL1       = %d\n", *DREG_AR_CELL1 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_IDLE_CNT1   = %d\n", *DREG_AR_IDLE_CNT1 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_AIIDLE_CNT1 = %d\n", *DREG_AR_AIIDLE_CNT1 & 0xFFFF);
-    len += sprintf(page + off + len,
-		"    DREG_AR_BE_CNT1     = %d\n", *DREG_AR_BE_CNT1 & 0xFFFF);
-
-    return len;
-}
-
-int proc_read_stats(char *page, char **start, off_t off, int count, int *eof, void *data)
-{
-    int len = 0;
-
-    int i, j;
-    struct connection *connection;
-    struct port *port;
-    int base;
-
-    len += sprintf(page + off, "ATM Stats:\n");
-
-    connection = ppe_dev.connection;
-    port = ppe_dev.port;
-    for ( i = 0; i < ATM_PORT_NUMBER; i++, port++ )
-    {
-        base = port->connection_base;
-        for ( j = 0; j < port->max_connections; j++, base++ )
-            if ( (port->connection_table & (1 << j))
-                && connection[base].vcc != NULL )
-            {
-                if ( connection[base].vcc->stats )
-                {
-                    struct k_atm_aal_stats *stats = connection[base].vcc->stats;
-
-                    len += sprintf(page + off + len, "  VCC %d.%d.%d (stats)\n", i, connection[base].vcc->vpi, connection[base].vcc->vci);
-                    len += sprintf(page + off + len, "    rx      = %d\n", stats->rx.counter);
-                    len += sprintf(page + off + len, "    rx_err  = %d\n", stats->rx_err.counter);
-                    len += sprintf(page + off + len, "    rx_drop = %d\n", stats->rx_drop.counter);
-                    len += sprintf(page + off + len, "    tx      = %d\n", stats->tx.counter);
-                    len += sprintf(page + off + len, "    tx_err  = %d\n", stats->tx_err.counter);
-                }
-                else
-                    len += sprintf(page + off + len, "  VCC %d.%d.%d\n", i, connection[base].vcc->vpi, connection[base].vcc->vci);
-            }
-    }
-
-    return len;
-}
-
-void proc_file_create(void)
-{
-    ppe_proc_dir = proc_mkdir("ppe", NULL);
-	create_proc_read_entry("idle_counter", 0, ppe_proc_dir, proc_read_idle_counter, NULL);
-    create_proc_read_entry("stats", 0, ppe_proc_dir, proc_read_stats, NULL);
-}
-
-void proc_file_delete(void)
-{
-    remove_proc_entry("idle_counter", ppe_proc_dir);
-    remove_proc_entry("stats", ppe_proc_dir);
-    remove_proc_entry("ppe", NULL);
-}

package/ifxmips-atm/src/proc.h

@@ -1,9 +0,0 @@
-#ifndef _IFXMIPS_PPE_PROC_H__
-#define _IFXMIPS_PPE_PROC_H__
-
-void proc_file_create(void);
-void proc_file_delete(void);
-int proc_read_idle_counter(char *page, char **start, off_t off, int count, int *eof, void *data);
-int proc_read_stats(char *page, char **start, off_t off, int count, int *eof, void *data);
-
-#endif

package/ifxmips-atm/src/skb.c

@@ -1,128 +0,0 @@
-#include <linux/skbuff.h>
-
-#include "common.h"
-
-void resize_skb_rx(struct sk_buff *skb, unsigned int size, int is_cell)
-{
-    if((u32)skb < 0x80000000)
-    {
-        int key = 0;
-        printk("resize_skb_rx problem: skb = %08X, size = %d, is_cell = %d\n", (u32)skb, size, is_cell);
-        while(!key){}
-    }
-    skb->data = (unsigned char*)(((u32)skb->head + 16 + (DMA_ALIGNMENT - 1)) & ~(DMA_ALIGNMENT - 1));
-    skb->tail = skb->data;
-
-    /*  Set up other state  */
-    skb->len = 0;
-    skb->cloned = 0;
-#if defined(CONFIG_IMQ) || defined (CONFIG_IMQ_MODULE)
-    skb->imq_flags = 0;
-    skb->nf_info = NULL;
-#endif
-    skb->data_len = 0;
-}
-
-struct sk_buff* alloc_skb_rx(void)
-{
-    struct sk_buff *skb;
-
-    /*  allocate memroy including trailer and padding   */
-    skb = dev_alloc_skb(ppe_dev.aal5.rx_buffer_size + DMA_ALIGNMENT);
-    if (skb)
-    {
-        /*  must be burst length alignment  */
-        if ( ((u32)skb->data & (DMA_ALIGNMENT - 1)) != 0 )
-            skb_reserve(skb, ~((u32)skb->data + (DMA_ALIGNMENT - 1)) & (DMA_ALIGNMENT - 1));
-        /*  put skb in reserved area "skb->data - 4"    */
-        *((u32*)skb->data - 1) = (u32)skb;
-        /*  invalidate cache    */
-        dma_cache_inv((unsigned long)skb->head, (u32)skb->end - (u32)skb->head);
-    }
-    return skb;
-}
-
-void atm_free_tx_skb_vcc(struct sk_buff *skb)
-{
-    struct atm_vcc* vcc;
-
-    if ( (u32)skb <= 0x80000000 )
-    {
-        volatile int key = 0;
-        printk("atm_free_tx_skb_vcc: skb = %08X\n", (u32)skb);
-        for ( ; !key; );
-    }
-
-    vcc = ATM_SKB(skb)->vcc;
-    if ( vcc != NULL && vcc->pop != NULL )
-    {
-        if ( atomic_read(&skb->users) == 0 )
-        {
-            volatile int key = 0;
-            printk("atm_free_tx_skb_vcc(vcc->pop): skb->users == 0, skb = %08X\n", (u32)skb);
-            for ( ; !key; );
-        }
-        vcc->pop(vcc, skb);
-    }
-    else
-    {
-        if ( atomic_read(&skb->users) == 0 )
-        {
-            volatile int key = 0;
-            printk("atm_free_tx_skb_vcc(dev_kfree_skb_any): skb->users == 0, skb = %08X\n", (u32)skb);
-            for ( ; !key; );
-        }
-        dev_kfree_skb_any(skb);
-    }
-}
-
-struct sk_buff* alloc_skb_tx(unsigned int size)
-{
-    struct sk_buff *skb;
-
-    /*  allocate memory including header and padding    */
-    size += TX_INBAND_HEADER_LENGTH + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES;
-    size &= ~(DMA_ALIGNMENT - 1);
-    skb = dev_alloc_skb(size + DMA_ALIGNMENT);
-    /*  must be burst length alignment  */
-    if ( skb )
-        skb_reserve(skb, (~((u32)skb->data + (DMA_ALIGNMENT - 1)) & (DMA_ALIGNMENT - 1)) + TX_INBAND_HEADER_LENGTH);
-    return skb;
-}
-
-struct sk_buff* atm_alloc_tx(struct atm_vcc *vcc, unsigned int size)
-{
-    int conn;
-    struct sk_buff *skb;
-
-    /*  oversize packet */
-    if ( ((size + TX_INBAND_HEADER_LENGTH + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES) & ~(DMA_ALIGNMENT - 1))  > ppe_dev.aal5.tx_max_packet_size )
-    {
-        printk("atm_alloc_tx: oversize packet\n");
-        return NULL;
-    }
-    /*  send buffer overflow    */
-    if ( atomic_read(&vcc->sk.sk_wmem_alloc) && !atm_may_send(vcc, size) )
-    {
-        printk("atm_alloc_tx: send buffer overflow\n");
-        return NULL;
-    }
-    conn = find_vcc(vcc);
-    if ( conn < 0 )
-    {
-        printk("atm_alloc_tx: unknown VCC\n");
-        return NULL;
-    }
-
-    skb = dev_alloc_skb(size);
-    if ( skb == NULL )
-    {
-        printk("atm_alloc_tx: sk buffer is used up\n");
-        return NULL;
-    }
-#define ATM_PDU_OVHD 0
-    atomic_add(skb->truesize + ATM_PDU_OVHD, &vcc->sk.sk_wmem_alloc);
-
-    return skb;
-}
-

package/ifxmips-dsl-api/Config.in

@@ -0,0 +1,18 @@
+choice
+	prompt "Firmware"
+	depends on PACKAGE_kmod-ifxmips-dsl-api
+	default IFXMIPS_ANNEX_B
+	help
+	  This option controls which firmware is loaded
+
+config IFXMIPS_ANNEX_A
+	bool "Annex-A"
+	help
+	  Annex-A
+
+config IFXMIPS_ANNEX_B
+	bool "Annex-B"
+	help
+	  Annex-B
+
+endchoice

package/ifxmips-dsl-api/Makefile

@@ -0,0 +1,141 @@
+#
+# Copyright (C) 2009 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+# ralph / blogic
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=ifxmips-dsl-api
+PKG_BASE_NAME:=drv_dsl_cpe_api_danube
+PKG_VERSION:=3.24.4.4
+PKG_SOURCE:=$(PKG_BASE_NAME)-$(PKG_VERSION).tar.gz
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/drv_dsl_cpe_api-$(PKG_VERSION)
+PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
+PKG_MD5SUM:=c45bc531c1ed2ac80f68fb986b63bb87
+
+FW_BASE_NAME:=dsl_danube_firmware_adsl
+FW_A_VER:=02.04.04.00.00.01
+FW_B_VER:=02.04.01.07.00.02
+FW_A_FILE_VER:=244001
+FW_B_FILE_VER:=241702
+FW_A_MD5:=f717db3067a0049a26e233ab11238710
+FW_B_MD5:=349de7cd20368f4ac9b7e8322114a512
+
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/ifxmips-dsl-api
+  SECTION:=sys
+  CATEGORY:=Kernel modules
+  SUBMENU:=Network Devices
+  TITLE:=DSL CPE API driver
+  URL:=http://www.infineon.com/
+  MAINTAINER:=Infineon Technologies AG / Lantiq / blogic@openwrt.org
+  DEPENDS:=@TARGET_ifxmips
+  FILES:=$(PKG_BUILD_DIR)/src/mei/ifxmips_mei.$(LINUX_KMOD_SUFFIX) \
+	$(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.$(LINUX_KMOD_SUFFIX) \
+	$(PKG_BUILD_DIR)/src/mei/ifxmips_atm.$(LINUX_KMOD_SUFFIX)
+  AUTOLOAD:=$(call AutoLoad,50,ifxmips_mei drv_dsl_cpe_api ifxmips_atm)
+endef
+
+define KernelPackage/ifxmips-dsl-api/description
+	Infineon DSL CPE API for Amazon SE, Danube and Vinax.
+
+	This package contains the DSL CPE API driver for Amazon SE & Danube.
+	
+	Supported Devices:
+		- Amazon SE
+		- Danube 
+
+	This package was kindly contributed to openwrt by Infineon/Lantiq
+endef
+
+define KernelPackage/ifxmips-dsl-api/config
+	source "$(SOURCE)/Config.in"
+endef
+
+define Download/annex-a
+	FILE:=$(FW_BASE_NAME)_a-$(FW_A_VER).tar.gz
+	URL:=http://mirror2.openwrt.org/sources/
+	MD5SUM:=$(FW_A_MD5)
+endef
+$(eval $(call Download,annex-a))
+
+define Download/annex-b
+	FILE:=$(FW_BASE_NAME)_b-$(FW_B_VER).tar.gz
+	URL:=http://mirror2.openwrt.org/sources/
+	MD5SUM:=$(FW_B_MD5)
+endef
+$(eval $(call Download,annex-b))
+
+IFX_DSL_MAX_DEVICE=1
+IFX_DSL_LINES_PER_DEVICE=1
+IFX_DSL_CHANNELS_PER_LINE=1
+
+CONFIGURE_ARGS += --enable-kernel-include="$(LINUX_DIR)/include" \
+	--with-max-device="$(IFX_DSL_MAX_DEVICE)" \
+	--with-lines-per-device="$(IFX_DSL_LINES_PER_DEVICE)" \
+	--with-channels-per-line="$(IFX_DSL_CHANNELS_PER_LINE)" \
+	--enable-danube \
+	--enable-add-drv-cflags="-DMODULE" \
+	--enable-debug=yes \
+	--enable-debug-prints=yes \
+	--disable-dsl-delt-static \
+	--disable-adsl-led \
+	--enable-dsl-ceoc \
+	--enable-dsl-pm \
+	--enable-dsl-pm-total \
+	--enable-dsl-pm-history \
+	--enable-dsl-pm-showtime \
+	--enable-dsl-pm-channel-counters \
+	--enable-dsl-pm-datapath-counters \
+	--enable-dsl-pm-line-counters \
+	--enable-dsl-pm-channel-thresholds \
+	--enable-dsl-pm-datapath-thresholds \
+	--enable-dsl-pm-line-thresholds \
+	--enable-dsl-pm-optional-parameters \
+	--enable-linux-26 \
+	--enable-kernelbuild="$(LINUX_DIR)" \
+	ARCH=$(LINUX_KARCH)
+
+EXTRA_CFLAGS = -fno-pic -mno-abicalls -mlong-calls -G 0
+
+define Build/Prepare
+	$(PKG_UNPACK)
+	$(INSTALL_DIR) $(PKG_BUILD_DIR)/src/mei/ 
+	$(CP) ./src/* $(PKG_BUILD_DIR)/src/mei/
+	$(Build/Patch)
+	$(TAR) -C $(PKG_BUILD_DIR) -xzf $(DL_DIR)/$(FW_BASE_NAME)_a-$(FW_A_VER).tar.gz
+	$(TAR) -C $(PKG_BUILD_DIR) -xzf $(DL_DIR)/$(FW_BASE_NAME)_b-$(FW_B_VER).tar.gz
+endef
+
+define Build/Compile
+	cd $(LINUX_DIR); \
+		ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \
+		$(MAKE) M=$(PKG_BUILD_DIR)/src/mei/ V=1 modules
+	$(call Build/Compile/Default)
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_ioctl.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib_ioctl.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_g997.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_types.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_pm.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_error.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_danube_ctx.h $(1)/usr/include
+	$(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_cmv_danube.h $(1)/usr/include
+endef
+
+define KernelPackage/ifxmips-dsl-api/install
+	$(INSTALL_DIR) $(1)/lib/firmware/
+	$(CP) $(PKG_BUILD_DIR)/$(FW_BASE_NAME)_$(if $(CONFIG_IFXMIPS_ANNEX_A),a_$(FW_A_FILE_VER),b_$(FW_B_FILE_VER)).bin $(1)/lib/firmware/ModemHWE.bin
+endef
+
+$(eval $(call KernelPackage,ifxmips-dsl-api))

package/ifxmips-dsl-api/patches/100-dsl_compat.patch

@@ -0,0 +1,43 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_device_danube.h	2009-05-12 20:02:16.000000000 +0200
++++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h	2009-11-01 00:57:23.000000000 +0100
+@@ -24,7 +24,7 @@
+    #include "drv_dsl_cpe_simulator_danube.h"
+ #else
+ /* Include for the low level driver interface header file */
+-#include "asm/ifx/ifx_mei_bsp.h"
++#include "mei/ifxmips_mei_interface.h"
+ #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/
+ 
+ #define DSL_MAX_LINE_NUMBER 1
+Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c	2009-11-01 01:00:08.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c	2009-11-01 01:03:51.000000000 +0100
+@@ -11,6 +11,7 @@
+ #ifdef __LINUX__
+ 
+ #define DSL_INTERN
++#include <linux/device.h>
+ 
+ #include "drv_dsl_cpe_api.h"
+ #include "drv_dsl_cpe_api_ioctl.h"
+@@ -1058,6 +1059,7 @@
+ /* Entry point of driver */
+ int __init DSL_ModuleInit(void)
+ {
++   struct class *dsl_class;
+    DSL_int_t i;
+ 
+    printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF,
+@@ -1104,7 +1106,8 @@
+    }
+ 
+    DSL_DRV_DevNodeInit();
+-
++   dsl_class = class_create(THIS_MODULE, "dsl_cpe_api");
++   device_create(dsl_class, NULL, MKDEV(DRV_DSL_CPE_API_DEV_MAJOR, 0), NULL, "dsl_cpe_api");
+    return 0;
+ }
+ 

package/ifxmips-dsl-api/patches/200-mei_compat.patch

@@ -0,0 +1,95 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c	2009-10-31 23:30:20.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c	2009-11-01 04:41:58.000000000 +0100
+@@ -41,18 +41,19 @@
+ #include <linux/init.h>
+ #include <linux/ioport.h>
+ #include <linux/delay.h>
++#include <linux/device.h>
+ #include <asm/uaccess.h>
+ #include <asm/hardirq.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/irq.h>
+-#include <asm/ifx/ifx_gpio.h>
+-//#include <asm/ifx/ifx_led.h>
+-#include <asm/ifx/ifx_pmu.h>
+-#include <asm/ifx/ifx_atm.h>
++
++#include <ifxmips.h>
++#include <ifxmips_irq.h>
++#include <ifxmips_gpio.h>
++#include <ifxmips_pmu.h>
++#include "ifxmips_atm.h"
+ #define IFX_MEI_BSP
+ #include "ifxmips_mei_interface.h"
+ 
+-#define IFXMIPS_RCU_RST                   IFX_RCU_RST_REQ
++/*#define IFXMIPS_RCU_RST                   IFX_RCU_RST_REQ
+ #define IFXMIPS_RCU_RST_REQ_ARC_JTAG      IFX_RCU_RST_REQ_ARC_JTAG
+ #define IFXMIPS_RCU_RST_REQ_DFE		  IFX_RCU_RST_REQ_DFE
+ #define IFXMIPS_RCU_RST_REQ_AFE		  IFX_RCU_RST_REQ_AFE
+@@ -76,7 +77,7 @@
+ #define ifxmips_r32(reg)                        __raw_readl(reg)
+ #define ifxmips_w32(val, reg)                   __raw_writel(val, reg)
+ #define ifxmips_w32_mask(clear, set, reg)       ifxmips_w32((ifxmips_r32(reg) & ~clear) | set, reg)
+-
++*/
+ #define IFX_MEI_EMSG(fmt, args...) printk(KERN_ERR  "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
+ #define IFX_MEI_DMSG(fmt, args...) printk(KERN_INFO "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
+ 
+@@ -173,7 +174,8 @@
+ extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
+ #define MEI_MASK_AND_ACK_IRQ ifxmips_mask_and_ack_irq
+ 
+-static int dev_major = 105;
++#define MEI_MAJOR	105
++static int dev_major = MEI_MAJOR;
+ 
+ static struct file_operations bsp_mei_operations = {
+       owner:THIS_MODULE,
+@@ -2294,10 +2296,10 @@
+ 		IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DFEIR]);
+ 		return -1;
+ 	}
+-	if (request_irq (pDev->nIrq[IFX_DYING_GASP], IFX_MEI_Dying_Gasp_IrqHandle, 0, "DYING_GASP", pDev) != 0) {
++	/*if (request_irq (pDev->nIrq[IFX_DYING_GASP], IFX_MEI_Dying_Gasp_IrqHandle, 0, "DYING_GASP", pDev) != 0) {
+ 		IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DYING_GASP]);
+ 		return -1;
+-	}
++	}*/
+ //	IFX_MEI_DMSG("Device %d initialized. IER %#x\n", num, bsp_get_irq_ier(pDev->nIrq[IFX_DYING_GASP]));
+ 	return 0;
+ }
+@@ -2922,6 +2924,7 @@
+ IFX_MEI_ModuleInit (void)
+ {
+ 	int i = 0;
++	static struct class *dsl_class;
+ 
+ 	printk ("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision);
+ 
+@@ -2935,14 +2938,15 @@
+ 		IFX_MEI_InitProcFS (i);
+ #endif
+ 	}
+-        for (i = 0; i <= DSL_BSP_CB_LAST ; i++)
++		for (i = 0; i <= DSL_BSP_CB_LAST ; i++)
+ 		dsl_bsp_event_callback[i].function = NULL;
+ 
+ #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK
+ 	printk(KERN_INFO "[%s %s %d]: Start loopback test...\n", __FILE__, __func__, __LINE__);
+ 	DFE_Loopback_Test ();
+ #endif
+-
++	dsl_class = class_create(THIS_MODULE, "ifx_mei");
++	device_create(dsl_class, NULL, MKDEV(MEI_MAJOR, 0), NULL, "ifx_mei");
+ 	return 0;
+ }
+ 
+@@ -2996,3 +3000,5 @@
+ 
+ module_init (IFX_MEI_ModuleInit);
+ module_exit (IFX_MEI_ModuleExit);
++
++MODULE_LICENSE("Dual BSD/GPL");

package/ifxmips-dsl-api/patches/300-atm_compat.patch

@@ -0,0 +1,168 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c	2009-11-01 14:29:05.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c	2009-11-01 16:07:46.000000000 +0100
+@@ -58,9 +58,8 @@
+ /*
+  *  Chip Specific Head File
+  */
+-#include <asm/ifx/ifx_types.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/common_routines.h>
++#include <ifxmips.h>
++#include <ifxmips_cgu.h>
+ #include "ifxmips_atm_core.h"
+ 
+ 
+@@ -1146,7 +1145,7 @@
+ 
+ static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue)
+ {
+-    unsigned int qsb_clk = ifx_get_fpi_hz();
++    unsigned int qsb_clk = ifxmips_get_fpi_hz();
+     unsigned int qsb_qid = queue + FIRST_QSB_QID;
+     union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
+     union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
+@@ -1318,7 +1317,7 @@
+ 
+ static void qsb_global_set(void)
+ {
+-    unsigned int qsb_clk = ifx_get_fpi_hz();
++    unsigned int qsb_clk = ifxmips_get_fpi_hz();
+     int i;
+     unsigned int tmp1, tmp2, tmp3;
+ 
+@@ -2505,3 +2504,4 @@
+ 
+ module_init(ifx_atm_init);
+ module_exit(ifx_atm_exit);
++MODULE_LICENSE("Dual BSD/GPL");
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_common.h	2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h	2009-11-01 15:58:50.000000000 +0100
+@@ -1,9 +1,10 @@
+ #ifndef IFXMIPS_ATM_PPE_COMMON_H
+ #define IFXMIPS_ATM_PPE_COMMON_H
+ 
+-
+-
+-#if defined(CONFIG_DANUBE)
++#if defined(CONFIG_IFXMIPS)
++  #include "ifxmips_atm_ppe_danube.h"
++  #define CONFIG_DANUBE
++#elif defined(CONFIG_DANUBE) 
+   #include "ifxmips_atm_ppe_danube.h"
+ #elif defined(CONFIG_AMAZON_SE)
+   #include "ifxmips_atm_ppe_amazon_se.h"
+@@ -16,7 +17,6 @@
+ #endif
+ 
+ 
+-
+ /*
+  *  Code/Data Memory (CDM) Interface Configuration Register
+  */
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.h	2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h	2009-11-01 15:58:50.000000000 +0100
+@@ -25,8 +25,8 @@
+ #define IFXMIPS_ATM_CORE_H
+ 
+ 
+-
+-#include <asm/ifx/ifx_atm.h>
++#include "ifxmips_compat.h"
++#include "ifx_atm.h"
+ #include "ifxmips_atm_ppe_common.h"
+ #include "ifxmips_atm_fw_regs_common.h"
+ 
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h	2009-11-01 15:58:50.000000000 +0100
+@@ -0,0 +1,43 @@
++#ifndef _IFXMIPS_COMPAT_H__
++#define _IFXMIPS_COMPAT_H__
++
++#define	IFX_SUCCESS	0
++#define IFX_ERROR	(-1)
++
++#define ATM_VBR_NRT     ATM_VBR
++#define ATM_VBR_RT      6
++#define ATM_UBR_PLUS    7
++#define ATM_GFR         8
++
++#define NUM_ENTITY(x)	(sizeof(x) / sizeof(*(x)))
++
++#define SET_BITS(x, msb, lsb, value)	\
++    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
++
++
++#define IFX_PMU_ENABLE    1
++#define IFX_PMU_DISABLE   0
++
++#define IFX_PMU_MODULE_DSL_DFE    (1 << 9)
++#define IFX_PMU_MODULE_AHBS		  (1 << 13)
++#define IFX_PMU_MODULE_PPE_QSB    (1 << 18)
++#define IFX_PMU_MODULE_PPE_SLL01  (1 << 19)
++#define IFX_PMU_MODULE_PPE_TC     (1 << 21)
++#define IFX_PMU_MODULE_PPE_EMA    (1 << 22)
++#define IFX_PMU_MODULE_PPE_TOP    (1 << 29)
++
++#define ifx_pmu_set(a,b)	{if(a == IFX_PMU_ENABLE) ifxmips_pmu_enable(b); else ifxmips_pmu_disable(b);}
++
++#define PPE_TOP_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))
++#define PPE_SLL01_PMU_SETUP(__x)  ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x))
++#define PPE_TC_PMU_SETUP(__x)     ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x))
++#define PPE_EMA_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x))
++#define PPE_QSB_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x))
++#define PPE_TPE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x))
++#define DSL_DFE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x))
++
++#define IFX_REG_W32(_v, _r)               __raw_writel((_v), (_r))
++
++#define CONFIG_IFXMIPS_DSL_CPE_MEI	y
++
++#endif
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_danube.h	2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h	2009-11-01 15:58:50.000000000 +0100
+@@ -1,7 +1,7 @@
+ #ifndef IFXMIPS_ATM_PPE_DANUBE_H
+ #define IFXMIPS_ATM_PPE_DANUBE_H
+ 
+-
++#include <ifxmips_irq.h>
+ 
+ /*
+  *  FPI Configuration Bus Register and Memory Address Mapping
+@@ -93,7 +93,7 @@
+ /*
+  *  Mailbox IGU1 Interrupt
+  */
+-#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
++#define PPE_MAILBOX_IGU1_INT            IFXMIPS_PPE_MBOX_INT
+ 
+ 
+ 
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_danube.c	2009-11-01 14:29:18.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c	2009-11-01 15:58:50.000000000 +0100
+@@ -45,10 +45,9 @@
+ /*
+  *  Chip Specific Head File
+  */
+-#include <asm/ifx/ifx_types.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/common_routines.h>
+-#include <asm/ifx/ifx_pmu.h>
++#include <ifxmips.h>
++#include <ifxmips_pmu.h>
++#include "ifxmips_compat.h"
+ #include "ifxmips_atm_core.h"
+ #include "ifxmips_atm_fw_danube.h"
+ 

package/ifxmips-dsl-api/src/Makefile

@@ -0,0 +1,3 @@
+obj-m = ifxmips_mei.o ifxmips_atm.o
+
+ifxmips_atm-objs := ifxmips_atm_core.o ifxmips_atm_danube.o

package/ifxmips-dsl-api/src/ifx_atm.h

@@ -0,0 +1,172 @@
+/******************************************************************************
+**
+** FILE NAME    : ifx_atm.h
+** PROJECT      : UEIP
+** MODULES      : ATM
+**
+** DATE         : 17 Jun 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : Global ATM driver header file
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFX_ATM_H
+#define IFX_ATM_H
+
+
+
+/*!
+  \defgroup IFX_ATM UEIP Project - ATM driver module
+  \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
+ */
+
+/*!
+  \defgroup IFX_ATM_IOCTL IOCTL Commands
+  \ingroup IFX_ATM
+  \brief IOCTL Commands used by user application.
+ */
+
+/*!
+  \defgroup IFX_ATM_STRUCT Structures
+  \ingroup IFX_ATM
+  \brief Structures used by user application.
+ */
+
+/*!
+  \file ifx_atm.h
+  \ingroup IFX_ATM
+  \brief ATM driver header file
+ */
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*!
+  \addtogroup IFX_ATM_STRUCT
+ */
+/*@{*/
+
+/*
+ *  ATM MIB
+ */
+
+typedef struct {
+	__u32	ifHCInOctets_h;     /*!< byte counter of ingress cells (upper 32 bits, total 64 bits)   */
+	__u32	ifHCInOctets_l;     /*!< byte counter of ingress cells (lower 32 bits, total 64 bits)   */
+	__u32	ifHCOutOctets_h;    /*!< byte counter of egress cells (upper 32 bits, total 64 bits)    */
+	__u32	ifHCOutOctets_l;    /*!< byte counter of egress cells (lower 32 bits, total 64 bits)    */
+	__u32	ifInErrors;         /*!< counter of error ingress cells     */
+	__u32	ifInUnknownProtos;  /*!< counter of unknown ingress cells   */
+	__u32	ifOutErrors;        /*!< counter of error egress cells      */
+} atm_cell_ifEntry_t;
+
+typedef struct {
+	__u32	ifHCInOctets_h;     /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
+	__u32	ifHCInOctets_l;     /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
+	__u32	ifHCOutOctets_h;    /*!< byte counter of egress packets (upper 32 bits, total 64 bits)  */
+	__u32	ifHCOutOctets_l;    /*!< byte counter of egress packets (lower 32 bits, total 64 bits)  */
+	__u32	ifInUcastPkts;      /*!< counter of ingress packets         */
+	__u32	ifOutUcastPkts;     /*!< counter of egress packets          */
+	__u32	ifInErrors;         /*!< counter of error ingress packets   */
+	__u32	ifInDiscards;       /*!< counter of dropped ingress packets */
+	__u32	ifOutErros;         /*!< counter of error egress packets    */
+	__u32	ifOutDiscards;      /*!< counter of dropped egress packets  */
+} atm_aal5_ifEntry_t;
+
+typedef struct {
+	__u32	aal5VccCrcErrors;       /*!< counter of ingress packets with CRC error  */
+	__u32	aal5VccSarTimeOuts;     /*!< counter of ingress packets with Re-assemble timeout    */  //no timer support yet
+	__u32	aal5VccOverSizedSDUs;   /*!< counter of oversized ingress packets       */
+} atm_aal5_vcc_t;
+
+typedef struct {
+	int             vpi;        /*!< VPI of the VCC to get MIB counters */
+	int             vci;        /*!< VCI of the VCC to get MIB counters */
+	atm_aal5_vcc_t  mib_vcc;    /*!< structure to get MIB counters      */
+} atm_aal5_vcc_x_t;
+
+/*@}*/
+
+
+
+/*
+ * ####################################
+ *                IOCTL
+ * ####################################
+ */
+
+/*!
+  \addtogroup IFX_ATM_IOCTL
+ */
+/*@{*/
+
+/*
+ *  ioctl Command
+ */
+/*!
+  \brief ATM IOCTL Magic Number
+ */
+#define PPE_ATM_IOC_MAGIC       'o'
+/*!
+  \brief ATM IOCTL Command - Get Cell Level MIB Counters
+
+   This command is obsolete. User can get cell level MIB from DSL API.
+   This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
+ */
+#define PPE_ATM_MIB_CELL        _IOW(PPE_ATM_IOC_MAGIC,  0, atm_cell_ifEntry_t)
+/*!
+  \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
+
+   Get AAL5 packet counters.
+   This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
+ */
+#define PPE_ATM_MIB_AAL5        _IOW(PPE_ATM_IOC_MAGIC,  1, atm_aal5_ifEntry_t)
+/*!
+  \brief ATM IOCTL Command - Get Per PVC MIB Counters
+
+   Get AAL5 packet counters for each PVC.
+   This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
+ */
+#define PPE_ATM_MIB_VCC         _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
+/*!
+  \brief Total Number of ATM IOCTL Commands
+ */
+#define PPE_ATM_IOC_MAXNR       3
+
+/*@}*/
+
+
+
+/*
+ * ####################################
+ *                 API
+ * ####################################
+ */
+
+#ifdef __KERNEL__
+struct port_cell_info {
+    unsigned int    port_num;
+    unsigned int    tx_link_rate[2];
+};
+#endif
+
+
+
+#endif  //  IFX_ATM_H
+

package/ifxmips-dsl-api/src/ifxmips_atm.h

@@ -0,0 +1,172 @@
+/******************************************************************************
+**
+** FILE NAME    : ifx_atm.h
+** PROJECT      : UEIP
+** MODULES      : ATM
+**
+** DATE         : 17 Jun 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : Global ATM driver header file
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFX_ATM_H
+#define IFX_ATM_H
+
+
+
+/*!
+  \defgroup IFX_ATM UEIP Project - ATM driver module
+  \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
+ */
+
+/*!
+  \defgroup IFX_ATM_IOCTL IOCTL Commands
+  \ingroup IFX_ATM
+  \brief IOCTL Commands used by user application.
+ */
+
+/*!
+  \defgroup IFX_ATM_STRUCT Structures
+  \ingroup IFX_ATM
+  \brief Structures used by user application.
+ */
+
+/*!
+  \file ifx_atm.h
+  \ingroup IFX_ATM
+  \brief ATM driver header file
+ */
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*!
+  \addtogroup IFX_ATM_STRUCT
+ */
+/*@{*/
+
+/*
+ *  ATM MIB
+ */
+
+typedef struct {
+	__u32	ifHCInOctets_h;     /*!< byte counter of ingress cells (upper 32 bits, total 64 bits)   */
+	__u32	ifHCInOctets_l;     /*!< byte counter of ingress cells (lower 32 bits, total 64 bits)   */
+	__u32	ifHCOutOctets_h;    /*!< byte counter of egress cells (upper 32 bits, total 64 bits)    */
+	__u32	ifHCOutOctets_l;    /*!< byte counter of egress cells (lower 32 bits, total 64 bits)    */
+	__u32	ifInErrors;         /*!< counter of error ingress cells     */
+	__u32	ifInUnknownProtos;  /*!< counter of unknown ingress cells   */
+	__u32	ifOutErrors;        /*!< counter of error egress cells      */
+} atm_cell_ifEntry_t;
+
+typedef struct {
+	__u32	ifHCInOctets_h;     /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
+	__u32	ifHCInOctets_l;     /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
+	__u32	ifHCOutOctets_h;    /*!< byte counter of egress packets (upper 32 bits, total 64 bits)  */
+	__u32	ifHCOutOctets_l;    /*!< byte counter of egress packets (lower 32 bits, total 64 bits)  */
+	__u32	ifInUcastPkts;      /*!< counter of ingress packets         */
+	__u32	ifOutUcastPkts;     /*!< counter of egress packets          */
+	__u32	ifInErrors;         /*!< counter of error ingress packets   */
+	__u32	ifInDiscards;       /*!< counter of dropped ingress packets */
+	__u32	ifOutErros;         /*!< counter of error egress packets    */
+	__u32	ifOutDiscards;      /*!< counter of dropped egress packets  */
+} atm_aal5_ifEntry_t;
+
+typedef struct {
+	__u32	aal5VccCrcErrors;       /*!< counter of ingress packets with CRC error  */
+	__u32	aal5VccSarTimeOuts;     /*!< counter of ingress packets with Re-assemble timeout    */  //no timer support yet
+	__u32	aal5VccOverSizedSDUs;   /*!< counter of oversized ingress packets       */
+} atm_aal5_vcc_t;
+
+typedef struct {
+	int             vpi;        /*!< VPI of the VCC to get MIB counters */
+	int             vci;        /*!< VCI of the VCC to get MIB counters */
+	atm_aal5_vcc_t  mib_vcc;    /*!< structure to get MIB counters      */
+} atm_aal5_vcc_x_t;
+
+/*@}*/
+
+
+
+/*
+ * ####################################
+ *                IOCTL
+ * ####################################
+ */
+
+/*!
+  \addtogroup IFX_ATM_IOCTL
+ */
+/*@{*/
+
+/*
+ *  ioctl Command
+ */
+/*!
+  \brief ATM IOCTL Magic Number
+ */
+#define PPE_ATM_IOC_MAGIC       'o'
+/*!
+  \brief ATM IOCTL Command - Get Cell Level MIB Counters
+
+   This command is obsolete. User can get cell level MIB from DSL API.
+   This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
+ */
+#define PPE_ATM_MIB_CELL        _IOW(PPE_ATM_IOC_MAGIC,  0, atm_cell_ifEntry_t)
+/*!
+  \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
+
+   Get AAL5 packet counters.
+   This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
+ */
+#define PPE_ATM_MIB_AAL5        _IOW(PPE_ATM_IOC_MAGIC,  1, atm_aal5_ifEntry_t)
+/*!
+  \brief ATM IOCTL Command - Get Per PVC MIB Counters
+
+   Get AAL5 packet counters for each PVC.
+   This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
+ */
+#define PPE_ATM_MIB_VCC         _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
+/*!
+  \brief Total Number of ATM IOCTL Commands
+ */
+#define PPE_ATM_IOC_MAXNR       3
+
+/*@}*/
+
+
+
+/*
+ * ####################################
+ *                 API
+ * ####################################
+ */
+
+#ifdef __KERNEL__
+struct port_cell_info {
+    unsigned int    port_num;
+    unsigned int    tx_link_rate[2];
+};
+#endif
+
+
+
+#endif  //  IFX_ATM_H
+

package/ifxmips-dsl-api/src/ifxmips_atm_core.h

@@ -0,0 +1,249 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_atm_core.h
+** PROJECT      : UEIP
+** MODULES      : ATM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : ATM driver header file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 17 JUN 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+#ifndef IFXMIPS_ATM_CORE_H
+#define IFXMIPS_ATM_CORE_H
+
+
+
+#include <asm/ifx/ifx_atm.h>
+#include "ifxmips_atm_ppe_common.h"
+#include "ifxmips_atm_fw_regs_common.h"
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  Compile Options
+ */
+
+#define ENABLE_DEBUG                    1
+
+#define ENABLE_ASSERT                   1
+
+#define INLINE
+
+#define DEBUG_DUMP_SKB                  1
+
+#define DEBUG_QOS                       1
+
+#define ENABLE_DBG_PROC                 1
+
+#define ENABLE_FW_PROC                  1
+
+#ifdef CONFIG_IFX_ATM_TASKLET
+  #define ENABLE_TASKLET                1
+#endif
+
+
+/*
+ *  Debug/Assert/Error Message
+ */
+
+#define DBG_ENABLE_MASK_ERR             (1 << 0)
+#define DBG_ENABLE_MASK_DEBUG_PRINT     (1 << 1)
+#define DBG_ENABLE_MASK_ASSERT          (1 << 2)
+#define DBG_ENABLE_MASK_DUMP_SKB_RX     (1 << 8)
+#define DBG_ENABLE_MASK_DUMP_SKB_TX     (1 << 9)
+#define DBG_ENABLE_MASK_DUMP_QOS        (1 << 10)
+#define DBG_ENABLE_MASK_DUMP_INIT       (1 << 11)
+#define DBG_ENABLE_MASK_ALL             (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT)
+
+#define err(format, arg...)             do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ERR) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+
+#if defined(ENABLE_DEBUG) && ENABLE_DEBUG
+  #undef  dbg
+  #define dbg(format, arg...)           do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ) printk(KERN_WARNING __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+#else
+  #if !defined(dbg)
+    #define dbg(format, arg...)
+  #endif
+#endif
+
+#if defined(ENABLE_ASSERT) && ENABLE_ASSERT
+  #define ASSERT(cond, format, arg...)  do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
+#else
+  #define ASSERT(cond, format, arg...)
+#endif
+
+
+/*
+ *  Constants
+ */
+#define DEFAULT_TX_LINK_RATE            3200    //  in cells
+
+/*
+ *  ATM Port, QSB Queue, DMA RX/TX Channel Parameters
+ */
+#define ATM_PORT_NUMBER                 2
+#define MAX_QUEUE_NUMBER                16
+#define OAM_RX_QUEUE                    15
+#define QSB_RESERVE_TX_QUEUE            0
+#define FIRST_QSB_QID                   1
+#define MAX_PVC_NUMBER                  (MAX_QUEUE_NUMBER - FIRST_QSB_QID)
+#define MAX_RX_DMA_CHANNEL_NUMBER       8
+#define MAX_TX_DMA_CHANNEL_NUMBER       16
+#define DATA_BUFFER_ALIGNMENT           EMA_ALIGNMENT
+#define DESC_ALIGNMENT                  8
+#define DEFAULT_RX_HUNT_BITTH           4
+
+/*
+ *  RX DMA Channel Allocation
+ */
+#define RX_DMA_CH_OAM                   0
+#define RX_DMA_CH_AAL                   1
+#define RX_DMA_CH_TOTAL                 2
+#define RX_DMA_CH_OAM_DESC_LEN          32
+#define RX_DMA_CH_OAM_BUF_SIZE          (CELL_SIZE & ~15)
+#define RX_DMA_CH_AAL_BUF_SIZE          (2048 - 48)
+
+/*
+ *  OAM Constants
+ */
+#define OAM_HTU_ENTRY_NUMBER            3
+#define OAM_F4_SEG_HTU_ENTRY            0
+#define OAM_F4_TOT_HTU_ENTRY            1
+#define OAM_F5_HTU_ENTRY                2
+#define OAM_F4_CELL_ID                  0
+#define OAM_F5_CELL_ID                  15
+//#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
+//  #undef  OAM_HTU_ENTRY_NUMBER
+//  #define OAM_HTU_ENTRY_NUMBER          4
+//  #define OAM_ARQ_HTU_ENTRY             3
+//#endif
+
+/*
+ *  RX Frame Definitions
+ */
+#define MAX_RX_PACKET_ALIGN_BYTES       3
+#define MAX_RX_PACKET_PADDING_BYTES     3
+#define RX_INBAND_TRAILER_LENGTH        8
+#define MAX_RX_FRAME_EXTRA_BYTES        (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES)
+
+/*
+ *  TX Frame Definitions
+ */
+#define MAX_TX_HEADER_ALIGN_BYTES       12
+#define MAX_TX_PACKET_ALIGN_BYTES       3
+#define MAX_TX_PACKET_PADDING_BYTES     3
+#define TX_INBAND_HEADER_LENGTH         8
+#define MAX_TX_FRAME_EXTRA_BYTES        (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES)
+
+/*
+ *  Cell Constant
+ */
+#define CELL_SIZE                       ATM_AAL0_SDU
+
+
+
+/*
+ * ####################################
+ *              Data Type
+ * ####################################
+ */
+
+typedef struct {
+    unsigned int            h;
+    unsigned int            l;
+} ppe_u64_t;
+
+struct port {
+    unsigned int            tx_max_cell_rate;
+    unsigned int            tx_current_cell_rate;
+
+    struct atm_dev         *dev;
+};
+
+struct connection {
+    struct atm_vcc         *vcc;
+
+    volatile struct tx_descriptor
+                           *tx_desc;
+    unsigned int            tx_desc_pos;
+    struct sk_buff        **tx_skb;
+
+    unsigned int            aal5_vcc_crc_err;       /*  number of packets with CRC error        */
+    unsigned int            aal5_vcc_oversize_sdu;  /*  number of packets with oversize error   */
+
+    unsigned int            port;
+};
+
+struct atm_priv_data {
+    unsigned long           conn_table;
+    struct connection       conn[MAX_PVC_NUMBER];
+
+    volatile struct rx_descriptor
+                           *aal_desc;
+    unsigned int            aal_desc_pos;
+
+    volatile struct rx_descriptor
+                           *oam_desc;
+    unsigned char          *oam_buf;
+    unsigned int            oam_desc_pos;
+
+    struct port             port[ATM_PORT_NUMBER];
+
+    unsigned int            wrx_pdu;        /*  successfully received AAL5 packet       */
+    unsigned int            wrx_drop_pdu;   /*  AAL5 packet dropped by driver on RX     */
+    unsigned int            wtx_pdu;        /*  successfully tranmitted AAL5 packet     */
+    unsigned int            wtx_err_pdu;    /*  error AAL5 packet                       */
+    unsigned int            wtx_drop_pdu;   /*  AAL5 packet dropped by driver on TX     */
+
+    ppe_u64_t               wrx_total_byte;
+    ppe_u64_t               wtx_total_byte;
+    unsigned int            prev_wrx_total_byte;
+    unsigned int            prev_wtx_total_byte;
+
+    void                   *aal_desc_base;
+    void                   *oam_desc_base;
+    void                   *oam_buf_base;
+    void                   *tx_desc_base;
+    void                   *tx_skb_base;
+};
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+extern unsigned int ifx_atm_dbg_enable;
+
+extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor);
+
+extern void ifx_atm_init_chip(void);
+extern void ifx_atm_uninit_chip(void);
+
+extern int ifx_pp32_start(int pp32);
+extern void ifx_pp32_stop(int pp32);
+
+
+
+#endif  //  IFXMIPS_ATM_CORE_H

package/ifxmips-dsl-api/src/ifxmips_atm_danube.c

@@ -0,0 +1,272 @@
+/******************************************************************************
+**
+** FILE NAME    : ifxmips_atm_danube.c
+** PROJECT      : UEIP
+** MODULES      : ATM
+**
+** DATE         : 7 Jul 2009
+** AUTHOR       : Xu Liang
+** DESCRIPTION  : ATM driver common source file (core functions)
+** COPYRIGHT    :       Copyright (c) 2006
+**                      Infineon Technologies AG
+**                      Am Campeon 1-12, 85579 Neubiberg, Germany
+**
+**    This program is free software; you can redistribute it and/or modify
+**    it under the terms of the GNU General Public License as published by
+**    the Free Software Foundation; either version 2 of the License, or
+**    (at your option) any later version.
+**
+** HISTORY
+** $Date        $Author         $Comment
+** 07 JUL 2009  Xu Liang        Init Version
+*******************************************************************************/
+
+
+
+/*
+ * ####################################
+ *              Head File
+ * ####################################
+ */
+
+/*
+ *  Common Head File
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/proc_fs.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <asm/delay.h>
+
+/*
+ *  Chip Specific Head File
+ */
+#include <asm/ifx/ifx_types.h>
+#include <asm/ifx/ifx_regs.h>
+#include <asm/ifx/common_routines.h>
+#include <asm/ifx/ifx_pmu.h>
+#include "ifxmips_atm_core.h"
+#include "ifxmips_atm_fw_danube.h"
+
+
+
+/*
+ * ####################################
+ *              Definition
+ * ####################################
+ */
+
+/*
+ *  EMA Settings
+ */
+#define EMA_CMD_BUF_LEN      0x0040
+#define EMA_CMD_BASE_ADDR    (0x00001580 << 2)
+#define EMA_DATA_BUF_LEN     0x0100
+#define EMA_DATA_BASE_ADDR   (0x00001900 << 2)
+#define EMA_WRITE_BURST      0x2
+#define EMA_READ_BURST       0x2
+
+
+
+/*
+ * ####################################
+ *             Declaration
+ * ####################################
+ */
+
+/*
+ *  Hardware Init/Uninit Functions
+ */
+static inline void init_pmu(void);
+static inline void uninit_pmu(void);
+static inline void init_ema(void);
+static inline void init_mailbox(void);
+static inline void init_atm_tc(void);
+static inline void clear_share_buffer(void);
+
+
+
+/*
+ * ####################################
+ *            Local Variable
+ * ####################################
+ */
+
+
+
+/*
+ * ####################################
+ *            Local Function
+ * ####################################
+ */
+
+static inline void init_pmu(void)
+{
+    //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
+    PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
+    PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+}
+
+static inline void uninit_pmu(void)
+{
+    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+    PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+}
+
+static inline void init_ema(void)
+{
+    IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG);
+    IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG);
+    IFX_REG_W32(0x000000FF, EMA_IER);
+    IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG);
+}
+
+static inline void init_mailbox(void)
+{
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU1_IER);
+    IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC);
+    IFX_REG_W32(0x00000000, MBOX_IGU3_IER);
+}
+
+static inline void init_atm_tc(void)
+{
+    //  for ReTX expansion in future
+    //*FFSM_CFG0 = SET_BITS(*FFSM_CFG0, 5, 0, 6); //  pnum = 6
+    //*FFSM_CFG1 = SET_BITS(*FFSM_CFG1, 5, 0, 6); //  pnum = 6
+}
+
+static inline void clear_share_buffer(void)
+{
+    volatile u32 *p = SB_RAM0_ADDR(0);
+    unsigned int i;
+
+    for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
+        IFX_REG_W32(0, p++);
+}
+
+/*
+ *  Description:
+ *    Download PPE firmware binary code.
+ *  Input:
+ *    src       --- u32 *, binary code buffer
+ *    dword_len --- unsigned int, binary code length in DWORD (32-bit)
+ *  Output:
+ *    int       --- IFX_SUCCESS:    Success
+ *                  else:           Error Code
+ */
+static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
+{
+    volatile u32 *dest;
+
+    if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
+        || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
+        return IFX_ERROR;
+
+    if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )
+        IFX_REG_W32(0x00, CDM_CFG);
+    else
+        IFX_REG_W32(0x02, CDM_CFG);
+
+    /*  copy code   */
+    dest = CDM_CODE_MEMORY(0, 0);
+    while ( code_dword_len-- > 0 )
+        IFX_REG_W32(*code_src++, dest++);
+
+    /*  copy data   */
+    dest = CDM_DATA_MEMORY(0, 0);
+    while ( data_dword_len-- > 0 )
+        IFX_REG_W32(*data_src++, dest++);
+
+    return IFX_SUCCESS;
+}
+
+
+
+/*
+ * ####################################
+ *           Global Function
+ * ####################################
+ */
+
+extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor)
+{
+    ASSERT(major != NULL, "pointer is NULL");
+    ASSERT(minor != NULL, "pointer is NULL");
+
+    *major = ATM_FW_VER_MAJOR;
+    *minor = ATM_FW_VER_MINOR;
+}
+
+void ifx_atm_init_chip(void)
+{
+    init_pmu();
+
+    init_ema();
+
+    init_mailbox();
+
+    init_atm_tc();
+
+    clear_share_buffer();
+}
+
+void ifx_atm_uninit_chip(void)
+{
+    uninit_pmu();
+}
+
+/*
+ *  Description:
+ *    Initialize and start up PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    int  --- IFX_SUCCESS: Success
+ *             else:        Error Code
+ */
+int ifx_pp32_start(int pp32)
+{
+    int ret;
+
+    /*  download firmware   */
+    ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data));
+    if ( ret != IFX_SUCCESS )
+        return ret;
+
+    /*  run PP32    */
+    IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL);
+
+    /*  idle for a while to let PP32 init itself    */
+    udelay(10);
+
+    return IFX_SUCCESS;
+}
+
+/*
+ *  Description:
+ *    Halt PP32.
+ *  Input:
+ *    none
+ *  Output:
+ *    none
+ */
+void ifx_pp32_stop(int pp32)
+{
+    /*  halt PP32   */
+    IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL);
+}

package/ifxmips-dsl-api/src/ifxmips_atm_fw_danube.h

@@ -1,10 +1,10 @@
-#ifndef __DANUBE_PPE_FW_H__2005_08_04__12_00__
-#define __DANUBE_PPE_FW_H__2005_08_04__12_00__
+#ifndef IFXMIPS_ATM_FW_DANUBE_H
+#define IFXMIPS_ATM_FW_DANUBE_H
 
 
 /******************************************************************************
 **
-** FILE NAME    : danube_ppe_fw.h
+** FILE NAME    : ifxmips_atm_fw_danube.h
 ** PROJECT      : Danube
 ** MODULES     	: ATM (ADSL)
 **
@@ -27,7 +27,11 @@
 *******************************************************************************/
 
 
-static u32 firmware_binary_code[] = {
+#define ATM_FW_VER_MAJOR        0
+#define ATM_FW_VER_MINOR        1
+
+
+static unsigned int firmware_binary_code[] = {
     0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
     0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000,
     0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0x80004710, 0xC2000000, 0xDA080001, 0x80003D98,
@@ -418,9 +422,8 @@ static u32 firmware_binary_code[] = {
     0x00000000,
 };
 
-static u32 firmware_binary_data[] = {
+static unsigned int firmware_binary_data[] = {
 };
 
 
-#endif  //  __DANUBE_PPE_FW_H__2005_08_04__12_00__
-
+#endif  //  IFXMIPS_ATM_FW_DANUBE_H

package/ifxmips-dsl-api/src/ifxmips_atm_fw_regs_common.h

@@ -0,0 +1,364 @@
+#ifndef IFXMIPS_ATM_FW_REGS_COMMON_H
+#define IFXMIPS_ATM_FW_REGS_COMMON_H
+
+
+
+#if defined(CONFIG_DANUBE)
+  #include "ifxmips_atm_fw_regs_danube.h"
+#elif defined(CONFIG_AMAZON_SE)
+  #include "ifxmips_atm_fw_regs_amazon_se.h"
+#elif defined(CONFIG_AR9)
+  #include "ifxmips_atm_fw_regs_ar9.h"
+#elif defined(CONFIG_VR9)
+  #include "ifxmips_atm_fw_regs_vr9.h"
+#else
+  #error Platform is not specified!
+#endif
+
+
+
+/*
+ *  PPE ATM Cell Header
+ */
+#if defined(__BIG_ENDIAN)
+    struct uni_cell_header {
+        unsigned int        gfc     :4;
+        unsigned int        vpi     :8;
+        unsigned int        vci     :16;
+        unsigned int        pti     :3;
+        unsigned int        clp     :1;
+    };
+#else
+    struct uni_cell_header {
+        unsigned int        clp     :1;
+        unsigned int        pti     :3;
+        unsigned int        vci     :16;
+        unsigned int        vpi     :8;
+        unsigned int        gfc     :4;
+    };
+#endif  //  defined(__BIG_ENDIAN)
+
+/*
+ *  Inband Header and Trailer
+ */
+#if defined(__BIG_ENDIAN)
+    struct rx_inband_trailer {
+        /*  0 - 3h  */
+        unsigned int        uu      :8;
+        unsigned int        cpi     :8;
+        unsigned int        stw_res1:4;
+        unsigned int        stw_clp :1;
+        unsigned int        stw_ec  :1;
+        unsigned int        stw_uu  :1;
+        unsigned int        stw_cpi :1;
+        unsigned int        stw_ovz :1;
+        unsigned int        stw_mfl :1;
+        unsigned int        stw_usz :1;
+        unsigned int        stw_crc :1;
+        unsigned int        stw_il  :1;
+        unsigned int        stw_ra  :1;
+        unsigned int        stw_res2:2;
+        /*  4 - 7h  */
+        unsigned int        gfc     :4;
+        unsigned int        vpi     :8;
+        unsigned int        vci     :16;
+        unsigned int        pti     :3;
+        unsigned int        clp     :1;
+    };
+
+    struct tx_inband_header {
+        /*  0 - 3h  */
+        unsigned int        gfc     :4;
+        unsigned int        vpi     :8;
+        unsigned int        vci     :16;
+        unsigned int        pti     :3;
+        unsigned int        clp     :1;
+        /*  4 - 7h  */
+        unsigned int        uu      :8;
+        unsigned int        cpi     :8;
+        unsigned int        pad     :8;
+        unsigned int        res1    :8;
+    };
+#else
+    struct rx_inband_trailer {
+        /*  0 - 3h  */
+        unsigned int        stw_res2:2;
+        unsigned int        stw_ra  :1;
+        unsigned int        stw_il  :1;
+        unsigned int        stw_crc :1;
+        unsigned int        stw_usz :1;
+        unsigned int        stw_mfl :1;
+        unsigned int        stw_ovz :1;
+        unsigned int        stw_cpi :1;
+        unsigned int        stw_uu  :1;
+        unsigned int        stw_ec  :1;
+        unsigned int        stw_clp :1;
+        unsigned int        stw_res1:4;
+        unsigned int        cpi     :8;
+        unsigned int        uu      :8;
+        /*  4 - 7h  */
+        unsigned int        clp     :1;
+        unsigned int        pti     :3;
+        unsigned int        vci     :16;
+        unsigned int        vpi     :8;
+        unsigned int        gfc     :4;
+    };
+
+    struct tx_inband_header {
+        /*  0 - 3h  */
+        unsigned int        clp     :1;
+        unsigned int        pti     :3;
+        unsigned int        vci     :16;
+        unsigned int        vpi     :8;
+        unsigned int        gfc     :4;
+        /*  4 - 7h  */
+        unsigned int        res1    :8;
+        unsigned int        pad     :8;
+        unsigned int        cpi     :8;
+        unsigned int        uu      :8;
+    };
+#endif  //  defined(__BIG_ENDIAN)
+
+/*
+ *  MIB Table Maintained by Firmware
+ */
+struct wan_mib_table {
+    u32                     res1;
+    u32                     wrx_drophtu_cell;
+    u32                     wrx_dropdes_pdu;
+    u32                     wrx_correct_pdu;
+    u32                     wrx_err_pdu;
+    u32                     wrx_dropdes_cell;
+    u32                     wrx_correct_cell;
+    u32                     wrx_err_cell;
+    u32                     wrx_total_byte;
+    u32                     res2;
+    u32                     wtx_total_pdu;
+    u32                     wtx_total_cell;
+    u32                     wtx_total_byte;
+};
+
+/*
+ *  Host-PPE Communication Data Structure
+ */
+
+#if defined(__BIG_ENDIAN)
+    struct wrx_queue_config {
+        /*  0h  */
+        unsigned int    res2        :27;
+        unsigned int    dmach       :4;
+        unsigned int    errdp       :1;
+        /*  1h  */
+        unsigned int    oversize    :16;
+        unsigned int    undersize   :16;
+        /*  2h  */
+        unsigned int    res1        :16;
+        unsigned int    mfs         :16;
+        /*  3h  */
+        unsigned int    uumask      :8;
+        unsigned int    cpimask     :8;
+        unsigned int    uuexp       :8;
+        unsigned int    cpiexp      :8;
+    };
+
+    struct wtx_port_config {
+        unsigned int    res1        :27;
+        unsigned int    qid         :4;
+        unsigned int    qsben       :1;
+    };
+
+    struct wtx_queue_config {
+        unsigned int    res1        :25;
+        unsigned int    sbid        :1;
+        unsigned int    res2        :3;
+        unsigned int    type        :2;
+        unsigned int    qsben       :1;
+    };
+
+    struct wrx_dma_channel_config {
+        /*  0h  */
+        unsigned int    res1        :1;
+        unsigned int    mode        :2;
+        unsigned int    rlcfg       :1;
+        unsigned int    desba       :28;
+        /*  1h  */
+        unsigned int    chrl        :16;
+        unsigned int    clp1th      :16;
+        /*  2h  */
+        unsigned int    deslen      :16;
+        unsigned int    vlddes      :16;
+    };
+
+    struct wtx_dma_channel_config {
+        /*  0h  */
+        unsigned int    res2        :1;
+        unsigned int    mode        :2;
+        unsigned int    res3        :1;
+        unsigned int    desba       :28;
+        /*  1h  */
+        unsigned int    res1        :32;
+        /*  2h  */
+        unsigned int    deslen      :16;
+        unsigned int    vlddes      :16;
+    };
+
+    struct htu_entry {
+        unsigned int    res1        :1;
+        unsigned int    clp         :1;
+        unsigned int    pid         :2;
+        unsigned int    vpi         :8;
+        unsigned int    vci         :16;
+        unsigned int    pti         :3;
+        unsigned int    vld         :1;
+    };
+
+    struct htu_mask {
+        unsigned int    set         :1;
+        unsigned int    clp         :1;
+        unsigned int    pid_mask    :2;
+        unsigned int    vpi_mask    :8;
+        unsigned int    vci_mask    :16;
+        unsigned int    pti_mask    :3;
+        unsigned int    clear       :1;
+    };
+
+   struct htu_result {
+        unsigned int    res1        :12;
+        unsigned int    cellid      :4;
+        unsigned int    res2        :5;
+        unsigned int    type        :1;
+        unsigned int    ven         :1;
+        unsigned int    res3        :5;
+        unsigned int    qid         :4;
+    };
+
+    struct rx_descriptor {
+        /*  0 - 3h  */
+        unsigned int    own         :1;
+        unsigned int    c           :1;
+        unsigned int    sop         :1;
+        unsigned int    eop         :1;
+        unsigned int    res1        :3;
+        unsigned int    byteoff     :2;
+        unsigned int    res2        :2;
+        unsigned int    id          :4;
+        unsigned int    err         :1;
+        unsigned int    datalen     :16;
+        /*  4 - 7h  */
+        unsigned int    res3        :4;
+        unsigned int    dataptr     :28;
+    };
+
+    struct tx_descriptor {
+        /*  0 - 3h  */
+        unsigned int    own         :1;
+        unsigned int    c           :1;
+        unsigned int    sop         :1;
+        unsigned int    eop         :1;
+        unsigned int    byteoff     :5;
+        unsigned int    res1        :5;
+        unsigned int    iscell      :1;
+        unsigned int    clp         :1;
+        unsigned int    datalen     :16;
+        /*  4 - 7h  */
+        unsigned int    res2        :4;
+        unsigned int    dataptr     :28;
+    };
+#else
+    struct wrx_queue_config {
+        /*  0h  */
+        unsigned int    errdp       :1;
+        unsigned int    dmach       :4;
+        unsigned int    res2        :27;
+        /*  1h  */
+        unsigned int    undersize   :16;
+        unsigned int    oversize    :16;
+        /*  2h  */
+        unsigned int    mfs         :16;
+        unsigned int    res1        :16;
+        /*  3h  */
+        unsigned int    cpiexp      :8;
+        unsigned int    uuexp       :8;
+        unsigned int    cpimask     :8;
+        unsigned int    uumask      :8;
+    };
+
+    struct wtx_port_config {
+        unsigned int    qsben       :1;
+        unsigned int    qid         :4;
+        unsigned int    res1        :27;
+    };
+
+    struct wtx_queue_config {
+        unsigned int    qsben       :1;
+        unsigned int    type        :2;
+        unsigned int    res2        :3;
+        unsigned int    sbid        :1;
+        unsigned int    res1        :25;
+    };
+
+    struct wrx_dma_channel_config
+    {
+        /*  0h  */
+        unsigned int    desba       :28;
+        unsigned int    rlcfg       :1;
+        unsigned int    mode        :2;
+        unsigned int    res1        :1;
+        /*  1h  */
+        unsigned int    clp1th      :16;
+        unsigned int    chrl        :16;
+        /*  2h  */
+        unsigned int    vlddes      :16;
+        unsigned int    deslen      :16;
+    };
+
+    struct wtx_dma_channel_config {
+        /*  0h  */
+        unsigned int    desba       :28;
+        unsigned int    res3        :1;
+        unsigned int    mode        :2;
+        unsigned int    res2        :1;
+        /*  1h  */
+        unsigned int    res1        :32;
+        /*  2h  */
+        unsigned int    vlddes      :16;
+        unsigned int    deslen      :16;
+    };
+
+    struct rx_descriptor {
+        /*  4 - 7h  */
+        unsigned int    dataptr     :28;
+        unsigned int    res3        :4;
+        /*  0 - 3h  */
+        unsigned int    datalen     :16;
+        unsigned int    err         :1;
+        unsigned int    id          :4;
+        unsigned int    res2        :2;
+        unsigned int    byteoff     :2;
+        unsigned int    res1        :3;
+        unsigned int    eop         :1;
+        unsigned int    sop         :1;
+        unsigned int    c           :1;
+        unsigned int    own         :1;
+    };
+
+    struct tx_descriptor {
+        /*  4 - 7h  */
+        unsigned int    dataptr     :28;
+        unsigned int    res2        :4;
+        /*  0 - 3h  */
+        unsigned int    datalen     :16;
+        unsigned int    clp         :1;
+        unsigned int    iscell      :1;
+        unsigned int    res1        :5;
+        unsigned int    byteoff     :5;
+        unsigned int    eop         :1;
+        unsigned int    sop         :1;
+        unsigned int    c           :1;
+        unsigned int    own         :1;
+    };
+#endif  //  defined(__BIG_ENDIAN)
+
+
+
+#endif  //  IFXMIPS_ATM_FW_REGS_COMMON_H

package/ifxmips-dsl-api/src/ifxmips_atm_fw_regs_danube.h

@@ -0,0 +1,30 @@
+#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H
+#define IFXMIPS_ATM_FW_REGS_DANUBE_H
+
+
+
+/*
+ *  Host-PPE Communication Data Address Mapping
+ */
+#define FW_VER_ID                       SB_BUFFER(0x2001)
+#define CFG_WRX_HTUTS                   SB_BUFFER(0x2400)   /*  WAN RX HTU Table Size, must be configured before enable PPE firmware.   */
+#define CFG_WRX_QNUM                    SB_BUFFER(0x2401)   /*  WAN RX Queue Number */
+#define CFG_WRX_DCHNUM                  SB_BUFFER(0x2402)   /*  WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware.   */
+#define CFG_WTX_DCHNUM                  SB_BUFFER(0x2403)   /*  WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware.  */
+#define CFG_WRDES_DELAY                 SB_BUFFER(0x2404)   /*  WAN Descriptor Write Delay, must be configured before enable PPE firmware.  */
+#define WRX_DMACH_ON                    SB_BUFFER(0x2405)   /*  WAN RX DMA Channel Enable, must be configured before enable PPE firmware.   */
+#define WTX_DMACH_ON                    SB_BUFFER(0x2406)   /*  WAN TX DMA Channel Enable, must be configured before enable PPE firmware.   */
+#define WRX_HUNT_BITTH                  SB_BUFFER(0x2407)   /*  WAN RX HUNT Threshold, must be between 2 to 8.  */
+#define WRX_QUEUE_CONFIG(i)             ((struct wrx_queue_config*)         SB_BUFFER(0x2500 + (i) * 20))
+#define WRX_DMA_CHANNEL_CONFIG(i)       ((struct wrx_dma_channel_config*)   SB_BUFFER(0x2640 + (i) * 7))
+#define WTX_PORT_CONFIG(i)              ((struct wtx_port_config*)          SB_BUFFER(0x2440 + (i)))
+#define WTX_QUEUE_CONFIG(i)             ((struct wtx_queue_config*)         SB_BUFFER(0x2710 + (i) * 27))
+#define WTX_DMA_CHANNEL_CONFIG(i)       ((struct wtx_dma_channel_config*)   SB_BUFFER(0x2711 + (i) * 27))
+#define WAN_MIB_TABLE                   ((struct wan_mib_table*)            SB_BUFFER(0x2410))
+#define HTU_ENTRY(i)                    ((struct htu_entry*)                SB_BUFFER(0x2000 + (i)))
+#define HTU_MASK(i)                     ((struct htu_mask*)                 SB_BUFFER(0x2020 + (i)))
+#define HTU_RESULT(i)                   ((struct htu_result*)               SB_BUFFER(0x2040 + (i)))
+
+
+
+#endif  //  IFXMIPS_ATM_FW_REGS_DANUBE_H

package/ifxmips-dsl-api/src/ifxmips_atm_ppe_common.h

@@ -0,0 +1,231 @@
+#ifndef IFXMIPS_ATM_PPE_COMMON_H
+#define IFXMIPS_ATM_PPE_COMMON_H
+
+
+
+#if defined(CONFIG_DANUBE)
+  #include "ifxmips_atm_ppe_danube.h"
+#elif defined(CONFIG_AMAZON_SE)
+  #include "ifxmips_atm_ppe_amazon_se.h"
+#elif defined(CONFIG_AR9)
+  #include "ifxmips_atm_ppe_ar9.h"
+#elif defined(CONFIG_VR9)
+  #include "ifxmips_atm_ppe_vr9.h"
+#else
+  #error Platform is not specified!
+#endif
+
+
+
+/*
+ *  Code/Data Memory (CDM) Interface Configuration Register
+ */
+#define CDM_CFG                         PPE_REG_ADDR(0x0100)
+
+#define CDM_CFG_RAM1                    GET_BITS(*CDM_CFG, 3, 2)
+#define CDM_CFG_RAM0                    (*CDM_CFG & (1 << 1))
+
+#define CDM_CFG_RAM1_SET(value)         SET_BITS(0, 3, 2, value)
+#define CDM_CFG_RAM0_SET(value)         ((value) ? (1 << 1) : 0)
+
+/*
+ *  QSB Internal Cell Delay Variation Register
+ */
+#define QSB_ICDV                        QSB_CONF_REG_ADDR(0x0007)
+
+#define QSB_ICDV_TAU                    GET_BITS(*QSB_ICDV, 5, 0)
+
+#define QSB_ICDV_TAU_SET(value)         SET_BITS(0, 5, 0, value)
+
+/*
+ *  QSB Scheduler Burst Limit Register
+ */
+#define QSB_SBL                         QSB_CONF_REG_ADDR(0x0009)
+
+#define QSB_SBL_SBL                     GET_BITS(*QSB_SBL, 3, 0)
+
+#define QSB_SBL_SBL_SET(value)          SET_BITS(0, 3, 0, value)
+
+/*
+ *  QSB Configuration Register
+ */
+#define QSB_CFG                         QSB_CONF_REG_ADDR(0x000A)
+
+#define QSB_CFG_TSTEPC                  GET_BITS(*QSB_CFG, 1, 0)
+
+#define QSB_CFG_TSTEPC_SET(value)       SET_BITS(0, 1, 0, value)
+
+/*
+ *  QSB RAM Transfer Table Register
+ */
+#define QSB_RTM                         QSB_CONF_REG_ADDR(0x000B)
+
+#define QSB_RTM_DM                      (*QSB_RTM)
+
+#define QSB_RTM_DM_SET(value)           ((value) & 0xFFFFFFFF)
+
+/*
+ *  QSB RAM Transfer Data Register
+ */
+#define QSB_RTD                         QSB_CONF_REG_ADDR(0x000C)
+
+#define QSB_RTD_TTV                     (*QSB_RTD)
+
+#define QSB_RTD_TTV_SET(value)          ((value) & 0xFFFFFFFF)
+
+/*
+ *  QSB RAM Access Register
+ */
+#define QSB_RAMAC                       QSB_CONF_REG_ADDR(0x000D)
+
+#define QSB_RAMAC_RW                    (*QSB_RAMAC & (1 << 31))
+#define QSB_RAMAC_TSEL                  GET_BITS(*QSB_RAMAC, 27, 24)
+#define QSB_RAMAC_LH                    (*QSB_RAMAC & (1 << 16))
+#define QSB_RAMAC_TESEL                 GET_BITS(*QSB_RAMAC, 9, 0)
+
+#define QSB_RAMAC_RW_SET(value)         ((value) ? (1 << 31) : 0)
+#define QSB_RAMAC_TSEL_SET(value)       SET_BITS(0, 27, 24, value)
+#define QSB_RAMAC_LH_SET(value)         ((value) ? (1 << 16) : 0)
+#define QSB_RAMAC_TESEL_SET(value)      SET_BITS(0, 9, 0, value)
+
+/*
+ *  QSB Queue Scheduling and Shaping Definitions
+ */
+#define QSB_WFQ_NONUBR_MAX              0x3f00
+#define QSB_WFQ_UBR_BYPASS              0x3fff
+#define QSB_TP_TS_MAX                   65472
+#define QSB_TAUS_MAX                    64512
+#define QSB_GCR_MIN                     18
+
+/*
+ *  QSB Constant
+ */
+#define QSB_RAMAC_RW_READ               0
+#define QSB_RAMAC_RW_WRITE              1
+
+#define QSB_RAMAC_TSEL_QPT              0x01
+#define QSB_RAMAC_TSEL_SCT              0x02
+#define QSB_RAMAC_TSEL_SPT              0x03
+#define QSB_RAMAC_TSEL_VBR              0x08
+
+#define QSB_RAMAC_LH_LOW                0
+#define QSB_RAMAC_LH_HIGH               1
+
+#define QSB_QPT_SET_MASK                0x0
+#define QSB_QVPT_SET_MASK               0x0
+#define QSB_SET_SCT_MASK                0x0
+#define QSB_SET_SPT_MASK                0x0
+#define QSB_SET_SPT_SBVALID_MASK        0x7FFFFFFF
+
+#define QSB_SPT_SBV_VALID               (1 << 31)
+#define QSB_SPT_PN_SET(value)           (((value) & 0x01) ? (1 << 16) : 0)
+#define QSB_SPT_INTRATE_SET(value)      SET_BITS(0, 13, 0, value)
+
+/*
+ *  QSB Queue Parameter Table Entry and Queue VBR Parameter Table Entry
+ */
+#if defined(__BIG_ENDIAN)
+    union qsb_queue_parameter_table {
+        struct {
+            unsigned int    res1    :1;
+            unsigned int    vbr     :1;
+            unsigned int    wfqf    :14;
+            unsigned int    tp      :16;
+        }               bit;
+        u32             dword;
+    };
+
+    union qsb_queue_vbr_parameter_table {
+        struct {
+            unsigned int    taus    :16;
+            unsigned int    ts      :16;
+        }               bit;
+        u32             dword;
+    };
+#else
+    union qsb_queue_parameter_table {
+        struct {
+            unsigned int    tp      :16;
+            unsigned int    wfqf    :14;
+            unsigned int    vbr     :1;
+            unsigned int    res1    :1;
+        }               bit;
+        u32             dword;
+    };
+
+    union qsb_queue_vbr_parameter_table {
+        struct {
+            unsigned int    ts      :16;
+            unsigned int    taus    :16;
+        }               bit;
+        u32             dword;
+    };
+#endif  //  defined(__BIG_ENDIAN)
+
+/*
+ *  Mailbox IGU0 Registers
+ */
+#define MBOX_IGU0_ISRS                  PPE_REG_ADDR(0x0200)
+#define MBOX_IGU0_ISRC                  PPE_REG_ADDR(0x0201)
+#define MBOX_IGU0_ISR                   PPE_REG_ADDR(0x0202)
+#define MBOX_IGU0_IER                   PPE_REG_ADDR(0x0203)
+
+#define MBOX_IGU0_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU0_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU0_ISR_ISR(n)            (*MBOX_IGU0_ISR & (1 << (n)))
+#define MBOX_IGU0_IER_EN(n)             (*MBOX_IGU0_IER & (1 << (n)))
+#define MBOX_IGU0_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  Mailbox IGU1 Registers
+ */
+#define MBOX_IGU1_ISRS                  PPE_REG_ADDR(0x0204)
+#define MBOX_IGU1_ISRC                  PPE_REG_ADDR(0x0205)
+#define MBOX_IGU1_ISR                   PPE_REG_ADDR(0x0206)
+#define MBOX_IGU1_IER                   PPE_REG_ADDR(0x0207)
+
+#define MBOX_IGU1_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU1_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU1_ISR_ISR(n)            (*MBOX_IGU1_ISR & (1 << (n)))
+#define MBOX_IGU1_IER_EN(n)             (*MBOX_IGU1_IER & (1 << (n)))
+#define MBOX_IGU1_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  Mailbox IGU3 Registers
+ */
+#define MBOX_IGU3_ISRS                  PPE_REG_ADDR(0x0214)
+#define MBOX_IGU3_ISRC                  PPE_REG_ADDR(0x0215)
+#define MBOX_IGU3_ISR                   PPE_REG_ADDR(0x0216)
+#define MBOX_IGU3_IER                   PPE_REG_ADDR(0x0217)
+
+#define MBOX_IGU3_ISRS_SET(n)           (1 << (n))
+#define MBOX_IGU3_ISRC_CLEAR(n)         (1 << (n))
+#define MBOX_IGU3_ISR_ISR(n)            (*MBOX_IGU3_ISR & (1 << (n)))
+#define MBOX_IGU3_IER_EN(n)             (*MBOX_IGU3_IER & (1 << (n)))
+#define MBOX_IGU3_IER_EN_SET(n)         (1 << (n))
+
+/*
+ *  RTHA/TTHA Registers
+ */
+#define SFSM_STATE0                             PPE_REG_ADDR(0x0410)
+#define SFSM_STATE1                             PPE_REG_ADDR(0x0411)
+#define SFSM_DBA0                               PPE_REG_ADDR(0x0412)
+#define SFSM_DBA1                               PPE_REG_ADDR(0x0413)
+#define SFSM_CBA0                               PPE_REG_ADDR(0x0414)
+#define SFSM_CBA1                               PPE_REG_ADDR(0x0415)
+#define SFSM_CFG0                               PPE_REG_ADDR(0x0416)
+#define SFSM_CFG1                               PPE_REG_ADDR(0x0417)
+#define SFSM_PGCNT0                             PPE_REG_ADDR(0x041C)
+#define SFSM_PGCNT1                             PPE_REG_ADDR(0x041D)
+#define FFSM_DBA0                               PPE_REG_ADDR(0x0508)
+#define FFSM_DBA1                               PPE_REG_ADDR(0x0509)
+#define FFSM_CFG0                               PPE_REG_ADDR(0x050A)
+#define FFSM_CFG1                               PPE_REG_ADDR(0x050B)
+#define FFSM_IDLE_HEAD_BC0                      PPE_REG_ADDR(0x050E)
+#define FFSM_IDLE_HEAD_BC1                      PPE_REG_ADDR(0x050F)
+#define FFSM_PGCNT0                             PPE_REG_ADDR(0x0514)
+#define FFSM_PGCNT1                             PPE_REG_ADDR(0x0515)
+
+
+
+#endif  //  IFXMIPS_ATM_PPE_COMMON_H

package/ifxmips-dsl-api/src/ifxmips_atm_ppe_danube.h

@@ -0,0 +1,100 @@
+#ifndef IFXMIPS_ATM_PPE_DANUBE_H
+#define IFXMIPS_ATM_PPE_DANUBE_H
+
+
+
+/*
+ *  FPI Configuration Bus Register and Memory Address Mapping
+ */
+#define IFX_PPE                      	(KSEG1 | 0x1E180000)
+#define PP32_DEBUG_REG_ADDR(i, x)       ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2)))
+#define PPM_INT_REG_ADDR(i, x)          ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2)))
+#define PP32_INTERNAL_RES_ADDR(i, x)    ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2)))
+#define CDM_CODE_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2)))
+#define PPE_REG_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2)))
+#define CDM_DATA_MEMORY(i, x)           ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2)))
+#define PPM_INT_UNIT_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2)))
+#define PPM_TIMER0_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2)))
+#define PPM_TASK_IND_REG_ADDR(x)        ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2)))
+#define PPS_BRK_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2)))
+#define PPM_TIMER1_ADDR(x)              ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2)))
+#define SB_RAM0_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2)))
+#define SB_RAM1_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8400) << 2)))
+#define SB_RAM2_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2)))
+#define SB_RAM3_ADDR(x)                 ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9600) << 2)))
+#define QSB_CONF_REG_ADDR(x)            ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2)))
+
+/*
+ *  DWORD-Length of Memory Blocks
+ */
+#define PP32_DEBUG_REG_DWLEN            0x0030
+#define PPM_INT_REG_DWLEN               0x0010
+#define PP32_INTERNAL_RES_DWLEN         0x00C0
+#define CDM_CODE_MEMORYn_DWLEN(n)       ((n) == 0 ? 0x1000 : 0x0800)
+#define PPE_REG_DWLEN                   0x1000
+#define CDM_DATA_MEMORY_DWLEN           CDM_CODE_MEMORYn_DWLEN(1)
+#define PPM_INT_UNIT_DWLEN              0x0100
+#define PPM_TIMER0_DWLEN                0x0100
+#define PPM_TASK_IND_REG_DWLEN          0x0100
+#define PPS_BRK_DWLEN                   0x0100
+#define PPM_TIMER1_DWLEN                0x0100
+#define SB_RAM0_DWLEN                   0x0400
+#define SB_RAM1_DWLEN                   0x0800
+#define SB_RAM2_DWLEN                   0x0A00
+#define SB_RAM3_DWLEN                   0x0400
+#define QSB_CONF_REG_DWLEN              0x0100
+
+/*
+ *  PP32 to FPI Address Mapping
+ */
+#define SB_BUFFER(__sb_addr)            ((volatile unsigned int *)((((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x23FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) :   \
+                                                                   (((__sb_addr) >= 0x2400) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2400) :   \
+                                                                   (((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x2C00) :   \
+                                                                   (((__sb_addr) >= 0x3600) && ((__sb_addr) <= 0x39FF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3600) :   \
+                                                                0))
+
+/*
+ *  PP32 Debug Control Register
+ */
+#define PP32_DBG_CTRL                   PP32_DEBUG_REG_ADDR(0, 0x0000)
+
+#define DBG_CTRL_START_SET(value)       ((value) ? (1 << 0) : 0)
+#define DBG_CTRL_STOP_SET(value)        ((value) ? (1 << 1) : 0)
+#define DBG_CTRL_STEP_SET(value)        ((value) ? (1 << 2) : 0)
+
+#define PP32_HALT_STAT                  PP32_DEBUG_REG_ADDR(0, 0x0001)
+
+#define PP32_BRK_SRC                    PP32_DEBUG_REG_ADDR(0, 0x0002)
+
+#define PP32_DBG_PC_MIN(i)              PP32_DEBUG_REG_ADDR(0, 0x0010 + (i))
+#define PP32_DBG_PC_MAX(i)              PP32_DEBUG_REG_ADDR(0, 0x0014 + (i))
+#define PP32_DBG_DATA_MIN(i)            PP32_DEBUG_REG_ADDR(0, 0x0018 + (i))
+#define PP32_DBG_DATA_MAX(i)            PP32_DEBUG_REG_ADDR(0, 0x001A + (i))
+#define PP32_DBG_DATA_VAL(i)            PP32_DEBUG_REG_ADDR(0, 0x001C + (i))
+
+#define PP32_DBG_CUR_PC                 PP32_DEBUG_REG_ADDR(0, 0x0080)
+
+#define PP32_DBG_TASK_NO                PP32_DEBUG_REG_ADDR(0, 0x0081)
+
+/*
+ *  EMA Registers
+ */
+#define EMA_CMDCFG                      PPE_REG_ADDR(0x0A00)
+#define EMA_DATACFG                     PPE_REG_ADDR(0x0A01)
+#define EMA_CMDCNT                      PPE_REG_ADDR(0x0A02)
+#define EMA_DATACNT                     PPE_REG_ADDR(0x0A03)
+#define EMA_ISR                         PPE_REG_ADDR(0x0A04)
+#define EMA_IER                         PPE_REG_ADDR(0x0A05)
+#define EMA_CFG                         PPE_REG_ADDR(0x0A06)
+#define EMA_SUBID                       PPE_REG_ADDR(0x0A07)
+
+#define EMA_ALIGNMENT                   4
+
+/*
+ *  Mailbox IGU1 Interrupt
+ */
+#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
+
+
+
+#endif  //  IFXMIPS_ATM_PPE_DANUBE_H

package/ifxmips-dsl-api/src/ifxmips_mei_interface.h

@@ -0,0 +1,700 @@
+/******************************************************************************
+
+                               Copyright (c) 2009
+                            Infineon Technologies AG
+                     Am Campeon 1-12; 81726 Munich, Germany
+
+  For licensing information, see the file 'LICENSE' in the root folder of
+  this software module.
+
+******************************************************************************/
+
+#ifndef IFXMIPS_MEI_H
+#define IFXMIPS_MEI_H
+
+#define CONFIG_DANUBE 1
+
+#if !defined(CONFIG_DANUBE) && !defined(CONFIG_AMAZON_SE) && !defined(CONFIG_AR9) && !defined(CONFIG_VR9)
+#error Platform undefined!!!
+#endif
+
+#ifdef IFX_MEI_BSP
+/** This is the character datatype. */
+typedef char            DSL_char_t;
+/** This is the unsigned 8-bit datatype. */
+typedef unsigned char   DSL_uint8_t;
+/** This is the signed 8-bit datatype. */
+typedef signed char     DSL_int8_t;
+/** This is the unsigned 16-bit datatype. */
+typedef unsigned short  DSL_uint16_t;
+/** This is the signed 16-bit datatype. */
+typedef signed short    DSL_int16_t;
+/** This is the unsigned 32-bit datatype. */
+typedef unsigned long   DSL_uint32_t;
+/** This is the signed 32-bit datatype. */
+typedef signed long     DSL_int32_t;
+/** This is the float datatype. */
+typedef float           DSL_float_t;
+/** This is the void datatype. */
+typedef void            DSL_void_t;
+/** integer type, width is depending on processor arch */
+typedef int             DSL_int_t;
+/** unsigned integer type, width is depending on processor arch */
+typedef unsigned int    DSL_uint_t;
+typedef struct file DSL_DRV_file_t;
+typedef struct inode DSL_DRV_inode_t;
+
+/**
+ *    Defines all possible CMV groups
+ *    */
+typedef enum {
+   DSL_CMV_GROUP_CNTL = 1,
+   DSL_CMV_GROUP_STAT = 2,
+   DSL_CMV_GROUP_INFO = 3,
+   DSL_CMV_GROUP_TEST = 4,
+   DSL_CMV_GROUP_OPTN = 5,
+   DSL_CMV_GROUP_RATE = 6,
+   DSL_CMV_GROUP_PLAM = 7,
+   DSL_CMV_GROUP_CNFG = 8
+} DSL_CmvGroup_t;
+/**
+ *    Defines all opcode types
+ *    */
+typedef enum {
+   H2D_CMV_READ = 0x00,
+   H2D_CMV_WRITE = 0x04,
+   H2D_CMV_INDICATE_REPLY = 0x10,
+   H2D_ERROR_OPCODE_UNKNOWN =0x20,
+   H2D_ERROR_CMV_UNKNOWN =0x30,
+
+   D2H_CMV_READ_REPLY =0x01,
+   D2H_CMV_WRITE_REPLY = 0x05,
+   D2H_CMV_INDICATE = 0x11,
+   D2H_ERROR_OPCODE_UNKNOWN = 0x21,
+   D2H_ERROR_CMV_UNKNOWN = 0x31,
+   D2H_ERROR_CMV_READ_NOT_AVAILABLE = 0x41,
+   D2H_ERROR_CMV_WRITE_ONLY = 0x51,
+   D2H_ERROR_CMV_READ_ONLY = 0x61,
+
+   H2D_DEBUG_READ_DM = 0x02,
+   H2D_DEBUG_READ_PM = 0x06,
+   H2D_DEBUG_WRITE_DM = 0x0a,
+   H2D_DEBUG_WRITE_PM = 0x0e,
+
+   D2H_DEBUG_READ_DM_REPLY = 0x03,
+   D2H_DEBUG_READ_FM_REPLY = 0x07,
+   D2H_DEBUG_WRITE_DM_REPLY = 0x0b,
+   D2H_DEBUG_WRITE_FM_REPLY = 0x0f,
+   D2H_ERROR_ADDR_UNKNOWN = 0x33,
+
+   D2H_AUTONOMOUS_MODEM_READY_MSG = 0xf1
+} DSL_CmvOpcode_t;
+
+/* mutex macros */
+#define MEI_MUTEX_INIT(id,flag) \
+        sema_init(&id,flag)
+#define MEI_MUTEX_LOCK(id) \
+        down_interruptible(&id)
+#define MEI_MUTEX_UNLOCK(id) \
+        up(&id)
+#define MEI_WAIT(ms) \
+        {\
+                set_current_state(TASK_INTERRUPTIBLE);\
+                schedule_timeout(ms);\
+        }
+#define MEI_INIT_WAKELIST(name,queue) \
+        init_waitqueue_head(&queue)
+
+/* wait for an event, timeout is measured in ms */
+#define MEI_WAIT_EVENT_TIMEOUT(ev,timeout)\
+        interruptible_sleep_on_timeout(&ev,timeout * HZ / 1000)
+#define MEI_WAKEUP_EVENT(ev)\
+        wake_up_interruptible(&ev)
+#endif /* IFX_MEI_BSP */
+
+/***	Register address offsets, relative to MEI_SPACE_ADDRESS ***/
+#define ME_DX_DATA				(0x0000)
+#define	ME_VERSION				(0x0004)
+#define	ME_ARC_GP_STAT				(0x0008)
+#define ME_DX_STAT				(0x000C)
+#define	ME_DX_AD				(0x0010)
+#define ME_DX_MWS				(0x0014)
+#define	ME_ME2ARC_INT				(0x0018)
+#define	ME_ARC2ME_STAT				(0x001C)
+#define	ME_ARC2ME_MASK 				(0x0020)
+#define	ME_DBG_WR_AD				(0x0024)
+#define ME_DBG_RD_AD				(0x0028)
+#define	ME_DBG_DATA				(0x002C)
+#define	ME_DBG_DECODE				(0x0030)
+#define ME_CONFIG				(0x0034)
+#define	ME_RST_CTRL				(0x0038)
+#define	ME_DBG_MASTER				(0x003C)
+#define	ME_CLK_CTRL				(0x0040)
+#define	ME_BIST_CTRL				(0x0044)
+#define	ME_BIST_STAT				(0x0048)
+#define ME_XDATA_BASE_SH			(0x004c)
+#define ME_XDATA_BASE				(0x0050)
+#define ME_XMEM_BAR_BASE			(0x0054)
+#define ME_XMEM_BAR0				(0x0054)
+#define ME_XMEM_BAR1				(0x0058)
+#define ME_XMEM_BAR2				(0x005C)
+#define ME_XMEM_BAR3				(0x0060)
+#define ME_XMEM_BAR4				(0x0064)
+#define ME_XMEM_BAR5				(0x0068)
+#define ME_XMEM_BAR6				(0x006C)
+#define ME_XMEM_BAR7				(0x0070)
+#define ME_XMEM_BAR8				(0x0074)
+#define ME_XMEM_BAR9				(0x0078)
+#define ME_XMEM_BAR10				(0x007C)
+#define ME_XMEM_BAR11				(0x0080)
+#define ME_XMEM_BAR12				(0x0084)
+#define ME_XMEM_BAR13				(0x0088)
+#define ME_XMEM_BAR14				(0x008C)
+#define ME_XMEM_BAR15				(0x0090)
+#define ME_XMEM_BAR16				(0x0094)
+
+#define WHILE_DELAY 		20000
+/*
+**	Define where in ME Processor's memory map the Stratify chip lives
+*/
+
+#define MAXSWAPSIZE      	(8 * 1024)	//8k *(32bits)
+
+//      Mailboxes
+#define MSG_LENGTH		16	// x16 bits
+#define YES_REPLY      	 	1
+#define NO_REPLY         	0
+
+#define CMV_TIMEOUT		1000	//jiffies
+
+//  Block size per BAR
+#define SDRAM_SEGMENT_SIZE	(64*1024)
+// Number of Bar registers
+#define MAX_BAR_REGISTERS	(17)
+
+#define XDATA_REGISTER		(15)
+
+// ARC register addresss
+#define ARC_STATUS		0x0
+#define ARC_LP_START		0x2
+#define ARC_LP_END		0x3
+#define ARC_DEBUG		0x5
+#define ARC_INT_MASK		0x10A
+
+#define IRAM0_BASE 		(0x00000)
+#define IRAM1_BASE 		(0x04000)
+#if defined(CONFIG_DANUBE)
+#define BRAM_BASE  		(0x0A000)
+#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9)
+#define BRAM_BASE               (0x08000)
+#endif
+#define XRAM_BASE		(0x18000)
+#define YRAM_BASE		(0x1A000)
+#define EXT_MEM_BASE		(0x80000)
+#define ARC_GPIO_CTRL		(0xC030)
+#define ARC_GPIO_DATA		(0xC034)
+
+#define IRAM0_SIZE		(16*1024)
+#define IRAM1_SIZE		(16*1024)
+#define BRAM_SIZE		(12*1024)
+#define XRAM_SIZE		(8*1024)
+#define YRAM_SIZE		(8*1024)
+#define EXT_MEM_SIZE		(1536*1024)
+
+#define ADSL_BASE		(0x20000)
+#define CRI_BASE		(ADSL_BASE + 0x11F00)
+#define CRI_CCR0		(CRI_BASE + 0x00)
+#define CRI_RST			(CRI_BASE + 0x04*4)
+#define ADSL_DILV_BASE 		(ADSL_BASE+0x20000)
+
+//
+#define IRAM0_ADDR_BIT_MASK	0xFFF
+#define IRAM1_ADDR_BIT_MASK	0xFFF
+#define BRAM_ADDR_BIT_MASK	0xFFF
+#define RX_DILV_ADDR_BIT_MASK	0x1FFF
+
+/***  Bit definitions ***/
+#define ARC_AUX_HALT		(1 << 25)
+#define ARC_DEBUG_HALT		(1 << 1)
+#define FALSE			0
+#define TRUE			1
+#define BIT0			(1<<0)
+#define BIT1			(1<<1)
+#define BIT2			(1<<2)
+#define BIT3			(1<<3)
+#define BIT4			(1<<4)
+#define BIT5			(1<<5)
+#define BIT6			(1<<6)
+#define BIT7			(1<<7)
+#define BIT8			(1<<8)
+#define BIT9			(1<<9)
+#define BIT10 			(1<<10)
+#define BIT11			(1<<11)
+#define BIT12			(1<<12)
+#define BIT13			(1<<13)
+#define BIT14			(1<<14)
+#define BIT15			(1<<15)
+#define BIT16 			(1<<16)
+#define BIT17			(1<<17)
+#define BIT18			(1<<18)
+#define BIT19			(1<<19)
+#define BIT20			(1<<20)
+#define BIT21			(1<<21)
+#define BIT22			(1<<22)
+#define BIT23			(1<<23)
+#define BIT24			(1<<24)
+#define BIT25			(1<<25)
+#define BIT26			(1<<26)
+#define BIT27			(1<<27)
+#define BIT28			(1<<28)
+#define BIT29			(1<<29)
+#define BIT30			(1<<30)
+#define BIT31			(1<<31)
+
+// CRI_CCR0 Register definitions
+#define CLK_2M_MODE_ENABLE	BIT6
+#define	ACL_CLK_MODE_ENABLE	BIT4
+#define FDF_CLK_MODE_ENABLE	BIT2
+#define STM_CLK_MODE_ENABLE	BIT0
+
+// CRI_RST Register definitions
+#define FDF_SRST		BIT3
+#define MTE_SRST		BIT2
+#define FCI_SRST		BIT1
+#define AAI_SRST		BIT0
+
+//      MEI_TO_ARC_INTERRUPT Register definitions
+#define	MEI_TO_ARC_INT1		BIT3
+#define	MEI_TO_ARC_INT0		BIT2
+#define MEI_TO_ARC_CS_DONE	BIT1	//need to check
+#define	MEI_TO_ARC_MSGAV	BIT0
+
+//      ARC_TO_MEI_INTERRUPT Register definitions
+#define	ARC_TO_MEI_INT1		BIT8
+#define	ARC_TO_MEI_INT0		BIT7
+#define	ARC_TO_MEI_CS_REQ	BIT6
+#define	ARC_TO_MEI_DBG_DONE	BIT5
+#define	ARC_TO_MEI_MSGACK	BIT4
+#define	ARC_TO_MEI_NO_ACCESS	BIT3
+#define	ARC_TO_MEI_CHECK_AAITX	BIT2
+#define	ARC_TO_MEI_CHECK_AAIRX	BIT1
+#define	ARC_TO_MEI_MSGAV	BIT0
+
+//      ARC_TO_MEI_INTERRUPT_MASK Register definitions
+#define	GP_INT1_EN		BIT8
+#define	GP_INT0_EN		BIT7
+#define	CS_REQ_EN		BIT6
+#define	DBG_DONE_EN		BIT5
+#define	MSGACK_EN		BIT4
+#define	NO_ACC_EN		BIT3
+#define	AAITX_EN		BIT2
+#define	AAIRX_EN		BIT1
+#define	MSGAV_EN		BIT0
+
+#define	MEI_SOFT_RESET		BIT0
+
+#define	HOST_MSTR		BIT0
+
+#define JTAG_MASTER_MODE	0x0
+#define MEI_MASTER_MODE		HOST_MSTR
+
+//      MEI_DEBUG_DECODE Register definitions
+#define MEI_DEBUG_DEC_MASK	(0x3)
+#define MEI_DEBUG_DEC_AUX_MASK	(0x0)
+#define ME_DBG_DECODE_DMP1_MASK	(0x1)
+#define MEI_DEBUG_DEC_DMP2_MASK	(0x2)
+#define MEI_DEBUG_DEC_CORE_MASK	(0x3)
+
+#define AUX_STATUS		(0x0)
+#define AUX_ARC_GPIO_CTRL	(0x10C)
+#define AUX_ARC_GPIO_DATA	(0x10D)
+//      ARC_TO_MEI_MAILBOX[11] is a special location used to indicate
+//      page swap requests.
+#if defined(CONFIG_DANUBE)
+#define OMBOX_BASE      	0xDF80
+#define	ARC_TO_MEI_MAILBOX	0xDFA0
+#define IMBOX_BASE      	0xDFC0
+#define MEI_TO_ARC_MAILBOX	0xDFD0
+#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9)
+#define OMBOX_BASE              0xAF80
+#define ARC_TO_MEI_MAILBOX      0xAFA0
+#define IMBOX_BASE              0xAFC0
+#define MEI_TO_ARC_MAILBOX      0xAFD0
+#endif
+
+#define MEI_TO_ARC_MAILBOXR	(MEI_TO_ARC_MAILBOX + 0x2C)
+#define ARC_MEI_MAILBOXR	(ARC_TO_MEI_MAILBOX + 0x2C)
+#define OMBOX1  		(OMBOX_BASE+0x4)
+
+// Codeswap request messages are indicated by setting BIT31
+#define OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK	(0x80000000)
+
+// Clear Eoc messages received are indicated by setting BIT17
+#define OMB_CLEAREOC_INTERRUPT_CODE		(0x00020000)
+#define OMB_REBOOT_INTERRUPT_CODE               (1 << 18)
+
+/*
+**	Swap page header
+*/
+//      Page must be loaded at boot time if size field has BIT31 set
+#define BOOT_FLAG		(BIT31)
+#define BOOT_FLAG_MASK		~BOOT_FLAG
+
+#define FREE_RELOAD		1
+#define FREE_SHOWTIME		2
+#define FREE_ALL		3
+
+// marcos
+#define	IFX_MEI_WRITE_REGISTER_L(data,addr)	*((volatile u32*)(addr)) = (u32)(data)
+#define IFX_MEI_READ_REGISTER_L(addr) 	(*((volatile u32*)(addr)))
+#define SET_BIT(reg, mask)			reg |= (mask)
+#define CLEAR_BIT(reg, mask)			reg &= (~mask)
+#define CLEAR_BITS(reg, mask)			CLEAR_BIT(reg, mask)
+//#define SET_BITS(reg, mask)			SET_BIT(reg, mask)
+#define SET_BITFIELD(reg, mask, off, val)	{reg &= (~mask); reg |= (val << off);}
+
+#define ALIGN_SIZE				( 1L<<10 )	//1K size align
+#define MEM_ALIGN(addr)				(((addr) + ALIGN_SIZE - 1) & ~ (ALIGN_SIZE -1) )
+
+// swap marco
+#define MEI_HALF_WORD_SWAP(data)		{data = ((data & 0xffff)<<16) + ((data & 0xffff0000)>>16);}
+#define MEI_BYTE_SWAP(data)			{data = ((data & 0xff)<<24) + ((data & 0xff00)<<8)+ ((data & 0xff0000)>>8)+ ((data & 0xff000000)>>24);}
+
+
+#ifdef CONFIG_PROC_FS
+typedef struct reg_entry
+{
+   int *flag;
+   char name[30];               /* big enough to hold names */
+   char description[100];       /* big enough to hold description */
+   unsigned short low_ino;
+} reg_entry_t;
+#endif
+//      Swap page header describes size in 32-bit words, load location, and image offset
+//      for program and/or data segments
+typedef struct _arc_swp_page_hdr {
+	u32 p_offset;		//Offset bytes of progseg from beginning of image
+	u32 p_dest;		//Destination addr of progseg on processor
+	u32 p_size;		//Size in 32-bitwords of program segment
+	u32 d_offset;		//Offset bytes of dataseg from beginning of image
+	u32 d_dest;		//Destination addr of dataseg on processor
+	u32 d_size;		//Size in 32-bitwords of data segment
+} ARC_SWP_PAGE_HDR;
+
+/*
+**	Swap image header
+*/
+#define GET_PROG	0	//      Flag used for program mem segment
+#define GET_DATA	1	//      Flag used for data mem segment
+
+//      Image header contains size of image, checksum for image, and count of
+//      page headers. Following that are 'count' page headers followed by
+//      the code and/or data segments to be loaded
+typedef struct _arc_img_hdr {
+	u32 size;		//      Size of binary image in bytes
+	u32 checksum;		//      Checksum for image
+	u32 count;		//      Count of swp pages in image
+	ARC_SWP_PAGE_HDR page[1];	//      Should be "count" pages - '1' to make compiler happy
+} ARC_IMG_HDR;
+
+typedef struct smmu_mem_info {
+	int type;
+	int boot;
+	unsigned long nCopy;
+	unsigned long size;
+	unsigned char *address;
+	unsigned char *org_address;
+} smmu_mem_info_t;
+
+#ifdef __KERNEL__
+typedef struct ifx_mei_device_private {
+	int modem_ready;
+	int arcmsgav;
+	int cmv_reply;
+	int cmv_waiting;
+	// Mei to ARC CMV count, reply count, ARC Indicator count
+	int modem_ready_cnt;
+	int cmv_count;
+	int reply_count;
+	unsigned long image_size;
+	int nBar;
+	u16 Recent_indicator[MSG_LENGTH];
+
+	u16 CMV_RxMsg[MSG_LENGTH] __attribute__ ((aligned (4)));
+
+	smmu_mem_info_t adsl_mem_info[MAX_BAR_REGISTERS];
+	ARC_IMG_HDR *img_hdr;
+	//  to wait for arc cmv reply, sleep on wait_queue_arcmsgav;
+	wait_queue_head_t wait_queue_arcmsgav;
+	wait_queue_head_t wait_queue_modemready;
+	struct semaphore mei_cmv_sema;
+} ifx_mei_device_private_t;
+#endif
+typedef struct winhost_message {
+	union {
+		u16 RxMessage[MSG_LENGTH] __attribute__ ((aligned (4)));
+		u16 TxMessage[MSG_LENGTH] __attribute__ ((aligned (4)));
+	} msg;
+} DSL_DEV_WinHost_Message_t;
+/********************************************************************************************************
+ * DSL CPE API Driver Stack Interface Definitions
+ * *****************************************************************************************************/
+/** IOCTL codes for bsp driver */
+#define DSL_IOC_MEI_BSP_MAGIC		's'
+
+#define DSL_FIO_BSP_DSL_START		_IO  (DSL_IOC_MEI_BSP_MAGIC, 0)
+#define DSL_FIO_BSP_RUN			_IO  (DSL_IOC_MEI_BSP_MAGIC, 1)
+#define DSL_FIO_BSP_FREE_RESOURCE	_IO  (DSL_IOC_MEI_BSP_MAGIC, 2)
+#define DSL_FIO_BSP_RESET		_IO  (DSL_IOC_MEI_BSP_MAGIC, 3)
+#define DSL_FIO_BSP_REBOOT		_IO  (DSL_IOC_MEI_BSP_MAGIC, 4)
+#define DSL_FIO_BSP_HALT		_IO  (DSL_IOC_MEI_BSP_MAGIC, 5)
+#define DSL_FIO_BSP_BOOTDOWNLOAD	_IO  (DSL_IOC_MEI_BSP_MAGIC, 6)
+#define DSL_FIO_BSP_JTAG_ENABLE		_IO  (DSL_IOC_MEI_BSP_MAGIC, 7)
+#define DSL_FIO_FREE_RESOURCE		_IO  (DSL_IOC_MEI_BSP_MAGIC, 8)
+#define DSL_FIO_ARC_MUX_TEST		_IO  (DSL_IOC_MEI_BSP_MAGIC, 9)
+#define DSL_FIO_BSP_REMOTE		_IOW (DSL_IOC_MEI_BSP_MAGIC, 10, u32)
+#define DSL_FIO_BSP_GET_BASE_ADDRESS	_IOR (DSL_IOC_MEI_BSP_MAGIC, 11, u32)
+#define DSL_FIO_BSP_IS_MODEM_READY	_IOR (DSL_IOC_MEI_BSP_MAGIC, 12, u32)
+#define DSL_FIO_BSP_GET_VERSION		_IOR (DSL_IOC_MEI_BSP_MAGIC, 13, DSL_DEV_Version_t)
+#define DSL_FIO_BSP_CMV_WINHOST		_IOWR(DSL_IOC_MEI_BSP_MAGIC, 14, DSL_DEV_WinHost_Message_t)
+#define DSL_FIO_BSP_CMV_READ		_IOWR(DSL_IOC_MEI_BSP_MAGIC, 15, DSL_DEV_MeiReg_t)
+#define DSL_FIO_BSP_CMV_WRITE		_IOW (DSL_IOC_MEI_BSP_MAGIC, 16, DSL_DEV_MeiReg_t)
+#define DSL_FIO_BSP_DEBUG_READ		_IOWR(DSL_IOC_MEI_BSP_MAGIC, 17, DSL_DEV_MeiDebug_t)
+#define DSL_FIO_BSP_DEBUG_WRITE		_IOWR(DSL_IOC_MEI_BSP_MAGIC, 18, DSL_DEV_MeiDebug_t)
+#define DSL_FIO_BSP_GET_CHIP_INFO	_IOR (DSL_IOC_MEI_BSP_MAGIC, 19, DSL_DEV_HwVersion_t)
+
+#define DSL_DEV_MEIDEBUG_BUFFER_SIZES	512
+
+typedef struct DSL_DEV_MeiDebug
+{
+	DSL_uint32_t iAddress;
+	DSL_uint32_t iCount;
+	DSL_uint32_t buffer[DSL_DEV_MEIDEBUG_BUFFER_SIZES];
+} DSL_DEV_MeiDebug_t;			/* meidebug */
+
+/**
+ *    Structure is used for debug access only.
+ *       Refer to configure option INCLUDE_ADSL_WINHOST_DEBUG */
+typedef struct struct_meireg
+{
+	/*
+	*       Specifies that address for debug access */
+	unsigned long iAddress;
+	/*
+	*       Specifies the pointer to the data that has to be written or returns a
+	*             pointer to the data that has been read out*/
+	unsigned long iData;
+} DSL_DEV_MeiReg_t;					/* meireg */
+
+typedef struct DSL_DEV_Device
+{
+	DSL_int_t nInUse;                /* modem state, update by bsp driver, */
+	DSL_void_t *pPriv;
+	DSL_uint32_t base_address;       /* mei base address */
+	DSL_int_t nIrq[2];                  /* irq number */
+#define IFX_DFEIR		0
+#define IFX_DYING_GASP	1
+	DSL_DEV_MeiDebug_t lop_debugwr;  /* dying gasp */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0))
+	struct module *owner;
+#endif
+} DSL_DEV_Device_t;			/* ifx_adsl_device_t */
+
+#define DSL_DEV_PRIVATE(dev)  ((ifx_mei_device_private_t*)(dev->pPriv))
+
+typedef struct DSL_DEV_Version		/* ifx_adsl_bsp_version */
+{
+	unsigned long major;
+	unsigned long minor;
+	unsigned long revision;
+} DSL_DEV_Version_t;			/* ifx_adsl_bsp_version_t */
+
+typedef struct DSL_DEV_ChipInfo
+{
+	unsigned long major;
+	unsigned long minor;
+} DSL_DEV_HwVersion_t;
+
+typedef struct
+{
+	DSL_uint8_t dummy;
+} DSL_DEV_DeviceConfig_t;
+
+/** error code definitions */
+typedef enum DSL_DEV_MeiError
+{
+	DSL_DEV_MEI_ERR_SUCCESS = 0,
+	DSL_DEV_MEI_ERR_FAILURE = -1,
+	DSL_DEV_MEI_ERR_MAILBOX_FULL = -2,
+	DSL_DEV_MEI_ERR_MAILBOX_EMPTY = -3,
+	DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT = -4
+} DSL_DEV_MeiError_t;			/* MEI_ERROR */
+
+typedef enum {
+	DSL_BSP_MEMORY_READ=0,
+	DSL_BSP_MEMORY_WRITE,
+} DSL_BSP_MemoryAccessType_t;		/* ifx_adsl_memory_access_type_t */
+
+typedef enum
+{
+	DSL_LED_LINK_ID=0,
+	DSL_LED_DATA_ID
+} DSL_DEV_LedId_t;			/* ifx_adsl_led_id_t */
+
+typedef enum
+{
+	DSL_LED_LINK_TYPE=0,
+	DSL_LED_DATA_TYPE
+} DSL_DEV_LedType_t;			/* ifx_adsl_led_type_t */
+
+typedef enum
+{
+	DSL_LED_HD_CPU=0,
+	DSL_LED_HD_FW
+} DSL_DEV_LedHandler_t;			/* ifx_adsl_led_handler_t */
+
+typedef enum {
+	DSL_LED_ON=0,
+	DSL_LED_OFF,
+	DSL_LED_FLASH,
+} DSL_DEV_LedMode_t;			/* ifx_adsl_led_mode_t */
+
+typedef enum {
+	DSL_CPU_HALT=0,
+	DSL_CPU_RUN,
+	DSL_CPU_RESET,
+} DSL_DEV_CpuMode_t;			/* ifx_adsl_cpu_mode_t */
+
+#if 0
+typedef enum {
+	DSL_BSP_EVENT_DYING_GASP = 0,
+	DSL_BSP_EVENT_CEOC_IRQ,
+} DSL_BSP_Event_id_t;			/* ifx_adsl_event_id_t */
+
+typedef union DSL_BSP_CB_Param
+{
+	DSL_uint32_t nIrqMessage;
+} DSL_BSP_CB_Param_t;			/* ifx_adsl_cbparam_t */
+
+typedef struct DSL_BSP_CB_Event
+{
+	DSL_BSP_Event_id_t nID;
+	DSL_DEV_Device_t *pDev;
+	DSL_BSP_CB_Param_t *pParam;
+} DSL_BSP_CB_Event_t;			/* ifx_adsl_cb_event_t */
+#endif
+
+/* external functions (from the BSP Driver) */
+extern DSL_DEV_Device_t* DSL_BSP_DriverHandleGet(int, int);
+extern DSL_int_t DSL_BSP_DriverHandleDelete(DSL_DEV_Device_t *);
+extern DSL_DEV_MeiError_t DSL_BSP_FWDownload(DSL_DEV_Device_t *, const DSL_char_t *, DSL_uint32_t, DSL_int32_t *, DSL_int32_t *);
+extern int DSL_BSP_KernelIoctls(DSL_DEV_Device_t *, unsigned int, unsigned long);
+extern DSL_DEV_MeiError_t DSL_BSP_SendCMV(DSL_DEV_Device_t *, DSL_uint16_t *, DSL_int_t, DSL_uint16_t *);
+extern DSL_DEV_MeiError_t DSL_BSP_AdslLedInit(DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedType_t, DSL_DEV_LedHandler_t);
+extern DSL_DEV_MeiError_t DSL_BSP_Showtime(DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t);
+extern int DSL_BSP_ATMLedCBRegister( int (*ifx_adsl_ledcallback)(void));
+extern DSL_DEV_MeiError_t DSL_BSP_MemoryDebugAccess(DSL_DEV_Device_t *, DSL_BSP_MemoryAccessType_t, DSL_uint32_t, DSL_uint32_t *, DSL_uint32_t);
+extern volatile DSL_DEV_Device_t *adsl_dev;
+
+/**
+ *    Dummy structure by now to show mechanism of extended data that will be
+ *       provided within event callback itself.
+ *       */
+typedef struct
+{
+	/**
+	*    Dummy value */
+	DSL_uint32_t nDummy1;
+} DSL_BSP_CB_Event1DataDummy_t;
+
+/**
+ *    Dummy structure by now to show mechanism of extended data that will be
+ *       provided within event callback itself.
+ *       */
+typedef struct
+{
+	/**
+	*    Dummy value */
+	DSL_uint32_t nDummy2;
+} DSL_BSP_CB_Event2DataDummy_t;
+
+/**
+ *    encapsulate all data structures that are necessary for status event
+ *       callbacks.
+ *       */
+typedef union
+{
+	DSL_BSP_CB_Event1DataDummy_t dataEvent1;
+	DSL_BSP_CB_Event2DataDummy_t dataEvent2;
+} DSL_BSP_CB_DATA_Union_t;
+
+
+typedef enum
+{
+	/**
+	 *    Informs the upper layer driver (DSL CPE API) about a reboot request from the
+	 *       firmware.
+	 *          \note This event does NOT include any additional data.
+	 *                   More detailed information upon reboot reason has to be requested from
+	 *                            upper layer software via CMV (INFO 109) if necessary. */
+	DSL_BSP_CB_FIRST = 0,
+        DSL_BSP_CB_DYING_GASP,
+	DSL_BSP_CB_CEOC_IRQ,
+	DSL_BSP_CB_FIRMWARE_REBOOT,
+	/**
+	 *    Delimiter only */
+	DSL_BSP_CB_LAST
+} DSL_BSP_CB_Type_t;
+
+/**
+ *    Specifies the common event type that has to be used for registering and
+ *       signalling of interrupts/autonomous status events from MEI BSP Driver.
+ *
+ *    \param pDev
+ *    Context pointer from MEI BSP Driver.
+ *
+ *    \param IFX_ADSL_BSP_CallbackType_t
+ *    Specifies the event callback type (reason of callback). Regrading to the
+ *    setting of this value the data which is included in the following union
+ *    might have different meanings.
+ *    Please refer to the description of the union to get information about the
+ *    meaning of the included data.
+ *
+ *    \param pData
+ *    Data according to \ref DSL_BSP_CB_DATA_Union_t.
+ *    If this pointer is NULL there is no additional data available.
+ *
+ *    \return depending on event
+ */
+typedef int (*DSL_BSP_EventCallback_t)
+(
+	DSL_DEV_Device_t *pDev,
+	DSL_BSP_CB_Type_t nCallbackType,
+	DSL_BSP_CB_DATA_Union_t *pData
+);
+
+typedef struct {
+        DSL_BSP_EventCallback_t function;
+        DSL_BSP_CB_Type_t       event;
+        DSL_BSP_CB_DATA_Union_t *pData;
+} DSL_BSP_EventCallBack_t;
+
+extern int DSL_BSP_EventCBRegister(DSL_BSP_EventCallBack_t *);
+extern int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *);
+
+/** Modem states */
+#define DSL_DEV_STAT_InitState              0x0000
+#define DSL_DEV_STAT_ReadyState             0x0001
+#define DSL_DEV_STAT_FailState              0x0002
+#define DSL_DEV_STAT_IdleState              0x0003
+#define DSL_DEV_STAT_QuietState             0x0004
+#define DSL_DEV_STAT_GhsState               0x0005
+#define DSL_DEV_STAT_FullInitState          0x0006
+#define DSL_DEV_STAT_ShowTimeState          0x0007
+#define DSL_DEV_STAT_FastRetrainState       0x0008
+#define DSL_DEV_STAT_LoopDiagMode           0x0009
+#define DSL_DEV_STAT_ShortInit              0x000A     /* Bis short initialization */
+
+#define DSL_DEV_STAT_CODESWAP_COMPLETE	    0x0002
+
+#endif //IFXMIPS_MEI_H

package/ifxmips-dsl-control/Makefile

@@ -0,0 +1,84 @@
+#
+# Copyright (C) 2009 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+# ralph / blogic
+
+include $(TOPDIR)/rules.mk
+
+PKG_BASE_NAME:=dsl_cpe_control_danube
+PKG_VERSION:=3.24.4.4
+PKG_SOURCE:=$(PKG_BASE_NAME)-$(PKG_VERSION).tar.gz
+PKG_BUILD_DIR:=$(BUILD_DIR)/dsl_cpe_control-$(PKG_VERSION)
+PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
+PKG_MD5SUM:=ee315306626b68794d3d3636dabfe161
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/ifxmips-dsl-control
+  SECTION:=net
+  CATEGORY:=Network
+  TITLE:=DSL CPE control application
+  URL:=http://www.infineon.com/
+  MAINTAINER:=Infineon Technologies AG / Lantiq / blogic@openwrt.org
+  DEPENDS:=+kmod-ifxmips-dsl-api +libpthread
+endef
+
+define Package/ifxmips-dsl-control/description
+	Infineon DSL CPE API for Amazon SE, Danube and Vinax.
+	This package contains the DSL CPE control application for Amazon SE & Danube.
+	
+	Supported Devices:
+		- Amazon SE
+		- Danube 
+
+	This package was kindly contributed to openwrt by Infineon/Lantiq
+endef
+
+IFX_DSL_MAX_DEVICE=1
+IFX_DSL_LINES_PER_DEVICE=1
+IFX_DSL_CHANNELS_PER_LINE=1
+#CONFIG_IFX_CLI=y
+
+CONFIGURE_ARGS += \
+	--with-max-device="$(IFX_DSL_MAX_DEVICE)" \
+	--with-lines-per-device="$(IFX_DSL_LINES_PER_DEVICE)" \
+	--with-channels-per-line="$(IFX_DSL_CHANNELS_PER_LINE)" \
+	--enable-danube \
+	--enable-driver-include="-I$(STAGING_DIR)/usr/include" \
+	--enable-debug-prints \
+	--enable-add-appl-cflags="-DMAX_CLI_PIPES=2" \
+	--enable-cmv-scripts \
+	--enable-debug-tool-interface \
+	--enable-adsl-led \
+	--enable-dsl-ceoc \
+	--enable-script-notification \
+	--enable-dsl-pm \
+	--enable-dsl-pm-total \
+	--enable-dsl-pm-history \
+	--enable-dsl-pm-showtime \
+	--enable-dsl-pm-channel-counters \
+	--enable-dsl-pm-datapath-counters \
+	--enable-dsl-pm-line-counters \
+	--enable-dsl-pm-channel-thresholds \
+	--enable-dsl-pm-datapath-thresholds \
+	--enable-dsl-pm-line-thresholds \
+	--enable-dsl-pm-optional-parameters
+
+ifeq ($(CONFIG_IFX_CLI),y)
+CONFIGURE_ARGS += \
+	--enable-cli-support \
+	--enable-soap-support
+endif
+
+define Package/ifxmips-dsl-control/install
+	$(INSTALL_DIR) $(1)/etc/init.d
+	$(INSTALL_BIN) ./files/ifx_cpe_control_init.sh $(1)/etc/init.d/
+
+	$(INSTALL_DIR) $(1)/sbin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/src/dsl_cpe_control $(1)/sbin
+endef
+
+$(eval $(call BuildPackage,ifxmips-dsl-control))

package/ifxmips-dsl-control/files/ifx_cpe_control_init.sh

@@ -0,0 +1,21 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2008 OpenWrt.org
+START=99
+
+start() {
+
+	# start CPE dsl daemon in the background
+	/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bin &
+
+#	PS=`ps`
+#	echo $PS | grep -q dsl_cpe_control && {
+#		# workaround for nfs: allow write to pipes for non-root
+#		while [ ! -e /tmp/pipe/dsl_cpe1_ack ] ; do sleep 1; done
+#		chmod a+w /tmp/pipe/dsl_*
+#	}
+	echo $PS | grep -q dsl_cpe_control || {
+		echo "Start of dsl_cpe_control failed!!!"
+		false
+	}
+
+}

package/iproute2/Makefile

@@ -41,7 +41,6 @@ $(call Package/iproute2/Default)
 endef
 
 define Build/Configure
-	$(SED) "s:-O2:${TARGET_CFLAGS}:g" $(PKG_BUILD_DIR)/Makefile
 	$(SED) "s,-I/usr/include/db3,," $(PKG_BUILD_DIR)/Makefile
 	$(SED) "s,^KERNEL_INCLUDE.*,KERNEL_INCLUDE=$(LINUX_DIR)/include," \
 		$(PKG_BUILD_DIR)/Makefile
@@ -52,9 +51,15 @@ define Build/Configure
 	$(SED) "s, misc,," $(PKG_BUILD_DIR)/Makefile
 endef
 
+MAKE_FLAGS += \
+	EXTRA_CCOPTS="$(TARGET_CFLAGS)" \
+	KERNEL_INCLUDE="$(LINUX_DIR)/include" \
+	FPIC="$(FPIC)" \
+	all tc/tc ip/ip
+
 define Build/Compile
-	$(MAKE) -C $(PKG_BUILD_DIR)/netem HOSTCC="$(HOSTCC)" CFLAGS="-D_GNU_SOURCE -O2 -Wstrict-prototypes -Wall -I ../include -DRESOLVE_HOSTNAMES"
-	$(MAKE) -C $(PKG_BUILD_DIR) $(TARGET_CONFIGURE_OPTS) KERNEL_INCLUDE=$(LINUX_DIR)/include all tc/tc ip/ip
+	$(MAKE) -C $(PKG_BUILD_DIR)/netem HOSTCC="$(HOSTCC)" EXTRA_CCOPTS="$(TARGET_CFLAGS)" CFLAGS="-D_GNU_SOURCE -O2 -Wstrict-prototypes -Wall -I ../include -DRESOLVE_HOSTNAMES"
+	$(Build/Compile/Default)
 endef
 
 define Build/InstallDev

package/iproute2/patches/110-extra-ccopts.patch

@@ -0,0 +1,11 @@
+--- ./Makefile.old	2009-10-18 21:14:18.344641842 +0200
++++ ./Makefile	2009-10-18 21:14:33.558618672 +0200
+@@ -22,7 +22,7 @@
+ 
+ CC = gcc
+ HOSTCC = gcc
+-CCOPTS = -D_GNU_SOURCE -O2 -Wstrict-prototypes -Wall
++CCOPTS = -D_GNU_SOURCE -O2 -Wstrict-prototypes -Wall $(EXTRA_CCOPTS)
+ CFLAGS = $(CCOPTS) -I../include $(DEFINES)
+ YACCFLAGS = -d -t -v
+ 

package/iproute2/patches/120-libnetlink-pic.patch

@@ -0,0 +1,7 @@
+--- a/lib/Makefile
++++ b/lib/Makefile
+@@ -1,3 +1,4 @@
++CFLAGS+=$(FPIC)
+ 
+ UTILOBJ=utils.o rt_names.o ll_types.o ll_proto.o ll_addr.o inet_proto.o
+ 

package/iptables/Makefile

@@ -19,11 +19,7 @@ PKG_SOURCE_URL:=http://www.netfilter.org/projects/iptables/files \
 	ftp://ftp.de.netfilter.org/pub/netfilter/iptables/ \
 	ftp://ftp.no.netfilter.org/pub/netfilter/iptables/
 
-ifeq ($(CONFIG_EXTERNAL_KERNEL_TREE),)
-PATCH_DIR:=
-else
 PATCH_DIR:=./patches/$(PKG_VERSION)
-endif
 
 PKG_FIXUP = libtool
 

package/iw/Makefile

@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=iw
-PKG_VERSION:=0.9.17
+PKG_VERSION:=0.9.18
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=http://wireless.kernel.org/download/iw/
-PKG_MD5SUM:=427841093ac11c5cbc025a3e13aac139
+PKG_MD5SUM:=9734080d8a5c4b768c5e0da665a48950
 PKG_BUILD_DEPENDS:=mac80211
 
 include $(INCLUDE_DIR)/package.mk

package/kernel/modules/block.mk

@@ -10,7 +10,7 @@ BLOCK_MENU:=Block Devices
 define KernelPackage/ata-core
   SUBMENU:=$(BLOCK_MENU)
   TITLE:=Serial and Parallel ATA support
-  DEPENDS:=@PCI_SUPPORT @LINUX_2_6 +kmod-scsi-core
+  DEPENDS:=@PCI_SUPPORT @LINUX_2_6 +kmod-scsi-core @!TARGET_ubicom32
   KCONFIG:=CONFIG_ATA
   FILES:=$(LINUX_DIR)/drivers/ata/libata.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,21,libata)

package/kernel/modules/crypto.mk

@@ -108,7 +108,7 @@ $(eval $(call KernelPackage,crypto-hw-geode))
 define KernelPackage/crypto-hw-hifn-795x
   SUBMENU:=$(CRYPTO_MENU)
   TITLE:=HIFN 795x crypto accelerator
-  DEPENDS:=+kmod-crypto-core +kmod-crypto-des
+  DEPENDS:=+kmod-crypto-core +kmod-crypto-des @!TARGET_ubicom32
   KCONFIG:= \
 	CONFIG_CRYPTO_HW=y \
 	CONFIG_CRYPTO_DEV_HIFN_795X \

package/kernel/modules/fs.mk

@@ -82,7 +82,7 @@ define KernelPackage/fs-ext2
   KCONFIG:=CONFIG_EXT2_FS
   DEPENDS:=$(if $(DUMP)$(CONFIG_FS_MBCACHE),+kmod-fs-mbcache)
   FILES:=$(LINUX_DIR)/fs/ext2/ext2.$(LINUX_KMOD_SUFFIX)
-  AUTOLOAD:=$(call AutoLoad,30,ext2)
+  AUTOLOAD:=$(call AutoLoad,32,ext2)
 endef
 
 define KernelPackage/fs-ext2/description
@@ -102,7 +102,7 @@ define KernelPackage/fs-ext3
   FILES:= \
 	$(LINUX_DIR)/fs/ext3/ext3.$(LINUX_KMOD_SUFFIX) \
 	$(LINUX_DIR)/fs/jbd/jbd.$(LINUX_KMOD_SUFFIX)
-  AUTOLOAD:=$(call AutoLoad,30,jbd ext3)
+  AUTOLOAD:=$(call AutoLoad,31,jbd ext3)
 endef
 
 define KernelPackage/fs-ext3/description
@@ -364,7 +364,7 @@ define KernelPackage/fs-btrfs
 	CONFIG_BTRFS_FS \
 	CONFIG_BTRFS_FS_POSIX_ACL=n
   # for crc32c
-  DEPENDS:=+kmod-crypto-core @!LINUX_2_6_21&&!LINUX_2_6_25&&!LINUX_2_6_27&&!LINUX_2_6_28
+  DEPENDS:=+kmod-crypto-core @!LINUX_2_6_21&&!LINUX_2_6_25&&!LINUX_2_6_28
   FILES:=\
 	$(LINUX_DIR)/crypto/crc32c.$(LINUX_KMOD_SUFFIX) \
 	$(LINUX_DIR)/lib/libcrc32c.$(LINUX_KMOD_SUFFIX) \

package/kernel/modules/netdevices.mk

@@ -113,7 +113,7 @@ $(eval $(call KernelPackage,via-rhine))
 define KernelPackage/via-velocity
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=VIA Velocity Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@TARGET_ixp4xx||TARGET_x86
+  DEPENDS:=@TARGET_ixp4xx||TARGET_mpc83xx||TARGET_x86
   KCONFIG:=CONFIG_VIA_VELOCITY
   FILES:=$(LINUX_DIR)/drivers/net/via-velocity.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,50,via-velocity)
@@ -201,9 +201,10 @@ $(eval $(call KernelPackage,e100))
 define KernelPackage/e1000
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=Intel(R) PRO/1000 PCI cards kernel support
-  DEPENDS:=@TARGET_x86
+  DEPENDS:=@PCI_SUPPORT
   KCONFIG:=CONFIG_E1000 \
-    CONFIG_E1000_DISABLE_PACKET_SPLIT=n
+    CONFIG_E1000_DISABLE_PACKET_SPLIT=n \
+    CONFIG_E1000_NAPI=y
   FILES:=$(LINUX_DIR)/drivers/net/e1000/e1000.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,50,e1000)
 endef
@@ -289,7 +290,7 @@ define KernelPackage/tg3
   TITLE:=Broadcom Tigon3 Gigabit Ethernet
   FILES:=$(LINUX_DIR)/drivers/net/tg3.$(LINUX_KMOD_SUFFIX)
   KCONFIG:=CONFIG_TIGON3
-  DEPENDS:=@LINUX_2_6 +LINUX_2_6_27||LINUX_2_6_28||LINUX_2_6_30||LINUX_2_6_31:kmod-libphy
+  DEPENDS:=@LINUX_2_6 +LINUX_2_6_28||LINUX_2_6_30||LINUX_2_6_31:kmod-libphy @!TARGET_ubicom32
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   AUTOLOAD:=$(call AutoLoad,50,tg3)
 endef

package/kernel/modules/netsupport.mk

@@ -473,7 +473,7 @@ $(eval $(call KernelPackage,pppoa))
 define KernelPackage/pppol2tp
   SUBMENU:=$(NETWORK_SUPPORT_MENU)
   TITLE:=PPPoL2TP support
-  DEPENDS:=kmod-ppp +kmod-pppoe @!LINUX_2_6_21||!LINUX_2_6_25||!LINUX_2_6_27
+  DEPENDS:=kmod-ppp +kmod-pppoe @!LINUX_2_6_21||!LINUX_2_6_25
   KCONFIG:=CONFIG_PPPOL2TP
   FILES:=$(LINUX_DIR)/drivers/net/pppol2tp.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,40,pppol2tp)

package/kernel/modules/other.mk

@@ -229,7 +229,7 @@ $(eval $(call KernelPackage,pcmcia-serial))
 define KernelPackage/ssb
   SUBMENU:=$(OTHER_MENU)
   TITLE:=Silicon Sonics Backplane glue code
-  DEPENDS:=@LINUX_2_6 @PCI_SUPPORT @!TARGET_brcm47xx||!TARGET_brcm63xx
+  DEPENDS:=@LINUX_2_6 @PCI_SUPPORT @!TARGET_brcm47xx @!TARGET_brcm63xx
   KCONFIG:=\
 	CONFIG_SSB \
 	CONFIG_SSB_B43_PCI_BRIDGE=y \
@@ -255,7 +255,7 @@ $(eval $(call KernelPackage,ssb))
 define KernelPackage/bluetooth
   SUBMENU:=$(OTHER_MENU)
   TITLE:=Bluetooth support
-  DEPENDS:=@USB_SUPPORT +kmod-usb-core +kmod-input-core
+  DEPENDS:=@USB_SUPPORT +kmod-usb-core +kmod-hid
   KCONFIG:= \
 	CONFIG_BLUEZ \
 	CONFIG_BLUEZ_L2CAP \
@@ -419,6 +419,21 @@ endef
 
 $(eval $(call KernelPackage,softdog))
 
+define KernelPackage/rdc321x-wdt
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RDC321x watchdog
+  DEPENDS:=@TARGET_rdc
+  KCONFIG:=CONFIG_RDC321X_WDT
+  FILES:=$(LINUX_DIR)/drivers/$(WATCHDOG_DIR)/rdc321x_wdt.$(LINUX_KMOD_SUFFIX)
+  AUTOLOAD:=$(call AutoLoad,50,rdc321_wdt)
+endef
+
+define KernelPackage/rdc321x-wdt/description
+  RDC-321x watchdog driver
+endef
+
+$(eval $(call KernelPackage,rdc321x-wdt))
+
 
 define KernelPackage/leds-gpio
   SUBMENU:=$(OTHER_MENU)
@@ -489,9 +504,9 @@ define KernelPackage/leds-alix
   SUBMENU:=$(OTHER_MENU)
   TITLE:=PCengines ALIX LED support
   DEPENDS:=@TARGET_x86
-  KCONFIG:=CONFIG_LEDS_ALIX
-  FILES:=$(LINUX_DIR)/drivers/leds/leds-alix.$(LINUX_KMOD_SUFFIX)
-  AUTOLOAD:=$(call AutoLoad,50,leds-alix)
+  KCONFIG:=CONFIG_LEDS_ALIX2
+  FILES:=$(LINUX_DIR)/drivers/leds/leds-alix2.$(LINUX_KMOD_SUFFIX)
+  AUTOLOAD:=$(call AutoLoad,50,leds-alix2)
 endef
 
 define KernelPackage/leds-alix/description

package/kernel/modules/sound.mk

@@ -24,7 +24,8 @@ define KernelPackage/sound-core
 	CONFIG_SND_SEQUENCER_OSS=y \
 	CONFIG_HOSTAUDIO \
 	CONFIG_SND_PCM_OSS \
-	CONFIG_SND_MIXER_OSS
+	CONFIG_SND_MIXER_OSS \
+	CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 endef
 
 define KernelPackage/sound-core/2.4

package/kernel/modules/video.mk

@@ -13,6 +13,7 @@ define KernelPackage/video-core
   TITLE=Video4Linux support
   DEPENDS:=@PCI_SUPPORT||USB_SUPPORT
   KCONFIG:= \
+	CONFIG_MEDIA_SUPPORT=m \
 	CONFIG_VIDEO_DEV \
 	CONFIG_VIDEO_V4L1=y \
 	CONFIG_VIDEO_CAPTURE_DRIVERS=y \
@@ -184,7 +185,7 @@ define KernelPackage/video-gspca-core
   SUBMENU:=$(VIDEO_MENU)
   MENU:=1
   TITLE:=GSPCA webcam core support framework
-  DEPENDS:=@LINUX_2_6 @!LINUX_2_6_21 @!LINUX_2_6_25 @!LINUX_2_6_27 @USB_SUPPORT +kmod-usb-core +kmod-video-core
+  DEPENDS:=@LINUX_2_6 @!LINUX_2_6_21 @!LINUX_2_6_25 @USB_SUPPORT +kmod-usb-core +kmod-video-core
   KCONFIG:=CONFIG_USB_GSPCA
   FILES:=$(LINUX_DIR)/drivers/media/video/gspca/gspca_main.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,70,gspca_main)

package/kernel/modules/wireless.mk

@@ -12,7 +12,7 @@ WIRELESS_MENU:=Wireless Drivers
 define KernelPackage/ieee80211
   SUBMENU:=$(WIRELESS_MENU)
   TITLE:=802.11 Networking stack
-  DEPENDS:=+kmod-crypto-arc4 +kmod-crypto-aes +kmod-crypto-michael-mic @LINUX_2_4||@LINUX_2_6_21||LINUX_2_6_23||LINUX_2_6_24||LINUX_2_6_25||LINUX_2_6_26||LINUX_2_6_27||LINUX_2_6_28
+  DEPENDS:=+kmod-crypto-arc4 +kmod-crypto-aes +kmod-crypto-michael-mic @LINUX_2_4||@LINUX_2_6_21||LINUX_2_6_23||LINUX_2_6_24||LINUX_2_6_25||LINUX_2_6_26||LINUX_2_6_28
   KCONFIG:= \
 	CONFIG_IEEE80211 \
 	CONFIG_IEEE80211_CRYPT_WEP \

package/lua/Makefile

@@ -18,7 +18,10 @@ PKG_SOURCE_URL:=http://www.lua.org/ftp/ \
 	http://www.tecgraf.puc-rio.br/lua/ftp/
 PKG_MD5SUM:=d0870f2de55d59c1c8419f36e8fac150
 
+HOST_PATCH_DIR := ./patches-host
+
 include $(INCLUDE_DIR)/package.mk
+include $(INCLUDE_DIR)/host-build.mk
 
 define Package/lua/Default
   SUBMENU:=Lua
@@ -108,6 +111,32 @@ define Build/Compile
 		install
 endef
 
+define Host/Configure
+	$(SED) 's,"/usr/local/","$(STAGING_DIR_HOST)/",' $(HOST_BUILD_DIR)/src/luaconf.h
+endef
+
+ifeq ($(HOST_OS),Darwin)
+	LUA_OS:=macosx
+else
+	ifeq ($(HOST_OS),FreeBSD)
+		LUA_OS:=freebsd
+	else
+		LUA_OS:=linux
+	endif
+endif
+
+define Host/Compile
+	$(MAKE) -C $(HOST_BUILD_DIR) \
+		CC="$(HOSTCC) -std=gnu99" \
+		$(LUA_OS)
+endef
+
+define Host/Install
+	$(MAKE) -C $(HOST_BUILD_DIR) \
+		INSTALL_TOP="$(STAGING_DIR_HOST)" \
+		install
+endef
+
 define Build/InstallDev
 	$(INSTALL_DIR) $(1)/usr/include
 	$(CP) $(PKG_INSTALL_DIR)/usr/include/lua{,lib,conf}.h $(1)/usr/include/
@@ -145,3 +174,5 @@ $(eval $(call BuildPackage,liblua))
 $(eval $(call BuildPackage,lua))
 $(eval $(call BuildPackage,luac))
 $(eval $(call BuildPackage,lua-examples))
+$(eval $(call HostBuild))
+

package/lua/patches-host/010-lua-5.1.3-lnum-full-260308.patch

@@ -1887,7 +1887,7 @@ Index: lua-5.1.4/src/lnum_config.h
 +** Default number modes
 +*/
 +#if (!defined LNUM_DOUBLE) && (!defined LNUM_FLOAT) && (!defined LNUM_LDOUBLE)
-+# define LNUM_DOUBLE
++# define LNUM_FLOAT
 +#endif
 +#if (!defined LNUM_INT16) && (!defined LNUM_INT32) && (!defined LNUM_INT64)
 +# define LNUM_INT32

package/lua/patches-host/020-shared_liblua.patch

@@ -1,154 +0,0 @@
-Index: lua-5.1.4/Makefile
-===================================================================
---- lua-5.1.4.orig/Makefile	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/Makefile	2008-08-24 16:48:42.000000000 +0200
-@@ -42,8 +42,8 @@
- 
- # What to install.
- TO_BIN= lua luac
--TO_INC= lua.h luaconf.h lualib.h lauxlib.h ../etc/lua.hpp
--TO_LIB= liblua.a
-+TO_INC= lua.h luaconf.h lualib.h lauxlib.h ../etc/lua.hpp lnum_config.h
-+TO_LIB= liblua.a liblua.so.$R
- TO_MAN= lua.1 luac.1
- 
- # Lua version and release.
-@@ -63,6 +63,7 @@
- 	cd src && $(INSTALL_EXEC) $(TO_BIN) $(INSTALL_BIN)
- 	cd src && $(INSTALL_DATA) $(TO_INC) $(INSTALL_INC)
- 	cd src && $(INSTALL_DATA) $(TO_LIB) $(INSTALL_LIB)
-+	ln -s liblua.so.$R $(INSTALL_LIB)/liblua.so
- 	cd doc && $(INSTALL_DATA) $(TO_MAN) $(INSTALL_MAN)
- 
- ranlib:
-Index: lua-5.1.4/src/ldo.h
-===================================================================
---- lua-5.1.4.orig/src/ldo.h	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/src/ldo.h	2008-08-24 16:48:42.000000000 +0200
-@@ -46,7 +46,7 @@
- LUAI_FUNC int luaD_poscall (lua_State *L, StkId firstResult);
- LUAI_FUNC void luaD_reallocCI (lua_State *L, int newsize);
- LUAI_FUNC void luaD_reallocstack (lua_State *L, int newsize);
--LUAI_FUNC void luaD_growstack (lua_State *L, int n);
-+LUA_API void luaD_growstack (lua_State *L, int n);
- 
- LUAI_FUNC void luaD_throw (lua_State *L, int errcode);
- LUAI_FUNC int luaD_rawrunprotected (lua_State *L, Pfunc f, void *ud);
-Index: lua-5.1.4/src/lfunc.h
-===================================================================
---- lua-5.1.4.orig/src/lfunc.h	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/src/lfunc.h	2008-08-24 16:48:42.000000000 +0200
-@@ -18,7 +18,7 @@
-                          cast(int, sizeof(TValue *)*((n)-1)))
- 
- 
--LUAI_FUNC Proto *luaF_newproto (lua_State *L);
-+LUA_API Proto *luaF_newproto (lua_State *L);
- LUAI_FUNC Closure *luaF_newCclosure (lua_State *L, int nelems, Table *e);
- LUAI_FUNC Closure *luaF_newLclosure (lua_State *L, int nelems, Table *e);
- LUAI_FUNC UpVal *luaF_newupval (lua_State *L);
-Index: lua-5.1.4/src/lmem.h
-===================================================================
---- lua-5.1.4.orig/src/lmem.h	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/src/lmem.h	2008-08-24 16:48:42.000000000 +0200
-@@ -38,9 +38,9 @@
-    ((v)=cast(t *, luaM_reallocv(L, v, oldn, n, sizeof(t))))
- 
- 
--LUAI_FUNC void *luaM_realloc_ (lua_State *L, void *block, size_t oldsize,
-+LUA_API void *luaM_realloc_ (lua_State *L, void *block, size_t oldsize,
-                                                           size_t size);
--LUAI_FUNC void *luaM_toobig (lua_State *L);
-+LUA_API void *luaM_toobig (lua_State *L);
- LUAI_FUNC void *luaM_growaux_ (lua_State *L, void *block, int *size,
-                                size_t size_elem, int limit,
-                                const char *errormsg);
-Index: lua-5.1.4/src/lstring.h
-===================================================================
---- lua-5.1.4.orig/src/lstring.h	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/src/lstring.h	2008-08-24 16:48:42.000000000 +0200
-@@ -25,7 +25,7 @@
- 
- LUAI_FUNC void luaS_resize (lua_State *L, int newsize);
- LUAI_FUNC Udata *luaS_newudata (lua_State *L, size_t s, Table *e);
--LUAI_FUNC TString *luaS_newlstr (lua_State *L, const char *str, size_t l);
-+LUA_API TString *luaS_newlstr (lua_State *L, const char *str, size_t l);
- 
- 
- #endif
-Index: lua-5.1.4/src/lundump.h
-===================================================================
---- lua-5.1.4.orig/src/lundump.h	2008-08-24 16:46:37.000000000 +0200
-+++ lua-5.1.4/src/lundump.h	2008-08-24 16:48:42.000000000 +0200
-@@ -17,7 +17,7 @@
- LUAI_FUNC void luaU_header (char* h);
- 
- /* dump one chunk; from ldump.c */
--LUAI_FUNC int luaU_dump (lua_State* L, const Proto* f, lua_Writer w, void* data, int strip);
-+LUA_API int luaU_dump (lua_State* L, const Proto* f, lua_Writer w, void* data, int strip);
- 
- #ifdef luac_c
- /* print one chunk; from print.c */
-Index: lua-5.1.4/src/Makefile
-===================================================================
---- lua-5.1.4.orig/src/Makefile	2008-08-24 16:48:20.000000000 +0200
-+++ lua-5.1.4/src/Makefile	2008-08-24 16:48:42.000000000 +0200
-@@ -23,6 +23,7 @@
- PLATS= aix ansi bsd freebsd generic linux macosx mingw posix solaris
- 
- LUA_A=	liblua.a
-+LUA_SO= liblua.so
- CORE_O=	lapi.o lcode.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o lmem.o \
- 	lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o ltm.o  \
- 	lundump.o lvm.o lzio.o lnum.o
-@@ -33,11 +34,12 @@
- LUA_O=	lua.o
- 
- LUAC_T=	luac
--LUAC_O=	luac.o print.o
-+LUAC_O=	luac.o print.o lopcodes.o
- 
- ALL_O= $(CORE_O) $(LIB_O) $(LUA_O) $(LUAC_O)
--ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T)
-+ALL_T= $(LUA_A) $(LUA_SO) $(LUA_T) $(LUAC_T)
- ALL_A= $(LUA_A)
-+ALL_SO= $(LUA_SO)
- 
- default: $(PLAT)
- 
-@@ -47,14 +49,23 @@
- 
- a:	$(ALL_A)
- 
-+so:	$(ALL_SO)
-+
- $(LUA_A): $(CORE_O) $(LIB_O)
- 	$(AR) $@ $?
- 	$(RANLIB) $@
- 
--$(LUA_T): $(LUA_O) $(LUA_A)
--	$(CC) -o $@ $(MYLDFLAGS) $(LUA_O) $(LUA_A) $(LIBS)
-+$(LUA_SO): $(CORE_O) $(LIB_O)
-+	$(CC) -o $@.$(PKG_VERSION) -shared -soname="$@.$(PKG_VERSION)" $? -nostdlib -lgcc
-+	ln -fs $@.$(PKG_VERSION) $@
-+
-+$(LUA_T): $(LUA_O) $(LUA_SO)
-+	$(CC) -o $@ -L. -llua $(MYLDFLAGS) $(LUA_O) $(LIBS)
-+
-+$(LUAC_T): $(LUAC_O) $(LUA_SO)
-+	$(CC) -o $@ -L. -llua $(MYLDFLAGS) $(LUAC_O) $(LIBS)
- 
--$(LUAC_T): $(LUAC_O) $(LUA_A)
-+$(LUAC_T)-host: $(LUAC_O) $(LUA_A)
- 	$(CC) -o $@ $(MYLDFLAGS) $(LUAC_O) $(LUA_A) $(LIBS)
- 
- clean:
-@@ -96,7 +107,7 @@
- 	$(MAKE) all MYCFLAGS=
- 
- linux:
--	$(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses"
-+	$(MAKE) all MYCFLAGS+=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses"
- 
- macosx:
- 	$(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-lreadline"

package/lua/patches-host/040-gzip-source-loader.patch

@@ -1,136 +0,0 @@
-diff -ur lua-5.1.4.orig/src/Makefile lua-5.1.4/src/Makefile
---- lua-5.1.4.orig/src/Makefile	2009-04-04 23:06:04.000000000 +0200
-+++ lua-5.1.4/src/Makefile	2009-04-04 23:06:15.000000000 +0200
-@@ -12,7 +12,7 @@
- AR= ar rcu
- RANLIB= ranlib
- RM= rm -f
--LIBS= -lm $(MYLIBS)
-+LIBS= -lm -lz $(MYLIBS)
- 
- MYCFLAGS=
- MYLDFLAGS=
-diff -ur lua-5.1.4.orig/src/lauxlib.c lua-5.1.4/src/lauxlib.c
---- lua-5.1.4.orig/src/lauxlib.c	2009-04-04 23:06:04.000000000 +0200
-+++ lua-5.1.4/src/lauxlib.c	2009-04-05 03:35:24.000000000 +0200
-@@ -11,6 +11,7 @@
- #include <stdio.h>
- #include <stdlib.h>
- #include <string.h>
-+#include <zlib.h>
- 
- 
- /* This file uses only the official API of Lua.
-@@ -535,6 +536,12 @@
-   char buff[LUAL_BUFFERSIZE];
- } LoadF;
- 
-+typedef struct LoadGZ {
-+  int first_chunk;
-+  gzFile f;
-+  char buffer[LUAL_GZLDBUFFER];
-+} LoadGZ;
-+
- 
- static const char *getF (lua_State *L, void *ud, size_t *size) {
-   LoadF *lf = (LoadF *)ud;
-@@ -550,6 +557,28 @@
- }
- 
- 
-+static const char *getGZ (lua_State *L, void *ud, size_t *size) {
-+  LoadGZ *lf = (LoadGZ *)ud;
-+  char *sp = 0;
-+  (void)L;
-+  if (gzeof(lf->f)) return NULL;
-+  *size = gzread(lf->f, lf->buffer, sizeof(lf->buffer));
-+  if (*size > 0) {
-+    if (lf->first_chunk) {
-+      lf->first_chunk = 0;
-+      if ((lf->buffer[0] == '#') && (lf->buffer[1] == '!') &&
-+          (sp=strstr(lf->buffer, "\n")) != NULL)
-+      {
-+        *size -= ((uint)sp - (uint)lf->buffer);
-+        return sp;
-+      }
-+    }
-+    return lf->buffer;
-+  }
-+  return NULL;
-+}
-+
-+
- static int errfile (lua_State *L, const char *what, int fnameindex) {
-   const char *serr = strerror(errno);
-   const char *filename = lua_tostring(L, fnameindex) + 1;
-@@ -560,6 +589,31 @@
- 
- 
- LUALIB_API int luaL_loadfile (lua_State *L, const char *filename) {
-+  if ((filename != NULL) && strstr(filename, ".lua.gz")) {
-+    return luaL_loadfile_gzip(L, filename);
-+  }
-+  else {
-+    return luaL_loadfile_plain(L, filename);
-+  }
-+}
-+
-+
-+LUALIB_API int luaL_loadfile_gzip (lua_State *L, const char *filename) {
-+  LoadGZ gzf;
-+  int status;
-+  int fnameindex = lua_gettop(L) + 1;  /* index of filename on the stack */
-+  lua_pushfstring(L, "@%s", filename);
-+  gzf.f = gzopen(filename, "r");
-+  gzf.first_chunk = 1;
-+  if (gzf.f == Z_NULL) return errfile(L, "open", fnameindex);
-+  status = lua_load(L, getGZ, &gzf, lua_tostring(L, -1));
-+  (void)gzclose(gzf.f);
-+  lua_remove(L, fnameindex);
-+  return status;
-+}
-+
-+  
-+LUALIB_API int luaL_loadfile_plain (lua_State *L, const char *filename) {
-   LoadF lf;
-   int status, readstatus;
-   int c;
-diff -ur lua-5.1.4.orig/src/lauxlib.h lua-5.1.4/src/lauxlib.h
---- lua-5.1.4.orig/src/lauxlib.h	2009-04-04 23:06:04.000000000 +0200
-+++ lua-5.1.4/src/lauxlib.h	2009-04-04 23:06:15.000000000 +0200
-@@ -81,6 +81,8 @@
- LUALIB_API void (luaL_unref) (lua_State *L, int t, int ref);
- 
- LUALIB_API int (luaL_loadfile) (lua_State *L, const char *filename);
-+LUALIB_API int (luaL_loadfile_gzip) (lua_State *L, const char *filename);
-+LUALIB_API int (luaL_loadfile_plain) (lua_State *L, const char *filename);
- LUALIB_API int (luaL_loadbuffer) (lua_State *L, const char *buff, size_t sz,
-                                   const char *name);
- LUALIB_API int (luaL_loadstring) (lua_State *L, const char *s);
-diff -ur lua-5.1.4.orig/src/luaconf.h lua-5.1.4/src/luaconf.h
---- lua-5.1.4.orig/src/luaconf.h	2009-04-04 23:06:04.000000000 +0200
-+++ lua-5.1.4/src/luaconf.h	2009-04-04 23:27:20.000000000 +0200
-@@ -101,7 +101,9 @@
- #define LUA_CDIR	LUA_ROOT "lib/lua/5.1/"
- #define LUA_PATH_DEFAULT  \
- 		"./?.lua;"  LUA_LDIR"?.lua;"  LUA_LDIR"?/init.lua;" \
--		            LUA_CDIR"?.lua;"  LUA_CDIR"?/init.lua"
-+		            LUA_CDIR"?.lua;"  LUA_CDIR"?/init.lua;" \
-+		"./?.lua.gz;"  LUA_LDIR"?.lua.gz;"  LUA_LDIR"?/init.lua.gz;" \
-+		               LUA_CDIR"?.lua.gz;"  LUA_CDIR"?/init.lua.gz"
- #define LUA_CPATH_DEFAULT \
- 	"./?.so;"  LUA_CDIR"?.so;" LUA_CDIR"loadall.so"
- #endif
-@@ -506,6 +508,12 @@
- */
- #define LUAL_BUFFERSIZE		BUFSIZ
- 
-+
-+/*
-+@@ LUAL_GZLDBUFFER is the buffer size used by the gzip source loader.
-+*/
-+#define LUAL_GZLDBUFFER		8192
-+
- /* }================================================================== */
- 
- 

package/lua/patches-host/100-no_readline.patch

@@ -1,6 +1,5 @@
-diff -ur lua-luci-5.1.3/src/luaconf.h lua-luci-5.1.3-new/src/luaconf.h
---- lua-luci-5.1.3/src/luaconf.h	2008-04-14 13:19:54.000000000 +0200
-+++ lua-luci-5.1.3-new/src/luaconf.h	2008-04-14 13:19:17.000000000 +0200
+--- a/src/luaconf.h
++++ b/src/luaconf.h
 @@ -38,7 +38,6 @@
  #if defined(LUA_USE_LINUX)
  #define LUA_USE_POSIX
@@ -9,10 +8,8 @@ diff -ur lua-luci-5.1.3/src/luaconf.h lua-luci-5.1.3-new/src/luaconf.h
  #endif
  
  #if defined(LUA_USE_MACOSX)
-Nur in lua-luci-5.1.3-new/src: luaconf.h.orig.
-diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile
---- lua-luci-5.1.3/src/Makefile	2008-04-14 13:19:57.000000000 +0200
-+++ lua-luci-5.1.3-new/src/Makefile	2008-04-14 13:19:17.000000000 +0200
+--- a/src/Makefile
++++ b/src/Makefile
 @@ -17,6 +17,7 @@
  MYCFLAGS=
  MYLDFLAGS=
@@ -21,7 +18,7 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile
  
  # == END OF USER SETTINGS. NO NEED TO CHANGE ANYTHING BELOW THIS LINE =========
  
-@@ -86,7 +87,7 @@
+@@ -75,7 +76,7 @@
  	@echo "MYLIBS = $(MYLIBS)"
  
  # convenience targets for popular platforms
@@ -30,19 +27,19 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile
  none:
  	@echo "Please choose a platform:"
  	@echo "   $(PLATS)"
-@@ -101,16 +102,16 @@
+@@ -90,16 +91,16 @@
  	$(MAKE) all MYCFLAGS="-DLUA_USE_POSIX -DLUA_USE_DLOPEN" MYLIBS="-Wl,-E"
  
  freebsd:
 -	$(MAKE) all MYCFLAGS="-DLUA_USE_LINUX" MYLIBS="-Wl,-E -lreadline"
-+	$(MAKE) all MYCFLAGS="-DLUA_USE_LINUX $(RFLAG)" MYLIBS="-Wl,-E$(if $(USE_READLINE), -lreadline)"
++	$(MAKE) all MYCFLAGS="-DLUA_USE_LINUX" $(RFLAG)" MYLIBS="-Wl,-E$(if $(USE_READLINE), -lreadline)"
  
  generic:
  	$(MAKE) all MYCFLAGS=
  
  linux:
--	$(MAKE) all MYCFLAGS+=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses"
-+	$(MAKE) all MYCFLAGS+="-DLUA_USE_LINUX $(RFLAG)" MYLIBS="-Wl,-E -ldl $(if $(USE_READLINE), -lreadline -lhistory -lncurses)"
+-	$(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-Wl,-E -ldl -lreadline -lhistory -lncurses"
++	$(MAKE) all MYCFLAGS="-DLUA_USE_LINUX $(RFLAG)" MYLIBS="-Wl,-E -ldl $(if $(USE_READLINE), -lreadline -lhistory -lncurses)"
  
  macosx:
 -	$(MAKE) all MYCFLAGS=-DLUA_USE_LINUX MYLIBS="-lreadline"
@@ -50,4 +47,3 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile
  # use this on Mac OS X 10.3-
  #	$(MAKE) all MYCFLAGS=-DLUA_USE_MACOSX
  
-Nur in lua-luci-5.1.3-new/src: Makefile.orig.

package/lua/patches-host/200-lua-path.patch

@@ -1,15 +0,0 @@
---- b/src/luaconf.h	2008-05-06 20:10:46.000000000 +0200
-+++ a/src/luaconf.h	2008-05-06 20:10:27.000000000 +0200
-@@ -95,9 +95,9 @@
- 	".\\?.dll;"  LUA_CDIR"?.dll;" LUA_CDIR"loadall.dll"
- 
- #else
--#define LUA_ROOT	"/usr/local/"
--#define LUA_LDIR	LUA_ROOT "share/lua/5.1/"
--#define LUA_CDIR	LUA_ROOT "lib/lua/5.1/"
-+#define LUA_ROOT	"/usr/"
-+#define LUA_LDIR	LUA_ROOT "share/lua/"
-+#define LUA_CDIR	LUA_ROOT "lib/lua/"
- #define LUA_PATH_DEFAULT  \
- 		"./?.lua;"  LUA_LDIR"?.lua;"  LUA_LDIR"?/init.lua;" \
- 		            LUA_CDIR"?.lua;"  LUA_CDIR"?/init.lua"

package/lua/patches-host/300-opcode_performance.patch

@@ -1,363 +0,0 @@
---- a/src/lvm.c
-+++ b/src/lvm.c
-@@ -31,6 +31,9 @@
- /* limit for table tag-method chains (to avoid loops) */
- #define MAXTAGLOOP	100
- 
-+#ifdef __GNUC__
-+#define COMPUTED_GOTO 1
-+#endif
- 
- /*
-  * If 'obj' is a string, it is tried to be interpreted as a number.
-@@ -562,12 +565,63 @@
-     ARITH_OP1_END
- #endif
- 
-+#ifdef COMPUTED_GOTO
-+#define OPCODE_TARGET(op) DO_OP_##op:
-+#define CALL_OPCODE(op) goto *opcodes[op];
-+#define OPCODE_PTR(op) [OP_##op] = &&DO_OP_##op
-+#else
-+#define OPCODE_TARGET(op) case OP_##op:
-+#define CALL_OPCODE(op) switch (op)
-+#endif
-+
- 
- void luaV_execute (lua_State *L, int nexeccalls) {
-   LClosure *cl;
-   StkId base;
-   TValue *k;
-   const Instruction *pc;
-+#ifdef COMPUTED_GOTO
-+  static const void *opcodes[] = {
-+   OPCODE_PTR(MOVE),
-+   OPCODE_PTR(LOADK),
-+   OPCODE_PTR(LOADBOOL),
-+   OPCODE_PTR(LOADNIL),
-+   OPCODE_PTR(GETUPVAL),
-+   OPCODE_PTR(GETGLOBAL),
-+   OPCODE_PTR(GETTABLE),
-+   OPCODE_PTR(SETGLOBAL),
-+   OPCODE_PTR(SETUPVAL),
-+   OPCODE_PTR(SETTABLE),
-+   OPCODE_PTR(NEWTABLE),
-+   OPCODE_PTR(SELF),
-+   OPCODE_PTR(ADD),
-+   OPCODE_PTR(SUB),
-+   OPCODE_PTR(MUL),
-+   OPCODE_PTR(DIV),
-+   OPCODE_PTR(MOD),
-+   OPCODE_PTR(POW),
-+   OPCODE_PTR(UNM),
-+   OPCODE_PTR(NOT),
-+   OPCODE_PTR(LEN),
-+   OPCODE_PTR(CONCAT),
-+   OPCODE_PTR(JMP),
-+   OPCODE_PTR(EQ),
-+   OPCODE_PTR(LT),
-+   OPCODE_PTR(LE),
-+   OPCODE_PTR(TEST),
-+   OPCODE_PTR(TESTSET),
-+   OPCODE_PTR(CALL),
-+   OPCODE_PTR(TAILCALL),
-+   OPCODE_PTR(RETURN),
-+   OPCODE_PTR(FORLOOP),
-+   OPCODE_PTR(FORPREP),
-+   OPCODE_PTR(TFORLOOP),
-+   OPCODE_PTR(SETLIST),
-+   OPCODE_PTR(CLOSE),
-+   OPCODE_PTR(CLOSURE),
-+   OPCODE_PTR(VARARG)
-+  };
-+#endif
-  reentry:  /* entry point */
-   lua_assert(isLua(L->ci));
-   pc = L->savedpc;
-@@ -592,33 +646,33 @@
-     lua_assert(base == L->base && L->base == L->ci->base);
-     lua_assert(base <= L->top && L->top <= L->stack + L->stacksize);
-     lua_assert(L->top == L->ci->top || luaG_checkopenop(i));
--    switch (GET_OPCODE(i)) {
--      case OP_MOVE: {
-+    CALL_OPCODE(GET_OPCODE(i)) {
-+      OPCODE_TARGET(MOVE) {
-         setobjs2s(L, ra, RB(i));
-         continue;
-       }
--      case OP_LOADK: {
-+      OPCODE_TARGET(LOADK) {
-         setobj2s(L, ra, KBx(i));
-         continue;
-       }
--      case OP_LOADBOOL: {
-+      OPCODE_TARGET(LOADBOOL) {
-         setbvalue(ra, GETARG_B(i));
-         if (GETARG_C(i)) pc++;  /* skip next instruction (if C) */
-         continue;
-       }
--      case OP_LOADNIL: {
-+      OPCODE_TARGET(LOADNIL) {
-         TValue *rb = RB(i);
-         do {
-           setnilvalue(rb--);
-         } while (rb >= ra);
-         continue;
-       }
--      case OP_GETUPVAL: {
-+      OPCODE_TARGET(GETUPVAL) {
-         int b = GETARG_B(i);
-         setobj2s(L, ra, cl->upvals[b]->v);
-         continue;
-       }
--      case OP_GETGLOBAL: {
-+      OPCODE_TARGET(GETGLOBAL) {
-         TValue g;
-         TValue *rb = KBx(i);
-         sethvalue(L, &g, cl->env);
-@@ -626,88 +680,88 @@
-         Protect(luaV_gettable(L, &g, rb, ra));
-         continue;
-       }
--      case OP_GETTABLE: {
-+      OPCODE_TARGET(GETTABLE) {
-         Protect(luaV_gettable(L, RB(i), RKC(i), ra));
-         continue;
-       }
--      case OP_SETGLOBAL: {
-+      OPCODE_TARGET(SETGLOBAL) {
-         TValue g;
-         sethvalue(L, &g, cl->env);
-         lua_assert(ttisstring(KBx(i)));
-         Protect(luaV_settable(L, &g, KBx(i), ra));
-         continue;
-       }
--      case OP_SETUPVAL: {
-+      OPCODE_TARGET(SETUPVAL) {
-         UpVal *uv = cl->upvals[GETARG_B(i)];
-         setobj(L, uv->v, ra);
-         luaC_barrier(L, uv, ra);
-         continue;
-       }
--      case OP_SETTABLE: {
-+      OPCODE_TARGET(SETTABLE) {
-         Protect(luaV_settable(L, ra, RKB(i), RKC(i)));
-         continue;
-       }
--      case OP_NEWTABLE: {
-+      OPCODE_TARGET(NEWTABLE) {
-         int b = GETARG_B(i);
-         int c = GETARG_C(i);
-         sethvalue(L, ra, luaH_new(L, luaO_fb2int(b), luaO_fb2int(c)));
-         Protect(luaC_checkGC(L));
-         continue;
-       }
--      case OP_SELF: {
-+      OPCODE_TARGET(SELF) {
-         StkId rb = RB(i);
-         setobjs2s(L, ra+1, rb);
-         Protect(luaV_gettable(L, rb, RKC(i), ra));
-         continue;
-       }
--      case OP_ADD: {
-+      OPCODE_TARGET(ADD) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue( luai_numadd, try_addint, luai_vectadd );
-         Protect(Arith(L, ra, rb, rc, TM_ADD)); \
-         continue;
-       }
--      case OP_SUB: {
-+      OPCODE_TARGET(SUB) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue( luai_numsub, try_subint, luai_vectsub );
-         Protect(Arith(L, ra, rb, rc, TM_SUB));
-         continue;
-       }
--      case OP_MUL: {
-+      OPCODE_TARGET(MUL) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue(luai_nummul, try_mulint, luai_vectmul);
-         Protect(Arith(L, ra, rb, rc, TM_MUL));
-         continue;
-       }
--      case OP_DIV: {
-+      OPCODE_TARGET(DIV) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue(luai_numdiv, try_divint, luai_vectdiv);
-         Protect(Arith(L, ra, rb, rc, TM_DIV));
-         continue;
-       }
--      case OP_MOD: {
-+      OPCODE_TARGET(MOD) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue_scalar(luai_nummod, try_modint);  /* scalars only */
-         Protect(Arith(L, ra, rb, rc, TM_MOD));
-         continue;
-       }
--      case OP_POW: {
-+      OPCODE_TARGET(POW) {
-         TValue *rb = RKB(i), *rc= RKC(i);
-         arith_op_continue(luai_numpow, try_powint, luai_vectpow);
-         Protect(Arith(L, ra, rb, rc, TM_POW));
-         continue;
-       }
--      case OP_UNM: {
-+      OPCODE_TARGET(UNM) {
-         TValue *rb = RB(i);
-         arith_op1_continue(luai_numunm, try_unmint, luai_vectunm);
-         Protect(Arith(L, ra, rb, rb, TM_UNM));
-         continue;
-       }
--      case OP_NOT: {
-+      OPCODE_TARGET(NOT) {
-         int res = l_isfalse(RB(i));  /* next assignment may change this value */
-         setbvalue(ra, res);
-         continue;
-       }
--      case OP_LEN: {
-+      OPCODE_TARGET(LEN) {
-         const TValue *rb = RB(i);
-         switch (ttype(rb)) {
-           case LUA_TTABLE: {
-@@ -727,18 +781,18 @@
-         }
-         continue;
-       }
--      case OP_CONCAT: {
-+      OPCODE_TARGET(CONCAT) {
-         int b = GETARG_B(i);
-         int c = GETARG_C(i);
-         Protect(luaV_concat(L, c-b+1, c); luaC_checkGC(L));
-         setobjs2s(L, RA(i), base+b);
-         continue;
-       }
--      case OP_JMP: {
-+      OPCODE_TARGET(JMP) {
-         dojump(L, pc, GETARG_sBx(i));
-         continue;
-       }
--      case OP_EQ: {
-+      OPCODE_TARGET(EQ) {
-         TValue *rb = RKB(i);
-         TValue *rc = RKC(i);
-         Protect(
-@@ -748,7 +802,7 @@
-         pc++;
-         continue;
-       }
--      case OP_LT: {
-+      OPCODE_TARGET(LT) {
-         Protect(
-           if (luaV_lessthan(L, RKB(i), RKC(i)) == GETARG_A(i))
-             dojump(L, pc, GETARG_sBx(*pc));
-@@ -756,7 +810,7 @@
-         pc++;
-         continue;
-       }
--      case OP_LE: {
-+      OPCODE_TARGET(LE) {
-         Protect(
-           if (lessequal(L, RKB(i), RKC(i)) == GETARG_A(i))
-             dojump(L, pc, GETARG_sBx(*pc));
-@@ -764,13 +818,13 @@
-         pc++;
-         continue;
-       }
--      case OP_TEST: {
-+      OPCODE_TARGET(TEST) {
-         if (l_isfalse(ra) != GETARG_C(i))
-           dojump(L, pc, GETARG_sBx(*pc));
-         pc++;
-         continue;
-       }
--      case OP_TESTSET: {
-+      OPCODE_TARGET(TESTSET) {
-         TValue *rb = RB(i);
-         if (l_isfalse(rb) != GETARG_C(i)) {
-           setobjs2s(L, ra, rb);
-@@ -779,7 +833,7 @@
-         pc++;
-         continue;
-       }
--      case OP_CALL: {
-+      OPCODE_TARGET(CALL) {
-         int b = GETARG_B(i);
-         int nresults = GETARG_C(i) - 1;
-         if (b != 0) L->top = ra+b;  /* else previous instruction set top */
-@@ -800,7 +854,7 @@
-           }
-         }
-       }
--      case OP_TAILCALL: {
-+      OPCODE_TARGET(TAILCALL) {
-         int b = GETARG_B(i);
-         if (b != 0) L->top = ra+b;  /* else previous instruction set top */
-         L->savedpc = pc;
-@@ -832,7 +886,7 @@
-           }
-         }
-       }
--      case OP_RETURN: {
-+      OPCODE_TARGET(RETURN) {
-         int b = GETARG_B(i);
-         if (b != 0) L->top = ra+b-1;
-         if (L->openupval) luaF_close(L, base);
-@@ -847,7 +901,7 @@
-           goto reentry;
-         }
-       }
--      case OP_FORLOOP: {
-+      OPCODE_TARGET(FORLOOP) {
-         /* If start,step and limit are all integers, we don't need to check
-          * against overflow in the looping.
-          */
-@@ -875,7 +929,7 @@
-         }
-         continue;
-       }
--      case OP_FORPREP: {
-+      OPCODE_TARGET(FORPREP) {
-         const TValue *init = ra;
-         const TValue *plimit = ra+1;
-         const TValue *pstep = ra+2;
-@@ -898,7 +952,7 @@
-         dojump(L, pc, GETARG_sBx(i));
-         continue;
-       }
--      case OP_TFORLOOP: {
-+      OPCODE_TARGET(TFORLOOP) {
-         StkId cb = ra + 3;  /* call base */
-         setobjs2s(L, cb+2, ra+2);
-         setobjs2s(L, cb+1, ra+1);
-@@ -914,7 +968,7 @@
-         pc++;
-         continue;
-       }
--      case OP_SETLIST: {
-+      OPCODE_TARGET(SETLIST) {
-         int n = GETARG_B(i);
-         int c = GETARG_C(i);
-         int last;
-@@ -936,11 +990,11 @@
-         }
-         continue;
-       }
--      case OP_CLOSE: {
-+      OPCODE_TARGET(CLOSE) {
-         luaF_close(L, ra);
-         continue;
-       }
--      case OP_CLOSURE: {
-+      OPCODE_TARGET(CLOSURE) {
-         Proto *p;
-         Closure *ncl;
-         int nup, j;
-@@ -960,7 +1014,7 @@
-         Protect(luaC_checkGC(L));
-         continue;
-       }
--      case OP_VARARG: {
-+      OPCODE_TARGET(VARARG) {
-         int b = GETARG_B(i) - 1;
-         int j;
-         CallInfo *ci = L->ci;

package/mac80211/Makefile

@@ -10,18 +10,21 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=2009-10-09
-PKG_RELEASE:=1
+PKG_VERSION:=2009-11-21
+PKG_RELEASE:=7
 PKG_SOURCE_URL:= \
-	http://www.orbit-lab.org/kernel/compat-wireless-2.6/2009/10 \
+	http://www.orbit-lab.org/kernel/compat-wireless-2.6/2009/11 \
 	http://wireless.kernel.org/download/compat-wireless-2.6
-PKG_MD5SUM:=15c310560765cbc35ed930fb0e815284
+PKG_MD5SUM:=00e80559cddaa160605098572f5c58b8
 
 PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)
 
 PKG_CONFIG_DEPENDS:= \
 	CONFIG_PACKAGE_kmod-mac80211 \
+	CONFIG_PACKAGE_MAC80211_DEBUGFS \
+	CONFIG_PACKAGE_ATH_DEBUG \
+	CONFIG_ATH_USER_REGD \
 
 include $(INCLUDE_DIR)/package.mk
 
@@ -53,12 +56,12 @@ endef
 
 # Prism54 drivers
 P54PCIFW:=2.13.12.0.arm
-P54USBFW:=2.13.24.0.lm86.arm
+P54USBFW:=2.13.24.0.lm87.arm
 
 define Download/p54usb
   FILE:=$(P54USBFW)
   URL:=http://daemonizer.de/prism54/prism54-fw/fw-usb
-  MD5SUM:=2efd50eab43c0d0376765576a54b7a30
+  MD5SUM:=8e8ab005a4f8f0123bcdc51bc25b47f6
 endef
 $(eval $(call Download,p54usb))
 
@@ -278,10 +281,17 @@ config ATH_USER_REGD
 	help
 		Atheros' idea of regulatory handling is that the EEPROM of the card defines
 		the regulatory limits and the user is only allowed to restrict the settings
-		even further, even if the country allows frequencies or power levels that 
+		even further, even if the country allows frequencies or power levels that
 		are forbidden by the EEPROM settings.
 		Select this option if you want the driver to respect the user's decision about
 		regulatory settings.
+
+config PACKAGE_ATH_DEBUG
+	bool "Atheros wireless debugging"
+	depends on PACKAGE_kmod-ath
+	help
+		Say Y, if you want to debug atheros wireless drivers.
+		Right now only ath9k makes use of this.
 endef
 
 define KernelPackage/ath
@@ -316,9 +326,10 @@ define KernelPackage/ath9k
   URL:=http://linuxwireless.org/en/users/Drivers/ath9k
   DEPENDS+= +kmod-ath
   FILES:= \
+	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_common.$(LINUX_KMOD_SUFFIX) \
 	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_hw.$(LINUX_KMOD_SUFFIX) \
 	$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k.$(LINUX_KMOD_SUFFIX)
-  AUTOLOAD:=$(call AutoLoad,27,ath9k_hw ath9k)
+  AUTOLOAD:=$(call AutoLoad,27,ath9k_hw ath9k_common ath9k)
 endef
 
 define KernelPackage/ath9k/description
@@ -330,7 +341,6 @@ define KernelPackage/ath9k/config
 	source "$(SOURCE)/Config.in.ath9k"
 endef
 
-
 USB8388FW_NAME:=usb8388
 USB8388FW_VERSION:=5.110.22.p23
 
@@ -343,7 +353,7 @@ $(eval $(call Download,usb8388))
 
 define KernelPackage/libertas
   $(call KernelPackage/mac80211/Default)
-  DEPENDS+= @USB_SUPPORT +kmod-mac80211 +kmod-usb-core
+  DEPENDS+= @USB_SUPPORT +kmod-mac80211 +kmod-usb-core +kmod-lib80211
   TITLE:=Marvell 88W8015 Wireless Driver
   FILES:= \
 	$(PKG_BUILD_DIR)/drivers/net/wireless/libertas/libertas.$(LINUX_KMOD_SUFFIX) \
@@ -356,7 +366,7 @@ define KernelPackage/ar9170
   $(call KernelPackage/mac80211/Default)
   TITLE:=Atheros AR9170 802.11n USB support
   URL:=http://wireless.kernel.org/en/users/Drivers/ar9170
-  DEPENDS+= @USB_SUPPORT @!LINUX_2_6_25 @!LINUX_2_6_27 +kmod-ath +kmod-usb-core
+  DEPENDS+= @USB_SUPPORT @!LINUX_2_6_25 +kmod-ath +kmod-usb-core
   FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ar9170/ar9170usb.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,27,ar9170usb)
 endef
@@ -491,8 +501,8 @@ BUILDFLAGS:= \
 	$(if $(CONFIG_PCI),-DCONFIG_SSB_SPROM) \
 	$(if $(CONFIG_LEDS_TRIGGERS), -DCONFIG_MAC80211_LEDS -DCONFIG_LEDS_TRIGGERS -DCONFIG_B43_LEDS -DCONFIG_B43LEGACY_LEDS -DCONFIG_AR9170_LEDS) \
 	-DCONFIG_B43_HWRNG -DCONFIG_B43LEGACY_HWRNG \
-	$(if $(CONFIG_PACKAGE_MAC80211_DEBUGFS),-DCONFIG_MAC80211_DEBUGFS) \
-	$(if $(CONFIG_PACKAGE_ATH9K_DEBUG),-DCONFIG_ATH9K_DEBUG) \
+	$(if $(CONFIG_PACKAGE_MAC80211_DEBUGFS),-DCONFIG_MAC80211_DEBUGFS -DCONFIG_ATH9K_DEBUGFS) \
+	$(if $(CONFIG_PACKAGE_ATH_DEBUG),-DCONFIG_ATH_DEBUG) \
 	-D__CONFIG_MAC80211_RC_DEFAULT=minstrel \
 	$(if $(CONFIG_ATH_USER_REGD),-DATH_USER_REGD=1)
 
@@ -519,9 +529,10 @@ MAKE_OPTS:= \
 	CONFIG_B43=$(if $(CONFIG_PACKAGE_kmod-b43),m) \
 	CONFIG_B43LEGACY=$(if $(CONFIG_PACKAGE_kmod-b43legacy),m) \
 	CONFIG_ATH_COMMON=$(if $(CONFIG_PACKAGE_kmod-ath),m) \
+	CONFIG_ATH_DEBUG=$(if $(CONFIG_PACKAGE_ATH_DEBUG),y) \
 	CONFIG_ATH5K=$(if $(CONFIG_PACKAGE_kmod-ath5k),m) \
 	CONFIG_ATH9K=$(if $(CONFIG_PACKAGE_kmod-ath9k),m) \
-	CONFIG_ATH9K_DEBUG=$(if $(CONFIG_PACKAGE_ATH9K_DEBUG),y) \
+	CONFIG_ATH9K_DEBUGFS=$(if $(CONFIG_PACKAGE_MAC80211_DEBUGFS),y) \
 	CONFIG_ZD1211RW=$(if $(CONFIG_PACKAGE_kmod-zd1211rw),m) \
 	CONFIG_P54_COMMON=$(if $(CONFIG_PACKAGE_kmod-p54-common),m) \
 	CONFIG_P54_PCI=$(if $(CONFIG_PACKAGE_kmod-p54-pci),m) \

package/mac80211/files/lib/wifi/mac80211.sh

@@ -104,6 +104,7 @@ enable_mac80211() {
 		config_get enc "$vif" encryption
 		config_get mode "$vif" mode
 		config_get ssid "$vif" ssid
+		config_get_bool wds "$vif" wds 0
 
 		# It is far easier to delete and create the desired interface
 		case "$mode" in
@@ -123,12 +124,17 @@ enable_mac80211() {
 				iw phy "$phy" interface add "$ifname" type monitor
 			;;
 			sta)
-				iw phy "$phy" interface add "$ifname" type managed
+				local wdsflag
+				[ "$wds" -gt 0 ] && wdsflag="4addr on"
+				iw phy "$phy" interface add "$ifname" type managed $wdsflag
+				config_get_bool powersave "$vif" powersave 0
+				[ "$powersave" -gt 0 ] && powersave="on" || powersave="off"
+				iwconfig "$ifname" power "$powersave"
 			;;
 		esac
 
 		# All interfaces must have unique mac addresses
-		# which can either be explicitly set in the device 
+		# which can either be explicitly set in the device
 		# section, or automatically generated
 		config_get macaddr "$device" macaddr
 		local mac_1="${macaddr%%:*}"
@@ -136,7 +142,7 @@ enable_mac80211() {
 
 		config_get vif_mac "$vif" macaddr
 		[ -n "$vif_mac" ] || {
-			if [ "$i" -gt 0 ]; then 
+			if [ "$i" -gt 0 ]; then
 				offset="$(( 2 + $i * 4 ))"
 			else
 				offset="0"
@@ -162,7 +168,7 @@ enable_mac80211() {
 		# none -> NO encryption
 		#
 		# wep + keymgmt = '' -> we use iw to connect to the
-		# network.  
+		# network.
 		#
 		# wep + keymgmt = 'NONE' -> wpa_supplicant will be
 		# configured to handle the wep connection
@@ -176,7 +182,7 @@ enable_mac80211() {
 							zidx = idx - 1
 							config_get key "$vif" "key${idx}"
 							if [ -n "$key" ]; then
-								append keystring "${zidx}:${key} " 
+								append keystring "${zidx}:${key} "
 							fi
 						done
 					fi
@@ -232,7 +238,7 @@ enable_mac80211() {
 			;;
 			sta|mesh)
 				config_get bssid "$vif" bssid
-				case "$enc" in												 
+				case "$enc" in
 					wep)
 						if [ -e "$keymgmt" ]; then
 							[ -n "$keystring" ] &&
@@ -248,7 +254,8 @@ enable_mac80211() {
 							fi
 						fi
 					;;
-					wpa)
+					wpa*|psk*)
+						config_get key "$vif" key
 						if eval "type wpa_supplicant_setup_vif" 2>/dev/null >/dev/null; then
 							wpa_supplicant_setup_vif "$vif" wext || {
 								echo "enable_mac80211($device): Failed to set up wpa_supplicant for interface $ifname" >&2
@@ -281,29 +288,44 @@ check_device() {
 detect_mac80211() {
 	devidx=0
 	config_load wireless
+	while :; do
+		config_get type "wifi$devidx" type
+		[ -n "$type" ] || break
+		devidx=$(($devidx + 1))
+	done
 	for dev in $(ls /sys/class/ieee80211); do
 		found=0
 		config_foreach check_device wifi-device
 		[ "$found" -gt 0 ] && continue
 
-		while :; do 
-			config_get type "wifi$devidx" type
-			[ -n "$type" ] || break
-			devidx=$(($devidx + 1))
-		done
 		mode_11n=""
 		mode_band="g"
-		iw phy "$dev" info | grep -q 'HT cap' && mode_11n="n"
-		iw phy "$dev" info | grep -q '2412 MHz' || mode_band="a"
+		channel="5"
+		ht_cap=0
+		for cap in $(iw phy "$dev" info | grep 'HT capabilities' | cut -d: -f2); do
+			ht_cap="$(($ht_cap | $cap))"
+		done
+		ht_capab="";
+		[ "$ht_cap" -gt 0 ] && {
+			mode_11n="n"
+			list="	list ht_capab"
+			[ "$(($ht_cap & 1))" -eq 1 ] && append ht_capab "$list	LDPC" "$N"
+			[ "$(($ht_cap & 2))" -eq 2 ] && append ht_capab "$list	HT40-" "$N"
+			[ "$(($ht_cap & 32))" -eq 32 ] && append ht_capab "$list	SHORT-GI-20" "$N"
+			[ "$(($ht_cap & 64))" -eq 64 ] && append ht_capab "$list	SHORT-GI-40" "$N"
+			[ "$(($ht_cap & 4096))" -eq 4096 ] && append ht_capab "$list	DSSS_CCK-40" "$N"
+		}
+		iw phy "$dev" info | grep -q '2412 MHz' || { mode_band="a"; channel="36"; }
 
 		cat <<EOF
 config wifi-device  wifi$devidx
 	option type     mac80211
-	option channel  5
+	option channel  ${channel}
 	option macaddr	$(cat /sys/class/ieee80211/${dev}/macaddress)
 	option hwmode	11${mode_11n}${mode_band}
 	# REMOVE THIS LINE TO ENABLE WIFI:
 	option disabled 1
+$ht_capab
 
 config wifi-iface
 	option device   wifi$devidx
@@ -313,6 +335,7 @@ config wifi-iface
 	option encryption none
 
 EOF
+	devidx=$(($devidx + 1))
 	done
 }
 

package/mac80211/patches/001-disable_b44.patch

@@ -0,0 +1,17 @@
+--- a/config.mk
++++ b/config.mk
+@@ -242,10 +242,10 @@ endif
+ 
+ CONFIG_P54_PCI=m
+ 
+-CONFIG_B44=m
+-CONFIG_B44_PCI_AUTOSELECT=y
+-CONFIG_B44_PCICORE_AUTOSELECT=y
+-CONFIG_B44_PCI=y
++# CONFIG_B44=m
++# CONFIG_B44_PCI_AUTOSELECT=y
++# CONFIG_B44_PCICORE_AUTOSELECT=y
++# CONFIG_B44_PCI=y
+ 
+ CONFIG_RTL8180=m
+ 

package/mac80211/patches/002-disable_rfkill.patch

@@ -1,51 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -145,7 +145,7 @@ ifneq ($(CONFIG_PCI),)
- 
- CONFIG_ATH5K=m
- # CONFIG_ATH5K_DEBUG=y
--CONFIG_ATH5K_RFKILL=y
-+# CONFIG_ATH5K_RFKILL=y
- CONFIG_ATH9K_HW=m
- CONFIG_ATH9K=m
- # CONFIG_ATH9K_DEBUG=y
-@@ -153,7 +153,7 @@ CONFIG_ATH9K=m
- 
- CONFIG_IWLWIFI=m
- CONFIG_IWLWIFI_LEDS=y
--CONFIG_IWLWIFI_RFKILL=y
-+# CONFIG_IWLWIFI_RFKILL=y
- CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT=y
- # CONFIG_IWLWIFI_DEBUG=y
- # CONFIG_IWLWIFI_DEBUGFS=y
-@@ -173,7 +173,7 @@ CONFIG_B43_PCMCIA=y
- endif
- CONFIG_B43_PIO=y
- CONFIG_B43_LEDS=y
--CONFIG_B43_RFKILL=y
-+# CONFIG_B43_RFKILL=y
- CONFIG_B43_PHY_LP=y
- # CONFIG_B43_DEBUG=y
- # CONFIG_B43_FORCE_PIO=y
-@@ -183,7 +183,7 @@ CONFIG_B43LEGACY_HWRNG=y
- CONFIG_B43LEGACY_PCI_AUTOSELECT=y
- CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
- CONFIG_B43LEGACY_LEDS=y
--CONFIG_B43LEGACY_RFKILL=y
-+# CONFIG_B43LEGACY_RFKILL=y
- # CONFIG_B43LEGACY_DEBUG=y
- CONFIG_B43LEGACY_DMA=y
- CONFIG_B43LEGACY_PIO=y
-@@ -373,7 +373,7 @@ CONFIG_RT2X00_LIB=m
- CONFIG_RT2X00_LIB_HT=y
- CONFIG_RT2X00_LIB_FIRMWARE=y
- CONFIG_RT2X00_LIB_CRYPTO=y
--CONFIG_RT2X00_LIB_RFKILL=y
-+# CONFIG_RT2X00_LIB_RFKILL=y
- CONFIG_RT2X00_LIB_LEDS=y
- # CONFIG_RT2X00_LIB_DEBUGFS=y
- # CONFIG_RT2X00_DEBUG=y
-@@ -415,8 +415,8 @@ endif
+@@ -421,8 +421,8 @@ endif
  # We need the backported rfkill module on kernel < 2.6.31.
  # In more recent kernel versions use the in kernel rfkill module.
  ifdef CONFIG_COMPAT_WIRELESS_31

package/mac80211/patches/009-remove_mac80211_module_dependence.patch

@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -47,21 +47,6 @@ $(error "ERROR: Your 2.6.27 kernel has C
+@@ -49,21 +49,6 @@ $(error "ERROR: Your 2.6.27 kernel has C
  endif
  endif