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Merge branch 'xburst' of git@projects.qi-hardware.com:openwrt-xburst into xburst

Browse Source
This commit is contained in:
Lars-Peter Clausen
2009-12-01 11:14:13 +01:00
parent a37293414f 7c7787a97d
commit 86dbff8d6f
720 changed files with 80928 additions and 33732 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
target/linux/adm5120/files/drivers/usb/host/adm5120-dbg.c
View File

@@ -638,7 +638,7 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
"%s\n"
"%s version " DRIVER_VERSION "\n",
hcd->self.controller->bus->name,
hcd->self.controller->bus_id,
dev_name(hcd->self.controller),
hcd->product_desc,
hcd_name);

29
target/linux/adm5120/router_be/config-2.6.28
View File

@@ -1,6 +1,5 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
# CONFIG_ADM5120_MACH_5GXI is not set
CONFIG_ADM5120_MACH_P_334WT=y
@@ -15,6 +14,7 @@ CONFIG_ADM5120_MACH_P_335=y
CONFIG_ADM5120_OEM_ZYXEL=y
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -23,7 +23,6 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BINFMT_MISC=m
CONFIG_BITREVERSE=y
@@ -37,9 +36,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -71,8 +70,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
@@ -87,28 +86,27 @@ CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_COMPAT=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
@@ -119,7 +117,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -129,6 +126,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_BLOCK2MTD=y
@@ -142,10 +140,8 @@ CONFIG_MTD_TRXSPLIT=y
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -154,18 +150,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -188,13 +184,12 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_DEBUG=y
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

31
target/linux/adm5120/router_be/config-2.6.30
View File

@@ -1,6 +1,5 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_P_334WT=y
@@ -15,6 +14,7 @@ CONFIG_ADM5120_OEM_OSBRIDGE=y
CONFIG_ADM5120_OEM_ZYXEL=y
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -23,7 +23,6 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BINFMT_MISC=m
@@ -31,8 +30,8 @@ CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -41,9 +40,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -65,8 +64,8 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -77,8 +76,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -99,22 +98,21 @@ CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
@@ -124,7 +122,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -134,6 +131,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_BLOCK2MTD=y
@@ -147,10 +145,8 @@ CONFIG_MTD_TRXSPLIT=y
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -159,18 +155,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -194,14 +190,13 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_DEBUG=y
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

31
target/linux/adm5120/router_be/config-2.6.31
View File

@@ -1,6 +1,5 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_P_334WT=y
@@ -15,6 +14,7 @@ CONFIG_ADM5120_OEM_OSBRIDGE=y
CONFIG_ADM5120_OEM_ZYXEL=y
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -26,15 +26,14 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BINFMT_MISC=m
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -43,9 +42,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -67,8 +66,8 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -79,8 +78,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -101,22 +100,21 @@ CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_ALCHEMY is not set
@@ -127,7 +125,6 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -137,6 +134,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_BLOCK2MTD=y
@@ -151,10 +149,8 @@ CONFIG_NLS=m
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -163,18 +159,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -197,13 +193,12 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_DEBUG=y
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

51
target/linux/adm5120/router_le/config-2.6.28
View File

@@ -1,11 +1,10 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_8139TOO is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_6104KP=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_61X4WG=y
CONFIG_ADM5120_MACH_CAS_771=y
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
@@ -17,8 +16,8 @@ CONFIG_ADM5120_MACH_NP27G=y
CONFIG_ADM5120_MACH_NP28G=y
CONFIG_ADM5120_MACH_PMUGW=y
CONFIG_ADM5120_MACH_RB_11X=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_133C=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_150=y
CONFIG_ADM5120_MACH_RB_153=y
CONFIG_ADM5120_MACH_RB_192=y
@@ -33,6 +32,7 @@ CONFIG_ADM5120_OEM_OSBRIDGE=y
# CONFIG_ADM5120_OEM_ZYXEL is not set
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -42,10 +42,6 @@ CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_ATA=m
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_ATA_PIIX is not set
CONFIG_ATA_SFF=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -58,9 +54,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -83,15 +79,15 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRYPTO_AEAD2=m
CONFIG_CRYPTO_ALGAPI=m
CONFIG_CRYPTO_ALGAPI2=m
CONFIG_CRYPTO_ALGAPI=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=m
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HASH2=m
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_MANAGER2=m
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_RNG2=m
CONFIG_CSRC_R4K=y
CONFIG_DEVPORT=y
@@ -103,8 +99,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
@@ -120,36 +116,35 @@ CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_COMPAT=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_FIRMWARE=y
# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_PCI=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_IEEE80211=m
CONFIG_IEEE80211_CRYPT_WEP=m
CONFIG_IEEE80211=m
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
@@ -160,7 +155,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -170,6 +164,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
@@ -177,10 +172,9 @@ CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND=y
CONFIG_MTD_TRXSPLIT=y
# CONFIG_NATSEMI is not set
CONFIG_NO_HZ=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
@@ -188,10 +182,8 @@ CONFIG_NO_HZ=y
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PATA_RB153_CF=m
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -201,18 +193,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCSI=m
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -236,12 +228,11 @@ CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

53
target/linux/adm5120/router_le/config-2.6.30
View File

@@ -1,10 +1,9 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_6104KP=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_61X4WG=y
CONFIG_ADM5120_MACH_CAS_771=y
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
@@ -16,8 +15,8 @@ CONFIG_ADM5120_MACH_NP27G=y
CONFIG_ADM5120_MACH_NP28G=y
CONFIG_ADM5120_MACH_PMUGW=y
CONFIG_ADM5120_MACH_RB_11X=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_133C=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_150=y
CONFIG_ADM5120_MACH_RB_153=y
CONFIG_ADM5120_MACH_RB_192=y
@@ -32,6 +31,7 @@ CONFIG_ADM5120_OEM_OSBRIDGE=y
# CONFIG_ADM5120_OEM_ZYXEL is not set
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -41,18 +41,14 @@ CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_ATA=m
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_ATA_PIIX is not set
CONFIG_ATA_SFF=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2"
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -61,9 +57,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -88,18 +84,18 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HASH=m
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_HASH=m
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -110,8 +106,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -131,35 +127,34 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_FIRMWARE=y
# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_PCI=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
CONFIG_LIB80211=m
CONFIG_LIB80211_CRYPT_CCMP=m
CONFIG_LIB80211_CRYPT_TKIP=m
CONFIG_LIB80211_CRYPT_WEP=m
CONFIG_LIB80211=m
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
@@ -168,7 +163,6 @@ CONFIG_LIB80211_CRYPT_WEP=m
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -178,6 +172,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
@@ -185,10 +180,9 @@ CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND=y
CONFIG_MTD_TRXSPLIT=y
# CONFIG_NATSEMI is not set
CONFIG_NO_HZ=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
@@ -196,10 +190,8 @@ CONFIG_NO_HZ=y
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PATA_RB153_CF=m
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -208,18 +200,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_SCSI=m
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -244,13 +236,12 @@ CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

52
target/linux/adm5120/router_le/config-2.6.31
View File

@@ -1,10 +1,9 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_6104KP=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_61X4WG=y
CONFIG_ADM5120_MACH_CAS_771=y
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
@@ -16,8 +15,8 @@ CONFIG_ADM5120_MACH_NP27G=y
CONFIG_ADM5120_MACH_NP28G=y
CONFIG_ADM5120_MACH_PMUGW=y
CONFIG_ADM5120_MACH_RB_11X=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_133C=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_150=y
CONFIG_ADM5120_MACH_RB_153=y
CONFIG_ADM5120_MACH_RB_192=y
@@ -32,6 +31,7 @@ CONFIG_ADM5120_OEM_OSBRIDGE=y
# CONFIG_ADM5120_OEM_ZYXEL is not set
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
CONFIG_ADM5120=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -44,16 +44,13 @@ CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_ATA=m
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_ATA_PIIX is not set
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2"
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -62,9 +59,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -89,18 +86,18 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HASH=m
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_HASH=m
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -111,8 +108,8 @@ CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -132,35 +129,34 @@ CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_FIRMWARE=y
# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_PCI=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
CONFIG_INOTIFY=y
# CONFIG_INPUT_GPIO_BUTTONS is not set
CONFIG_INPUT=m
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
# CONFIG_LEMOTE_FULONG is not set
CONFIG_LIB80211=m
CONFIG_LIB80211_CRYPT_CCMP=m
CONFIG_LIB80211_CRYPT_TKIP=m
CONFIG_LIB80211_CRYPT_WEP=m
CONFIG_LIB80211=m
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
@@ -170,7 +166,6 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -180,6 +175,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
@@ -187,10 +183,9 @@ CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND=y
CONFIG_MTD_TRXSPLIT=y
# CONFIG_NATSEMI is not set
CONFIG_NLS=m
CONFIG_NO_HZ=y
# CONFIG_NO_IOPORT is not set
@@ -199,10 +194,8 @@ CONFIG_NO_HZ=y
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PATA_RB153_CF=m
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
@@ -211,18 +204,18 @@ CONFIG_PCI_DOMAINS=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_SCSI=m
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
CONFIG_SERIAL_AMBA_PL010=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -246,12 +239,11 @@ CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_EHCI_HCD=m
CONFIG_USB=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m

10
target/linux/amazon/Makefile
View File

@@ -10,7 +10,7 @@ ARCH:=mips
BOARD:=amazon
BOARDNAME:=Infineon Amazon
FEATURES:=squashfs jffs2 broken
LINUX_VERSION:=2.6.21.7
LINUX_VERSION:=2.6.30.9
include $(INCLUDE_DIR)/target.mk
@@ -18,4 +18,12 @@ define Target/Description
Build firmware images for Infineon Amazon boards
endef
ifeq ($(KERNEL_PATCHVER),2.6.30)
define Kernel/Prepare
$(call Kernel/Prepare/Default)
mv $(LINUX_DIR)/include/asm-mips/mach-amazon $(LINUX_DIR)/arch/mips/include/asm/mach-amazon
mv $(LINUX_DIR)/drivers/char/watchdog/amazon_wdt.c $(LINUX_DIR)/drivers/watchdog/amazon_wdt.c
endef
endif
$(eval $(call BuildTarget))

18
target/linux/amazon/config-2.6.21
View File

@@ -2,15 +2,14 @@ CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_ADM6996_SUPPORT=y
CONFIG_AMAZON=y
CONFIG_AMAZON_ASC_UART=y
CONFIG_AMAZON_MTD=y
CONFIG_AMAZON_NET_SW=y
CONFIG_AMAZON_PCI=y
CONFIG_AMAZON_WDT=y
CONFIG_AMAZON=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_BASE_SMALL=0
CONFIG_BITREVERSE=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/bin/sh"
CONFIG_CPU_BIG_ENDIAN=y
@@ -18,9 +17,9 @@ CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -55,16 +54,14 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_KALLSYMS=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
@@ -77,10 +74,10 @@ CONFIG_MIPS=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_MIPS_MTX1 is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
@@ -90,11 +87,12 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MIPS=y
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT is not set
CONFIG_MTD_AMAZON_BUS_WIDTH_16=y
# CONFIG_MTD_AMAZON_BUS_WIDTH_32 is not set
# CONFIG_MTD_AMAZON_BUS_WIDTH_8 is not set
@@ -106,13 +104,13 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
CONFIG_MTD_PHYSMAP_LEN=0x0
CONFIG_MTD_PHYSMAP_START=0x0
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_NET_PCI is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_NET_VENDOR_3COM is not set

90
target/linux/ar7/config-2.6.27 → target/linux/amazon/config-2.6.30
View File

@@ -1,34 +1,39 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
CONFIG_ADM6996_SUPPORT=y
CONFIG_AMAZON=y
CONFIG_AMAZON_ASC_UART=y
CONFIG_AMAZON_MTD=y
CONFIG_AMAZON_NET_SW=y
CONFIG_AMAZON_PCI=y
CONFIG_AMAZON_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/bin/sh"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
@@ -36,6 +41,7 @@ CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
@@ -47,40 +53,34 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_ARCH_TRACEHOOK is not set
# CONFIG_HAVE_CLK is not set
# CONFIG_HAVE_DMA_ATTRS is not set
# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
# CONFIG_HAVE_IOREMAP_PROT is not set
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KALLSYMS=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
@@ -98,25 +98,33 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_AMAZON_BUS_WIDTH_16=y
# CONFIG_MTD_AMAZON_BUS_WIDTH_32 is not set
# CONFIG_MTD_AMAZON_BUS_WIDTH_8 is not set
# CONFIG_MTD_AMAZON_FLASH_SIZE_16 is not set
# CONFIG_MTD_AMAZON_FLASH_SIZE_2 is not set
CONFIG_MTD_AMAZON_FLASH_SIZE_4=y
# CONFIG_MTD_AMAZON_FLASH_SIZE_8 is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0x10000000
CONFIG_NO_EXCEPT_FILL=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_NET_PCI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_8250 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -129,15 +137,13 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SWAP_IO_SPACE=y
# CONFIG_SLOW_WORK is not set
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
# CONFIG_VGASTATE is not set
CONFIG_VLYNQ=y
CONFIG_ZONE_DMA_FLAG=0

18
target/linux/amazon/files/arch/mips/amazon/prom.c
View File

@@ -59,12 +59,28 @@ void prom_printf(const char * fmt, ...)
void __init prom_init(void)
{
char **envp = (char **) fw_arg2;
int memsize = 16; /* assume 16M as default */
mips_machgroup = MACH_GROUP_INFINEON;
mips_machtype = MACH_INFINEON_AMAZON;
envp = (char **)KSEG1ADDR((unsigned long)envp);
while (*envp) {
char *e = (char *)KSEG1ADDR(*envp);
if (!strncmp(e, "memsize=", 8)) {
e += 8;
memsize = simple_strtoul(e, NULL, 10);
}
envp++;
}
memsize *= 1024 * 1024;
strcpy(&(arcs_cmdline[0]), "console=ttyS0,115200 rootfstype=squashfs,jffs2");
add_memory_region(0x00000000, 0x1000000, BOOT_MEM_RAM);
add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
}
void prom_free_prom_memory(void)

4
target/linux/amazon/files/drivers/char/watchdog/amazon_wdt.c
View File

@@ -222,7 +222,7 @@ int __init amazon_wdt_init_module(void)
#endif
amazon_wdt_isopen=0;
printk(KERN_INFO DRV_NAME "driver loaded but inactive");
printk(KERN_INFO DRV_NAME "driver loaded but inactive\n");
return 0;
}
@@ -233,7 +233,7 @@ void amazon_wdt_cleanup_module(void)
remove_proc_entry("wdt_register", amazon_wdt_dir);
remove_proc_entry("amazon_wdt", NULL);
#endif
printk(KERN_INFO DRV_NAME "unregistered");
printk(KERN_INFO DRV_NAME "unregistered\n");
return;
}

74
target/linux/amazon/files/drivers/net/amazon_sw.c
View File

@@ -105,10 +105,7 @@ module_param(timeout, int, 0);
int switch_init(struct net_device *dev);
void switch_tx_timeout(struct net_device *dev);
struct net_device switch_devs[2] = {
{init:switch_init,},
{init:switch_init,}
};
static struct net_device *switch_devs[2];
int add_mac_table_entry(u64 entry_value)
{
@@ -274,7 +271,7 @@ __setup("ethaddr=", ethaddr_setup);
static void open_rx_dma(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
struct dma_device_info *dma_dev = priv->dma_device;
int i;
@@ -286,7 +283,7 @@ static void open_rx_dma(struct net_device *dev)
#ifdef CONFIG_NET_HW_FLOWCONTROL
static void close_rx_dma(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
struct dma_device_info *dma_dev = priv->dma_device;
int i;
@@ -306,7 +303,7 @@ void amazon_xon(struct net_device *dev)
int switch_open(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
if (!strcmp(dev->name, "eth1")) {
priv->mdio_phy_addr = PHY0_ADDR;
}
@@ -325,7 +322,7 @@ int switch_open(struct net_device *dev)
int switch_release(struct net_device *dev)
{
int i;
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
struct dma_device_info *dma_dev = priv->dma_device;
for (i = 0; i < dma_dev->num_tx_chan; i++)
@@ -348,7 +345,7 @@ int switch_release(struct net_device *dev)
void switch_rx(struct net_device *dev, int len, struct sk_buff *skb)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
#ifdef CONFIG_NET_HW_FLOWCONTROL
int mit_sel = 0;
#endif
@@ -381,7 +378,7 @@ void switch_rx(struct net_device *dev, int len, struct sk_buff *skb)
int asmlinkage switch_hw_tx(char *buf, int len, struct net_device *dev)
{
struct switch_priv *priv = dev->priv;
struct switch_priv *priv = netdev_priv(dev);
struct dma_device_info *dma_dev = priv->dma_device;
dma_dev->current_tx_chan = 0;
@@ -392,7 +389,7 @@ int asmlinkage switch_tx(struct sk_buff *skb, struct net_device *dev)
{
int len;
char *data;
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
data = skb->data;
@@ -411,7 +408,7 @@ int asmlinkage switch_tx(struct sk_buff *skb, struct net_device *dev)
void switch_tx_timeout(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
priv->stats.tx_errors++;
netif_wake_queue(dev);
return;
@@ -419,7 +416,7 @@ void switch_tx_timeout(struct net_device *dev)
void negotiate(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
unsigned short data = get_mdio_reg(priv->mdio_phy_addr, MDIO_ADVERTISMENT_REG);
data &= ~(MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD);
@@ -470,7 +467,7 @@ void negotiate(struct net_device *dev)
void set_duplex(struct net_device *dev, enum duplex new_duplex)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
if (new_duplex != priv->current_duplex) {
priv->current_duplex = new_duplex;
negotiate(dev);
@@ -479,14 +476,14 @@ void set_duplex(struct net_device *dev, enum duplex new_duplex)
void set_speed(struct net_device *dev, unsigned long speed)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
priv->current_speed_selection = speed;
negotiate(dev);
}
static int switch_ethtool_ioctl(struct net_device *dev, struct ifreq *ifr)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
struct ethtool_cmd ecmd;
if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
@@ -642,7 +639,7 @@ int switch_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
struct net_device_stats *switch_stats(struct net_device *dev)
{
struct switch_priv *priv = (struct switch_priv *) dev->priv;
struct switch_priv *priv = (struct switch_priv *) netdev_priv(dev);
return &priv->stats;
}
@@ -692,7 +689,7 @@ int dma_intr_handler(struct dma_device_info *dma_dev, int status)
{
struct net_device *dev;
dev = switch_devs + (u32) dma_dev->priv;
dev = dma_dev->priv;
switch (status) {
case RCV_INT:
switch_hw_receive(dev, dma_dev);
@@ -735,19 +732,18 @@ int dma_buffer_free(u8 * dataptr, void *opt)
return OK;
}
int init_dma_device(_dma_device_info * dma_dev)
int init_dma_device(_dma_device_info * dma_dev, struct net_device *dev)
{
int i;
int num_tx_chan, num_rx_chan;
if (strcmp(dma_dev->device_name, "switch1") == 0) {
num_tx_chan = 1;
num_rx_chan = 2;
dma_dev->priv = (void *) 0;
} else {
num_tx_chan = 1;
num_rx_chan = 2;
dma_dev->priv = (void *) 1;
}
dma_dev->priv = dev;
dma_dev->weight = 1;
dma_dev->num_tx_chan = num_tx_chan;
@@ -799,21 +795,15 @@ int switch_init(struct net_device *dev)
dev->tx_timeout = switch_tx_timeout;
dev->watchdog_timeo = timeout;
SET_MODULE_OWNER(dev);
dev->priv = kmalloc(sizeof(struct switch_priv), GFP_KERNEL);
if (dev->priv == NULL)
return -ENOMEM;
memset(dev->priv, 0, sizeof(struct switch_priv));
priv = dev->priv;
priv = netdev_priv(dev);
priv->dma_device = (struct dma_device_info *) kmalloc(sizeof(struct dma_device_info), GFP_KERNEL);
if ((dev - switch_devs) == 0) {
if (priv->num == 0) {
sprintf(priv->dma_device->device_name, "switch1");
} else if ((dev - switch_devs) == 1) {
} else if (priv->num == 1) {
sprintf(priv->dma_device->device_name, "switch2");
}
printk("\"%s\"\n", priv->dma_device->device_name);
init_dma_device(priv->dma_device);
init_dma_device(priv->dma_device, dev);
result = dma_device_register(priv->dma_device);
/* read the mac address from the mac table and put them into the mac table. */
@@ -827,12 +817,12 @@ int switch_init(struct net_device *dev)
dev->dev_addr[2] = 0xda;
dev->dev_addr[3] = 0x86;
dev->dev_addr[4] = 0x23;
dev->dev_addr[5] = 0x74 + (unsigned char) (dev - switch_devs);
dev->dev_addr[5] = 0x74 + (unsigned char) priv->num;
} else {
for (i = 0; i < 6; i++) {
dev->dev_addr[i] = my_ethaddr[i];
}
dev->dev_addr[5] += +(unsigned char) (dev - switch_devs);
dev->dev_addr[5] += +(unsigned char) priv->num;
}
return OK;
}
@@ -840,12 +830,16 @@ int switch_init(struct net_device *dev)
int switch_init_module(void)
{
int i = 0, result, device_present = 0;
struct switch_priv *priv;
for (i = 0; i < AMAZON_SW_INT_NO; i++) {
sprintf(switch_devs[i].name, "eth%d", i);
if ((result = register_netdev(switch_devs + i)))
printk("error %i registering device \"%s\"\n", result, switch_devs[i].name);
switch_devs[i] = alloc_etherdev(sizeof(struct switch_priv));
switch_devs[i]->init = switch_init;
strcpy(switch_devs[i]->name, "eth%d");
priv = (struct switch_priv *) netdev_priv(switch_devs[i]);
priv->num = i;
if ((result = register_netdev(switch_devs[i])))
printk("error %i registering device \"%s\"\n", result, switch_devs[i]->name);
else
device_present++;
}
@@ -858,13 +852,13 @@ void switch_cleanup(void)
int i;
struct switch_priv *priv;
for (i = 0; i < AMAZON_SW_INT_NO; i++) {
priv = switch_devs[i].priv;
priv = netdev_priv(switch_devs[i]);
if (priv->dma_device) {
dma_device_unregister(priv->dma_device);
kfree(priv->dma_device);
}
kfree(switch_devs[i].priv);
unregister_netdev(switch_devs + i);
kfree(netdev_priv(switch_devs[i]));
unregister_netdev(switch_devs[i]);
}
return;
}

6
target/linux/amazon/files/drivers/serial/amazon_asc.c
View File

@@ -102,10 +102,16 @@ static void amazonasc_enable_ms(struct uart_port *port)
return;
}
#include <linux/version.h>
static void
amazonasc_rx_chars(struct uart_port *port)
{
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
struct tty_struct *tty = port->info->port.tty;
#else
struct tty_struct *tty = port->info->tty;
#endif
unsigned int ch = 0, rsr = 0, fifocnt;
fifocnt = amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;

1
target/linux/amazon/files/include/asm-mips/amazon/amazon_sw.h
View File

@@ -166,6 +166,7 @@ struct switch_priv {
int rx_queue_len;
int full_duplex;
enum duplex current_duplex;
int num;
};
#endif //AMAZON_SW_H

24
target/linux/amazon/files/include/asm-mips/mach-amazon/war.h Normal file
View File

@@ -0,0 +1,24 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#ifndef __ASM_MIPS_MACH_AMAZON_WAR_H
#define __ASM_MIPS_MACH_AMAZON_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
#define R4600_V2_HIT_CACHEOP_WAR 0
#define R5432_CP0_INTERRUPT_WAR 0
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#define MIPS4K_ICACHE_REFILL_WAR 0
#define MIPS_CACHE_SYNC_WAR 0
#define TX49XX_ICACHE_INDEX_INV_WAR 0
#define RM9000_CDEX_SMP_WAR 0
#define ICACHE_REFILLS_WORKAROUND_WAR 0
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
#endif

32
target/linux/amazon/patches-2.6.30/000-mips-bad-intctl.patch Normal file
View File

@@ -0,0 +1,32 @@
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1542,7 +1542,16 @@ void __cpuinit per_cpu_trap_init(void)
*/
if (cpu_has_mips_r2) {
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+ if (!cp0_compare_irq)
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+ if (!cp0_perfcount_irq)
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+
+ if (arch_fixup_c0_irqs)
+ arch_fixup_c0_irqs();
+
if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
} else {
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -157,8 +157,10 @@ extern void free_irqno(unsigned int irq)
* IE7. Since R2 their number has to be read from the c0_intctl register.
*/
#define CP0_LEGACY_COMPARE_IRQ 7
+#define CP0_LEGACY_PERFCNT_IRQ 7
extern int cp0_compare_irq;
extern int cp0_perfcount_irq;
+extern void __weak arch_fixup_c0_irqs(void);
#endif /* _ASM_IRQ_H */

33
target/linux/amazon/patches-2.6.30/010-mips_clocksource_init_war.patch Normal file
View File

@@ -0,0 +1,33 @@
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -21,6 +21,22 @@
#ifndef CONFIG_MIPS_MT_SMTC
+/*
+ * Compare interrupt can be routed and latched outside the core,
+ * so a single execution hazard barrier may not be enough to give
+ * it time to clear as seen in the Cause register. 4 time the
+ * pipeline depth seems reasonably conservative, and empirically
+ * works better in configurations with high CPU/bus clock ratios.
+ */
+
+#define compare_change_hazard() \
+ do { \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ } while (0)
+
static int mips_next_event(unsigned long delta,
struct clock_event_device *evt)
{
@@ -30,6 +46,7 @@ static int mips_next_event(unsigned long
cnt = read_c0_count();
cnt += delta;
write_c0_compare(cnt);
+ compare_change_hazard();
res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
return res;
}

10
target/linux/amazon/patches-2.6.30/017-wdt-driver.patch Normal file
View File

@@ -0,0 +1,10 @@
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -105,6 +105,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+obj-$(CONFIG_AMAZON_WDT) += amazon_wdt.o
# PARISC Architecture

48
target/linux/amazon/patches-2.6.30/100-board.patch Normal file
View File

@@ -0,0 +1,48 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -60,6 +60,21 @@ config BCM47XX
help
Support for BCM47XX based boards
+config AMAZON
+ bool "Amazon support (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select CEVT_R4K
+ select CSRC_R4K
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select HAVE_STD_PC_SERIAL_PORT
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_HAS_EARLY_PRINTK
+ select HW_HAS_PCI
+
config MIPS_COBALT
bool "Cobalt Server"
select CEVT_R4K
@@ -633,6 +648,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
+source "arch/mips/amazon/Kconfig"
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/jazz/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -283,6 +283,13 @@ libs-$(CONFIG_MIPS_XXS1500) += arch/mips
load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
#
+# Infineon AMAZON
+#
+core-$(CONFIG_AMAZON) += arch/mips/amazon/
+cflags-$(CONFIG_AMAZON) += -I$(srctree)/arch/mips/include/asm/mach-amazon
+load-$(CONFIG_AMAZON) += 0xffffffff80002000
+
+#
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/

7
target/linux/amazon/patches-2.6.30/130-mtd_drivers.patch Normal file
View File

@@ -0,0 +1,7 @@
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -62,3 +62,4 @@ obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_
obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o
obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
obj-$(CONFIG_MTD_VMU) += vmu-flash.o
+obj-$(CONFIG_AMAZON_MTD) += amazon.o

9
target/linux/amazon/patches-2.6.30/140-net_drivers.patch Normal file
View File

@@ -0,0 +1,9 @@
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -272,3 +272,6 @@ obj-$(CONFIG_VIRTIO_NET) += virtio_net.o
obj-$(CONFIG_SFC) += sfc/
obj-$(CONFIG_WIMAX) += wimax/
+
+obj-$(CONFIG_AMAZON_NET_SW) += amazon_sw.o
+obj-$(CONFIG_ADM6996_SUPPORT) += admmod.o

10
target/linux/amazon/patches-2.6.30/150-serial_driver.patch Normal file
View File

@@ -0,0 +1,10 @@
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -3,6 +3,7 @@
#
obj-$(CONFIG_SERIAL_CORE) += serial_core.o
+obj-$(CONFIG_AMAZON_ASC_UART) += amazon_asc.o
obj-$(CONFIG_SERIAL_21285) += 21285.o
# These Sparc drivers have to appear before others such as 8250

56
target/linux/amazon/patches-2.6.30/160-cfi-swap.patch Normal file
View File

@@ -0,0 +1,56 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1090,6 +1090,9 @@ static int __xipram do_write_oneword(str
int retry_cnt = 0;
adr += chip->start;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr, FL_WRITING);
@@ -1372,7 +1375,11 @@ static int __xipram do_write_buffer(stru
z = 0;
while(z < words * map_bankwidth(map)) {
datum = map_word_load(map, buf);
+#ifdef CONFIG_AMAZON
+ map_write(map, datum, (adr + z) ^ 0x2);
+#else
map_write(map, datum, adr + z);
+#endif
z += map_bankwidth(map);
buf += map_bankwidth(map);
@@ -1617,6 +1624,9 @@ static int __xipram do_erase_oneblock(st
int ret = 0;
adr += chip->start;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr, FL_ERASING);
@@ -1745,6 +1755,10 @@ static int do_atmel_lock(struct map_info
struct cfi_private *cfi = map->fldrv_priv;
int ret;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
+
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr + chip->start, FL_LOCKING);
if (ret)
@@ -1781,6 +1795,10 @@ static int do_atmel_unlock(struct map_in
struct cfi_private *cfi = map->fldrv_priv;
int ret;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
+
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr + chip->start, FL_UNLOCKING);
if (ret)

53
target/linux/amazon/patches-2.6.30/200-fix_deprecated_interrupt_definations.patch Normal file
View File

@@ -0,0 +1,53 @@
--- a/arch/mips/amazon/dma-core.c
+++ b/arch/mips/amazon/dma-core.c
@@ -1387,7 +1387,7 @@ static int dma_init(void)
AMAZON_DMA_EMSG("cannot register device dma-core!\n");
return result;
}
- result = request_irq(AMAZON_DMA_INT, dma_interrupt, SA_INTERRUPT, "dma-core", (void *) &dma_interrupt);
+ result = request_irq(AMAZON_DMA_INT, dma_interrupt, IRQF_DISABLED, "dma-core", (void *) &dma_interrupt);
if (result) {
AMAZON_DMA_EMSG("error, cannot get dma_irq!\n");
free_irq(AMAZON_DMA_INT, (void *) &dma_interrupt);
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -157,7 +157,7 @@ out:
static struct irqaction cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "cascade",
};
--- a/arch/mips/amazon/setup.c
+++ b/arch/mips/amazon/setup.c
@@ -107,7 +107,7 @@ static void amazon_timer6_interrupt(int
static struct irqaction hrt_irqaction = {
.handler = amazon_timer6_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "hrt",
};
--- a/drivers/atm/amazon_tpe.c
+++ b/drivers/atm/amazon_tpe.c
@@ -2404,13 +2404,13 @@ amazon_atm_dev_t * amazon_atm_create(voi
// Register interrupts for insertion and extraction
- request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, SA_INTERRUPT, "tpe_swie", NULL);
- request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, SA_INTERRUPT, "tpe_cbm", NULL);
+ request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, IRQF_DISABLED, "tpe_swie", NULL);
+ request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, IRQF_DISABLED, "tpe_cbm", NULL);
#ifdef AMAZON_ATM_DEBUG
- request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, SA_INTERRUPT, "tpe_htu", NULL);
+ request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, IRQF_DISABLED, "tpe_htu", NULL);
#endif
#ifdef AMAZON_TPE_TEST_AAL5_INT
- request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, SA_INTERRUPT, "tpe_aal5", NULL);
+ request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, IRQF_DISABLED, "tpe_aal5", NULL);
#endif
return &g_atm_dev;
}

12
target/linux/amazon/patches-2.6.30/210-remove_unnedded_variables.patch Normal file
View File

@@ -0,0 +1,12 @@
--- a/arch/mips/amazon/prom.c
+++ b/arch/mips/amazon/prom.c
@@ -63,9 +63,6 @@ void __init prom_init(void)
int memsize = 16; /* assume 16M as default */
- mips_machgroup = MACH_GROUP_INFINEON;
- mips_machtype = MACH_INFINEON_AMAZON;
-
envp = (char **)KSEG1ADDR((unsigned long)envp);
while (*envp) {
char *e = (char *)KSEG1ADDR(*envp);

93
target/linux/amazon/patches-2.6.30/220-fix_timer.patch Normal file
View File

@@ -0,0 +1,93 @@
--- a/arch/mips/amazon/setup.c
+++ b/arch/mips/amazon/setup.c
@@ -36,6 +36,12 @@
#include <asm/amazon/irq.h>
#include <asm/amazon/model.h>
+static unsigned int r4k_offset;
+static unsigned int r4k_cur;
+
+/* required in arch/mips/kernel/kspd.c */
+unsigned long cpu_khz;
+
extern void prom_printf(const char * fmt, ...);
static void amazon_reboot_setup(void);
@@ -91,35 +97,32 @@ unsigned int amazon_get_cpu_ver(void)
return cpu_ver;
}
-void amazon_time_init(void)
+static inline u32 amazon_get_counter_resolution(void)
{
- mips_hpt_frequency = amazon_get_cpu_hz()/2;
- printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
+ u32 res;
+ __asm__ __volatile__(
+ ".set push\n"
+ ".set mips32r2\n"
+ ".set noreorder\n"
+ "rdhwr %0, $3\n"
+ "ehb\n"
+ ".set pop\n"
+ : "=&r" (res)
+ : /* no input */
+ : "memory");
+ instruction_hazard();
+ return res;
}
-extern int hr_time_resolution;
-
-/* ISR GPTU Timer 6 for high resolution timer */
-static void amazon_timer6_interrupt(int irq, void *dev_id)
+void __init plat_time_init(void)
{
- timer_interrupt(AMAZON_TIMER6_INT, NULL);
-}
-
-static struct irqaction hrt_irqaction = {
- .handler = amazon_timer6_interrupt,
- .flags = IRQF_DISABLED,
- .name = "hrt",
-};
+ mips_hpt_frequency = amazon_get_cpu_hz() / amazon_get_counter_resolution();
+ r4k_offset = mips_hpt_frequency / HZ;
+ printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
+ printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
-/*
- * THe CPU counter for System timer, set to HZ
- * GPTU Timer 6 for high resolution timer, set to hr_time_resolution
- * Also misuse this routine to print out the CPU type and clock.
- */
-void __init plat_timer_setup(struct irqaction *irq)
-{
- /* cpu counter for timer interrupts */
- setup_irq(MIPS_CPU_TIMER_IRQ, irq);
+ r4k_cur = (read_c0_count() + r4k_offset);
+ write_c0_compare(r4k_cur);
/* enable the timer in the PMU */
amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
@@ -147,7 +150,6 @@ void __init plat_mem_setup(void)
}
amazon_reboot_setup();
- board_time_init = amazon_time_init;
//stop reset TPE and DFE
amazon_writel(0, AMAZON_RST_REQ);
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -184,3 +184,10 @@ void __init arch_init_irq(void)
set_irq_chip(i, &amazon_irq_type);
}
}
+
+void __cpuinit arch_fixup_c0_irqs(void)
+{
+ /* FIXME: check for CPUID and only do fix for specific chips/versions */
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+}

20
target/linux/amazon/patches-2.6.30/230-fix_pci.patch Normal file
View File

@@ -0,0 +1,20 @@
--- a/arch/mips/amazon/pci.c
+++ b/arch/mips/amazon/pci.c
@@ -182,7 +182,7 @@ static struct pci_controller amazon_pci_
.io_resource = &pci_io_resource
};
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
switch (slot) {
case 13:
@@ -240,7 +240,7 @@ int pcibios_plat_dev_init(struct pci_dev
return 0;
}
-int amazon_pci_init(void)
+int __init amazon_pci_init(void)
{
u32 temp_buffer;

20
target/linux/amazon/patches-2.6.30/240-irq_fix.patch Normal file
View File

@@ -0,0 +1,20 @@
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -177,12 +177,11 @@ void __init arch_init_irq(void)
setup_irq(i, &cascade);
}
- for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- set_irq_chip(i, &amazon_irq_type);
- }
+ for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
+ set_irq_chip_and_handler(i, &amazon_irq_type,
+ handle_level_irq);
+
+ set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
}
void __cpuinit arch_fixup_c0_irqs(void)

20
target/linux/ar7/config-default
View File

@@ -1,23 +1,23 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
CONFIG_AR7=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
@@ -27,9 +27,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -51,16 +51,16 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -76,7 +76,6 @@ CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
@@ -90,9 +89,7 @@ CONFIG_LEDS_GPIO=y
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
@@ -100,6 +97,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
@@ -108,14 +106,13 @@ CONFIG_NO_EXCEPT_FILL=y
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PCSPKR_PLATFORM is not set
# CONFIG_PCI is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
@@ -139,7 +136,6 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_VLYNQ=y

86
target/linux/ar7/patches-2.6.27/100-board_support.patch
View File

@@ -1,86 +0,0 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -19,6 +19,24 @@ choice
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select CEVT_R4K
+ select CSRC_R4K
+ select IRQ_CPU
+ select NO_EXCEPT_FILL
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1203,9 +1203,22 @@ void *set_except_vector(int n, void *add
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- local_flush_icache_range(ebase + 0x200, ebase + 0x204);
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
}
return (void *)old_handler;
}
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -167,6 +167,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -182,8 +182,10 @@ typedef struct { unsigned long pgprot; }
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>

26
target/linux/ar7/patches-2.6.27/110-flash.patch
View File

@@ -1,26 +0,0 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -188,6 +188,12 @@ config MTD_MYLOADER_PARTS
You will still need the parsing functions to be called by the driver
for your particular device. It won't happen automatically.
+config MTD_AR7_PARTS
+ tristate "TI AR7 partitioning support"
+ depends on MTD_PARTITIONS
+ ---help---
+ TI AR7 partitioning support
+
comment "User Modules And Translation Layers"
config MTD_CHAR
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -85,7 +85,7 @@ static int physmap_flash_remove(struct p
static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
#ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)

28
target/linux/ar7/patches-2.6.27/120-gpio_chrdev.patch
View File

@@ -1,28 +0,0 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -968,6 +968,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

20
target/linux/ar7/patches-2.6.27/130-vlynq.patch
View File

@@ -1,20 +0,0 @@
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -100,5 +100,7 @@ source "drivers/auxdisplay/Kconfig"
source "drivers/uio/Kconfig"
+source "drivers/vlynq/Kconfig"
+
source "drivers/xen/Kconfig"
endmenu
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -96,6 +96,7 @@ obj-$(CONFIG_DCA) += dca/
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_OF) += of/
+obj-$(CONFIG_VLYNQ) += vlynq/
obj-$(CONFIG_SSB) += ssb/
obj-$(CONFIG_VIRTIO) += virtio/
obj-$(CONFIG_REGULATOR) += regulator/

29
target/linux/ar7/patches-2.6.27/140-watchdog_bootcr.patch
View File

@@ -1,29 +0,0 @@
--- a/drivers/watchdog/ar7_wdt.c 2009-01-25 01:17:01.000000000 +1300
+++ b/drivers/watchdog/ar7_wdt.c 2009-01-25 01:19:15.000000000 +1300
@@ -293,12 +293,26 @@
.fops = &ar7_wdt_fops,
};
+#define AR7_WDT_HARDWARE_ENABLE 0x10
+
static int __init ar7_wdt_init(void)
{
int rc;
+ u32 *bootcr;
+ u32 bootcr_value;
ar7_wdt_get_regs();
+ /* arch/mips/ar7/clocks.c is the only other thing that reads this */
+ bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
+ bootcr_value = *bootcr;
+ iounmap(bootcr);
+
+ if (!(bootcr_value & AR7_WDT_HARDWARE_ENABLE)) {
+ printk(KERN_INFO DRVNAME ": watchdog disabled in hardware (bootcr=%#x)\n", bootcr_value);
+ return -ENODEV;
+ }
+
if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt),
LONGNAME)) {
printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n");

11
target/linux/ar7/patches-2.6.27/150-cpmac_not_broken.patch
View File

@@ -1,11 +0,0 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1823,7 +1823,7 @@ config SC92031
config CPMAC
tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
- depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN
+ depends on NET_ETHERNET && EXPERIMENTAL && AR7
select PHYLIB
help
TI AR7 CPMAC Ethernet support

47
target/linux/ar7/patches-2.6.27/160-cpmac_up_and_running.patch
View File

@@ -1,47 +0,0 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -33,6 +33,8 @@
#include <linux/vlynq.h>
#include <linux/leds.h>
#include <linux/string.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
#include <asm/addrspace.h>
#include <asm/ar7/ar7.h>
@@ -205,6 +207,13 @@
.width = 2,
};
+/* lets assume this is suitable for both high and low cpmacs links */
+static struct fixed_phy_status fixed_phy_status __initdata = {
+ .link = 1,
+ .speed = 100,
+ .duplex = 1,
+};
+
static struct plat_cpmac_data cpmac_low_data = {
.reset_bit = 17,
.power_bit = 20,
@@ -506,6 +515,10 @@
}
if (ar7_has_high_cpmac()) {
+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(1, cpmac_high_data.dev_addr);
res = platform_device_register(&cpmac_high);
if (res)
@@ -514,6 +527,10 @@
cpmac_low_data.phy_mask = 0xffffffff;
}
+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(0, cpmac_low_data.dev_addr);
res = platform_device_register(&cpmac_low);
if (res)

40
target/linux/ar7/patches-2.6.27/500-serial_kludge.patch
View File

@@ -1,40 +0,0 @@
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -264,6 +264,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2552,7 +2559,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -40,7 +40,8 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250 16 /* max port ID */
+#define PORT_AR7 17
+#define PORT_MAX_8250 17 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed

70
target/linux/ar7/patches-2.6.27/900-cpmac_multiqueue.patch
View File

@@ -1,70 +0,0 @@
This patch fixes the network driver cpmac.c for compilation with
configuration option CONFIG_NETDEVICES_MULTIQUEUE.
These compiler warnings are fixed by the patch:
drivers/net/cpmac.c: In function 'cpmac_end_xmit':
drivers/net/cpmac.c:630: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast
drivers/net/cpmac.c:641: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast
drivers/net/cpmac.c: In function 'cpmac_probe':
drivers/net/cpmac.c:1128: warning: unused variable 'i'
During runtime, the unpatched driver raises a fatal runtime exception.
This is fixed by calling __netif_subqueue_stopped instead
of netif_subqueue_stopped, too.
Two additional code parts were modified for CONFIG_NETDEVICES_MULTIQUEUE
because other drivers do it in the same way.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -621,13 +621,13 @@ static void cpmac_end_xmit(struct net_de
dev_kfree_skb_irq(desc->skb);
desc->skb = NULL;
- if (netif_subqueue_stopped(dev, queue))
+ if (__netif_subqueue_stopped(dev, queue))
netif_wake_subqueue(dev, queue);
} else {
if (netif_msg_tx_err(priv) && net_ratelimit())
printk(KERN_WARNING
"%s: end_xmit: spurious interrupt\n", dev->name);
- if (netif_subqueue_stopped(dev, queue))
+ if (__netif_subqueue_stopped(dev, queue))
netif_wake_subqueue(dev, queue);
}
}
@@ -737,7 +737,6 @@ static void cpmac_clear_tx(struct net_de
static void cpmac_hw_error(struct work_struct *work)
{
- int i;
struct cpmac_priv *priv =
container_of(work, struct cpmac_priv, reset_work);
@@ -824,7 +823,6 @@ static irqreturn_t cpmac_irq(int irq, vo
static void cpmac_tx_timeout(struct net_device *dev)
{
- int i;
struct cpmac_priv *priv = netdev_priv(dev);
spin_lock(&priv->lock);
@@ -1103,7 +1101,7 @@ static int external_switch;
static int __devinit cpmac_probe(struct platform_device *pdev)
{
- int rc, phy_id, i;
+ int rc, phy_id;
char *mdio_bus_id = "0";
struct resource *mem;
struct cpmac_priv *priv;
@@ -1132,6 +1130,7 @@ static int __devinit cpmac_probe(struct
}
dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
+ //~ dev = alloc_etherdev(sizeof(*priv));
if (!dev) {
printk(KERN_ERR "cpmac: Unable to allocate net_device\n");

92
target/linux/ar7/patches-2.6.27/910-cpmac_fixed_phy.patch
View File

@@ -1,92 +0,0 @@
This is a hack to make cpmac work with the external switch on a DG834 v3; it
should also work on other similar routers. It has not been tested on hardware
with multiple cpmac devices or with no external switch. It may be safer to
move external_switch to pdata rather than trying to detect it, and to set
phy_mask correctly rather than moving the phy search loop.
--- a/drivers/net/cpmac.c 2008-11-11 06:18:24.000000000 +1100
+++ b/drivers/net/cpmac.c 2009-04-11 10:58:58.000000000 +1000
@@ -1124,8 +1124,8 @@
static int __devinit cpmac_probe(struct platform_device *pdev)
{
int rc, phy_id;
- char *mdio_bus_id = "0";
+ char mdio_bus_id[BUS_ID_SIZE];
struct resource *mem;
struct cpmac_priv *priv;
struct net_device *dev;
@@ -1134,22 +1134,23 @@
pdata = pdev->dev.platform_data;
- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
- if (!(pdata->phy_mask & (1 << phy_id)))
- continue;
- if (!cpmac_mii.phy_map[phy_id])
- continue;
- break;
+ if (external_switch || dumb_switch) {
+ strncpy(mdio_bus_id, "0", BUS_ID_SIZE); /* fixed phys bus */
+ phy_id = pdev->id;
+ } else {
+ for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
+ if (!(pdata->phy_mask & (1 << phy_id)))
+ continue;
+ if (!cpmac_mii.phy_map[phy_id])
+ continue;
+ strncpy(mdio_bus_id, cpmac_mii.id, BUS_ID_SIZE);
+ break;
+ }
}
if (phy_id == PHY_MAX_ADDR) {
- if (external_switch || dumb_switch) {
- mdio_bus_id = 0; /* fixed phys bus */
- phy_id = pdev->id;
- } else {
- dev_err(&pdev->dev, "no PHY present\n");
- return -ENODEV;
- }
+ dev_err(&pdev->dev, "no PHY present\n");
+ return -ENODEV;
}
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
@@ -1189,9 +1190,11 @@
priv->ring_size = 64;
priv->msg_enable = netif_msg_init(debug_level, 0xff);
memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
+
+ snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
- priv->phy = phy_connect(dev, cpmac_mii.phy_map[phy_id]->dev.bus_id,
- &cpmac_adjust_link, 0, PHY_INTERFACE_MODE_MII);
+ priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0,
+ PHY_INTERFACE_MODE_MII);
if (IS_ERR(priv->phy)) {
if (netif_msg_drv(priv))
printk(KERN_ERR "%s: Could not attach to PHY\n",
@@ -1250,11 +1253,11 @@
cpmac_mii.reset(&cpmac_mii);
- for (i = 0; i < 300000; i++)
+ for (i = 0; i < 300; i++)
if ((mask = cpmac_read(cpmac_mii.priv, CPMAC_MDIO_ALIVE)))
break;
else
- cpu_relax();
+ msleep(10);
mask &= 0x7fffffff;
if (mask & (mask - 1)) {
@@ -1267,7 +1270,7 @@
}
cpmac_mii.phy_mask = ~(mask | 0x80000000);
- snprintf(cpmac_mii.id, MII_BUS_ID_SIZE, "0");
+ snprintf(cpmac_mii.id, MII_BUS_ID_SIZE, "1");
res = mdiobus_register(&cpmac_mii);
if (res)

16
target/linux/ar71xx/base-files/etc/defconfig/wndr3700/network Normal file
View File

@@ -0,0 +1,16 @@
config interface loopback
option ifname lo
option proto static
option ipaddr 127.0.0.1
option netmask 255.0.0.0
config interface lan
option ifname eth0
option type bridge
option proto static
option ipaddr 192.168.1.1
option netmask 255.255.255.0
config interface wan
option ifname eth1
option proto dhcp

5
target/linux/ar71xx/base-files/etc/diag.sh
View File

@@ -39,7 +39,7 @@ get_status_led() {
aw-nr580)
status_led="aw-nr580:green:ready"
;;
bullet-m)
bullet-m | rocket-m | nano-m)
status_led="ubnt:green:link4"
;;
ls-sr71)
@@ -66,6 +66,9 @@ get_status_led() {
tl-wr941nd)
status_led="tl-wr941nd:green:system"
;;
wndr3700)
status_led="wndr3700:green:power"
;;
wnr2000)
status_led="wnr2000:green:power"
;;

9
target/linux/ar71xx/base-files/lib/ar71xx.sh
View File

@@ -22,6 +22,9 @@ ar71xx_board_name() {
*"Bullet M")
name="bullet-m"
;;
*"Nanostation M")
name="nanostation-m"
;;
*LS-SR71)
name="ls-sr71"
;;
@@ -49,6 +52,9 @@ ar71xx_board_name() {
*RB-493)
name="rb-493"
;;
*"Rocket M")
name="rocket-m"
;;
*RouterStation)
name="routerstation"
;;
@@ -67,6 +73,9 @@ ar71xx_board_name() {
*WP543)
name="wp543"
;;
*WNDR3700)
name="wndr3700"
;;
*WNR2000)
name="wnr2000"
;;

93
target/linux/ar71xx/base-files/lib/upgrade/platform.sh
View File

@@ -7,6 +7,60 @@
PART_NAME=firmware
RAMFS_COPY_DATA=/lib/ar71xx.sh
CI_BLKSZ=65536
CI_LDADR=0x80060000
platform_find_partitions() {
local first dev size erasesize name
while read dev size erasesize name; do
name=${name#'"'}; name=${name%'"'}
case "$name" in
vmlinux.bin.l7|kernel|linux|rootfs)
if [ -z "$first" ]; then
first="$name"
else
echo "$erasesize:$first:$name"
break
fi
;;
esac
done < /proc/mtd
}
platform_find_kernelpart() {
local part
for part in "${1%:*}" "${1#*:}"; do
case "$part" in
vmlinux.bin.l7|kernel|linux)
echo "$part"
break
;;
esac
done
}
platform_do_upgrade_combined() {
local partitions=$(platform_find_partitions)
local kernelpart=$(platform_find_kernelpart "${partitions#*:}")
local erase_size=$((0x${partitions%%:*})); partitions="${partitions#*:}"
local kern_length=0x$(dd if="$1" bs=2 skip=1 count=4 2>/dev/null)
local kern_blocks=$(($kern_length / $CI_BLKSZ))
local root_blocks=$((0x$(dd if="$1" bs=2 skip=5 count=4 2>/dev/null) / $CI_BLKSZ))
if [ -n "$partitions" ] && [ -n "$kernelpart" ] && \
[ ${kern_blocks:-0} -gt 0 ] && \
[ ${root_blocks:-0} -gt ${kern_blocks:-0} ] && \
[ ${erase_size:-0} -gt 0 ];
then
local append=""
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
( dd if="$1" bs=$CI_BLKSZ skip=1 count=$kern_blocks 2>/dev/null; \
dd if="$1" bs=$CI_BLKSZ skip=$((1+$kern_blocks)) count=$root_blocks 2>/dev/null ) | \
mtd -r $append -F$kernelpart:$kern_length:$CI_LDADR,rootfs write - $partitions
fi
}
platform_check_image() {
local board=$(ar71xx_board_name)
local magic="$(get_magic_word "$1")"
@@ -14,7 +68,7 @@ platform_check_image() {
[ "$ARGC" -gt 1 ] && return 1
case "$board" in
ap83 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n)
ap83 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m)
[ "$magic" != "2705" ] && {
echo "Invalid image type."
return 1
@@ -28,6 +82,13 @@ platform_check_image() {
}
return 0
;;
wndr3700)
[ "$magic" != "3337" ] && {
echo "Invalid image type."
return 1
}
return 0
;;
wrt160nl)
[ "$magic" != "4e4c" ] && {
echo "Invalid image type."
@@ -35,13 +96,41 @@ platform_check_image() {
}
return 0
;;
routerstation | routerstation-pro | ls-sr71)
[ "$magic" != "4349" ] && {
echo "Invalid image. Use *-sysupgrade.bin files on this board"
return 1
}
local md5_img=$(dd if="$1" bs=2 skip=9 count=16 2>/dev/null)
local md5_chk=$(dd if="$1" bs=$CI_BLKSZ skip=1 2>/dev/null | md5sum -); md5_chk="${md5_chk%% *}"
if [ -n "$md5_img" -a -n "$md5_chk" ] && [ "$md5_img" = "$md5_chk" ]; then
return 0
else
echo "Invalid image. Contents do not match checksum (image:$md5_img calculated:$md5_chk)"
return 1
fi
return 0
;;
esac
echo "Sysupgrade is not yet supported on $board."
return 1
}
# use default for platform_do_upgrade()
platform_do_upgrade() {
local board=$(ar71xx_board_name)
case "$board" in
routerstation | routerstation-pro)
platform_do_upgrade_combined "$ARGV"
;;
*)
default_do_upgrade "$ARGV"
;;
esac
}
disable_watchdog() {
killall watchdog

26
target/linux/ar71xx/config-2.6.28
View File

@@ -1,9 +1,9 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_8139TOO is not set
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
CONFIG_AG71XX=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y
@@ -17,6 +17,7 @@ CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_MACH_TL_WR741ND=y
CONFIG_AR71XX_MACH_TL_WR941ND=y
CONFIG_AR71XX_MACH_UBNT=y
CONFIG_AR71XX_MACH_WNDR3700=y
CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
@@ -30,7 +31,6 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR71XX=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -43,9 +43,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
@@ -73,8 +73,8 @@ CONFIG_DEVPORT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
@@ -92,10 +92,10 @@ CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_I2C=y
CONFIG_ICPLUS_PHY=y
# CONFIG_IDE is not set
CONFIG_IMAGE_CMDLINE_HACK=y
@@ -116,9 +116,7 @@ CONFIG_IRQ_CPU=y
# CONFIG_MACH_VR41XX is not set
CONFIG_MICREL_PHY=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
@@ -126,20 +124,20 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_NAND=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_WRT160NL_PARTS=y
CONFIG_MYLOADER=y
# CONFIG_NATSEMI is not set
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
# CONFIG_NET_DSA_MV88E6131 is not set
@@ -148,14 +146,13 @@ CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_DSA=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -183,7 +180,6 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
CONFIG_SPI_AR71XX=y
CONFIG_SPI_BITBANG=y
@@ -192,6 +188,7 @@ CONFIG_SPI_MASTER=y
CONFIG_SPI_PB44=y
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SPI=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
@@ -200,7 +197,6 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
# CONFIG_VGASTATE is not set

30
target/linux/ar71xx/config-2.6.30
View File

@@ -1,8 +1,8 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
CONFIG_AG71XX=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y
@@ -16,6 +16,7 @@ CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_MACH_TL_WR741ND=y
CONFIG_AR71XX_MACH_TL_WR941ND=y
CONFIG_AR71XX_MACH_UBNT=y
CONFIG_AR71XX_MACH_WNDR3700=y
CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
@@ -29,15 +30,14 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR71XX=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -46,9 +46,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
@@ -70,16 +70,16 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -99,10 +99,10 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_I2C=y
CONFIG_ICPLUS_PHY=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_ROOT_GID=0
@@ -121,9 +121,7 @@ CONFIG_IRQ_CPU=y
# CONFIG_MACH_VR41XX is not set
CONFIG_MICREL_PHY=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
@@ -131,20 +129,20 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_NAND=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_WRT160NL_PARTS=y
CONFIG_MYLOADER=y
# CONFIG_NATSEMI is not set
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
# CONFIG_NET_DSA_MV88E6131 is not set
@@ -153,14 +151,13 @@ CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_DSA=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -188,7 +185,6 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SLAB is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SLUB=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
CONFIG_SPI_AR71XX=y
CONFIG_SPI_BITBANG=y
@@ -197,6 +193,7 @@ CONFIG_SPI_MASTER=y
CONFIG_SPI_PB44=y
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SPI=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
@@ -205,7 +202,6 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y

38
target/linux/ar71xx/config-2.6.31
View File

@@ -1,10 +1,9 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
CONFIG_AG71XX=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y
@@ -18,11 +17,13 @@ CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_MACH_TL_WR741ND=y
CONFIG_AR71XX_MACH_TL_WR941ND=y
CONFIG_AR71XX_MACH_UBNT=y
CONFIG_AR71XX_MACH_WNDR3700=y
CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_WDT=y
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
@@ -32,17 +33,14 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR71XX=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CONSTRUCTORS=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
@@ -50,9 +48,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
@@ -74,8 +72,8 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -83,8 +81,8 @@ CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -100,15 +98,13 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_I2C=y
CONFIG_ICPLUS_PHY=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_ROOT_GID=0
@@ -128,9 +124,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_VR41XX is not set
CONFIG_MICREL_PHY=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
@@ -138,20 +132,20 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_NAND=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_WRT160NL_PARTS=y
CONFIG_MYLOADER=y
# CONFIG_NATSEMI is not set
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
# CONFIG_NET_DSA_MV88E6131 is not set
@@ -160,14 +154,13 @@ CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_DSA=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -193,9 +186,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SLUB=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
CONFIG_SPI_AR71XX=y
CONFIG_SPI_BITBANG=y
@@ -204,6 +195,7 @@ CONFIG_SPI_MASTER=y
CONFIG_SPI_PB44=y
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SPI=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
@@ -212,8 +204,6 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
CONFIG_YAFFS_9BYTE_TAGS=y

4
target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig
View File

@@ -43,6 +43,10 @@ config AR71XX_MACH_RB_4XX
bool "MikroTik RouterBOARD 4xx series support"
default y
config AR71XX_MACH_WNDR3700
bool "NETGEAR WNDR3700 board support"
default y
config AR71XX_MACH_WNR2000
bool "NETGEAR WNR2000 board support"
default y

1
target/linux/ar71xx/files/arch/mips/ar71xx/Makefile
View File

@@ -26,6 +26,7 @@ obj-$(CONFIG_AR71XX_MACH_TEW_632BRP) += mach-tew-632brp.o
obj-$(CONFIG_AR71XX_MACH_TL_WR741ND) += mach-tl-wr741nd.o
obj-$(CONFIG_AR71XX_MACH_TL_WR941ND) += mach-tl-wr941nd.o
obj-$(CONFIG_AR71XX_MACH_UBNT) += mach-ubnt.o
obj-$(CONFIG_AR71XX_MACH_WNDR3700) += mach-wndr3700.o
obj-$(CONFIG_AR71XX_MACH_WNR2000) += mach-wnr2000.o
obj-$(CONFIG_AR71XX_MACH_WP543) += mach-wp543.o
obj-$(CONFIG_AR71XX_MACH_WRT160NL) += mach-wrt160nl.o

12
target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
View File

@@ -36,6 +36,7 @@ EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
void ar71xx_device_stop(u32 mask)
{
unsigned long flags;
u32 mask_inv;
u32 t;
switch (ar71xx_soc) {
@@ -49,9 +50,12 @@ void ar71xx_device_stop(u32 mask)
break;
case AR71XX_SOC_AR7240:
mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
local_irq_save(flags);
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t | mask);
t |= mask;
t &= ~mask_inv;
ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
local_irq_restore(flags);
break;
@@ -72,6 +76,7 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stop);
void ar71xx_device_start(u32 mask)
{
unsigned long flags;
u32 mask_inv;
u32 t;
switch (ar71xx_soc) {
@@ -85,9 +90,12 @@ void ar71xx_device_start(u32 mask)
break;
case AR71XX_SOC_AR7240:
mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
local_irq_save(flags);
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t & ~mask);
t &= ~mask;
t |= mask_inv;
ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
local_irq_restore(flags);
break;

45
target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
View File

@@ -42,6 +42,19 @@ static struct resource ar71xx_ohci_resources[] = {
},
};
static struct resource ar7240_ohci_resources[] = {
[0] = {
.start = AR7240_OHCI_BASE,
.end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AR71XX_CPU_IRQ_USB,
.end = AR71XX_CPU_IRQ_USB,
.flags = IORESOURCE_IRQ,
},
};
static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
static struct platform_device ar71xx_ohci_device = {
.name = "ar71xx-ohci",
@@ -90,7 +103,10 @@ static struct platform_device ar71xx_ehci_device = {
(RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
| RESET_MODULE_USB_OHCI_DLL)
static void ar71xx_usb_setup(void)
#define AR7240_USB_RESET_MASK \
(RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
static void __init ar71xx_usb_setup(void)
{
ar71xx_device_stop(AR71XX_USB_RESET_MASK);
mdelay(1000);
@@ -105,7 +121,19 @@ static void ar71xx_usb_setup(void)
mdelay(900);
}
static void ar91xx_usb_setup(void)
static void __init ar7240_usb_setup(void)
{
ar71xx_ohci_device.resource = ar7240_ohci_resources;
ar71xx_device_stop(AR7240_USB_RESET_MASK);
mdelay(1000);
ar71xx_device_start(AR7240_USB_RESET_MASK);
/* WAR for HW bug. Here it adjusts the duration between two SOFS */
ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
}
static void __init ar91xx_usb_setup(void)
{
ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
mdelay(10);
@@ -120,6 +148,11 @@ static void ar91xx_usb_setup(void)
void __init ar71xx_add_device_usb(void)
{
switch (ar71xx_soc) {
case AR71XX_SOC_AR7240:
ar7240_usb_setup();
platform_device_register(&ar71xx_ohci_device);
break;
case AR71XX_SOC_AR7130:
case AR71XX_SOC_AR7141:
case AR71XX_SOC_AR7161:
@@ -186,9 +219,7 @@ static struct resource ar71xx_mdio_resources[] = {
}
};
static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
.phy_mask = 0xffffffff,
};
static struct ag71xx_mdio_platform_data ar71xx_mdio_data;
static struct platform_device ar71xx_mdio_device = {
.name = "ag71xx-mdio",
@@ -202,7 +233,11 @@ static struct platform_device ar71xx_mdio_device = {
void __init ar71xx_add_device_mdio(u32 phy_mask)
{
if (ar71xx_soc == AR71XX_SOC_AR7240)
ar71xx_mdio_data.is_ar7240 = 1;
ar71xx_mdio_data.phy_mask = phy_mask;
platform_device_register(&ar71xx_mdio_device);
}

34
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr741nd.c
View File

@@ -8,12 +8,14 @@
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/input.h>
#include <linux/ath9k_platform.h>
#include <asm/mips_machine.h>
@@ -105,6 +107,7 @@ static struct gpio_button tl_wr741nd_gpio_buttons[] __initdata = {
}
};
#ifdef CONFIG_PCI
static struct ar71xx_pci_irq tl_wr741nd_pci_irqs[] __initdata = {
{
.slot = 0,
@@ -113,6 +116,29 @@ static struct ar71xx_pci_irq tl_wr741nd_pci_irqs[] __initdata = {
}
};
static struct ath9k_platform_data tl_wr741nd_wmac_data;
static int tl_wr741nd_pci_plat_dev_init(struct pci_dev *dev)
{
dev->dev.platform_data = &tl_wr741nd_wmac_data;
return 0;
}
static void tl_wr741nd_pci_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
memcpy(tl_wr741nd_wmac_data.eeprom_data, ee,
sizeof(tl_wr741nd_wmac_data.eeprom_data));
ar71xx_pci_plat_dev_init = tl_wr741nd_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(tl_wr741nd_pci_irqs), tl_wr741nd_pci_irqs);
}
#else
static inline void tl_wr741nd_pci_init(void) { };
#endif /* CONFIG_PCI */
static void __init tl_wr741nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
@@ -125,12 +151,18 @@ static void __init tl_wr741nd_setup(void)
ar71xx_eth0_data.phy_mask = 0x0;
ar71xx_eth0_data.speed = SPEED_100;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth0_data.fifo_cfg1 = 0x0fff0000;
ar71xx_eth0_data.fifo_cfg2 = 0x00001fff;
ar71xx_eth0_data.fifo_cfg3 = 0x008001ff;
/* LAN ports */
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ar71xx_eth1_data.phy_mask = 0x0;
ar71xx_eth1_data.speed = SPEED_1000;
ar71xx_eth1_data.duplex = DUPLEX_FULL;
ar71xx_eth1_data.fifo_cfg1 = 0x0fff0000;
ar71xx_eth1_data.fifo_cfg2 = 0x00001fff;
ar71xx_eth1_data.fifo_cfg3 = 0x008001ff;
ar71xx_add_device_eth(1);
ar71xx_add_device_eth(0);
@@ -145,6 +177,6 @@ static void __init tl_wr741nd_setup(void)
ARRAY_SIZE(tl_wr741nd_gpio_buttons),
tl_wr741nd_gpio_buttons);
ar71xx_pci_init(ARRAY_SIZE(tl_wr741nd_pci_irqs), tl_wr741nd_pci_irqs);
tl_wr741nd_pci_init();
}
MIPS_MACHINE(AR71XX_MACH_TL_WR741ND, "TP-LINK TL-WR741ND", tl_wr741nd_setup);

101
target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c
View File

@@ -10,10 +10,12 @@
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/input.h>
#include <linux/ath9k_platform.h>
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
@@ -32,11 +34,11 @@
#define UBNT_LS_SR71_GPIO_LED_D27 6
#define UBNT_LS_SR71_GPIO_LED_D28 7
#define UBNT_BULLET_M_GPIO_LED_L1 0
#define UBNT_BULLET_M_GPIO_LED_L2 1
#define UBNT_BULLET_M_GPIO_LED_L3 11
#define UBNT_BULLET_M_GPIO_LED_L4 7
#define UBNT_BULLET_M_GPIO_BTN_RESET 12
#define UBNT_M_GPIO_LED_L1 0
#define UBNT_M_GPIO_LED_L2 1
#define UBNT_M_GPIO_LED_L3 11
#define UBNT_M_GPIO_LED_L4 7
#define UBNT_M_GPIO_BTN_RESET 12
#define UBNT_BUTTONS_POLL_INTERVAL 20
@@ -105,22 +107,22 @@ static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = {
}
};
static struct gpio_led ubnt_bullet_m_leds_gpio[] __initdata = {
static struct gpio_led ubnt_m_leds_gpio[] __initdata = {
{
.name = "ubnt:red:link1",
.gpio = UBNT_BULLET_M_GPIO_LED_L1,
.gpio = UBNT_M_GPIO_LED_L1,
.active_low = 0,
}, {
.name = "ubnt:orange:link2",
.gpio = UBNT_BULLET_M_GPIO_LED_L2,
.gpio = UBNT_M_GPIO_LED_L2,
.active_low = 0,
}, {
.name = "ubnt:green:link3",
.gpio = UBNT_BULLET_M_GPIO_LED_L3,
.gpio = UBNT_M_GPIO_LED_L3,
.active_low = 0,
}, {
.name = "ubnt:green:link4",
.gpio = UBNT_BULLET_M_GPIO_LED_L4,
.gpio = UBNT_M_GPIO_LED_L4,
.active_low = 0,
}
};
@@ -136,13 +138,13 @@ static struct gpio_button ubnt_gpio_buttons[] __initdata = {
}
};
static struct gpio_button ubnt_bullet_m_gpio_buttons[] __initdata = {
static struct gpio_button ubnt_m_gpio_buttons[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = BTN_0,
.threshold = 5,
.gpio = UBNT_BULLET_M_GPIO_BTN_RESET,
.gpio = UBNT_M_GPIO_BTN_RESET,
.active_low = 1,
}
};
@@ -244,7 +246,8 @@ static void __init ubnt_lssr71_setup(void)
MIPS_MACHINE(AR71XX_MACH_UBNT_LSSR71, "Ubiquiti LS-SR71", ubnt_lssr71_setup);
static struct ar71xx_pci_irq ubnt_bullet_m_pci_irqs[] __initdata = {
#ifdef CONFIG_PCI
static struct ar71xx_pci_irq ubnt_m_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
@@ -252,11 +255,36 @@ static struct ar71xx_pci_irq ubnt_bullet_m_pci_irqs[] __initdata = {
}
};
static void __init ubnt_bullet_m_setup(void)
static struct ath9k_platform_data ubnt_m_wmac_data;
static int ubmnt_m_pci_plat_dev_init(struct pci_dev *dev)
{
dev->dev.platform_data = &ubnt_m_wmac_data;
return 0;
}
static void __init ubnt_m_pci_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
memcpy(ubnt_m_wmac_data.eeprom_data, ee,
sizeof(ubnt_m_wmac_data.eeprom_data));
ar71xx_pci_plat_dev_init = ubmnt_m_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(ubnt_m_pci_irqs),
ubnt_m_pci_irqs);
}
#else
static inline void ubnt_m_pci_init(void) { };
#endif /* CONFIG_PCI */
static void __init ubnt_m_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
ar71xx_set_mac_base(mac);
ar71xx_add_device_spi(NULL, ubnt_spi_info,
ARRAY_SIZE(ubnt_spi_info));
@@ -264,21 +292,48 @@ static void __init ubnt_bullet_m_setup(void)
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ar71xx_eth0_data.phy_mask = 0;
ar71xx_eth0_data.speed = SPEED_100;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth0_data.fifo_cfg1 = 0x0010ffff;
ar71xx_eth0_data.fifo_cfg2 = 0x015500aa;
ar71xx_eth0_data.fifo_cfg3 = 0x01f00140;
ar71xx_add_device_eth(0);
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_bullet_m_leds_gpio),
ubnt_bullet_m_leds_gpio);
ubnt_m_pci_init();
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_m_leds_gpio),
ubnt_m_leds_gpio);
ar71xx_add_device_gpio_buttons(-1, UBNT_BUTTONS_POLL_INTERVAL,
ARRAY_SIZE(ubnt_bullet_m_gpio_buttons),
ubnt_bullet_m_gpio_buttons);
ar71xx_pci_init(ARRAY_SIZE(ubnt_bullet_m_pci_irqs),
ubnt_bullet_m_pci_irqs);
ARRAY_SIZE(ubnt_m_gpio_buttons),
ubnt_m_gpio_buttons);
}
MIPS_MACHINE(AR71XX_MACH_UBNT_BULLET_M, "Ubiquiti Bullet M", ubnt_bullet_m_setup);
static void __init ubnt_rocket_m_setup(void)
{
ubnt_m_setup();
ar71xx_add_device_usb();
}
MIPS_MACHINE(AR71XX_MACH_UBNT_BULLET_M, "Ubiquiti Bullet M", ubnt_m_setup);
MIPS_MACHINE(AR71XX_MACH_UBNT_ROCKET_M, "Ubiquiti Rocket M", ubnt_rocket_m_setup);
/* TODO detect the second ethernet port and use one
init function for all Ubiquiti MIMO series products */
static void __init ubnt_nano_m_setup(void)
{
ubnt_m_setup();
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ar71xx_eth1_data.phy_mask = 0;
ar71xx_eth1_data.speed = SPEED_1000;
ar71xx_eth1_data.duplex = DUPLEX_FULL;
ar71xx_eth1_data.fifo_cfg1 = 0x0010ffff;
ar71xx_eth1_data.fifo_cfg2 = 0x015500aa;
ar71xx_eth1_data.fifo_cfg3 = 0x01f00140;
ar71xx_add_device_eth(1);
}
MIPS_MACHINE(AR71XX_MACH_UBNT_NANO_M, "Ubiquiti Nanostation M", ubnt_nano_m_setup);

312
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c Normal file
View File

@@ -0,0 +1,312 @@
/*
* Netgear WNDR3700 board support
*
* Copyright (C) 2009 Marco Porsch
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/input.h>
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#define WNDR3700_GPIO_LED_WPS_ORANGE 0
#define WNDR3700_GPIO_LED_POWER_ORANGE 1
#define WNDR3700_GPIO_LED_POWER_GREEN 2
#define WNDR3700_GPIO_LED_WPS_GREEN 4
#define WNDR3700_GPIO_BTN_WPS 3
#define WNDR3700_GPIO_BTN_RESET 8
#define WNDR3700_GPIO_BTN_WIFI 11
#define WNDR3700_BUTTONS_POLL_INTERVAL 20
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition wndr3700_partitions[] = {
{
.name = "uboot",
.offset = 0,
.size = 0x050000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "env",
.offset = 0x050000,
.size = 0x020000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "rootfs",
.offset = 0x070000,
.size = 0x720000,
} , {
.name = "config",
.offset = 0x790000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "config_bak",
.offset = 0x7a0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "pot",
.offset = 0x7b0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "traffic_meter",
.offset = 0x7c0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "language",
.offset = 0x7d0000,
.size = 0x020000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "caldata",
.offset = 0x7f0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}
};
#endif /* CONFIG_MTD_PARTITIONS */
static struct flash_platform_data wndr3700_flash_data = {
#ifdef CONFIG_MTD_PARTITIONS
.parts = wndr3700_partitions,
.nr_parts = ARRAY_SIZE(wndr3700_partitions),
#endif
};
#ifdef CONFIG_PCI
static struct ar71xx_pci_irq wndr3700_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}
};
static struct ath9k_platform_data wndr3700_wmac0_data;
static u8 wndr3700_wmac0_macaddr[6];
static struct ath9k_platform_data wndr3700_wmac1_data;
static u8 wndr3700_wmac1_macaddr[6];
static void wndr3700_pci_fixup(struct pci_dev *dev)
{
void __iomem *mem;
u16 *cal_data;
u16 cmd;
u32 bar0;
u32 val;
if (ar71xx_mach != AR71XX_MACH_WNDR3700)
return;
switch (PCI_SLOT(dev->devfn)) {
case 17:
cal_data = wndr3700_wmac0_data.eeprom_data;
break;
case 18:
cal_data = wndr3700_wmac1_data.eeprom_data;
break;
default:
return;
}
if (*cal_data != 0xa55a) {
printk(KERN_ERR "PCI: no calibration data found for %s\n",
pci_name(dev));
return;
}
mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
if (!mem) {
printk(KERN_ERR "PCI: ioremap error for device %s\n",
pci_name(dev));
return;
}
printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
/* Setup the PCI device to allow access to the internal registers */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config_word(dev, PCI_COMMAND, cmd);
/* set pointer to first reg address */
cal_data += 3;
while (*cal_data != 0xffff) {
u32 reg;
reg = *cal_data++;
val = *cal_data++;
val |= (*cal_data++) << 16;
__raw_writel(val, mem + reg);
udelay(100);
}
pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
dev->vendor = val & 0xffff;
dev->device = (val >> 16) & 0xffff;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
dev->revision = val & 0xff;
dev->class = val >> 8; /* upper 3 bytes */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
iounmap(mem);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
wndr3700_pci_fixup);
static int wndr3700_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &wndr3700_wmac0_data;
break;
case 18:
dev->dev.platform_data = &wndr3700_wmac1_data;
break;
}
return 0;
}
static void __init wndr3700_pci_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000);
memcpy(wndr3700_wmac0_data.eeprom_data, ee + 0x1000,
sizeof(wndr3700_wmac0_data.eeprom_data));
memcpy(wndr3700_wmac0_macaddr, ee, sizeof(wndr3700_wmac0_macaddr));
wndr3700_wmac0_data.macaddr = wndr3700_wmac0_macaddr;
memcpy(wndr3700_wmac1_data.eeprom_data, ee + 0x5000,
sizeof(wndr3700_wmac1_data.eeprom_data));
memcpy(wndr3700_wmac1_macaddr, ee + 12, sizeof(wndr3700_wmac1_macaddr));
wndr3700_wmac1_data.macaddr = wndr3700_wmac1_macaddr;
ar71xx_pci_plat_dev_init = wndr3700_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(wndr3700_pci_irqs), wndr3700_pci_irqs);
}
#else
static inline void wndr3700_pci_init(void) { };
#endif /* CONFIG_PCI */
static struct spi_board_info wndr3700_spi_info[] = {
{
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 25000000,
.modalias = "m25p80",
.platform_data = &wndr3700_flash_data,
}
};
static struct gpio_led wndr3700_leds_gpio[] __initdata = {
{
.name = "wndr3700:green:power",
.gpio = WNDR3700_GPIO_LED_POWER_GREEN,
.active_low = 1,
}, {
.name = "wndr3700:orange:power",
.gpio = WNDR3700_GPIO_LED_POWER_ORANGE,
.active_low = 1,
}, {
.name = "wndr3700:green:wps",
.gpio = WNDR3700_GPIO_LED_WPS_GREEN,
.active_low = 1,
}, {
.name = "wndr3700:orange:wps",
.gpio = WNDR3700_GPIO_LED_WPS_ORANGE,
.active_low = 1,
}
};
static struct gpio_button wndr3700_gpio_buttons[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = BTN_0,
.threshold = 5,
.gpio = WNDR3700_GPIO_BTN_RESET,
}, {
.desc = "wps",
.type = EV_KEY,
.code = BTN_1,
.threshold = 5,
.gpio = WNDR3700_GPIO_BTN_WPS,
} , {
.desc = "wifi",
.type = EV_KEY,
.code = BTN_2,
.threshold = 5,
.gpio = WNDR3700_GPIO_BTN_WIFI,
}
};
static void __init wndr3700_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
ar71xx_set_mac_base(mac);
ar71xx_add_device_mdio(0x0);
ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth0_data.phy_mask = 0xf;
ar71xx_eth0_data.speed = SPEED_1000;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth1_data.phy_mask = 0x10;
ar71xx_add_device_eth(0);
ar71xx_add_device_eth(1);
ar71xx_add_device_usb();
ar71xx_add_device_spi(NULL, wndr3700_spi_info,
ARRAY_SIZE(wndr3700_spi_info));
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio),
wndr3700_leds_gpio);
ar71xx_add_device_gpio_buttons(-1, WNDR3700_BUTTONS_POLL_INTERVAL,
ARRAY_SIZE(wndr3700_gpio_buttons),
wndr3700_gpio_buttons);
wndr3700_pci_init();
}
MIPS_MACHINE(AR71XX_MACH_WNDR3700, "NETGEAR WNDR3700", wndr3700_setup);

9
target/linux/ar71xx/files/arch/mips/ar71xx/prom.c
View File

@@ -85,6 +85,15 @@ static struct board_rec boards[] __initdata = {
}, {
.name = "UBNT-BM",
.mach_type = AR71XX_MACH_UBNT_BULLET_M,
}, {
.name = "UBNT-RM",
.mach_type = AR71XX_MACH_UBNT_ROCKET_M,
}, {
.name = "UBNT-NM",
.mach_type = AR71XX_MACH_UBNT_NANO_M,
}, {
.name = "WNDR3700",
.mach_type = AR71XX_MACH_WNDR3700,
}, {
.name = "WNR2000",
.mach_type = AR71XX_MACH_WNR2000,

28
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
View File

@@ -32,6 +32,8 @@
#define AR71XX_EHCI_SIZE 0x01000000
#define AR71XX_OHCI_BASE 0x1c000000
#define AR71XX_OHCI_SIZE 0x01000000
#define AR7240_OHCI_BASE 0x1b000000
#define AR7240_OHCI_SIZE 0x01000000
#define AR71XX_SPI_BASE 0x1f000000
#define AR71XX_SPI_SIZE 0x01000000
@@ -141,7 +143,10 @@ enum ar71xx_mach_type {
AR71XX_MACH_UBNT_RS, /* Ubiquiti RouterStation */
AR71XX_MACH_UBNT_RSPRO, /* Ubiquiti RouterStation Pro */
AR71XX_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */
AR71XX_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */
AR71XX_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */
AR71XX_MACH_WNR2000, /* NETGEAR WNR2000 */
AR71XX_MACH_WNDR3700, /* NETGEAR WNDR3700 */
AR71XX_MACH_WP543, /* Compex WP543 */
AR71XX_MACH_WRT160NL, /* Linksys WRT160NL */
AR71XX_MACH_WRT400N, /* Linksys WRT400N */
@@ -250,7 +255,25 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
#define AR71XX_GPIO_COUNT 16
#define AR724X_GPIO_COUNT 16
#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19)
#define AR724X_GPIO_FUNC_SPI_EN BIT(18)
#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14)
#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13)
#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12)
#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11)
#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10)
#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9)
#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3)
#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2)
#define AR724X_GPIO_FUNC_UART_EN BIT(1)
#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
#define AR724X_GPIO_COUNT 18
#define AR91XX_GPIO_FUNC_WMAC_LED_EN BIT(22)
#define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
@@ -299,6 +322,8 @@ void ar71xx_gpio_function_disable(u32 mask);
#define AR724X_DDR_REG_FLUSH_GE0 0x7c
#define AR724X_DDR_REG_FLUSH_GE1 0x80
#define AR724X_DDR_REG_FLUSH_USB 0x84
#define AR724X_DDR_REG_FLUSH_PCIE 0x88
#define AR91XX_DDR_REG_FLUSH_GE0 0x7c
#define AR91XX_DDR_REG_FLUSH_GE1 0x80
@@ -445,6 +470,7 @@ static inline u32 ar724x_pci_rr(unsigned reg)
#define RESET_MODULE_USB_OHCI_DLL BIT(6)
#define RESET_MODULE_USB_HOST BIT(5)
#define RESET_MODULE_USB_PHY BIT(4)
#define RESET_MODULE_USB_OHCI_DLL_7240 BIT(3)
#define RESET_MODULE_PCI_BUS BIT(1)
#define RESET_MODULE_PCI_CORE BIT(0)

5
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h
View File

@@ -33,10 +33,15 @@ struct ag71xx_platform_data {
void (* ddr_flush)(void);
void (* set_pll)(int speed);
u32 fifo_cfg1;
u32 fifo_cfg2;
u32 fifo_cfg3;
};
struct ag71xx_mdio_platform_data {
u32 phy_mask;
int is_ar7240;
};
struct ar71xx_ehci_platform_data {

7
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
View File

@@ -103,9 +103,10 @@ struct ag71xx_ring {
};
struct ag71xx_mdio {
struct mii_bus *mii_bus;
int mii_irq[PHY_MAX_ADDR];
void __iomem *mdio_base;
struct mii_bus *mii_bus;
int mii_irq[PHY_MAX_ADDR];
void __iomem *mdio_base;
struct ag71xx_mdio_platform_data *pdata;
};
struct ag71xx {

28
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c
View File

@@ -318,6 +318,7 @@ static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
static void ag71xx_dma_reset(struct ag71xx *ag)
{
u32 val;
int i;
ag71xx_dump_dma_regs(ag);
@@ -340,13 +341,19 @@ static void ag71xx_dma_reset(struct ag71xx *ag)
ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF);
ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR);
if (ag71xx_rr(ag, AG71XX_REG_RX_STATUS))
printk(KERN_ALERT "%s: unable to clear DMA Rx status\n",
ag->dev->name);
val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS);
if (val)
printk(KERN_ALERT "%s: unable to clear DMA Rx status: %08x\n",
ag->dev->name, val);
if (ag71xx_rr(ag, AG71XX_REG_TX_STATUS))
printk(KERN_ALERT "%s: unable to clear DMA Tx status\n",
ag->dev->name);
val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS);
/* mask out reserved bits */
val &= ~0xff000000;
if (val)
printk(KERN_ALERT "%s: unable to clear DMA Tx status: %08x\n",
ag->dev->name, val);
ag71xx_dump_dma_regs(ag);
}
@@ -395,8 +402,13 @@ static void ag71xx_hw_init(struct ag71xx *ag)
/* setup FIFO configuration registers */
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
if (pdata->is_ar724x) {
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2);
} else {
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
}
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT);

23
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_mdio.c
View File

@@ -104,11 +104,17 @@ static void ag71xx_mdio_mii_write(struct ag71xx_mdio *am,
static int ag71xx_mdio_reset(struct mii_bus *bus)
{
struct ag71xx_mdio *am = bus->priv;
u32 t;
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, MII_CFG_RESET);
if (am->pdata->is_ar7240)
t = MII_CFG_CLK_DIV_6;
else
t = MII_CFG_CLK_DIV_28;
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
udelay(100);
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, MII_CFG_CLK_DIV_28);
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t);
udelay(100);
return 0;
@@ -140,12 +146,20 @@ static int __init ag71xx_mdio_probe(struct platform_device *pdev)
if (ag71xx_mdio_bus)
return -EBUSY;
pdata = pdev->dev.platform_data;
if (!pdata) {
dev_err(&pdev->dev, "no platform data specified\n");
return -EINVAL;
}
am = kzalloc(sizeof(*am), GFP_KERNEL);
if (!am) {
err = -ENOMEM;
goto err_out;
}
am->pdata = pdata;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "no iomem resource found\n");
@@ -174,10 +188,7 @@ static int __init ag71xx_mdio_probe(struct platform_device *pdev)
am->mii_bus->priv = am;
am->mii_bus->parent = &pdev->dev;
snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0);
pdata = pdev->dev.platform_data;
if (pdata)
am->mii_bus->phy_mask = pdata->phy_mask;
am->mii_bus->phy_mask = pdata->phy_mask;
for (i = 0; i < PHY_MAX_ADDR; i++)
am->mii_irq[i] = PHY_POLL;

8
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c
View File

@@ -72,8 +72,12 @@ static void ag71xx_phy_link_update(struct ag71xx *ag)
return;
}
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3,
pdata->is_ar91xx ? 0x780fff : 0x008001ff);
if (pdata->is_ar91xx)
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
else if (pdata->is_ar724x)
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
else
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
if (pdata->set_pll)
pdata->set_pll(ag->speed);

1
target/linux/ar71xx/files/include/linux/ath9k_platform.h
View File

@@ -15,6 +15,7 @@
struct ath9k_platform_data {
u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
u8 *macaddr;
};
#endif /* _LINUX_ATH9K_PLATFORM_H */

235
target/linux/ar71xx/image/Makefile
View File

@@ -18,28 +18,47 @@ ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
VMLINUX:=$(IMGNAME)-vmlinux-initramfs
endif
define CompressLzma
$(STAGING_DIR_HOST)/bin/lzma e $(1) -lc1 -lp2 -pb2 $(2)
endef
define PatchKernelLzma
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(1)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(1) '$(strip $(2))'
$(call CompressLzma,$(KDIR)/vmlinux-$(1),$(KDIR)/vmlinux-$(1).bin.lzma)
endef
define PatchKernelGzip
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(1)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(1) '$(strip $(2))'
gzip -9 -c $(KDIR)/vmlinux-$(1) > $(KDIR)/vmlinux-$(1).bin.gz
endef
define MkImageLzma
mkimage -A mips -O linux -T kernel -a 0x80060000 -C lzma \
-e 0x80060000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(1) $(2)
endef
define MkImageGzip
mkimage -A mips -O linux -T kernel -a 0x80060000 -C gzip \
-e 0x80060000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(1) $(2)
endef
define Image/BuildKernel
cp $(KDIR)/vmlinux.elf $(VMLINUX).elf
cp $(KDIR)/vmlinux $(VMLINUX).bin
gzip -9 -c $(KDIR)/vmlinux > $(KDIR)/vmlinux.bin.gz
$(STAGING_DIR_HOST)/bin/lzma e $(KDIR)/vmlinux $(KDIR)/vmlinux.bin.l7
$(STAGING_DIR_HOST)/bin/lzma e $(KDIR)/vmlinux -lc1 -lp2 -pb2 $(KDIR)/vmlinux.bin.lzma
dd if=$(KDIR)/vmlinux.bin.l7 of=$(VMLINUX).lzma bs=65536 conv=sync
$(call CompressLzma,$(KDIR)/vmlinux,$(KDIR)/vmlinux.bin.lzma)
dd if=$(KDIR)/vmlinux.bin.lzma of=$(VMLINUX).lzma bs=65536 conv=sync
dd if=$(KDIR)/vmlinux.bin.gz of=$(VMLINUX).gz bs=65536 conv=sync
mkimage -A mips -O linux -T kernel -a 0x80060000 -C gzip -e \
0x80060000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux.bin.gz $(IMGNAME)-uImage-gzip.bin
mkimage -A mips -O linux -T kernel -a 0x80060000 -C lzma -e \
0x80060000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux.bin.lzma $(IMGNAME)-uImage-lzma.bin
$(call MkImageGzip,$(KDIR)/vmlinux.bin.gz,$(IMGNAME)-uImage-gzip.bin)
$(call MkImageLzma,$(KDIR)/vmlinux.bin.lzma,$(IMGNAME)-uImage-lzma.bin)
endef
define Image/Build/WRT400N
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
$(STAGING_DIR_HOST)/bin/lzma e $(KDIR)/vmlinux-$(2) $(KDIR)/vmlinux-$(2).bin.lzma
$(call PatchKernelLzma,$(2),$(3))
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.lzma"` -gt 1310720 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.lzma is too big"; \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 6488064 ]; then \
@@ -58,13 +77,12 @@ define Image/Build/WRT400N
fi; fi
endef
define Image/Build/AP81
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
$(STAGING_DIR_HOST)/bin/lzma e $(KDIR)/vmlinux-$(2) $(KDIR)/vmlinux-$(2).bin.lzma
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.lzma"` -gt 851968 ]; then \
cameo_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,896k(kernel),2880k(rootfs),64k(art)ro,3776k@0x30000(firmware)
define Image/Build/Cameo
$(call PatchKernelLzma,$(2),$(3) $(cameo_mtdlayout))
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.lzma"` -gt 917504 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.lzma is too big"; \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 3014656 ]; then \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 2949120 ]; then \
echo "Warning: $(KDIR)/root.$(1) is too big"; \
else \
mkimage -A mips -O linux -T kernel -a 0x80060000 -C lzma -e \
@@ -72,17 +90,15 @@ define Image/Build/AP81
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux-$(2).bin.lzma $(KDIR)/vmlinux-$(2).uImage; \
( \
dd if=$(KDIR)/vmlinux-$(2).uImage bs=832k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=2944k conv=sync; \
dd if=$(KDIR)/vmlinux-$(2).uImage bs=896k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=2880k conv=sync; \
echo -n $(4); \
) > $(call imgname,$(1),$(2)).uni; \
fi; fi
endef
define Image/Build/AP83
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
gzip -9 -c $(KDIR)/vmlinux-$(2) > $(KDIR)/vmlinux-$(2).bin.gz
$(call PatchKernelGzip,$(2),$(3))
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.gz"` -gt 1310720 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.gz is too big"; \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 6619136 ]; then \
@@ -123,31 +139,47 @@ define Image/Build/MyLoader
$(call imgname,$(1),$(2))-16M.img
endef
define Image/Build/UBNT
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
$(STAGING_DIR_HOST)/bin/lzma e $(KDIR)/vmlinux-$(2) $(KDIR)/vmlinux-$(2).lzma
dd if=$(KDIR)/vmlinux-$(2).lzma of=$(KDIR)/vmlinux-$(2).bin.lzma bs=64k conv=sync
ubntxm_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1024k(kernel),6528k(rootfs),256k(cfg)ro,64k(EEPROM)ro,7552k@0x50000(firmware)
define Image/Build/UBNTXM
$(call PatchKernelLzma,$(2),$(3) $(ubntxm_mtdlayout))
$(call MkImageLzma,$(KDIR)/vmlinux-$(2).bin.lzma,$(KDIR)/vmlinux-$(2).uImage.bin)
dd if=$(KDIR)/vmlinux-$(2).uImage.bin of=$(KDIR)/vmlinux-$(2).uImage bs=1024k conv=sync
-$(STAGING_DIR_HOST)/bin/mkfwimage \
-B $(4) -v $(5).$(6).OpenWrt.$(REVISION) \
-k $(KDIR)/vmlinux-$(2).bin.lzma \
-k $(KDIR)/vmlinux-$(2).uImage \
-r $(BIN_DIR)/openwrt-$(BOARD)-root.$(1) \
-o $(call imgname,$(1),$(2)).bin
-o $(call imgname,$(1),$(2))-factory.bin
( \
dd if=$(KDIR)/vmlinux-$(2).uImage; \
dd if=$(BIN_DIR)/openwrt-$(BOARD)-root.$(1); \
) > $(call imgname,$(1),$(2))-sysupgrade.bin
endef
define Image/Build/UBNT
$(call PatchKernelLzma,$(2),$(3))
dd if=$(KDIR)/vmlinux-$(2).bin.lzma of=$(KDIR)/vmlinux-$(2).lzma bs=64k conv=sync
-$(STAGING_DIR_HOST)/bin/mkfwimage \
-B $(4) -v $(5).$(6).OpenWrt.$(REVISION) \
-k $(KDIR)/vmlinux-$(2).lzma \
-r $(BIN_DIR)/openwrt-$(BOARD)-root.$(1) \
-o $(call imgname,$(1),$(2))-factory.bin
-sh $(TOPDIR)/scripts/combined-image.sh \
"$(KDIR)/vmlinux-$(2).lzma" \
"$(BIN_DIR)/openwrt-$(BOARD)-root.$(1)" \
$(call imgname,$(1),$(2))-sysupgrade.bin
endef
define Image/Build/Planex
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
gzip -9 -c $(KDIR)/vmlinux-$(2) > $(KDIR)/vmlinux-$(2).bin.gzip
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.gzip"` -gt 1441792 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.gzip is too big"; \
$(call PatchKernelGzip,$(2),$(3))
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.gz"` -gt 1441792 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.gz is too big"; \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 6356992 ]; then \
echo "Warning: $(KDIR)/root.$(1) is too big"; \
else \
mkimage -A mips -O linux -T kernel -a 0x80060000 -C gzip -e \
0x80060000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux-$(2).bin.gzip $(KDIR)/vmlinux-$(2).uImage; \
-d $(KDIR)/vmlinux-$(2).bin.gz $(KDIR)/vmlinux-$(2).uImage; \
( \
dd if=$(KDIR)/vmlinux-$(2).uImage bs=1408k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=6208k conv=sync; \
@@ -161,24 +193,17 @@ define Image/Build/Planex
endef
define Image/Build/TPLINK
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
gzip -9 -c $(KDIR)/vmlinux-$(2) > $(KDIR)/vmlinux-$(2).bin.gzip
$(call PatchKernelGzip,$(2),$(3))
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
-B $(4) -N OpenWrt -V $(REVISION)\
-k $(KDIR)/vmlinux-$(2).bin.gzip \
-k $(KDIR)/vmlinux-$(2).bin.gz \
-r $(BIN_DIR)/openwrt-$(BOARD)-root.$(1) \
-o $(call imgname,$(1),$(2)).uni
-o $(call imgname,$(1),$(2))-universal.bin
endef
define Image/Build/CyberTAN
cp $(KDIR)/vmlinux $(KDIR)/vmlinux-$(2)
$(STAGING_DIR_HOST)/bin/patch-cmdline $(KDIR)/vmlinux-$(2) '$(strip $(3))'
gzip -9 -c $(KDIR)/vmlinux-$(2) > $(KDIR)/vmlinux-$(2).bin.gzip
mkimage -A mips -O linux -T kernel -a 0x80060000 -C gzip -e \
0x80060000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux-$(2).bin.gzip $(KDIR)/vmlinux-$(2).uImage
$(call PatchKernelGzip,$(2),$(3))
$(call MkImageGzip,$(KDIR)/vmlinux-$(2).bin.gz,$(KDIR)/vmlinux-$(2).uImage)
( \
dd if=$(KDIR)/vmlinux-$(2).uImage bs=64k conv=sync; \
dd if=/dev/zero bs=1 count=65476; \
@@ -191,6 +216,38 @@ define Image/Build/CyberTAN
-o $(call imgname,$(1),$(2)).bin
endef
wndr3700_mtdlayout=mtdparts=spi0.0:320k(u-boot)ro,128k(u-boot-env)ro,1024k(kernel),6656k(rootfs),64k(art)ro,7680k@0x70000(firmware)
define Image/Build/WNDR3700
$(call PatchKernelLzma,$(2),$(3) $(wndr3700_mtdlayout))
$(call MkImageLzma,$(KDIR)/vmlinux-$(2).bin.lzma,$(KDIR)/vmlinux-$(2).uImage)
mkdir $(KDIR)/wndr3700
mkdir $(KDIR)/wndr3700/image
$(STAGING_DIR_HOST)/bin/wndr3700 \
$(KDIR)/vmlinux-$(2).uImage \
$(KDIR)/wndr3700/image/uImage
$(STAGING_DIR_HOST)/bin/mksquashfs-lzma \
$(KDIR)/wndr3700 $(KDIR)/vmlinux-$(2).uImage.squashfs.tmp \
-nopad -noappend -root-owned -be
-rm -rf $(KDIR)/wndr3700
mkimage -A mips -O linux -T filesystem -C none \
-a 0xbf070000 -e 0xbf070000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux-$(2).uImage.squashfs.tmp \
$(KDIR)/vmlinux-$(2).uImage.squashfs.tmp2
$(STAGING_DIR_HOST)/bin/wndr3700 \
$(KDIR)/vmlinux-$(2).uImage.squashfs.tmp2 \
$(KDIR)/vmlinux-$(2).uImage.squashfs
-rm -f $(KDIR)/vmlinux-$(2).uImage.squashfs.tmp*
( \
dd if=$(KDIR)/vmlinux-$(2).uImage.squashfs bs=1M conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k; \
) > $(call imgname,$(1),$(2))-sysupgrade.bin
$(STAGING_DIR_HOST)/bin/mkdniimg \
-B WNDR3700 -v OpenWrt.$(REVISION) \
-i $(call imgname,$(1),$(2))-sysupgrade.bin \
-o $(call imgname,$(1),$(2))-factory.img
endef
define Image/Build/Template/Compex
$(call Image/Build/MyLoader,$(1),$(2))
endef
@@ -223,12 +280,12 @@ define Image/Build/Template/CyberTAN/jffs2-64k
$(call Image/Build/Template/CyberTAN,jffs2-64k,$(1),$(2),$(3))
endef
define Image/Build/Template/AP81
$(call Image/Build/AP81,$(1),$(2),$(3),$(4))
define Image/Build/Template/Cameo
$(call Image/Build/Cameo,$(1),$(2),$(3),$(4))
endef
define Image/Build/Template/AP81/squashfs
$(call Image/Build/Template/AP81,squashfs,$(1),$(2),$(3))
define Image/Build/Template/Cameo/squashfs
$(call Image/Build/Template/Cameo,squashfs,$(1),$(2),$(3))
endef
define Image/Build/Template/AP83
@@ -256,7 +313,7 @@ define Image/Build/Template/TPLINK4K
endef
define Image/Build/Template/TPLINK4K/squashfs
$(call Image/Build/Template/TPLINK,squashfs-4k,$(1),$(2),$(3))
$(call Image/Build/Template/TPLINK,squashfs,$(1),$(2),$(3))
endef
define Image/Build/Template/UBNT
@@ -271,6 +328,18 @@ define Image/Build/Template/UBNT/jffs2-64k
$(call Image/Build/Template/UBNT,jffs2-64k,$(1),$(2),$(3),$(4),$(5))
endef
define Image/Build/Template/UBNTXM
$(call Image/Build/UBNTXM,$(1),$(2),$(3),$(4),$(5),$(6))
endef
define Image/Build/Template/UBNTXM/squashfs
$(call Image/Build/Template/UBNTXM,squashfs,$(1),$(2),$(3),$(4),$(5))
endef
define Image/Build/Template/UBNTXM/jffs2-64k
$(call Image/Build/Template/UBNTXM,jffs2-64k,$(1),$(2),$(3),$(4),$(5))
endef
define Image/Build/Template/Planex
$(call Image/Build/Planex,$(1),$(2),$(3))
endef
@@ -283,6 +352,18 @@ define Image/Build/Template/Planex/jffs2-64k
$(call Image/Build/Template/Planex,jffs2-64k,$(1),$(2))
endef
define Image/Build/Template/WNDR3700
$(call Image/Build/WNDR3700,$(1),$(2),$(3))
endef
define Image/Build/Template/WNDR3700/squashfs
$(call Image/Build/Template/WNDR3700,squashfs,$(1),$(2))
endef
define Image/Build/Template/WNDR3700/jffs2-64k
$(call Image/Build/Template/WNDR3700,jffs2-64k,$(1),$(2))
endef
define Image/Build/Profile/AP83
$(call Image/Build/Template/AP83/$(1),ap83,board=AP83)
endef
@@ -292,19 +373,19 @@ define Image/Build/Profile/WP543
endef
define Image/Build/Profile/DIR615C1
$(call Image/Build/Template/AP81/$(1),dir-615c1,board=TEW-632BRP,"AP81-AR9130-RT-070614-02")
$(call Image/Build/Template/Cameo/$(1),dir-615c1,board=TEW-632BRP,"AP81-AR9130-RT-070614-02")
endef
define Image/Build/Profile/TEW632BRP
$(call Image/Build/Template/AP81/$(1),tew-632brp,board=TEW-632BRP,"AP81-AR9130-RT-070614-00")
$(call Image/Build/Template/Cameo/$(1),tew-632brp,board=TEW-632BRP,"AP81-AR9130-RT-070614-00")
endef
define Image/Build/Profile/TEW652BRP
$(call Image/Build/Template/AP81/$(1),tew-652brp,board=TEW-632BRP,"AP81-AR9130-RT-080609-05")
$(call Image/Build/Template/Cameo/$(1),tew-652brp,board=TEW-632BRP,"AP81-AR9130-RT-080609-05")
endef
define Image/Build/Profile/A02RBW300N
$(call Image/Build/Template/AP81/$(1),a02-rb-w300n,board=TEW-632BRP,"AP81-AR9130-RT-070614-03")
$(call Image/Build/Template/Cameo/$(1),a02-rb-w300n,board=TEW-632BRP,"AP81-AR9130-RT-070614-03")
endef
define Image/Build/Profile/UBNTRS
@@ -319,10 +400,25 @@ define Image/Build/Profile/UBNTLSSR71
$(call Image/Build/Template/UBNT/$(1),ubnt-ls-sr71,board=UBNT-LS-SR71,LS-SR71,LS-SR71,ar7100)
endef
define Image/Build/Profile/UBNTBULLETM
$(call Image/Build/Template/UBNTXM/$(1),ubnt-bullet-m,board=UBNT-BM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNTROCKETM
$(call Image/Build/Template/UBNTXM/$(1),ubnt-rocket-m,board=UBNT-RM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNTNANOM
$(call Image/Build/Template/UBNTXM/$(1),ubnt-nano-m,board=UBNT-NM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNT
$(call Image/Build/Profile/UBNTRS,$(1))
$(call Image/Build/Profile/UBNTRSPRO,$(1))
$(call Image/Build/Profile/UBNTLSSR71,$(1))
$(call Image/Build/Profile/UBNTBULLETM,$(1))
$(call Image/Build/Profile/UBNTROCKETM,$(1))
$(call Image/Build/Profile/UBNTNANOM,$(1))
endef
define Image/Build/Profile/MZKW04NU
@@ -341,10 +437,18 @@ define Image/Build/Profile/TLWR841NDV3
$(call Image/Build/Template/TPLINK/$(1),tl-wr841ndv3,board=TL-WR941ND,TL-WR841NDv3)
endef
define Image/Build/Profile/TLWR841NDV5
$(call Image/Build/Template/TPLINK4K/$(1),tl-wr841ndv5,board=TL-WR741ND,TL-WR841NDv5)
endef
define Image/Build/Profile/TLWR941NDV2
$(call Image/Build/Template/TPLINK/$(1),tl-wr941ndv2,board=TL-WR941ND,TL-WR941NDv2)
endef
define Image/Build/Profile/WNDR3700
$(call Image/Build/Template/WNDR3700/$(1),wndr3700,board=WNDR3700)
endef
define Image/Build/Profile/WRT400N
$(call Image/Build/Template/WRT400N/$(1),wrt400n,board=WRT400N)
endef
@@ -363,22 +467,29 @@ define Image/Build/Profile/Default
$(call Image/Build/Profile/TEW652BRP,$(1))
$(call Image/Build/Profile/TLWR741NDV1,$(1))
$(call Image/Build/Profile/TLWR841NDV3,$(1))
$(call Image/Build/Profile/TLWR841NDV5,$(1))
$(call Image/Build/Profile/TLWR941NDV2,$(1))
$(call Image/Build/Profile/UBNT,$(1))
$(call Image/Build/Profile/WP543,$(1))
$(call Image/Build/Profile/WNDR3700,$(1))
$(call Image/Build/Profile/WRT400N,$(1))
$(call Image/Build/Profile/WRT160NL,$(1))
endef
define Image/Build/Profile/Madwifi
$(call Image/Build/Profile/UBNT,$(1))
$(call Image/Build/Profile/UBNTRS,$(1))
$(call Image/Build/Profile/UBNTRSPRO,$(1))
$(call Image/Build/Profile/UBNTLSSR71,$(1))
$(call Image/Build/Profile/WP543,$(1))
endef
define Image/Build/squashfs
dd if=$(KDIR)/root.squashfs of=$(IMGNAME)-root.squashfs-4k bs=4k conv=sync
$(call add_jffs2_mark,$(IMGNAME)-root.squashfs-4k)
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
dd if=$(KDIR)/root.squashfs of=$(KDIR)/root.squashfs-4k.tmp0 bs=4k conv=sync
$(call add_jffs2_mark,$(KDIR)/root.squashfs-4k.tmp0)
dd if=$(KDIR)/root.squashfs-4k.tmp0 of=$(IMGNAME)-root.squashfs-4k bs=4k conv=sync
$(call add_jffs2_mark,$(IMGNAME)-root.squashfs-4k)
rm -f $(KDIR)/root.squashfs-4k.tmp0
endef
define Image/Build

17
target/linux/ar71xx/profiles/netgear.mk Normal file
View File

@@ -0,0 +1,17 @@
#
# Copyright (C) 2009 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/WNDR3700
NAME:=NETGEAR WNDR3700
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb-ohci kmod-usb2
endef
define Profile/WNDR3700/Description
Package set optimized for the NETGEAR WNDR3700
endef
$(eval $(call Profile,WNDR3700))

11
target/linux/ar71xx/profiles/planex.mk
View File

@@ -15,3 +15,14 @@ define Profile/MZKW04NU/Description
endef
$(eval $(call Profile,MZKW04NU))
define Profile/MZKW300NH
NAME:=Planex MZK-W300NH
PACKAGES:=kmod-ath9k hostapd-mini
endef
define Profile/MZKW300NH/Description
Package set optimized for the Planex MZK-W300NH.
endef
$(eval $(call Profile,MZKW300NH))

22
target/linux/ar71xx/profiles/tp-link.mk
View File

@@ -15,6 +15,28 @@ endef
$(eval $(call Profile,TLWR741NDV1))
define Profile/TLWR841NDV3
NAME:=TP-LINK TL-WR841ND v3
PACKAGES:=kmod-ath9k hostapd-mini
endef
define Profile/TLWR841NDV3/Description
Package set optimized for the TP-LINK TL-WR841ND v3.
endef
$(eval $(call Profile,TLWR841NDV3))
define Profile/TLWR841NDV5
NAME:=TP-LINK TL-WR841ND v5
PACKAGES:=kmod-ath9k hostapd-mini
endef
define Profile/TLWR841NDV5/Description
Package set optimized for the TP-LINK TL-WR841ND v5.
endef
$(eval $(call Profile,TLWR841NDV5))
define Profile/TLWR941NDV2
NAME:=TP-LINK TL-WR941ND v2
PACKAGES:=kmod-ath9k hostapd-mini

40
target/linux/at91/config-2.6.25
View File

@@ -1,23 +1,23 @@
# CONFIG_AEABI is not set
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_AT91=y
# CONFIG_ARCH_AT91CAP9 is not set
CONFIG_ARCH_AT91RM9200=y
# CONFIG_ARCH_AT91RM9200DK is not set
CONFIG_ARCH_AT91RM9200=y
# CONFIG_ARCH_AT91SAM9260 is not set
# CONFIG_ARCH_AT91SAM9261 is not set
# CONFIG_ARCH_AT91SAM9263 is not set
# CONFIG_ARCH_AT91SAM9RL is not set
# CONFIG_ARCH_AT91X40 is not set
CONFIG_ARCH_AT91=y
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_SUPPORTS_AOUT=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AT91_ETHER=y
CONFIG_ARM_THUMB=y
CONFIG_ARM=y
# CONFIG_ARPD is not set
# CONFIG_ARTHUR is not set
CONFIG_AT91_EARLY_DBGU=y
@@ -29,50 +29,48 @@ CONFIG_AT91_EARLY_DBGU=y
# CONFIG_AT91_EARLY_USART5 is not set
CONFIG_AT91_PMC_UNIT=y
# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
CONFIG_AT91_SPI=y
# CONFIG_AT91_SPIDEV is not set
CONFIG_AT91_SPI=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AT91_VLIO=y
# CONFIG_ATMEL_PWM is not set
# CONFIG_ATMEL_SSC is not set
CONFIG_BASE_SMALL=0
# CONFIG_BINFMT_AOUT is not set
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM=y
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_BONDING is not set
CONFIG_BOUNCE=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_CLASSIC_RCU=y
CONFIG_CPU_32=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_32=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_CP15=y
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_TLB_V4WBI=y
# CONFIG_DATAFLASH_ALWAYS_ADD_DEVICE is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DM9000 is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_E1000E_ENABLED is not set
# CONFIG_FPE_FASTFPE is not set
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
CONFIG_FPE_NWFPE=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_GPIO=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
@@ -85,17 +83,16 @@ CONFIG_HAVE_OPROFILE=y
CONFIG_HW_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_HZ=128
# CONFIG_I2C is not set
# CONFIG_IEEE80211_CRYPT_CCMP is not set
# CONFIG_IEEE80211_CRYPT_TKIP is not set
# CONFIG_IEEE80211_SOFTMAC is not set
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEDS=y
CONFIG_LEGACY_PTY_COUNT=32
CONFIG_LEGACY_PTYS=y
# CONFIG_LLC2 is not set
# CONFIG_LZO_COMPRESS is not set
# CONFIG_LZO_DECOMPRESS is not set
@@ -132,35 +129,34 @@ CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_NF_NAT_RTSP is not set
# CONFIG_NF_NAT_TFTP is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NVRAM is not set
# CONFIG_OUTER_CACHE is not set
# CONFIG_PCI is not set
# CONFIG_PCI_SYSCALL is not set
CONFIG_PHYLIB=y
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPPOATM is not set
# CONFIG_PPPOL2TP is not set
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_SCSI_WAIT_SCAN is not set
# CONFIG_SDIO_UART is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_SERIAL_ATMEL_PDC=y
# CONFIG_SERIAL_ATMEL_TTYAT is not set
CONFIG_SERIO=y
CONFIG_SERIAL_ATMEL=y
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO=y
CONFIG_SLABINFO=y
# CONFIG_SMC91X is not set
# CONFIG_SPI_AT91 is not set
# CONFIG_SPI_ATMEL is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TICK_ONESHOT=y
CONFIG_UID16=y
# CONFIG_USB is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB is not set
CONFIG_USB_LIBUSUAL=y
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -207,12 +203,12 @@ CONFIG_USB_LIBUSUAL=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UEAGLEATM is not set
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VGASTATE is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_DEV is not set
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_VT=y
# CONFIG_W1 is not set
# CONFIG_WATCHDOG is not set
# CONFIG_WLAN_80211 is not set

3
target/linux/at91/image/dfboot/Makefile
View File

@@ -24,7 +24,8 @@ endef
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
$(TARGET_CONFIGURE_OPTS) \
CFLAGS="$(TARGET_CFLAGS)"
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="$(LIBGCC_S)"
endef
define Build/InstallDev

2
target/linux/at91/image/u-boot/Makefile
View File

@@ -43,7 +43,7 @@ define Build/InstallDev
dd if=$(PKG_BUILD_DIR)/u-boot.bin of=$(PKG_BUILD_DIR)/u-boot.block bs=232k count=1 conv=sync
# $(INSTALL_DIR) $(STAGING_DIR)/ubclient/sbin
# $(INSTALL_BIN) $(PKG_BUILD_DIR)/ubclient/ubpar $(STAGING_DIR)/ubclient/sbin/
$(CP) $(PKG_BUILD_DIR)/ubclient/ubpar ../../base-files/default/sbin
$(CP) $(PKG_BUILD_DIR)/ubclient/ubpar ../../base-files/sbin
endef
$(eval $(call Build/DefaultTargets))

52
target/linux/at91/image/u-boot/patches/015-eabi_fixes.patch Normal file
View File

@@ -0,0 +1,52 @@
Index: git/lib_arm/div0.c
===================================================================
--- git.orig/lib_arm/div0.c
+++ git/lib_arm/div0.c
@@ -22,9 +22,3 @@
*/
/* Replacement (=dummy) for GNU/Linux division-by zero handler */
-void __div0 (void)
-{
- extern void hang (void);
-
- hang();
-}
Index: git/Makefile
===================================================================
--- git.orig/Makefile
+++ git/Makefile
@@ -225,7 +225,7 @@ LIBS := $(addprefix $(obj),$(LIBS))
.PHONY : $(LIBS)
# Add GCC lib
-PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
+PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc -lgcc_eh
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
--- a/board/vlink/vlink.c 2009-10-29 16:40:33.000000000 +0100
+++ b/board/vlink/vlink.c 2009-10-29 16:43:27.000000000 +0100
@@ -33,6 +33,9 @@
* Miscelaneous platform dependent initialisations
*/
+void raise() {}
+void abort() {}
+
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
--- a/board/vlink/u-boot.lds 2009-10-29 16:40:33.000000000 +0100
+++ b/board/vlink/u-boot.lds 2009-10-29 16:43:57.000000000 +0100
@@ -38,6 +38,10 @@
. = ALIGN(4);
.rodata : { *(.rodata) }
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
+ __exidx_start = .;
+ .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
+ __exidx_end = .;
. = ALIGN(4);
.data : { *(.data) }

18
target/linux/atheros/config-2.6.30
View File

@@ -9,19 +9,18 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR2315=y
CONFIG_ATHEROS_AR2315_PCI=y
CONFIG_ATHEROS_AR2315=y
CONFIG_ATHEROS_AR231X=y
CONFIG_ATHEROS_AR5312=y
CONFIG_ATHEROS_WDT=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
# CONFIG_COMPAT_NET_DEV_OPS is not set
CONFIG_CPU_BIG_ENDIAN=y
@@ -31,9 +30,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -55,15 +54,15 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -81,7 +80,6 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP175C_PHY=y
CONFIG_IRQ_CPU=y
@@ -95,9 +93,7 @@ CONFIG_IRQ_CPU=y
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
@@ -105,6 +101,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR2315=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
@@ -119,9 +116,7 @@ CONFIG_MVSWITCH_PHY=y
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -151,7 +146,6 @@ CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y

20
target/linux/atheros/config-2.6.31
View File

@@ -12,19 +12,18 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR2315=y
CONFIG_ATHEROS_AR2315_PCI=y
CONFIG_ATHEROS_AR2315=y
CONFIG_ATHEROS_AR231X=y
CONFIG_ATHEROS_AR5312=y
CONFIG_ATHEROS_WDT=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
CONFIG_CONSTRUCTORS=y
CONFIG_CPU_BIG_ENDIAN=y
@@ -34,9 +33,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -58,16 +57,16 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -81,12 +80,11 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP175C_PHY=y
CONFIG_IRQ_CPU=y
@@ -101,9 +99,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
@@ -111,6 +107,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_AR2315=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
@@ -125,9 +122,7 @@ CONFIG_MVSWITCH_PHY=y
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -157,7 +152,6 @@ CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y

2
target/linux/atheros/image/Makefile
View File

@@ -55,7 +55,7 @@ define Image/Build
-sh $(TOPDIR)/scripts/combined-image.sh \
"$(BIN_DIR)/openwrt-$(BOARD)-vmlinux.lzma" \
"$(BIN_DIR)/openwrt-$(BOARD)-root.$(1)" \
"$(BIN_DIR)/openwrt-$(BOARD)-combined.img"
"$(BIN_DIR)/openwrt-$(BOARD)-combined.$(1).img"
endif
endef

16
target/linux/au1000/au1500/config-default
View File

@@ -8,7 +8,6 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
@@ -23,9 +22,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -64,8 +63,8 @@ CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY=m
CONFIG_ELF_CORE=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -84,15 +83,15 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
CONFIG_I2C=m
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
CONFIG_I2C=m
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
CONFIG_KEXEC=y
@@ -106,7 +105,6 @@ CONFIG_MACH_ALCHEMY=y
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
@@ -120,10 +118,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
CONFIG_MIPS_MTX1=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
CONFIG_MIPS_MTX1=y
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
@@ -131,18 +129,17 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MTD_ALCHEMY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCSPKR_PLATFORM=y
CONFIG_PHYLIB=y
@@ -182,7 +179,6 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y

57
target/linux/au1000/au1550/config-default
View File

@@ -9,7 +9,6 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATMEL=m
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
CONFIG_CEVT_R4K=y
@@ -22,9 +21,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -61,8 +60,8 @@ CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DUMMY=m
CONFIG_ELF_CORE=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -82,20 +81,19 @@ CONFIG_HAVE_IDE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_OPROFILE=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_CS=m
CONFIG_HOSTAP=m
CONFIG_HOSTAP_PCI=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_IEEE80211=m
CONFIG_IEEE80211_CRYPT_CCMP=m
CONFIG_IEEE80211_CRYPT_TKIP=m
CONFIG_IEEE80211_CRYPT_WEP=m
CONFIG_IEEE80211=m
CONFIG_IFB=m
CONFIG_INET_DIAG=m
CONFIG_INET_TCP_DIAG=m
@@ -126,7 +124,6 @@ CONFIG_MAGIC_SYSRQ=y
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_COBALT is not set
@@ -139,10 +136,10 @@ CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_MIPS_MTX1 is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
@@ -150,16 +147,28 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MTD_ALCHEMY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_START=0x8000000
# CONFIG_NATSEMI is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_NET_ACT_GACT=m
CONFIG_NET_ACT_IPT=m
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_RSVP6=m
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_U32=m
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
@@ -180,27 +189,15 @@ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_RATEEST=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
CONFIG_NET_ACT_GACT=m
CONFIG_NET_ACT_IPT=m
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_U32=m
CONFIG_NET_SCH_CBQ=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_NAT=m
CONFIG_NF_NAT_FTP=m
CONFIG_NF_NAT_IRC=m
CONFIG_NF_NAT=m
CONFIG_NF_NAT_TFTP=m
# CONFIG_NO_IOPORT is not set
CONFIG_PAGEFLAGS_EXTENDED=y
@@ -210,24 +207,23 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
CONFIG_PCCARD=m
CONFIG_PCCARD_NONSTATIC=m
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCMCIA=m
CONFIG_PCMCIA_AU1X00=m
CONFIG_PCMCIA_IOCTL=y
CONFIG_PCMCIA_LOAD_CIS=y
CONFIG_PCMCIA=m
CONFIG_PCSPKR_PLATFORM=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_PPP=m
CONFIG_PPPOE=m
CONFIG_PPPOL2TP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP=m
CONFIG_PPPOE=m
CONFIG_PPPOL2TP=m
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_PROBE_INITRD_HEADER is not set
# CONFIG_R6040 is not set
@@ -272,7 +268,6 @@ CONFIG_TCP_CONG_SCALABLE=m
CONFIG_TCP_CONG_VENO=m
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_YEAH=m
CONFIG_TICK_ONESHOT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
# CONFIG_VGASTATE is not set

9
target/linux/avr32/config-default
View File

@@ -17,7 +17,6 @@ CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
CONFIG_ATMEL_TCB_CLKSRC=y
CONFIG_ATMEL_TCLIB=y
CONFIG_AVR32=y
CONFIG_BASE_SMALL=0
CONFIG_BITREVERSE=y
# CONFIG_BOARD_ATNGW100_EVKLCD10X is not set
CONFIG_BOARD_ATNGW100=y
@@ -29,8 +28,6 @@ CONFIG_BOARD_ATNGW100=y
CONFIG_CLASSIC_RCU=y
CONFIG_CPU_AT32AP7000=y
CONFIG_CPU_AT32AP700X=y
# CONFIG_CPU_FREQ is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DW_DMAC=y
@@ -58,10 +55,10 @@ CONFIG_LEDS_GPIO=y
CONFIG_LOAD_ADDRESS=0x10000000
CONFIG_LOADER_U_BOOT=y
CONFIG_MACB=y
CONFIG_MMC=m
CONFIG_MMC_ATMELMCI=m
# CONFIG_MMC_ATMELMCI_DMA is not set
CONFIG_MMC_ATMELMCI=m
CONFIG_MMC_BLOCK=m
CONFIG_MMC=m
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
@@ -80,6 +77,7 @@ CONFIG_NO_HZ=y
CONFIG_NR_QUICK=2
# CONFIG_OWNERSHIP_TRACE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PCI is not set
CONFIG_PERFORMANCE_COUNTERS=y
CONFIG_PHYLIB=y
CONFIG_PHYS_OFFSET=0x10000000
@@ -102,6 +100,5 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_SPIDEV is not set
CONFIG_SPI=y
CONFIG_SUBARCH_AVR32B=y
CONFIG_TICK_ONESHOT=y
# CONFIG_VGASTATE is not set
CONFIG_ZONE_DMA_FLAG=0

54
target/linux/brcm-2.4/base-files/etc/init.d/netconfig
View File

@@ -4,7 +4,41 @@
START=05
start() {
[ -e /etc/config/network ] && exit 0
[ -e /etc/config/network ] && {
local batch
config_cb() {
case "$1" in
switch)
option_cb() {
case "$1" in
vlan[0-9]|vlan1[0-5])
local id="${1#vlan}"
append batch "delete network.eth0.${1}${N}"
append batch "set network.eth0_${n}=switch_vlan${N}"
append batch "set network.eth0_${n}.device=eth0${N}"
append batch "set network.eth0_${n}.vlan=${id}${N}"
append batch "set network.eth0_${n}.ports='${2}'${N}"
;;
esac
}
;;
switch_vlan)
option_cb() { :; }
batch=""
;;
esac
}
config_load network
[ -n "$batch" ] && {
logger -t netconfig "migrating switch config to new format ..."
echo "$batch${N}commit network" | uci batch
}
exit 0
}
mkdir -p /etc/config
@@ -20,6 +54,16 @@ start() {
if (c[name] != "") print " option " cfgname " \"" c[name] "\""
}
function vlan(id, name) {
if (c[name] != "") {
print "config switch_vlan eth0_" id
print " option device \"eth0\""
print " option vlan " id
print " option ports \"" c[name] "\""
print ""
}
}
function macinc(mac, maca, i, result) {
split(mac, maca, ":")
for (i = 1; i <= 6; i++) maca[i] = "0x" maca[i]
@@ -165,10 +209,10 @@ start() {
if (c["vlan0ports"] || c["vlan1ports"]) {
print "#### VLAN configuration "
print "config switch eth0"
p("vlan0", "vlan0ports")
p("vlan1", "vlan1ports")
print ""
print ""
print " option enable 1"
print ""
vlan(0, "vlan0ports")
vlan(1, "vlan1ports")
}
print "#### Loopback configuration"
print "config interface loopback"

5
target/linux/brcm-2.4/base-files/etc/preinit.arch
View File

@@ -37,8 +37,6 @@ case "$(cat /proc/diag/model)" in
"Sitecom WL-105b") ifname=eth1;;
esac
failsafe_ip
check_module () {
module="$1"; shift; params="$*"
@@ -48,6 +46,9 @@ check_module () {
return $?
}
check_module tg3
failsafe_ip
insmod switch-core
check_module switch-robo || check_module switch-adm || {
check_module bcm57xx activate_gpio=0x4 && cpu_port="8u*"

72
target/linux/brcm-2.4/config-default
View File

@@ -1,24 +1,24 @@
# CONFIG_60XX_WDT is not set
# CONFIG_6PACK is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_ACQUIRE_WDT is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_ADVANTECH_WDT is not set
# CONFIG_AIRO is not set
# CONFIG_AIRO_CS is not set
# CONFIG_AIRO is not set
# CONFIG_ALIM1535_WDT is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_AMD74XX_OVERRIDE is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_APRICOT is not set
# CONFIG_ATM is not set
CONFIG_AX25=m
# CONFIG_AX25_DAMA_SLAVE is not set
CONFIG_AX25=m
CONFIG_B44=y
# CONFIG_BAYCOM_EPP is not set
# CONFIG_BAYCOM_PAR is not set
@@ -34,14 +34,14 @@ CONFIG_BCM947XX=y
CONFIG_BLK_DEV_AEC62XX=m
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_SII is not set
# CONFIG_BLK_DEV_ATIIXP is not set
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_CY82C693 is not set
@@ -50,25 +50,25 @@ CONFIG_BLK_DEV_AEC62XX=m
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
CONFIG_BLK_DEV_IDE=m
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDEDISK=m
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDE=m
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDE_SATA is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_NS87415 is not set
CONFIG_BLK_DEV_OFFBOARD=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_PDC202XX=y
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
CONFIG_BLK_DEV_PDC202XX_OLD=m
CONFIG_BLK_DEV_PDC202XX=y
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_SC1200 is not set
@@ -79,7 +79,6 @@ CONFIG_BLK_DEV_PDC202XX_OLD=m
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_BLUEZ=m
CONFIG_BLUEZ_BNEP=m
CONFIG_BLUEZ_BNEP_MC_FILTER=y
CONFIG_BLUEZ_BNEP_PROTO_FILTER=y
@@ -88,21 +87,22 @@ CONFIG_BLUEZ_BNEP_PROTO_FILTER=y
# CONFIG_BLUEZ_HCIBT3C is not set
# CONFIG_BLUEZ_HCIBTUART is not set
# CONFIG_BLUEZ_HCIDTL1 is not set
CONFIG_BLUEZ_HCIUART=m
CONFIG_BLUEZ_HCIUART_BCSP=y
CONFIG_BLUEZ_HCIUART_BCSP_TXCRC=y
CONFIG_BLUEZ_HCIUART_BCSP=y
CONFIG_BLUEZ_HCIUART_H4=y
CONFIG_BLUEZ_HCIUART=m
CONFIG_BLUEZ_HCIUSB=m
CONFIG_BLUEZ_HCIUSB_SCO=y
# CONFIG_BLUEZ_HCIVHCI is not set
CONFIG_BLUEZ_L2CAP=m
CONFIG_BLUEZ=m
CONFIG_BLUEZ_RFCOMM=m
CONFIG_BLUEZ_RFCOMM_TTY=y
CONFIG_BLUEZ_SCO=m
# CONFIG_BPQETHER is not set
CONFIG_CARDBUS=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200"
# CONFIG_CMDLINE_BOOL is not set
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200"
CONFIG_CRC32=y
# CONFIG_CS89x0 is not set
# CONFIG_DE4X5 is not set
@@ -123,8 +123,8 @@ CONFIG_HAMRADIO=y
# CONFIG_HP100 is not set
# CONFIG_HPT34X_AUTODMA is not set
# CONFIG_I2C_PARPORT is not set
# CONFIG_I2O is not set
# CONFIG_I2O_BLOCK is not set
# CONFIG_I2O is not set
# CONFIG_I2O_LAN is not set
# CONFIG_I2O_PCI is not set
# CONFIG_I2O_PROC is not set
@@ -133,7 +133,7 @@ CONFIG_HAMRADIO=y
# CONFIG_I82092 is not set
# CONFIG_I82365 is not set
# CONFIG_IB700_WDT is not set
CONFIG_IDE=m
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDISK_MULTI_MODE is not set
CONFIG_IDEDISK_STROKE=y
CONFIG_IDEDMA_AUTO=y
@@ -141,8 +141,8 @@ CONFIG_IDEDMA_IVB=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_PCI_WIP is not set
CONFIG_IDE=m
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDE_TASK_IOCTL is not set
# CONFIG_IEEE1394 is not set
# CONFIG_IP_VS is not set
@@ -159,38 +159,38 @@ CONFIG_MIPS_BRCM=y
CONFIG_MKISS=m
CONFIG_MSDOS_FS=m
CONFIG_MTD_BCM947XX=y
CONFIG_MTD_CFI_SSTSTD=y
CONFIG_MTD_CFI_B1=y
CONFIG_MTD_CFI_SSTSTD=y
CONFIG_MTD_SFLASH=y
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_NETROM is not set
CONFIG_NET_PCI=y
# CONFIG_NET_PCMCIA is not set
# CONFIG_NETROM is not set
CONFIG_NET_SCH_ESFQ=m
CONFIG_NET_WIRELESS=y
CONFIG_NEW_IRQ=y
CONFIG_NEW_TIME_C=y
CONFIG_PARPORT=m
# CONFIG_PARPORT_1284 is not set
# CONFIG_PARPORT_AMIGA is not set
# CONFIG_PARPORT_ATARI is not set
# CONFIG_PARPORT_GSC is not set
# CONFIG_PARPORT_IP22 is not set
CONFIG_PARPORT=m
# CONFIG_PARPORT_MFC3 is not set
# CONFIG_PARPORT_OTHER is not set
# CONFIG_PARPORT_PC is not set
CONFIG_PARPORT_SPLINK=m
# CONFIG_PARPORT_SUNBPP is not set
CONFIG_PCI=y
CONFIG_PCI_AUTO=y
# CONFIG_PCI_HERMES is not set
# CONFIG_PCI_NAMES is not set
# CONFIG_PCI_NEW is not set
CONFIG_PCMCIA=m
CONFIG_PCI=y
# CONFIG_PCMCIA_ATMEL is not set
# CONFIG_PCMCIA_HERMES is not set
CONFIG_PCMCIA=m
CONFIG_PCMCIA_SERIAL_CS=m
# CONFIG_PCNET32 is not set
# CONFIG_PCWATCHDOG is not set
@@ -218,13 +218,11 @@ CONFIG_PRINTER=m
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCx200_WDT is not set
# CONFIG_SIS900 is not set
CONFIG_SOFT_WATCHDOG=m
CONFIG_SOUND=m
# CONFIG_SOUNDMODEM is not set
# CONFIG_SOUND_AD1980 is not set
# CONFIG_SOUND_ALI5455 is not set
# CONFIG_SOUND_BT878 is not set
@@ -237,8 +235,10 @@ CONFIG_SOUND=m
# CONFIG_SOUND_FORTE is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_MAESTRO is not set
CONFIG_SOUND=m
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUNDMODEM is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_OSS is not set
@@ -257,7 +257,6 @@ CONFIG_SOUND=m
# CONFIG_TMD_HERMES is not set
# CONFIG_TULIP is not set
# CONFIG_TUNER_3036 is not set
CONFIG_USB=m
CONFIG_USB_ACM=m
# CONFIG_USB_AIPTEK is not set
CONFIG_USB_AUDIO=m
@@ -273,9 +272,9 @@ CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DSBR is not set
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_HID is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_HIDINPUT is not set
# CONFIG_USB_HID is not set
# CONFIG_USB_HPUSBSCSI is not set
# CONFIG_USB_IBMCAM is not set
# CONFIG_USB_KAWETH is not set
@@ -283,6 +282,7 @@ CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_KONICAWC is not set
# CONFIG_USB_LCD is not set
CONFIG_USB=m
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_MIDI is not set
@@ -297,7 +297,6 @@ CONFIG_USB_PWC=m
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_SE401 is not set
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_BELKIN=m
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_DEBUG is not set
@@ -313,18 +312,19 @@ CONFIG_USB_SERIAL_KEYSPAN=m
CONFIG_USB_SERIAL_KEYSPAN_MPR=y
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
CONFIG_USB_SERIAL_KEYSPAN_USA19=y
CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
CONFIG_USB_SERIAL_KEYSPAN_USA28=y
CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
CONFIG_USB_SERIAL_KEYSPAN_USA19=y
CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
CONFIG_USB_SERIAL_KEYSPAN_USA28=y
CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_MCT_U232=m
# CONFIG_USB_SERIAL_OMNINET is not set
CONFIG_USB_SERIAL_PL2303=m
@@ -332,7 +332,6 @@ CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_VISOR=m
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
CONFIG_USB_STORAGE=m
CONFIG_USB_STORAGE_DATAFAB=y
# CONFIG_USB_STORAGE_DEBUG is not set
CONFIG_USB_STORAGE_DPCM=y
@@ -340,12 +339,13 @@ CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_HP8200e=y
# CONFIG_USB_STORAGE_ISD200 is not set
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_USB_STORAGE=m
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
# CONFIG_USB_STV680 is not set
# CONFIG_USB_TIGL is not set
CONFIG_USB_UHCI=m
CONFIG_USB_UHCI_ALT=m
CONFIG_USB_UHCI=m
# CONFIG_USB_USS720 is not set
# CONFIG_USB_VICAM is not set
# CONFIG_USB_W9968CF is not set
@@ -362,9 +362,9 @@ CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_PROC_FS=y
# CONFIG_VIDEO_SAA5249 is not set
# CONFIG_VIDEO_STRADIS is not set
# CONFIG_VIDEO_ZORAN is not set
# CONFIG_VIDEO_ZORAN_BUZ is not set
# CONFIG_VIDEO_ZORAN_DC10 is not set
# CONFIG_VIDEO_ZORAN is not set
# CONFIG_VIDEO_ZORAN_LML33 is not set
# CONFIG_VIDEO_ZR36120 is not set
# CONFIG_W83877F_WDT is not set

9
target/linux/brcm-2.4/files/arch/mips/bcm947xx/prom.c
View File

@@ -31,6 +31,15 @@ prom_init(int argc, const char **argv)
*(unsigned long *)(prom_init))
break;
}
/* Ignoring the last page when ddr size is 128M. Cached
* accesses to last page is causing the processor to prefetch
* using address above 128M stepping out of the ddr address
* space.
*/
if (mem == 0x8000000)
mem -= 0x1000;
add_memory_region(0, mem, BOOT_MEM_RAM);
}

28
target/linux/brcm47xx/config-2.6.28
View File

@@ -8,13 +8,12 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARPD is not set
CONFIG_B44=y
CONFIG_B44_PCI=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI_AUTOSELECT=y
CONFIG_BASE_SMALL=0
CONFIG_BCM47XX=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI=y
CONFIG_B44=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCM47XX=y
CONFIG_BITREVERSE=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_BSD_PROCESS_ACCT is not set
@@ -28,9 +27,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -57,8 +56,8 @@ CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
@@ -74,10 +73,9 @@ CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ROUTE_VERBOSE is not set
@@ -94,7 +92,6 @@ CONFIG_LEDS_GPIO=y
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
@@ -103,15 +100,13 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_BCM47XX=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -139,26 +134,25 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_SERIAL=y
CONFIG_SSB_SPROM=y
CONFIG_SSB=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_EHCI_HCD_SSB=y
CONFIG_USB_OHCI_HCD_SSB=y

32
target/linux/brcm47xx/config-2.6.30
View File

@@ -7,20 +7,19 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARPD is not set
CONFIG_B44=y
CONFIG_B44_PCI=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI_AUTOSELECT=y
CONFIG_BASE_SMALL=0
CONFIG_BCM47XX=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI=y
CONFIG_B44=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCM47XX=y
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CFE=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
# CONFIG_CPU_BIG_ENDIAN is not set
@@ -30,9 +29,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -60,15 +59,15 @@ CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -86,10 +85,9 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IRQ_CPU=y
@@ -104,7 +102,6 @@ CONFIG_LEDS_GPIO=y
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
@@ -113,15 +110,13 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_BCM47XX=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -149,26 +144,25 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_SERIAL=y
CONFIG_SSB_SPROM=y
CONFIG_SSB=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_EHCI_HCD_SSB=y

35
target/linux/brcm47xx/config-2.6.31
View File

@@ -10,20 +10,19 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARPD is not set
CONFIG_B44=y
CONFIG_B44_PCI=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI_AUTOSELECT=y
CONFIG_BASE_SMALL=0
CONFIG_BCM47XX=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI=y
CONFIG_B44=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCM47XX=y
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CFE=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CONSTRUCTORS=y
@@ -34,9 +33,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -58,16 +57,16 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -81,15 +80,14 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IRQ_CPU=y
@@ -105,9 +103,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
@@ -115,15 +111,13 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_BCM47XX=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
@@ -151,26 +145,25 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_SERIAL=y
CONFIG_SSB_SPROM=y
CONFIG_SSB=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y

17
target/linux/brcm47xx/patches-2.6.28/170-128MB_ram_bugfix.patch Normal file
View File

@@ -0,0 +1,17 @@
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
break;
}
+ /* Ignoring the last page when ddr size is 128M. Cached
+ * accesses to last page is causing the processor to prefetch
+ * using address above 128M stepping out of the ddr address
+ * space.
+ */
+ if (mem == 0x8000000)
+ mem -= 0x1000;
+
add_memory_region(0, mem, BOOT_MEM_RAM);
}

6
target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch
View File

@@ -1,6 +1,6 @@
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco
@@ -258,6 +258,8 @@ void ssb_chipco_resume(struct ssb_chipco
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@ -9,7 +9,7 @@
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
@@ -281,6 +283,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@ -31,7 +31,7 @@
}
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1011,6 +1011,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
@@ -1013,6 +1013,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
if (bus->chip_id == 0x5365) {
rate = 100000000;

16
target/linux/brcm47xx/patches-2.6.28/280-activate_ssb_support_in_usb.patch
View File

@@ -1,16 +0,0 @@
This prevents the options from being delete with make kernel_oldconfig.
---
drivers/ssb/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -126,6 +126,8 @@ config SSB_DRIVER_MIPS
config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS
+ select USB_EHCI_HCD_SSB if USB_EHCI_HCD
+ select USB_OHCI_HCD_SSB if USB_OHCI_HCD
default y
config SSB_DRIVER_EXTIF

2
target/linux/brcm47xx/patches-2.6.28/800-fix_cfe_detection.patch
View File

@@ -90,7 +90,7 @@
{
char buf[CL_SIZE];
@@ -146,9 +122,12 @@ static __init void prom_init_mem(void)
@@ -154,9 +130,12 @@ static __init void prom_init_mem(void)
void __init prom_init(void)
{

823
target/linux/brcm47xx/patches-2.6.28/810-ssb-add-pmu-support.patch
View File

@@ -1,823 +0,0 @@
Sent to mainline on 2009 Feb 03.
For further modifications, please use separate patch files. This simpifies
keeping track of what is upstream and what is not. Thanks.
--mb
--- a/drivers/ssb/Makefile
+++ b/drivers/ssb/Makefile
@@ -9,6 +9,7 @@ ssb-$(CONFIG_SSB_PCMCIAHOST) += pcmcia.
# built-in drivers
ssb-y += driver_chipcommon.o
+ssb-y += driver_chipcommon_pmu.o
ssb-$(CONFIG_SSB_DRIVER_MIPS) += driver_mipscore.o
ssb-$(CONFIG_SSB_DRIVER_EXTIF) += driver_extif.o
ssb-$(CONFIG_SSB_DRIVER_PCICORE) += driver_pcicore.o
--- /dev/null
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -0,0 +1,508 @@
+/*
+ * Sonics Silicon Backplane
+ * Broadcom ChipCommon Power Management Unit driver
+ *
+ * Copyright 2009, Michael Buesch <mb@bu3sch.de>
+ * Copyright 2007, Broadcom Corporation
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+#include <linux/ssb/ssb.h>
+#include <linux/ssb/ssb_regs.h>
+#include <linux/ssb/ssb_driver_chipcommon.h>
+#include <linux/delay.h>
+
+#include "ssb_private.h"
+
+static u32 ssb_chipco_pll_read(struct ssb_chipcommon *cc, u32 offset)
+{
+ chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset);
+ return chipco_read32(cc, SSB_CHIPCO_PLLCTL_DATA);
+}
+
+static void ssb_chipco_pll_write(struct ssb_chipcommon *cc,
+ u32 offset, u32 value)
+{
+ chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset);
+ chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value);
+}
+
+struct pmu0_plltab_entry {
+ u16 freq; /* Crystal frequency in kHz.*/
+ u8 xf; /* Crystal frequency value for PMU control */
+ u8 wb_int;
+ u32 wb_frac;
+};
+
+static const struct pmu0_plltab_entry pmu0_plltab[] = {
+ { .freq = 12000, .xf = 1, .wb_int = 73, .wb_frac = 349525, },
+ { .freq = 13000, .xf = 2, .wb_int = 67, .wb_frac = 725937, },
+ { .freq = 14400, .xf = 3, .wb_int = 61, .wb_frac = 116508, },
+ { .freq = 15360, .xf = 4, .wb_int = 57, .wb_frac = 305834, },
+ { .freq = 16200, .xf = 5, .wb_int = 54, .wb_frac = 336579, },
+ { .freq = 16800, .xf = 6, .wb_int = 52, .wb_frac = 399457, },
+ { .freq = 19200, .xf = 7, .wb_int = 45, .wb_frac = 873813, },
+ { .freq = 19800, .xf = 8, .wb_int = 44, .wb_frac = 466033, },
+ { .freq = 20000, .xf = 9, .wb_int = 44, .wb_frac = 0, },
+ { .freq = 25000, .xf = 10, .wb_int = 70, .wb_frac = 419430, },
+ { .freq = 26000, .xf = 11, .wb_int = 67, .wb_frac = 725937, },
+ { .freq = 30000, .xf = 12, .wb_int = 58, .wb_frac = 699050, },
+ { .freq = 38400, .xf = 13, .wb_int = 45, .wb_frac = 873813, },
+ { .freq = 40000, .xf = 14, .wb_int = 45, .wb_frac = 0, },
+};
+#define SSB_PMU0_DEFAULT_XTALFREQ 20000
+
+static const struct pmu0_plltab_entry * pmu0_plltab_find_entry(u32 crystalfreq)
+{
+ const struct pmu0_plltab_entry *e;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(pmu0_plltab); i++) {
+ e = &pmu0_plltab[i];
+ if (e->freq == crystalfreq)
+ return e;
+ }
+
+ return NULL;
+}
+
+/* Tune the PLL to the crystal speed. crystalfreq is in kHz. */
+static void ssb_pmu0_pllinit_r0(struct ssb_chipcommon *cc,
+ u32 crystalfreq)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ const struct pmu0_plltab_entry *e = NULL;
+ u32 pmuctl, tmp, pllctl;
+ unsigned int i;
+
+ if ((bus->chip_id == 0x5354) && !crystalfreq) {
+ /* The 5354 crystal freq is 25MHz */
+ crystalfreq = 25000;
+ }
+ if (crystalfreq)
+ e = pmu0_plltab_find_entry(crystalfreq);
+ if (!e)
+ e = pmu0_plltab_find_entry(SSB_PMU0_DEFAULT_XTALFREQ);
+ BUG_ON(!e);
+ crystalfreq = e->freq;
+ cc->pmu.crystalfreq = e->freq;
+
+ /* Check if the PLL already is programmed to this frequency. */
+ pmuctl = chipco_read32(cc, SSB_CHIPCO_PMU_CTL);
+ if (((pmuctl & SSB_CHIPCO_PMU_CTL_XTALFREQ) >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT) == e->xf) {
+ /* We're already there... */
+ return;
+ }
+
+ ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
+ (crystalfreq / 1000), (crystalfreq % 1000));
+
+ /* First turn the PLL off. */
+ switch (bus->chip_id) {
+ case 0x4328:
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MINRES_MSK,
+ ~(1 << SSB_PMURES_4328_BB_PLL_PU));
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MAXRES_MSK,
+ ~(1 << SSB_PMURES_4328_BB_PLL_PU));
+ break;
+ case 0x5354:
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MINRES_MSK,
+ ~(1 << SSB_PMURES_5354_BB_PLL_PU));
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MAXRES_MSK,
+ ~(1 << SSB_PMURES_5354_BB_PLL_PU));
+ break;
+ default:
+ SSB_WARN_ON(1);
+ }
+ for (i = 1500; i; i--) {
+ tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
+ if (!(tmp & SSB_CHIPCO_CLKCTLST_HAVEHT))
+ break;
+ udelay(10);
+ }
+ tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
+ if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
+ ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
+
+ /* Set PDIV in PLL control 0. */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
+ if (crystalfreq >= SSB_PMU0_PLLCTL0_PDIV_FREQ)
+ pllctl |= SSB_PMU0_PLLCTL0_PDIV_MSK;
+ else
+ pllctl &= ~SSB_PMU0_PLLCTL0_PDIV_MSK;
+ ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL0, pllctl);
+
+ /* Set WILD in PLL control 1. */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL1);
+ pllctl &= ~SSB_PMU0_PLLCTL1_STOPMOD;
+ pllctl &= ~(SSB_PMU0_PLLCTL1_WILD_IMSK | SSB_PMU0_PLLCTL1_WILD_FMSK);
+ pllctl |= ((u32)e->wb_int << SSB_PMU0_PLLCTL1_WILD_IMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_IMSK;
+ pllctl |= ((u32)e->wb_frac << SSB_PMU0_PLLCTL1_WILD_FMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_FMSK;
+ if (e->wb_frac == 0)
+ pllctl |= SSB_PMU0_PLLCTL1_STOPMOD;
+ ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL1, pllctl);
+
+ /* Set WILD in PLL control 2. */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL2);
+ pllctl &= ~SSB_PMU0_PLLCTL2_WILD_IMSKHI;
+ pllctl |= (((u32)e->wb_int >> 4) << SSB_PMU0_PLLCTL2_WILD_IMSKHI_SHIFT) & SSB_PMU0_PLLCTL2_WILD_IMSKHI;
+ ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL2, pllctl);
+
+ /* Set the crystalfrequency and the divisor. */
+ pmuctl = chipco_read32(cc, SSB_CHIPCO_PMU_CTL);
+ pmuctl &= ~SSB_CHIPCO_PMU_CTL_ILP_DIV;
+ pmuctl |= (((crystalfreq + 127) / 128 - 1) << SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT)
+ & SSB_CHIPCO_PMU_CTL_ILP_DIV;
+ pmuctl &= ~SSB_CHIPCO_PMU_CTL_XTALFREQ;
+ pmuctl |= ((u32)e->xf << SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT) & SSB_CHIPCO_PMU_CTL_XTALFREQ;
+ chipco_write32(cc, SSB_CHIPCO_PMU_CTL, pmuctl);
+}
+
+struct pmu1_plltab_entry {
+ u16 freq; /* Crystal frequency in kHz.*/
+ u8 xf; /* Crystal frequency value for PMU control */
+ u8 ndiv_int;
+ u32 ndiv_frac;
+ u8 p1div;
+ u8 p2div;
+};
+
+static const struct pmu1_plltab_entry pmu1_plltab[] = {
+ { .freq = 12000, .xf = 1, .p1div = 3, .p2div = 22, .ndiv_int = 0x9, .ndiv_frac = 0xFFFFEF, },
+ { .freq = 13000, .xf = 2, .p1div = 1, .p2div = 6, .ndiv_int = 0xb, .ndiv_frac = 0x483483, },
+ { .freq = 14400, .xf = 3, .p1div = 1, .p2div = 10, .ndiv_int = 0xa, .ndiv_frac = 0x1C71C7, },
+ { .freq = 15360, .xf = 4, .p1div = 1, .p2div = 5, .ndiv_int = 0xb, .ndiv_frac = 0x755555, },
+ { .freq = 16200, .xf = 5, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x6E9E06, },
+ { .freq = 16800, .xf = 6, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x3CF3CF, },
+ { .freq = 19200, .xf = 7, .p1div = 1, .p2div = 9, .ndiv_int = 0x5, .ndiv_frac = 0x17B425, },
+ { .freq = 19800, .xf = 8, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0xA57EB, },
+ { .freq = 20000, .xf = 9, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0, },
+ { .freq = 24000, .xf = 10, .p1div = 3, .p2div = 11, .ndiv_int = 0xa, .ndiv_frac = 0, },
+ { .freq = 25000, .xf = 11, .p1div = 5, .p2div = 16, .ndiv_int = 0xb, .ndiv_frac = 0, },
+ { .freq = 26000, .xf = 12, .p1div = 1, .p2div = 2, .ndiv_int = 0x10, .ndiv_frac = 0xEC4EC4, },
+ { .freq = 30000, .xf = 13, .p1div = 3, .p2div = 8, .ndiv_int = 0xb, .ndiv_frac = 0, },
+ { .freq = 38400, .xf = 14, .p1div = 1, .p2div = 5, .ndiv_int = 0x4, .ndiv_frac = 0x955555, },
+ { .freq = 40000, .xf = 15, .p1div = 1, .p2div = 2, .ndiv_int = 0xb, .ndiv_frac = 0, },
+};
+
+#define SSB_PMU1_DEFAULT_XTALFREQ 15360
+
+static const struct pmu1_plltab_entry * pmu1_plltab_find_entry(u32 crystalfreq)
+{
+ const struct pmu1_plltab_entry *e;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(pmu1_plltab); i++) {
+ e = &pmu1_plltab[i];
+ if (e->freq == crystalfreq)
+ return e;
+ }
+
+ return NULL;
+}
+
+/* Tune the PLL to the crystal speed. crystalfreq is in kHz. */
+static void ssb_pmu1_pllinit_r0(struct ssb_chipcommon *cc,
+ u32 crystalfreq)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ const struct pmu1_plltab_entry *e = NULL;
+ u32 buffer_strength = 0;
+ u32 tmp, pllctl, pmuctl;
+ unsigned int i;
+
+ if (bus->chip_id == 0x4312) {
+ /* We do not touch the BCM4312 PLL and assume
+ * the default crystal settings work out-of-the-box. */
+ cc->pmu.crystalfreq = 20000;
+ return;
+ }
+
+ if (crystalfreq)
+ e = pmu1_plltab_find_entry(crystalfreq);
+ if (!e)
+ e = pmu1_plltab_find_entry(SSB_PMU1_DEFAULT_XTALFREQ);
+ BUG_ON(!e);
+ crystalfreq = e->freq;
+ cc->pmu.crystalfreq = e->freq;
+
+ /* Check if the PLL already is programmed to this frequency. */
+ pmuctl = chipco_read32(cc, SSB_CHIPCO_PMU_CTL);
+ if (((pmuctl & SSB_CHIPCO_PMU_CTL_XTALFREQ) >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT) == e->xf) {
+ /* We're already there... */
+ return;
+ }
+
+ ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
+ (crystalfreq / 1000), (crystalfreq % 1000));
+
+ /* First turn the PLL off. */
+ switch (bus->chip_id) {
+ case 0x4325:
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MINRES_MSK,
+ ~((1 << SSB_PMURES_4325_BBPLL_PWRSW_PU) |
+ (1 << SSB_PMURES_4325_HT_AVAIL)));
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MAXRES_MSK,
+ ~((1 << SSB_PMURES_4325_BBPLL_PWRSW_PU) |
+ (1 << SSB_PMURES_4325_HT_AVAIL)));
+ /* Adjust the BBPLL to 2 on all channels later. */
+ buffer_strength = 0x222222;
+ break;
+ default:
+ SSB_WARN_ON(1);
+ }
+ for (i = 1500; i; i--) {
+ tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
+ if (!(tmp & SSB_CHIPCO_CLKCTLST_HAVEHT))
+ break;
+ udelay(10);
+ }
+ tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
+ if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
+ ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
+
+ /* Set p1div and p2div. */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
+ pllctl &= ~(SSB_PMU1_PLLCTL0_P1DIV | SSB_PMU1_PLLCTL0_P2DIV);
+ pllctl |= ((u32)e->p1div << SSB_PMU1_PLLCTL0_P1DIV_SHIFT) & SSB_PMU1_PLLCTL0_P1DIV;
+ pllctl |= ((u32)e->p2div << SSB_PMU1_PLLCTL0_P2DIV_SHIFT) & SSB_PMU1_PLLCTL0_P2DIV;
+ ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, pllctl);
+
+ /* Set ndiv int and ndiv mode */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL2);
+ pllctl &= ~(SSB_PMU1_PLLCTL2_NDIVINT | SSB_PMU1_PLLCTL2_NDIVMODE);
+ pllctl |= ((u32)e->ndiv_int << SSB_PMU1_PLLCTL2_NDIVINT_SHIFT) & SSB_PMU1_PLLCTL2_NDIVINT;
+ pllctl |= (1 << SSB_PMU1_PLLCTL2_NDIVMODE_SHIFT) & SSB_PMU1_PLLCTL2_NDIVMODE;
+ ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, pllctl);
+
+ /* Set ndiv frac */
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL3);
+ pllctl &= ~SSB_PMU1_PLLCTL3_NDIVFRAC;
+ pllctl |= ((u32)e->ndiv_frac << SSB_PMU1_PLLCTL3_NDIVFRAC_SHIFT) & SSB_PMU1_PLLCTL3_NDIVFRAC;
+ ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, pllctl);
+
+ /* Change the drive strength, if required. */
+ if (buffer_strength) {
+ pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL5);
+ pllctl &= ~SSB_PMU1_PLLCTL5_CLKDRV;
+ pllctl |= (buffer_strength << SSB_PMU1_PLLCTL5_CLKDRV_SHIFT) & SSB_PMU1_PLLCTL5_CLKDRV;
+ ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, pllctl);
+ }
+
+ /* Tune the crystalfreq and the divisor. */
+ pmuctl = chipco_read32(cc, SSB_CHIPCO_PMU_CTL);
+ pmuctl &= ~(SSB_CHIPCO_PMU_CTL_ILP_DIV | SSB_CHIPCO_PMU_CTL_XTALFREQ);
+ pmuctl |= ((((u32)e->freq + 127) / 128 - 1) << SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT)
+ & SSB_CHIPCO_PMU_CTL_ILP_DIV;
+ pmuctl |= ((u32)e->xf << SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT) & SSB_CHIPCO_PMU_CTL_XTALFREQ;
+ chipco_write32(cc, SSB_CHIPCO_PMU_CTL, pmuctl);
+}
+
+static void ssb_pmu_pll_init(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */
+
+ if (bus->bustype == SSB_BUSTYPE_SSB) {
+ /* TODO: The user may override the crystal frequency. */
+ }
+
+ switch (bus->chip_id) {
+ case 0x4312:
+ case 0x4325:
+ ssb_pmu1_pllinit_r0(cc, crystalfreq);
+ break;
+ case 0x4328:
+ case 0x5354:
+ ssb_pmu0_pllinit_r0(cc, crystalfreq);
+ break;
+ default:
+ ssb_printk(KERN_ERR PFX
+ "ERROR: PLL init unknown for device %04X\n",
+ bus->chip_id);
+ }
+}
+
+struct pmu_res_updown_tab_entry {
+ u8 resource; /* The resource number */
+ u16 updown; /* The updown value */
+};
+
+enum pmu_res_depend_tab_task {
+ PMU_RES_DEP_SET = 1,
+ PMU_RES_DEP_ADD,
+ PMU_RES_DEP_REMOVE,
+};
+
+struct pmu_res_depend_tab_entry {
+ u8 resource; /* The resource number */
+ u8 task; /* SET | ADD | REMOVE */
+ u32 depend; /* The depend mask */
+};
+
+static const struct pmu_res_updown_tab_entry pmu_res_updown_tab_4328a0[] = {
+ { .resource = SSB_PMURES_4328_EXT_SWITCHER_PWM, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_BB_SWITCHER_PWM, .updown = 0x1F01, },
+ { .resource = SSB_PMURES_4328_BB_SWITCHER_BURST, .updown = 0x010F, },
+ { .resource = SSB_PMURES_4328_BB_EXT_SWITCHER_BURST, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_ILP_REQUEST, .updown = 0x0202, },
+ { .resource = SSB_PMURES_4328_RADIO_SWITCHER_PWM, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_RADIO_SWITCHER_BURST, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_ROM_SWITCH, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_PA_REF_LDO, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_RADIO_LDO, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_AFE_LDO, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_PLL_LDO, .updown = 0x0F01, },
+ { .resource = SSB_PMURES_4328_BG_FILTBYP, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_TX_FILTBYP, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_RX_FILTBYP, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_XTAL_PU, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_XTAL_EN, .updown = 0xA001, },
+ { .resource = SSB_PMURES_4328_BB_PLL_FILTBYP, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_RF_PLL_FILTBYP, .updown = 0x0101, },
+ { .resource = SSB_PMURES_4328_BB_PLL_PU, .updown = 0x0701, },
+};
+
+static const struct pmu_res_depend_tab_entry pmu_res_depend_tab_4328a0[] = {
+ {
+ /* Adjust ILP Request to avoid forcing EXT/BB into burst mode. */
+ .resource = SSB_PMURES_4328_ILP_REQUEST,
+ .task = PMU_RES_DEP_SET,
+ .depend = ((1 << SSB_PMURES_4328_EXT_SWITCHER_PWM) |
+ (1 << SSB_PMURES_4328_BB_SWITCHER_PWM)),
+ },
+};
+
+static const struct pmu_res_updown_tab_entry pmu_res_updown_tab_4325a0[] = {
+ { .resource = SSB_PMURES_4325_XTAL_PU, .updown = 0x1501, },
+};
+
+static const struct pmu_res_depend_tab_entry pmu_res_depend_tab_4325a0[] = {
+ {
+ /* Adjust HT-Available dependencies. */
+ .resource = SSB_PMURES_4325_HT_AVAIL,
+ .task = PMU_RES_DEP_ADD,
+ .depend = ((1 << SSB_PMURES_4325_RX_PWRSW_PU) |
+ (1 << SSB_PMURES_4325_TX_PWRSW_PU) |
+ (1 << SSB_PMURES_4325_LOGEN_PWRSW_PU) |
+ (1 << SSB_PMURES_4325_AFE_PWRSW_PU)),
+ },
+};
+
+static void ssb_pmu_resources_init(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ u32 min_msk = 0, max_msk = 0;
+ unsigned int i;
+ const struct pmu_res_updown_tab_entry *updown_tab = NULL;
+ unsigned int updown_tab_size;
+ const struct pmu_res_depend_tab_entry *depend_tab = NULL;
+ unsigned int depend_tab_size;
+
+ switch (bus->chip_id) {
+ case 0x4312:
+ /* We keep the default settings:
+ * min_msk = 0xCBB
+ * max_msk = 0x7FFFF
+ */
+ break;
+ case 0x4325:
+ /* Power OTP down later. */
+ min_msk = (1 << SSB_PMURES_4325_CBUCK_BURST) |
+ (1 << SSB_PMURES_4325_LNLDO2_PU);
+ if (chipco_read32(cc, SSB_CHIPCO_CHIPSTAT) &
+ SSB_CHIPCO_CHST_4325_PMUTOP_2B)
+ min_msk |= (1 << SSB_PMURES_4325_CLDO_CBUCK_BURST);
+ /* The PLL may turn on, if it decides so. */
+ max_msk = 0xFFFFF;
+ updown_tab = pmu_res_updown_tab_4325a0;
+ updown_tab_size = ARRAY_SIZE(pmu_res_updown_tab_4325a0);
+ depend_tab = pmu_res_depend_tab_4325a0;
+ depend_tab_size = ARRAY_SIZE(pmu_res_depend_tab_4325a0);
+ break;
+ case 0x4328:
+ min_msk = (1 << SSB_PMURES_4328_EXT_SWITCHER_PWM) |
+ (1 << SSB_PMURES_4328_BB_SWITCHER_PWM) |
+ (1 << SSB_PMURES_4328_XTAL_EN);
+ /* The PLL may turn on, if it decides so. */
+ max_msk = 0xFFFFF;
+ updown_tab = pmu_res_updown_tab_4328a0;
+ updown_tab_size = ARRAY_SIZE(pmu_res_updown_tab_4328a0);
+ depend_tab = pmu_res_depend_tab_4328a0;
+ depend_tab_size = ARRAY_SIZE(pmu_res_depend_tab_4328a0);
+ break;
+ case 0x5354:
+ /* The PLL may turn on, if it decides so. */
+ max_msk = 0xFFFFF;
+ break;
+ default:
+ ssb_printk(KERN_ERR PFX
+ "ERROR: PMU resource config unknown for device %04X\n",
+ bus->chip_id);
+ }
+
+ if (updown_tab) {
+ for (i = 0; i < updown_tab_size; i++) {
+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_TABSEL,
+ updown_tab[i].resource);
+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_UPDNTM,
+ updown_tab[i].updown);
+ }
+ }
+ if (depend_tab) {
+ for (i = 0; i < depend_tab_size; i++) {
+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_TABSEL,
+ depend_tab[i].resource);
+ switch (depend_tab[i].task) {
+ case PMU_RES_DEP_SET:
+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
+ depend_tab[i].depend);
+ break;
+ case PMU_RES_DEP_ADD:
+ chipco_set32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
+ depend_tab[i].depend);
+ break;
+ case PMU_RES_DEP_REMOVE:
+ chipco_mask32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
+ ~(depend_tab[i].depend));
+ break;
+ default:
+ SSB_WARN_ON(1);
+ }
+ }
+ }
+
+ /* Set the resource masks. */
+ if (min_msk)
+ chipco_write32(cc, SSB_CHIPCO_PMU_MINRES_MSK, min_msk);
+ if (max_msk)
+ chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk);
+}
+
+void ssb_pmu_init(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ u32 pmucap;
+
+ if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
+ return;
+
+ pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
+ cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
+
+ ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
+ cc->pmu.rev, pmucap);
+
+ if (cc->pmu.rev >= 1) {
+ if ((bus->chip_id == 0x4325) && (bus->chip_rev < 2)) {
+ chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
+ ~SSB_CHIPCO_PMU_CTL_NOILPONW);
+ } else {
+ chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
+ SSB_CHIPCO_PMU_CTL_NOILPONW);
+ }
+ }
+ ssb_pmu_pll_init(cc);
+ ssb_pmu_resources_init(cc);
+}
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -26,19 +26,6 @@ enum ssb_clksrc {
};
-static inline u32 chipco_read32(struct ssb_chipcommon *cc,
- u16 offset)
-{
- return ssb_read32(cc->dev, offset);
-}
-
-static inline void chipco_write32(struct ssb_chipcommon *cc,
- u16 offset,
- u32 value)
-{
- ssb_write32(cc->dev, offset, value);
-}
-
static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset,
u32 mask, u32 value)
{
@@ -246,6 +233,7 @@ void ssb_chipcommon_init(struct ssb_chip
{
if (!cc->dev)
return; /* We don't have a ChipCommon */
+ ssb_pmu_init(cc);
chipco_powercontrol_init(cc);
ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
calc_fast_powerup_delay(cc);
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -181,6 +181,16 @@
#define SSB_CHIPCO_PROG_WAITCNT 0x0124
#define SSB_CHIPCO_FLASH_CFG 0x0128
#define SSB_CHIPCO_FLASH_WAITCNT 0x012C
+#define SSB_CHIPCO_CLKCTLST 0x01E0 /* Clock control and status (rev >= 20) */
+#define SSB_CHIPCO_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
+#define SSB_CHIPCO_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
+#define SSB_CHIPCO_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
+#define SSB_CHIPCO_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
+#define SSB_CHIPCO_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
+#define SSB_CHIPCO_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
+#define SSB_CHIPCO_CLKCTLST_HAVEHT 0x00010000 /* HT available */
+#define SSB_CHIPCO_CLKCTLST_HAVEALP 0x00020000 /* APL available */
+#define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
#define SSB_CHIPCO_UART0_DATA 0x0300
#define SSB_CHIPCO_UART0_IMR 0x0304
#define SSB_CHIPCO_UART0_FCR 0x0308
@@ -197,6 +207,196 @@
#define SSB_CHIPCO_UART1_LSR 0x0414
#define SSB_CHIPCO_UART1_MSR 0x0418
#define SSB_CHIPCO_UART1_SCRATCH 0x041C
+/* PMU registers (rev >= 20) */
+#define SSB_CHIPCO_PMU_CTL 0x0600 /* PMU control */
+#define SSB_CHIPCO_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
+#define SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT 16
+#define SSB_CHIPCO_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
+#define SSB_CHIPCO_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
+#define SSB_CHIPCO_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */
+#define SSB_CHIPCO_PMU_CTL_XTALFREQ 0x0000007C /* Crystal freq */
+#define SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT 2
+#define SSB_CHIPCO_PMU_CTL_ILPDIVEN 0x00000002 /* ILP div enable */
+#define SSB_CHIPCO_PMU_CTL_LPOSEL 0x00000001 /* LPO sel */
+#define SSB_CHIPCO_PMU_CAP 0x0604 /* PMU capabilities */
+#define SSB_CHIPCO_PMU_CAP_REVISION 0x000000FF /* Revision mask */
+#define SSB_CHIPCO_PMU_STAT 0x0608 /* PMU status */
+#define SSB_CHIPCO_PMU_STAT_INTPEND 0x00000040 /* Interrupt pending */
+#define SSB_CHIPCO_PMU_STAT_SBCLKST 0x00000030 /* Backplane clock status? */
+#define SSB_CHIPCO_PMU_STAT_HAVEALP 0x00000008 /* ALP available */
+#define SSB_CHIPCO_PMU_STAT_HAVEHT 0x00000004 /* HT available */
+#define SSB_CHIPCO_PMU_STAT_RESINIT 0x00000003 /* Res init */
+#define SSB_CHIPCO_PMU_RES_STAT 0x060C /* PMU res status */
+#define SSB_CHIPCO_PMU_RES_PEND 0x0610 /* PMU res pending */
+#define SSB_CHIPCO_PMU_TIMER 0x0614 /* PMU timer */
+#define SSB_CHIPCO_PMU_MINRES_MSK 0x0618 /* PMU min res mask */
+#define SSB_CHIPCO_PMU_MAXRES_MSK 0x061C /* PMU max res mask */
+#define SSB_CHIPCO_PMU_RES_TABSEL 0x0620 /* PMU res table sel */
+#define SSB_CHIPCO_PMU_RES_DEPMSK 0x0624 /* PMU res dep mask */
+#define SSB_CHIPCO_PMU_RES_UPDNTM 0x0628 /* PMU res updown timer */
+#define SSB_CHIPCO_PMU_RES_TIMER 0x062C /* PMU res timer */
+#define SSB_CHIPCO_PMU_CLKSTRETCH 0x0630 /* PMU clockstretch */
+#define SSB_CHIPCO_PMU_WATCHDOG 0x0634 /* PMU watchdog */
+#define SSB_CHIPCO_PMU_RES_REQTS 0x0640 /* PMU res req timer sel */
+#define SSB_CHIPCO_PMU_RES_REQT 0x0644 /* PMU res req timer */
+#define SSB_CHIPCO_PMU_RES_REQM 0x0648 /* PMU res req mask */
+#define SSB_CHIPCO_CHIPCTL_ADDR 0x0650
+#define SSB_CHIPCO_CHIPCTL_DATA 0x0654
+#define SSB_CHIPCO_REGCTL_ADDR 0x0658
+#define SSB_CHIPCO_REGCTL_DATA 0x065C
+#define SSB_CHIPCO_PLLCTL_ADDR 0x0660
+#define SSB_CHIPCO_PLLCTL_DATA 0x0664
+
+
+
+/** PMU PLL registers */
+
+/* PMU rev 0 PLL registers */
+#define SSB_PMU0_PLLCTL0 0
+#define SSB_PMU0_PLLCTL0_PDIV_MSK 0x00000001
+#define SSB_PMU0_PLLCTL0_PDIV_FREQ 25000 /* kHz */
+#define SSB_PMU0_PLLCTL1 1
+#define SSB_PMU0_PLLCTL1_WILD_IMSK 0xF0000000 /* Wild int mask (low nibble) */
+#define SSB_PMU0_PLLCTL1_WILD_IMSK_SHIFT 28
+#define SSB_PMU0_PLLCTL1_WILD_FMSK 0x0FFFFF00 /* Wild frac mask */
+#define SSB_PMU0_PLLCTL1_WILD_FMSK_SHIFT 8
+#define SSB_PMU0_PLLCTL1_STOPMOD 0x00000040 /* Stop mod */
+#define SSB_PMU0_PLLCTL2 2
+#define SSB_PMU0_PLLCTL2_WILD_IMSKHI 0x0000000F /* Wild int mask (high nibble) */
+#define SSB_PMU0_PLLCTL2_WILD_IMSKHI_SHIFT 0
+
+/* PMU rev 1 PLL registers */
+#define SSB_PMU1_PLLCTL0 0
+#define SSB_PMU1_PLLCTL0_P1DIV 0x00F00000 /* P1 div */
+#define SSB_PMU1_PLLCTL0_P1DIV_SHIFT 20
+#define SSB_PMU1_PLLCTL0_P2DIV 0x0F000000 /* P2 div */
+#define SSB_PMU1_PLLCTL0_P2DIV_SHIFT 24
+#define SSB_PMU1_PLLCTL1 1
+#define SSB_PMU1_PLLCTL1_M1DIV 0x000000FF /* M1 div */
+#define SSB_PMU1_PLLCTL1_M1DIV_SHIFT 0
+#define SSB_PMU1_PLLCTL1_M2DIV 0x0000FF00 /* M2 div */
+#define SSB_PMU1_PLLCTL1_M2DIV_SHIFT 8
+#define SSB_PMU1_PLLCTL1_M3DIV 0x00FF0000 /* M3 div */
+#define SSB_PMU1_PLLCTL1_M3DIV_SHIFT 16
+#define SSB_PMU1_PLLCTL1_M4DIV 0xFF000000 /* M4 div */
+#define SSB_PMU1_PLLCTL1_M4DIV_SHIFT 24
+#define SSB_PMU1_PLLCTL2 2
+#define SSB_PMU1_PLLCTL2_M5DIV 0x000000FF /* M5 div */
+#define SSB_PMU1_PLLCTL2_M5DIV_SHIFT 0
+#define SSB_PMU1_PLLCTL2_M6DIV 0x0000FF00 /* M6 div */
+#define SSB_PMU1_PLLCTL2_M6DIV_SHIFT 8
+#define SSB_PMU1_PLLCTL2_NDIVMODE 0x000E0000 /* NDIV mode */
+#define SSB_PMU1_PLLCTL2_NDIVMODE_SHIFT 17
+#define SSB_PMU1_PLLCTL2_NDIVINT 0x1FF00000 /* NDIV int */
+#define SSB_PMU1_PLLCTL2_NDIVINT_SHIFT 20
+#define SSB_PMU1_PLLCTL3 3
+#define SSB_PMU1_PLLCTL3_NDIVFRAC 0x00FFFFFF /* NDIV frac */
+#define SSB_PMU1_PLLCTL3_NDIVFRAC_SHIFT 0
+#define SSB_PMU1_PLLCTL4 4
+#define SSB_PMU1_PLLCTL5 5
+#define SSB_PMU1_PLLCTL5_CLKDRV 0xFFFFFF00 /* clk drv */
+#define SSB_PMU1_PLLCTL5_CLKDRV_SHIFT 8
+
+/* BCM4312 PLL resource numbers. */
+#define SSB_PMURES_4312_SWITCHER_BURST 0
+#define SSB_PMURES_4312_SWITCHER_PWM 1
+#define SSB_PMURES_4312_PA_REF_LDO 2
+#define SSB_PMURES_4312_CORE_LDO_BURST 3
+#define SSB_PMURES_4312_CORE_LDO_PWM 4
+#define SSB_PMURES_4312_RADIO_LDO 5
+#define SSB_PMURES_4312_ILP_REQUEST 6
+#define SSB_PMURES_4312_BG_FILTBYP 7
+#define SSB_PMURES_4312_TX_FILTBYP 8
+#define SSB_PMURES_4312_RX_FILTBYP 9
+#define SSB_PMURES_4312_XTAL_PU 10
+#define SSB_PMURES_4312_ALP_AVAIL 11
+#define SSB_PMURES_4312_BB_PLL_FILTBYP 12
+#define SSB_PMURES_4312_RF_PLL_FILTBYP 13
+#define SSB_PMURES_4312_HT_AVAIL 14
+
+/* BCM4325 PLL resource numbers. */
+#define SSB_PMURES_4325_BUCK_BOOST_BURST 0
+#define SSB_PMURES_4325_CBUCK_BURST 1
+#define SSB_PMURES_4325_CBUCK_PWM 2
+#define SSB_PMURES_4325_CLDO_CBUCK_BURST 3
+#define SSB_PMURES_4325_CLDO_CBUCK_PWM 4
+#define SSB_PMURES_4325_BUCK_BOOST_PWM 5
+#define SSB_PMURES_4325_ILP_REQUEST 6
+#define SSB_PMURES_4325_ABUCK_BURST 7
+#define SSB_PMURES_4325_ABUCK_PWM 8
+#define SSB_PMURES_4325_LNLDO1_PU 9
+#define SSB_PMURES_4325_LNLDO2_PU 10
+#define SSB_PMURES_4325_LNLDO3_PU 11
+#define SSB_PMURES_4325_LNLDO4_PU 12
+#define SSB_PMURES_4325_XTAL_PU 13
+#define SSB_PMURES_4325_ALP_AVAIL 14
+#define SSB_PMURES_4325_RX_PWRSW_PU 15
+#define SSB_PMURES_4325_TX_PWRSW_PU 16
+#define SSB_PMURES_4325_RFPLL_PWRSW_PU 17
+#define SSB_PMURES_4325_LOGEN_PWRSW_PU 18
+#define SSB_PMURES_4325_AFE_PWRSW_PU 19
+#define SSB_PMURES_4325_BBPLL_PWRSW_PU 20
+#define SSB_PMURES_4325_HT_AVAIL 21
+
+/* BCM4328 PLL resource numbers. */
+#define SSB_PMURES_4328_EXT_SWITCHER_PWM 0
+#define SSB_PMURES_4328_BB_SWITCHER_PWM 1
+#define SSB_PMURES_4328_BB_SWITCHER_BURST 2
+#define SSB_PMURES_4328_BB_EXT_SWITCHER_BURST 3
+#define SSB_PMURES_4328_ILP_REQUEST 4
+#define SSB_PMURES_4328_RADIO_SWITCHER_PWM 5
+#define SSB_PMURES_4328_RADIO_SWITCHER_BURST 6
+#define SSB_PMURES_4328_ROM_SWITCH 7
+#define SSB_PMURES_4328_PA_REF_LDO 8
+#define SSB_PMURES_4328_RADIO_LDO 9
+#define SSB_PMURES_4328_AFE_LDO 10
+#define SSB_PMURES_4328_PLL_LDO 11
+#define SSB_PMURES_4328_BG_FILTBYP 12
+#define SSB_PMURES_4328_TX_FILTBYP 13
+#define SSB_PMURES_4328_RX_FILTBYP 14
+#define SSB_PMURES_4328_XTAL_PU 15
+#define SSB_PMURES_4328_XTAL_EN 16
+#define SSB_PMURES_4328_BB_PLL_FILTBYP 17
+#define SSB_PMURES_4328_RF_PLL_FILTBYP 18
+#define SSB_PMURES_4328_BB_PLL_PU 19
+
+/* BCM5354 PLL resource numbers. */
+#define SSB_PMURES_5354_EXT_SWITCHER_PWM 0
+#define SSB_PMURES_5354_BB_SWITCHER_PWM 1
+#define SSB_PMURES_5354_BB_SWITCHER_BURST 2
+#define SSB_PMURES_5354_BB_EXT_SWITCHER_BURST 3
+#define SSB_PMURES_5354_ILP_REQUEST 4
+#define SSB_PMURES_5354_RADIO_SWITCHER_PWM 5
+#define SSB_PMURES_5354_RADIO_SWITCHER_BURST 6
+#define SSB_PMURES_5354_ROM_SWITCH 7
+#define SSB_PMURES_5354_PA_REF_LDO 8
+#define SSB_PMURES_5354_RADIO_LDO 9
+#define SSB_PMURES_5354_AFE_LDO 10
+#define SSB_PMURES_5354_PLL_LDO 11
+#define SSB_PMURES_5354_BG_FILTBYP 12
+#define SSB_PMURES_5354_TX_FILTBYP 13
+#define SSB_PMURES_5354_RX_FILTBYP 14
+#define SSB_PMURES_5354_XTAL_PU 15
+#define SSB_PMURES_5354_XTAL_EN 16
+#define SSB_PMURES_5354_BB_PLL_FILTBYP 17
+#define SSB_PMURES_5354_RF_PLL_FILTBYP 18
+#define SSB_PMURES_5354_BB_PLL_PU 19
+
+
+
+/** Chip specific Chip-Status register contents. */
+#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
+#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
+#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
+#define SSB_CHIPCO_CHST_4325_OTP_SEL 2 /* OTP is powered up, no SPROM */
+#define SSB_CHIPCO_CHST_4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
+#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE 0x00000004
+#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE_SHIFT 2
+#define SSB_CHIPCO_CHST_4325_RCAL_VALID 0x00000008
+#define SSB_CHIPCO_CHST_4325_RCAL_VALID_SHIFT 3
+#define SSB_CHIPCO_CHST_4325_RCAL_VALUE 0x000001F0
+#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
+#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
@@ -353,11 +553,20 @@
struct ssb_device;
struct ssb_serial_port;
+/* Data for the PMU, if available.
+ * Check availability with ((struct ssb_chipcommon)->capabilities & SSB_CHIPCO_CAP_PMU)
+ */
+struct ssb_chipcommon_pmu {
+ u8 rev; /* PMU revision */
+ u32 crystalfreq; /* The active crystal frequency (in kHz) */
+};
+
struct ssb_chipcommon {
struct ssb_device *dev;
u32 capabilities;
/* Fast Powerup Delay constant */
u16 fast_pwrup_delay;
+ struct ssb_chipcommon_pmu pmu;
};
static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
@@ -365,6 +574,17 @@ static inline bool ssb_chipco_available(
return (cc->dev != NULL);
}
+/* Register access */
+#define chipco_read32(cc, offset) ssb_read32((cc)->dev, offset)
+#define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val)
+
+#define chipco_mask32(cc, offset, mask) \
+ chipco_write32(cc, offset, chipco_read32(cc, offset) & (mask))
+#define chipco_set32(cc, offset, set) \
+ chipco_write32(cc, offset, chipco_read32(cc, offset) | (set))
+#define chipco_maskset32(cc, offset, mask, set) \
+ chipco_write32(cc, offset, (chipco_read32(cc, offset) & (mask)) | (set))
+
extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc);
@@ -406,4 +626,8 @@ extern int ssb_chipco_serial_init(struct
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
+/* PMU support */
+extern void ssb_pmu_init(struct ssb_chipcommon *cc);
+
+
#endif /* LINUX_SSB_CHIPCO_H_ */

17
target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch Normal file
View File

@@ -0,0 +1,17 @@
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
break;
}
+ /* Ignoring the last page when ddr size is 128M. Cached
+ * accesses to last page is causing the processor to prefetch
+ * using address above 128M stepping out of the ddr address
+ * space.
+ */
+ if (mem == 0x8000000)
+ mem -= 0x1000;
+
add_memory_region(0, mem, BOOT_MEM_RAM);
}

17
target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch Normal file
View File

@@ -0,0 +1,17 @@
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
break;
}
+ /* Ignoring the last page when ddr size is 128M. Cached
+ * accesses to last page is causing the processor to prefetch
+ * using address above 128M stepping out of the ddr address
+ * space.
+ */
+ if (mem == 0x8000000)
+ mem -= 0x1000;
+
add_memory_region(0, mem, BOOT_MEM_RAM);
}

16
target/linux/brcm47xx/profiles/WRT350Nv1.mk Normal file
View File

@@ -0,0 +1,16 @@
#
# Copyright (C) 2009 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/WRT350Nv1
NAME:=Linksys WRT350Nv1
PACKAGES:=kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-ssb-gige kmod-ocf-ubsec-ssb
endef
define Profile/WRT350Nv1/Description
Package set compatible with the Linksys WRT350Nv1. Contains USB support
endef
$(eval $(call Profile,WRT350Nv1))

205
target/linux/brcm63xx/config-2.6.27
View File

@@ -1,205 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AUDIT=y
CONFIG_AUDIT_GENERIC=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BCM63XX=y
CONFIG_BCM63XX_CPU_6338=y
CONFIG_BCM63XX_CPU_6345=y
CONFIG_BCM63XX_CPU_6348=y
CONFIG_BCM63XX_CPU_6358=y
CONFIG_BCM63XX_ENET=y
CONFIG_BCM63XX_PHY=y
CONFIG_BCM63XX_WDT=y
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_IO_TRACE=y
CONFIG_BOARD_BCM963XX=y
# CONFIG_BOARD_LIVEBOX is not set
# CONFIG_BSD_DISKLABEL is not set
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRAMFS=y
CONFIG_CSRC_R4K=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVICE=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_ARCH_TRACEHOOK is not set
# CONFIG_HAVE_CLK is not set
# CONFIG_HAVE_DMA_ATTRS is not set
# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
# CONFIG_HAVE_IOREMAP_PROT is not set
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LBD=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_BCM963XX=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_BE_BYTE_SWAP=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_NOSWAP is not set
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_POSIX_MQUEUE=y
# CONFIG_PROBE_INITRD_HEADER is not set
# CONFIG_R6040 is not set
CONFIG_RELAY=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_SQUASHFS_VMALLOC=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_SPROM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_SUPPORT=y
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_ZONE_DMA_FLAG=0

203
target/linux/brcm63xx/config-2.6.28
View File

@@ -1,203 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AUDIT=y
CONFIG_AUDIT_GENERIC=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM47XX is not set
CONFIG_BCM63XX=y
CONFIG_BCM63XX_CPU_6338=y
CONFIG_BCM63XX_CPU_6345=y
CONFIG_BCM63XX_CPU_6348=y
CONFIG_BCM63XX_CPU_6358=y
CONFIG_BCM63XX_ENET=y
CONFIG_BCM63XX_PHY=y
CONFIG_BCM63XX_WDT=y
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_IO_TRACE=y
CONFIG_BOARD_BCM963XX=y
# CONFIG_BOARD_LIVEBOX is not set
# CONFIG_BSD_DISKLABEL is not set
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRAMFS=y
CONFIG_CSRC_R4K=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVICE=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LBD=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_EMMA is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_BCM963XX=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_BE_BYTE_SWAP=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_NOSWAP is not set
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
# CONFIG_NATSEMI is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_POSIX_MQUEUE=y
# CONFIG_PROBE_INITRD_HEADER is not set
# CONFIG_R6040 is not set
CONFIG_RELAY=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_SQUASHFS_VMALLOC=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
# CONFIG_SSB_DRIVER_MIPS is not set
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_SPROM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_SUPPORT=y
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_ZONE_DMA_FLAG=0

43
target/linux/brcm63xx/config-2.6.30
View File

@@ -7,11 +7,9 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AUDIT=y
CONFIG_AUDIT_GENERIC=y
CONFIG_BASE_SMALL=0
CONFIG_AUDIT=y
# CONFIG_BCM47XX is not set
CONFIG_BCM63XX=y
CONFIG_BCM63XX_CPU_6338=y
CONFIG_BCM63XX_CPU_6345=y
CONFIG_BCM63XX_CPU_6348=y
@@ -19,6 +17,7 @@ CONFIG_BCM63XX_CPU_6358=y
CONFIG_BCM63XX_ENET=y
CONFIG_BCM63XX_PHY=y
CONFIG_BCM63XX_WDT=y
CONFIG_BCM63XX=y
CONFIG_BINARY_PRINTF=y
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_IO_TRACE=y
@@ -28,8 +27,8 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
@@ -38,9 +37,9 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@@ -69,8 +68,8 @@ CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
@@ -80,15 +79,15 @@ CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
# CONFIG_FTRACE_STARTUP_TEST is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVICE=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDWARE_WATCHPOINTS=y
@@ -102,13 +101,12 @@ CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
# CONFIG_I2C is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INOTIFY=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_IRQ_CPU=y
@@ -126,9 +124,7 @@ CONFIG_LEDS_GPIO=y
# CONFIG_MACH_VR41XX is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_FPU_EMU is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
@@ -136,6 +132,7 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_BCM963XX=y
@@ -148,33 +145,30 @@ CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
# CONFIG_NATSEMI is not set
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_NET_DROP_MONITOR is not set
CONFIG_NOP_TRACER=y
# CONFIG_NO_IOPORT is not set
CONFIG_NOP_TRACER=y
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RELAY=y
CONFIG_RING_BUFFER=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
CONFIG_SERIAL_BCM63XX=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@@ -189,14 +183,14 @@ CONFIG_SERIAL_BCM63XX_CONSOLE=y
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
# CONFIG_SSB_DRIVER_MIPS is not set
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_SPROM=y
CONFIG_SSB=y
CONFIG_STACKTRACE=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
@@ -205,10 +199,9 @@ CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TICK_ONESHOT=y
CONFIG_TRACEPOINTS=y
CONFIG_TRACING=y
CONFIG_TRACING_SUPPORT=y
CONFIG_TRACING=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y

17
target/linux/brcm63xx/files/arch/mips/bcm63xx/boards/board_bcm963xx.c
View File

@@ -418,7 +418,23 @@ static struct board_info __initdata board_96348gw_a = {
.has_ohci0 = 1,
};
static struct board_info __initdata board_rta1025w_16 = {
.name = "RTA1025W_16",
.expected_cpu_id = 0x6348,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
.enet0 = {
.has_phy = 1,
.use_internal_phy = 1,
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
};
#endif
/*
@@ -586,6 +602,7 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
&board_FAST2404,
&board_DV201AMR,
&board_96348gw_a,
&board_rta1025w_16,
#endif
#ifdef CONFIG_BCM63XX_CPU_6358

11
target/linux/brcm63xx/files/drivers/mtd/maps/bcm963xx-flash.c
View File

@@ -199,8 +199,15 @@ static int parse_cfe_partitions( struct mtd_info *master, struct mtd_partition *
}
if (!tagid_match) {
printk(KERN_ERR PFX "Failed to find a valid tag id\n");
return -EIO;
tagid = "bcram";
sscanf(buf->bccfe.rootAddress,"%u", &rootfsaddr);
sscanf(buf->bccfe.rootLength, "%u", &rootfslen);
sscanf(buf->bccfe.kernelAddress, "%u", &kerneladdr);
sscanf(buf->bccfe.kernelLength, "%u", &kernellen);
sscanf(buf->bccfe.totalLength, "%u", &totallen);
tagidcrc = *(uint32_t *)&(buf->bccfe.tagIdCRC[0]);
tagversion = &(buf->bccfe.tagVersion[0]);
boardid = &(buf->bccfe.boardid[0]);
}
printk(KERN_INFO PFX "CFE boot tag found with version %s, board type %s, and tagid %s.\n",tagversion,boardid,tagid);

1
target/linux/brcm63xx/image/Makefile
View File

@@ -94,7 +94,6 @@ define Image/Prepare
endef
define Image/Build
$(STAGING_DIR_HOST)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1)) -f $(KDIR)/root.$(1)
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-root.$(1) bs=128k conv=sync
# Various routers
$(call Image/Build/CFE,$(1),96345GW2,6345,bccfe,,bccfe,)

100
target/linux/brcm63xx/patches-2.6.27/001-add_broadcom_63xx_cpu_definitions.patch
View File

@@ -1,100 +0,0 @@
From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Fri, 18 Jul 2008 15:53:08 +0200
Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
---
arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++
arch/mips/mm/tlbex.c | 4 ++++
include/asm-mips/cpu.h | 7 +++++++
3 files changed, 36 insertions(+), 0 deletions(-)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -153,6 +153,9 @@ void __init check_wait(void)
case CPU_25KF:
case CPU_PR4450:
case CPU_BCM3302:
+ case CPU_BCM6338:
+ case CPU_BCM6348:
+ case CPU_BCM6358:
cpu_wait = r4k_wait;
break;
@@ -802,11 +805,28 @@ static inline void cpu_probe_broadcom(st
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_BCM3302:
+ /* same as PRID_IMP_BCM6338 */
c->cputype = CPU_BCM3302;
break;
case PRID_IMP_BCM4710:
c->cputype = CPU_BCM4710;
break;
+ case PRID_IMP_BCM6345:
+ c->cputype = CPU_BCM6345;
+ break;
+ case PRID_IMP_BCM6348:
+ c->cputype = CPU_BCM6348;
+ break;
+ case PRID_IMP_BCM4350:
+ switch (c->processor_id & 0xf0) {
+ case PRID_REV_BCM6358:
+ c->cputype = CPU_BCM6358;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+ break;
default:
c->cputype = CPU_UNKNOWN;
break;
@@ -892,6 +912,10 @@ static __cpuinit const char *cpu_to_name
case CPU_SR71000: name = "Sandcraft SR71000"; break;
case CPU_BCM3302: name = "Broadcom BCM3302"; break;
case CPU_BCM4710: name = "Broadcom BCM4710"; break;
+ case CPU_BCM6338: name = "Broadcom BCM6338"; break;
+ case CPU_BCM6345: name = "Broadcom BCM6345"; break;
+ case CPU_BCM6348: name = "Broadcom BCM6348"; break;
+ case CPU_BCM6358: name = "Broadcom BCM6358"; break;
case CPU_PR4450: name = "Philips PR4450"; break;
case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
default:
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -317,6 +317,10 @@ static void __cpuinit build_tlb_write_en
case CPU_BCM3302:
case CPU_BCM4710:
case CPU_LOONGSON2:
+ case CPU_BCM6338:
+ case CPU_BCM6345:
+ case CPU_BCM6348:
+ case CPU_BCM6358:
if (m4kc_tlbp_war())
uasm_i_nop(p);
tlbw(p);
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -112,6 +112,12 @@
#define PRID_IMP_BCM4710 0x4000
#define PRID_IMP_BCM3302 0x9000
+#define PRID_IMP_BCM6338 0x9000
+#define PRID_IMP_BCM6345 0x8000
+#define PRID_IMP_BCM6348 0x9100
+#define PRID_IMP_BCM4350 0xA000
+#define PRID_REV_BCM6358 0x0010
+#define PRID_REV_BCM6368 0x0030
/*
* Definitions for 7:0 on legacy processors
@@ -198,6 +204,7 @@ enum cpu_type_enum {
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
+ CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
/*
* MIPS64 class processors

122
target/linux/brcm63xx/patches-2.6.27/002-add_support_for_broadcom_63xx_cpus.patch
View File

@@ -1,122 +0,0 @@
From 0713aadd2a4e543b69022aa40bdec3e1dc5bc1e5 Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Mon, 18 Aug 2008 13:56:57 +0200
Subject: [PATCH] [MIPS] BCM63XX: Add support for Broadcom 63xx CPUs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
---
arch/mips/Kconfig | 16 +
arch/mips/Makefile | 7 +
arch/mips/bcm63xx/Kconfig | 9 +
arch/mips/bcm63xx/Makefile | 2 +
arch/mips/bcm63xx/clk.c | 220 ++++++
arch/mips/bcm63xx/cpu.c | 245 +++++++
arch/mips/bcm63xx/cs.c | 144 ++++
arch/mips/bcm63xx/early_printk.c | 30 +
arch/mips/bcm63xx/gpio.c | 98 +++
arch/mips/bcm63xx/irq.c | 253 +++++++
arch/mips/bcm63xx/prom.c | 43 ++
arch/mips/bcm63xx/setup.c | 108 +++
arch/mips/bcm63xx/timer.c | 205 ++++++
include/asm-mips/fixmap.h | 4 +
include/asm-mips/mach-bcm63xx/bcm63xx_clk.h | 11 +
include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h | 314 +++++++++
include/asm-mips/mach-bcm63xx/bcm63xx_cs.h | 10 +
include/asm-mips/mach-bcm63xx/bcm63xx_gpio.h | 14 +
include/asm-mips/mach-bcm63xx/bcm63xx_io.h | 93 +++
include/asm-mips/mach-bcm63xx/bcm63xx_irq.h | 15 +
include/asm-mips/mach-bcm63xx/bcm63xx_regs.h | 728 ++++++++++++++++++++
include/asm-mips/mach-bcm63xx/bcm63xx_timer.h | 11 +
.../asm-mips/mach-bcm63xx/cpu-feature-overrides.h | 51 ++
include/asm-mips/mach-bcm63xx/gpio.h | 52 ++
include/asm-mips/mach-bcm63xx/war.h | 25 +
25 files changed, 2708 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/bcm63xx/Kconfig
create mode 100644 arch/mips/bcm63xx/Makefile
create mode 100644 arch/mips/bcm63xx/clk.c
create mode 100644 arch/mips/bcm63xx/cpu.c
create mode 100644 arch/mips/bcm63xx/cs.c
create mode 100644 arch/mips/bcm63xx/early_printk.c
create mode 100644 arch/mips/bcm63xx/gpio.c
create mode 100644 arch/mips/bcm63xx/irq.c
create mode 100644 arch/mips/bcm63xx/prom.c
create mode 100644 arch/mips/bcm63xx/setup.c
create mode 100644 arch/mips/bcm63xx/timer.c
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_clk.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_cs.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_gpio.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_io.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_irq.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_regs.h
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_timer.h
create mode 100644 include/asm-mips/mach-bcm63xx/cpu-feature-overrides.h
create mode 100644 include/asm-mips/mach-bcm63xx/gpio.h
create mode 100644 include/asm-mips/mach-bcm63xx/war.h
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -59,6 +59,21 @@ config BCM47XX
help
Support for BCM47XX based boards
+config BCM63XX
+ bool "Broadcom 63xx based boards"
+ select CEVT_R4K
+ select CSRC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_EARLY_PRINTK
+ select SWAP_IO_SPACE
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Support for BCM63XX based boards
+
config MIPS_COBALT
bool "Cobalt Server"
select CEVT_R4K
@@ -600,6 +615,7 @@ endchoice
source "arch/mips/au1000/Kconfig"
source "arch/mips/basler/excite/Kconfig"
+source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -540,6 +540,13 @@ cflags-$(CONFIG_BCM47XX) += -Iinclude/as
load-$(CONFIG_BCM47XX) := 0xffffffff80001000
#
+# Broadcom BCM63XX boards
+#
+core-$(CONFIG_BCM63XX) += arch/mips/bcm63xx/
+cflags-$(CONFIG_BCM63XX) += -Iinclude/asm-mips/mach-bcm63xx/
+load-$(CONFIG_BCM63XX) := 0xffffffff80010000
+
+#
# SNI RM
#
core-$(CONFIG_SNI_RM) += arch/mips/sni/
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -67,11 +67,15 @@ enum fixed_addresses {
* the start of the fixmap, and leave one page empty
* at the top of mem..
*/
+#ifdef CONFIG_BCM63XX
+#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000)
+#else
#if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX)
#define FIXADDR_TOP ((unsigned long)(long)(int)(0xff000000 - 0x20000))
#else
#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
#endif
+#endif
#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)

66
target/linux/brcm63xx/patches-2.6.27/003-add_serial_driver_for_bcm63xx_integr.patch
View File

@@ -1,66 +0,0 @@
From 6c489656b09998ed6a6f857e01ccf630e29358dd Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Fri, 18 Jul 2008 19:35:55 +0200
Subject: [PATCH] [MIPS] BCM63XX: Add serial driver for bcm63xx integrated UART.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
---
arch/mips/bcm63xx/Makefile | 1 +
arch/mips/bcm63xx/dev-uart.c | 41 +
drivers/serial/Kconfig | 19 +
drivers/serial/Makefile | 1 +
drivers/serial/bcm63xx_uart.c | 890 ++++++++++++++++++++++
include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h | 6 +
include/linux/serial_core.h | 2 +
7 files changed, 960 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/bcm63xx/dev-uart.c
create mode 100644 drivers/serial/bcm63xx_uart.c
create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -1421,4 +1421,23 @@ config SPORT_BAUD_RATE
default 19200 if (SERIAL_SPORT_BAUD_RATE_19200)
default 9600 if (SERIAL_SPORT_BAUD_RATE_9600)
+config SERIAL_BCM63XX
+ tristate "bcm63xx serial port support"
+ select SERIAL_CORE
+ depends on BCM63XX
+ help
+ If you have a bcm63xx CPU, you can enable its onboard
+ serial port by enabling this options.
+
+ To compile this driver as a module, choose M here: the
+ module will be called bcm963xx_uart.
+
+config SERIAL_BCM63XX_CONSOLE
+ bool "Console on bcm63xx serial port"
+ depends on SERIAL_BCM63XX
+ select SERIAL_CORE_CONSOLE
+ help
+ If you have enabled the serial port on the bcm63xx CPU
+ you can make it the console by answering Y to this option.
+
endmenu
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711
obj-$(CONFIG_SERIAL_PXA) += pxa.o
obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o
obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
+obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o
obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -155,6 +155,8 @@
#define PORT_SC26XX 82
+#define PORT_BCM63XX 83
+
#ifdef __KERNEL__
#include <linux/compiler.h>

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