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[ar7] handle new revisions of vlynq wrt reset sequence, patch from sn9
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24139 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -1,20 +1,306 @@
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--- a/drivers/vlynq/vlynq.c
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+++ b/drivers/vlynq/vlynq.c
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@@ -514,9 +514,14 @@ static int __vlynq_enable_device(struct
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!__vlynq_try_external(dev))
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return 0;
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Index: linux-2.6.32.26/drivers/vlynq/vlynq.c
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===================================================================
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--- linux-2.6.32.26.orig/drivers/vlynq/vlynq.c 2010-11-24 13:01:20.459985351 -0800
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+++ linux-2.6.32.26/drivers/vlynq/vlynq.c 2010-11-24 13:01:43.537494084 -0800
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@@ -103,6 +103,12 @@
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}
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#endif
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+u32 __vlynq_rev_reg(struct vlynq_regs *regs)
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+{
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+ return readl(®s->revision);
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+}
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+EXPORT_SYMBOL(__vlynq_rev_reg);
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+
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/* Check the VLYNQ link status with a given device */
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static int vlynq_linked(struct vlynq_device *dev)
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{
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@@ -117,20 +123,43 @@
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return 0;
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}
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+static volatile int vlynq_delay_value_new = 0;
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+
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+static void vlynq_delay_wait(u32 count)
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+{
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+ /* Code adopted from original vlynq driver */
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+ int i = 0;
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+ volatile int *ptr = &vlynq_delay_value_new;
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+ *ptr = 0;
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+
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+ /* We are assuming that the each cycle takes about
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+ * 23 assembly instructions. */
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+ for(i = 0; i < (count + 23)/23; i++)
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+ *ptr = *ptr + 1;
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+}
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+
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static void vlynq_reset(struct vlynq_device *dev)
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{
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+ u32 rtm = readl(&dev->local->revision);
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+
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+ if (rtm < 0x00010200)
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+ return;
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+
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+ rtm = rtm < 0x00010205 || readl(&dev->local->status) & 0x800 == 0 ?
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+ 0 : 0x600000;
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+
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writel(readl(&dev->local->control) | VLYNQ_CTRL_RESET,
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&dev->local->control);
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/* Wait for the devices to finish resetting */
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- msleep(5);
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+ vlynq_delay_wait(0xffffff);
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/* Remove reset bit */
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- writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET,
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+ writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET | rtm,
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&dev->local->control);
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/* Give some time for the devices to settle */
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- msleep(5);
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+ vlynq_delay_wait(0xffffff);
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}
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static void vlynq_irq_unmask(unsigned int irq)
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@@ -379,6 +408,62 @@
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}
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EXPORT_SYMBOL(vlynq_unregister_driver);
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+enum vlynq_clk_src {
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+ vlynq_clk_external,
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+ vlynq_clk_local,
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+ vlynq_clk_remote,
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+ vlynq_clk_invalid,
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+};
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+
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+static int __vlynq_set_clocks(struct vlynq_device *dev,
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+ enum vlynq_clk_src clk_dir,
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+ int lclk_div, int rclk_div)
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+{
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+ u32 reg;
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+
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+ if (clk_dir == vlynq_clk_invalid) {
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+ printk(KERN_ERR "%s: attempt to set invalid clocking\n",
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+ dev_name(&dev->dev));
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+ return -EINVAL;
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+ }
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+
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+ printk(KERN_INFO "%s: local VLYNQ protocol rev. is 0x%08x\n",
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+ dev_name(&dev->dev), readl(&dev->local->revision));
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+
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+ reg = readl(&dev->local->control);
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+ if (readl(&dev->local->revision) < 0x00010205) {
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+ if (clk_dir & vlynq_clk_local)
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+ reg |= VLYNQ_CTRL_CLOCK_INT;
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+ else
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+ reg &= ~VLYNQ_CTRL_CLOCK_INT;
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+ }
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+ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
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+ reg |= VLYNQ_CTRL_CLOCK_DIV(lclk_div);
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+ writel(reg, &dev->local->control);
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+
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+ if (!vlynq_linked(dev))
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+ return -ENODEV;
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+
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+ printk(KERN_INFO "%s: remote VLYNQ protocol rev. is 0x%08x\n",
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+ dev_name(&dev->dev), readl(&dev->remote->revision));
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+
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+ reg = readl(&dev->remote->control);
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+ if (readl(&dev->remote->revision) < 0x00010205) {
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+ if (clk_dir & vlynq_clk_remote)
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+ reg |= VLYNQ_CTRL_CLOCK_INT;
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+ else
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+ reg &= ~VLYNQ_CTRL_CLOCK_INT;
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+ }
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+ reg &= ~VLYNQ_CTRL_CLOCK_MASK;
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+ reg |= VLYNQ_CTRL_CLOCK_DIV(rclk_div);
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+ writel(reg, &dev->remote->control);
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+
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+ if (!vlynq_linked(dev))
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+ return -ENODEV;
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+
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+ return 0;
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+}
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+
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/*
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* A VLYNQ remote device can clock the VLYNQ bus master
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* using a dedicated clock line. In that case, both the
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@@ -392,29 +477,15 @@
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int i;
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vlynq_reset(dev);
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- for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ?
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- i <= vlynq_rdiv8 : i >= vlynq_rdiv2;
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- dev->dev_id ? i++ : i--) {
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-
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+ for (i = 0; i <= 7; i++) {
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if (!vlynq_linked(dev))
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break;
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- writel((readl(&dev->remote->control) &
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- ~VLYNQ_CTRL_CLOCK_MASK) |
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- VLYNQ_CTRL_CLOCK_INT |
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- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
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- &dev->remote->control);
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- writel((readl(&dev->local->control)
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- & ~(VLYNQ_CTRL_CLOCK_INT |
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- VLYNQ_CTRL_CLOCK_MASK)) |
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- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1),
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- &dev->local->control);
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-
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- if (vlynq_linked(dev)) {
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+ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, i, i)) {
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printk(KERN_DEBUG
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- "%s: using remote clock divisor %d\n",
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- dev_name(&dev->dev), i - vlynq_rdiv1 + 1);
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- dev->divisor = i;
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+ "%s: using remote clock divisor %d\n",
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+ dev_name(&dev->dev), i + 1);
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+ dev->divisor = i + vlynq_rdiv1;
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return 0;
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} else {
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vlynq_reset(dev);
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@@ -437,21 +508,12 @@
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vlynq_reset(dev);
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- for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ?
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- i <= vlynq_ldiv8 : i >= vlynq_ldiv2;
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- dev->dev_id ? i++ : i--) {
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-
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- writel((readl(&dev->local->control) &
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- ~VLYNQ_CTRL_CLOCK_MASK) |
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- VLYNQ_CTRL_CLOCK_INT |
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- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1),
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- &dev->local->control);
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-
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- if (vlynq_linked(dev)) {
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+ for (i = 0; i <= 7; i++) {
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+ if (!__vlynq_set_clocks(dev, vlynq_clk_local, i, 0)) {
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printk(KERN_DEBUG
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- "%s: using local clock divisor %d\n",
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- dev_name(&dev->dev), i - vlynq_ldiv1 + 1);
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- dev->divisor = i;
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+ "%s: using local clock divisor %d\n",
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+ dev_name(&dev->dev), i + 1);
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+ dev->divisor = i + vlynq_ldiv1;
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return 0;
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} else {
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vlynq_reset(dev);
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@@ -473,18 +535,10 @@
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if (!vlynq_linked(dev))
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return -ENODEV;
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- writel((readl(&dev->remote->control) &
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- ~VLYNQ_CTRL_CLOCK_INT),
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- &dev->remote->control);
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-
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- writel((readl(&dev->local->control) &
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- ~VLYNQ_CTRL_CLOCK_INT),
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- &dev->local->control);
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-
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- if (vlynq_linked(dev)) {
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+ if (!__vlynq_set_clocks(dev, vlynq_clk_external, 0, 0)) {
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printk(KERN_DEBUG "%s: using external clock\n",
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- dev_name(&dev->dev));
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- dev->divisor = vlynq_div_external;
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+ dev_name(&dev->dev));
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+ dev->divisor = vlynq_div_external;
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return 0;
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}
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@@ -507,18 +561,9 @@
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* generation negotiated by hardware.
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* Check which device is generating clocks and perform setup
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* accordingly */
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- if (vlynq_linked(dev) && readl(&dev->remote->control) &
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- VLYNQ_CTRL_CLOCK_INT) {
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- if (!__vlynq_try_remote(dev) ||
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- !__vlynq_try_local(dev) ||
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- !__vlynq_try_external(dev))
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- return 0;
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- } else {
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- if (!__vlynq_try_external(dev) ||
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- !__vlynq_try_local(dev) ||
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- !__vlynq_try_remote(dev))
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+ /* XXX: I don't really know what difference it makes, if the order
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+ * of the following calls is changed, but at least in this order
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+ * my fritzbox doesn't hang at startup as in
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+ * https://dev.openwrt.org/ticket/7324
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+ */
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+ if (!__vlynq_try_remote(dev) ||
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+ !__vlynq_try_local(dev) ||
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+ !__vlynq_try_external(dev))
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return 0;
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- return 0;
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- }
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+ if (!__vlynq_try_remote(dev) || !__vlynq_try_local(dev) ||
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+ !__vlynq_try_external(dev))
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+ return 0;
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break;
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case vlynq_ldiv1:
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case vlynq_ldiv2:
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@@ -528,15 +573,12 @@
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case vlynq_ldiv6:
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case vlynq_ldiv7:
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case vlynq_ldiv8:
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- writel(VLYNQ_CTRL_CLOCK_INT |
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- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
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- vlynq_ldiv1), &dev->local->control);
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- writel(0, &dev->remote->control);
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- if (vlynq_linked(dev)) {
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+ if (!__vlynq_set_clocks(dev, vlynq_clk_local, dev->divisor -
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+ vlynq_ldiv1, 0)) {
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printk(KERN_DEBUG
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- "%s: using local clock divisor %d\n",
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- dev_name(&dev->dev),
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- dev->divisor - vlynq_ldiv1 + 1);
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+ "%s: using local clock divisor %d\n",
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+ dev_name(&dev->dev),
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+ dev->divisor - vlynq_ldiv1 + 1);
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return 0;
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}
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break;
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@@ -548,15 +590,12 @@
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case vlynq_rdiv6:
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case vlynq_rdiv7:
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case vlynq_rdiv8:
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- writel(0, &dev->local->control);
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- writel(VLYNQ_CTRL_CLOCK_INT |
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- VLYNQ_CTRL_CLOCK_DIV(dev->divisor -
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- vlynq_rdiv1), &dev->remote->control);
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- if (vlynq_linked(dev)) {
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+ if (!__vlynq_set_clocks(dev, vlynq_clk_remote, 0,
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+ dev->divisor - vlynq_rdiv1)) {
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printk(KERN_DEBUG
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- "%s: using remote clock divisor %d\n",
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- dev_name(&dev->dev),
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- dev->divisor - vlynq_rdiv1 + 1);
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+ "%s: using remote clock divisor %d\n",
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+ dev_name(&dev->dev),
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+ dev->divisor - vlynq_rdiv1 + 1);
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return 0;
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}
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break;
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@@ -732,13 +771,13 @@
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platform_set_drvdata(pdev, dev);
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printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n",
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- dev_name(&dev->dev), (void *)dev->regs_start, dev->irq,
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- (void *)dev->mem_start);
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+ dev_name(&dev->dev), (void *)dev->regs_start,
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+ dev->irq, (void *)dev->mem_start);
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- dev->dev_id = 0;
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dev->divisor = vlynq_div_auto;
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- result = __vlynq_enable_device(dev);
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- if (result == 0) {
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+ if (__vlynq_enable_device(dev))
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+ dev->dev_id = 0;
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+ else {
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dev->dev_id = readl(&dev->remote->chip);
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((struct plat_vlynq_ops *)(dev->dev.platform_data))->off(dev);
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}
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Index: linux-2.6.32.26/include/linux/vlynq.h
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===================================================================
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--- linux-2.6.32.26.orig/include/linux/vlynq.h 2010-11-24 13:07:33.297487888 -0800
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+++ linux-2.6.32.26/include/linux/vlynq.h 2010-11-24 13:08:44.107488596 -0800
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@@ -98,6 +98,7 @@
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extern struct bus_type vlynq_bus_type;
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+extern u32 __vlynq_rev_reg(struct vlynq_regs *regs);
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extern int __vlynq_register_driver(struct vlynq_driver *driver,
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struct module *owner);
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