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brcm47xx: fix cpu clock detection on ASUS WL-520gU

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The ASUS WL-520gU and some other similar Asus devices have a BCM5354 
running at 200MHZ and not at 240 which is the default for this SoC.

This fixes #4083.


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34325 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
hauke 2012-11-24 20:28:06 +00:00
parent c57e2a3047
commit b15412207c
1 changed files with 44 additions and 0 deletions
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44
target/linux/brcm47xx/patches-3.6/520-MIPS-BCM47XX-fix-time-for-WL520G-and-other-200-MHz-C.patch Normal file
View File

@ -0,0 +1,44 @@
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -27,10 +27,14 @@
#include <linux/ssb/ssb.h>
#include <asm/time.h>
#include <bcm47xx.h>
+#include <nvram.h>
void __init plat_time_init(void)
{
unsigned long hz = 0;
+ u16 chip_id = 0;
+ char buf[10];
+ int len;
/*
* Use deterministic values for initial counter interrupt
@@ -43,15 +47,26 @@ void __init plat_time_init(void)
#ifdef CONFIG_BCM47XX_SSB
case BCM47XX_BUS_TYPE_SSB:
hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
+ chip_id = bcm47xx_bus.ssb.chip_id;
break;
#endif
#ifdef CONFIG_BCM47XX_BCMA
case BCM47XX_BUS_TYPE_BCMA:
hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
+ chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
break;
#endif
}
+ if (chip_id == 0x5354) {
+ len = nvram_getenv("clkfreq", buf, sizeof(buf));
+ if (len >= 0 && !strncmp(buf, "200", 4))
+ hz = 100000000;
+ len = nvram_getenv("hardware_version", buf, sizeof(buf));
+ if (len >= 0 && !strncmp(buf, "WL520G", 6))
+ hz = 100000000;
+
+ }
if (!hz)
hz = 100000000;