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ar71xx: add defines for the AR934X GMAC interface

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29556 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2011-12-15 22:25:36 +00:00
parent a55b188ebe
commit ba50354437

View File

@ -79,6 +79,8 @@
#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
#define AR934X_WMAC_SIZE 0x20000
#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
#define AR934X_GMAC_SIZE 0x14
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x10000000
@ -907,6 +909,25 @@ void ar71xx_flash_release(void);
#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0
#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10)
/*
* AR934X GMAC Interface
*/
#define AR934X_GMAC_REG_ETH_CFG 0x00
#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0)
#define AR934X_ETH_CFG_MII_GMAC0 BIT(1)
#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2)
#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3)
#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4)
#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5)
#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6)
#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7)
#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9)
#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10)
#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11)
#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12)
#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13)
#endif /* __ASSEMBLER__ */
#endif /* __ASM_MACH_AR71XX_H */