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[adm5120] add initial support for hardware accelerated byte swapping
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7708 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -2,6 +2,7 @@ CONFIG_32BIT=y
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# CONFIG_64BIT is not set
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# CONFIG_64BIT_PHYS_ADDR is not set
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CONFIG_ADM5120_GPIO=y
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CONFIG_ADM5120_HARDWARE_SWAB=y
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CONFIG_ADM5120_NR_UARTS=2
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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16
target/linux/adm5120-2.6/files/arch/mips/adm5120/Kconfig
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16
target/linux/adm5120-2.6/files/arch/mips/adm5120/Kconfig
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@ -0,0 +1,16 @@
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if MIPS_ADM5120
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menu "ADM5120 Implementation Options"
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config PCI_ADM5120
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bool "Enable PCI support"
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select PCI
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default y
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config ADM5120_HARDWARE_SWAB
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bool "Enable hardware accelerated byte-swapping"
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default y
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endmenu
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endif
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@ -18,6 +18,7 @@
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#include <asm/bootinfo.h>
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#include <asm/addrspace.h>
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#include <asm/byteorder.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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#include <asm/mach-adm5120/adm5120_switch.h>
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@ -775,7 +776,7 @@ static void __init adm5120_detect_memsize(void)
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u32 size, maxsize;
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volatile u8 *p,*r;
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u8 t;
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memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
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switch (memctrl & MEMCTRL_SDRS_MASK) {
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case MEMCTRL_SDRS_4M:
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@ -791,7 +792,7 @@ static void __init adm5120_detect_memsize(void)
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maxsize = 64 << 20;
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break;
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}
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/* FIXME: need to disable buffers for both SDRAM bank? */
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mem_dbg("checking for %ldMB chip\n",maxsize >> 20);
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@ -800,7 +801,7 @@ static void __init adm5120_detect_memsize(void)
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p = (volatile u8 *)KSEG1ADDR(0);
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t = *p;
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for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
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#if 1
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#if 1
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r = (p+size);
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*p = 0x55;
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mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, *r);
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@ -818,7 +819,7 @@ static void __init adm5120_detect_memsize(void)
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mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, p[size]);
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if (p[size] != 0x55)
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continue;
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p[0] = 0xAA;
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mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, p[size]);
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if (p[size] != 0xAA)
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@ -836,13 +837,13 @@ static void __init adm5120_detect_memsize(void)
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if (size == (32 << 20))
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/* if bank size is 32MB, 2nd bank is not supported */
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goto out;
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if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
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/* if 2nd bank is not enabled, we are done */
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goto out;
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/*
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* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
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* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
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* are missing.
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*/
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mem_dbg("checking second bank\n");
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@ -851,11 +852,11 @@ static void __init adm5120_detect_memsize(void)
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*p = 0x55;
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if (*p != 0x55)
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goto out;
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*p = 0xAA;
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if (*p != 0xAA)
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goto out;
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*p = t;
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if (maxsize != size) {
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/* adjusting MECTRL register */
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@ -897,11 +898,31 @@ void __init adm5120_info_show(void)
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printk("Memory size : %ldMB\n", adm5120_memsize >> 20);
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}
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void __init adm5120_swab_test(void)
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{
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#if CONFIG_ADM5120_HARDWARE_SWAB
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u32 t1,t2;
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t1 = 0x1234;
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t2 = swab16(t1);
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printk("hardware swab16 test %s, data:0x%04X, result:0x%04X\n",
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(t2 == 0x3412) ? "passed" :"failed", t1, t2);
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t1 = 0x12345678;
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t2 = swab32(t1);
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printk("hardware swab32 test %s, data:0x%08X, result:0x%08X\n",
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(t2 == 0x78563412) ? "passed" :"failed", t1, t2);
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#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
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}
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void __init adm5120_info_init(void)
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{
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adm5120_detect_cpuinfo();
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adm5120_detect_memsize();
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adm5120_detect_board();
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adm5120_info_show();
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adm5120_swab_test();
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}
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@ -2,7 +2,7 @@ Index: linux-2.6.21.1/arch/mips/Kconfig
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===================================================================
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--- linux-2.6.21.1.orig/arch/mips/Kconfig
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+++ linux-2.6.21.1/arch/mips/Kconfig
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@@ -16,6 +16,21 @@ choice
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@@ -16,6 +16,17 @@ choice
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prompt "System type"
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default SGI_IP22
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@ -16,14 +16,18 @@ Index: linux-2.6.21.1/arch/mips/Kconfig
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select GENERIC_GPIO
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+
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+config PCI_ADM5120
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+ bool "Add PCI control support for ADM5120"
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+ depends on MIPS_ADM5120 && PCI
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+
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config MIPS_MTX1
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bool "4G Systems MTX-1 board"
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select DMA_NONCOHERENT
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@@ -766,6 +775,7 @@
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endchoice
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+source "arch/mips/adm5120/Kconfig"
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source "arch/mips/ddb5xxx/Kconfig"
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source "arch/mips/gt64120/ev64120/Kconfig"
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source "arch/mips/jazz/Kconfig"
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Index: linux-2.6.21.1/arch/mips/Makefile
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===================================================================
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--- linux-2.6.21.1.orig/arch/mips/Makefile
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@ -0,0 +1,38 @@
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--- linux-2.6.19.2/include/asm-mips/byteorder.h 2007-01-10 20:10:37.000000000 +0100
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+++ linux-2.6.19.2.new/include/asm-mips/byteorder.h 2007-05-16 21:14:47.000000000 +0200
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@@ -58,6 +58,35 @@
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#endif /* CONFIG_CPU_MIPSR2 */
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+#ifdef CONFIG_ADM5120_HARDWARE_SWAB
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+
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+static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x)
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+{
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+ __asm__ (
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+ " sw %2, 0xC8(%1) \n"
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+ " lhu %0, 0xCC(%1) \n"
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+ : "=r" (x)
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+ : "r" (0xB2000000), "r" (x));
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+
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+ return x;
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+}
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+
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+static __inline__ __attribute_const__ __u32 ___adm5120__swab32(__u32 x)
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+{
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+ __asm__ (
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+ " sw %2, 0xC8(%1) \n"
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+ " lw %0, 0xCC(%1) \n"
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+ : "=r" (x)
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+ : "r" (0xB2000000), "r" (x));
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+
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+ return x;
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+}
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+
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+#define __arch__swab16(x) ___adm5120__swab16(x)
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+#define __arch__swab32(x) ___adm5120__swab32(x)
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+
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+#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
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+
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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# CONFIG_64BIT is not set
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# CONFIG_64BIT_PHYS_ADDR is not set
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CONFIG_ADM5120_GPIO=y
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CONFIG_ADM5120_HARDWARE_SWAB=y
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CONFIG_ADM5120_NR_UARTS=2
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# CONFIG_ATM_DRIVERS is not set
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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