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[pxa]: upgrade to 2.6.32.7, switch to squashfs, remove broken flag

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19562 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz 2010-02-09 00:11:50 +00:00
parent ed2d03fdee
commit d4db749fd7
59 changed files with 1655 additions and 20380 deletions
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6
target/linux/pxa/Makefile
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@ -1,5 +1,5 @@
#
# Copyright (C) 2006-2009 OpenWrt.org
# Copyright (C) 2006-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -9,9 +9,9 @@ include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=pxa
BOARDNAME:=Marvell/Intel PXA2xx
FEATURES:=jffs2 broken
FEATURES:=squashfs
LINUX_VERSION:=2.6.21.7
LINUX_VERSION:=2.6.32.7
include $(INCLUDE_DIR)/target.mk

246
target/linux/pxa/config-default
View File

@ -1,240 +1,168 @@
CONFIG_AC97_BUS=m
# CONFIG_AEABI is not set
# CONFIG_AIRO_CS is not set
CONFIG_ALIGNMENT_HANDLING=0x2
CONFIG_ALIGNMENT_TRAP=y
CONFIG_APM_EMULATION=m
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
# CONFIG_ARCH_GUMSTIX_F is not set
# CONFIG_ARCH_GUMSTIX_ORIG is not set
CONFIG_ARCH_GUMSTIX_VERDEX=y
CONFIG_ARCH_GUMSTIX=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_LUBBOCK is not set
CONFIG_ARCH_MTD_XIP=y
# CONFIG_ARCH_PXA_IDP is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARM_THUMB is not set
# CONFIG_ARCH_PXA_ESERIES is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_ARCH_PXA_PALM is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARCH_VIPER is not set
CONFIG_ARM=y
# CONFIG_ARM_THUMB is not set
# CONFIG_ARPD is not set
# CONFIG_ARTHUR is not set
CONFIG_ATA=m
# CONFIG_ATM is not set
# CONFIG_BINFMT_AOUT is not set
CONFIG_BITREVERSE=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDECS=m
CONFIG_BLK_DEV_IDEDISK=m
# CONFIG_BLK_DEV_IDEDMA is not set
CONFIG_BLK_DEV_IDE=m
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BONDING is not set
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_BT_GUMSTIX=m
# CONFIG_CIFS is not set
CONFIG_CMDLINE="console=ttyS0,115200n8"
CONFIG_CPU_32v5=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_COMMON_CLKDEV=y
CONFIG_CPU_32=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_CP15=y
# CONFIG_CPU_DCACHE_DISABLE is not set
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_XSCALE=y
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_LZMA=y
# CONFIG_DM9000 is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPOLL is not set
# CONFIG_EXT2_FS is not set
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_PXA_ALPS_CDOLLAR is not set
# CONFIG_FB_PXA_NONEOFTHEABOVE is not set
CONFIG_FB_PXA_PARAMETERS=y
CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C=y
# CONFIG_FB_PXA_SHARP_LQ043_PSP is not set
CONFIG_FB_PXA=y
CONFIG_FB_TILEBLITTING=y
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FONT_10x18 is not set
CONFIG_FONT_6x11=y
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_8x16 is not set
# CONFIG_FONT_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_SUN8x16 is not set
CONFIG_FONTS=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_FPE_NWFPE is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HERMES is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
CONFIG_HID=m
CONFIG_HW_CONSOLE=y
CONFIG_HAVE_AOUT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_I2C_ALGOBIT is not set
CONFIG_I2C_CHARDEV=m
CONFIG_I2C=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
# CONFIG_I2C_DESIGNWARE is not set
CONFIG_I2C_PXA=m
CONFIG_I2C_PXA_SLAVE=y
# CONFIG_IDE_ARM is not set
CONFIG_IDE_GENERIC=m
CONFIG_IDE=m
# CONFIG_IEEE80211_SOFTMAC is not set
# CONFIG_IFB is not set
# CONFIG_INET_DIAG is not set
CONFIG_INOTIFY_USER=y
CONFIG_INOTIFY=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_INPUT_MOUSE=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_TSDEV=m
CONFIG_INPUT_TSDEV_SCREEN_X=480
CONFIG_INPUT_TSDEV_SCREEN_Y=272
CONFIG_INPUT=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_INOTIFY_USER=y
# CONFIG_ISDN is not set
# CONFIG_ISO9660_FS is not set
CONFIG_IWMMXT=y
CONFIG_KEYBOARD_ATKBD=m
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_LLC2 is not set
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_LEDS_GPIO is not set
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_ARMCORE is not set
# CONFIG_MACH_BALLOON3 is not set
# CONFIG_MACH_CM_X300 is not set
# CONFIG_MACH_COLIBRI is not set
# CONFIG_MACH_COLIBRI300 is not set
# CONFIG_MACH_COLIBRI320 is not set
# CONFIG_MACH_CSB726 is not set
# CONFIG_MACH_EM_X270 is not set
# CONFIG_MACH_EXEDA is not set
# CONFIG_MACH_GUMSTIX_F is not set
CONFIG_MACH_GUMSTIX_VERDEX=y
# CONFIG_MACH_H4700 is not set
# CONFIG_MACH_H5000 is not set
# CONFIG_MACH_HIMALAYA is not set
# CONFIG_MACH_INTELMOTE2 is not set
# CONFIG_MACH_LITTLETON is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAGICIAN is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_MACH_TRIZEPS4 is not set
# CONFIG_MACH_MIOA701 is not set
# CONFIG_MACH_MP900C is not set
# CONFIG_MACH_PCM027 is not set
# CONFIG_MACH_SAAR is not set
# CONFIG_MACH_STARGATE2 is not set
# CONFIG_MACH_TAVOREVB is not set
# CONFIG_MACH_XCEP is not set
# CONFIG_MACH_ZYLONITE is not set
# CONFIG_MFD_T7L66XB is not set
CONFIG_MII=m
# CONFIG_MINIX_FS is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_PXA=y
CONFIG_MMC=y
CONFIG_MOUSE_PS2=m
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_AMDSTD is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_GUMSTIX=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_SHARP_SL is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PXA2XX=y
# CONFIG_MTD_XIP is not set
# CONFIG_NETFILTER_XT_TARGET_TARPIT is not set
CONFIG_NET_SCH_FIFO=y
CONFIG_NO_IDLE_HZ=y
# CONFIG_NO_IOPORT is not set
# CONFIG_OUTER_CACHE is not set
# CONFIG_PACKET is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PATA_PCMCIA=m
# CONFIG_PATA_PLATFORM is not set
CONFIG_PCCARD=m
CONFIG_PCMCIA_LOAD_CIS=y
# CONFIG_PCI_SYSCALL is not set
CONFIG_PCMCIA=m
CONFIG_PCMCIA_LOAD_CIS=y
CONFIG_PCMCIA_PXA2XX=m
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
CONFIG_PLAT_PXA=y
CONFIG_PM=y
# CONFIG_PNPACPI is not set
# CONFIG_PROC_GPIO_DEBUG is not set
CONFIG_PROC_GPIO=m
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PXA27x=y
# CONFIG_PXA_EZX is not set
# CONFIG_PXA_SHARPSL is not set
CONFIG_SA1100_WATCHDOG=m
CONFIG_SCSI=m
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_PROC_FS is not set
# CONFIG_SDIO_UART is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIO_LIBPS2=m
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIO=m
CONFIG_SERIO_LIBPS2=m
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=m
CONFIG_SMC911X_GUMSTIX=m
CONFIG_SMSC911X=y
CONFIG_SMC911X=m
CONFIG_SMC91X_GUMSTIX=m
CONFIG_SMC91X=m
CONFIG_SND_AC97_CODEC=m
CONFIG_SND_PXA2XX_AC97=m
CONFIG_SND_PXA2XX_PCM=m
CONFIG_SND_PXA2XX_SOC_AC97=m
CONFIG_SND_PXA2XX_SOC_GUMSTIX=m
CONFIG_SND_PXA2XX_SOC=m
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_SOC_AC97_CODEC=m
CONFIG_SND_SOC=m
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_VERBOSE_PROCFS is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
# CONFIG_SUSPEND is not set
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TOUCHSCREEN_UCB1400=m
# CONFIG_UDF_FS is not set
# CONFIG_TRIZEPS_PXA is not set
CONFIG_UID16=y
CONFIG_UNIX=m
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_GTCO is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
# CONFIG_USBPCWATCHDOG is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_USBNET is not set
# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_YEALINK is not set
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VGA_CONSOLE is not set
# CONFIG_VIDEO_DEV is not set
# CONFIG_VLAN_8021Q is not set
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_VT=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFS_FS is not set
# CONFIG_XIP_KERNEL is not set
CONFIG_XSCALE_PMU=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

10
target/linux/pxa/image/Makefile
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2008 OpenWrt.org
#
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -20,16 +20,16 @@ define Image/Build
endef
define Image/Build/jffs2-64k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=65536 conv=sync
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=64k conv=sync
endef
define Image/Build/jffs2-128k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=131072 conv=sync
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=128k conv=sync
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=131072 conv=sync
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=128k conv=sync
endef
$(eval $(call BuildImage))

26
target/linux/pxa/patches-2.6.21/001-pxa-regs-additions.patch
View File

@ -1,26 +0,0 @@
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1316,6 +1316,7 @@
#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */
#define GPIO78_nCS_2 78 /* chip select 2 */
#define GPIO79_nCS_3 79 /* chip select 3 */
+#define GPIO79_pSKTSEL 79 /* Socket Select for Card Space (PXA27x) */
#define GPIO80_nCS_4 80 /* chip select 4 */
#define GPIO81_NSCLK 81 /* NSSP clock */
#define GPIO82_NSFRM 82 /* NSSP Frame */
@@ -1324,6 +1325,7 @@
#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
+#define GPIO105_nPCE_2 105 /* Card Enable for Card Space (PXA27x) */
#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
@@ -1468,6 +1470,7 @@
#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
+#define GPIO105_nPCE_2_MD (105 | GPIO_ALT_FN_1_OUT)
#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)

168
target/linux/pxa/patches-2.6.21/002-header.patch
View File

@ -1,168 +0,0 @@
--- /dev/null
+++ b/include/asm-arm/arch-pxa/gumstix.h
@@ -0,0 +1,165 @@
+/*
+ * linux/include/asm-arm/arch-pxa/gumstix.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+/* BTRESET - Reset line to Bluetooth module, active low signal. */
+#define GPIO_GUMSTIX_BTRESET 7
+#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
+
+
+/* GPIOn - Input from MAX823 (or equiv), normalizing USB +5V
+ into a clean interrupt signal for determining cable presence
+ On the original gumstix, this is GPIO81, and GPIO83 needs to be defined as well.
+ On the gumstix F, this moves to GPIO17 and GPIO37 */
+/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
+ has detected a cable insertion; driven low otherwise. */
+
+#ifdef CONFIG_ARCH_GUMSTIX_ORIG
+
+#define GPIO_GUMSTIX_USB_GPIOn 81
+#define GPIO_GUMSTIX_USB_GPIOx 83
+
+#else
+
+#define GPIO_GUMSTIX_USB_GPIOn 35
+#define GPIO_GUMSTIX_USB_GPIOx 41
+
+#endif
+
+#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) /* usb state change */
+#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
+#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
+#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
+
+
+/*
+ * SMC Ethernet definitions
+ * ETH_RST provides a hardware reset line to the ethernet chip
+ * ETH is the IRQ line in from the ethernet chip to the PXA
+ */
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_ETH0_RST 80
+#define GPIO_GUMSTIX_ETH0 36
+#else
+#define GPIO_GUMSTIX_ETH0_RST 32
+#define GPIO_GUMSTIX_ETH0 99
+#endif
+#define GPIO_GUMSTIX_ETH1_RST 52
+#define GPIO_GUMSTIX_ETH1 27
+
+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
+#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
+
+#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+
+
+/* CF reset line */
+#define GPIO8_CF_RESET 8
+#define GPIO97_CF_RESET 97
+#define GPIO110_CF_RESET 110
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
+#else
+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
+#endif
+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
+
+
+/* CF signals shared by both sockets */
+#define GPIO_GUMSTIX_nPOE GPIO48_nPOE
+#define GPIO_GUMSTIX_nPWE GPIO49_nPWE
+#define GPIO_GUMSTIX_nPIOR GPIO50_nPIOR
+#define GPIO_GUMSTIX_nPIOW GPIO51_nPIOW
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1 GPIO52_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2 GPIO53_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL GPIO54_pSKTSEL
+#else
+#define GPIO_GUMSTIX_nPCE_1 GPIO102_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2 GPIO105_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL GPIO79_pSKTSEL
+#endif
+#define GPIO_GUMSTIX_nPREG GPIO55_nPREG
+#define GPIO_GUMSTIX_nPWAIT GPIO56_nPWAIT
+#define GPIO_GUMSTIX_nIOIS16 GPIO57_nIOIS16
+
+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE_MD
+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE_MD
+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR_MD
+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW_MD
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1_MD
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2_MD
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL_MD
+#else
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1_MD
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2_MD
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL_MD
+#endif
+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG_MD
+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT_MD
+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16_MD
+
+/* CF slot 0 */
+#define GPIO4_nBVD1_0 4
+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
+#define GPIO11_nCD_0 11
+#define GPIO26_PRDY_nBSY_0 26
+
+#define GPIO111_nBVD1_0 111
+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
+#define GPIO104_nCD_0 104
+#define GPIO96_PRDY_nBSY_0 96
+#define GPIO109_PRDY_nBSY_0 109
+
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
+#else
+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
+#endif
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
+
+#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
+#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
+
+/* CF slot 1 */
+#define GPIO18_nBVD1_1 18
+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
+#define GPIO36_nCD_1 36
+#define GPIO27_PRDY_nBSY_1 27
+
+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
+
+#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
+#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
+
+/* CF GPIO line modes */
+#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
+#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
+#define GPIO_GUMSTIX_nSTSCHG_0_MD ( GPIO_GUMSTIX_nSTSCHG_0 | GPIO_IN )
+#define GPIO_GUMSTIX_nCD_0_MD ( GPIO_GUMSTIX_nCD_0 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD ( GPIO_GUMSTIX_PRDY_nBSY_0 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD ( GPIO_GUMSTIX_PRDY_nBSY_0_OLD | GPIO_IN )
+#define GPIO_GUMSTIX_nSTSCHG_1_MD ( GPIO_GUMSTIX_nSTSCHG_1 | GPIO_IN )
+#define GPIO_GUMSTIX_nCD_1_MD ( GPIO_GUMSTIX_nCD_1 | GPIO_IN )
+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD ( GPIO_GUMSTIX_PRDY_nBSY_1 | GPIO_IN )

58
target/linux/pxa/patches-2.6.21/003-arch-config.patch
View File

@ -1,58 +0,0 @@
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -5,6 +5,10 @@ menu "Intel PXA2xx Implementations"
choice
prompt "Select target board"
+config ARCH_GUMSTIX
+ bool "Gumstix Platform"
+ depends on ARCH_PXA
+
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform"
select PXA25x
@@ -116,6 +120,34 @@ config MACH_TOSA
bool "Enable Sharp SL-6000x (Tosa) Support"
depends on PXA_SHARPSL_25x
+choice
+ depends on ARCH_GUMSTIX
+ prompt "Gumstix Platform Version"
+ default ARCH_GUMSTIX_F
+
+config ARCH_GUMSTIX_ORIG
+ bool "Original Gumstix"
+ select PXA25x
+ help
+ The original gumstix platform, including the gs-200x and gs-400x and the waysmall
+ systems using these boards. (Almost nobody has one of these)
+
+config ARCH_GUMSTIX_F
+ bool "Gumstix-F"
+ select PXA25x
+ help
+ The updated Gumstix basix and connex boards with 60-pin connector, and
+ waysmall systems using these boards, including ws-200ax and ws-400ax.
+
+config ARCH_GUMSTIX_VERDEX
+ bool "Gumstix Verdex"
+ select PXA27x
+ help
+ The Gumstix verdex boards with 24, 60, and 120-pin connectors, and
+ computer systems using these boards.
+
+endchoice
+
config PXA25x
bool
help
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_PXA25x) += pxa25x.o
obj-$(CONFIG_PXA27x) += pxa27x.o
# Specific board support
+obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o

79
target/linux/pxa/patches-2.6.21/004-board-init.patch
View File

@ -1,79 +0,0 @@
--- /dev/null
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -0,0 +1,76 @@
+/*
+ * linux/arch/arm/mach-pxa/gumstix.c
+ *
+ * Support for the Gumstix computer platform
+ *
+ * Author: Craig Hughes
+ * Created: December 8 2004
+ * Copyright: (C) 2004, Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/types.h>
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <asm/arch/udc.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/gumstix.h>
+
+#include "generic.h"
+
+static int gumstix_mci_init(struct device *dev, irqreturn_t (*lubbock_detect_int)(int, void *, struct pt_regs *), void *data)
+{
+ // Set up MMC controller
+ pxa_gpio_mode(GPIO6_MMCCLK_MD);
+ pxa_gpio_mode(GPIO53_MMCCLK_MD);
+ pxa_gpio_mode(GPIO8_MMCCS0_MD);
+
+ return 0;
+}
+
+static struct pxamci_platform_data gumstix_mci_platform_data = {
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+ .init = &gumstix_mci_init,
+};
+
+static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = {
+ .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
+ .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
+};
+
+static struct platform_device gum_audio_device = {
+ .name = "pxa2xx-ac97",
+ .id = -1,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &gum_audio_device,
+};
+
+static void __init gumstix_init(void)
+{
+ pxa_set_mci_info(&gumstix_mci_platform_data);
+ pxa_set_udc_info(&gumstix_udc_info);
+ (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(GUMSTIX, "The Gumstix Platform")
+ .phys_io = 0x40000000,
+ .boot_params = 0xa0000100,
+ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+ .timer = &pxa_timer,
+ .map_io = pxa_map_io,
+ .init_irq = pxa_init_irq,
+ .init_machine = gumstix_init,
+MACHINE_END

283
target/linux/pxa/patches-2.6.21/005-compact-flash.patch
View File

@ -1,283 +0,0 @@
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -69,4 +69,4 @@ sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa
pxa2xx_cs-$(CONFIG_ARCH_LUBBOCK) += pxa2xx_lubbock.o sa1111_generic.o
pxa2xx_cs-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o
pxa2xx_cs-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o
-
+pxa2xx_cs-$(CONFIG_ARCH_GUMSTIX) += pxa2xx_gumstix.o
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_gumstix.c
@@ -0,0 +1,272 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_gumstix.c
+ *
+ * Gumstix PCMCIA specific routines. Based on Mainstone
+ *
+ * Copyright 2004, Craig Hughes <craig@gumstix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <pcmcia/ss.h>
+
+#include <asm/hardware.h>
+#include <asm/delay.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/arch/gumstix.h>
+
+#include "soc_common.h"
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs0[] = {
+ { 0, GUMSTIX_S0_nCD_IRQ, "CF0 nCD" },
+ { 0, GUMSTIX_S0_nSTSCHG_IRQ, "CF0 nSTSCHG" },
+};
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs1[] = {
+ { 1, GUMSTIX_S1_nCD_IRQ, "CF1 nCD" },
+ { 1, GUMSTIX_S1_nSTSCHG_IRQ, "CF1 nSTSCHG" },
+};
+
+static int net_cf_vx_mode = 0;
+
+static int gumstix_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr == 0)
+ {
+ pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_0_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+ if(net_cf_vx_mode)
+ pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD);
+ else
+ pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_MD);
+ } else {
+ pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_1_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nCD_1_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_1_MD);
+ }
+
+ pxa_gpio_mode(GPIO_GUMSTIX_nPOE_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPWE_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPIOR_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPIOW_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_pSKTSEL_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPREG_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPWAIT_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_nIOIS16_MD);
+
+ skt->irq = (skt->nr == 0) ? ((net_cf_vx_mode == 0) ? GUMSTIX_S0_PRDY_nBSY_IRQ : GUMSTIX_S0_PRDY_nBSY_OLD_IRQ) : GUMSTIX_S1_PRDY_nBSY_IRQ;
+
+ return (skt->nr == 0) ? soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0)) :
+ soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+}
+
+static void gumstix_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr == 0)
+ {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static void gumstix_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+ struct pcmcia_state *state)
+{
+ unsigned int cd, prdy_nbsy, nbvd1;
+ if(skt->nr == 0)
+ {
+ cd = GPIO_GUMSTIX_nCD_0;
+ if(net_cf_vx_mode)
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0_OLD;
+ else
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_0;
+ } else {
+ cd = GPIO_GUMSTIX_nCD_1;
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_1;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_1;
+ }
+ state->detect = !(GPLR(cd) & GPIO_bit(cd));
+ state->ready = !!(GPLR(prdy_nbsy) & GPIO_bit(prdy_nbsy));
+ state->bvd1 = !!(GPLR(nbvd1) & GPIO_bit(nbvd1));
+ state->bvd2 = 1;
+ state->vs_3v = 0;
+ state->vs_Xv = 0;
+ state->wrprot = 0;
+}
+
+static int gumstix_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+ const socket_state_t *state)
+{
+ return 0;
+}
+
+static void gumstix_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static void gumstix_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static struct pcmcia_low_level gumstix_pcmcia_ops = {
+ .owner = THIS_MODULE,
+ .hw_init = gumstix_pcmcia_hw_init,
+ .hw_shutdown = gumstix_pcmcia_hw_shutdown,
+ .socket_state = gumstix_pcmcia_socket_state,
+ .configure_socket = gumstix_pcmcia_configure_socket,
+ .socket_init = gumstix_pcmcia_socket_init,
+ .socket_suspend = gumstix_pcmcia_socket_suspend,
+ .nr = 2,
+};
+
+static struct platform_device *gumstix_pcmcia_device;
+
+inline void __init gumstix_pcmcia_cpld_clk(void)
+{
+ GPCR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
+ GPSR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
+}
+
+inline unsigned char __init gumstix_pcmcia_cpld_read_bits(int bits)
+{
+ unsigned char result = 0;
+ unsigned int shift = 0;
+ while(bits--)
+ {
+ result |= !!(GPLR(GPIO_GUMSTIX_nCD_0) & GPIO_bit(GPIO_GUMSTIX_nCD_0)) << shift;
+ shift ++;
+ gumstix_pcmcia_cpld_clk();
+ }
+ printk("CPLD responded with: %02x\n",result);
+ return result;
+}
+
+/* We use the CPLD on the CF-CF card to read a value from a shift register. If we can read that
+ * magic sequence, then we have 2 CF cards; otherwise we assume just one
+ * The CPLD will send the value of the shift register on GPIO11 (the CD line for slot 0)
+ * when RESET is held in reset. We use GPIO48 (nPOE) as a clock signal,
+ * GPIO52/53 (card enable for both cards) to control read/write to the shift register
+ */
+static void __init gumstix_count_cards(void)
+{
+ pxa_gpio_mode(GPIO_GUMSTIX_nPOE | GPIO_OUT);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1 | GPIO_OUT);
+ pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2 | GPIO_OUT);
+ pxa_gpio_mode(GPIO_GUMSTIX_nCD_0 | GPIO_IN);
+ if(net_cf_vx_mode)
+ pxa_gpio_mode(GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT);
+ else
+ pxa_gpio_mode(GPIO_GUMSTIX_CF_RESET | GPIO_OUT);
+
+ // Enter reset
+ if(net_cf_vx_mode)
+ GPSR(GPIO_GUMSTIX_CF_OLD_RESET) = GPIO_bit(GPIO_GUMSTIX_CF_OLD_RESET);
+ else
+ GPSR(GPIO_GUMSTIX_CF_RESET) = GPIO_bit(GPIO_GUMSTIX_CF_RESET);
+
+ // Setup the shift register
+ GPSR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
+ GPCR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
+
+ // Tick the clock to program the shift register
+ gumstix_pcmcia_cpld_clk();
+
+ // Now set shift register into read mode
+ GPCR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
+ GPSR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
+
+ // We can read the bits now -- 0xC2 means "Dual compact flash"
+ if(gumstix_pcmcia_cpld_read_bits(8) != 0xC2)
+ {
+ // We do not have 2 CF slots
+ gumstix_pcmcia_ops.nr = 1;
+ }
+}
+
+#ifdef CONFIG_ARCH_GUMSTIX_VERDEX
+static void __init gumstix_check_if_netCF_vx(void)
+{
+ void *network_controller_memory = ioremap(0x04000300,16);
+ // Look for the special 91c111 value in the bank select register
+ if((0xff00 & readw(network_controller_memory+0x0e)) == 0x3300) {
+ printk("Detected netCF-vx board: using older GPIO configuration\n");
+ net_cf_vx_mode = 1;
+ } else {
+ printk("Not netCF-vx board: using newer GPIO configuration\n");
+ net_cf_vx_mode = 0;
+ }
+ iounmap(network_controller_memory);
+}
+#endif
+
+static int __init gumstix_pcmcia_init(void)
+{
+ int ret;
+
+#ifdef CONFIG_ARCH_GUMSTIX_VERDEX
+ gumstix_check_if_netCF_vx();
+#endif
+
+ gumstix_count_cards();
+
+ udelay(50);
+ if(net_cf_vx_mode)
+ GPCR(GPIO_GUMSTIX_CF_OLD_RESET) = GPIO_bit(GPIO_GUMSTIX_CF_OLD_RESET);
+ else
+ GPCR(GPIO_GUMSTIX_CF_RESET) = GPIO_bit(GPIO_GUMSTIX_CF_RESET);
+
+ gumstix_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+ if (!gumstix_pcmcia_device)
+ return -ENOMEM;
+
+ gumstix_pcmcia_device->dev.platform_data = &gumstix_pcmcia_ops;
+
+ ret = platform_device_add(gumstix_pcmcia_device);
+ if (ret)
+ platform_device_put(gumstix_pcmcia_device);
+
+ return ret;
+}
+
+static void __exit gumstix_pcmcia_exit(void)
+{
+ /*
+ * This call is supposed to free our gumstix_pcmcia_device.
+ * Unfortunately platform_device don't have a free method, and
+ * we can't assume it's free of any reference at this point so we
+ * can't free it either.
+ */
+ platform_device_unregister(gumstix_pcmcia_device);
+}
+
+fs_initcall(gumstix_pcmcia_init);
+module_exit(gumstix_pcmcia_exit);
+
+MODULE_LICENSE("GPL");

764
target/linux/pxa/patches-2.6.21/006-defconfig.patch
View File

@ -1,764 +0,0 @@
--- /dev/null
+++ b/arch/arm/configs/gumstix_defconfig
@@ -0,0 +1,761 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_HOTPLUG=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE_PB is not set
+# CONFIG_ARCH_IMX is not set
+
+#
+# Intel PXA2xx Implementations
+#
+CONFIG_ARCH_GUMSTIX=y
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_GUMSTIX_ORIG is not set
+CONFIG_ARCH_GUMSTIX_F=y
+CONFIG_PXA25x=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_MINICACHE=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+CONFIG_XSCALE_PMU=y
+
+#
+# General setup
+#
+# CONFIG_ZBOOT_ROM is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_PXA=y
+# CONFIG_CPU_FREQ_PROC_INTF is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=m
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_PROC_GPIO=m
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_PXA2XX=m
+
+#
+# At least one math emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_PM is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_ARTHUR is not set
+CONFIG_CMDLINE="console=ttyS0,115200n8 root=1f02 rootfstype=jffs2 reboot=cold,hard"
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x00400000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_GUMSTIX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_EDB7312 is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=m
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_GUMSTIX=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIDTL1 is not set
+# CONFIG_BT_HCIBT3C is not set
+# CONFIG_BT_HCIBLUECARD is not set
+# CONFIG_BT_HCIBTUART is not set
+CONFIG_BT_HCIVHCI=m
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+CONFIG_SMC91X=m
+CONFIG_SMC91X_GUMSTIX=m
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# PCMCIA network device support
+#
+# CONFIG_NET_PCMCIA is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=m
+CONFIG_BLK_DEV_IDE=m
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+# CONFIG_BLK_DEV_IDEDISK is not set
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDE_TASKFILE_IO is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=m
+# CONFIG_IDE_ARM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=m
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=y
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_SA1100_RTC=m
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_NAND is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+# CONFIG_JFFS2_CMODE_PRIORITY is not set
+CONFIG_JFFS2_CMODE_SIZE=y
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=m
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# Misc devices
+#
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_GUMSTIX=m
+# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_USB_GADGET_PXA2XX=y
+CONFIG_USB_PXA2XX=m
+# CONFIG_USB_PXA2XX_SMALL is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_SA1100 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+
+#
+# MMC/SD Card support
+#
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_PXA=m
+
+#
+# Kernel hacking
+#
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_INFO is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y

165
target/linux/pxa/patches-2.6.21/007-flash.patch
View File

@ -1,165 +0,0 @@
--- /dev/null
+++ b/drivers/mtd/maps/gumstix-flash.c
@@ -0,0 +1,136 @@
+/*
+ * Map driver for the Gumstix platform
+ *
+ * Author: Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/arch/gumstix.h>
+
+
+#define ROM_ADDR 0x00000000
+#define FLASH_ADDR 0x00000000
+
+#define WINDOW_SIZE 64*1024*1024
+
+static struct map_info gumstix_flash_maps[1] = { {
+ .name = "Gumstix Flash ROM",
+ .size = WINDOW_SIZE,
+ .phys = FLASH_ADDR,
+ .bankwidth = 2,
+} };
+
+static struct mtd_partition gumstix_flash_partitions[] = {
+ {
+ .name = "Bootloader",
+ .size = 0x00040000,
+ .offset = FLASH_ADDR
+ },{
+ .name = "RootFS",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND
+ }
+};
+
+static struct mtd_info *mymtds[1];
+static struct mtd_partition *parsed_parts[1];
+static int nr_parsed_parts[1];
+
+static const char *probes[] = { NULL };
+
+static int __init gumstix_flashmap_init(void)
+{
+ int ret = 0, i;
+
+ for (i = 0; i < 1; i++) {
+ gumstix_flash_maps[i].virt = ioremap(gumstix_flash_maps[i].phys, WINDOW_SIZE);
+ if (!gumstix_flash_maps[i].virt) {
+ printk(KERN_WARNING "Failed to ioremap %s\n", gumstix_flash_maps[i].name);
+ if (!ret)
+ ret = -ENOMEM;
+ continue;
+ }
+ simple_map_init(&gumstix_flash_maps[i]);
+
+ printk(KERN_NOTICE "Probing %s at physical address 0x%08lx (%d-bit bankwidth)\n",
+ gumstix_flash_maps[i].name, gumstix_flash_maps[i].phys,
+ gumstix_flash_maps[i].bankwidth * 8);
+
+ mymtds[i] = do_map_probe("cfi_probe", &gumstix_flash_maps[i]);
+
+ if (!mymtds[i]) {
+ iounmap((void *)gumstix_flash_maps[i].virt);
+ if (gumstix_flash_maps[i].cached)
+ iounmap(gumstix_flash_maps[i].cached);
+ if (!ret)
+ ret = -EIO;
+ continue;
+ }
+ mymtds[i]->owner = THIS_MODULE;
+
+ ret = parse_mtd_partitions(mymtds[i], probes,
+ &parsed_parts[i], 0);
+
+ if (ret > 0)
+ nr_parsed_parts[i] = ret;
+ }
+
+ if (!mymtds[0])
+ return ret;
+
+ for (i = 0; i < 1; i++) {
+ if (!mymtds[i]) {
+ printk(KERN_WARNING "%s is absent. Skipping\n", gumstix_flash_maps[i].name);
+ } else if (nr_parsed_parts[i]) {
+ add_mtd_partitions(mymtds[i], parsed_parts[i], nr_parsed_parts[i]);
+ } else if (!i) {
+ printk("Using static partitions on %s\n", gumstix_flash_maps[i].name);
+ add_mtd_partitions(mymtds[i], gumstix_flash_partitions, ARRAY_SIZE(gumstix_flash_partitions));
+ } else {
+ printk("Registering %s as whole device\n", gumstix_flash_maps[i].name);
+ add_mtd_device(mymtds[i]);
+ }
+ }
+ return 0;
+}
+
+static void __exit gumstix_flashmap_cleanup(void)
+{
+ int i;
+ for (i = 0; i < 1; i++) {
+ if (!mymtds[i])
+ continue;
+
+ if (nr_parsed_parts[i] || !i)
+ del_mtd_partitions(mymtds[i]);
+ else
+ del_mtd_device(mymtds[i]);
+
+ map_destroy(mymtds[i]);
+ iounmap((void *)gumstix_flash_maps[i].virt);
+ if (gumstix_flash_maps[i].cached)
+ iounmap(gumstix_flash_maps[i].cached);
+
+ if (parsed_parts[i])
+ kfree(parsed_parts[i]);
+ }
+}
+
+module_init(gumstix_flashmap_init);
+module_exit(gumstix_flashmap_cleanup);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Gumstix, Inc. <gumstix-users@lists.sf.net>");
+MODULE_DESCRIPTION("MTD map driver for the Gumstix Platform");
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -131,6 +131,13 @@ config MTD_SBC_GXX
More info at
<http://www.arcomcontrols.com/products/icp/pc104/processors/SBC_GX1.htm>.
+config MTD_GUMSTIX
+ tristate "CFI Flash device mapped on Gumstix"
+ depends on ARCH_GUMSTIX && MTD_CFI_INTELEXT && MTD_PARTITIONS
+ help
+ This provides a driver for the on-board flash of the Gumstix
+ single board computers.
+
config MTD_LUBBOCK
tristate "CFI Flash device mapped on Intel Lubbock XScale eval board"
depends on ARCH_LUBBOCK && MTD_CFI_INTELEXT && MTD_PARTITIONS
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o
obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o
obj-$(CONFIG_MTD_LUBBOCK) += lubbock-flash.o
+obj-$(CONFIG_MTD_GUMSTIX) += gumstix-flash.o
obj-$(CONFIG_MTD_MAINSTONE) += mainstone-flash.o
obj-$(CONFIG_MTD_MBX860) += mbx860.o
obj-$(CONFIG_MTD_CEIVA) += ceiva.o

63
target/linux/pxa/patches-2.6.21/008-pxa2xx_udc.patch
View File

@ -1,63 +0,0 @@
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa2xx_udc.c
@@ -51,6 +51,7 @@
#include <asm/mach-types.h>
#include <asm/unaligned.h>
#include <asm/hardware.h>
+#include <asm/mach/irq.h>
#ifdef CONFIG_ARCH_PXA
#include <asm/arch/pxa-regs.h>
#endif
@@ -101,6 +102,10 @@ static const char ep0name [] = "ep0";
#endif
+#ifdef CONFIG_ARCH_GUMSTIX
+#undef CONFIG_USB_PXA2XX_SMALL
+#endif
+
#include "pxa2xx_udc.h"
@@ -2541,6 +2546,41 @@ static int __init pxa2xx_udc_probe(struc
}
#endif
+ /* Reset UDCCS register to be able to recover from whatever
+ * state UDC was previously in. */
+ *dev->ep[ 2].reg_udccs = UDCCS_BO_RPC | UDCCS_BO_SST;
+#ifndef CONFIG_USB_PXA2XX_SMALL
+ *dev->ep[ 7].reg_udccs = UDCCS_BO_RPC | UDCCS_BO_SST;
+ *dev->ep[12].reg_udccs = UDCCS_BO_RPC | UDCCS_BO_SST;
+#endif
+
+ *dev->ep[ 1].reg_udccs = UDCCS_BI_TPC | UDCCS_BI_FTF |
+ UDCCS_BI_TUR | UDCCS_BI_SST | UDCCS_BI_TSP;
+#ifndef CONFIG_USB_PXA2XX_SMALL
+ *dev->ep[ 6].reg_udccs = UDCCS_BI_TPC | UDCCS_BI_FTF |
+ UDCCS_BI_TUR | UDCCS_BI_SST | UDCCS_BI_TSP;
+ *dev->ep[11].reg_udccs = UDCCS_BI_TPC | UDCCS_BI_FTF |
+ UDCCS_BI_TUR | UDCCS_BI_SST | UDCCS_BI_TSP;
+
+ *dev->ep[ 3].reg_udccs = UDCCS_II_TPC | UDCCS_II_FTF |
+ UDCCS_II_TUR | UDCCS_II_TSP;
+ *dev->ep[ 8].reg_udccs = UDCCS_II_TPC | UDCCS_II_FTF |
+ UDCCS_II_TUR | UDCCS_II_TSP;
+ *dev->ep[13].reg_udccs = UDCCS_II_TPC | UDCCS_II_FTF |
+ UDCCS_II_TUR | UDCCS_II_TSP;
+
+ *dev->ep[ 4].reg_udccs = UDCCS_IO_RPC | UDCCS_IO_ROF;
+ *dev->ep[ 9].reg_udccs = UDCCS_IO_RPC | UDCCS_IO_ROF;
+ *dev->ep[11].reg_udccs = UDCCS_IO_RPC | UDCCS_IO_ROF;
+
+ *dev->ep[ 5].reg_udccs = UDCCS_INT_TPC | UDCCS_INT_FTF |
+ UDCCS_INT_TUR | UDCCS_INT_SST;
+ *dev->ep[10].reg_udccs = UDCCS_INT_TPC | UDCCS_INT_FTF |
+ UDCCS_INT_TUR | UDCCS_INT_SST;
+ *dev->ep[15].reg_udccs = UDCCS_INT_TPC | UDCCS_INT_FTF |
+ UDCCS_INT_TUR | UDCCS_INT_SST;
+#endif
+
/* other non-static parts of init */
dev->dev = &pdev->dev;
dev->mach = pdev->dev.platform_data;

113
target/linux/pxa/patches-2.6.21/009-bkpxa-pxa-cpu.patch
View File

@ -1,113 +0,0 @@
Status: WORKS
PXA CPU enhancements
from patch 1667:
- 64K PTEs
from hh.org-cvs:
- support in pxa_gpio_mode for active low
#
# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
#
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -474,11 +474,62 @@ ENTRY(cpu_xscale_set_pte_ext)
movne r2, #0 @ no -> fault
str r2, [r0] @ hardware version
+
+ @ We try to map 64K page entries when possible.
+ @ We do that for kernel space only since the usage pattern from
+ @ the setting of VM area is quite simple. User space is not worth
+ @ the implied complexity because of ever randomly changing PTEs
+ @ (page aging, swapout, etc) requiring constant coherency checks.
+ @ Since PTEs are usually set in increasing order, we test the
+ @ possibility for a large page only when given the last PTE of a
+ @ 64K boundary.
+ tsteq r1, #L_PTE_USER
+ andeq r1, r0, #(15 << 2)
+ teqeq r1, #(15 << 2)
+ beq 1f
+
mov ip, #0
mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
mov pc, lr
+ @ See if we have 16 identical PTEs but with consecutive base addresses
+1: bic r3, r2, #0x0000f000
+ mov r1, #0x0000f000
+2: eor r2, r2, r3
+ teq r2, r1
+ bne 4f
+ subs r1, r1, #0x00001000
+ ldr r2, [r0, #-4]!
+ bne 2b
+ eors r2, r2, r3
+ bne 4f
+
+ @ Now create our LARGE PTE from the current EXT one.
+ bic r3, r3, #PTE_TYPE_MASK
+ orr r3, r3, #PTE_TYPE_LARGE
+ and r2, r3, #0x30 @ EXT_AP --> LARGE_AP0
+ orr r2, r2, r2, lsl #2 @ add LARGE_AP1
+ orr r2, r2, r2, lsl #4 @ add LARGE_AP3 + LARGE_AP2
+ and r1, r3, #0x3c0 @ EXT_TEX
+ bic r3, r3, #0x3c0
+ orr r2, r2, r1, lsl #(12 - 6) @ --> LARGE_TEX
+ orr r2, r2, r3 @ add remaining bits
+
+ @ then put it in the pagetable
+ mov r3, r2
+3: strd r2, [r0], #8
+ tst r0, #(15 << 2)
+ bne 3b
+
+ @ Then sync the 2 corresponding cache lines
+ sub r0, r0, #(16 << 2)
+ mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
+4: orr r0, r0, #(15 << 2)
+ mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
+ mov ip, #0
+ mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
+ mov pc, lr
.ltorg
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1345,6 +1345,7 @@
#define GPIO_ALT_FN_2_OUT 0x280
#define GPIO_ALT_FN_3_IN 0x300
#define GPIO_ALT_FN_3_OUT 0x380
+#define GPIO_ACTIVE_LOW 0x1000
#define GPIO_MD_MASK_NR 0x07f
#define GPIO_MD_MASK_DIR 0x080
#define GPIO_MD_MASK_FN 0x300
@@ -1597,6 +1598,25 @@
#define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */
#define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */
+#define PWER_GPIO(Nb) (1 << Nb) /* GPIO [0..15] wake-up enable */
+#define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */
+#define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */
+#define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */
+#define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */
+#define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */
+#define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */
+#define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */
+#define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */
+#define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */
+#define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */
+#define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */
+#define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */
+#define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */
+#define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */
+#define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */
+#define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */
+#define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */
+
/*
* SSP Serial Port Registers

395
target/linux/pxa/patches-2.6.21/010-bkpxa-pxa-cpufreq.patch
View File

@ -1,395 +0,0 @@
Status: WORKS
PXA CPU frequency change support
added mods from Stefan Eletzhofer and Lothar Weissmann
#
# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
#
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -800,7 +800,7 @@ config KEXEC
endmenu
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA )
menu "CPU Frequency scaling"
@@ -838,6 +838,12 @@ config CPU_FREQ_IMX
endmenu
+config CPU_FREQ_PXA
+ bool
+ depends on CPU_FREQ && ARCH_PXA
+ default y
+ select CPU_FREQ_DEFAULT_GOV_USERSPACE
+
endif
menu "Floating point emulation"
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_LEDS) += $(led-y)
# Misc features
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_PXA_SSP) += ssp.o
+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
ifeq ($(CONFIG_PXA27x),y)
obj-$(CONFIG_PM) += standby.o
--- /dev/null
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -0,0 +1,321 @@
+/*
+ * linux/arch/arm/mach-pxa/cpu-pxa.c
+ *
+ * Copyright (C) 2002,2003 Intrinsyc Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * History:
+ * 31-Jul-2002 : Initial version [FB]
+ * 29-Jan-2003 : added PXA255 support [FB]
+ * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
+ *
+ * Note:
+ * This driver may change the memory bus clock rate, but will not do any
+ * platform specific access timing changes... for example if you have flash
+ * memory connected to CS0, you will need to register a platform specific
+ * notifier which will adjust the memory access strobes to maintain a
+ * minimum strobe width.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+
+#define DEBUG 0
+
+#ifdef DEBUG
+ static unsigned int freq_debug = DEBUG;
+ MODULE_PARM(freq_debug, "i");
+ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
+#else
+ #define freq_debug 0
+#endif
+
+typedef struct
+{
+ unsigned int khz;
+ unsigned int membus;
+ unsigned int cccr;
+ unsigned int div2;
+} pxa_freqs_t;
+
+/* Define the refresh period in mSec for the SDRAM and the number of rows */
+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
+#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
+#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
+
+#define CCLKCFG_TURBO 0x1
+#define CCLKCFG_FCS 0x2
+#define PXA25x_MIN_FREQ 99500
+#define PXA25x_MAX_FREQ 398100
+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK 0xFFF
+
+
+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
+static pxa_freqs_t pxa255_run_freqs[] =
+{
+ /* CPU MEMBUS CCCR DIV2*/
+ { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
+ {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
+ {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
+ {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */
+ {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
+ {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */
+ {0,}
+};
+#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
+
+static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
+
+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
+static pxa_freqs_t pxa255_turbo_freqs[] =
+{
+ /* CPU MEMBUS CCCR DIV2*/
+ { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */
+ {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */
+ {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */
+ {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */
+ {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */
+ {0,}
+};
+#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
+
+static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
+
+extern unsigned get_clk_frequency_khz(int info);
+
+/* find a valid frequency point */
+static int pxa_verify_policy(struct cpufreq_policy *policy)
+{
+ int ret;
+ struct cpufreq_frequency_table *pxa_freqs_table;
+
+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+ pxa_freqs_table = pxa255_run_freq_table;
+ } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+ pxa_freqs_table = pxa255_turbo_freq_table;
+ } else {
+ printk("CPU PXA: Unknown policy found. "
+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
+ pxa_freqs_table = pxa255_run_freq_table;
+ }
+ ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
+
+ if(freq_debug) {
+ printk("Verified CPU policy: %dKhz min to %dKhz max\n",
+ policy->min, policy->max);
+ }
+
+ return ret;
+}
+
+static int pxa_set_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
+{
+ int idx;
+ unsigned long cpus_allowed;
+ int cpu = policy->cpu;
+ struct cpufreq_freqs freqs;
+ pxa_freqs_t *pxa_freq_settings;
+ struct cpufreq_frequency_table *pxa_freqs_table;
+ unsigned long flags;
+ unsigned int unused;
+ unsigned int preset_mdrefr, postset_mdrefr;
+
+ /*
+ * Save this threads cpus_allowed mask.
+ */
+ cpus_allowed = current->cpus_allowed;
+
+ /*
+ * Bind to the specified CPU. When this call returns,
+ * we should be running on the right CPU.
+ */
+ set_cpus_allowed(current, 1 << cpu);
+ BUG_ON(cpu != smp_processor_id());
+
+ /* Get the current policy */
+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+ pxa_freq_settings = pxa255_run_freqs;
+ pxa_freqs_table = pxa255_run_freq_table;
+ }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+ pxa_freq_settings = pxa255_turbo_freqs;
+ pxa_freqs_table = pxa255_turbo_freq_table;
+ }else {
+ printk("CPU PXA: Unknown policy found. "
+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
+ pxa_freq_settings = pxa255_run_freqs;
+ pxa_freqs_table = pxa255_run_freq_table;
+ }
+
+ /* Lookup the next frequency */
+ if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
+ target_freq, relation, &idx)) {
+ return -EINVAL;
+ }
+
+ freqs.old = policy->cur;
+ freqs.new = pxa_freq_settings[idx].khz;
+ freqs.cpu = policy->cpu;
+ if(freq_debug) {
+ printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
+ freqs.new/1000, (pxa_freq_settings[idx].div2) ?
+ (pxa_freq_settings[idx].membus/2000) :
+ (pxa_freq_settings[idx].membus/1000));
+ }
+
+ void *ramstart = phys_to_virt(0xa0000000);
+
+ /*
+ * Tell everyone what we're about to do...
+ * you should add a notify client with any platform specific
+ * Vcc changing capability
+ */
+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+ /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
+ * we need to preset the smaller DRI before the change. If we're speeding
+ * up we need to set the larger DRI value after the change.
+ */
+ preset_mdrefr = postset_mdrefr = MDREFR;
+ if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
+ MDREFR_DRI(pxa_freq_settings[idx].membus);
+ }
+ postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
+ MDREFR_DRI(pxa_freq_settings[idx].membus);
+
+ /* If we're dividing the memory clock by two for the SDRAM clock, this
+ * must be set prior to the change. Clearing the divide must be done
+ * after the change.
+ */
+ if(pxa_freq_settings[idx].div2) {
+ preset_mdrefr |= MDREFR_DB2_MASK;
+ postset_mdrefr |= MDREFR_DB2_MASK;
+ } else {
+ postset_mdrefr &= ~MDREFR_DB2_MASK;
+ }
+
+ local_irq_save(flags);
+
+ /* Set new the CCCR */
+ CCCR = pxa_freq_settings[idx].cccr;
+
+ __asm__ __volatile__(" \
+ ldr r4, [%1] ; /* load MDREFR */ \
+ b 2f ; \
+ .align 5 ; \
+1: \
+ str %4, [%1] ; /* preset the MDREFR */ \
+ mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
+ str %5, [%1] ; /* postset the MDREFR */ \
+ \
+ b 3f ; \
+2: b 1b ; \
+3: nop ; \
+ "
+ : "=&r" (unused)
+ : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
+ "r" (preset_mdrefr), "r" (postset_mdrefr)
+ : "r4", "r5");
+ local_irq_restore(flags);
+
+ /*
+ * Restore the CPUs allowed mask.
+ */
+ set_cpus_allowed(current, cpus_allowed);
+
+ /*
+ * Tell everyone what we've just done...
+ * you should add a notify client with any platform specific
+ * SDRAM refresh timer adjustments
+ */
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+ return 0;
+}
+
+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+{
+ unsigned long cpus_allowed;
+ unsigned int cpu = policy->cpu;
+ int i;
+
+ cpus_allowed = current->cpus_allowed;
+
+ set_cpus_allowed(current, 1 << cpu);
+ BUG_ON(cpu != smp_processor_id());
+
+ /* set default policy and cpuinfo */
+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
+ policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
+ policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+ policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
+ policy->cur = get_clk_frequency_khz(0); /* current freq */
+ policy->min = policy->max = policy->cur;
+
+ /* Generate the run cpufreq_frequency_table struct */
+ for(i=0;i<NUM_RUN_FREQS;i++) {
+ pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
+ pxa255_run_freq_table[i].index = i;
+ }
+ pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
+ /* Generate the turbo cpufreq_frequency_table struct */
+ for(i=0;i<NUM_TURBO_FREQS;i++) {
+ pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
+ pxa255_turbo_freq_table[i].index = i;
+ }
+ pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+ set_cpus_allowed(current, cpus_allowed);
+ printk(KERN_INFO "PXA CPU frequency change support initialized\n");
+
+ return 0;
+}
+
+static struct cpufreq_driver pxa_cpufreq_driver = {
+ .verify = pxa_verify_policy,
+ .target = pxa_set_target,
+ .init = pxa_cpufreq_init,
+ .name = "PXA25x",
+};
+
+static int __init pxa_cpu_init(void)
+{
+ return cpufreq_register_driver(&pxa_cpufreq_driver);
+}
+
+static void __exit pxa_cpu_exit(void)
+{
+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
+}
+
+
+MODULE_AUTHOR ("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
+MODULE_LICENSE("GPL");
+module_init(pxa_cpu_init);
+module_exit(pxa_cpu_exit);
+
--- a/Documentation/cpu-freq/user-guide.txt
+++ b/Documentation/cpu-freq/user-guide.txt
@@ -18,7 +18,7 @@
Contents:
---------
1. Supported Architectures and Processors
-1.1 ARM
+1.1 ARM, PXA
1.2 x86
1.3 sparc64
1.4 ppc
@@ -37,14 +37,15 @@ Contents:
1. Supported Architectures and Processors
=========================================
-1.1 ARM
--------
+1.1 ARM, PXA
+------------
The following ARM processors are supported by cpufreq:
ARM Integrator
ARM-SA1100
ARM-SA1110
+Intel PXA
1.2 x86

318
target/linux/pxa/patches-2.6.21/011-proc-gpio.patch
View File

@ -1,318 +0,0 @@
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -505,6 +505,8 @@ config PCI_HOST_VIA82C505
depends on PCI && ARCH_SHARK
default y
+source "drivers/gpio/Kconfig"
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -81,3 +81,4 @@ obj-$(CONFIG_GENERIC_TIME) += clocksourc
obj-$(CONFIG_DMA_ENGINE) += dma/
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
+obj-$(CONFIG_PROC_GPIO) += gpio/
--- /dev/null
+++ b/drivers/gpio/Kconfig
@@ -0,0 +1,13 @@
+config PROC_GPIO
+ tristate "GPIO /proc interface"
+ depends on PXA25x || PXA27x
+ help
+ This enables an interface under /proc/gpio which allows reading or setting
+ of any GPIO, and also changing the GPIO alt function mode of any line.
+
+config PROC_GPIO_DEBUG
+ boolean "Enable /proc/gpio debug logging"
+ depends on PROC_GPIO
+ help
+ This enables printk logging of activity done through /proc/gpio
+
--- /dev/null
+++ b/drivers/gpio/Makefile
@@ -0,0 +1,2 @@
+# Expose GPIOs under /proc
+obj-$(CONFIG_PROC_GPIO) += proc_gpio.o
--- /dev/null
+++ b/drivers/gpio/proc_gpio.c
@@ -0,0 +1,276 @@
+/*
+ *
+ * PXA25x GPIOs exposed under /proc for reading and writing
+ * They will show up under /proc/gpio/NN
+ *
+ * Based on patch 1773/1 in the arm kernel patch repository at arm.linux.co.uk
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/uaccess.h>
+
+static struct proc_dir_entry *proc_gpio_parent;
+static struct proc_dir_entry *proc_gpios[PXA_LAST_GPIO + 1];
+
+typedef struct
+{
+ int gpio;
+ char name[32];
+} gpio_summary_type;
+
+static gpio_summary_type gpio_summaries[PXA_LAST_GPIO + 1];
+
+static int proc_gpio_write(struct file *file, const char __user *buf,
+ unsigned long count, void *data)
+{
+ char *cur, lbuf[count + 1];
+ gpio_summary_type *summary = data;
+ u32 altfn, direction, setclear, gafr;
+
+ if (!capable(CAP_SYS_ADMIN))
+ return -EACCES;
+
+ memset(lbuf, 0, count + 1);
+
+ if (copy_from_user(lbuf, buf, count))
+ return -EFAULT;
+
+ cur = lbuf;
+
+ // Initialize to current state
+ altfn = ((GAFR(summary->gpio) >> ((summary->gpio & 0x0f) << 0x01)) & 0x03);
+ direction = GPDR(summary->gpio) & GPIO_bit(summary->gpio);
+ setclear = GPLR(summary->gpio) & GPIO_bit(summary->gpio);
+ while(1)
+ {
+ // We accept options: {GPIO|AF1|AF2|AF3}, {set|clear}, {in|out}
+ // Anything else is an error
+ while(cur[0] && (isspace(cur[0]) || ispunct(cur[0]))) cur = &(cur[1]);
+
+ if('\0' == cur[0]) break;
+
+ // Ok, so now we're pointing at the start of something
+ switch(cur[0])
+ {
+ case 'G':
+ // Check that next is "PIO" -- '\0' will cause safe short-circuit if end of buf
+ if(!(cur[1] == 'P' && cur[2] == 'I' && cur[3] == 'O')) goto parse_error;
+ // Ok, so set this GPIO to GPIO (non-ALT) function
+ altfn = 0;
+ cur = &(cur[4]);
+ break;
+ case 'A':
+ if(!(cur[1] == 'F' && cur[2] >= '1' && cur[2] <= '3')) goto parse_error;
+ altfn = cur[2] - '0';
+ cur = &(cur[3]);
+ break;
+ case 's':
+ if(!(cur[1] == 'e' && cur[2] == 't')) goto parse_error;
+ setclear = 1;
+ cur = &(cur[3]);
+ break;
+ case 'c':
+ if(!(cur[1] == 'l' && cur[2] == 'e' && cur[3] == 'a' && cur[4] == 'r')) goto parse_error;
+ setclear = 0;
+ cur = &(cur[5]);
+ break;
+ case 'i':
+ if(!(cur[1] == 'n')) goto parse_error;
+ direction = 0;
+ cur = &(cur[2]);
+ break;
+ case 'o':
+ if(!(cur[1] == 'u' && cur[2] == 't')) goto parse_error;
+ direction = 1;
+ cur = &(cur[3]);
+ break;
+ default: goto parse_error;
+ }
+ }
+ // Ok, now set gpio mode and value
+ if(direction)
+ GPDR(summary->gpio) |= GPIO_bit(summary->gpio);
+ else
+ GPDR(summary->gpio) &= ~GPIO_bit(summary->gpio);
+
+ gafr = GAFR(summary->gpio) & ~(0x3 << (((summary->gpio) & 0xf)*2));
+ GAFR(summary->gpio) = gafr | (altfn << (((summary->gpio) & 0xf)*2));
+
+ if(direction && !altfn)
+ {
+ if(setclear) GPSR(summary->gpio) = GPIO_bit(summary->gpio);
+ else GPCR(summary->gpio) = GPIO_bit(summary->gpio);
+ }
+
+#ifdef CONFIG_PROC_GPIO_DEBUG
+ printk(KERN_INFO "Set (%s,%s,%s) via /proc/gpio/%s\n",altfn ? (altfn == 1 ? "AF1" : (altfn == 2 ? "AF2" : "AF3")) : "GPIO",
+ direction ? "out" : "in",
+ setclear ? "set" : "clear",
+ summary->name);
+#endif
+
+ return count;
+
+parse_error:
+ printk(KERN_CRIT "Parse error: Expect \"[GPIO|AF1|AF2|AF3]|[set|clear]|[in|out] ...\"\n");
+ return -EINVAL;
+}
+
+static int proc_gpio_read(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ gpio_summary_type *summary = data;
+ int len, i, af;
+ i = summary->gpio;
+
+ p += sprintf(p, "%d\t%s\t%s\t%s\n", i,
+ (af = ((GAFR(i) >> ((i & 0x0f) << 0x01)) & 0x03)) ? (af == 1 ? "AF1" : (af == 2 ? "AF2" : "AF3")) : "GPIO",
+ (GPDR(i) & GPIO_bit(i)) ? "out" : "in",
+ (GPLR(i) & GPIO_bit(i)) ? "set" : "clear");
+
+ len = (p - page) - off;
+
+ if(len < 0)
+ {
+ len = 0;
+ }
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+
+#ifdef CONFIG_PXA25x
+static const char const *GAFR_DESC[] = { "GAFR0_L", "GAFR0_U", "GAFR1_L", "GAFR1_U", "GAFR2_L", "GAFR2_U" };
+#elif defined(CONFIG_PXA27x)
+static const char const *GAFR_DESC[] = { "GAFR0_L", "GAFR0_U", "GAFR1_L", "GAFR1_U", "GAFR2_L", "GAFR2_U", "GAFR3_L", "GAFR3_U" };
+#endif
+
+static int proc_gafr_read(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ int i, len;
+
+ for(i=0; i<ARRAY_SIZE(GAFR_DESC); i++)
+ {
+ p += sprintf(p, "%s: %08x\n", GAFR_DESC[i], GAFR(i*16));
+ }
+
+ len = (p - page) - off;
+
+ if(len < 0)
+ {
+ len = 0;
+ }
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+static int proc_gpdr_read(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ int i, len;
+
+ for(i=0; i<=2; i++)
+ {
+ p += sprintf(p, "GPDR%d: %08x\n", i, GPDR(i * 32));
+ }
+
+ len = (p - page) - off;
+
+ if(len < 0)
+ {
+ len = 0;
+ }
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+static int proc_gplr_read(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ int i, len;
+
+ for(i=0; i<=2; i++)
+ {
+ p += sprintf(p, "GPLR%d: %08x\n", i, GPLR(i * 32));
+ }
+
+ len = (p - page) - off;
+
+ if(len < 0)
+ {
+ len = 0;
+ }
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+static int __init gpio_init(void)
+{
+ int i;
+
+ proc_gpio_parent = create_proc_entry("gpio", S_IFDIR | S_IRUGO | S_IXUGO, NULL);
+ if(!proc_gpio_parent) return 0;
+
+ for(i=0; i < (PXA_LAST_GPIO+1); i++)
+ {
+ gpio_summaries[i].gpio = i;
+ sprintf(gpio_summaries[i].name, "GPIO%d", i);
+ proc_gpios[i] = create_proc_entry(gpio_summaries[i].name, 0644, proc_gpio_parent);
+ if(proc_gpios[i])
+ {
+ proc_gpios[i]->data = &gpio_summaries[i];
+ proc_gpios[i]->read_proc = proc_gpio_read;
+ proc_gpios[i]->write_proc = proc_gpio_write;
+ }
+ }
+
+ create_proc_read_entry("GAFR", 0444, proc_gpio_parent, proc_gafr_read, NULL);
+ create_proc_read_entry("GPDR", 0444, proc_gpio_parent, proc_gpdr_read, NULL);
+ create_proc_read_entry("GPLR", 0444, proc_gpio_parent, proc_gplr_read, NULL);
+
+ return 0;
+}
+
+static void gpio_exit(void)
+{
+ int i;
+
+ remove_proc_entry("GAFR", proc_gpio_parent);
+ remove_proc_entry("GPDR", proc_gpio_parent);
+ remove_proc_entry("GPLR", proc_gpio_parent);
+
+ for(i=0; i < (PXA_LAST_GPIO+1); i++)
+ {
+ if(proc_gpios[i]) remove_proc_entry(gpio_summaries[i].name, proc_gpio_parent);
+ }
+ if(proc_gpio_parent) remove_proc_entry("gpio", NULL);
+}
+
+module_init(gpio_init);
+module_exit(gpio_exit);
+MODULE_LICENSE("GPL");

60
target/linux/pxa/patches-2.6.21/012-serial-ether-addr.patch
View File

@ -1,60 +0,0 @@
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2249,6 +2249,38 @@ static u8 __devinit nibble (unsigned cha
return 0;
}
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (2 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
static int __devinit get_ether_addr(const char *str, u8 *dev_addr)
{
if (str) {
@@ -2266,8 +2298,16 @@ static int __devinit get_ether_addr(cons
if (is_valid_ether_addr (dev_addr))
return 0;
}
- random_ether_addr(dev_addr);
- return 1;
+ if(system_serial_high | system_serial_low)
+ {
+ gen_serial_ether_addr(dev_addr);
+ return 0;
+ }
+ else
+ {
+ random_ether_addr(dev_addr);
+ return 1;
+ }
}
static int __devinit

51
target/linux/pxa/patches-2.6.21/013-cpufreq-better-freqs.patch
View File

@ -1,51 +0,0 @@
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -65,8 +65,8 @@ typedef struct
#define CCLKCFG_TURBO 0x1
#define CCLKCFG_FCS 0x2
-#define PXA25x_MIN_FREQ 99500
-#define PXA25x_MAX_FREQ 398100
+#define PXA25x_MIN_FREQ 99533
+#define PXA25x_MAX_FREQ 530842
#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
#define MDREFR_DRI_MASK 0xFFF
@@ -75,12 +75,14 @@ typedef struct
static pxa_freqs_t pxa255_run_freqs[] =
{
/* CPU MEMBUS CCCR DIV2*/
- { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
- {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
- {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
- {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */
- {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
- {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */
+ { 99533, 99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
+ {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
+ {199066, 99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
+ {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
+ {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
+ {398131, 99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99, SDRAM=99 */
+ {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
+ {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
{0,}
};
#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
@@ -91,11 +93,11 @@ static struct cpufreq_frequency_table px
static pxa_freqs_t pxa255_turbo_freqs[] =
{
/* CPU MEMBUS CCCR DIV2*/
- { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */
- {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */
- {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */
- {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */
- {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */
+ { 99533, 99533, 0x121, 1}, /* run=99, turbo= 99, PXbus=99, SDRAM=50 */
+ {149299, 99533, 0x1a1, 0}, /* run=99, turbo=149, PXbus=99, SDRAM=99 */
+ {199066, 99533, 0x221, 0}, /* run=99, turbo=199, PXbus=99, SDRAM=99 */
+ {298598, 99533, 0x321, 0}, /* run=99, turbo=299, PXbus=99, SDRAM=99 */
+ {398131, 99533, 0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
{0,}
};
#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))

24
target/linux/pxa/patches-2.6.21/014-ethernet-config.patch
View File

@ -1,24 +0,0 @@
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -55,6 +55,21 @@
#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
+#elif defined(CONFIG_ARCH_GUMSTIX)
+#define SMC_CAN_USE_8BIT 0
+#define SMC_CAN_USE_16BIT 1
+#define SMC_CAN_USE_32BIT 0
+#define SMC_NOWAIT 1
+#define SMC_USE_PXA_DMA 1
+#define SMC_IO_SHIFT 0
+#define SMC_inw(a, r) readw((a) + (r))
+#define SMC_outw(v, a, r) writew(v, (a) + (r))
+#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
+#define RPC_LSA_DEFAULT RPC_LED_100_10
+#define RPC_LSB_DEFAULT RPC_LED_TX_RX
+
+
#elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6)
/* We can only do 16-bit reads and writes in the static memory space. */

60
target/linux/pxa/patches-2.6.21/015-smc-ether-addr.patch
View File

@ -1,60 +0,0 @@
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -1815,6 +1815,39 @@ static int __init smc_findirq(void __iom
return probe_irq_off(cookie);
}
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (1 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
+
/*
* Function: smc_probe(unsigned long ioaddr)
*
@@ -2032,15 +2065,13 @@ static int __init smc_probe(struct net_d
THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
if (!is_valid_ether_addr(dev->dev_addr)) {
- printk("%s: Invalid ethernet MAC address. Please "
- "set using ifconfig\n", dev->name);
- } else {
+ gen_serial_ether_addr(dev->dev_addr);
+ }
/* Print the Ethernet address */
printk("%s: Ethernet addr: ", dev->name);
for (i = 0; i < 5; i++)
printk("%2.2x:", dev->dev_addr[i]);
printk("%2.2x\n", dev->dev_addr[5]);
- }
if (lp->phy_type == 0) {
PRINTK("%s: No PHY found\n", dev->name);

38
target/linux/pxa/patches-2.6.21/016-cpufreq-ondemand-by-default.patch
View File

@ -1,38 +0,0 @@
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -52,7 +52,7 @@ config CPU_FREQ_STAT_DETAILS
choice
prompt "Default CPUFreq governor"
- default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
help
This option sets which CPUFreq governor shall be loaded at
@@ -75,6 +75,14 @@ config CPU_FREQ_DEFAULT_GOV_USERSPACE
program shall be able to set the CPU dynamically without having
to enable the userspace governor manually.
+config CPU_FREQ_DEFAULT_GOV_ONDEMAND
+ bool "ondemand"
+ select CPU_FREQ_GOV_ONDEMAND
+ help
+ Use the CPUFreq governor 'ondemand' as default. This sets
+ the frequency dynamically based on CPU load, throttling up
+ and down as necessary.
+
endchoice
config CPU_FREQ_GOV_PERFORMANCE
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -286,6 +286,9 @@ extern struct cpufreq_governor cpufreq_g
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
extern struct cpufreq_governor cpufreq_gov_userspace;
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
+extern struct cpufreq_governor cpufreq_gov_dbs;
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_dbs;
#endif

100
target/linux/pxa/patches-2.6.21/017-modular-init-bluetooth.patch
View File

@ -1,100 +0,0 @@
--- a/net/bluetooth/Kconfig
+++ b/net/bluetooth/Kconfig
@@ -30,6 +30,12 @@ menuconfig BT
Bluetooth kernel modules are provided in the BlueZ packages.
For more information, see <http://www.bluez.org/>.
+config BT_GUMSTIX
+ tristate
+ default m if BT=m
+ default y if BT=y
+ depends on BT && ARCH_GUMSTIX
+
config BT_L2CAP
tristate "L2CAP protocol support"
depends on BT
--- a/net/bluetooth/Makefile
+++ b/net/bluetooth/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_BT_RFCOMM) += rfcomm/
obj-$(CONFIG_BT_BNEP) += bnep/
obj-$(CONFIG_BT_CMTP) += cmtp/
obj-$(CONFIG_BT_HIDP) += hidp/
+obj-$(CONFIG_BT_GUMSTIX)+= gumstix_bluetooth.o
bluetooth-objs := af_bluetooth.o hci_core.o hci_conn.o hci_event.o hci_sock.o hci_sysfs.o lib.o
--- a/net/bluetooth/af_bluetooth.c
+++ b/net/bluetooth/af_bluetooth.c
@@ -327,12 +327,20 @@ static struct net_proto_family bt_sock_f
.create = bt_sock_create,
};
+#ifdef CONFIG_ARCH_GUMSTIX
+extern void gumstix_bluetooth_load(void);
+#endif
+
static int __init bt_init(void)
{
int err;
BT_INFO("Core ver %s", VERSION);
+#ifdef CONFIG_ARCH_GUMSTIX
+ gumstix_bluetooth_load();
+#endif
+
err = bt_sysfs_init();
if (err < 0)
return err;
--- /dev/null
+++ b/net/bluetooth/gumstix_bluetooth.c
@@ -0,0 +1,50 @@
+/*
+ * Gumstix bluetooth module intialization driver
+ *
+ * Author: Craig Hughes
+ * Created: December 9, 2004
+ * Copyright: (C) 2004 Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/delay.h>
+
+#include <asm/arch/gumstix.h>
+
+static void gumstix_bluetooth_load(void)
+{
+}
+
+EXPORT_SYMBOL(gumstix_bluetooth_load);
+
+int __init gumstix_bluetooth_init(void)
+{
+ /* Set up GPIOs to use the BTUART */
+ pxa_gpio_mode(GPIO42_HWRXD_MD);
+ pxa_gpio_mode(GPIO43_HWTXD_MD);
+ pxa_gpio_mode(GPIO44_HWCTS_MD);
+ pxa_gpio_mode(GPIO45_HWRTS_MD);
+
+ return 0;
+}
+
+void __exit gumstix_bluetooth_exit(void)
+{
+}
+
+module_init(gumstix_bluetooth_init);
+module_exit(gumstix_bluetooth_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Craig Hughes <craig@gumstix.com>");
+MODULE_DESCRIPTION("Gumstix board bluetooth module initialization driver");
+MODULE_VERSION("1:0.1");

195
target/linux/pxa/patches-2.6.21/018-modular-init-smc91x.patch
View File

@ -1,195 +0,0 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -959,6 +959,12 @@ config SMC91X
module, say M here and read <file:Documentation/modules.txt> as well
as <file:Documentation/networking/net-modules.txt>.
+config SMC91X_GUMSTIX
+ tristate
+ default m if SMC91X=m
+ default y if SMC91X=y
+ depends on SMC91X && ARCH_GUMSTIX
+
config SMC9194
tristate "SMC 9194 support"
depends on NET_VENDOR_SMC && (ISA || MAC && BROKEN)
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -201,6 +201,7 @@ obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
obj-$(CONFIG_MACB) += macb.o
+obj-$(CONFIG_SMC91X_GUMSTIX) += gumstix-smc91x.o
obj-$(CONFIG_ARM) += arm/
obj-$(CONFIG_DEV_APPLETALK) += appletalk/
obj-$(CONFIG_TR) += tokenring/
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -2373,6 +2373,10 @@ static struct platform_driver smc_driver
},
};
+#ifdef CONFIG_ARCH_GUMSTIX
+extern void gumstix_smc91x_load(void);
+#endif
+
static int __init smc_init(void)
{
#ifdef MODULE
@@ -2384,6 +2388,10 @@ static int __init smc_init(void)
#endif
#endif
+#ifdef CONFIG_ARCH_GUMSTIX
+ gumstix_smc91x_load();
+#endif
+
return platform_driver_register(&smc_driver);
}
--- /dev/null
+++ b/drivers/net/gumstix-smc91x.c
@@ -0,0 +1,143 @@
+/*
+ * Gumstix SMC91C111 chip intialization driver
+ *
+ * Author: Craig Hughes
+ * Created: December 9, 2004
+ * Copyright: (C) 2004 Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/delay.h>
+
+#include <asm/arch/gumstix.h>
+
+#define SMC_DEBUG 0
+#include <asm/io.h>
+#include "smc91x.h"
+
+static struct resource gumstix_smc91x0_resources[] = {
+ [0] = {
+ .name = "smc91x-regs",
+ .start = PXA_CS1_PHYS + 0x00000300,
+ .end = PXA_CS1_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = GUMSTIX_ETH0_IRQ,
+ .end = GUMSTIX_ETH0_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource gumstix_smc91x1_resources[] = {
+ [0] = {
+ .name = "smc91x-regs",
+ .start = PXA_CS2_PHYS + 0x00000300,
+ .end = PXA_CS2_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = GUMSTIX_ETH1_IRQ,
+ .end = GUMSTIX_ETH1_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device gumstix_smc91x0_device = {
+ .name = "smc91x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(gumstix_smc91x0_resources),
+ .resource = gumstix_smc91x0_resources,
+};
+
+static struct platform_device gumstix_smc91x1_device = {
+ .name = "smc91x",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(gumstix_smc91x1_resources),
+ .resource = gumstix_smc91x1_resources,
+};
+
+static struct platform_device *smc91x_devices[] = {
+ &gumstix_smc91x0_device,
+ &gumstix_smc91x1_device,
+};
+
+/* First we're going to test if there's a 2nd SMC91C111, and if not, then we'll free up those resources and the GPIO lines
+ * that it would otherwise use. We have no choice but to probe by doing:
+ * Set nCS2 to CS2 mode
+ * Set the reset line to GPIO out mode, and pull it high, then drop it low (to trigger reset)
+ * Read from the memory space to check for the sentinel sequence identifying a likely SMC91C111 device
+ */
+int __init gumstix_smc91x_init(void)
+{
+ unsigned int val, num_devices=ARRAY_SIZE(smc91x_devices);
+ void *ioaddr;
+
+ /* Set up nPWE */
+ pxa_gpio_mode(GPIO49_nPWE_MD);
+
+ pxa_gpio_mode(GPIO78_nCS_2_MD);
+ // If either if statement fails, then we'll drop out and turn_off_eth1,
+ // if both succeed, then we'll skip that and just proceed with 2 cards
+ if(request_mem_region(gumstix_smc91x1_resources[0].start, SMC_IO_EXTENT, "smc91x probe"))
+ {
+ ioaddr = ioremap(gumstix_smc91x1_resources[0].start, SMC_IO_EXTENT);
+ val = ioread16(ioaddr + BANK_SELECT);
+ iounmap(ioaddr);
+ release_mem_region(gumstix_smc91x1_resources[0].start, SMC_IO_EXTENT);
+ if ((val & 0xFF00) == 0x3300) {
+ goto proceed;
+ }
+ }
+
+turn_off_eth1:
+ // This is apparently not an SMC91C111
+ // So, let's decrement the number of devices to request, and reset the GPIO lines to GPIO IN mode
+ num_devices--;
+ smc91x_devices[1] = NULL;
+ pxa_gpio_mode(78 | GPIO_IN);
+
+proceed:
+ pxa_gpio_mode(GPIO15_nCS_1_MD);
+
+ if(smc91x_devices[1]) pxa_gpio_mode(GPIO_GUMSTIX_ETH1_RST_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_ETH0_RST_MD);
+ if(smc91x_devices[1]) GPSR(GPIO_GUMSTIX_ETH1_RST) = GPIO_bit(GPIO_GUMSTIX_ETH1_RST);
+ GPSR(GPIO_GUMSTIX_ETH0_RST) = GPIO_bit(GPIO_GUMSTIX_ETH0_RST);
+ udelay(1); // Hold RESET for at least 100ns
+ if(smc91x_devices[1]) GPCR(GPIO_GUMSTIX_ETH1_RST) = GPIO_bit(GPIO_GUMSTIX_ETH1_RST);
+ GPCR(GPIO_GUMSTIX_ETH0_RST) = GPIO_bit(GPIO_GUMSTIX_ETH0_RST);
+ msleep(50);
+
+ return platform_add_devices(smc91x_devices, num_devices);
+}
+
+void __exit gumstix_smc91x_exit(void)
+{
+ if(smc91x_devices[1] != NULL) platform_device_unregister(&gumstix_smc91x1_device);
+ platform_device_unregister(&gumstix_smc91x0_device);
+}
+
+void gumstix_smc91x_load(void) {}
+EXPORT_SYMBOL(gumstix_smc91x_load);
+
+module_init(gumstix_smc91x_init);
+module_exit(gumstix_smc91x_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Craig Hughes <craig@gumstix.com>");
+MODULE_DESCRIPTION("Gumstix board SMC91C111 chip initialization driver");
+MODULE_VERSION("1:0.1");

98
target/linux/pxa/patches-2.6.21/019-modular-init-usb-gadget.patch
View File

@ -1,98 +0,0 @@
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -56,6 +56,14 @@ config USB_GADGET_DEBUG_FILES
config USB_GADGET_SELECTED
boolean
+config USB_GADGET_GUMSTIX
+ tristate
+ default m if USB_GADGET=m
+ default y if USB_GADGET=y
+ depends on USB_GADGET && ARCH_GUMSTIX
+ help
+ USB Gadget support for the Gumstix platform
+
#
# USB Peripheral Controller Support
#
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_USB_GOKU) += goku_udc.o
obj-$(CONFIG_USB_OMAP) += omap_udc.o
obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o
obj-$(CONFIG_USB_AT91) += at91_udc.o
+obj-$(CONFIG_USB_GADGET_GUMSTIX) += gumstix_gadget.o
#
# USB gadget drivers
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa2xx_udc.c
@@ -2752,8 +2752,16 @@ static struct platform_driver udc_driver
},
};
+#ifdef CONFIG_ARCH_GUMSTIX
+extern void gumstix_usb_gadget_load(void);
+#endif
+
static int __init udc_init(void)
{
+#ifdef CONFIG_ARCH_GUMSTIX
+ gumstix_usb_gadget_load();
+#endif
+
printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
return platform_driver_register(&udc_driver);
}
--- /dev/null
+++ b/drivers/usb/gadget/gumstix_gadget.c
@@ -0,0 +1,49 @@
+/*
+ * Gumstix USB gadget intialization driver
+ *
+ * Author: Craig Hughes
+ * Created: December 9, 2004
+ * Copyright: (C) 2004 Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/delay.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/gumstix.h>
+#include <asm/arch/udc.h>
+
+int __init gumstix_usb_gadget_init(void)
+{
+ pxa_gpio_mode(GPIO_GUMSTIX_USB_GPIOx_DIS_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_USB_GPIOn_MD);
+
+ set_irq_type(GUMSTIX_USB_INTR_IRQ, IRQT_BOTHEDGE);
+
+ return 0;
+}
+
+void __exit gumstix_usb_gadget_exit(void)
+{
+}
+
+void gumstix_usb_gadget_load(void) {}
+EXPORT_SYMBOL(gumstix_usb_gadget_load);
+
+module_init(gumstix_usb_gadget_init);
+module_exit(gumstix_usb_gadget_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Craig Hughes <craig@gumstix.com>");
+MODULE_DESCRIPTION("Gumstix board USB gadget initialization driver");
+MODULE_VERSION("1:0.1");

10
target/linux/pxa/patches-2.6.21/020-bugfix-i2c-include.patch
View File

@ -1,10 +0,0 @@
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -32,6 +32,7 @@
#include <linux/i2c-pxa.h>
#include <linux/platform_device.h>
+#include <asm/arch/pxa-regs.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>

12
target/linux/pxa/patches-2.6.21/021-bugfix-mmc-clock.patch
View File

@ -1,12 +0,0 @@
--- a/drivers/mmc/pxamci.c
+++ b/drivers/mmc/pxamci.c
@@ -366,8 +366,7 @@ static void pxamci_set_ios(struct mmc_ho
if (ios->clock) {
unsigned int clk = CLOCKRATE / ios->clock;
- if (CLOCKRATE / clk > ios->clock)
- clk <<= 1;
+ if(clk > (1<<6)) clk = (1<<6);
host->clkrt = fls(clk) - 1;
pxa_set_cken(CKEN12_MMC, 1);

62
target/linux/pxa/patches-2.6.21/022-bugfix-pxa-cpufreq.patch
View File

@ -1,62 +0,0 @@
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -60,7 +60,7 @@ typedef struct
/* Define the refresh period in mSec for the SDRAM and the number of rows */
#define SDRAM_TREF 64 /* standard 64ms SDRAM */
-#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
+#define SDRAM_ROWS 8192 /* 64MB=8192 32MB=4096 */
#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
#define CCLKCFG_TURBO 0x1
@@ -136,7 +136,7 @@ static int pxa_set_target(struct cpufreq
unsigned int relation)
{
int idx;
- unsigned long cpus_allowed;
+ cpumask_t cpus_allowed;
int cpu = policy->cpu;
struct cpufreq_freqs freqs;
pxa_freqs_t *pxa_freq_settings;
@@ -144,6 +144,7 @@ static int pxa_set_target(struct cpufreq
unsigned long flags;
unsigned int unused;
unsigned int preset_mdrefr, postset_mdrefr;
+ void *ramstart;
/*
* Save this threads cpus_allowed mask.
@@ -154,7 +155,7 @@ static int pxa_set_target(struct cpufreq
* Bind to the specified CPU. When this call returns,
* we should be running on the right CPU.
*/
- set_cpus_allowed(current, 1 << cpu);
+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
BUG_ON(cpu != smp_processor_id());
/* Get the current policy */
@@ -187,7 +188,7 @@ static int pxa_set_target(struct cpufreq
(pxa_freq_settings[idx].membus/1000));
}
- void *ramstart = phys_to_virt(0xa0000000);
+ ramstart = phys_to_virt(0xa0000000);
/*
* Tell everyone what we're about to do...
@@ -260,13 +261,13 @@ static int pxa_set_target(struct cpufreq
static int pxa_cpufreq_init(struct cpufreq_policy *policy)
{
- unsigned long cpus_allowed;
+ cpumask_t cpus_allowed;
unsigned int cpu = policy->cpu;
int i;
cpus_allowed = current->cpus_allowed;
- set_cpus_allowed(current, 1 << cpu);
+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
BUG_ON(cpu != smp_processor_id());
/* set default policy and cpuinfo */

23
target/linux/pxa/patches-2.6.21/023-bugfix-serial-interrupt.patch
View File

@ -1,23 +0,0 @@
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -235,15 +235,19 @@ static inline irqreturn_t serial_pxa_irq
struct uart_pxa_port *up = dev_id;
unsigned int iir, lsr;
+ serial_out(up, UART_MCR, serial_in(up, UART_MCR) & ~UART_MCR_RTS); // Clear RTS
iir = serial_in(up, UART_IIR);
if (iir & UART_IIR_NO_INT)
- return IRQ_NONE;
+ {
+ //printk(KERN_WARNING "serial_pxa_irq: odd -- interrupt triggered, but no interrupt in IIR: %08x\n",iir);
+ }
lsr = serial_in(up, UART_LSR);
if (lsr & UART_LSR_DR)
receive_chars(up, &lsr);
check_modem_status(up);
if (lsr & UART_LSR_THRE)
transmit_chars(up);
+ serial_out(up, UART_MCR, serial_in(up, UART_MCR) | UART_MCR_RTS); // Assert RTS
return IRQ_HANDLED;
}

67
target/linux/pxa/patches-2.6.21/024-bugfix-serial-register-status.patch
View File

@ -1,67 +0,0 @@
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -57,6 +57,8 @@ struct uart_pxa_port {
unsigned int lsr_break_flag;
unsigned int cken;
char *name;
+ unsigned int msr;
+ unsigned int lsr;
};
static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
@@ -159,6 +161,7 @@ static inline void receive_chars(struct
ignore_char:
*status = serial_in(up, UART_LSR);
+ up->lsr = *status;
} while ((*status & UART_LSR_DR) && (max_count-- > 0));
tty_flip_buffer_push(tty);
}
@@ -211,7 +214,7 @@ static inline void check_modem_status(st
int status;
status = serial_in(up, UART_MSR);
-
+ up->msr = status;
if ((status & UART_MSR_ANY_DELTA) == 0)
return;
@@ -242,6 +245,7 @@ static inline irqreturn_t serial_pxa_irq
//printk(KERN_WARNING "serial_pxa_irq: odd -- interrupt triggered, but no interrupt in IIR: %08x\n",iir);
}
lsr = serial_in(up, UART_LSR);
+ up->lsr = lsr;
if (lsr & UART_LSR_DR)
receive_chars(up, &lsr);
check_modem_status(up);
@@ -258,7 +262,7 @@ static unsigned int serial_pxa_tx_empty(
unsigned int ret;
spin_lock_irqsave(&up->port.lock, flags);
- ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
+ ret = up->lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
spin_unlock_irqrestore(&up->port.lock, flags);
return ret;
@@ -270,7 +274,7 @@ static unsigned int serial_pxa_get_mctrl
unsigned char status;
unsigned int ret;
- status = serial_in(up, UART_MSR);
+ status = up->msr;
ret = 0;
if (status & UART_MSR_DCD)
@@ -400,10 +404,10 @@ static int serial_pxa_startup(struct uar
/*
* And clear the interrupt registers again for luck.
*/
- (void) serial_in(up, UART_LSR);
+ up->lsr = serial_in(up, UART_LSR);
(void) serial_in(up, UART_RX);
(void) serial_in(up, UART_IIR);
- (void) serial_in(up, UART_MSR);
+ up->msr = serial_in(up, UART_MSR);
return 0;
}

11
target/linux/pxa/patches-2.6.21/025-mach-types-fix.patch
View File

@ -1,11 +0,0 @@
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -387,7 +387,7 @@ s5c7375 ARCH_S5C7375 S5C7375 369
spearhead ARCH_SPEARHEAD SPEARHEAD 370
pantera ARCH_PANTERA PANTERA 371
prayoglite ARCH_PRAYOGLITE PRAYOGLITE 372
-gumstix ARCH_GUMSTIK GUMSTIK 373
+gumstix ARCH_GUMSTIX GUMSTIX 373
rcube ARCH_RCUBE RCUBE 374
rea_olv ARCH_REA_OLV REA_OLV 375
pxa_iphone ARCH_PXA_IPHONE PXA_IPHONE 376

54
target/linux/pxa/patches-2.6.21/026-pcm-gcc-411-bugfix.patch
View File

@ -1,54 +0,0 @@
--- a/include/sound/pcm_params.h
+++ b/include/sound/pcm_params.h
@@ -179,16 +179,8 @@ static inline int snd_mask_single(const
return 1;
}
-static inline int snd_mask_refine(struct snd_mask *mask,
- const struct snd_mask *v)
-{
- struct snd_mask old;
- snd_mask_copy(&old, mask);
- snd_mask_intersect(mask, v);
- if (snd_mask_empty(mask))
- return -EINVAL;
- return !snd_mask_eq(mask, &old);
-}
+void snd_mask_print( const struct snd_mask *m1, const struct snd_mask *m2 );
+int snd_mask_refine(struct snd_mask *mask, const struct snd_mask *v);
static inline int snd_mask_refine_first(struct snd_mask *mask)
{
--- a/sound/core/pcm_lib.c
+++ b/sound/core/pcm_lib.c
@@ -2128,3 +2128,18 @@ snd_pcm_sframes_t snd_pcm_lib_readv(stru
}
EXPORT_SYMBOL(snd_pcm_lib_readv);
+
+int snd_mask_refine(struct snd_mask *mask,
+ const struct snd_mask *v)
+{
+ struct snd_mask old;
+ snd_mask_copy(&old, mask);
+ snd_mask_print(mask, v);
+ snd_mask_intersect(mask, v);
+ snd_mask_print(mask, v);
+ if (snd_mask_empty(mask))
+ return -EINVAL;
+ return !snd_mask_eq(mask, &old);
+}
+
+EXPORT_SYMBOL(snd_mask_refine);
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -3450,3 +3450,9 @@ const struct file_operations snd_pcm_f_o
.fasync = snd_pcm_fasync,
}
};
+
+void snd_mask_print( const struct snd_mask *m1, const struct snd_mask *m2 )
+{
+// printk( "0x%08x %08x v: 0x%08x %08x\n", m1->bits[1], m1->bits[0], m2->bits[1], m2->bits[0] );
+}
+

294
target/linux/pxa/patches-2.6.21/027-ucb1400-ac97-audio.patch
View File

@ -1,294 +0,0 @@
--- a/sound/pci/ac97/ac97_codec.c
+++ b/sound/pci/ac97/ac97_codec.c
@@ -158,7 +158,7 @@ static const struct ac97_codec_id snd_ac
{ 0x4e534300, 0xffffffff, "LM4540,43,45,46,48", NULL, NULL }, // only guess --jk
{ 0x4e534331, 0xffffffff, "LM4549", NULL, NULL },
{ 0x4e534350, 0xffffffff, "LM4550", patch_lm4550, NULL }, // volume wrap fix
-{ 0x50534304, 0xffffffff, "UCB1400", patch_ucb1400, NULL },
+{ 0x50534304, 0xffffffff, "UCB1400", patch_ucb1400, NULL, AC97_HAS_NO_STD_PCM },
{ 0x53494c20, 0xffffffe0, "Si3036,8", mpatch_si3036, mpatch_si3036, AC97_MODEM_PATCH },
{ 0x54524102, 0xffffffff, "TR28022", NULL, NULL },
{ 0x54524106, 0xffffffff, "TR28026", NULL, NULL },
--- a/sound/pci/ac97/ac97_patch.c
+++ b/sound/pci/ac97/ac97_patch.c
@@ -29,6 +29,10 @@
#include <linux/slab.h>
#include <linux/mutex.h>
+#include <linux/proc_fs.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/control.h>
@@ -406,6 +410,227 @@ int patch_yamaha_ymf753(struct snd_ac97
}
/*
+ * UCB1400 codec
+ */
+
+#define AC97_UCB1400_FCSR1 0x6a
+#define AC97_UCB1400_FCSR2 0x6c
+
+static const struct snd_kcontrol_new ucb1400_snd_ac97_controls[] = {
+ AC97_SINGLE("Tone Control - Bass", AC97_UCB1400_FCSR1, 11, 4, 0),
+ AC97_SINGLE("Tone Control - Treble", AC97_UCB1400_FCSR1, 9, 2, 0),
+ AC97_SINGLE("Headphone Playback Switch", AC97_UCB1400_FCSR1, 6, 1, 0),
+ AC97_SINGLE("De-emphasis", AC97_UCB1400_FCSR1, 5, 1, 0),
+ AC97_SINGLE("DC Filter", AC97_UCB1400_FCSR1, 4, 1, 0),
+ AC97_SINGLE("Hi-pass Filter", AC97_UCB1400_FCSR1, 3, 1, 0),
+ AC97_SINGLE("ADC Filter", AC97_UCB1400_FCSR2, 12, 1, 0),
+};
+
+#define NUM_GPIO_LINES 10
+
+static struct proc_dir_entry *proc_gpio_parent;
+static struct proc_dir_entry *proc_gpios[NUM_GPIO_LINES];
+
+typedef struct
+{
+ int gpio;
+ char name[32];
+ struct snd_ac97 *ac97;
+} gpio_summary_type;
+
+static gpio_summary_type gpio_summaries[NUM_GPIO_LINES] =
+{
+ { 0, "UCB1400-0-0" },
+ { 1, "UCB1400-0-1" },
+ { 2, "UCB1400-0-2" },
+ { 3, "UCB1400-0-3" },
+ { 4, "UCB1400-0-4" },
+ { 5, "UCB1400-0-5" },
+ { 6, "UCB1400-0-6" },
+ { 7, "UCB1400-0-7" },
+ { 8, "UCB1400-0-8" },
+ { 9, "UCB1400-0-9" }
+};
+
+
+static int proc_ucb1400_ac97_gpio_write(struct file *file, const char __user *buf,
+ unsigned long count, void *data)
+{
+ char *cur, lbuf[count + 1];
+ gpio_summary_type *summary = data;
+ u32 direction_is_out, operation_is_set;
+ int i = summary->gpio;
+ u16 dir, value;
+
+ if (!capable(CAP_SYS_ADMIN))
+ return -EACCES;
+
+ memset(lbuf, 0, count + 1);
+
+ if (copy_from_user(lbuf, buf, count))
+ return -EFAULT;
+
+ cur = lbuf;
+
+ // Get current values
+ direction_is_out = !!(snd_ac97_read(summary->ac97, 0x5c) & (0x0001 << i));
+ operation_is_set = !!(snd_ac97_read(summary->ac97, 0x5a) & (0x0001 << i));
+ while(1)
+ {
+ // We accept options: {GPIO|AF1|AF2|AF3}, {set|clear}, {in|out}
+ // Anything else is an error
+ while(cur[0] && (isspace(cur[0]) || ispunct(cur[0]))) cur = &(cur[1]);
+
+ if('\0' == cur[0]) break;
+
+ // Ok, so now we're pointing at the start of something
+ switch(cur[0])
+ {
+ case 'G':
+ // Check that next is "PIO" -- '\0' will cause safe short-circuit if end of buf
+ if(!(cur[1] == 'P' && cur[2] == 'I' && cur[3] == 'O')) goto parse_error;
+ cur = &(cur[4]);
+ break;
+ case 's':
+ if(!(cur[1] == 'e' && cur[2] == 't')) goto parse_error;
+ operation_is_set = 1;
+ cur = &(cur[3]);
+ break;
+ case 'c':
+ if(!(cur[1] == 'l' && cur[2] == 'e' && cur[3] == 'a' && cur[4] == 'r')) goto
+parse_error;
+ operation_is_set = 0;
+ cur = &(cur[5]);
+ break;
+ case 'i':
+ if(!(cur[1] == 'n')) goto parse_error;
+ direction_is_out = 0;
+ cur = &(cur[2]);
+ break;
+ case 'o':
+ if(!(cur[1] == 'u' && cur[2] == 't')) goto parse_error;
+ direction_is_out = 1;
+ cur = &(cur[3]);
+ break;
+ default: goto parse_error;
+ }
+ }
+
+ // set/get value
+ dir = snd_ac97_read(summary->ac97, 0x5c);
+ value = snd_ac97_read(summary->ac97, 0x5a);
+ if (direction_is_out)
+ {
+ dir |= 0x0001 << i;
+ if (operation_is_set)
+ {
+ value |= 0x0001 << i;
+ }
+ else
+ {
+ value &= ~(0x0001 << i);
+ }
+
+ snd_ac97_write(summary->ac97, 0x5c, dir);
+ snd_ac97_write(summary->ac97, 0x5a, value);
+ }
+ else // direction in
+ {
+ dir &= ~(0x0001 << i);
+ snd_ac97_write(summary->ac97, 0x5c, dir);
+ operation_is_set = snd_ac97_read(summary->ac97, 0x5a) & ~(0x0001 << i);
+ }
+
+#ifdef CONFIG_PROC_GPIO_DEBUG
+ printk(KERN_INFO "Set (%s,%s,%s) via /proc/gpio/%s\n",
+ "GPIO",
+ direction_is_out ? "out" : "in",
+ operation_is_set ? "set" : "clear",
+ summary->name);
+#endif
+
+ return count;
+
+parse_error:
+ printk(KERN_CRIT "Parse error: Expect \"GPIO|[set|clear]|[in|out] ...\"\n");
+ return -EINVAL;
+}
+
+static int proc_ucb1400_ac97_gpio_read(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ char *p = page;
+ gpio_summary_type *summary = data;
+ int len, i; /*, af;*/
+ i = summary->gpio;
+
+ p += sprintf(p, "%d\t%s\t%s\t%s\n", i,
+ "GPIO",
+ (snd_ac97_read(summary->ac97, 0x5c) & (0x0001 << i)) ? "out" : "in",
+ (snd_ac97_read(summary->ac97, 0x5a) & (0x0001 << i)) ? "set" : "clear");
+
+ len = (p - page) - off;
+
+ if(len < 0)
+ {
+ len = 0;
+ }
+
+ *eof = (len <= count) ? 1 : 0;
+ *start = page + off;
+
+ return len;
+}
+
+int patch_ucb1400(struct snd_ac97 * ac97)
+{
+ int err, i;
+
+ proc_gpio_parent = proc_mkdir("gpio", NULL);
+ if(!proc_gpio_parent) return 0;
+
+ for(i=0; i < NUM_GPIO_LINES; i++)
+ {
+ proc_gpios[i] = create_proc_entry(gpio_summaries[i].name, 0644, proc_gpio_parent);
+ if(proc_gpios[i])
+ {
+ gpio_summaries[i].ac97 = ac97;
+ proc_gpios[i]->data = &gpio_summaries[i];
+ proc_gpios[i]->read_proc = proc_ucb1400_ac97_gpio_read;
+ proc_gpios[i]->write_proc = proc_ucb1400_ac97_gpio_write;
+ }
+ }
+
+ for(i = 0; i < ARRAY_SIZE(ucb1400_snd_ac97_controls); i++) {
+ if((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&ucb1400_snd_ac97_controls[i], ac97))) < 0)
+ return err;
+ }
+
+ snd_ac97_write_cache(ac97, AC97_UCB1400_FCSR1,
+ (0 << 11) | // 0 base boost
+ (0 << 9) | // 0 treble boost
+ (0 << 7) | // Mode = flat
+ (1 << 6) | // Headphones enable
+ (0 << 5) | // De-emphasis disabled
+ (1 << 4) | // DC filter enabled
+ (1 << 3) | // Hi-pass filter enabled
+ (0 << 2) | // disable interrupt signalling via GPIO_INT
+ (1 << 0) // clear ADC overflow status if set
+ );
+
+ snd_ac97_write_cache(ac97, AC97_UCB1400_FCSR2,
+ (0 << 15) | // must be 0
+ (0 << 13) | // must be 0
+ (1 << 12) | // ADC filter enabled
+ (0 << 10) | // must be 0
+ (0 << 4) | // Smart low power mode on neither Codec nor PLL
+ (0 << 0) // must be 0
+ );
+
+ return 0;
+}
+
+/*
* May 2, 2003 Liam Girdwood <liam.girdwood@wolfsonmicro.com>
* removed broken wolfson00 patch.
* added support for WM9705,WM9708,WM9709,WM9710,WM9711,WM9712 and WM9717.
@@ -3408,41 +3633,3 @@ int patch_lm4550(struct snd_ac97 *ac97)
ac97->res_table = lm4550_restbl;
return 0;
}
-
-/*
- * UCB1400 codec (http://www.semiconductors.philips.com/acrobat_download/datasheets/UCB1400-02.pdf)
- */
-static const struct snd_kcontrol_new snd_ac97_controls_ucb1400[] = {
-/* enable/disable headphone driver which allows direct connection to
- stereo headphone without the use of external DC blocking
- capacitors */
-AC97_SINGLE("Headphone Driver", 0x6a, 6, 1, 0),
-/* Filter used to compensate the DC offset is added in the ADC to remove idle
- tones from the audio band. */
-AC97_SINGLE("DC Filter", 0x6a, 4, 1, 0),
-/* Control smart-low-power mode feature. Allows automatic power down
- of unused blocks in the ADC analog front end and the PLL. */
-AC97_SINGLE("Smart Low Power Mode", 0x6c, 4, 3, 0),
-};
-
-static int patch_ucb1400_specific(struct snd_ac97 * ac97)
-{
- int idx, err;
- for (idx = 0; idx < ARRAY_SIZE(snd_ac97_controls_ucb1400); idx++)
- if ((err = snd_ctl_add(ac97->bus->card, snd_ctl_new1(&snd_ac97_controls_ucb1400[idx], ac97))) < 0)
- return err;
- return 0;
-}
-
-static struct snd_ac97_build_ops patch_ucb1400_ops = {
- .build_specific = patch_ucb1400_specific,
-};
-
-int patch_ucb1400(struct snd_ac97 * ac97)
-{
- ac97->build_ops = &patch_ucb1400_ops;
- /* enable headphone driver and smart low power mode by default */
- snd_ac97_write(ac97, 0x6a, 0x0050);
- snd_ac97_write(ac97, 0x6c, 0x0030);
- return 0;
-}

212
target/linux/pxa/patches-2.6.21/028-gumstix-asoc.patch
View File

@ -1,212 +0,0 @@
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -16,6 +16,7 @@ config SND_PXA2XX_SOC_AC97
tristate
select AC97_BUS
select SND_SOC_AC97_BUS
+ select SND_PXA2XX_AC97
config SND_PXA2XX_SOC_I2S
tristate
@@ -56,4 +57,12 @@ config SND_PXA2XX_SOC_TOSA
Say Y if you want to add support for SoC audio on Sharp
Zaurus SL-C6000x models (Tosa).
+config SND_PXA2XX_SOC_GUMSTIX
+ tristate "SoC AC97 Audio support for Gumstix"
+ depends on SND_PXA2XX_SOC && ARCH_GUMSTIX
+ select SND_PXA2XX_SOC_AC97
+ select SND_SOC_AC97_CODEC
+ help
+ Say Y if you want to add support for SoC audio on Gumstix
+
endmenu
--- a/sound/soc/pxa/Makefile
+++ b/sound/soc/pxa/Makefile
@@ -12,9 +12,11 @@ snd-soc-corgi-objs := corgi.o
snd-soc-poodle-objs := poodle.o
snd-soc-tosa-objs := tosa.o
snd-soc-spitz-objs := spitz.o
+snd-soc-gumstix-objs := gumstix.o
obj-$(CONFIG_SND_PXA2XX_SOC_CORGI) += snd-soc-corgi.o
obj-$(CONFIG_SND_PXA2XX_SOC_POODLE) += snd-soc-poodle.o
obj-$(CONFIG_SND_PXA2XX_SOC_TOSA) += snd-soc-tosa.o
obj-$(CONFIG_SND_PXA2XX_SOC_SPITZ) += snd-soc-spitz.o
+obj-$(CONFIG_SND_PXA2XX_SOC_GUMSTIX) += snd-soc-gumstix.o
--- /dev/null
+++ b/sound/soc/pxa/gumstix.c
@@ -0,0 +1,109 @@
+/*
+ * gumstix.c -- SoC audio for Gumstix
+ *
+ * Copyright 2005 Wolfson Microelectronics PLC.
+ * Copyright 2005 Openedhand Ltd.
+ * Copyright 2007 Gumstix Inc.
+ *
+ * Authors: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
+ * Richard Purdie <richard@openedhand.com>
+ * Craig Hughes <craig@gumstix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Revision history
+ * 26 April 2007 - Initial revision forked from tosa.c
+ *
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+
+#include <sound/driver.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <asm/mach-types.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/audio.h>
+#include <asm/arch/gumstix.h>
+
+#include "pxa2xx-pcm.h"
+#include "pxa2xx-ac97.h"
+#include "../codecs/ac97.h"
+
+static struct snd_soc_machine gumstix;
+
+static int gumstix_ac97_init(struct snd_soc_codec *codec)
+{
+ // For now, do nothing -- should move the ucb1400 patch stuff here
+ return 0;
+}
+
+/* For right now, just add UCB1400 -- once that's working, we can also add
+ * PCM channels via SPI to bluetooth module, GSM module, or whatnot */
+static struct snd_soc_dai_link gumstix_dai[] = {
+{
+ .name = "ucb1400",
+ .stream_name = "UCB1400",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+ .codec_dai = &ac97_dai,
+ .init = gumstix_ac97_init,
+},
+};
+
+static struct snd_soc_machine snd_soc_machine_gumstix = {
+ .name = "Gumstix",
+ .dai_link = gumstix_dai,
+ .num_links = ARRAY_SIZE(gumstix_dai),
+};
+
+static struct snd_soc_device gumstix_snd_devdata = {
+ .machine = &snd_soc_machine_gumstix,
+ .platform = &pxa2xx_soc_platform,
+ .codec_dev = &soc_codec_dev_ac97,
+};
+
+static struct platform_device *gumstix_snd_device;
+
+static int __init gumstix_init(void)
+{
+ int ret;
+
+ if (!machine_is_gumstix())
+ return -ENODEV;
+
+ gumstix_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!gumstix_snd_device)
+ return -ENOMEM;
+
+ platform_set_drvdata(gumstix_snd_device, &gumstix_snd_devdata);
+ gumstix_snd_devdata.dev = &gumstix_snd_device->dev;
+ ret = platform_device_add(gumstix_snd_device);
+
+ if (ret)
+ platform_device_put(gumstix_snd_device);
+
+ return ret;
+}
+
+static void __exit gumstix_exit(void)
+{
+ platform_device_unregister(gumstix_snd_device);
+}
+
+module_init(gumstix_init);
+module_exit(gumstix_exit);
+
+/* Module information */
+MODULE_AUTHOR("Craig Hughes <craig@gumstix.com>");
+MODULE_DESCRIPTION("ALSA SoC Gumstix");
+MODULE_LICENSE("GPL");
--- a/sound/soc/codecs/ac97.c
+++ b/sound/soc/codecs/ac97.c
@@ -43,7 +43,7 @@ static int ac97_prepare(struct snd_pcm_s
#define STD_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
-static struct snd_soc_codec_dai ac97_dai = {
+struct snd_soc_codec_dai ac97_dai = {
.name = "AC97 HiFi",
.playback = {
.stream_name = "AC97 Playback",
@@ -61,6 +61,8 @@ static struct snd_soc_codec_dai ac97_dai
.prepare = ac97_prepare,},
};
+EXPORT_SYMBOL_GPL(ac97_dai);
+
static unsigned int ac97_read(struct snd_soc_codec *codec,
unsigned int reg)
{
--- a/sound/soc/codecs/ac97.h
+++ b/sound/soc/codecs/ac97.h
@@ -14,5 +14,6 @@
#define __LINUX_SND_SOC_AC97_H
extern struct snd_soc_codec_device soc_codec_dev_ac97;
+extern struct snd_soc_codec_dai ac97_dai;
#endif
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -154,18 +154,26 @@ static void pxa2xx_ac97_warm_reset(struc
static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97)
{
- GCR &= GCR_COLD_RST; /* clear everything but nCRST */
- GCR &= ~GCR_COLD_RST; /* then assert nCRST */
-
- gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* PXA27x Developers Manual section 13.5.2.2.1 */
+ GCR |= GCR_ACLINK_OFF;
+ udelay(5);
+ GCR &= GCR_COLD_RST; /* Mask all interrupts */
+ GCR &= ~GCR_COLD_RST; /* cold reset */
+ udelay(5);
pxa_set_cken(1 << 31, 1);
udelay(5);
- pxa_set_cken(1 << 31, 0);
+ GCR |= GCR_PRIRDY_IEN|GCR_SECRDY_IEN; /* unmask the interrupts */
+ pxa_set_cken(1 << 31, 0); /* clear CKEN31 */
+ udelay(5);
GCR = GCR_COLD_RST;
udelay(50);
+ wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#else
+ GCR &= GCR_COLD_RST; /* clear everything but nCRST */
+ GCR &= ~GCR_COLD_RST; /* then assert nCRST */
+
+ gsr_bits = 0;
GCR = GCR_COLD_RST;
GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);

30
target/linux/pxa/patches-2.6.21/029-disable-uncompress-message.patch
View File

@ -1,30 +0,0 @@
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -322,7 +322,6 @@ void flush_window(void)
bytes_out += (ulg)outcnt;
output_ptr += (ulg)outcnt;
outcnt = 0;
- putstr(".");
}
#ifndef arch_error
@@ -354,9 +353,7 @@ decompress_kernel(ulg output_start, ulg
arch_decomp_setup();
makecrc();
- putstr("Uncompressing Linux...");
gunzip();
- putstr(" done, booting the kernel.\n");
return output_ptr;
}
#else
@@ -368,9 +365,7 @@ int main()
output_data = output_buffer;
makecrc();
- putstr("Uncompressing Linux...");
gunzip();
- putstr("done.\n");
return 0;
}
#endif

29
target/linux/pxa/patches-2.6.21/030-serial-divisor.patch
View File

@ -1,29 +0,0 @@
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -41,6 +41,7 @@
#include <linux/platform_device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
+#include <linux/serial.h>
#include <linux/serial_core.h>
#include <asm/io.h>
@@ -577,8 +578,16 @@ static void serial_pxa_config_port(struc
static int
serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
{
- /* we don't want the core code to modify any port params */
- return -EINVAL;
+ struct uart_pxa_port *up = (struct uart_pxa_port *)port;
+ int ret = 0;
+
+ if (up->port.uartclk / 16 != ser->baud_base)
+ ret = -EINVAL;
+ else if (((up->port.line & 1) == 0) && ser->baud_base > 230400) /* Max baud rate for STUART and FFUART */
+ ret = -EINVAL;
+ else if (((up->port.line & 1) != 0) && ser->baud_base > 921600) /* Max baud rate for HWUART and BTUART */
+ ret = -EINVAL;
+ return ret;
}
static const char *

76
target/linux/pxa/patches-2.6.21/031-mmc-card-detect.patch
View File

@ -1,76 +0,0 @@
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -29,19 +29,55 @@
#include "generic.h"
-static int gumstix_mci_init(struct device *dev, irqreturn_t (*lubbock_detect_int)(int, void *, struct pt_regs *), void *data)
+static struct pxamci_platform_data gumstix_mci_platform_data;
+
+static int gumstix_mci_init(struct device *dev, irqreturn_t (*gumstix_detect_int)(int, void *, struct pt_regs *), void *data)
{
- // Set up MMC controller
+ int err;
+
pxa_gpio_mode(GPIO6_MMCCLK_MD);
pxa_gpio_mode(GPIO53_MMCCLK_MD);
pxa_gpio_mode(GPIO8_MMCCS0_MD);
+ pxa_gpio_mode(GUMSTIX_GPIO_nSD_DETECT | GPIO_IN);
+ set_irq_type(GUMSTIX_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE);
+ pxa_gpio_mode(GUMSTIX_GPIO_nSD_WP | GPIO_IN);
+
+ gumstix_mci_platform_data.detect_delay = msecs_to_jiffies(250);
+
+ err = request_irq(GUMSTIX_IRQ_GPIO_nSD_DETECT, gumstix_detect_int, SA_INTERRUPT,
+ "MMC card detect", data);
+ if (err) {
+ printk(KERN_ERR "gumstix_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
+ return -1;
+ }
+
+ err = set_irq_type(GUMSTIX_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE);
+
return 0;
}
+static int gumstix_mci_get_ro(struct device *dev)
+{
+#ifdef CONFIG_ARCH_GUMSTIX_VERDEX
+ return 0; // microSD is always writable on verdex
+#else
+ int ro;
+ ro = GPLR(GUMSTIX_GPIO_nSD_WP) & GPIO_bit(GUMSTIX_GPIO_nSD_WP);
+ return ro;
+#endif
+}
+
+static void gumstix_mci_exit(struct device *dev, void *data)
+{
+ free_irq(GUMSTIX_IRQ_GPIO_nSD_DETECT, data);
+}
+
static struct pxamci_platform_data gumstix_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
- .init = &gumstix_mci_init,
+ .init = gumstix_mci_init,
+ .get_ro = gumstix_mci_get_ro,
+ .exit = gumstix_mci_exit,
};
static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = {
--- a/include/asm-arm/arch-pxa/gumstix.h
+++ b/include/asm-arm/arch-pxa/gumstix.h
@@ -36,6 +36,12 @@
#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
+/*
+ * SD/MMC definitions
+ */
+#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
+#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
+#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT)
/*
* SMC Ethernet definitions

34
target/linux/pxa/patches-2.6.21/032-misalignment-handling.patch
View File

@ -1,34 +0,0 @@
Change the default alingment handling to not be silent failure
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -797,6 +797,8 @@ static int __init alignment_init(void)
res->write_proc = proc_alignment_write;
#endif
+ ai_usermode = CONFIG_ALIGNMENT_HANDLING;
+
hook_fault_code(1, do_alignment, SIGILL, "alignment exception");
hook_fault_code(3, do_alignment, SIGILL, "alignment exception");
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -709,6 +709,19 @@ config ALIGNMENT_TRAP
correct operation of some network protocols. With an IP-only
configuration it is safe to say N, otherwise say Y.
+config ALIGNMENT_HANDLING
+ hex "Userspace alignment trap handling"
+ default "0x3"
+ depends on ALIGNMENT_TRAP
+ help
+ How should we handle alignment errors in userspace by default? This is a bitfield where:
+ 0 - silently ignore alignment errors (will lead to unexpected results)
+ 1 - report alignment errors through printk (will lead to unexpected results, but you'll know about them)
+ 2 - fix the alignment and make things work properly (performance degradation for un-aligned code)
+ 4 - raise SIGBUS on alignment traps
+ A good number to choose is probably either 3 (work slowly but log message) or 5 (log message and SIGBUS).
+ You can change the behavior at runtime through /proc/cpu/alignment if you have PROC_FS enabled.
+
endmenu
menu "Boot options"

11
target/linux/pxa/patches-2.6.21/033-compile-fix-pxa_cpufreq.patch
View File

@ -1,11 +0,0 @@
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -42,7 +42,7 @@
#define DEBUG 0
-#ifdef DEBUG
+#if defined (DEBUG) && DEBUG > 0
static unsigned int freq_debug = DEBUG;
MODULE_PARM(freq_debug, "i");
MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");

86
target/linux/pxa/patches-2.6.21/034-ramfs-mode-support.patch
View File

@ -1,86 +0,0 @@
--- a/fs/ramfs/inode.c
+++ b/fs/ramfs/inode.c
@@ -33,6 +33,7 @@
#include <linux/smp_lock.h>
#include <linux/backing-dev.h>
#include <linux/ramfs.h>
+#include <linux/ctype.h>
#include <asm/uaccess.h>
#include "internal.h"
@@ -160,10 +161,66 @@ static const struct super_operations ram
.drop_inode = generic_delete_inode,
};
+static int ramfs_parse_options(char *options, int *mode)
+{
+ char *this_char, *value, *rest;
+
+ while (options != NULL) {
+ this_char = options;
+ for (;;) {
+ /*
+ * NUL-terminate this option: unfortunately,
+ * mount options form a comma-separated list,
+ * but mpol's nodelist may also contain commas.
+ */
+ options = strchr(options, ',');
+ if (options == NULL)
+ break;
+ options++;
+ if (!isdigit(*options)) {
+ options[-1] = '\0';
+ break;
+ }
+ }
+ if (!*this_char)
+ continue;
+ if ((value = strchr(this_char,'=')) != NULL) {
+ *value++ = 0;
+ } else {
+ printk(KERN_ERR
+ "ramfs: No value for mount option '%s'\n",
+ this_char);
+ return 1;
+ }
+
+ if (!strcmp(this_char,"mode")) {
+ if (!mode)
+ continue;
+ *mode = simple_strtoul(value,&rest,8);
+ if (*rest)
+ goto bad_val;
+ } else {
+ printk(KERN_ERR "ramfs: Bad mount option %s\n",
+ this_char);
+ return 1;
+ }
+ }
+ return 0;
+
+bad_val:
+ printk(KERN_ERR "ramfs: Bad value '%s' for mount option '%s'\n",
+ value, this_char);
+ return 1;
+}
+
static int ramfs_fill_super(struct super_block * sb, void * data, int silent)
{
struct inode * inode;
struct dentry * root;
+ int mode = 0755;
+
+ if (ramfs_parse_options(data, &mode))
+ return -EINVAL;
sb->s_maxbytes = MAX_LFS_FILESIZE;
sb->s_blocksize = PAGE_CACHE_SIZE;
@@ -171,7 +228,7 @@ static int ramfs_fill_super(struct super
sb->s_magic = RAMFS_MAGIC;
sb->s_op = &ramfs_ops;
sb->s_time_gran = 1;
- inode = ramfs_get_inode(sb, S_IFDIR | 0755, 0);
+ inode = ramfs_get_inode(sb, S_IFDIR | mode, 0);
if (!inode)
return -ENOMEM;

174
target/linux/pxa/patches-2.6.21/035-pxafb-definition.patch
View File

@ -1,174 +0,0 @@
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -25,6 +25,7 @@
#include <asm/arch/udc.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxafb.h>
#include <asm/arch/gumstix.h>
#include "generic.h"
@@ -90,6 +91,89 @@ static struct platform_device gum_audio_
.id = -1,
};
+
+#if defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static void gumstix_lcd_backlight(int on_or_off)
+{
+ if(on_or_off)
+ {
+ pxa_gpio_mode(17 | GPIO_IN);
+ } else {
+ GPCR(17) = GPIO_bit(17);
+ pxa_gpio_mode(17 | GPIO_OUT);
+ GPCR(17) = GPIO_bit(17);
+ }
+}
+#endif
+
+
+#ifdef CONFIG_FB_PXA_ALPS_CDOLLAR
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 300000,
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .hsync_len = 2,
+ .left_margin = 1,
+ .right_margin = 1,
+ .vsync_len = 3,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Pas | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = 0,
+};
+#elif defined(CONFIG_FB_PXA_SHARP_LQ043_PSP)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 110000,
+ .xres = 480,
+ .yres = 272,
+ .bpp = 16,
+ .hsync_len = 41,
+ .left_margin = 2,
+ .right_margin = 2,
+ .vsync_len = 10,
+ .upper_margin = 2,
+ .lower_margin = 2,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (3 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#elif defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 108696, // 9.2MHz typical DOTCLK from datasheet
+ .xres = 480,
+ .hsync_len = 41, // HLW from datasheet: 41 typ
+ .left_margin = 4, // HBP - HLW from datasheet: 45 - 41 = 4
+ .right_margin = 8, // HFP from datasheet: 8 typ
+ .yres = 272,
+ .vsync_len = 10, // VLW from datasheet: 10 typ
+ .upper_margin = 2, // VBP - VLW from datasheet: 12 - 10 = 2
+ .lower_margin = 4, // VFP from datasheet: 4 typ
+ .bpp = 16,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (3 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#endif
+
static struct platform_device *devices[] __initdata = {
&gum_audio_device,
};
@@ -98,6 +182,9 @@ static void __init gumstix_init(void)
{
pxa_set_mci_info(&gumstix_mci_platform_data);
pxa_set_udc_info(&gumstix_udc_info);
+#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) | defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) | defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+ set_pxa_fb_info(&gumstix_fb_info);
+#endif
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1495,6 +1495,37 @@ config FB_PXA
If unsure, say N.
+choice
+ depends on FB_PXA
+ prompt "LCD Panel"
+ default FB_PXA_SAMSUNG_LTE430WQ_F0C
+
+config FB_PXA_ALPS_CDOLLAR
+ boolean "Chris Dollar's ALPS screen"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for an ALPS
+ screen which Chris Dollar uses
+
+config FB_PXA_SHARP_LQ043_PSP
+ boolean "SHARP LQ043... series"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for a SHARP
+ LQ043... screen, such as the one used by the PSP. These screens are
+ the ones normally sold by gumstix with its boards.
+
+config FB_PXA_SAMSUNG_LTE430WQ_F0C
+ boolean "Samsung LTE430WQ-F0C (standard gumstix LCD)"
+ ---help---
+ Enable definitions for a Samsung LTE430WQ-F0C LCD panel, such as the ones resold
+ by gumstix for use with their "LCD-Ready" boards.
+
+config FB_PXA_NONEOFTHEABOVE
+ boolean "None of the above"
+
+endchoice
+
config FB_PXA_PARAMETERS
bool "PXA LCD command line parameters"
default n
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -22,6 +22,7 @@
*
*/
+#include <linux/autoconf.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
@@ -789,7 +790,13 @@ static void pxafb_setup_gpio(struct pxaf
pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ pxa_gpio_mode(GPIO77_LCD_ACBIAS | GPIO_OUT);
+ GPSR(GPIO77_LCD_ACBIAS) = GPIO_bit(GPIO77_LCD_ACBIAS);
+#else
pxa_gpio_mode(GPIO77_LCD_ACBIAS_MD);
+#endif
}
static void pxafb_enable_controller(struct pxafb_info *fbi)

2731
target/linux/pxa/patches-2.6.21/036-270-usb-gadget-udc.patch
View File

File diff suppressed because it is too large Load Diff

356
target/linux/pxa/patches-2.6.21/037-gumstix-pxa270-usb-host.patch
View File

@ -1,356 +0,0 @@
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -22,6 +22,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
+#include <asm/arch/ohci.h>
#include <asm/arch/udc.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pxa-regs.h>
@@ -178,9 +179,34 @@ static struct platform_device *devices[]
&gum_audio_device,
};
+#ifdef CONFIG_ARCH_GUMSTIX_VERDEX
+static int gumstix_ohci_init(struct device *dev)
+{
+ /* setup Port1 GPIO pin. */
+ //pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
+ //pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
+
+ // Turn on port 2 in host mode
+ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+
+ UHCHR = (UHCHR) &
+ ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+
+ return 0;
+}
+
+static struct pxaohci_platform_data gumstix_ohci_platform_data = {
+ .port_mode = PMM_PERPORT_MODE,
+ .init = gumstix_ohci_init,
+};
+#endif
+
static void __init gumstix_init(void)
{
pxa_set_mci_info(&gumstix_mci_platform_data);
+#ifdef CONFIG_ARCH_GUMSTIX_VERDEX
+ pxa_set_ohci_info(&gumstix_ohci_platform_data);
+#endif
pxa_set_udc_info(&gumstix_udc_info);
#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) | defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) | defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
set_pxa_fb_info(&gumstix_fb_info);
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -260,6 +260,8 @@ MODULE_PARM_DESC(host_addr, "Host Ethern
#ifdef CONFIG_USB_GADGET_PXA27X
#define DEV_CONFIG_CDC
+extern struct usb_ep* pxa27x_ep_config(struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *desc,int config,int interface,int alt);
#endif
#ifdef CONFIG_USB_GADGET_S3C2410
@@ -482,15 +484,15 @@ eth_config = {
#ifdef CONFIG_USB_ETH_RNDIS
static struct usb_config_descriptor
rndis_config = {
- .bLength = sizeof rndis_config,
+ .bLength = sizeof rndis_config,
.bDescriptorType = USB_DT_CONFIG,
/* compute wTotalLength on the fly */
- .bNumInterfaces = 2,
+ .bNumInterfaces = 2,
.bConfigurationValue = DEV_RNDIS_CONFIG_VALUE,
- .iConfiguration = STRING_RNDIS,
+ .iConfiguration = STRING_RNDIS,
.bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
- .bMaxPower = 50,
+ .bMaxPower = 50,
};
#endif
@@ -532,15 +534,15 @@ control_intf = {
#ifdef CONFIG_USB_ETH_RNDIS
static const struct usb_interface_descriptor
rndis_control_intf = {
- .bLength = sizeof rndis_control_intf,
+ .bLength = sizeof rndis_control_intf,
.bDescriptorType = USB_DT_INTERFACE,
.bInterfaceNumber = 0,
- .bNumEndpoints = 1,
+ .bNumEndpoints = 1,
.bInterfaceClass = USB_CLASS_COMM,
.bInterfaceSubClass = USB_CDC_SUBCLASS_ACM,
.bInterfaceProtocol = USB_CDC_ACM_PROTO_VENDOR,
- .iInterface = STRING_RNDIS_CONTROL,
+ .iInterface = STRING_RNDIS_CONTROL,
};
#endif
@@ -1342,7 +1344,7 @@ static void rndis_response_complete (str
static void rndis_command_complete (struct usb_ep *ep, struct usb_request *req)
{
- struct eth_dev *dev = ep->driver_data;
+ struct eth_dev *dev = ep->driver_data;
int status;
/* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */
@@ -1578,7 +1580,7 @@ done_set_intf:
/* return the result */
buf = rndis_get_next_response (dev->rndis_config,
- &value);
+ &value);
if (buf) {
memcpy (req->buf, buf, value);
req->complete = rndis_response_complete;
@@ -2064,7 +2066,7 @@ static void eth_req_free (struct usb_ep
static void
rndis_control_ack_complete (struct usb_ep *ep, struct usb_request *req)
{
- struct eth_dev *dev = ep->driver_data;
+ struct eth_dev *dev = ep->driver_data;
if (req->status || req->actual != req->length)
DEBUG (dev,
@@ -2415,7 +2417,27 @@ eth_bind (struct usb_gadget *gadget)
/* all we really need is bulk IN/OUT */
usb_ep_autoconfig_reset (gadget);
+#ifdef CONFIG_USB_GADGET_PXA27X
+#ifdef CONFIG_USB_ETH_RNDIS
+ in_ep = pxa27x_ep_config (gadget, &fs_source_desc,
+ DEV_RNDIS_CONFIG_VALUE,
+ (int)rndis_data_intf.bInterfaceNumber,
+ (int)rndis_data_intf.bAlternateSetting);
+#elif defined(DEV_CONFIG_CDC)
+ in_ep = pxa27x_ep_config (gadget, &fs_source_desc,
+ DEV_CONFIG_VALUE,
+ (int)data_intf.bInterfaceNumber,
+ (int)data_intf.bAlternateSetting);
+#elif defined(DEV_CONFIG_SUBSET)
+ in_ep = pxa27x_ep_config (gadget, &fs_source_desc,
+ DEV_CONFIG_VALUE,
+ (int)subset_data_intf.bInterfaceNumber,
+ (int)subset_data_intf.bAlternateSetting);
+
+#endif //CONFIG_USB_ETH_RNDIS
+#else
in_ep = usb_ep_autoconfig (gadget, &fs_source_desc);
+#endif //CONFIG_USB_GADGET_PXA27X
if (!in_ep) {
autoconf_fail:
dev_err (&gadget->dev,
@@ -2425,7 +2447,26 @@ autoconf_fail:
}
in_ep->driver_data = in_ep; /* claim */
+#ifdef CONFIG_USB_GADGET_PXA27X
+#ifdef CONFIG_USB_ETH_RNDIS
+ out_ep = pxa27x_ep_config (gadget, &fs_sink_desc,
+ DEV_RNDIS_CONFIG_VALUE,
+ (int)rndis_data_intf.bInterfaceNumber,
+ (int)rndis_data_intf.bAlternateSetting);
+#elif defined(DEV_CONFIG_CDC)
+ out_ep = pxa27x_ep_config (gadget, &fs_sink_desc,
+ DEV_CONFIG_VALUE,
+ (int)data_intf.bInterfaceNumber,
+ (int)data_intf.bAlternateSetting);
+#elif defined(DEV_CONFIG_SUBSET)
+ out_ep = pxa27x_ep_config (gadget, &fs_sink_desc,
+ DEV_CONFIG_VALUE,
+ (int)subset_data_intf.bInterfaceNumber,
+ (int)subset_data_intf.bAlternateSetting);
+#endif //CONFIG_USB_ETH_RNDIS
+#else
out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc);
+#endif //CONFIG_USB_GADGET_PXA27X
if (!out_ep)
goto autoconf_fail;
out_ep->driver_data = out_ep; /* claim */
@@ -2435,7 +2476,22 @@ autoconf_fail:
* Since some hosts expect one, try to allocate one anyway.
*/
if (cdc || rndis) {
+#ifdef CONFIG_USB_GADGET_PXA27X
+#ifdef CONFIG_USB_ETH_RNDIS
+ status_ep = pxa27x_ep_config (gadget, &fs_status_desc,
+ DEV_RNDIS_CONFIG_VALUE,
+ (int)rndis_control_intf.bInterfaceNumber,
+ (int)rndis_control_intf.bAlternateSetting);
+#elif defined(DEV_CONFIG_CDC)
+ status_ep = pxa27x_ep_config (gadget, &fs_status_desc,
+ DEV_CONFIG_VALUE,
+ (int)control_intf.bInterfaceNumber,
+ (int)control_intf.bAlternateSetting);
+
+#endif //CONFIG_USB_ETH_RNDIS
+#else
status_ep = usb_ep_autoconfig (gadget, &fs_status_desc);
+#endif //CONFIG_USB_GADGET_PXA27X
if (status_ep) {
status_ep->driver_data = status_ep; /* claim */
} else if (rndis) {
@@ -2444,11 +2500,13 @@ autoconf_fail:
gadget->name);
return -ENODEV;
#ifdef DEV_CONFIG_CDC
+#ifndef CONFIG_USB_GADGET_PXA27X
/* pxa25x only does CDC subset; often used with RNDIS */
} else if (cdc) {
control_intf.bNumEndpoints = 0;
/* FIXME remove endpoint from descriptor list */
#endif
+#endif
}
}
#endif
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -280,6 +280,12 @@ MODULE_LICENSE("Dual BSD/GPL");
#define DRIVER_PRODUCT_ID 0xa4a5 // Linux-USB File-backed Storage Gadget
+
+#ifdef CONFIG_USB_GADGET_PXA27X
+extern struct usb_ep* pxa27x_ep_config(struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *desc,int config,int interface,int alt);
+#endif
+
/*
* This driver assumes self-powered hardware and has no way for users to
* trigger remote wakeup. It uses autoconfiguration to select endpoints
@@ -3920,20 +3926,32 @@ static int __init fsg_bind(struct usb_ga
/* Find all the endpoints we will use */
usb_ep_autoconfig_reset(gadget);
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &fs_bulk_in_desc, CONFIG_VALUE, 0, 0);
+#else
ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc);
+#endif
if (!ep)
goto autoconf_fail;
ep->driver_data = fsg; // claim the endpoint
fsg->bulk_in = ep;
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &fs_bulk_out_desc, CONFIG_VALUE, 0, 0);
+#else
ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc);
+#endif
if (!ep)
goto autoconf_fail;
ep->driver_data = fsg; // claim the endpoint
fsg->bulk_out = ep;
if (transport_is_cbi()) {
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &fs_intr_in_desc, CONFIG_VALUE, 0, 0);
+#else
ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc);
+#endif
if (!ep)
goto autoconf_fail;
ep->driver_data = fsg; // claim the endpoint
@@ -4063,6 +4081,7 @@ autoconf_fail:
rc = -ENOTSUPP;
out:
+ ERROR(fsg, "cleaning up on the way out\n");
fsg->state = FSG_STATE_TERMINATED; // The thread is dead
fsg_unbind(gadget);
close_all_backing_files(fsg);
--- a/drivers/usb/gadget/serial.c
+++ b/drivers/usb/gadget/serial.c
@@ -126,6 +126,10 @@ static int debug = 1;
#define GS_LOG2_NOTIFY_INTERVAL 5 /* 1 << 5 == 32 msec */
#define GS_NOTIFY_MAXPACKET 8
+#ifdef CONFIG_USB_GADGET_PXA27X
+extern struct usb_ep* pxa27x_ep_config(struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *desc,int config,int interface,int alt);
+#endif
/* Structures */
@@ -1378,20 +1382,32 @@ static int __init gs_bind(struct usb_gad
usb_ep_autoconfig_reset(gadget);
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &gs_fullspeed_in_desc, use_acm ? GS_ACM_CONFIG_ID : GS_BULK_CONFIG_ID, gs_bulk_interface_desc.bInterfaceNumber, gs_bulk_interface_desc.bAlternateSetting);
+#else
ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc);
+#endif
if (!ep)
goto autoconf_fail;
EP_IN_NAME = ep->name;
ep->driver_data = ep; /* claim the endpoint */
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &gs_fullspeed_out_desc, use_acm ? GS_ACM_CONFIG_ID : GS_BULK_CONFIG_ID, gs_bulk_interface_desc.bInterfaceNumber, gs_bulk_interface_desc.bAlternateSetting);
+#else
ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc);
+#endif
if (!ep)
goto autoconf_fail;
EP_OUT_NAME = ep->name;
ep->driver_data = ep; /* claim the endpoint */
if (use_acm) {
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &gs_fullspeed_notify_desc, GS_BULK_CONFIG_ID, gs_control_interface_desc.bInterfaceNumber, gs_control_interface_desc.bAlternateSetting);
+#else
ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc);
+#endif
if (!ep) {
printk(KERN_ERR "gs_bind: cannot run ACM on %s\n", gadget->name);
goto autoconf_fail;
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -212,6 +212,11 @@ module_param (loopdefault, bool, S_IRUGO
#define STRING_SOURCE_SINK 250
#define STRING_LOOPBACK 251
+#ifdef CONFIG_USB_GADGET_PXA27X
+extern struct usb_ep* pxa27x_ep_config(struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *desc,int config,int interface,int alt);
+#endif
+
/*
* This device advertises two configurations; these numbers work
* on a pxa250 as well as more flexible hardware.
@@ -1155,7 +1160,11 @@ zero_bind (struct usb_gadget *gadget)
* but there may also be important quirks to address.
*/
usb_ep_autoconfig_reset (gadget);
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &fs_source_desc, CONFIG_SOURCE_SINK, source_sink_intf.bInterfaceNumber, source_sink_intf.bAlternateSetting);
+#else
ep = usb_ep_autoconfig (gadget, &fs_source_desc);
+#endif
if (!ep) {
autoconf_fail:
printk (KERN_ERR "%s: can't autoconfigure on %s\n",
@@ -1164,8 +1173,12 @@ autoconf_fail:
}
EP_IN_NAME = ep->name;
ep->driver_data = ep; /* claim */
-
+
+#ifdef CONFIG_USB_GADGET_PXA27X
+ ep = pxa27x_ep_config(gadget, &fs_sink_desc, CONFIG_SOURCE_SINK, source_sink_intf.bInterfaceNumber, source_sink_intf.bAlternateSetting);
+#else
ep = usb_ep_autoconfig (gadget, &fs_sink_desc);
+#endif
if (!ep)
goto autoconf_fail;
EP_OUT_NAME = ep->name;

22
target/linux/pxa/patches-2.6.21/038-cpufreq-fixup.patch
View File

@ -1,22 +0,0 @@
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -573,7 +573,7 @@ static int cpufreq_governor_dbs(struct c
return 0;
}
-static struct cpufreq_governor cpufreq_gov_dbs = {
+struct cpufreq_governor cpufreq_gov_dbs = {
.name = "ondemand",
.governor = cpufreq_governor_dbs,
.owner = THIS_MODULE,
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -551,7 +551,7 @@ static int cpufreq_governor_dbs(struct c
return 0;
}
-static struct cpufreq_governor cpufreq_gov_dbs = {
+struct cpufreq_governor cpufreq_gov_dbs = {
.name = "conservative",
.governor = cpufreq_governor_dbs,
.owner = THIS_MODULE,

10
target/linux/pxa/patches-2.6.21/040-pxa-regs-fixup.patch
View File

@ -1,10 +0,0 @@
--- a/include/asm-arm/arch-pxa/udc.h
+++ b/include/asm-arm/arch-pxa/udc.h
@@ -5,6 +5,7 @@
* USB Device Controller (UDC) is wired.
*
*/
+#include <asm/arch/pxa-regs.h>
#include <asm/mach/udc_pxa2xx.h>
extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info);

10453
target/linux/pxa/patches-2.6.21/041-gumstix-fb-logo.patch
View File

File diff suppressed because it is too large Load Diff

31
target/linux/pxa/patches-2.6.21/042-gumstix-pxa270-mmc.patch
View File

@ -1,31 +0,0 @@
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -33,8 +33,9 @@
static struct pxamci_platform_data gumstix_mci_platform_data;
-static int gumstix_mci_init(struct device *dev, irqreturn_t (*gumstix_detect_int)(int, void *, struct pt_regs *), void *data)
+static int gumstix_mci_init(struct device *dev, irq_handler_t gumstix_detect_int, void *data)
{
+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
int err;
pxa_gpio_mode(GPIO6_MMCCLK_MD);
@@ -55,6 +56,17 @@ static int gumstix_mci_init(struct devic
}
err = set_irq_type(GUMSTIX_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE);
+#else
+ // Setup GPIOs for MMC on the 120-pin connector
+ // There is no card detect on a uSD connector so no interrupt to register
+ // There is no WP detect GPIO line either
+ pxa_gpio_mode(GPIO92_MMCDAT0_MD);
+ pxa_gpio_mode(GPIO112_MMCCMD_MD);
+ pxa_gpio_mode(GPIO110_MMCDAT2_MD);
+ pxa_gpio_mode(GPIO111_MMCDAT3_MD);
+ pxa_gpio_mode(GPIO109_MMCDAT1_MD);
+ pxa_gpio_mode(GPIO32_MMCCLK_MD);
+#endif
return 0;
}

415
target/linux/pxa/patches-2.6.21/043-pxafb-18bpp-mode.patch
View File

@ -1,415 +0,0 @@
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -191,6 +191,10 @@ static int pxafb_bpp_to_lccr3(struct fb_
case 4: ret = LCCR3_4BPP; break;
case 8: ret = LCCR3_8BPP; break;
case 16: ret = LCCR3_16BPP; break;
+ case 18: ret = (var->nonstd == 24 ? LCCR3_18BPP_PACKED : LCCR3_18BPP); break;
+ case 19: ret = (var->nonstd == 24 ? LCCR3_19BPP_PACKED : LCCR3_19BPP); break;
+ case 24: ret = LCCR3_24BPP; break;
+ case 25: ret = LCCR3_25BPP; break;
}
return ret;
}
@@ -204,11 +208,12 @@ static int pxafb_bpp_to_lccr3(struct fb_
*/
static unsigned int pxafb_display_dma_period(struct fb_var_screeninfo *var)
{
- /*
- * Period = pixclock * bits_per_byte * bytes_per_transfer
- * / memory_bits_per_pixel;
- */
- return var->pixclock * 8 * 16 / var->bits_per_pixel;
+ /*
+ * Period = pixclock * bits_per_byte * bytes_per_transfer
+ * / memory_bits_per_pixel;
+ */
+ struct pxafb_mach_info *inf = fbi->dev->platform_data;
+ return var->pixclock * 8 * 16 / (var->nonstd ? var->nonstd : var->bits_per_pixel);
}
extern unsigned int get_clk_frequency_khz(int info);
@@ -307,6 +312,26 @@ static int pxafb_check_var(struct fb_var
var->green.offset = 5; var->green.length = 6;
var->blue.offset = 0; var->blue.length = 5;
var->transp.offset = var->transp.length = 0;
+ } else if (var->bits_per_pixel == 18) {
+ var->transp.offset = var->transp.length = 0;
+ var->red.offset = 12; var->red.length=6;
+ var->green.offset = 6; var->green.length=6;
+ var->blue.offset = 0; var->blue.length=6;
+ } else if (var->bits_per_pixel == 19) {
+ var->transp.offset = 18; var->transp.length = 1;
+ var->red.offset = 12; var->red.length=6;
+ var->green.offset = 6; var->green.length=6;
+ var->blue.offset = 0; var->blue.length=6;
+ } else if (var->bits_per_pixel == 24) {
+ var->transp.offset = var->transp.length = 0;
+ var->red.offset = 16; var->red.length=8;
+ var->green.offset = 8; var->green.length=8;
+ var->blue.offset = 0; var->blue.length=8;
+ } else if (var->bits_per_pixel == 25) {
+ var->transp.offset = 18; var->transp.length = 1;
+ var->red.offset = 16; var->red.length=8;
+ var->green.offset = 8; var->green.length=8;
+ var->blue.offset = 0; var->blue.length=8;
} else {
var->red.offset = var->green.offset = var->blue.offset = var->transp.offset = 0;
var->red.length = 8;
@@ -342,7 +367,7 @@ static int pxafb_set_par(struct fb_info
pr_debug("pxafb: set_par\n");
- if (var->bits_per_pixel == 16)
+ if (var->bits_per_pixel >= 16)
fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
else if (!fbi->cmap_static)
fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -355,9 +380,10 @@ static int pxafb_set_par(struct fb_info
fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
}
- fbi->fb.fix.line_length = var->xres_virtual *
- var->bits_per_pixel / 8;
- if (var->bits_per_pixel == 16)
+ fbi->fb.fix.line_length = var->xres_virtual *
+ (var->nonstd ? var->nonstd : var->bits_per_pixel) / 8;
+
+ if (var->bits_per_pixel >= 16)
fbi->palette_size = 0;
else
fbi->palette_size = var->bits_per_pixel == 1 ? 4 : 1 << var->bits_per_pixel;
@@ -374,7 +400,7 @@ static int pxafb_set_par(struct fb_info
*/
pxafb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
- if (fbi->fb.var.bits_per_pixel == 16)
+ if (fbi->fb.var.bits_per_pixel >= 16)
fb_dealloc_cmap(&fbi->fb.cmap);
else
fb_alloc_cmap(&fbi->fb.cmap, 1<<fbi->fb.var.bits_per_pixel, 0);
@@ -584,6 +610,14 @@ static int pxafb_activate_var(struct fb_
case 8:
case 16:
break;
+ case 18:
+ case 19:
+ case 24:
+ case 25:
+ if(var->nonstd) break;
+ printk(KERN_ERR "%s: must specify nonstd when bit depth==%d\n",
+ fbi->fb.fix.id, var->bits_per_pixel);
+ break;
default:
printk(KERN_ERR "%s: invalid bit depth %d\n",
fbi->fb.fix.id, var->bits_per_pixel);
@@ -679,7 +713,7 @@ static int pxafb_activate_var(struct fb_
fbi->dmadesc_palette_cpu->fidr = 0;
fbi->dmadesc_palette_cpu->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL;
- if (var->bits_per_pixel == 16) {
+ if (var->bits_per_pixel >= 16) {
/* palette shouldn't be loaded in true-color mode */
fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_fbhigh_dma;
fbi->fdadr0 = fbi->dmadesc_fbhigh_dma; /* no pal just fbhigh */
@@ -785,8 +819,19 @@ static void pxafb_setup_gpio(struct pxaf
return;
}
- for (gpio = 58; ldd_bits; gpio++, ldd_bits--)
+ for (gpio = 58; min(ldd_bits,16); gpio++, ldd_bits--)
pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT);
+
+ switch(fbi->fb.var.bits_per_pixel)
+ {
+ case 25:
+ case 24:
+ case 19:
+ case 18:
+ pxa_gpio_mode(GPIO86_LDD_16_MD);
+ pxa_gpio_mode(GPIO87_LDD_17_MD);
+ default: break;
+ }
pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
@@ -1135,7 +1180,7 @@ static struct pxafb_info * __init pxafb_
fbi->fb.fix.ywrapstep = 0;
fbi->fb.fix.accel = FB_ACCEL_NONE;
- fbi->fb.var.nonstd = 0;
+ fbi->fb.var.nonstd = mode->nonstd;
fbi->fb.var.activate = FB_ACTIVATE_NOW;
fbi->fb.var.height = -1;
fbi->fb.var.width = -1;
@@ -1161,7 +1206,7 @@ static struct pxafb_info * __init pxafb_
fbi->task_state = (u_char)-1;
for (i = 0; i < inf->num_modes; i++) {
- smemlen = mode[i].xres * mode[i].yres * mode[i].bpp / 8;
+ smemlen = mode[i].xres * mode[i].yres * (mode[i].nonstd ? mode[i].nonstd : mode[i].bpp) / 8;
if (smemlen > fbi->fb.fix.smem_len)
fbi->fb.fix.smem_len = smemlen;
}
@@ -1189,12 +1234,19 @@ static int __init pxafb_parse_options(st
if (!strncmp(this_opt, "mode:", 5)) {
const char *name = this_opt+5;
unsigned int namelen = strlen(name);
- int res_specified = 0, bpp_specified = 0;
- unsigned int xres = 0, yres = 0, bpp = 0;
+ int res_specified = 0, bpp_specified = 0, nonstd_specified = 0;
+ unsigned int xres = 0, yres = 0, bpp = 0, nonstd = 0;
int yres_specified = 0;
int i;
for (i = namelen-1; i >= 0; i--) {
switch (name[i]) {
+ case '/':
+ if (!nonstd_specified) {
+ nonstd = simple_strtoul(&name[i+1], NULL, 0);
+ nonstd_specified = 1;
+ } else
+ goto done;
+ break;
case '-':
namelen = i;
if (!bpp_specified && !yres_specified) {
@@ -1227,12 +1279,29 @@ static int __init pxafb_parse_options(st
}
if (bpp_specified)
switch (bpp) {
+ case 18:
+ case 19:
+ case 24:
+ case 25:
+ if(nonstd_specified && (((bpp == 18 || bpp == 19) && nonstd == 24) || nonstd == 32))
+ {
+ inf->modes[0].nonstd = nonstd;
+ dev_info(dev, "overriding nonstd pixel packing: %d\n",nonstd);
+ } else {
+ dev_err(dev, "Depth %d requires nonstd to be specified\n",bpp);
+ break;
+ }
case 1:
case 2:
case 4:
case 8:
case 16:
inf->modes[0].bpp = bpp;
+ if(nonstd_specified) {
+ dev_err(dev, "Depth %d requires nonstd to *not* be specified\n",bpp);
+ } else {
+ inf->modes[0].nonstd = 0;
+ }
dev_info(dev, "overriding bit depth: %d\n", bpp);
break;
default:
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1323,6 +1323,8 @@
#define GPIO83_NSTXD 83 /* NSSP transmit */
#define GPIO84_NSRXD 84 /* NSSP receive */
#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
+#define GPIO86_LDD_16 86 /* LCD data pin 16 */
+#define GPIO87_LDD_17 87 /* LCD data pin 17 */
#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
#define GPIO105_nPCE_2 105 /* Card Enable for Card Space (PXA27x) */
@@ -1468,6 +1470,8 @@
#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT)
#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
+#define GPIO86_LDD_16_MD (86 | GPIO_ALT_FN_2_OUT)
+#define GPIO87_LDD_17_MD (87 | GPIO_ALT_FN_2_OUT)
#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
@@ -1878,6 +1882,12 @@
#define LCCR3_4BPP (2 << 24)
#define LCCR3_8BPP (3 << 24)
#define LCCR3_16BPP (4 << 24)
+#define LCCR3_18BPP (5 << 24)
+#define LCCR3_18BPP_PACKED (6 << 24)
+#define LCCR3_19BPP (7 << 24)
+#define LCCR3_19BPP_PACKED (1 << 29)
+#define LCCR3_24BPP ((1 << 29) | (1 << 24))
+#define LCCR3_25BPP ((1 << 29) | (2 << 24))
#define FDADR0 __REG(0x44000200) /* DMA Channel 0 Frame Descriptor Address Register */
#define FSADR0 __REG(0x44000204) /* DMA Channel 0 Frame Source Address Register */
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -25,6 +25,7 @@ struct pxafb_mode_info {
u_short xres;
u_short yres;
+ /* bpp is the path-to-screen bits per pixel, not the in-memory storage required */
u_char bpp;
u_char hsync_len;
u_char left_margin;
@@ -36,7 +37,9 @@ struct pxafb_mode_info {
u_char sync;
u_int cmap_greyscale:1,
- unused:31;
+ nonstd:8, /* nonstd represents the in-memory bits per pixel
+ ie 24 or 32 for 18/19bpp mode, or 32 for 24/25bpp mode */
+ unused:23;
};
struct pxafb_mach_info {
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -146,7 +146,8 @@ static struct pxafb_mode_info gumstix_fb
.pixclock = 110000,
.xres = 480,
.yres = 272,
- .bpp = 16,
+ .bpp = 18,
+ .nonstd = 24,
.hsync_len = 41,
.left_margin = 2,
.right_margin = 2,
@@ -174,7 +175,8 @@ static struct pxafb_mode_info gumstix_fb
.vsync_len = 10, // VLW from datasheet: 10 typ
.upper_margin = 2, // VBP - VLW from datasheet: 12 - 10 = 2
.lower_margin = 4, // VFP from datasheet: 4 typ
- .bpp = 16,
+ .bpp = 18,
+ .nonstd = 24,
.sync = 0, // Hsync and Vsync both active low
};
--- a/drivers/video/cfbfillrect.c
+++ b/drivers/video/cfbfillrect.c
@@ -62,7 +62,10 @@ pixel_to_pat( u32 bpp, u32 pixel)
return 0x0001001001001001ul*pixel;
case 16:
return 0x0001000100010001ul*pixel;
+ case 18:
+ case 19:
case 24:
+ case 25:
return 0x0000000001000001ul*pixel;
case 32:
return 0x0000000100000001ul*pixel;
@@ -87,7 +90,10 @@ pixel_to_pat( u32 bpp, u32 pixel)
return 0x00001001ul*pixel;
case 16:
return 0x00010001ul*pixel;
+ case 18:
+ case 19:
case 24:
+ case 25:
return 0x00000001ul*pixel;
case 32:
return 0x00000001ul*pixel;
@@ -346,7 +352,7 @@ void cfb_fillrect(struct fb_info *p, con
unsigned long pat, fg;
unsigned long width = rect->width, height = rect->height;
int bits = BITS_PER_LONG, bytes = bits >> 3;
- u32 bpp = p->var.bits_per_pixel;
+ u32 bpp = (p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
unsigned long __iomem *dst;
int dst_idx, left;
--- a/drivers/video/cfbimgblt.c
+++ b/drivers/video/cfbimgblt.c
@@ -83,7 +83,7 @@ static inline void color_imageblit(const
/* Draw the penguin */
u32 __iomem *dst, *dst2;
u32 color = 0, val, shift;
- int i, n, bpp = p->var.bits_per_pixel;
+ int i, n, bpp = (p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
u32 null_bits = 32 - bpp;
u32 *palette = (u32 *) p->pseudo_palette;
const u8 *src = image->data;
@@ -140,7 +140,7 @@ static inline void slow_imageblit(const
u32 start_index,
u32 pitch_index)
{
- u32 shift, color = 0, bpp = p->var.bits_per_pixel;
+ u32 shift, color = 0, bpp = (p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
u32 __iomem *dst, *dst2;
u32 val, pitch = p->fix.line_length;
u32 null_bits = 32 - bpp;
@@ -213,7 +213,7 @@ static inline void fast_imageblit(const
u8 __iomem *dst1, u32 fgcolor,
u32 bgcolor)
{
- u32 fgx = fgcolor, bgx = bgcolor, bpp = p->var.bits_per_pixel;
+ u32 fgx = fgcolor, bgx = bgcolor, bpp = (p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
u32 ppw = 32/bpp, spitch = (image->width + 7)/8;
u32 bit_mask, end_mask, eorx, shift;
const char *s = image->data, *src;
@@ -262,7 +262,7 @@ static inline void fast_imageblit(const
void cfb_imageblit(struct fb_info *p, const struct fb_image *image)
{
u32 fgcolor, bgcolor, start_index, bitstart, pitch_index = 0;
- u32 bpl = sizeof(u32), bpp = p->var.bits_per_pixel;
+ u32 bpl = sizeof(u32), bpp = (p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
u32 width = image->width;
u32 dx = image->dx, dy = image->dy;
u8 __iomem *dst1;
--- a/drivers/video/cfbcopyarea.c
+++ b/drivers/video/cfbcopyarea.c
@@ -365,8 +365,8 @@ void cfb_copyarea(struct fb_info *p, con
dst = src = (unsigned long __iomem *)((unsigned long)p->screen_base & ~(bytes-1));
dst_idx = src_idx = 8*((unsigned long)p->screen_base & (bytes-1));
// add offset of source and target area
- dst_idx += dy*bits_per_line + dx*p->var.bits_per_pixel;
- src_idx += sy*bits_per_line + sx*p->var.bits_per_pixel;
+ dst_idx += dy*bits_per_line + dx*(p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
+ src_idx += sy*bits_per_line + sx*(p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel);
if (p->fbops->fb_sync)
p->fbops->fb_sync(p);
@@ -380,7 +380,7 @@ void cfb_copyarea(struct fb_info *p, con
src += src_idx >> (ffs(bits) - 1);
src_idx &= (bytes - 1);
bitcpy_rev(dst, dst_idx, src, src_idx, bits,
- width*p->var.bits_per_pixel);
+ width*(p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel));
}
} else {
while (height--) {
@@ -389,7 +389,7 @@ void cfb_copyarea(struct fb_info *p, con
src += src_idx >> (ffs(bits) - 1);
src_idx &= (bytes - 1);
bitcpy(dst, dst_idx, src, src_idx, bits,
- width*p->var.bits_per_pixel);
+ width*(p->var.nonstd ? p->var.nonstd : p->var.bits_per_pixel));
dst_idx += bits_per_line;
src_idx += bits_per_line;
}
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -983,9 +983,10 @@ static const char *fbcon_startup(void)
DPRINTK("mode: %s\n", info->fix.id);
DPRINTK("visual: %d\n", info->fix.visual);
- DPRINTK("res: %dx%d-%d\n", info->var.xres,
+ DPRINTK("res: %dx%d-%d(%d)\n", info->var.xres,
info->var.yres,
- info->var.bits_per_pixel);
+ info->var.bits_per_pixel,
+ info->var.nonstd ? info->var.nonstd : info->var.bits_per_pixel);
#ifdef CONFIG_ATARI
if (MACH_IS_ATARI) {
--- a/Documentation/fb/pxafb.txt
+++ b/Documentation/fb/pxafb.txt
@@ -9,11 +9,13 @@ For example:
or on the kernel command line
video=pxafb:mode:640x480-8,passive
-mode:XRESxYRES[-BPP]
+mode:XRESxYRES[-BPP[/PACKING]]
XRES == LCCR1_PPL + 1
YRES == LLCR2_LPP + 1
The resolution of the display in pixels
BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16.
+ PACKING == The in-memory bits per pixel. Valid values are 24, 32 when
+ BPP == 18,19,24,25
pixclock:PIXCLOCK
Pixel clock in picoseconds

371
target/linux/pxa/patches-2.6.21/044-smc911x-fixup.patch
View File

@ -1,371 +0,0 @@
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -76,6 +76,7 @@ static const char version[] =
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
+#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -303,14 +304,14 @@ static void smc911x_reset(struct net_dev
SMC_SET_AFC_CFG(lp->afc_cfg);
- /* Set to LED outputs */
- SMC_SET_GPIO_CFG(0x70070000);
+ /* Set to LED outputs and configure EEPROM pins as GP outputs */
+ SMC_SET_GPIO_CFG(GPIO_CFG_LED1_EN_ | GPIO_CFG_LED2_EN_ | 1 << 20);
/*
- * Deassert IRQ for 1*10us for edge type interrupts
+ * Deassert IRQ for 22*10us for edge type interrupts
* and drive IRQ pin push-pull
*/
- SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
+ SMC_SET_IRQ_CFG( (22 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
/* clear anything saved */
if (lp->pending_tx_skb != NULL) {
@@ -413,7 +414,7 @@ static inline void smc911x_drop_pkt(stru
if (fifo_count <= 4) {
/* Manually dump the packet data */
while (fifo_count--)
- SMC_GET_RX_FIFO();
+ (void)SMC_GET_RX_FIFO();
} else {
/* Fast forward through the bad packet */
SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
@@ -900,6 +901,7 @@ static void smc911x_phy_powerdown(struct
unsigned long ioaddr = dev->base_addr;
unsigned int bmcr;
+ DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
/* Enter Link Disable state */
SMC_GET_PHY_BMCR(phy, bmcr);
bmcr |= BMCR_PDOWN;
@@ -925,6 +927,7 @@ static void smc911x_phy_check_media(stru
if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
/* duplex state has changed */
+ DBG(SMC_DEBUG_MISC, "%s: duplex state has changed\n", dev->name);
SMC_GET_PHY_BMCR(phyaddr, bmcr);
SMC_GET_MAC_CR(cr);
if (lp->mii.full_duplex) {
@@ -960,6 +963,7 @@ static void smc911x_phy_configure(struct
int my_phy_caps; /* My PHY capabilities */
int my_ad_caps; /* My Advertised capabilities */
int status;
+ int bmcr;
unsigned long flags;
DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
@@ -1033,9 +1037,12 @@ static void smc911x_phy_configure(struct
DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
+ DBG(SMC_DEBUG_MISC, "%s: phy advertised readback caps=0x%04x\n", dev->name, status);
/* Restart auto-negotiation process in order to advertise my caps */
- SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
+ SMC_GET_PHY_BMCR(phyaddr, bmcr);
+ bmcr |= BMCR_ANENABLE | BMCR_ANRESTART;
+ SMC_SET_PHY_BMCR(phyaddr, bmcr);
smc911x_phy_check_media(dev, 1);
@@ -1888,6 +1895,39 @@ static int __init smc911x_findirq(unsign
return probe_irq_off(cookie);
}
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (1 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
+
/*
* Function: smc911x_probe(unsigned long ioaddr)
*
@@ -2116,15 +2156,13 @@ static int __init smc911x_probe(struct n
#endif
printk("\n");
if (!is_valid_ether_addr(dev->dev_addr)) {
- printk("%s: Invalid ethernet MAC address. Please "
- "set using ifconfig\n", dev->name);
- } else {
- /* Print the Ethernet address */
- printk("%s: Ethernet addr: ", dev->name);
- for (i = 0; i < 5; i++)
- printk("%2.2x:", dev->dev_addr[i]);
- printk("%2.2x\n", dev->dev_addr[5]);
+ gen_serial_ether_addr(dev->dev_addr);
}
+ /* Print the Ethernet address */
+ printk("%s: Ethernet addr: ", dev->name);
+ for (i = 0; i < 5; i++)
+ printk("%2.2x:", dev->dev_addr[i]);
+ printk("%2.2x\n", dev->dev_addr[5]);
if (lp->phy_type == 0) {
PRINTK("%s: No PHY found\n", dev->name);
@@ -2300,8 +2338,15 @@ static struct platform_driver smc911x_dr
},
};
+#ifdef CONFIG_ARCH_GUMSTIX
+extern void gumstix_smc911x_load(void);
+#endif
+
static int __init smc911x_init(void)
{
+#ifdef CONFIG_ARCH_GUMSTIX
+ gumstix_smc911x_load();
+#endif
return platform_driver_register(&smc911x_driver);
}
--- /dev/null
+++ b/drivers/net/gumstix-smc911x.c
@@ -0,0 +1,148 @@
+/*
+ * Gumstix SMC911x chip intialization driver
+ *
+ * Author: Craig Hughes
+ * Created: December 9, 2004
+ * Copyright: (C) 2004 Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/delay.h>
+
+#include <asm/arch/gumstix.h>
+
+#define SMC_DEBUG 9
+#include <asm/io.h>
+#include "smc911x.h"
+
+static struct resource gumstix_smc911x0_resources[] = {
+ [0] = {
+ .name = "smc911x-regs",
+ .start = PXA_CS1_PHYS,
+ .end = PXA_CS1_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = GUMSTIX_ETH0_IRQ,
+ .end = GUMSTIX_ETH0_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource gumstix_smc911x1_resources[] = {
+ [0] = {
+ .name = "smc911x-regs",
+ .start = PXA_CS2_PHYS,
+ .end = PXA_CS2_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = GUMSTIX_ETH1_IRQ,
+ .end = GUMSTIX_ETH1_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device gumstix_smc911x0_device = {
+ .name = "smc911x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(gumstix_smc911x0_resources),
+ .resource = gumstix_smc911x0_resources,
+};
+
+static struct platform_device gumstix_smc911x1_device = {
+ .name = "smc911x",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(gumstix_smc911x1_resources),
+ .resource = gumstix_smc911x1_resources,
+};
+
+static struct platform_device *smc911x_devices[] = {
+ &gumstix_smc911x0_device,
+ &gumstix_smc911x1_device,
+};
+
+/* First we're going to test if there's a 2nd SMC911x, and if not, then we'll free up those resources and the GPIO lines
+ * that it would otherwise use. We have no choice but to probe by doing:
+ * Set nCS2 to CS2 mode
+ * Set the reset line to GPIO out mode, and pull it high, then drop it low (to trigger reset)
+ * Read from the memory space to check for the sentinel sequence identifying a likely SMC911x device
+ */
+int __init gumstix_smc911x_init(void)
+{
+ unsigned int val, num_devices=ARRAY_SIZE(smc911x_devices);
+ void *ioaddr;
+
+ /* Set up nPWE */
+ pxa_gpio_mode(GPIO49_nPWE_MD);
+
+ pxa_gpio_mode(GPIO78_nCS_2_MD);
+ // If either if statement fails, then we'll drop out and turn_off_eth1,
+ // if both succeed, then we'll skip that and just proceed with 2 cards
+ if(request_mem_region(gumstix_smc911x1_resources[1].start, SMC911X_IO_EXTENT, "smc911x probe"))
+ {
+ ioaddr = ioremap(gumstix_smc911x1_resources[1].start, SMC911X_IO_EXTENT);
+ val = SMC_GET_PN();
+ iounmap(ioaddr);
+ release_mem_region(gumstix_smc911x1_resources[1].start, SMC911X_IO_EXTENT);
+ if (CHIP_9115 == val ||
+ CHIP_9116 == val ||
+ CHIP_9117 == val ||
+ CHIP_9118 == val ) {
+ goto proceed;
+ }
+ }
+
+turn_off_eth1:
+ // This is apparently not an SMC911x
+ // So, let's decrement the number of devices to request, and reset the GPIO lines to GPIO IN mode
+ num_devices--;
+ smc911x_devices[1] = NULL;
+ pxa_gpio_mode(78 | GPIO_IN);
+
+proceed:
+ pxa_gpio_mode(GPIO15_nCS_1_MD);
+
+ if(smc911x_devices[1]) pxa_gpio_mode(GPIO_GUMSTIX_ETH1_RST_MD);
+ pxa_gpio_mode(GPIO_GUMSTIX_ETH0_RST_MD);
+
+ if(smc911x_devices[1]) GPCR(GPIO_GUMSTIX_ETH1_RST) = GPIO_bit(GPIO_GUMSTIX_ETH1_RST);
+ GPCR(GPIO_GUMSTIX_ETH0_RST) = GPIO_bit(GPIO_GUMSTIX_ETH0_RST);
+ msleep(500); // Hold RESET for at least 200µ
+
+ if(smc911x_devices[1]) GPSR(GPIO_GUMSTIX_ETH1_RST) = GPIO_bit(GPIO_GUMSTIX_ETH1_RST);
+ GPSR(GPIO_GUMSTIX_ETH0_RST) = GPIO_bit(GPIO_GUMSTIX_ETH0_RST);
+ msleep(50);
+
+ return platform_add_devices(smc911x_devices, num_devices);
+}
+
+void __exit gumstix_smc911x_exit(void)
+{
+ if(smc911x_devices[1] != NULL) platform_device_unregister(&gumstix_smc911x1_device);
+ platform_device_unregister(&gumstix_smc911x0_device);
+}
+
+void gumstix_smc911x_load(void) {}
+EXPORT_SYMBOL(gumstix_smc911x_load);
+
+module_init(gumstix_smc911x_init);
+module_exit(gumstix_smc911x_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Craig Hughes <craig@gumstix.com>");
+MODULE_DESCRIPTION("Gumstix board SMC911x chip initialization driver");
+MODULE_VERSION("1:0.1");
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1020,6 +1020,13 @@ config SMC911X
called smc911x. If you want to compile it as a module, say M
here and read <file:Documentation/modules.txt>
+config SMC911X_GUMSTIX
+ tristate
+ default m if SMC911X=m
+ default y if SMC911X=y
+ depends on SMC911X && ARCH_GUMSTIX
+
+
config NET_VENDOR_RACAL
bool "Racal-Interlan (Micom) NI cards"
depends on NET_ETHERNET && ISA
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -202,6 +202,7 @@ obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_SMC91X_GUMSTIX) += gumstix-smc91x.o
+obj-$(CONFIG_SMC911X_GUMSTIX) += gumstix-smc911x.o
obj-$(CONFIG_ARM) += arm/
obj-$(CONFIG_DEV_APPLETALK) += appletalk/
obj-$(CONFIG_TR) += tokenring/
--- a/include/asm-arm/arch-pxa/gumstix.h
+++ b/include/asm-arm/arch-pxa/gumstix.h
@@ -52,7 +52,7 @@
#define GPIO_GUMSTIX_ETH0_RST 80
#define GPIO_GUMSTIX_ETH0 36
#else
-#define GPIO_GUMSTIX_ETH0_RST 32
+#define GPIO_GUMSTIX_ETH0_RST 107
#define GPIO_GUMSTIX_ETH0 99
#endif
#define GPIO_GUMSTIX_ETH1_RST 52
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -33,7 +33,9 @@
* Use the DMA feature on PXA chips
*/
#ifdef CONFIG_ARCH_PXA
+#if !defined( CONFIG_SMC911X_GUMSTIX ) && !defined( CONFIG_SMC911X_GUMSTIX_MODULE )
#define SMC_USE_PXA_DMA 1
+#endif
#define SMC_USE_16BIT 0
#define SMC_USE_32BIT 1
#endif
@@ -46,13 +48,13 @@
#if SMC_USE_16BIT
#define SMC_inb(a, r) readb((a) + (r))
#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_inl(a, r) ((SMC_inw(a, r) & 0xFFFF)+(SMC_inw(a+2, r)<<16))
+#define SMC_inl(a, r) ((SMC_inw(a, r) & 0xFFFF)+(SMC_inw((a)+2, r)<<16))
#define SMC_outb(v, a, r) writeb(v, (a) + (r))
#define SMC_outw(v, a, r) writew(v, (a) + (r))
#define SMC_outl(v, a, r) \
do{ \
- writel(v & 0xFFFF, (a) + (r)); \
- writel(v >> 16, (a) + (r) + 2); \
+ writel((v) & 0xFFFF, (a) + (r)); \
+ writel((v) >> 16, (a) + (r) + 2); \
} while (0)
#define SMC_insl(a, r, p, l) readsw((short*)((a) + (r)), p, l*2)
#define SMC_outsl(a, r, p, l) writesw((short*)((a) + (r)), p, l*2)

533
target/linux/pxa/patches/000-cpufreq.patch
View File

@ -1,533 +0,0 @@
diff -Nurbw linux-2.6.17/arch/arm/Kconfig linux-2.6.17-patched/arch/arm/Kconfig
--- linux-2.6.17/arch/arm/Kconfig 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/arch/arm/Kconfig 2006-09-21 14:57:02.000000000 -0700
@@ -656,7 +656,7 @@
endmenu
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
menu "CPU Frequency scaling"
@@ -685,6 +685,13 @@
endmenu
+config CPU_FREQ_PXA
+ bool
+ depends on CPU_FREQ && ARCH_PXA
+ default y
+ select CPU_FREQ_DEFAULT_GOV_USERSPACE
+ select CPU_FREQ_TABLE
+
endif
menu "Floating point emulation"
diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c
--- linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c 1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c 2006-09-21 14:57:02.000000000 -0700
@@ -0,0 +1,324 @@
+/*
+ * linux/arch/arm/mach-pxa/cpu-pxa.c
+ *
+ * Copyright (C) 2002,2003 Intrinsyc Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * History:
+ * 31-Jul-2002 : Initial version [FB]
+ * 29-Jan-2003 : added PXA255 support [FB]
+ * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
+ *
+ * Note:
+ * This driver may change the memory bus clock rate, but will not do any
+ * platform specific access timing changes... for example if you have flash
+ * memory connected to CS0, you will need to register a platform specific
+ * notifier which will adjust the memory access strobes to maintain a
+ * minimum strobe width.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/pxa-regs.h>
+
+#undef DEBUG
+
+#ifdef DEBUG
+ static unsigned int freq_debug = DEBUG;
+ module_param(freq_debug, int, 0);
+ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
+#else
+ #define freq_debug 0
+#endif
+
+typedef struct
+{
+ unsigned int khz;
+ unsigned int membus;
+ unsigned int cccr;
+ unsigned int div2;
+} pxa_freqs_t;
+
+/* Define the refresh period in mSec for the SDRAM and the number of rows */
+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
+#define SDRAM_ROWS 2048 /* 64MB=8192 32MB=4096 */
+#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
+
+#define CCLKCFG_TURBO 0x1
+#define CCLKCFG_FCS 0x2
+#define PXA25x_MIN_FREQ 99533
+#define PXA25x_MAX_FREQ 530842
+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK 0xFFF
+
+
+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
+static pxa_freqs_t pxa255_run_freqs[] =
+{
+ /* CPU MEMBUS CCCR DIV2*/
+ { 99533, 99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
+ {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
+ {199066, 99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
+ {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
+ {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
+ {398131, 99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99, SDRAM=99 */
+ {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
+ {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
+ {0,}
+};
+#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
+
+static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
+
+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
+static pxa_freqs_t pxa255_turbo_freqs[] =
+{
+ /* CPU MEMBUS CCCR DIV2*/
+ { 99533, 99533, 0x121, 1}, /* run=99, turbo= 99, PXbus=99, SDRAM=50 */
+ {149299, 99533, 0x1a1, 0}, /* run=99, turbo=149, PXbus=99, SDRAM=99 */
+ {199066, 99533, 0x221, 0}, /* run=99, turbo=199, PXbus=99, SDRAM=99 */
+ {298598, 99533, 0x321, 0}, /* run=99, turbo=299, PXbus=99, SDRAM=99 */
+ {398131, 99533, 0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
+ {0,}
+};
+#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
+
+static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
+
+extern unsigned get_clk_frequency_khz(int info);
+
+/* find a valid frequency point */
+static int pxa_verify_policy(struct cpufreq_policy *policy)
+{
+ int ret;
+ struct cpufreq_frequency_table *pxa_freqs_table;
+
+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+ pxa_freqs_table = pxa255_run_freq_table;
+ } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+ pxa_freqs_table = pxa255_turbo_freq_table;
+ } else {
+ printk("CPU PXA: Unknown policy found. "
+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
+ pxa_freqs_table = pxa255_run_freq_table;
+ }
+ ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
+
+ if(freq_debug) {
+ printk("Verified CPU policy: %dKhz min to %dKhz max\n",
+ policy->min, policy->max);
+ }
+
+ return ret;
+}
+
+static int pxa_set_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
+{
+ int idx;
+ cpumask_t cpus_allowed;
+ int cpu = policy->cpu;
+ struct cpufreq_freqs freqs;
+ pxa_freqs_t *pxa_freq_settings;
+ struct cpufreq_frequency_table *pxa_freqs_table;
+ unsigned long flags;
+ unsigned int unused;
+ unsigned int preset_mdrefr, postset_mdrefr;
+ void *ramstart;
+
+ /*
+ * Save this threads cpus_allowed mask.
+ */
+ cpus_allowed = current->cpus_allowed;
+
+ /*
+ * Bind to the specified CPU. When this call returns,
+ * we should be running on the right CPU.
+ */
+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
+ BUG_ON(cpu != smp_processor_id());
+
+ /* Get the current policy */
+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+ pxa_freq_settings = pxa255_run_freqs;
+ pxa_freqs_table = pxa255_run_freq_table;
+ }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+ pxa_freq_settings = pxa255_turbo_freqs;
+ pxa_freqs_table = pxa255_turbo_freq_table;
+ }else {
+ printk("CPU PXA: Unknown policy found. "
+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
+ pxa_freq_settings = pxa255_run_freqs;
+ pxa_freqs_table = pxa255_run_freq_table;
+ }
+
+ /* Lookup the next frequency */
+ if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
+ target_freq, relation, &idx)) {
+ return -EINVAL;
+ }
+
+ freqs.old = policy->cur;
+ freqs.new = pxa_freq_settings[idx].khz;
+ freqs.cpu = policy->cpu;
+ if(freq_debug) {
+ printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
+ freqs.new/1000, (pxa_freq_settings[idx].div2) ?
+ (pxa_freq_settings[idx].membus/2000) :
+ (pxa_freq_settings[idx].membus/1000));
+ }
+
+ ramstart = phys_to_virt(0xa0000000);
+
+ /*
+ * Tell everyone what we're about to do...
+ * you should add a notify client with any platform specific
+ * Vcc changing capability
+ */
+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+ /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
+ * we need to preset the smaller DRI before the change. If we're speeding
+ * up we need to set the larger DRI value after the change.
+ */
+ preset_mdrefr = postset_mdrefr = MDREFR;
+ if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
+ MDREFR_DRI(pxa_freq_settings[idx].membus);
+ }
+ postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
+ MDREFR_DRI(pxa_freq_settings[idx].membus);
+
+ /* If we're dividing the memory clock by two for the SDRAM clock, this
+ * must be set prior to the change. Clearing the divide must be done
+ * after the change.
+ */
+ if(pxa_freq_settings[idx].div2) {
+ preset_mdrefr |= MDREFR_DB2_MASK;
+ postset_mdrefr |= MDREFR_DB2_MASK;
+ } else {
+ postset_mdrefr &= ~MDREFR_DB2_MASK;
+ }
+
+ local_irq_save(flags);
+
+ /* Set new the CCCR */
+ CCCR = pxa_freq_settings[idx].cccr;
+
+ __asm__ __volatile__(" \
+ ldr r4, [%1] ; /* load MDREFR */ \
+ b 2f ; \
+ .align 5 ; \
+1: \
+ str %4, [%1] ; /* preset the MDREFR */ \
+ mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
+ str %5, [%1] ; /* postset the MDREFR */ \
+ \
+ b 3f ; \
+2: b 1b ; \
+3: nop ; \
+ "
+ : "=&r" (unused)
+ : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
+ "r" (preset_mdrefr), "r" (postset_mdrefr)
+ : "r4", "r5");
+ local_irq_restore(flags);
+
+ /*
+ * Restore the CPUs allowed mask.
+ */
+ set_cpus_allowed(current, cpus_allowed);
+
+ /*
+ * Tell everyone what we've just done...
+ * you should add a notify client with any platform specific
+ * SDRAM refresh timer adjustments
+ */
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+ return 0;
+}
+
+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+{
+ cpumask_t cpus_allowed;
+ unsigned int cpu = policy->cpu;
+ int i;
+
+ cpus_allowed = current->cpus_allowed;
+
+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
+ BUG_ON(cpu != smp_processor_id());
+
+ /* set default policy and cpuinfo */
+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
+ policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
+ policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+ policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
+ policy->cur = get_clk_frequency_khz(0); /* current freq */
+ policy->min = policy->max = policy->cur;
+
+ /* Generate the run cpufreq_frequency_table struct */
+ for(i=0;i<NUM_RUN_FREQS;i++) {
+ pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
+ pxa255_run_freq_table[i].index = i;
+ }
+ pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
+ /* Generate the turbo cpufreq_frequency_table struct */
+ for(i=0;i<NUM_TURBO_FREQS;i++) {
+ pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
+ pxa255_turbo_freq_table[i].index = i;
+ }
+ pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+ set_cpus_allowed(current, cpus_allowed);
+ printk(KERN_INFO "PXA CPU frequency change support initialized\n");
+
+ return 0;
+}
+
+static struct cpufreq_driver pxa_cpufreq_driver = {
+ .verify = pxa_verify_policy,
+ .target = pxa_set_target,
+ .init = pxa_cpufreq_init,
+ .name = "PXA25x",
+};
+
+static int __init pxa_cpu_init(void)
+{
+ return cpufreq_register_driver(&pxa_cpufreq_driver);
+}
+
+static void __exit pxa_cpu_exit(void)
+{
+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
+}
+
+
+MODULE_AUTHOR ("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
+MODULE_LICENSE("GPL");
+module_init(pxa_cpu_init);
+module_exit(pxa_cpu_exit);
+
diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/Makefile linux-2.6.17-patched/arch/arm/mach-pxa/Makefile
--- linux-2.6.17/arch/arm/mach-pxa/Makefile 2006-09-21 15:11:33.000000000 -0700
+++ linux-2.6.17-patched/arch/arm/mach-pxa/Makefile 2006-09-21 14:57:02.000000000 -0700
@@ -30,5 +30,6 @@
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_PXA_SSP) += ssp.o
+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
ifeq ($(CONFIG_PXA27x),y)
obj-$(CONFIG_PM) += standby.o
diff -Nurbw linux-2.6.17/Documentation/cpu-freq/user-guide.txt linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt
--- linux-2.6.17/Documentation/cpu-freq/user-guide.txt 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt 2006-09-21 14:57:02.000000000 -0700
@@ -18,7 +18,7 @@
Contents:
---------
1. Supported Architectures and Processors
-1.1 ARM
+1.1 ARM, PXA
1.2 x86
1.3 sparc64
1.4 ppc
@@ -37,14 +37,15 @@
1. Supported Architectures and Processors
=========================================
-1.1 ARM
--------
+1.1 ARM, PXA
+------------
The following ARM processors are supported by cpufreq:
ARM Integrator
ARM-SA1100
ARM-SA1110
+Intel PXA
1.2 x86
diff -Nurbw linux-2.6.17/drivers/cpufreq/Kconfig linux-2.6.17-patched/drivers/cpufreq/Kconfig
--- linux-2.6.17/drivers/cpufreq/Kconfig 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/drivers/cpufreq/Kconfig 2006-09-21 15:06:12.000000000 -0700
@@ -46,13 +46,9 @@
This will show detail CPU frequency translation table in sysfs file
system
-# Note that it is not currently possible to set the other governors (such as ondemand)
-# as the default, since if they fail to initialise, cpufreq will be
-# left in an undefined state.
-
choice
prompt "Default CPUFreq governor"
- default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
help
This option sets which CPUFreq governor shall be loaded at
@@ -66,6 +62,14 @@
the frequency statically to the highest frequency supported by
the CPU.
+config CPU_FREQ_DEFAULT_GOV_POWERSAVE
+ bool "powersave"
+ select CPU_FREQ_GOV_POWERSAVE
+ help
+ Use the CPUFreq governor 'powersave' as default. This sets
+ the frequency statically to the lowest frequency supported by
+ the CPU.
+
config CPU_FREQ_DEFAULT_GOV_USERSPACE
bool "userspace"
select CPU_FREQ_GOV_USERSPACE
@@ -75,6 +79,23 @@
program shall be able to set the CPU dynamically without having
to enable the userspace governor manually.
+config CPU_FREQ_DEFAULT_GOV_ONDEMAND
+ bool "ondemand"
+ select CPU_FREQ_GOV_ONDEMAND
+ help
+ Use the CPUFreq governor 'ondemand' as default. This sets
+ the frequency dynamically based on CPU load, throttling up
+ and down as necessary.
+
+config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
+ bool "conservative"
+ select CPU_FREQ_GOV_CONSERVATIVE
+ help
+ Use the CPUFreq governor 'conservative' as default. This sets
+ the frequency dynamically based on CPU load, throttling up
+ and down as necessary. The frequency is gracefully increased
+ and decreased rather than jumping to 100% when speed is required.
+
endchoice
config CPU_FREQ_GOV_PERFORMANCE
diff -Nurbw linux-2.6.17/include/linux/cpufreq.h linux-2.6.17-patched/include/linux/cpufreq.h
--- linux-2.6.17/include/linux/cpufreq.h 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/include/linux/cpufreq.h 2006-09-21 15:08:35.000000000 -0700
@@ -276,9 +276,18 @@
#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
extern struct cpufreq_governor cpufreq_gov_performance;
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_performance
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE)
+extern struct cpufreq_governor cpufreq_gov_powersave;
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_powersave
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
extern struct cpufreq_governor cpufreq_gov_userspace;
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
+extern struct cpufreq_governor cpufreq_gov_ondemand;
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_ondemand;
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
+extern struct cpufreq_governor cpufreq_gov_conservative;
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_conservative;
#endif
diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c
--- linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c 2006-09-21 15:26:46.000000000 -0700
+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c 2006-06-17 18:49:35.000000000 -0700
@@ -529,7 +529,7 @@
return 0;
}
-static struct cpufreq_governor cpufreq_gov_dbs = {
+struct cpufreq_governor cpufreq_gov_conservative = {
.name = "conservative",
.governor = cpufreq_governor_dbs,
.owner = THIS_MODULE,
@@ -537,7 +537,7 @@
static int __init cpufreq_gov_dbs_init(void)
{
- return cpufreq_register_governor(&cpufreq_gov_dbs);
+ return cpufreq_register_governor(&cpufreq_gov_conservative);
}
static void __exit cpufreq_gov_dbs_exit(void)
@@ -545,7 +545,7 @@
/* Make sure that the scheduled work is indeed not running */
flush_scheduled_work();
- cpufreq_unregister_governor(&cpufreq_gov_dbs);
+ cpufreq_unregister_governor(&cpufreq_gov_conservative);
}
diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c
--- linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c 2006-09-27 14:00:15.000000000 -0700
@@ -484,7 +484,7 @@
return 0;
}
-static struct cpufreq_governor cpufreq_gov_dbs = {
+struct cpufreq_governor cpufreq_gov_ondemand = {
.name = "ondemand",
.governor = cpufreq_governor_dbs,
.owner = THIS_MODULE,
@@ -492,7 +492,7 @@
static int __init cpufreq_gov_dbs_init(void)
{
- return cpufreq_register_governor(&cpufreq_gov_dbs);
+ return cpufreq_register_governor(&cpufreq_gov_ondemand);
}
static void __exit cpufreq_gov_dbs_exit(void)
@@ -504,7 +504,7 @@
destroy_workqueue(dbs_workq);
}
- cpufreq_unregister_governor(&cpufreq_gov_dbs);
+ cpufreq_unregister_governor(&cpufreq_gov_ondemand);
}

837
target/linux/pxa/patches/001-gumstix_verdex_pro_arch_support.patch Normal file
View File

@ -0,0 +1,837 @@
From 4f4bb58cba3a6c44e9f9f113609287d9d50be9c4 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:11:28 -0400
Subject: [PATCH] [ARM] Gumstix Verdex Pro arch support
add an option for Verdex Pro when ARCH_GUMSTIX is selected, and
factor earlier Gumstix support into a seperate option
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/Kconfig | 29 +-
arch/arm/mach-pxa/Makefile | 3 +-
arch/arm/mach-pxa/gumstix-verdex.c | 749 +++++++++++++++++++++++++++
arch/arm/mach-pxa/include/mach/mfp-pxa27x.h | 1 +
4 files changed, 772 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-pxa/gumstix-verdex.c
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -32,23 +32,34 @@ endmenu
endif
config ARCH_GUMSTIX
- bool "Gumstix XScale 255 boards"
- select PXA25x
+ bool "Gumstix boards"
help
- Say Y here if you intend to run this kernel on
- Basix, Connex, ws-200ax, ws-400ax systems
+ Say Y here if you intend to run this kernel on a
+ gumstix computer.
-choice
- prompt "Gumstix Carrier/Expansion Board"
depends on ARCH_GUMSTIX
-config GUMSTIX_AM200EPD
+config MACH_GUMSTIX_F
+ bool "Gumstix Basix/Connex ..."
+ depends on ARCH_GUMSTIX
+ select PXA25x
+
+ choice
+ prompt "Gumstix Carrier/Expansion Board"
+ depends on MACH_GUMSTIX_F
+
+ config GUMSTIX_AM200EPD
bool "Enable AM200EPD board support"
-config GUMSTIX_AM300EPD
+ config GUMSTIX_AM300EPD
bool "Enable AM300EPD board support"
-endchoice
+ endchoice
+
+config MACH_GUMSTIX_VERDEX
+ bool "Gumstix VERDEX ..."
+ depends on ARCH_GUMSTIX
+ select PXA27x
config MACH_INTELMOTE2
bool "Intel Mote 2 Platform"
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -25,7 +25,8 @@ obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o
# Specific board support
-obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_F) += gumstix.o
+obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += gumstix-verdex.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
--- /dev/null
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -0,0 +1,749 @@
+/*
+ * linux/arch/arm/mach-pxa/gumstix-verdex.c
+ *
+ * Support for the Gumstix verdex motherboard.
+ *
+ * Original Author: Craig Hughes
+ * Created: Feb 14, 2008
+ * Copyright: Craig Hughes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Implemented based on lubbock.c by Nicolas Pitre and code from Craig
+ * Hughes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/i2c/tsc2007.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+#include <asm/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
+
+#include <mach/mmc.h>
+#include <mach/udc.h>
+#include <mach/pxafb.h>
+#include <mach/ohci.h>
+#include <plat/i2c.h>
+#include <mach/pxa27x.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/gpio.h>
+
+#include <mach/gumstix.h>
+
+#include "generic.h"
+
+#include <linux/delay.h>
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+
+#include <linux/smsc911x.h>
+
+static struct resource verdex_smsc911x_resources[] = {
+ [0] = {
+ .name = "smsc911x-memory",
+ .start = PXA_CS1_PHYS,
+ .end = PXA_CS1_PHYS + 0x000fffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_GPIO(GPIO_GUMSTIX_ETH0),
+ .end = IRQ_GPIO(GPIO_GUMSTIX_ETH0),
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
+ },
+};
+
+static struct smsc911x_platform_config verdex_smsc911x_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+ .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device verdex_smsc911x_device = {
+ .name = "smsc911x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(verdex_smsc911x_resources),
+ .resource = verdex_smsc911x_resources,
+ .dev = {
+ .platform_data = &verdex_smsc911x_config,
+ },
+};
+
+static void __init verdex_init_smsc911x(void)
+{
+
+ printk(KERN_INFO "Initializing Gumstix verdex smsc911x\n");
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0_RST, "SMSC911x_ETH0_RST") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_RST\n");
+ goto err_request_gpio_eth0_rst;
+ }
+
+ if (gpio_request(GPIO_GUMSTIX_ETH0, "SMSC911x_ETH0_IRQ") != 0) {
+ printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_IRQ\n");
+ goto err_request_gpio_eth0_irq;
+ }
+
+ if (gpio_direction_output(GPIO_GUMSTIX_ETH0_RST, 0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_RST pin to output\n");
+ goto err_dir;
+ }
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 0);
+
+ msleep(500); // Hold RESET for at least 200ms
+
+ gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 1);
+
+ msleep(50);
+
+ if (gpio_direction_input(GPIO_GUMSTIX_ETH0) != 0) {
+ printk(KERN_ERR "could not set SMSC911x_ETH0_IRQ pin to input\n");
+ goto err_dir;
+ }
+
+ gpio_export(GPIO_GUMSTIX_ETH0, 0);
+ platform_device_register(&verdex_smsc911x_device);
+ return;
+
+err_dir:
+ gpio_free(GPIO_GUMSTIX_ETH0_RST);
+
+err_request_gpio_eth0_irq:
+ gpio_free(GPIO_GUMSTIX_ETH0);
+
+err_request_gpio_eth0_rst:
+ return;
+}
+
+#else
+static void __init verdex_init_smsc911x(void) { return; }
+#endif
+
+static unsigned long verdex_pin_config[] = {
+ /* MMC */
+ GPIO32_MMC_CLK,
+ GPIO112_MMC_CMD,
+ GPIO92_MMC_DAT_0,
+ GPIO109_MMC_DAT_1,
+ GPIO110_MMC_DAT_2,
+ GPIO111_MMC_DAT_3,
+
+ /* BTUART */
+ GPIO42_BTUART_RXD,
+ GPIO43_BTUART_TXD,
+ GPIO44_BTUART_CTS,
+ GPIO45_BTUART_RTS,
+
+ /* STUART */
+ GPIO46_STUART_RXD,
+ GPIO47_STUART_TXD,
+
+ /* FFUART */
+ GPIO34_FFUART_RXD,
+ GPIO39_FFUART_TXD,
+
+ /* SSP 2 */
+ GPIO19_SSP2_SCLK,
+ GPIO14_SSP2_SFRM,
+ GPIO13_SSP2_TXD,
+ GPIO11_SSP2_RXD,
+
+ /* SDRAM and local bus */
+ GPIO49_nPWE,
+ GPIO15_nCS_1,
+
+ /* I2C */
+ GPIO117_I2C_SCL,
+ GPIO118_I2C_SDA,
+
+ /* PWM 0 */
+ GPIO16_PWM0_OUT,
+
+ /* BRIGHTNESS */
+ GPIO17_PWM1_OUT,
+
+ /* LCD */
+ GPIO58_LCD_LDD_0,
+ GPIO59_LCD_LDD_1,
+ GPIO60_LCD_LDD_2,
+ GPIO61_LCD_LDD_3,
+ GPIO62_LCD_LDD_4,
+ GPIO63_LCD_LDD_5,
+ GPIO64_LCD_LDD_6,
+ GPIO65_LCD_LDD_7,
+ GPIO66_LCD_LDD_8,
+ GPIO67_LCD_LDD_9,
+ GPIO68_LCD_LDD_10,
+ GPIO69_LCD_LDD_11,
+ GPIO70_LCD_LDD_12,
+ GPIO71_LCD_LDD_13,
+ GPIO72_LCD_LDD_14,
+ GPIO73_LCD_LDD_15,
+ GPIO74_LCD_FCLK,
+ GPIO75_LCD_LCLK,
+ GPIO76_LCD_PCLK,
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ /* Done below in verdex_init */
+#else
+ GPIO77_LCD_BIAS,
+#endif
+
+};
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+
+static unsigned long gpio_ntschg_0[] = {
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+};
+
+static unsigned long gpio_ntschg_1[] = {
+ GPIO18_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_1_MD);
+ GPIO36_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_1_MD);
+ GPIO27_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_1_MD);
+};
+
+static unsigned long gpio_prdy_nbsy_old[] = {
+ GPIO111_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_0_MD);
+ GPIO109_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD);
+};
+
+static unsigned long gpio_prdy_nbsy[] = {
+ GPIO96_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_MD);
+};
+
+static unsigned long gpio_nhw_init[] = {
+ GPIO48_nPOE, // pxa_gpio_mode(GPIO_GUMSTIX_nPOE_MD);
+ GPIO102_nPCE_1, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1_MD);
+ GPIO105_nPCE_2, // pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2_MD);
+ GPIO104_GPIO, // pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
+
+ GPIO49_nPWE, // pxa_gpio_mode(GPIO_GUMSTIX_nPWE_MD);
+ GPIO50_nPIOR, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOR_MD);
+ GPIO51_nPIOW, // pxa_gpio_mode(GPIO_GUMSTIX_nPIOW_MD);
+ GPIO79_PSKTSEL, // pxa_gpio_mode(GPIO_GUMSTIX_pSKTSEL_MD);
+ GPIO55_nPREG, // pxa_gpio_mode(GPIO_GUMSTIX_nPREG_MD);
+ GPIO56_nPWAIT, // pxa_gpio_mode(GPIO_GUMSTIX_nPWAIT_MD);
+ GPIO57_nIOIS16, // pxa_gpio_mode(GPIO_GUMSTIX_nIOIS16_MD);
+};
+
+static int net_cf_vx_mode = 0;
+static int pcmcia_cf_nr = 2;
+
+inline void __init gumstix_pcmcia_cpld_clk(void)
+{
+ GPCR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
+ GPSR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
+}
+
+inline unsigned char __init gumstix_pcmcia_cpld_read_bits(int bits)
+{
+ unsigned char result = 0;
+ unsigned int shift = 0;
+ while(bits--)
+ {
+ result |= !!(GPLR(GPIO_GUMSTIX_nCD_0) & GPIO_bit(GPIO_GUMSTIX_nCD_0)) << shift;
+ shift ++;
+ gumstix_pcmcia_cpld_clk();
+ }
+ printk("CPLD responded with: %02x\n",result);
+ return result;
+}
+
+/* We use the CPLD on the CF-CF card to read a value from a shift register. If we can read that
+ * magic sequence, then we have 2 CF cards; otherwise we assume just one
+ * The CPLD will send the value of the shift register on GPIO11 (the CD line for slot 0)
+ * when RESET is held in reset. We use GPIO48 (nPOE) as a clock signal,
+ * GPIO52/53 (card enable for both cards) to control read/write to the shift register
+ */
+static void __init gumstix_count_cards(void)
+{
+
+ if ((gpio_request(GPIO_GUMSTIX_nPOE, "GPIO_GUMSTIX_nPOE") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPOE, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPOE, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPOE\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_1, "GPIO_GUMSTIX_nPCE_1") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_1, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_1, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_1\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nPCE_2, "GPIO_GUMSTIX_nPCE_2") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_nPCE_2, 1) == 0))
+ gpio_export(GPIO_GUMSTIX_nPCE_2, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_2\n");
+
+ if ((gpio_request(GPIO_GUMSTIX_nCD_0, "GPIO_GUMSTIX_nCD_0") == 0) &&
+ (gpio_direction_input(GPIO_GUMSTIX_nCD_0) == 0))
+ gpio_export(GPIO_GUMSTIX_nCD_0, 0);
+ else
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nCD_0\n");
+
+ if (net_cf_vx_mode) {
+ if ((gpio_request(GPIO_GUMSTIX_CF_OLD_RESET, "GPIO_GUMSTIX_CF_OLD_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_OLD_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_OLD_RESET\n");
+ }
+ } else {
+ if ((gpio_request(GPIO_GUMSTIX_CF_RESET, "GPIO_GUMSTIX_CF_RESET") == 0) &&
+ (gpio_direction_output(GPIO_GUMSTIX_CF_RESET, 1) == 0)) {
+ gpio_export(GPIO_GUMSTIX_CF_RESET, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_RESET\n");
+ }
+ }
+
+ // Setup the shift register
+ GPSR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
+ GPCR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
+
+ // Tick the clock to program the shift register
+ gumstix_pcmcia_cpld_clk();
+
+ // Now set shift register into read mode
+ GPCR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
+ GPSR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
+
+ // We can read the bits now -- 0xC2 means "Dual compact flash"
+ if(gumstix_pcmcia_cpld_read_bits(8) != 0xC2)
+ {
+ // We do not have 2 CF slots
+ pcmcia_cf_nr = 1;
+ }
+
+ udelay(50);
+
+ if (net_cf_vx_mode) {
+ gpio_set_value(GPIO_GUMSTIX_CF_OLD_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_set_value(GPIO_GUMSTIX_CF_RESET, 0);
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+ printk(KERN_INFO "found %d CF slots\n", pcmcia_cf_nr);
+
+ gpio_free(GPIO_GUMSTIX_nPCE_2);
+ gpio_free(GPIO_GUMSTIX_nPCE_1);
+ gpio_free(GPIO_GUMSTIX_nPOE);
+ return;
+}
+
+#define SMC_IO_EXTENT 16
+#define BANK_SELECT 14
+
+static void __init verdex_pcmcia_pin_config(void)
+{
+ struct resource *res;
+ void *network_controller_memory;
+ struct platform_device *pdev = &verdex_smsc911x_device;
+
+ printk(KERN_INFO "Initializing Gumstix verdex pcmcia\n");
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ printk(KERN_ERR "no memory resource defined\n");
+ goto err_done;
+ }
+
+ res = request_mem_region(res->start, SMC_IO_EXTENT, "smc91x probe");
+ if (res == NULL) {
+ printk(KERN_ERR "failed to request memory resource\n");
+ goto err_done;
+ }
+
+ // We check for the possibility of SMSC91c111 (reg base offset 0x300 from CS1 base)
+ network_controller_memory = ioremap(res->start + 0x300, SMC_IO_EXTENT);
+ if (network_controller_memory == NULL) {
+ printk(KERN_ERR "failed to ioremap() registers\n");
+ goto err_free_mem;
+ }
+
+ // Look for the special 91c111 value in the bank select register
+ if((0xff00 & readw(network_controller_memory+BANK_SELECT)) == 0x3300) {
+ printk(KERN_INFO "Detected netCF-vx board: pcmcia using older GPIO configuration\n");
+ net_cf_vx_mode = 1;
+ } else {
+ printk(KERN_INFO "Not netCF-vx board: pcmcia using newer GPIO configuration\n");
+ net_cf_vx_mode = 0;
+ }
+
+ iounmap(network_controller_memory);
+err_free_mem:
+ release_mem_region(res->start, SMC_IO_EXTENT);
+err_done:
+
+ gumstix_count_cards(); // this can update pcmcia_cf_nr
+
+ // If pcmcia_cf_nr is 1 then we do not have 2 CF slots
+ // Note: logic sequence was altered from previous kernel revs
+ // so that this works as intended now.
+ if (pcmcia_cf_nr != 0)
+ {
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_0));
+
+ if(net_cf_vx_mode)
+ pxa2xx_mfp_config(gpio_prdy_nbsy_old, 1);
+ else
+ pxa2xx_mfp_config(gpio_prdy_nbsy, 1);
+
+ } else {
+ // Note: this reconfigures pin GPIO18 to be GPIO-IN so make
+ // sure that this only gets done for the old dual slot board
+ // since that pin is an active AF1 out-mode signal (RDY) on
+ // newer boards and changing the pin mode on the newer boards
+ // would result in memory corruption for the NIC (and hang during
+ // PHY test).
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_1));
+ }
+
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_nhw_init));
+ return;
+}
+
+int __init gumstix_get_cf_cards(void)
+{
+ return pcmcia_cf_nr;
+}
+EXPORT_SYMBOL(gumstix_get_cf_cards);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+int __init gumstix_check_if_netCF_vx(void)
+{
+ return net_cf_vx_mode;
+}
+EXPORT_SYMBOL(gumstix_check_if_netCF_vx);
+#endif
+
+#endif
+
+#if defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static void gumstix_lcd_backlight(int on_or_off)
+{
+ int err;
+ err = gpio_request(17, "LCD BACKLIGHT");
+ if (err) {
+ //pr_warning("Gumstix Verdex: Failed to request LCD Backlight gpio\n");
+ return;
+ }
+
+ if(on_or_off) {
+ gpio_direction_input(17);
+ } else {
+ GPCR(17) = GPIO_bit(17);
+ gpio_direction_output(17, 0);
+ GPCR(17) = GPIO_bit(17);
+ }
+
+ return;
+}
+#endif
+
+#ifdef CONFIG_FB_PXA_ALPS_CDOLLAR
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 300000,
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .hsync_len = 2,
+ .left_margin = 1,
+ .right_margin = 1,
+ .vsync_len = 3,
+ .upper_margin = 0,
+ .lower_margin = 0,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Pas | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_PixFlEdg,
+};
+#elif defined(CONFIG_FB_PXA_SHARP_LQ043_PSP)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 110000,
+ .xres = 480,
+ .yres = 272,
+ .bpp = 16,
+ .hsync_len = 41,
+ .left_margin = 2,
+ .right_margin = 2,
+ .vsync_len = 10,
+ .upper_margin = 2,
+ .lower_margin = 2,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#elif defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+static struct pxafb_mode_info gumstix_fb_mode = {
+ .pixclock = 108696, // 9.2MHz typical DOTCLK from datasheet
+ .xres = 480,
+ .hsync_len = 41, // HLW from datasheet: 41 typ
+ .left_margin = 4, // HBP - HLW from datasheet: 45 - 41 = 4
+ .right_margin = 8, // HFP from datasheet: 8 typ
+ .yres = 272,
+ .vsync_len = 10, // VLW from datasheet: 10 typ
+ .upper_margin = 2, // VBP - VLW from datasheet: 12 - 10 = 2
+ .lower_margin = 4, // VFP from datasheet: 4 typ
+ .bpp = 16,
+ .sync = 0, // Hsync and Vsync both active low
+};
+
+static struct pxafb_mach_info gumstix_fb_info = {
+ .modes = &gumstix_fb_mode,
+ .num_modes = 1,
+ .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
+ .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
+ .pxafb_backlight_power = &gumstix_lcd_backlight,
+};
+#endif
+
+static struct platform_device verdex_audio_device = {
+ .name = "pxa2xx-ac97",
+ .id = -1,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &verdex_audio_device,
+};
+
+/* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static int ohci_verdex_init(struct device *dev)
+{
+ // Turn on port 2 in host mode
+ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+
+ /* See drivers/usb/host/ohci-pxa27x.c for further details but
+ ENABLE_PORT_ALL flag is equivalent to using this old sequence:
+ UHCHR = (UHCHR) &
+ ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+ */
+ return 0;
+}
+
+static struct pxaohci_platform_data verdex_ohci_platform_data = {
+ .port_mode = PMM_PERPORT_MODE,
+ .flags = ENABLE_PORT_ALL,
+ .init = ohci_verdex_init,
+};
+
+static void __init verdex_ohci_init(void)
+{
+ pxa_set_ohci_info(&verdex_ohci_platform_data);
+}
+#else
+static void __init verdex_ohci_init(void) {
+ printk(KERN_INFO "Gumstix verdex host usb ohci is disabled\n");
+}
+#endif
+
+
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data verdex_mci_platform_data;
+
+static int verdex_mci_init(struct device *dev, irq_handler_t detect_int,
+ void *data)
+{
+ /* GPIO setup for MMC on the 120-pin connector is done in verdex_init.
+ * There is no card detect on a uSD connector so no interrupt to register.
+ * There is no WP detect GPIO line either.
+ */
+
+ return 0;
+}
+
+static struct pxamci_platform_data verdex_mci_platform_data = {
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+ .init = verdex_mci_init,
+};
+
+static void __init verdex_mmc_init(void)
+{
+ pxa_set_mci_info(&verdex_mci_platform_data);
+}
+#else
+static void __init verdex_mmc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex mmc disabled\n");
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET_PXA2XX) || defined(CONFIG_USB_GADGET_PXA2XX_MODULE)
+static struct pxa2xx_udc_mach_info verdex_udc_info __initdata = {
+ .gpio_vbus = GPIO35,
+ .gpio_pullup = GPIO41,
+};
+
+static void __init verdex_udc_init(void)
+{
+ pxa_set_udc_info(&verdex_udc_info);
+}
+#else
+static void __init verdex_udc_init(void)
+{
+ printk(KERN_INFO "Gumstix verdex udc is disabled\n");
+}
+#endif
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+
+#define VERDEX_GPIO_PENDOWN 16
+
+static int tsc2003_init_platform_hw(void)
+{
+ return 0;
+}
+
+static void tsc2003_exit_platform_hw(void)
+{
+ return;
+}
+
+static void tsc2003_clear_penirq(void)
+{
+ return;
+}
+
+static int tsc2003_get_pendown_state(void)
+{
+ return !gpio_get_value(VERDEX_GPIO_PENDOWN);
+}
+
+static struct tsc2007_platform_data tsc2003_config = {
+ .model = 2003,
+ .x_plate_ohms = 100,
+ .get_pendown_state = tsc2003_get_pendown_state,
+ .clear_penirq = tsc2003_clear_penirq,
+ .init_platform_hw = tsc2003_init_platform_hw,
+ .exit_platform_hw = tsc2003_exit_platform_hw,
+};
+#endif
+
+static struct i2c_board_info __initdata verdex_i2c_board_info[] = {
+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
+
+ {
+ I2C_BOARD_INFO("rtc-ds1307", 0x68),
+ },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ {
+ I2C_BOARD_INFO("tsc2003", 0x48),
+ .platform_data = &tsc2003_config,
+ .irq = IRQ_GPIO(VERDEX_GPIO_PENDOWN),
+ },
+#endif
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_pwr_info = {
+ .fast_mode = 1,
+};
+
+static struct i2c_pxa_platform_data verdex_i2c_info = {
+ .fast_mode = 1,
+};
+
+static void __init verdex_i2c_init(void)
+{
+ printk(KERN_INFO "Initializing Gumstix verdex i2c\n");
+
+#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
+ if ((gpio_request(VERDEX_GPIO_PENDOWN, "TSC2003_PENDOWN") == 0) &&
+ (gpio_direction_input(VERDEX_GPIO_PENDOWN) == 0)) {
+ gpio_export(VERDEX_GPIO_PENDOWN, 0);
+ } else {
+ printk(KERN_ERR "could not obtain gpio for TSC2003_PENDOWN\n");
+ return;
+ }
+#endif
+
+ i2c_register_board_info(0, verdex_i2c_board_info,
+ ARRAY_SIZE(verdex_i2c_board_info));
+ pxa_set_i2c_info(&verdex_i2c_info);
+ pxa27x_set_i2c_power_info(&verdex_i2c_pwr_info);
+}
+#else
+static inline void verdex_i2c_init(void) {}
+#endif
+
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+static void __init verdex_pcmcia_init(void)
+{
+ verdex_pcmcia_pin_config();
+}
+#else
+static void __init verdex_pcmcia_init(void) {
+ printk(KERN_INFO "Gumstix verdex pcmcia is disabled\n");
+}
+#endif
+
+
+static void __init verdex_init(void)
+{
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(verdex_pin_config));
+
+#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
+ /* DISP must be always high while screen is on */
+ gpio_direction_output(GPIO77, 0);
+ GPSR(GPIO77) = GPIO_bit(GPIO77);
+#endif
+ verdex_udc_init();
+ verdex_mmc_init();
+ verdex_ohci_init();
+ verdex_i2c_init();
+ verdex_init_smsc911x();
+ verdex_pcmcia_init();
+
+#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) || defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
+ printk(KERN_INFO "Initializing Gumstix verdex FB info\n");
+ set_pxa_fb_info(&gumstix_fb_info);
+#endif
+ printk(KERN_INFO "Initializing Gumstix platform_add_devices\n");
+ (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(GUMSTIX, "Gumstix verdex")
+ .phys_io = 0x40000000,
+ .boot_params = 0xa0000100, /* match u-boot bi_boot_params */
+ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+ .map_io = pxa_map_io,
+ .init_irq = pxa27x_init_irq,
+ .timer = &pxa_timer,
+ .init_machine = verdex_init,
+MACHINE_END
+
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -109,6 +109,7 @@
#define GPIO54_nPCE_2 MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
#define GPIO78_nPCE_2 MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH)
#define GPIO87_nPCE_2 MFP_CFG_IN(GPIO87, AF1)
+#define GPIO105_nPCE_2 MFP_CFG_OUT(GPIO105, AF1, DRIVE_HIGH)
#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)

869
target/linux/pxa/patches/001-pm.patch
View File

@ -1,869 +0,0 @@
diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/pm.c linux-2.6.17-patched/arch/arm/mach-pxa/pm.c
--- linux-2.6.17/arch/arm/mach-pxa/pm.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/arch/arm/mach-pxa/pm.c 2006-09-11 10:58:41.000000000 -0700
@@ -10,35 +10,50 @@
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License.
*/
+
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/suspend.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/sysctl.h>
#include <linux/errno.h>
-#include <linux/time.h>
#include <asm/hardware.h>
#include <asm/memory.h>
#include <asm/system.h>
-#include <asm/arch/pm.h>
+#include <asm/leds.h>
+#include <asm/uaccess.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
#include <asm/mach/time.h>
+/**/
+#include <linux/module.h>
+/**/
+//kirti
+#include <linux/delay.h>
+//kirti~
/*
* Debug macros
*/
-#undef DEBUG
+#define DEBUG
+
+extern void pxa_cpu_suspend(void);
+extern void pxa_cpu_resume(void);
+
+int pm_pwronoff;
+/*Angelia Additions */
+int pm_pedr=0;
+EXPORT_SYMBOL(pm_pwronoff);
+EXPORT_SYMBOL(pm_pedr);
+
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
-#define RESTORE_GPLEVEL(n) do { \
- GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
- GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
-} while (0)
-
/*
* List of global PXA peripheral registers to preserve.
* More ones like CP and general purpose register values are preserved
@@ -46,97 +61,405 @@
*/
enum { SLEEP_SAVE_START = 0,
- SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
- SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
- SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
- SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
- SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
-
- SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
- SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
- SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
- SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
+ SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
+ SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
- SLEEP_SAVE_PSTR,
+ SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
+ SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
+ SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
+ SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR2_L,
+ SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_U, SLEEP_SAVE_GAFR2_U,
+
+ SLEEP_SAVE_FFIER, SLEEP_SAVE_FFLCR, SLEEP_SAVE_FFMCR,
+ SLEEP_SAVE_FFSPR, SLEEP_SAVE_FFISR,
+ SLEEP_SAVE_FFDLL, SLEEP_SAVE_FFDLH,SLEEP_SAVE_FFFCR,
+
+ SLEEP_SAVE_STIER, SLEEP_SAVE_STLCR, SLEEP_SAVE_STMCR,
+ SLEEP_SAVE_STSPR, SLEEP_SAVE_STISR,
+ SLEEP_SAVE_STDLL, SLEEP_SAVE_STDLH,
+
+ SLEEP_SAVE_BTIER, SLEEP_SAVE_BTLCR, SLEEP_SAVE_BTMCR,
+ SLEEP_SAVE_BTSPR, SLEEP_SAVE_BTISR,
+ SLEEP_SAVE_BTDLL, SLEEP_SAVE_BTDLH,
SLEEP_SAVE_ICMR,
SLEEP_SAVE_CKEN,
-#ifdef CONFIG_PXA27x
- SLEEP_SAVE_MDREFR,
- SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
- SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
-#endif
+ SLEEP_SAVE_LCCR0, SLEEP_SAVE_LCCR1, SLEEP_SAVE_LCCR2,SLEEP_SAVE_LCCR3,
+ SLEEP_SAVE_TMEDCR, SLEEP_SAVE_FDADR0, SLEEP_SAVE_FSADR0,SLEEP_SAVE_FIDR0,SLEEP_SAVE_FDADR1,
+ SLEEP_SAVE_LDCMD0,
+
+ SLEEP_SAVE_NSSCR0,SLEEP_SAVE_NSSCR1,SLEEP_SAVE_NSSSR,SLEEP_SAVE_NSSITR,SLEEP_SAVE_NSSDR,
+ SLEEP_SAVE_NSSTO,SLEEP_SAVE_NSSPSP,
- SLEEP_SAVE_CKSUM,
+ SLEEP_SAVE_CKSUM,
SLEEP_SAVE_SIZE
};
+/**/
+#define UART_DTR 1
+#define UART_RTS 2
+
+/**/
-int pxa_pm_enter(suspend_state_t state)
+int pm_do_suspend(void)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long checksum = 0;
- struct timespec delta, rtc;
int i;
+ int valbefore,valafter,valafter1;
+ int gpsr0,gpsr1,gpsr2;
extern void pxa_cpu_pm_enter(suspend_state_t state);
-#ifdef CONFIG_IWMMXT
- /* force any iWMMXt context to ram **/
- iwmmxt_task_disable(NULL);
-#endif
+ // YoKu 16Feb06 GPIO Changed ----->
+
+ PGSR2 |= GPIO_bit(78);
+/* if(GPLR2 & GPIO_bit(78)) // LCD Reset Pin
+ PGSR2 |= GPIO_bit(78);
+ else
+ PGSR2 &= ~GPIO_bit(78); */
+ GPDR0 &= ~GPIO_bit(0);
+ GPDR0 &= ~GPIO_bit(1);
+ GPDR0 &= ~GPIO_bit(3); //Tushar: 20 apr GPIO3 configured as input
+ GPDR0 &= ~GPIO_bit(2);
+// GPDR0 &= ~GPIO_bit(5);
+// GPDR0 &= ~GPIO_bit(6);
+// GPDR0 &= ~GPIO_bit(7);
+// GPDR0 &= ~GPIO_bit(8);
+
+
+// KeyCol pin Status in sleep mode
+ PGSR0 &= ~GPIO_bit(9); //19
+ PGSR0 &= ~GPIO_bit(10); //20
+ PGSR0 &= ~GPIO_bit(11); //21
+ PGSR0 &= ~GPIO_bit(12); //22
+ PGSR0 &= ~GPIO_bit(13); //23
+ PGSR0 &= ~GPIO_bit(14); //24
+
+ printk("KER_PM: Setting up wakeup sources 26May06\n");
+
+ // KeyPad
+ //printk("KER_PM: Uncommented key pad wakeup sources\n");
+ PWER |= GPIO_bit(5); //11
+ PWER |= GPIO_bit(6); //12
+ PWER |= GPIO_bit(7); //13
+ PWER |= GPIO_bit(8); //14
+ PFER |= GPIO_bit(5); //11
+ PFER |= GPIO_bit(6); //12
+ PFER |= GPIO_bit(7); //13
+ PFER |= GPIO_bit(8); //14
+ PRER |= GPIO_bit(5); //11
+ PRER |= GPIO_bit(6); //12
+ PRER |= GPIO_bit(7); //13
+ PRER |= GPIO_bit(8); //14
+
+ // USB
+ PWER |= GPIO_bit(3); //6
+ PFER |= GPIO_bit(3); //6
+ PRER |= GPIO_bit(3); //6
+
+ // PMU
+ PWER |= GPIO_bit(2); //4
+ PFER |= GPIO_bit(2); //4
+ PRER |= GPIO_bit(2); //4
+
+ // Anup : GSM RI
+ PWER |= GPIO_bit(0); //0
+ PFER |= GPIO_bit(0); //0
+ PRER |= GPIO_bit(0); //0
+ // anup prashant : for gsm reset problem 19 may 2006
+ //GPDR0 |= GPIO_bit(18); YoKu Commented this line, GPIO18 should be i/p pin to avoid GSM Reset pulse
+ PGSR0 |= GPIO_bit(18); // GSM reset pin
+ PGSR0 |= GPIO_bit(0); //
+ PGSR1 |= GPIO_bit(38); // commneted .18 apr
+ // <----- YoKu
+
+ // YoKu ----->
+ // When exiting from sleep mode, 10us Low pulse comes on GSM Reset and Pwr pin
+ // to avoid this configure GPIO 18,80 as input pins before going to sleep mode
+ GPDR0 &= ~GPIO_bit(18);
+ //GPDR2 &= ~GPIO_bit(80);
+ // <----- YoKu
+
+ //kirti for RTC
+ PWER |= PWER_RTC;
+ //kirti cli();
+ local_irq_disable();
+ //kirti clf();
+ local_fiq_disable();
+ leds_event(led_stop);
+
+ /* Put Current time into RCNR */
+ RCNR = xtime.tv_sec;
- /* preserve current time */
- rtc.tv_sec = RCNR;
- rtc.tv_nsec = 0;
- save_time_delta(&delta, &rtc);
+ printk("11May2006 KERR: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
+ printk("KER_PM_DELAY: SSCR Going to Sleep at RCNR =%d\n\n\n\n\n\n",RCNR);
+
+ /*
+ * Temporary solution. This won't be necessary once
+ * we move pxa support into the serial driver
+ * Save the FF UART
+ */
+
+ // Anup : commented for power saving mode problem
+ printk("\nPM: Why doesnt it prnt?? 26May06\n");
+ printk("\nPM : GSM Sleep Mode enabled");
+
+
+ FFMCR &= ~UART_RTS;
+ udelay(2000);
+ udelay(2000);
+ FFMCR &= ~UART_DTR ;
+ udelay(2000);
+
+ udelay(2000);
+ // rupali
+ // Anup : Do not check here
+/* if(!pm_pwronoff)
+ {
+ printk("\nPM : Modem Control Register = %x " , FFMCR);
+ while( FFMSR & 0x00000020)
+ {
+ printk("\nPM : FFFSR = %x " , FFMSR);
+ }
+ } */
+ udelay(2000);
+
+//Tushar: 19 apr
+// NSSCR0 &= 0xFFFFFF7F;
+// printk("\nPM: NSSCR0 = %x" ,NSSCR0 );
+
+ SAVE(FFIER);
+ SAVE(FFLCR);
+ SAVE(FFMCR);
+ SAVE(FFSPR);
+ SAVE(FFISR);
+ FFLCR |= 0x80;
+ SAVE(FFDLL);
+ SAVE(FFDLH);
+ SAVE(FFFCR);
+ FFLCR &= 0xef;
+
+ SAVE(STIER);
+ SAVE(STLCR);
+ SAVE(STMCR);
+ SAVE(STSPR);
+ SAVE(STISR);
+ STLCR |= 0x80;
+ SAVE(STDLL);
+ SAVE(STDLH);
+ STLCR &= 0xef;
+
+ SAVE(BTIER);
+ SAVE(BTLCR);
+ SAVE(BTMCR);
+ SAVE(BTSPR);
+ SAVE(BTISR);
+ BTLCR |= 0x80;
+ SAVE(BTDLL);
+ SAVE(BTDLH);
+ BTLCR &= 0xef;
+
+ /* save vital registers */
+ SAVE(OSCR);
+ SAVE(OSMR0);
+ SAVE(OSMR1);
+ SAVE(OSMR2);
+ SAVE(OSMR3);
+ SAVE(OIER);
- SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
- SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
-
SAVE(GAFR0_L); SAVE(GAFR0_U);
SAVE(GAFR1_L); SAVE(GAFR1_U);
SAVE(GAFR2_L); SAVE(GAFR2_U);
-#ifdef CONFIG_PXA27x
- SAVE(MDREFR);
- SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
- SAVE(GAFR3_L); SAVE(GAFR3_U);
- SAVE(PWER); SAVE(PCFR); SAVE(PRER);
- SAVE(PFER); SAVE(PKWR);
-#endif
+ // YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
+ SAVE(LCCR0); SAVE(LCCR1); SAVE(LCCR2); SAVE(LCCR3);
+ SAVE(FDADR0);
+ SAVE(FDADR1);
+ LCSR = 0xffffffff; /* Clear LCD Status Register */
+
+// LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
+// LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
+
+ SAVE(LDCMD0);
+ // <----- YoKu
+
+// LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
+// LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
+
SAVE(ICMR);
ICMR = 0;
SAVE(CKEN);
- SAVE(PSTR);
+ CKEN = 0;
+
+ // Anup : For Wifi power saving mode 2 May 2006
+ SAVE(NSSCR0);SAVE(NSSCR1);SAVE(NSSSR);SAVE(NSSITR);SAVE(NSSDR);SAVE(NSSTO);
+ SAVE(NSSPSP);
+ printk("\nMY favourite mode in life.......sleep.....\n");
+
/* Note: wake up source are set up in each machine specific files */
+ /*Changes to keep the right sim selected */
+ gpsr0 = GPLR0;
+ gpsr1 = GPLR1;
+ gpsr2 = GPLR2;
+
+ /*Sim 1 selected */
+ // YoKu GPIOs Changed ----->
+ if( (GPLR0 & GPIO_bit(21)) && !(GPLR0 & GPIO_bit(22)) ) // 62,63
+ {
+ PGSR0 |= GPIO_bit(21) ; //62
+ PGSR0 &= ~GPIO_bit(22) ; //63
+ }
+ else if (!(GPLR0 & GPIO_bit(21)) && (GPLR0 & GPIO_bit(22)) ) // 62,63
+ {
+ PGSR0 |= GPIO_bit(22) ; //63
+ PGSR0 &= ~GPIO_bit(21) ; //62
+ } /* sim 2*/
+ // <----- YoKu
+
/* clear GPIO transition detect bits */
GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
-#ifdef CONFIG_PXA27x
- GEDR3 = GEDR3;
-#endif
/* Clear sleep reset status */
RCSR = RCSR_SMR;
+ /* set resume return address */
+ PSPR = virt_to_phys(pxa_cpu_resume);
+
/* before sleeping, calculate and save a checksum */
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
sleep_save[SLEEP_SAVE_CKSUM] = checksum;
- /* *** go zzz *** */
- pxa_cpu_pm_enter(state);
+ PGSR0 |= GPIO_bit(15); //sidd for wake from Sleep 15, YoKu Comented ?? GPIO15 was ChipSelect
+ PGSR2 |= GPIO_bit(80); //sidd for GSM Engine 69, YoKu GPIO Changed Anup :commented
+
+ PGSR1 &= ~GPIO_bit(33); //Tushar: BT Codec Power Down
+
+ PGSR0 &= ~GPIO_bit(23); //Tushar: BGW200 Regulator OFF
+
+// GPDR1 |= GPIO_bit(49); //Tushar: LCD Serial Data in changed to O/P
+
+// PGSR1 &= ~GPIO_bit(48);//Tushar: LCD Serial Pins
+
+// PGSR1 &= ~GPIO_bit(49);
+
+// PGSR1 &= ~GPIO_bit(50);
+
+// PGSR1 |= GPIO_bit(51);
+
+// PGSR1 &= 0x03FFFFFF;//Tushar: 24apr LCD datalines
+// PGSR2 &= 0xFFFFFC00;
+
+ PGSR0 &= ~GPIO_bit(24); //Tushar: Mux Control Signals
+
+ PGSR0 &= ~GPIO_bit(25);
+
+ PGSR0 &= ~GPIO_bit(26);
+
+ PGSR0 &= ~GPIO_bit(27);
+
+ // GPDR0 |= GPIO_bit(17); //Tushar: unused GPIOs 19apr
+ // GPCR0 |= GPIO_bit(17);
+ PGSR0 &= ~GPIO_bit(17);
+
+// GPDR1 |= GPIO_bit(56); //Tushar: unused GPIOs 19apr
+ // GPCR1 |= GPIO_bit(56);
+ PGSR1 &= ~GPIO_bit(56);
+
+// GPDR2 |= GPIO_bit(79);//Tushar: unused GPIOs 19apr
+// GPCR2 |= GPIO_bit(79);
+ PGSR2 &= ~GPIO_bit(79);
+
+// GPDR1 |= 0x03F00000;//Tushar: unused GPIOs 19apr
+// GPCR1 |= 0x03F00000;
+ PGSR1 &= 0xFC0FFFFF;
+
+
+ GPDR0 |= GPIO_bit(19);//Tushar: SIM Present Inputs configured as outputs
+ GPDR0 |= GPIO_bit(20);
+ PGSR0 &= ~GPIO_bit(19);
+ PGSR0 &= ~GPIO_bit(20);
+
+
+//Tushar: 25apr FFRTS FFDTR & FFTXD
+
+ PGSR1 |= GPIO_bit(39);
+ PGSR1 |= GPIO_bit(40);
+ PGSR1 |= GPIO_bit(41);
+/*
+ PGSR2 &= GPIO_bit(81); //Tushar: 24apr NSSP pins
+ PGSR2 &= GPIO_bit(82);
+ PGSR2 &= GPIO_bit(83);
+
+ PGSR2 |= GPIO_bit(74);
+ PGSR2 |= GPIO_bit(75);
+ PGSR2 |= GPIO_bit(76);
+ PGSR2 |= GPIO_bit(77);
+*/
+ if(pm_pwronoff)
+ {
+ /* We are here bcos of pressing of on off switch
+ We wake up now only on pwr switch */
+ printk("Anup: Before sleeping \n");
+ pm_pwronoff = 0;
+ PGSR0 &= ~GPIO_bit(23); //7 YoKu GPIO Changed
+ //PGSR2 &= ~GPIO_bit(64); //64 YoKu Commented in PWG500 64,7 was WifiReg, IN PWG600 it is 23
+
+ PGSR2 &= ~GPIO_bit(80); //69 YoKu GPIO Changed Anup : commnented
+ PWER = 0x0004; // YoKu Changed from 0x10 to 0x04 (i.e GPIO 4 -> 2)
+ PFER = 0x0004;
+ PRER = 0x0004;
+
+// YoKu ---->
+// 11May2006 To reduce Power Off current from 7mA to 4mA
+ GPDR0 |= GPIO_bit(16); // BTReset o/p Low
+ PGSR0 &= ~GPIO_bit(16);
+
+ GPDR1 |= GPIO_bit(33); // nMEC/nPDI o/p Low
+ PGSR1 &= ~GPIO_bit(33);
+
+ GPDR1 |= GPIO_bit(45); // BTRTS o/p High
+ PGSR1 |= GPIO_bit(45);
+
+
+ GPDR1 |= GPIO_bit(43); // BTTXD o/p High
+ PGSR1 |= GPIO_bit(43);
+
+ GPDR1 &= ~GPIO_bit(42); // BTRXD i/p
+ GPDR1 &= ~GPIO_bit(44); // BTCTS i/p
+// <---- YoKu
+
+ PSPR = virt_to_phys(pxa_cpu_resume); // YoKu 29July05 to Resume from where u left, Original PSPR = 0
+ }
+
+ valbefore = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; // 62,63 YoKu GPIO Changed
+
+ //printk("Anup: Before sleeping gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);
+ //kirti pxa_cpu_suspend();
+ //printk("KER_PM: Going to sleep zzzzzzzzz\n");
+
+// OSCC |= OSCC_OON; //Tushar: 18 apr. enable 32.768KHz Oscillator
+
+// PCFR |= PCFR_OPDE; //Tushar: 18 apr. disable 3.6864MHz oscillator
+
+ pxa_cpu_pm_enter(PM_SUSPEND_MEM);
cpu_init();
+ //kirti~
+ /**/
+ //FFMCR |= UART_DTR ;
+ /**/
+
/* after sleeping, validate the checksum */
checksum = 0;
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
@@ -141,39 +464,63 @@
checksum = 0;
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
-
/* if invalid, display message and wait for a hardware reset */
- if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
+ if (checksum != sleep_save[SLEEP_SAVE_CKSUM])
+ {
#ifdef CONFIG_ARCH_LUBBOCK
LUB_HEXLED = 0xbadbadc5;
#endif
while (1)
- pxa_cpu_pm_enter(state);
+ {
+ printk("\n\n\nKERN_PM: CRC Error!!! after wakeup\n\n\n"); // YoKu 25May06
+
}
+ }
+ valafter = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; //62,63 YoKu GPIO Changed
+ pm_pedr = PEDR ;
+
/* ensure not to come back here if it wasn't intended */
PSPR = 0;
+ /*printk("YoKu: gafr0_L=0x%08x gafr0_U=0x%08x\n",GAFR0_L,GAFR0_U);
+ printk(" gafr1_L= 0x%08x gafr1_U= 0x%08x\n",GAFR1_L,GAFR1_U);
+ printk(" gafr2_L= 0x%08x gafr2_U= 0x%08x\n",GAFR2_L,GAFR2_U); */
/* restore registers */
- RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
+ RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
+ RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
RESTORE(GAFR0_L); RESTORE(GAFR0_U);
RESTORE(GAFR1_L); RESTORE(GAFR1_U);
RESTORE(GAFR2_L); RESTORE(GAFR2_U);
- RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
- RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
- RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
-#ifdef CONFIG_PXA27x
- RESTORE(MDREFR);
- RESTORE_GPLEVEL(3); RESTORE(GPDR3);
- RESTORE(GAFR3_L); RESTORE(GAFR3_U);
- RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
- RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
- RESTORE(PFER); RESTORE(PKWR);
-#endif
- PSSR = PSSR_RDH | PSSR_PH;
+ // Anup : For Wifi power saving mode 2 May 2006
+ RESTORE(NSSCR0);RESTORE(NSSCR1);RESTORE(NSSSR);RESTORE(NSSITR);RESTORE(NSSDR);RESTORE(NSSTO);
+ RESTORE(NSSPSP);
+
+ // PSSR = PSSR_PH;
+ GPSR0 = gpsr0;
+ GPSR1 = gpsr1;
+ GPSR2 = gpsr2;
+
+ // Anup : check values of these registers
+// printk("YoKu: gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);
+ //sidd
+
+ GPCR0 |= ~gpsr0;
+ GPCR1 |= ~gpsr1;
+ GPCR2 |= ~gpsr2;
+
+
+ PSSR = ~PSSR_PH;
+
+ RESTORE(OSMR0);
+ RESTORE(OSMR1);
+ RESTORE(OSMR2);
+ RESTORE(OSMR3);
+ RESTORE(OSCR);
+ RESTORE(OIER);
RESTORE(CKEN);
@@ -181,62 +528,181 @@
ICCR = 1;
RESTORE(ICMR);
- RESTORE(PSTR);
+ /*
+ * Temporary solution. This won't be necessary once
+ * we move pxa support into the serial driver.
+ * Restore the FF UART.
+ */
+ RESTORE(BTMCR);
+ RESTORE(BTSPR);
+ RESTORE(BTLCR);
+ BTLCR |= 0x80;
+ RESTORE(BTDLH);
+ RESTORE(BTDLL);
+ RESTORE(BTLCR);
+ RESTORE(BTISR);
+ BTFCR = 0xc7;
+ RESTORE(BTIER);
+
+ RESTORE(STMCR);
+ RESTORE(STSPR);
+ RESTORE(STLCR);
+ STLCR |= 0x80;
+ RESTORE(STDLH);
+ RESTORE(STDLL);
+ RESTORE(STLCR);
+ RESTORE(STISR);
+ STFCR = 0xc7;
+ RESTORE(STIER);
+
+ RESTORE(FFMCR);
+ RESTORE(FFSPR);
+ RESTORE(FFLCR);
+ FFLCR |= 0x80;
+ RESTORE(FFDLH);
+ RESTORE(FFDLL);
+ RESTORE(FFLCR);
+ RESTORE(FFISR);
+ RESTORE(FFFCR);
+ FFFCR = 0xc7;
+ RESTORE(FFIER);
+
+ // YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
+ RESTORE(LCCR3); RESTORE(LCCR2); RESTORE(LCCR1);
+ LCCR0=RESTORE(LCCR0) & ~LCCR0_ENB;
+ RESTORE(FDADR0); RESTORE(FDADR1);
+ LCCR0 |= LCCR0_ENB;
+
+ // <----- YoKu
/* restore current time */
- rtc.tv_sec = RCNR;
- restore_time_delta(&delta, &rtc);
+ xtime.tv_sec = RCNR;
+
+ valafter1 = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; //62,63 YoKu GPIO Changed
+
+// SSCR0 &=0xFFFFFFFF;
+// printk("\nPM : val of SSCR0 = %x " , SSCR0);
+
+ printk("KER_PM: Resumed at RCNR = %d RTSR= %x\n",RCNR,RTSR);
+
+ printk("YoKu: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
+
+ OSMR0 = 0; /* set initial match at 0 */
+ OSSR = 0xf; /* clear status on all timers */
+ OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
+ OSCR = 0; /* initialize free-running timer, force first match */
+
+ leds_event(led_start);
+ //kirti sti();
+ // call i2c reset here---->
+ ICR = ICR_UR;
+ ISR = 0x7FF; //I2C_ISR_INIT;
+ ICR &= ~ICR_UR;
+
+ ISAR = 0x32;//i2c->slave_addr;
+
+ /* set control register values */
+ ICR = (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE);//I2C_ICR_INIT;
+
+ /* enable unit */
+ ICR |= ICR_IUE;
+ udelay(100);
+ //<-----
+
+ local_irq_enable();
-#ifdef DEBUG
- printk(KERN_DEBUG "*** made it back from resume\n");
-#endif
return 0;
}
-EXPORT_SYMBOL_GPL(pxa_pm_enter);
-
unsigned long sleep_phys_sp(void *sp)
{
return virt_to_phys(sp);
}
+#ifdef CONFIG_SYSCTL
/*
- * Called after processes are frozen, but before we shut down devices.
+ * ARGH! ACPI people defined CTL_ACPI in linux/acpi.h rather than
+ * linux/sysctl.h.
+ *
+ * This means our interface here won't survive long - it needs a new
+ * interface. Quick hack to get this working - use sysctl id 9999.
*/
-int pxa_pm_prepare(suspend_state_t state)
-{
- extern int pxa_cpu_pm_prepare(suspend_state_t state);
+#warning ACPI broke the kernel, this interface needs to be fixed up.
+#define CTL_ACPI 9999
+#define ACPI_S1_SLP_TYP 19
- return pxa_cpu_pm_prepare(state);
+/*
+ * Send us to sleep.
+ */
+static int sysctl_pm_do_suspend(ctl_table *ctl, int write, struct file *filp,
+ void *buffer, size_t *lenp)
+{
+ int retval=0;
+ unsigned i , clock ;
+ if (write)
+ {
+ char buf[16], *p;
+ unsigned int sleepsec;
+ int len,left = *lenp;
+
+ len = left;
+ if (left > sizeof(buf))
+ left = sizeof(buf);
+ if (!copy_from_user(buf, buffer, left))
+ {
+ buf[sizeof(buf) - 1] = '\0';
+ sleepsec = simple_strtoul(buf, &p, 0);
+ printk("\nSleeping %d Pwronoff=%x RCNR=%d\n",sleepsec,pm_pwronoff,RCNR);
+ printk("\nPWER %x PFER=%x PRER=%x\n",PWER,PFER,PRER);
+ RTAR = xtime.tv_sec + sleepsec;
+ printk("\nRTAR=%d \n",RTAR);
+ }
+ }
+ retval = pm_do_suspend();
+ clock = get_memclk_frequency_10khz();
+ return retval;
}
-
-EXPORT_SYMBOL_GPL(pxa_pm_prepare);
/*
- * Called after devices are re-setup, but before processes are thawed.
+static struct ctl_table pm_table[] =
+{
+ {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend},
+ {0}
+};
*/
-int pxa_pm_finish(suspend_state_t state)
+static struct ctl_table pm_table[] =
{
- return 0;
+ {
+ ctl_name: ACPI_S1_SLP_TYP,
+ procname: "suspend",
+ mode: 0600,
+ proc_handler: (proc_handler *)&sysctl_pm_do_suspend,
+ },
+ {
+ ctl_name: 0
}
+};
-EXPORT_SYMBOL_GPL(pxa_pm_finish);
+static struct ctl_table pm_dir_table[] =
+{
+ {CTL_ACPI, "pm", NULL, 0, 0555, pm_table},
+ {0}
+};
/*
- * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
+ * Initialize power interface
*/
-static struct pm_ops pxa_pm_ops = {
- .pm_disk_mode = PM_DISK_FIRMWARE,
- .prepare = pxa_pm_prepare,
- .enter = pxa_pm_enter,
- .finish = pxa_pm_finish,
-};
-
-static int __init pxa_pm_init(void)
+static int __init pm_init(void)
{
- pm_set_ops(&pxa_pm_ops);
+ register_sysctl_table(pm_dir_table, 1);
+ /*Adi: Adjust for clock value to RTC
+ RTTR = RTC clk - 1*/
+ RTTR = 32913;
+
return 0;
}
-device_initcall(pxa_pm_init);
+__initcall(pm_init);
+
+#endif
diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/sleep.S linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S
--- linux-2.6.17/arch/arm/mach-pxa/sleep.S 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S 2006-09-11 13:07:05.000000000 -0700
@@ -79,7 +79,7 @@
ldr r5, [r4]
@ enable SDRAM self-refresh mode
- orr r5, r5, #MDREFR_SLFRSH
+ orr r5, r5, #(MDREFR_SLFRSH | MDREFR_APD)
#ifdef CONFIG_PXA27x
@ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
diff -NurbwB linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h
--- linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h 2006-09-11 11:04:36.000000000 -0700
@@ -1748,6 +1748,15 @@
#define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL))
#define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL))
+#define NSSCR0 __REG(0x41400000) /* SSP Port 1 Control Register 0 */
+#define NSSCR1 __REG(0x41400004) /* SSP Port 1 Control Register 1 */
+#define NSSSR __REG(0x41400008) /* SSP Port 1 Status Register */
+#define NSSITR __REG(0x4140000C) /* SSP Port 1 Interrupt Test Register */
+#define NSSDR __REG(0x41400010) /* (Write / Read) SSP Port 1 Data Write Register/SSP Data Read Register */
+#define NSSTO __REG(0x41400028) /* SSP Port 1 Time Out Register */
+#define NSSPSP __REG(0x4140002C) /* SSP Port 1 Programmable Serial Port Register */
+
+
/*
* MultiMediaCard (MMC) controller
*/
diff -NurbwB linux-2.6.17/kernel/power/main.c linux-2.6.17-patched/kernel/power/main.c
--- linux-2.6.17/kernel/power/main.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/kernel/power/main.c 2006-09-11 12:59:20.000000000 -0700
@@ -66,10 +66,12 @@
goto Enable_cpu;
}
+ /*
if (freeze_processes()) {
error = -EAGAIN;
goto Thaw;
}
+ */
if ((free_pages = nr_free_pages()) < FREE_PAGE_NUMBER) {
pr_debug("PM: free some memory\n");
@@ -110,12 +112,15 @@
local_irq_save(flags);
+ /*
if ((error = device_power_down(PMSG_SUSPEND))) {
printk(KERN_ERR "Some devices failed to power down\n");
goto Done;
}
+ */
+
error = pm_ops->enter(state);
- device_power_up();
+ //device_power_up();
Done:
local_irq_restore(flags);
return error;

58
target/linux/pxa/patches/002-usb_gadget.patch
View File

@ -1,58 +0,0 @@
diff -NurbwB linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c
--- linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c 2006-09-11 13:02:39.000000000 -0700
@@ -87,8 +87,8 @@
static const char ep0name [] = "ep0";
-// #define USE_DMA
-// #define USE_OUT_DMA
+#define USE_DMA
+#define USE_OUT_DMA
// #define DISABLE_TEST_MODE
#ifdef CONFIG_ARCH_IXP4XX
@@ -1513,7 +1513,7 @@
#endif
/* try to clear these bits before we enable the udc */
- udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
+ udc_ack_int_UDCCR(UDCCR_SUSIR|UDCCR_RSTIR|UDCCR_RESIR);
ep0_idle(dev);
dev->gadget.speed = USB_SPEED_UNKNOWN;
@@ -2043,6 +2043,9 @@
struct pxa2xx_udc *dev = _dev;
int handled;
+
+ udc_set_mask_UDCCR( UDCCR_REM | UDCCR_SRM);
+
dev->stats.irqs++;
HEX_DISPLAY(dev->stats.irqs);
do {
@@ -2137,6 +2139,8 @@
/* we could also ask for 1 msec SOF (SIR) interrupts */
} while (handled);
+
+ udc_clear_mask_UDCCR( UDCCR_SRM | UDCCR_REM);
return IRQ_HANDLED;
}
@@ -2437,6 +2441,7 @@
int retval, out_dma = 1;
u32 chiprev;
+ local_irq_disable();
/* insist on Intel/ARM/XScale */
asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
@@ -2553,6 +2558,7 @@
#endif
}
#endif
+ local_irq_enable();
create_proc_files();
return 0;

52
target/linux/pxa/patches/002-verdex_lcd_support.patch Normal file
View File

@ -0,0 +1,52 @@
From eb92a178eceae4e5d18bbb442b8e44cb88457d60 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:25:57 -0400
Subject: [PATCH] [ARM] Gumstix Verdex LCD config options
add options to Kconfig for Verdex LCD support
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/video/Kconfig | 31 +++++++++++++++++++++++++++++++
1 files changed, 31 insertions(+), 0 deletions(-)
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1772,6 +1772,37 @@ config FB_PXA
say M here and read <file:Documentation/kbuild/modules.txt>.
If unsure, say N.
+choice
+ depends on FB_PXA
+ prompt "LCD Panel"
+ default FB_PXA_SAMSUNG_LTE430WQ_F0C
+
+config FB_PXA_ALPS_CDOLLAR
+ boolean "Chris Dollar's ALPS screen"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for an ALPS
+ screen which Chris Dollar uses
+
+config FB_PXA_SHARP_LQ043_PSP
+ boolean "SHARP LQ043... series"
+ ---help---
+ Enable definitions (over-ridable on the kernel command line if
+ "PXA LCD command line parameters" is also selected) for a SHARP
+ LQ043... screen, such as the one used by the PSP. These screens are
+ the ones normally sold by gumstix with its boards.
+
+config FB_PXA_SAMSUNG_LTE430WQ_F0C
+ boolean "Samsung LTE430WQ-F0C (standard gumstix LCD)"
+ ---help---
+ Enable definitions for a Samsung LTE430WQ-F0C LCD panel, such as the ones resold
+ by gumstix for use with their "LCD-Ready" boards.
+
+config FB_PXA_NONEOFTHEABOVE
+ boolean "None of the above"
+
+endchoice
+
config FB_PXA_OVERLAY
bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"

211
target/linux/pxa/patches/003-gumstix_h_verdex_pro_support.patch Normal file
View File

@ -0,0 +1,211 @@
From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
From: Joseph Kortje <jpktech@rogers.com>
Date: Wed, 28 Oct 2009 21:49:11 -0400
Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
Added a bunch of ifdefs to support both original gumstix boards
as well as the Verdex Pro in gumstix.h
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/include/mach/gumstix.h | 160 ++++++++++++++++++++++++------
1 files changed, 130 insertions(+), 30 deletions(-)
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -6,6 +6,9 @@
* published by the Free Software Foundation.
*/
+#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
+ #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
+#endif
/* BTRESET - Reset line to Bluetooth module, active low signal. */
#define GPIO_GUMSTIX_BTRESET 7
@@ -28,9 +31,18 @@ has detected a cable insertion; driven l
#else
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+
#define GPIO_GUMSTIX_USB_GPIOn 35
#define GPIO_GUMSTIX_USB_GPIOx 41
+#else
+
+#define GPIO_GUMSTIX_USB_GPIOn 100
+#define GPIO_GUMSTIX_USB_GPIOx 27
+
+#endif
+
#endif
/* usb state change */
@@ -52,48 +64,136 @@ has detected a cable insertion; driven l
* ETH_RST provides a hardware reset line to the ethernet chip
* ETH is the IRQ line in from the ethernet chip to the PXA
*/
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
#define GPIO_GUMSTIX_ETH0_RST 80
-#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH0 36
+#else
+#define GPIO_GUMSTIX_ETH0_RST 107
+#define GPIO_GUMSTIX_ETH0 99
+#endif
#define GPIO_GUMSTIX_ETH1_RST 52
-#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1 27
-#define GPIO_GUMSTIX_ETH0 36
+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
-#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
-#define GPIO_GUMSTIX_ETH1 27
#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
-#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
/* CF reset line */
-#define GPIO8_RESET 8
+#define GPIO8_CF_RESET 8
+#define GPIO97_CF_RESET 97
+#define GPIO110_CF_RESET 110
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
+#else
+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
+#endif
+
+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
+
+/* CF signals shared by both sockets */
+#define GPIO_GUMSTIX_nPOE 48
+#define GPIO_GUMSTIX_nPWE 49
+#define GPIO_GUMSTIX_nPIOR 50
+#define GPIO_GUMSTIX_nPIOW 51
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1 52
+#define GPIO_GUMSTIX_nPCE_2 53
+#define GPIO_GUMSTIX_pSKTSEL 54
+#else
+#define GPIO_GUMSTIX_nPCE_1 102
+#define GPIO_GUMSTIX_nPCE_2 105
+#define GPIO_GUMSTIX_pSKTSEL 79
+#endif
+
+#define GPIO_GUMSTIX_nPREG 55
+#define GPIO_GUMSTIX_nPWAIT 56
+#define GPIO_GUMSTIX_nIOIS16 57
+
+/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE
+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE
+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR
+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL
+#else
+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL
+#endif
+
+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG
+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16
/* CF slot 0 */
-#define GPIO4_nBVD1 4
-#define GPIO4_nSTSCHG GPIO4_nBVD1
-#define GPIO11_nCD 11
-#define GPIO26_PRDY_nBSY 26
-#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG)
-#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD)
-#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY)
+#define GPIO4_nBVD1_0 4
+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
+#define GPIO11_nCD_0 11
+#define GPIO26_PRDY_nBSY_0 26
+
+#define GPIO111_nBVD1_0 111
+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
+#define GPIO104_nCD_0 104
+#define GPIO96_PRDY_nBSY_0 96
+#define GPIO109_PRDY_nBSY_0 109
+
+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
+#else
+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
+#endif
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
+
+#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
+#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
/* CF slot 1 */
-#define GPIO18_nBVD1 18
-#define GPIO18_nSTSCHG GPIO18_nBVD1
-#define GPIO36_nCD 36
-#define GPIO27_PRDY_nBSY 27
-#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG)
-#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD)
-#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY)
-
-/* CF GPIO line modes */
-#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
-#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
-#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
-#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
-#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
-#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
-#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
+#define GPIO18_nBVD1_1 18
+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
+#define GPIO36_nCD_1 36
+#define GPIO27_PRDY_nBSY_1 27
+
+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
+
+#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
+#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
+
+/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
+#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
+#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
+
+#define GPIO_GUMSTIX_nSTSCHG_0_MD GPIO111_GPIO
+#define GPIO_GUMSTIX_nCD_0_MD GPIO104_GPIO
+
+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD GPIO96_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD GPIO109_GPIO
+
+#define GPIO_GUMSTIX_nSTSCHG_1_MD GPIO18_GPIO
+#define GPIO_GUMSTIX_nCD_1_MD GPIO36_GPIO
+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD GPIO27_GPIO
/* for expansion boards that can't be programatically detected */
extern int am200_init(void);

10
target/linux/pxa/patches/004-skbuf_hack.patch
View File

@ -1,10 +0,0 @@
--- linux-2.6.17/include/linux/skbuff.h 2006-09-20 16:13:42.000000000 -0700
+++ linux-2.6.17-patched/include/linux/skbuff.h 2006-09-20 16:14:29.000000000 -0700
@@ -239,6 +239,7 @@
} nh;
union {
+ struct ethhdr *ethernet;
unsigned char *raw;
} mac;

102
target/linux/pxa/patches/004-smsc911x_verdex_pro_support.patch Normal file
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@ -0,0 +1,102 @@
From 7645a459feb02f7aae4c3a5724b7800495d1b659 Mon Sep 17 00:00:00 2001
From: Bobby Powers <bobbypowers@gmail.com>
Date: Wed, 28 Oct 2009 22:41:31 -0400
Subject: [PATCH] [ARM] smsc911x: Verdex Pro support
Basically Joseph Kortje's patch, cleaned up to apply to Linus's
tree. Some of the smsc911x.c had been applied already
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/net/smsc911x.c | 50 +++++++++++++++++++++++++++++++++++++--------
drivers/net/smsc911x.h | 2 +-
include/linux/smsc911x.h | 11 ++++++++++
3 files changed, 53 insertions(+), 10 deletions(-)
--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
@@ -1181,7 +1181,7 @@ static int smsc911x_open(struct net_devi
SMSC_WARNING(IFUP,
"Timed out waiting for EEPROM busy bit to clear");
- smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
+ smsc911x_reg_write(pdata, GPIO_CFG, GPIO_CFG_LED1_EN_ | GPIO_CFG_LED2_EN_ | (1 << 20));
/* The soft reset above cleared the device's MAC address,
* restore it from local copy (set in probe) */
@@ -1193,8 +1193,8 @@ static int smsc911x_open(struct net_devi
smsc911x_reg_write(pdata, INT_EN, 0);
smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
- /* Set interrupt deassertion to 100uS */
- intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
+ /* Set interrupt deassertion to 22*10uS */
+ intcfg = ((22 << 24) | INT_CFG_IRQ_EN_);
if (pdata->config.irq_polarity) {
SMSC_TRACE(IFUP, "irq polarity: active high");
@@ -1220,7 +1220,7 @@ static int smsc911x_open(struct net_devi
temp |= INT_EN_SW_INT_EN_;
smsc911x_reg_write(pdata, INT_EN, temp);
- timeout = 1000;
+ timeout = 2000;
while (timeout--) {
if (pdata->software_irq_signal)
break;
@@ -1948,6 +1948,38 @@ static int __devexit smsc911x_drv_remove
return 0;
}
+static inline unsigned int is_gumstix_oui(u8 *addr)
+{
+ return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
+}
+
+/**
+ * gen_serial_ether_addr - Generate software assigned Ethernet address
+ * based on the system_serial number
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Generate an Ethernet address (MAC) that is not multicast
+ * and has the local assigned bit set, keyed on the system_serial
+ */
+static inline void gen_serial_ether_addr(u8 *addr)
+{
+ static u8 ether_serial_digit = 0;
+ addr [0] = system_serial_high >> 8;
+ addr [1] = system_serial_high;
+ addr [2] = system_serial_low >> 24;
+ addr [3] = system_serial_low >> 16;
+ addr [4] = system_serial_low >> 8;
+ addr [5] = (system_serial_low & 0xc0) | /* top bits are from system serial */
+ (1 << 4) | /* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
+ ((ether_serial_digit++) & 0x0f); /* 15 possible interfaces of each type */
+
+ if(!is_gumstix_oui(addr))
+ {
+ addr [0] &= 0xfe; /* clear multicast bit */
+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
+ }
+}
+
static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
{
struct net_device *dev;
@@ -2081,11 +2113,11 @@ static int __devinit smsc911x_drv_probe(
SMSC_TRACE(PROBE,
"Mac Address is read from LAN911x EEPROM");
} else {
- /* eeprom values are invalid, generate random MAC */
- random_ether_addr(dev->dev_addr);
- smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
- SMSC_TRACE(PROBE,
- "MAC Address is set to random_ether_addr");
+ /* eeprom values are invalid, generate MAC from serial number */
+ gen_serial_ether_addr(dev->dev_addr);
+ smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
+ SMSC_TRACE(PROBE,
+ "MAC Address is derived from system serial number");
}
}

111
target/linux/pxa/patches/005-mtd.patch
View File

@ -1,111 +0,0 @@
diff -Nurb linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c
--- linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c 2006-09-25 11:27:06.000000000 -0700
@@ -40,7 +40,7 @@
/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
// debugging, turns off buffer write mode if set to 1
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
#define MANUFACTURER_INTEL 0x0089
#define I82802AB 0x00ad
diff -Nurb linux-2.6.17/drivers/mtd/maps/lubbock-flash.c linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c
--- linux-2.6.17/drivers/mtd/maps/lubbock-flash.c 2006-06-17 18:49:35.000000000 -0700
+++ linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c 2006-09-25 10:50:08.000000000 -0700
@@ -26,6 +26,7 @@
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
+#include <linux/mtd/concat.h>
#define ROM_ADDR 0x00000000
@@ -48,24 +49,27 @@
.inval_cache = lubbock_map_inval_cache,
} };
-static struct mtd_partition lubbock_partitions[] = {
+static struct mtd_partition lubbock_partitions[] =
+{
{
- .name = "Bootloader",
- .size = 0x00040000,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE /* force read-only */
- },{
- .name = "Kernel",
- .size = 0x00100000,
- .offset = 0x00040000,
- },{
- .name = "Filesystem",
- .size = MTDPART_SIZ_FULL,
- .offset = 0x00140000
- }
+ .name = "root",
+ .offset = 0x00410000
+ },
+ {
+ .name = "kernel",
+ .size = 0x00150000,
+ .offset = 0x000B0000
+ },
+ {
+ .name = "bootloader",
+ .size = 0x000B0000,
+ .offset = 0x00000000
+ },
};
+
static struct mtd_info *mymtds[2];
+static struct mtd_info *merged_mtd;
static struct mtd_partition *parsed_parts[2];
static int nr_parsed_parts[2];
@@ -83,8 +87,8 @@
printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
flashboot?"Flash":"ROM", flashboot);
- lubbock_maps[flashboot^1].name = "Lubbock Application Flash";
- lubbock_maps[flashboot].name = "Lubbock Boot ROM";
+ lubbock_maps[flashboot^1].name = "Flash-1";
+ lubbock_maps[flashboot].name = "Flash-0";
for (i = 0; i < 2; i++) {
lubbock_maps[i].virt = ioremap(lubbock_maps[i].phys, WINDOW_SIZE);
@@ -125,25 +129,23 @@
if (!mymtds[0] && !mymtds[1])
return ret;
- for (i = 0; i < 2; i++) {
- if (!mymtds[i]) {
- printk(KERN_WARNING "%s is absent. Skipping\n", lubbock_maps[i].name);
- } else if (nr_parsed_parts[i]) {
- add_mtd_partitions(mymtds[i], parsed_parts[i], nr_parsed_parts[i]);
- } else if (!i) {
- printk("Using static partitions on %s\n", lubbock_maps[i].name);
- add_mtd_partitions(mymtds[i], lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
- } else {
- printk("Registering %s as whole device\n", lubbock_maps[i].name);
- add_mtd_device(mymtds[i]);
- }
- }
+ if (mymtds[0] && mymtds[1]) {
+ merged_mtd = mtd_concat_create(mymtds, 2, "Concated Flash #1 and #2");
+ if(merged_mtd)
+ add_mtd_partitions(merged_mtd, lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
+ else
+ printk("YoKu: Failed to concate\n");
return 0;
+ }
}
static void __exit cleanup_lubbock(void)
{
int i;
+
+ del_mtd_partitions(merged_mtd);
+ map_destroy(merged_mtd);
+
for (i = 0; i < 2; i++) {

234
target/linux/pxa/patches/005-verdex_pcmcia_support.patch Normal file
View File

@ -0,0 +1,234 @@
From 76a102bd5c9d792db19c6c72eafdecea0311a0c9 Mon Sep 17 00:00:00 2001
From: Craig Hughes <craig@gumstix.com>
Date: Fri, 30 Oct 2009 14:16:27 -0400
Subject: [PATCH] [ARM] pxa: Gumstix Verdex PCMCIA support
Needed for the Libertas CS wireless device.
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
drivers/pcmcia/Kconfig | 3 +-
drivers/pcmcia/Makefile | 3 +
drivers/pcmcia/pxa2xx_gumstix.c | 194 +++++++++++++++++++++++++++++++++++++++
3 files changed, 199 insertions(+), 1 deletions(-)
create mode 100644 drivers/pcmcia/pxa2xx_gumstix.c
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -221,7 +221,8 @@ config PCMCIA_PXA2XX
depends on ARM && ARCH_PXA && PCMCIA
depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
|| MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
- || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2)
+ || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2 \
+ || ARCH_GUMSTIX)
help
Say Y here to include support for the PXA2xx PCMCIA controller
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -77,4 +77,7 @@ pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa
pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o
pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o
+pxa2xx-obj-$(CONFIG_MACH_GUMSTIX_VERDEX) += pxa2xx_cs.o
+pxa2xx_cs-objs := pxa2xx_gumstix.o
+
obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_core.o $(pxa2xx-obj-y)
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_gumstix.c
@@ -0,0 +1,194 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_gumstix.c
+ *
+ * Gumstix PCMCIA specific routines. Based on Mainstone
+ *
+ * Copyright 2004, Craig Hughes <craig@gumstix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <pcmcia/ss.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+#include <mach/pxa27x.h>
+#else
+#include <mach/pxa27x.h>
+#endif
+
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/gumstix.h>
+#include "soc_common.h"
+
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs0[] = {
+ { 0, GUMSTIX_S0_nCD_IRQ, "CF0 nCD" },
+ { 0, GUMSTIX_S0_nSTSCHG_IRQ, "CF0 nSTSCHG" },
+};
+
+static struct pcmcia_irqs gumstix_pcmcia_irqs1[] = {
+ { 1, GUMSTIX_S1_nCD_IRQ, "CF1 nCD" },
+ { 1, GUMSTIX_S1_nSTSCHG_IRQ, "CF1 nSTSCHG" },
+};
+
+
+static int net_cf_vx_mode = 0;
+
+static int gumstix_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+/* Note: The verdex_pcmcia_pin_config is moved to gumstix_verdex.c in order to use mfp_pxa2xx_config
+ for board-specific pin configuration instead of the old deprecated pxa_gpio_mode function. Thus,
+ only the IRQ init is still needed to be done here. */
+ skt->irq = (skt->nr == 0) ? ((net_cf_vx_mode == 0) ? GUMSTIX_S0_PRDY_nBSY_IRQ : GUMSTIX_S0_PRDY_nBSY_OLD_IRQ) : GUMSTIX_S1_PRDY_nBSY_IRQ;
+
+ return (skt->nr == 0) ? soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0)) :
+ soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+}
+
+static void gumstix_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr == 0)
+ {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+
+ if (net_cf_vx_mode) {
+ gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
+ } else {
+ gpio_free(GPIO_GUMSTIX_CF_RESET);
+ }
+
+}
+
+static void gumstix_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+ struct pcmcia_state *state)
+{
+ unsigned int cd, prdy_nbsy, nbvd1;
+ if(skt->nr == 0)
+ {
+ cd = GPIO_GUMSTIX_nCD_0;
+ if(net_cf_vx_mode)
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0_OLD;
+ else
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_0;
+ } else {
+ cd = GPIO_GUMSTIX_nCD_1;
+ prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_1;
+ nbvd1 = GPIO_GUMSTIX_nBVD1_1;
+ }
+ state->detect = !(GPLR(cd) & GPIO_bit(cd));
+ state->ready = !!(GPLR(prdy_nbsy) & GPIO_bit(prdy_nbsy));
+ state->bvd1 = !!(GPLR(nbvd1) & GPIO_bit(nbvd1));
+ state->bvd2 = 1;
+ state->vs_3v = 0;
+ state->vs_Xv = 0;
+ state->wrprot = 0;
+}
+
+static int gumstix_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+ const socket_state_t *state)
+{
+ return 0;
+}
+
+static void gumstix_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static void gumstix_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+ if(skt->nr) {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
+ } else {
+ soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
+ }
+}
+
+static struct pcmcia_low_level gumstix_pcmcia_ops = {
+ .owner = THIS_MODULE,
+ .hw_init = gumstix_pcmcia_hw_init,
+ .hw_shutdown = gumstix_pcmcia_hw_shutdown,
+ .socket_state = gumstix_pcmcia_socket_state,
+ .configure_socket = gumstix_pcmcia_configure_socket,
+ .socket_init = gumstix_pcmcia_socket_init,
+ .socket_suspend = gumstix_pcmcia_socket_suspend,
+ .nr = 2,
+};
+
+static struct platform_device *gumstix_pcmcia_device;
+
+extern int __init gumstix_get_cf_cards(void);
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+extern int __init gumstix_check_if_netCF_vx(void);
+#endif
+
+static int __init gumstix_pcmcia_init(void)
+{
+ int ret;
+
+#ifdef CONFIG_MACH_GUMSTIX_VERDEX
+ net_cf_vx_mode = gumstix_check_if_netCF_vx();
+#endif
+
+ gumstix_pcmcia_ops.nr = gumstix_get_cf_cards();
+
+ gumstix_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+ if (!gumstix_pcmcia_device)
+ return -ENOMEM;
+
+ ret = platform_device_add_data(gumstix_pcmcia_device, &gumstix_pcmcia_ops,
+ sizeof(gumstix_pcmcia_ops));
+
+ if (ret == 0) {
+ printk(KERN_INFO "Registering gumstix PCMCIA interface.\n");
+ ret = platform_device_add(gumstix_pcmcia_device);
+ }
+
+ if (ret)
+ platform_device_put(gumstix_pcmcia_device);
+
+ return ret;
+}
+
+static void __exit gumstix_pcmcia_exit(void)
+{
+ /*
+ * This call is supposed to free our gumstix_pcmcia_device.
+ * Unfortunately platform_device don't have a free method, and
+ * we can't assume it's free of any reference at this point so we
+ * can't free it either.
+ */
+ platform_device_unregister(gumstix_pcmcia_device);
+}
+
+fs_initcall(gumstix_pcmcia_init);
+module_exit(gumstix_pcmcia_exit);
+
+MODULE_LICENSE("GPL");

37
target/linux/pxa/patches/006-define_smsc911x_for_pcmcia.patch Normal file
View File

@ -0,0 +1,37 @@
From ddd30dbf3cfd805b0de99fc581d0fa1cc7236ef9 Mon Sep 17 00:00:00 2001
From: Bobby Powers <bobbypowers@gmail.com>
Date: Fri, 13 Nov 2009 01:33:05 -0500
Subject: [PATCH] pxa: define smsc911x structures for pcmcia too
The gumstix pcmcia support (which the wireless driver uses) needs
to know about the smsc911x platform device even if smsc811x support
is disabled, as they share resources.
Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
---
arch/arm/mach-pxa/gumstix-verdex.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
--- a/arch/arm/mach-pxa/gumstix-verdex.c
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -51,7 +51,9 @@
#include <linux/delay.h>
-#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
+ || defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
#include <linux/smsc911x.h>
@@ -85,7 +87,9 @@ static struct platform_device verdex_sms
.platform_data = &verdex_smsc911x_config,
},
};
+#endif
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static void __init verdex_init_smsc911x(void)
{

30
target/linux/pxa/patches/007-fix_verdex_pro_mmc_initialization.patch Normal file
View File

@ -0,0 +1,30 @@
From 7169c68fec79e61549b8e9c0106dde88e4d1bf9d Mon Sep 17 00:00:00 2001
From: Bobby Powers <rpowers@harttech.com>
Date: Thu, 29 Oct 2009 15:39:45 -0400
Subject: [PATCH] [ARM] pxa: fix Verdex Pro mmc initialization
The MicroSD port doesn't have card detect, read-only switch
support, and is continuously powered. Somewhere in the
forward-porting this got lost in the structure initialization.
Signed-off-by: Bobby Powers <rpowers@harttech.com>
---
arch/arm/mach-pxa/gumstix-verdex.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
--- a/arch/arm/mach-pxa/gumstix-verdex.c
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -590,8 +590,11 @@ static int verdex_mci_init(struct device
}
static struct pxamci_platform_data verdex_mci_platform_data = {
- .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
- .init = verdex_mci_init,
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+ .init = verdex_mci_init,
+ .gpio_card_detect = -1,
+ .gpio_card_ro = -1,
+ .gpio_power = -1,
};
static void __init verdex_mmc_init(void)

57
target/linux/pxa/patches/008-verdex_mtd_support.patch Normal file
View File

@ -0,0 +1,57 @@
--- a/arch/arm/mach-pxa/gumstix-verdex.c
+++ b/arch/arm/mach-pxa/gumstix-verdex.c
@@ -51,6 +51,46 @@
#include <linux/delay.h>
+static struct resource flash_resource = {
+ .start = 0x00000000,
+ .end = SZ_64M - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct mtd_partition gumstix_partitions[] = {
+ {
+ .name = "u-boot",
+ .size = 0x00040000,
+ .offset = 0,
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ } , {
+ .name = "rootfs",
+ .size = 0x01ec0000,
+ .offset = 0x00040000
+ } , {
+ .name = "kernel",
+ .size = 0x00100000,
+ .offset = 0x01f00000
+ }
+};
+
+static struct flash_platform_data gumstix_flash_data = {
+ .map_name = "cfi_probe",
+ .parts = gumstix_partitions,
+ .nr_parts = ARRAY_SIZE(gumstix_partitions),
+ .width = 2,
+};
+
+static struct platform_device gumstix_flash_device = {
+ .name = "pxa2xx-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &gumstix_flash_data,
+ },
+ .resource = &flash_resource,
+ .num_resources = 1,
+};
+
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
|| defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
@@ -540,6 +580,7 @@ static struct platform_device verdex_aud
};
static struct platform_device *devices[] __initdata = {
+ &gumstix_flash_device,
&verdex_audio_device,
};